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Question 1
Figure Q.1
QUESTION 2
a). Based on the circuit shown in Figure Q.2 draw the internal structure in transistor
level (6 transistors needed)of the 3-input NAND gate using CMOS technology.
Figure Q.2
1
b).Complete the truth table for the above gate using the following format:
A, B, C, and Y cab be L=Low or H: High. Q1-Q6 can be either ON or OFF.
A B C Q1 Q2 Q3 Q4 Q5 Q6 Y
L L L
L L H
L H L
L H H
H L L
H L H
H H L
H H H
QUESTION 3
Based on the circuit shown in Figure Q3 find ID, and Vs.
Transistor data: K=2x10-5 A/V2,VT=1 V.
Figure Q 3
QUESTION 4
Based on the block diagram of the NMOS transistor shown in Figure Q.4
mark the following:
the gate terminal, the source terminal, the drain terminal, the channel width, and the
channel length. Mark on the diagram the type of material of each layer
Figure Q.4
2
QUESTION 5
Based on the circuit shown in Figure Q.5 find I1, I2, and Vo. Transistor data: VT=1 V,
K=1 mA/V2.
8V
I1
Vo
I2
Figure Q.5