ST.

XAVIERS COLLEGE
MAITIGHAR KATHMANDU

LAB ASSIGNMENT NO 5 TO INVESTIGATE THE OPERATION OF HALF SUBTRACTOR FULL SUBTRACTOR SUBMITTED BY: SUBMITTED TO: Samrat KC Karmacharya

Er. Rajan

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BScCsit 2nd Semester Lecturer Roll No: 35 Computer Science

Department of

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TO VERIFY THE OPERATION OF HALF SUBTRACTOR

i. OBJECTIVE To verify the operation of Half Subtractor THEORY Half Subtractor is a combinational circuit that performs subtraction of binary numbers. The subtraction of two binary numbers is accomplished by taking the 2s complement of subtrahend and adding it to the minuend. TRUTH TABLE INPUTS A 0 0 1 1 B 0 1 0 1

OUTPUTS Difference 0 1 1 0 Borrow 0 1 0 0

CIRCUIT DIAGRAM

OBSERVATION TABLE INPUTS OUTPUTS A 0 0 1 B 0 1 0 Difference 0 1 1 Borrow 0 1 0

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CONCLUSION Hence, the operation of half subtractor is verified. REFERENCE Note

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TO VERIFY THE OPERATION OF FULL SUBTRACTOR

ii. OBJECTIVE TO INVESTIGATE AND VERIFY THE OPERATION OF FULL SUBTRACTOR THEORY It is a combinational circuit that performs a subtraction between two bits, taking into account that one may have been borrowed by a lower significant stage. It has three inputs and two outputs. The 1s and 0s for output variable are determined from subtraction of x-y-z. TRUTH TABLE INPUTS A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 0 1 1 0 1 0 0 1

OUTPUTS Differrence Borrow 0 1 1 1 0 0 0 1

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CIRCUIT DIAGRAM

OBSERVATION TABLE INPUTS A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 0 1 1 0 1 0 0 1

OUTPUTS Differrence Borrow 0 1 1 1 0 0 0 1

CONCLUSION Hence, the operation of full subtractor is verified. REFERENCE Note

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