IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 22, NO.

4, DECEMBER 2007 855

An Approach to Fault-Tolerant Three-Phase Matrix
Converter Drives
Sangshin Kwak, Member, IEEE, and Hamid A. Toliyat, Senior Member, IEEE
AbstractDespite numerous research efforts in matrix
converter-based drives, a study of fault-tolerant topology and con-
trol strategy for a matrix converter drive has not been presented
in the literature. This paper proposes a matrix converter struc-
ture and a modulation technique for the remedial operation in case
of opened switch faults and single-phase open circuits. The fault
compensation is achieved by reconguring the matrix converter
topology with the help of a connecting device. Based on the rede-
ned converter structure, a fault-tolerant modulation algorithm
is developed to reshape output currents of two unfaulty phases
for obtaining continuous operation. The proposed method allows
improved system reliability and fault-tolerant capability with no
backupleg andno parallel redundancy. Simulationandexperimen-
tal results are shown to demonstrate the feasibility of the proposed
fault-tolerant approach to the matrix converter drives.
Index TermsFault-tolerant strategy, matrix converter, modu-
lation algorithm.
I. INTRODUCTION
A
DVANCES in power semiconductor devices and low-
cost/high-speed processors have signicantly matured ad-
justable speed drives (ASDs). As the active devices continue to
improve, passive components used for energy storage increas-
ingly dominate system volume, weight, and reliability. Realiz-
ing that fundamental constraint in compact ASD systems is a
large capacitive lter in dc-link, matrix converter-based ASDs
have recently received considerable attention [1][5]. With its
direct ac/ac power conversion, the matrix converter provides
the following advantages: all-silicon solution, no dc-link re-
quirement, sinusoidal input and output waveforms, bidirectional
power ow, unity power factor, and compact design. In addi-
tion, the converter has a long lifetime with high-temperature
surroundings due to no electrolytic capacitors.
Notwithstanding the advantages, industrial acceptance of the
matrix converter drives has been held back due to economic as-
pects with a number of switches, expensive solutions for over-
voltage protection, and complicated control algorithms [3]. Most
potential practical areas of the matrix converter drives are likely
to be aerospace and military applications, where reduced space
and weight as well as high-temperature operation are critical
issues over cost and complexity [3], [5]. In fact, improved relia-
bility of ASDsystems is particularly of great importance in these
Manuscript received January 27, 2006; revised July 8, 2006. Paper no. TEC-
00034-2006.
S. Kwak is with the School of Electronics, Daegu University, Daegu
702-701, Korea (e-mail: sskwak@ieee.org).
H. A. Toliyat is with the Advanced Electric Machine and Power Electron-
ics Laboratory, Department of Electrical Engineering, Texas A&M University,
College Station, TX 77843 USA (e-mail: toliyat@ee.tamu.edu).
Digital Object Identier 10.1109/TEC.2006.888018
applications, where continuous operation after system fault is
a key point [6]. Intelligent modulation methods for pulsewidth
modulated-voltage source inverters (PWM-VSIs) have been ex-
ploited to maintain the rotating magnetomotive force (MMF)
by reformulating the remaining output current references after
fault occurrence [6][8]. Given the remedial techniques, fault-
tolerant operation of the inverters can mitigate the effects of sud-
den inverter or motor failure on overall ASD systems. However,
approaches to fault-tolerant modulation algorithms for matrix
converter drives have not been presented in the literature.
This paper proposes a fault-tolerant strategy for the matrix-
converter-based drives against sudden failure occurring in either
the power converter or motor windings. The main thrust of this
contribution is concerned with a converter topology and a post-
fault control method of the matrix converter drives in faulty
situations. The faults, which can be tolerated by the proposed
solution, include opened switch faults, opened phase faults in
either internal or external converter such as motor winding open
circuit, and a short-circuit in a motor winding. In the event of
shorted motor winding in the slots or end turns due to insulation
breakdown, switches in the faulted phase are commanded to
turn off, leading to single-phase opened circuit. Following those
faults, the matrix converter structure is modied by isolating the
related phase and connecting a motor neutral to a supply neutral.
With the recongured structure, a remedial modulation strategy
based on the indirect modulation method is proposed to shape
two remaining output currents shifted by 60

phase with re-

spect to each other. The developed fault-tolerant control ensures
that the matrix converter drive can maintain the rotating MMF
and disturbance-free operation. The proposed technique, along
with only software modication, realizes the fault compensation
scheme without any additional backup leg as a hardware redun-
dancy. Thus, the proposed matrix converter drive can tolerate the
opened switch, opened phase faults, and shorted winding fail-
ures with least system cost increase associated with the neutral
connection. Simulation and experimental results are included
to support the feasibility of the proposed fault-tolerant PWM
modulation scheme.
II. FAULT-TOLERANT CONFIGURATION OF MATRIX
CONVERTER DRIVES
A. Normal Mode Conguration
Fig. 1(a) illustrates a three-phase matrix converter congu-
ration with a connecting device between a motor neutral and a
supply neutral. The connecting device TR
N
, such as a TRIACor
a pair of back-to-back thyristors, is used to modify the converter
structure after open-switch and open-phase fault occurrence. In
0885-8969/$20.00 2006 IEEE
856 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 22, NO. 4, DECEMBER 2007
Fig. 1. Fault-tolerant matrix converter drive. (a) Converter circuit. (b) Equiv-
alent model.
normal condition, the device is open, yielding no path between
the two neutrals. From the standpoint of the indirect modula-
tion method, the matrix converter is modeled as an equivalent
circuit in Fig. 1(b), which is decoupled into the rectier and the
inverter stage [2]. The modulation scheme in normal situations
constructs single, virtual dc-link voltage U
pn
through the rec-
tier stage. The inverter stage with the basis of the imaginary
dc-link voltage generates three-phase sinusoidal output voltages
and currents, phase displaced by 120

.
B. Fault Mode Conguration
In the PWM-VSI based drives, fault tolerance methods for
open-phase and open-switch losses include a neutral connec-
tion approach [7], a redundant leg concept [6], and a parallel
redundancy, where each phase is driven by an individual single-
phase inverter unit [9]. This paper addresses a fault-tolerant
solution based on the neutral connection for minimal increase
of switching devices, considering a number of switches of the
matrix converter structure. The fault-tolerant control has been
well established by regulating the two unfaulty phase currents
with the magnitude increased by a factor of

3 and phase shifted

by 30

away from the axis of the faulted phase [6][8]. The con-
sequent asymmetric two-phase currents maintain a circular ux
Fig. 2. Fault-tolerant scheme of PWM-VSI drives. (a) Current phasor diagram
before (I
A
, I
B
, and I
C
) and after (I
Af
and I
Bf
) C phase open fault. (b) Fault-
tolerant topology of the PWM-VSI.
trajectory and the rotating MMF, resulting in the disturbance-
free operation of the drives [7], [8]. For instance, the current
phasor diagram for the post-fault condition after phase-C fail-
ure is shown in Fig. 2(a). The phase currents in the normal
condition are denoted by I
A
, I
B
, and I
C
, while the currents af-
ter the phase-C failure are I
Af
and I
Bf
, respectively. Therefore,
the fault-tolerant control strategy requires the asymmetric two-
phase current regulation on the unfaulty phases, distributed with
60

phase shift with respect to each other [13]. In the PWM-

VSI conguration, the two-phase operation can be obtained by
connecting the neutral point of the motor to the midpoint of
the dc-link, which is created by two capacitors in Fig. 2(b).
The connecting device TR
N
is red to link the motor neu-
tral and the capacitor midpoint once a fault has been detected
[12]. Grounded on the two split dc-link sources, the PWM-VSI
provides two-phase control operation with the two remaining
unfaulty phases.
Because the matrix converter topology has no dc-link capaci-
tor, the motor neutral is connected to the supply neutral through
the connecting device TR
N
activated, in case of fault occur-
rence. In the case of an opened switch fault, open-phase fault,
or short-circuit fault in motor winding, the controller simply
commands all the switches in the faulted phase to turn off [14].
Thus, the faulty leg is electrically isolated fromthe drive in order
to eliminate its inuence over the drive behavior. Furthermore,
the connecting device TR
N
is triggered on to interconnect the
motor neutral to the supply neutral, leading to an asymmetric
two-phase structure. Note that the matrix converter assumes no
KWAK AND TOLIYAT: AN APPROACH TO FAULT-TOLERANT CONVERTER DRIVES 857
Fig. 3. Topology after phase C loss. (a) Matrix converter. (b) Equivalent
model.
path through the antiparallel diodes as in the inverter. Thus, dis-
abling bidirectional switches of the matrix converter can entirely
disconnect the faulty phase associated with a single switch open-
circuit or shorted winding faults. This implies that fault-tolerant
operation of the matrix converter, with a single switch opened,
has no limitation on peak line-to-line back-emf and speed of
the motor [6]. In the event of a fault in phase C, for example,
a modied matrix converter structure is obtained with isolation
of the faulty C leg and interconnection of the neutral points, as
shown in Fig. 3(a). The corresponding equivalent model con-
trolled with the indirect modulation technique is also depicted
in Fig. 3(b).
It should be noted that the inverter stage of the equivalent
circuit in Fig. 3(b) must be supplied by two split dc-link sources
to operate the two remaining phases with the asymmetric two-
phase operation, like the PWM-VSI-based topology. Therefore,
the rectier stage must construct two equal imaginary dc-link
voltages with respect to the supply neutral in the ctitious dc-
link. Then, the inverter stage can perform SVPWM method for
the two-phase control based on the two dc-link voltages. In this
paper, the fault-tolerant strategy is investigated considering the
failures in the phase C. The same approach is valid for the faults
in the phases A and B.
III. PROPOSED MODULATION STRATEGY FOR
FAULT-TOLERANT MATRIX CONVERTER
A. PWM Strategy for Rectier Stage
The main objective of the PWM modulation strategy in the
rectier stage is to create two virtual split dc-link voltages with
Fig. 4. Rectier stage model for fault-tolerant strategy.
equal amplitude in the ctitious dc-link, so that the two-phase
operation can be performed in the inverter stage. The midpoint
of the two virtual dc voltages should be connected to the motor
neutral like the PWM-VSI structure. As a result, the ctitious
dc-link of the matrix converter has imaginary neutral potential,
which is virtually linked to the supply and motor neutrals. This
is illustrated in Fig. 4 with two conceptual split capacitors, with
the midpoint connected to the supply neutral. From Fig. 4, it is
seen that the two virtual voltages with equal magnitude need to
be constructed in the ctitious dc-link as
U
po
= U
no
. (1)
Thus, the switches in the rectier stage are modulated to generate
the two dc-rail voltages (U
p
and U
n
) with equal amplitudes and
opposite polarities with respect to the supply neutral.
The input phase voltages are assumed a three-phase balanced
set and written as

V
a
(t)
V
b
(t)
V
c
(t)

V
im
cos (
i
t)
V
im
cos (
i
t 2/3)
V
im
cos (
i
t + 2/3)

(2)
where, V
im
and
i
are the amplitude and the angular frequency
of the input voltage, respectively. For deriving the modulation
scheme in the rectier stage, the input phase voltages are sorted
depending on their absolute magnitudes and assigned as
U
max
= MAX[|V
a
| , |V
b
| , |V
c
|]
U
mid
= MID[|V
a
| , |V
b
| , |V
c
|]
U
min
= MIN[|V
a
| , |V
b
| , |V
c
|] . (3)
Based on the specied denition, a balanced three-phase sup-
ply system in (2) leads to twelve 30

sectors in which none of

the input phase voltages change their assignments. The dened
sectors are shown in Fig. 5 with the rearranged voltages. Con-
sidering the supply voltage polarities, the 12 rectier sectors can
fall into two possible categories, where modulation scheme of
the rectier stage can be generalized.
1) SectorX
i
(i = 1, 2, . . . , 6): One input voltage is positive
and two are negative.
858 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 22, NO. 4, DECEMBER 2007
Fig. 5. Sector denition and two virtual dc-link voltages in rectier stage.
In these sectors, one positive input voltage is assigned to
U
max
, and two negative input phase voltages correspond to U
mid
and U
min
. The rules of switch control in this category are as
follows.
r
The lower switch of the leg assigned to U
mid
remains in
conducting state.
r
The two upper switches of the two legs connected to U
max
and U
min
are modulated.
r
All other switches are turned off.
For instance, in the rectier sector X
1
, the input voltages
on the phase A, C, and B are designated as U
max
, U
mid
, and
U
min
, respectively. The lower switch of the phase C, S
cl
stays
on during the entire sector X
1
. Thus, the voltage on the negative
dc-link rail with respect to the supply neutral is given by
U
no
= V
c
. (4)
In the meantime, the two upper switches of the phase A and
B, S
au
and S
bu
, are modulated to create the proper voltage
on the positive dc-link rail from the input voltages V
a
and V
b
,
respectively. The local-average voltage in the positive dc-link
rail with respect to the supply neutral is written by
U
po
= d

V
a
+d

V
b
(5)
where d

and d

are the duty cycles of the modulating switches

related to U
max
and U
min
, respectively. Accordingly, in the
rectier sector X
1
, d

and d

correspond to the duty ratios of

S
au
and S
bu
, respectively. The duty cycles of the modulation
switches are constrained by
d

+d

= 1. (6)
The modulation functions of the switches S
au
and S
bu
are
determined to synthesize the two equal split dc-link voltages.
Substituting (2), (4), (5), and (6) into (1), the duty cycle d

can
be obtained by
d

=
cos
i

3 cos (
i
+

6
)
(7)
where
i
=
i
t. All other switches are turned off. The local-
average values of U
po
and U
no
in this rectier sector are
U
po
= V
c
U
no
= V
c
. (8)
2) SectorY
i
(i = 1, 2, . . . , 6): Two input voltages are positive
and one is negative.
TABLE I
CONDUCTION SWITCHES AND DUTY CYCLE VALUES OF RECTIFIER STAGE
One negative input voltage becomes U
max
, and two positive
voltages correspond to U
mid
and U
min
in this category. The
switching rules here are as follows.
r
The upper switch of the leg connected to U
mid
maintains
on state.
r
The two lower switches of the two legs associated with
U
max
and U
min
are modulated.
r
As before, all other switches remain at open state.
In the rectier sector Y
1
, as an example, the input phase
voltages V
c
, V
a
, and V
b
correspond to U
max
, U
mid
, and U
min
,
respectively. The upper switch of phase A, S
au
, maintains the
on state. As a result, the positive dc-link rail voltage with respect
to the supply neutral is given by
U
po
= V
a
. (9)
On the other hand, the lower switches connected to the voltages
U
max
and U
min
, S
cl
and S
bl
, respectively, are modulated to
construct the local-average voltage on the negative dc-link rail
given by
U
no
= d

V
c
+d

V
b
. (10)
Here again, d

and d

are the duty cycles of the modulating

switches related to U
max
and U
min
, respectively. The duty cycle
of d

is likewise calculated by (1), (2), (6), (9), and (10) as

d

=
cos (
i


3
)

3 cos (
i


2
)
. (11)
The local-average values of the two dc voltages U
po
and U
no
are given by
U
po
= V
a
U
no
= V
a
. (12)
Based on the above approach, the modulating switches and
their duty cycles can be obtained in all the rectier sectors. The
on switches, the modulation switches, and the duty cycle values
are summarized in Table I for the rst-half sectors. Depending on
which rectier sector is enabled, duty cycles of the modulating
switches are determined as a function of the instantaneous input
voltage angle. The local-average values of the two virtual dc-link
voltages can be nally expressed as
U
po
= U
mid
U
no
= U
mid
. (13)
KWAK AND TOLIYAT: AN APPROACH TO FAULT-TOLERANT CONVERTER DRIVES 859
Fig. 6. Equivalent circuit of inverter stage.
TABLE II
SWITCHING COMBINATION AND BASIS VECTORS IN INVERTER STAGE
Therefore, the proposed PWM modulation scheme in the rec-
tier stage builds the two virtual dc-link voltages with equal
amplitude, U
mid
, in the ctitious dc-link.
B. PWM Strategy for Inverter Stage
Based on the rectier stage operation, the inverter stage can
be modeled as a four-switch inverter conguration supplying
two-winding machines with the motor neutral connected to the
ctitious dc-link midpoint. Fig. 6 illustrates the equivalent cir-
cuit of the inverter stage with the imaginary dc-link voltages
created by the rectier stage. Therefore, conventional space
vector modulations used for two-phase machine controls can
be applied to the inverter stage [10].
The space vector modulation technique is implemented on
basis of the stationary reference frame using the transforma-
tion equation as

x
0

2
3

1
1
2

1
2
0

3
2

3
2
1

2
1

2
1

x
A
x
B
x
C

. (14)
The quantity x can be either output voltage or output current
vector. The switching functions of the upper switches S
AU
and
S
BU
take on binary values 1 and 0 in a closed state and an
open state, respectively. The lower switches S
AL
and S
BL
have
the complementary value of their upper switches. Four possible
combinations of the switching status generate four different ba-
sis vectors in the plane, as illustrated in Table II. The space
vector diagramin the plane, which is split into two sectors, is
shown in Fig. 7. The effect of zero-sequence voltage component
v
0
on the space vector analysis is assumed negligible, because
the zero-sequence circuit consists of a very small impedance
with no speedvoltage term in typical ac machines [6].
The desired voltage vector V

out
is synthesized by impressing
the three basis vectors during the required time intervals within
one sampling length T
s
. In the inverter sector 1, the reference
Fig. 7. Space vector diagram for PWM strategy in inverter stage.
Fig. 8. PWM switching sequence for fault-tolerant matrix converter.
voltage vector is composed of weighted time averages of the
vectors V
1
, V
2
, and V
3
as
V

out
T
s
= V
1
t

+V
2
t

+V
3
t
0
. (15)
The time weights of the basis vectors are restricted by
T
s
= t

+t

+t
0
. (16)
The duty cycles are given by [10]
d

=
t

T
s
=

2
3
K

2V

+

3U
mid

=
t

T
s
= K

3V

d
0
=
t
0
T
s
= 1 d

, where K =
1
2

2U
mid
. (17)
In sector 2, the basic vectors V
3
, V
4
, and V
1
, likewise, are
employed to create the reference output voltage.
C. Entire Matrix Converter Modulation
The modulation schemes derived for the rectier and the in-
verter stages in the previous sections are combined to generate
the switching patterns for the matrix converter in Fig. 3(a).
Based on switching signals dedicated in the equivalent circuit,
the complete matrix converter modulation is obtained by mul-
tiplying the corresponding duty cycles of the rectier and the
inverter stages. The duty cycles of the matrix converter can be
860 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 22, NO. 4, DECEMBER 2007
TABLE III
SWITCHING STATES AND DUTY CYCLES OF MATRIX CONVERTER AFTER PHASE-C FAILURE
given by
d

= d

(d

/2), d

= d

(d

/2)
d

= d

(d

/2), d

= d

(d

/2)
d
0
= 1 (d

+d

+d

+d

). (18)
The switching sequence of the complete matrix converter,
as shown in Fig. 8, assures proper operation of the complete
matrix converter from the rectier stage and the inverter stage.
It is seen that one switching sequence is realized with six-step
transition over one sampling period. A specic set of switching
combinations is selected, depending on which operating mode
is enabled. The matrix converter in the fault mode can assume
24 operating modes, since the rectier and the inverter stages
contain 12 and 2 sectors, respectively. Table III describes the
duty cycles and the corresponding switching states for two op-
erating modes with the rectier sector X
1
activated. Note that
the transition from d
0
to d
0
in the inverter sectors 1 and 2 re-
quires two and zero switching-state commutations, respectively.
Besides the transition, the switching sequence ensures that one
switching-state commutation is required for one sequence tran-
sition. This implies that the requested switching number over
one sampling period is, on the average, equal to six for real-
izing the complete PWM sequence of the matrix converter. It
should be noted that the switch output commands for the pro-
posed remedial technique are assigned exactly same as ones for
the normal mode control. As a result, the proposed technique
can be embedded into the existing matrix converter software as
a subroutine. In addition, the proposed fault-tolerant algorithm
does not need modication of the control hardware.
IV. SIMULATION RESULT
The proposed fault-tolerant algorithm has been simulated
with three-phase balanced RL load (5 and 10 mH) and
300-V/60-Hz utility. The switching frequency and the output
frequency were chosen to be 5 kHz and 75 Hz, respectively.
Fig. 9 shows the output waveforms at normal mode operation.
The output currents by the normal mode control generate a three-
phase balanced sinusoidal set with 120

phase shift with respect

to each other. The transformed currents in the axis have si-
nusoidal waveforms with 90

phase angle. The proposed matrix

Fig. 9. Waveforms in normal mode. (a) Output currents. (b) Output line-to-line
voltage. (c) Transformed currents.
Fig. 10. Waveforms in fault mode at the phase C. (a) Output currents.
(b) Output line-to-line voltage. (c) Transformed currents.
converter operation in the fault mode is illustrated in Fig. 10, in
case of phase-C fault condition. It is seen that the output currents
in the two remaining healthy phases, I
A
and I
B
, are regulated
with a sinusoidal form with a phase displacement of 60

. The
phase-C output current I
C
is zero. The current components,
expressed in the stationary reference frame, do not have to be
affected by the faults, since the transformed currents are
pertinent to the torque and ux [8]. Therefore, the currents
KWAK AND TOLIYAT: AN APPROACH TO FAULT-TOLERANT CONVERTER DRIVES 861
Fig. 11. Transient waveforms during the faults on phase C. (a) Fault signal.
(b) Output currents. (c) Output line-to-line voltage. (d) Neutral current.
transformed from the two remaining healthy phase currents still
produce sinusoidal waveforms with 90

phase shift, as in the

normal mode operation [8]. Fig. 11 shows transient waveforms
of the matrix converter from the normal to the fault mode of
the phase-C faults. With the fault signal of the C phase, the C
phase is promptly disconnected from the overall circuit, and the
motor neutral is connected to the supply neutral by ring the
connecting device. Consequently, the output current I
C
drops
to zero. Following the fault, the proposed PWM strategy for the
fault mode is initiated to control two remaining phase currents,
I
A
and I
B
. It is illustrated that the output phase currents on
healthy phases are sinusoidal with the magnitude increased by a
factor of

3 and 60

phase shift with respect to each other. The

neutral current equal to the sum of I
A
and I
B
begins to ow
with the neutral connection due to the asymmetrical two-phase
structure.
V. EXPERIMENTAL RESULT
To validate the proposed control algorithm for the fault-
tolerant matrix converter, the prototype of the matrix converter
was developed in the laboratory. Fig. 12 depicts a functional
block diagramand a laboratory prototype of the matrix converter
setup. The setup is composed of a digital signal processor (DSP)
board (TMS320LF2407), a eld-programmable gate array
(FPGA) board (Altera EPM7128S), six isolated power supplies,
gate drivers, an analog board containing current sensors and
sign detection circuits for the four-step commutation, and a ma-
trix converter module (Eupec FM35R12KE3) with 18 insulated
gate bipolar transistors (IGBTs). The control algorithms for the
normal and the fault-mode operations have been realized on the
DSP board. The complete gate signal commands of the matrix
converter are generated by the DSP board with the aid of the
FPGA board for four-step commutation. A general-purpose,
three-phase induction motor was connected to the matrix
converter.
Fig. 13 illustrates the experimental results of the output cur-
rents and voltage measured on the prototype matrix converter
Fig. 12. Experimental setup. (a) Functional block diagram. (b) Laboratory
prototype.
Fig. 13. Normal mode operation. (a) Output currents (1 A/div, 5 ms/div).
(b) Output voltage (50 V/div, 5 ms/div).
862 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 22, NO. 4, DECEMBER 2007
Fig. 14. Fault mode operation. (a) Output currents (1 A/div, 5 ms/div).
(b) Output voltage (50 V/div, 5 ms/div).
Fig. 15. Transient waveforms during the fault occurrence on phase C.
Trace 1Phase A current, I
A
= 0.5 A/div. Trace 2Phase B current,
I
B
= 0.5 A/div. Trace 3Phase C current, I
C
= 0.5 A/div. Trace 4Fault
detection signal (0: normal mode, 1: fault mode).
working in the normal mode. In the experiment, the matrix con-
verter was operated with 3-kHz switching frequency and 45-Hz
output frequency. The sinusoidal output currents are regulated
with 120

phase shift with respect to each other. Two output

phase currents and line-to-line voltage are illustrated in Fig. 14
with the proposed fault-tolerant operation. It is seen that the two
healthy phase currents are controlled with sinusoidal shape with
60

phase displacement angle with respect to each other. The

transient response is shown in Fig. 15 from the normal mode to
the fault mode in which the output phase C is open-circuited.
During the test, the fault occurrence on the C-phase was em-
ulated by forcing the active state of the digital input. Several
methods are available to detect open-circuit type faults based
on the measurement of voltages, where the phase voltages af-
ter the fault occurrence result in errors in the phase voltages in
comparison to the normal operation. This comparison algorithm
for open-circuit faults can be employed in the matrix converter
drives [11]. Following the fault, which occurs with the fault de-
tection signal, the output phase C is open-circuited by disabling
the gate commands of the phase-C switches. Thus, the current
I
C
drops to zero. The two remaining currents in the phase A
and B, I
A
and I
B
, become sinusoidal with increased magnitudes
and 60

phase displacement by the fault-tolerant control.

VI. CONCLUSION
This paper proposes a PWM modulation strategy for fault-
tolerant operation of the matrix-converter-based drives against
opened switch, opened phase faults, and shorted winding fail-
ures. After isolating the faulted phase and connecting the neu-
trals, the proposed modulation control makes it possible to keep
continuous operation by regulating the two remaining currents
shifted by 60

with respect to each other. The proposed fault

compensation strategy is achieved with no hardware modi-
cation in the converter structure, as well as no redundant
backup legs and no parallel redundancy. Thus, the proposed
fault-tolerant control can improve the reliability of the matrix
converter drives with minimal cost increase associated with the
motor-neutral connection. It should be noted that the input cur-
rents are not sinusoidal during the fault mode operation due to
the asymmetric two-phase operation. Because the fault opera-
tion implies an emergency operating condition, the input current
quality is assumed a secondary concern. Furthermore, the ma-
trix converter drives under faults are usually intended to operate
for a short time period, necessary for the maintenance schedule.
Simulation and experimental results have been shown to verify
the proposed modulation method for improving the reliability
of the three-phase matrix converter drives.
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Sangshin Kwak (S02M05) received the B.S. and
M.S. degrees in electronics engineering from Kyung-
pook National University, Daegu, Korea, in 1997 and
1999, respectively, and the Ph.D. degree in electrical
engineering from Texas A&M University, College
Station, in 2005.
From 1999 to 2000, he was a Research Engineer
at LG Electronics, Changwon, Korea. He was with
the Whirlpool R&D Center, Benton Harbor, MI, in
2004. Since 2005 to 2007, he was a Senior Research
Engineer in Samsung SDI R&D Center, Yongin,
Gyeong-gi, Korea. Since 2007, he has been an assistant professor at Daegu
University, Daegu, Korea. His research interests include topology design, mod-
eling, control, and analysis of ac/dc, dc/ac, and ac/ac power converters as well
as DSP-based power electronics control.
Hamid A. Toliyat (S87M91SM96) received the
B.S. degree from Sharif University of Technology,
Tehran, Iran, in 1982, the M.S. degree fromWest Vir-
ginia University, Morgantown, in 1986, and the Ph.D.
degree from the University of Wisconsin, Madison,
in 1991, in electrical engineering.
He was an Assistant Professor of electrical
engineering at Ferdowsi University of Mashhad,
Mashhad, Iran. Since 1994, he has been with the
Department of Electrical and Computer Engineering,
Texas A&M University, College Station. His main
research interests and experience include analysis and design of electrical ma-
chines, variable speed drives for traction and propulsion applications, fault
diagnosis of electric machinery, and sensorless variable speed drives. He has
supervised more than 35 graduate students, raised over $3.5 million in research
funding, and presented more than 35 invited lectures all over the world. He has
authored or coauthored over 290 technical papers, and is a holder of ten issued
and pending U.S. patents. He is the author of DSP-Based Electromechanical
Motion Control, (Boca Raton, FL: CRC, 2003) and the Co-Editor of the Hand-
book of Electric Motors, 2nd ed., (Boca Raton, FL: CRC, 2004).
Dr. Toliyat is an Editor of the IEEE TRANSACTIONS ON ENERGY CONVER-
SION, and was an Associate Editor of the IEEE TRANSACTIONS ON POWER
ELECTRONICS. He is also the Vice Chair-Papers, IEEE-IAS Industrial Power
Conversion Systems Department of IEEE-IAS Electric Machines Committee,
and is a member of Sigma Xi. He is a senior member of the Power Engi-
neering, Industrial Applications, Industrial Electronics Societies of the IEEE.
He received the prestigious Cyrill Veinott Award in Electromechanical Energy
Conversion from the IEEE Power Engineering Society in 2004, the Outstanding
Professor Award from Texas A&M in 2005, the TEES Fellow Award in 2004,
the Distinguished Teaching Award in 2003, the E.D. Brockett Professorship
Award in 2002, the Eugene Webb Faculty Fellow Award in 2000, and the Texas
A&M Select Young Investigator Award in 1999 from Texas A&M University.
He also received the Space Act Award from NASA in 1999, the 1996 IEEE
Power Engineering Society Prize Paper Award, the Schlumberger Foundation
Technical Awards in 2001 and 2000, and the 2006 IEEE Industry Applications
Society Transactions Third Prize Paper Award. He was the General Chair of
the 2005 IEEE International Electric Machines and Drives Conference in San
Antonio, TX. He is a Profesional Engineer in the state of Texas.