Saves Our Economy and Meet The Needs" Is The Saturation

HYBRID SOLAR CAR
CHAPTER 1
1.1 INTRODUCTION:
There are so many vehicles that came to influence in the existing world.
Their operating systems are based on the usual fossil fuel system. At the
present sense the fossil fuel can exceed only for a certain period after that we
have to go for a change to other methods. Thus we have made an attempt to
design and fabricate an ultimate system (Hybrid Solar Car) which would
produce effective result than the existing system. This will be very useful to
the future needs of the world. In by the end of 2020, fuel deposit in the world
completely depleted.
All vehicles that are in the market cause pollution and the fuel cost is also
increasing day by day. In order to compensate the fluctuating fuel cost and the
pollution less good remedy is needed i.e. our transporting system. Our vehicle
is easy to handle and no fuel cost to the other existing vehicles. For the last
two decades the judiciary and policy makers all over the world are deeply
concerned about the urgent need for protection of the environment, ecology
and humanity at large, there has been a steep rise in the accumulation of
greenhouse gases particularly CO₂, which affect global changes in weather.
Motor vehicle contributes about 14% of CO₂ from all sources besides,
pollution due to both petrol and diesel engine driven vehicles caused by the
emission of CO, no unburnt hydrocarbons, particulate and oxides of tetraethyl,
Lead are injurious to health and the environment. Vehicle manufactures have
been hence obliged to meet these standards by designing cleaner and fuel
efficient engines and through provision for treatment of exhaust gases to
satisfy the specified limits. Hence here we designed and fabricated such an
alternative system. So this project “HYBRID SOLAR CAR” is very much
useful, since it is provided with good quality of power sources and simple
operating mechanism. Hence “EACH AND EVERY DROP OF FUEL
SAVES OUR ECONOMY AND MEET THE NEEDS” is the saturation
point that is to be attained as soon as possible.
Dept. of ECE, TKRCET. Page 1

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CHAPTER 2
SCOPE OF PROJECT AND PROPOSED APPROACH
2.1 DESCRIPTION OF BLOCK DIAGRAM:
Fig 2.1: Block diagram of Hybrid Solar Car
2.1.1 SOLAR PANEL:

Solar panels absorb the sunlight as a source of energy to
generate electricity or heat.
A photovoltaic (PV) module is a packaged, connect assembly of
typically 6x10 photovoltaic solar cells. Photovoltaic modules constitute
the photovoltaic array of a photovoltaic system that generates and
supplies solar electricity in commercial and residential applications. Each
module is rated by its DC output power under standard test conditions
(STC).
Photovoltaic modules use light energy (photons) from the Sun to

generate electricity through the photovoltaic effect. The majority of
modules use wafer-based crystalline silicon cells or thin-film cells. The
structural (load carrying) member of a module can either be the top layer
or the back layer. Cells must also be protected from mechanical damage
and moisture. Most modules are rigid, but semi-flexible ones are

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available, based on thin-film cells. The cells must be connected

electrically in series, one to another. Externally, most of photovoltaic
modules use MC4 connector’s type to facilitate easy weatherproof
connections to the rest of the system.
2.1.2 BATTERIES:
A rechargeable battery, storage battery, secondary cell,

or accumulator is a type of electrical battery which can be charged,
discharged into a load, and recharged many times, while a non-
rechargeable or primary battery is supplied fully charged, and discarded
once discharged.
Rechargeable batteries are produced in many different shapes and

sizes, ranging from button cells to megawatt systems connected
to stabilize an electrical distribution network. Several different
combinations of electrode materials and electrolytes are used,
including lead–acid, nickel cadmium (NiCd), nickel metal
hydride (NiMH), lithium ion (Li-ion), and lithium ion polymer(Li-ion
polymer).
Rechargeable batteries typically initially cost more

than disposable batteries, but have a much lower total cost of
ownership and environmental impact, as they can be recharged
inexpensively many times before they need replacing. Some rechargeable
battery types are available in the same sizes and voltages as disposable
types, and can be used interchangeably with them.
2.1.3 MICROCONTROLLER:
The major heart of this project is AT89S52

microcontroller, the reasons why we selected this in our project are: It is a
high performance, low-power Atmel 8-bit Microcontroller with 8Kbytes
of In-System RAM 32 I/O lines, three 16-bit timer/counters, a eight-
vector two-level interrupt 1.5CM concept where gears reduce the speed of
the vehicle but increase its torque is known as gear reduction.This Insight

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will explore all the minor and major details that make the gear head and
hence the working of geared DC motor.
2.1.4 MOTOR DRIVERS:
L293D is a typical Motor driver or Motor Driver IC which allows
DC motor to drive on either direction. L293D is a 16-pin IC which can
control a set of two DC motors simultaneously in any direction. It means
that you can control two DC motor with a single. Dual H-bridge Motor
Driver integrated circuit (IC).
H-bridge is a circuit which allows the voltage to be flown in either
direction. As you know voltage need to change its direction for being able
to rotate the motor in clockwise or anticlockwise direction, Hence H-
bridge IC are ideal for driving a DC motor
2.1.5 DC MOTORS:
A DC motor is any of a class of rotary electrical machines that
converts direct current electrical energy into mechanical energy. The most
common types rely on the forces produced by magnetic fields. Nearly all
types of DC motors have some internal mechanism, either
electromechanical or electronic, to periodically change the direction of
current flow in part of the motor.
2.2 SCHEMATIC DIAGRAM:
Fig 2.2: Schematic diagram of the project

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CHAPTER 3
HARDWARE COMPONENT DESCRIPTION:
3.1 HARDWARE COMPONENTS USED:
 Solar Panels
 Batteries
 Microcontroller
 Motor driver
 DC motor
 Chassis
 Wires
 Wheels
 General Board (Vero board)
3.2 HARDWARE COMPONENTS EXPLANATION:
3.2.1 SOLAR PANELS:
Solar panels absorb the sunlight as a source of energy to
generate electricity or heat. A photovoltaic (PV) module is a packaged,
connect assembly of typically 6x10 photovoltaic solar cells. Photovoltaic
modules constitute the photovoltaic array of a photovoltaic system that
generates and supplies solar electricity in commercial and residential
applications. Each module is rated by its DC output power under standard
test conditions (STC).
There are a few commercially available solar modules that exceed
efficiency of 22% and reportedly also exceeding 24%. A single solar
module can produce only a limited amount of power; most installations
contain multiple modules. A photovoltaic system typically includes an
array of photovoltaic modules, an inverter, a battery pack for storage,
interconnection wiring, and optionally a solar tracking mechanism. The
most common application of solar panels is solar water heating systems.
The price of solar power has continued to fall so that in many countries it
is cheaper than ordinary fossil fuel electricity from the grid.

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Fig 3.2.1: Solar Panel
3.2.2 Theory and construction:

modules use MC4 connectors type to facilitate easy weatherproof
modules use MC4 connector’s type to facilitate easy weatherproof

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Modules electrical connections are made in series to achieve a

desired output voltage and/or in parallel to provide a desired current
capability. The conducting wires that take the current off the modules
may contain silver, copper or other non-magnetic conductive transition
metals. Bypass diodes may be incorporated or used externally, in case of
partial module shading, to maximize the output of module sections still
illuminated. Some special solar PV modules include concentrators in
which light is focused by lenses or mirrors onto smaller cells. This
enables the use of cells with a high cost per unit area (such as gallium
arsenide) in a cost-effective way.
Currently the best achieved sunlight conversion rate (solar module

efficiency) is around 21.5% in new commercial product typically lower
than the efficiencies of their cells in isolation. The most efficient mass-
produced solar modules have power density values of up to 175
W/m2 (16.22 W/ft2).
3.2.3 Efficiencies:
Depending on construction, photovoltaic modules can produce

electricity from a range of frequencies of light, but usually cannot cover
the entire solar range (specifically, ultraviolet, infrared and low or
diffused light). Hence, much of the incident sunlight energy is wasted by
solar modules, and they can give far higher efficiencies if illuminated
with monochromatic light. This has been projected to be capable of
raising efficiency by 50%. Scientists from Spectrolab, a subsidiary
of Boeing, have reported development of multi-junction solar cells with
an efficiency of more than 40%, a new world record for solar
photovoltaic cells. The Spectrolab scientists also predict that concentrator
solar cells could achieve efficiencies of more than 45% or even 50% in
the future, with theoretical efficiencies being about 58% in cells with
more than three junctions.

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3.3 BATTERIES:
A rechargeable battery, storage battery, secondary cell,

or accumulator is a type of electrical battery which can be charged,
discharged into a load, and recharged many times, while a non-
rechargeable or primary battery is supplied fully charged, and discarded
once discharged. It is composed of one or more electrochemical cells. The
term "accumulator" is used as it accumulates and energy through a
reversible electrochemical reaction.
Rechargeable batteries are produced in many different shapes and

sizes, ranging from button cells to megawatt systems connected
to stabilize an electrical distribution network. Several different
combinations of electrode materials and electrolytes are used,
including leadacid, nickelcadmium (NiCd), nickelmetalhydride (NiMH), lit
hium ion (Li-ion), and lithium ion polymer(Li-ion polymer).Rechargeable
batteries typically initially cost more than disposable batteries, but have a
much lower total cost of ownership and environmental impact, as they can
be recharged inexpensively many times before they need replacing. Some
rechargeable battery types are available in the same sizes and voltages as
disposable types, and can be used interchangeably with them.
Fig 3.3: Rechargeable batteries
3.3.1 Usage and applications of battery:
Devices which use rechargeable batteries include automobile

starters, portable consumer devices, light vehicles (such as motorized
wheelchairs, golf carts, electric bicycles, and electric forklifts),

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tools, uninterruptible power supplies, and battery storage power stations.

Emerging applications in hybrid internal combustion-battery and electric
vehicles drive the technology to reduce cost, weight, and size, and
increase lifetime.
Older rechargeable batteries self-discharge relatively rapidly, and

require charging before first use; some newer low self-discharge NiMH
batteries hold their charge for many months, and are typically sold
factory-charged to about 70% of their rated capacity.
3.3.2 Charging and discharging:
During charging, the positive active material is oxidized,

producing electrons, and the negative material is reduced, consuming
electrons. These electrons constitute the current flow in the
external circuit. The energy used to charge rechargeable batteries usually
comes from a battery charger using AC mains electricity, although some
are equipped to use a vehicle's 12-volt DC power outlet. Regardless, to
store energy in a secondary cell, it has to be connected to a DC voltage
source. The negative terminal of the cell has to be connected to the
negative terminal of the voltage source and the positive terminal of the
voltage source with the positive terminal of the battery.
Chargers take from a few minutes to several hours to charge a

battery. Slow "dumb" chargers without voltage or temperature-sensing
capabilities will charge at a low rate, typically taking 14 hours or more to
reach a full charge. Rapid chargers can typically charge cells in two to
five hours, depending on the model, with the fastest taking as little as
fifteen minutes. Fast chargers must have multiple ways of detecting when
a cell reaches full charge (change in terminal voltage, temperature, etc.) to
stop charging before harmful overcharging or overheating occurs
Matching a charger to the battery it is to charge is important, but not
always obvious to an end user. Some charger manufacturers claim they
are compatible with batteries that they are not; caution is required.

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3.4 MICROCONTROLLER:
Microcontroller is a true computer on a chip. The design
incorporates all the features found in a microprocessor CPU: arithmetic
and logic unit, stack pointer, program counter and registers. It was also
added with some additional features like RAM, ROM, serial I/O, counters
and clock circuit. Like the microprocessor, a microcontroller is a general
purpose device, but one that is meant to read data, perform limited
calculations on that data and control its environment based those
calculations.
The prime use of a microcontroller is to control the operation of a
machine using a fixed program that is stored in ROM and that does not
change over the lifetime of the system. The design approach of a
microcontroller uses a more limited set of single byte and double byte
instructions that are used to move code and data from internal memory to
ALU. Many instructions are coupled with pins on the IC package; the
pins are capable of having several different functions depending on the
wishes of the programmer. The microcontroller is concerned with getting
the data from and on to its own pins; the architecture and instruction set
are optimized to handle data in bit and byte size.
Fig 3.4: AT89S52 IC

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3.4.1 INTRODUCTION TO MICROCONTROLLER (AT89S52):

The AT89S52 is a low-power, high-performance CMOS 8-bit
microcontroller with 8K bytes of in-system programmable Flash memory.
The device is manufactured using Atmel’s high-density non-volatile
memory technology and is compatible with the Industry standard 80C51
instruction set and pin out. The on-chip Flash allows the program memory
to be reprogrammed in-system or by a conventional non-volatile memory
programmer. By combining a versatile 8-bit CPU with in-system
programmable Flash on a monolithic chip, the Atmel’s AT89S52 is a
powerful microcontroller which provides a highly-flexible and cost-
effective solution to many embedded control application.
3.4.2 FEATURES:
 Compatible with MCS-51 Products
 8K Bytes of In-System Programmable (ISP) Flash Memory – Endurance:
 1000 write/Erase Cycles
 4.0V to 5.5V Operating Range, Fully Static Operation: 0 Hz to 33 MHz
 256 x 8-bit Internal RAM
 32 Programmable I/O Lines
 Three 16-bit Timer/Counters
 Eight Interrupt Sources, Three-level Program Memory Lock
 Full Duplex UART (Universal Asynchronous Receiver Transmitter) Serial
Channel
 Low-power Idle and Power-down Modes
 Interrupt Recovery from Power-down Mode
 Dual Data Pointer
 Power-off Flag
 Fast Programming Time
 Flexible In System Programming (Byte and Page Mode).

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3.4.3 PIN DIAGRAM:
Fig 3.4.3: Pin Diagram of AT89S52

PIN DESCRIPTION:
VCC: Supply voltage
GND: ground.
PORT 0:
Port 0 is an 8-bit open drain bidirectional I/O port. As an output
port, each pin can sink eight TTL inputs. When 1s are written to port 0
pins, the pins can be used as high-impedance inputs. Port 0 can also be
configured to be the multiplexed low-order address/data bus during
accesses to external program and data memory. In this mode, P0 has
internal pull-ups. Port 0 also receives the code bytes during Flash
programming and outputs the code bytes during program verification.
External pull-ups are required during program verification.
PORT 1:
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The
Port 1 output buffers can sink/source four TTL inputs. When 1s are
written to Port 1 pins, they are pulled high by the internal pull-ups and
can be used as inputs. As inputs, Port 1 pins that are externally being
pulled low will source current (IIL) because of the internal pull-ups. In
addition, P1.0 and P1.1 can be configured to be the timer/counter 2
external count input (P1.0/T2) and the timer/counter 2 trigger input
(P1.1/T2EX), respectively, as shown in the following table:
PORT PIN ALTERNATE FUNCTIONS
P1.0 T2 (external count input to Timer/Counter 2),
clock-out

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P1.1 T2EX (Timer/Counter 2 capture/reload trigger and

direction control)
P1.5 MOSI (used for In-System Programming)
P1.6 MISO (used for In-System Programming)
P1.7 SCK (used for In-System Programming)
PORT 2:
pulled low will source current (IIL) because of the internal pull-ups. Port
2 emits the high-order address byte during fetches from external program
memory and during accesses to external data memory that uses 16-bit
addresses (MOVX @ DPTR).
PORT 3:
pulled low will source current (IIL) because of the pull-ups.
Port 3 receives some control signals for Flash programming and
verification. Port 3 also serves the functions of various special features of
the AT89S52, as shown in the following table
P3.0 – RXD (serial input port)
P3.1 - TXD (serial output port)
P3.2 – INT0 (external interrupt 0)
P3.3 – INT1 (external interrupt 1)
P3.4 – T0 (timer 0 external input)
P3.5 – T1 (timer 1 external input)
P3.6 – WR (external data memory write strobe)
P3.7 – RD (external data memory read strobe)
Port 3 also receives some control signals for Flash programming and
verification.

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RST: Reset input.

A high on this pin for two machine cycles while the oscillator is
running resets the device. This pin drives high for 96 oscillator periods
after the watch dog times out.
ALE/PROG:
Address Latch Enable is an output pulse for latching the low byte
of the address during accesses to external memory. This pin is also the
program pulse input (PROG) during programming.
In normal operation, ALE is emitted at a constant rate of 1/6th the
oscillator frequency and may be used for external timing or clocking
purposes. Note, however, that one ALE pulse is skipped during each
access to external data memory.
PSEN:
Program Store Enable is the read strobe to external program
memory. When the AT89S52 is executing code from external program
memory, PSEN is activated twice each machine cycle, except that two
PSEN activations are skipped during each access to external data
memory.
EA/VPP:
External Access Enable(EA) must be strapped to GND in order to
enable the device to fetch code from external program memory locations
starting at 0000H up to FFFFH.
However that if lock bit 1 is programmed, EA will be internally
latched on reset. This pin also then receives 12-volt programming enable
voltage (VPP) during Flash programming when 12-volt Programming is
selected.
XTAL1:
Input to the inverting oscillator amplifier and input to the internal
clock operating circuit.
XTAL2:
Output from the inverting oscillator amplifier.

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3.4.4 BLOCK DIAGRAM:

The AT89S52 is designed with static logic for operation down to
zero frequency and supports two software selectable power saving modes.
The Idle Mode stops the CPU while allowing the RAM; timer/counters,
serial port, and interrupt system to continue functioning. The Power-down
mode saves the RAM contents but freezes the oscillator disabling all other
chip functions until the next hardware reset.
SPECIAL FUNCTION REGISTERS:
The AT89S52 operations that do not use the internal 256-byte
RAM addresses from 00h to 7fh are done by a group of specific internal
registers, each called a special function register (SFR), which may be
addressed much like internal RAM, using addresses from 80h to ffh. Some
SFR’s are also bit addressable, as is the case for the bit area of RAM. This
feature allows the programmer to change only what needs to be altered,
leaving the remaining bits in that SFR unchanged. Not all of the addresses
from 80h to ffh are used for SFR’s, and attempting to use an address that is
not defined or empty results in unpredictable results. PC is not part of the
SFR and has no internal RAM address. The names of the SFR’s and their
functions are given in the following list.
Fig 3.4.4 IC Block diagram of AT89S52

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3.4.5 LIST OF SPECIAL FUNCTION REGISTERS:

Name Function
1. A Accumulator
2. B Arithmetic
3. DPH addressing external memory
4. DPL addressing external memory
5. IE Interrupt enables control
6. IP Interrupt priority
7. P0 Input/output port latch
11. PCON Power control
12. PSW Program status word
13. SCON Serial port control
14. SBUF Serial port data buffer
15. SP Stack pointer
16. TMOD Timer/counter mode control
17. TCON Timer/counter control
18. TL0 Timer 0 low byte
19. TH0 Timer 0 high byte
20. TL1 Timer 1 low byte
21. TH1 Timer 1 high byte
3.4.6 INTERRUPTS:
A computer program has only two ways to determine the condition
that exist in Internal and external circuits. One method uses software
instructions that jump to Subroutines on the states of flags and port pins.
The second method responds to hardware Signals, called interrupts that
force the program to call a subroutine. Software techniques use processor
time that could be devoted to other tasks, interrupts take processor time
only when action by the program is needed.
Most applications of microcontrollers involve responding to events
quickly enough to control the environment that generates the events.
Interrupts are often the only way in which real time programming can be

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enabled or disabled by setting or clearing a bit in Special Function

Register IE. IE also contains a global disable bit, EA, which disables all
interrupts at once.
All interrupt functions are under the control of the program. The
programmer is able to alter the control bits in the Interrupt Enable register
(IE), the Interrupt Priority register (IP), and the Timer Control register
(TCON). The program can block all or any combination of the interrupts
from acting on the program by suitably setting or clearing bits in these
registers.
After the interrupt has been handled by the interrupt subroutine,
which is placed by the programmer at the interrupt location in the
program memory, the interrupted program must resume operation at the
instruction where the done successfully. Three of these are generated
automatically by internal operations: timer flag 0, timer flag1 and the
serial port.
The AT89S52 has a total of six interrupt vectors: two external
interrupts (INT0 and INT1), three timer interrupts (Timers 0, 1, and 2),
and the serial port interrupt. Each of these interrupt sources can be
individually interrupt took place. Program resumption is done by storing
the interrupted PC address on the stack in RAM before changing the PC
to the interrupt address in ROM. The PC address will be restored from the
stack after an RET1 instruction is executed at the end of the interrupt
subroutine.
Timer flag interrupt:
When a timer /counter overflows the corresponding timer flag TF0
or TF1 is set to 1. The flag is cleared to 0 when the resulting interrupt
generates a program call to the appropriate timer subroutine in memory.
Serial port interrupt: If a data byte is received, an interrupt bit. RI is set to
1 in the SCON register. When a data byte has been transmitted an
interrupt bit, T1, is set in SCON. These are ORed together to provide a
single interrupt to the processor which is the serial port interrupt. These
bits are not cleared when the interrupt generated program call is made by
the processor.

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The program that handles serial data communication must reset R1

or T1 to 0 to enable the next data communication operation.
External interrupts:
Pins INT0 and INT1 are used by external circuitry. Inputs on these
pins can set the interrupt flags IE0 and IE1 in the TCON register to 1 by
two different methods. The IEX flags may be set when the INTX pin
signal reaches a low level, or the flags may be set when a high to low
transition takes place on the INTX pin. Bits IT0 and IT1 in TCON
program the INTX pins for low level interrupt when set to 0 and program
the INTX pins for transition interrupt when set to 1.
RESET:
A reset can be considered to be the ultimate interrupt because the
program may not block the action of the voltage on the RST pin. This
type of interrupt is often called non-maskable.
INTERRUPT CONTROL:
The program must be able, at critical times, to inhibit the action of
some or all of the interrupts so that critical operations can be finished.
The IE register holds the programmable bits that can enable or
disable all the interrupts as a group, or if the group is enabled, each
individual interrupt source can be enabled or disabled.
INTERRUPT ENABLE/DISABLE:
Bits in the IE register are set to 1 if the corresponding interrupt
source is to be enabled and set to 0 to disable the interrupt source. Bit EA
is the master, or global bit that can enable or disable all the interrupts.
INTERRUPT PRIORITY:
Register IP bits determine if any interrupt is to have a high or low
priority. Bits set to 1 give the accompanying interrupt a high priority; 0
assigns a low priority. Interrupts with a high priority can interrupt another
interrupt with a low priority. The low priority interrupt continues after the
higher is finished.
PROGRAM COUNTER AND DATA POINTER:
The AT89S52 contains two 16-bit registers, the program counter
(PC) and the data pointer (DPTR). Each is used to hold the address of a
byte in memory. Program instructions bytes are fetched from locations in

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memory that are addressed by the PC. Program ROM may be on the chip
at addresses 0000h to 0FFFh, external to the chip for addresses that
exceed 0FFFh, or totally external for all addresses from 0000h to FFFFh.
The PC is automatically incremented after every instruction byte is
fetched and may also be altered by certain instructions. The PC is the only
register that does not have an internal address.
The DPTR register is made up of two 8-bit registers, named DPH
and DPL, which are used to furnish memory addresses for internal and
external code access and external data access. The DPTR is under the
control of program instructions and can be specified by its 16-bit name,
DPTR, or by each individual byte name, DPH and DPL. DPTR does not
have a single internal address; DPH and DPL are each assigned an
address.
A AND B CPU REGISTERS:
AT89S52 contains 34 general purpose, or working registers. Two
of these registers A and B, hold results of many instructions, particularly
math and logical operations, of the 8052 central processing unit. The other
32 are arranged as part of internal RAM in four banks, B-0 to B-3 of 8
registers and comprise the mathematical core.
The A (accumulator) register is the most versatile of the two CPU
registers and is used for many operations, including addition, subtraction,
integer multiplication and division, and Boolean bit manipulations. The A
register is also used for all data transfers between the 8052 and any
external memory. The B register is used with the A register for
multiplication and division operations and has no other function other than
as a location where data may be stored.
FLAGS AND THE PROGRAM STATUS WORD (PSW):
Flags are 1-bit registers provided to store the results of certain
program instructions. Other instructions can test the condition of the flags
and make decisions based on the flag states. In order that the flags may be
conveniently addresses, they are grouped inside the program status word
(PSW) and the power control (PCON) registers.
The AT89S52 has 4 math flags that respond automatically to the
outcomes of math operations and 3 general purpose user flags that can be

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set to 1 or cleared to 0 by the programmer as desired. The math flags

include carry (C), auxiliary carry (AC), overflow (OV) and parity (P).
User flags are named F0, GF0 and GF1. They are general purpose flags
that may be used by the programmer to record some event in the program.
However math flags are also affected by the math operations.
INTERNAL RAM AND ROM:
The 256 byte internal RAM is organized into 3 distinct areas. 32
bytes from 00h to 1Fh that make up 32 working registers are organized as
4 banks of 8 registers each. The 4 register banks are numbered 0 to 3 and
are made up of 8 registers R0 to R7. Each register can be addressed by the
name of the bank or by its RAM address.
Thus R0 of bank-3 is R0 (if bank-3 is currently selected) or address
18h (whether bank-3 is selected or not). Bits RS0 and RS1 in the PSW
determine which bank of registers is currently in use at any time when the
program is running. Register banks not selected can be used as general
purpose RAM. Bank-0 is selected on reset.
A bit addressable area of 16 bytes occupies RAM byte addresses
20h to 2Fh, forming a total of 128 addressable bits. An addressable bit
may be specified by its bit address of 00h to 7Fh, or 8 bits may form any
byte address from 20h to 2Fh. Addressable bits are useful when the
program need only remember a binary event.
STACK AND STACK POINTER:
The stack refers to an area of internal RAM that is used in
conjunction with certain opcodes to store and retrieve data quickly. The 8
bit stack pointer (SP) register is used by the micro controller to hold an
internal RAM address that is called the top of the stack. The address held
in the SP register is the location in the internal RAM with the last byte of
data was stored by the stack operation.
When data is to be placed on the stack, the SP increments before
storing data on the stack so that the stack grows up as the data is stored.
As the data is retrieved from the stack the byte is read from the stack, and
then the SP decrements to point to the next available byte of stored data.

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Fig3.4.5: Oscillator connections

The heart of the AT89S52 is the circuitry that generates the clock
pulses by which all internal operations are synchronized. Pins XTAL1
and XTAL2 are provided for connecting a resonant network to form an
oscillator typically a quartz crystal and capacitors are employed. The
crystal frequency is the basic internal clock frequency of the micro-s
controller. The manufacturers make available 8052 designs that can run at
specified maximum and minimum frequencies, typically 1MHz to
16MHz. Minimum frequencies imply that some internal memories are
dynamic and must always operate above a minimum frequency or data
will be lost.
Ceramic resonators may be used as a low cost alternative to crystal
resonators. However, decreases in frequency stability and accuracy make
the ceramic resonator a poor choice if high speed serial data
communication with other systems, or critical timing, is to be done. The
oscillator formed by the crystal, capacitors and an on-chip inverter
generates a pulse train at the frequency of the crystal. The clock
frequency establishes the smallest interval of time within the micro
controller called the pulse time.

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A state is the basic time interval for discrete operations of the micro
controller such as fetching an opcode byte, decoding an opcode,
executing an opcode, or writing a data byte. Two oscillator pulses define
each state.
3.4.4.1 ADDRESSING MODES:
The CPU can access data in various ways. The data could be in a
register or in memory or to be provided as an immediate value. The various
ways of accessing data are called addressing modes.
The various ways of the addressing modes of a microprocessor are
determined when designed and therefore can’t be changed by the
programmer. The 89S52 provides a total of 5 addressing modes. They are
as follows:
1. Immediate addressing mode:
In this addressing mode the source operand is a constant. In this mode
the operand comes immediately after the opcode. The immediate
data must be preceded by “#” sign. This mode can be used to load
information into any of the registers.
Ex. Mov ro, #5h
2. Register addressing mode:
This mode involves the use of the registers to hold the data to be
executed. It should be noted that the source and the destination registers
must match in size. We can move data between register and accumulator
but movement of data between registers is not possible.
3. Direct addressing mode:
In this mode the data is in a RAM memory location whose address
is known and this address is given as a part of the instruction. We can use
direct or indirect addressing modes to access data stored either in the
RAM or registers of the 89S52.
4. Register indirect addressing mode:
In this addressing mode a register is used as a pointer to the data. If
the data is inside the CPU, only the registers R0 and R1 are used for the
purpose. In other words R2-R7 cannot be used to hold the address of an
operand located in RAM.

HYBRID SOLAR CAR
5. Indexed addressing mode:

This mode is widely used in accessing the data elements of lookup
table entries located in the programmed ROM space of the 89S52.The
instruction used for this purpose is “MOVC A, @A+DPTR”. The DPTR
and the register A are used to form the address of data element stored on
the on-chip memory.
3.5 MOTOR DRIVER:
3.5.1 Introduction to Motor drivers:
For construction of any robot, the important mechanical constraint
is the number of motors we are going to use. One can either two wheel
drive or a four wheel drive. Four wheel drive even though is complex
than two wheel drive will provide more torque and good control. Two
wheel drive is very easy to construct.
3.5.2 L293D:
L293D is a dual H-Bridge motor driver. So with one IC, two DC
motors can be interfaced which can be controlled in both clockwise and
counter clockwise directions and its direction of motion can also be fixed.
The four I/O’s can be used to connect up to four DC motors. L293D has
output current of 600mA and peak output current of 1.2A per channel.
Moreover for the protection of the circuit from back EMF, output diodes
are included within the IC. The output supply (VCC2) has a wide range
from 4.5V to 36V, which has made L293D a best choice for DC motor
driver. The name "H-Bridge" is derived from the actual shape of the
switching circuit which controls the motion of the motor. It is also known
as "Full Bridge".
Figure 3.4.6(a): L293D Motor Driver IC

HYBRID SOLAR CAR
Figure 3.4.7(b): Pin Diagram of L293D Motor Driver
Total number of pins = 16

Ic Operating voltage = 5 - 7 v
Input voltage = 4.5 - 36 v
Output voltage = 4.5 - 36 v
Continuous Output Current = 600 mA or 0.6 A
3.5.2.1 L293 and L293D Pin out definition
1,2EN: To activate the channel 1 and 2 we supply +5v to this pin.

3,4EN: To activate the channel 3 and 4 we supply +5v to this pin.
Vcc1: Input voltage to derive the internal circuit (Darlington array) = 4.5
to 36 v
Vcc2: Supply/Output to appear at output = 4.5 to 36 v
1A: Channel-1 Input Pin
1Y: Channel-1 Output Pin

HYBRID SOLAR CAR
There are two Enable pins on l293d. Pin 1 and pin 9, for being able
to drive the motor, the pin 1 and 9 need to be high. For driving the motor
with left H-bridge you need to enable pin 1 to high. And for right H-
Bridge you need to make the pin 9 to high. If anyone of the either pin1 or
pin9 goes low then the motor in the corresponding section will suspend
working. It’s like a switch.
There are 4 input pins for this l293d, pin 2, 7 on the left and pin 15
,10 on the right. Left input pins will regulate the rotation of motor
connected across left side and right input for motor on the right hand side.
The motors are rotated on the basis of the inputs provided across the input
pins as LOGIC 0 or LOGIC 1. In simple you need to provide Logic 0 or 1
across the input pins for rotating the motor.
3.5.2.2 L293D DUAL H-BRIDGE MOTOR CONTROLLER:
Figure 3.5.2.2(a.):L293D DUAL H-BRIDGE MOTOR CONTROLLER
Let’s consider a Motor connected to output pins (pin 3, 6).

For rotating the motor in clockwise direction the input pins has to
be provided with Logic 1 and Logic 0.
 Pin2 = Logic1 and Pin7 = Logic0 Clockwise Direction

HYBRID SOLAR CAR
 Pin2 = Logic0 and Pin7 = Logic1 Anticlockwise direction

 Pin2 = Logic0 and Pin7 = Logic0 Idle[No rotation][Hi-Impedance state]
 In a very similar way the motor can also operated across input pin 15, 10
for motor connected to 11 and 14.
 Pin10 = Logic1 and Pin15= Logic0 Clockwise Direction
 Pin10 = the Logic0 and Pin15= Logic1 Anticlockwise direction

 Pin10 = Logic0 and Pin15 = Logic0 Idle[No-rotation][Hi-Impedance
state]
VCC is the voltage it needs for its own internal operation 9V, l293D
will not use this voltage for driving that motor. For driving the motor it
has a separate provision to provide motor supply VSS. L293d will use
this to drive the motor. It means if you want to operate a motor at 9V then
you need to provide a Supply of 9V across VSS Motor supply. The
maximum voltage for VSS motor supply is 36V. It can supply a max
current of 600mA per channel. Since it can drive motors Up to 36v hence
you can drive pretty big motors with this l293d. VCC pin 16 is the
voltage (in this case 9V) for its own internal Operation. The maximum
voltage ranges from 5v and up-to 36v.
3.6 DC GEARED MOTOR:
In this project, we use two high efficiency, high quality, low cost
DC motors with gearbox. A DC motor is any of a class of rotary electrical
machines that converts direct current electrical energy into mechanical
energy. The most common types rely on the forces produced by magnetic
fields. Nearly all types of DC motors have some internal mechanism,
either electromechanical or electronic, to periodically change the
direction of current flow in part of the motor.
DC motors were the first type widely used, since they could be
powered from existing direct-current lighting power distribution systems.
A DC motor's speed can be controlled over a wide range, using either a
variable supply voltage or by changing the strength of current in its field
windings. Small DC motors are used in tools, toys, and appliances.

HYBRID SOLAR CAR
The universal motor can operate on direct current but is a lightweight

motor used for portable power tools and appliances. Larger DC motors
are used in propulsion of electric vehicles, elevator and hoists, or in drives
for steel rolling mills. The advent of power electronics has made
replacement of DC motors with AC motors possible in many applications.
3.6.1 Features:
 500 RPM 12V DC motors with Gearbox
 5kgcm torque
 3000RPM base motor
 6mm shaft diameter with internal hole
 s125gm weight
 Same size motor available in various rpm
 No-load current = 60 mA(Max), Load current = 300 mA(Max)
Figure 3.6: DC Geared Motor
3.7 CHASSIS:

HYBRID SOLAR CAR
The primary challenge in developing an effective solar car chassis

is to maximize the strength and safety, but minimize the weight.
However, safety is a primary concern and the chassis must meet strength
and safety requirements.
Figure 3.7: Chassis
3.8 WHEELS:
A wheel (as used here) is rotationally symmetric about its principal
or roll axis and rests on the ground on its contact patch. The contact patch
is a small area which is in frictional contact with the ground such that the
forces required to cause relative sliding between the wheel and ground are
large for linear displacements and small for rotational motions. Thus, we
assume that a wheel undergoing pure rolling has a contact point with no
slip laterally or longitudinally, yet is free to twist about the contact point.
.
Figure 3.8: Wheels

HYBRID SOLAR CAR
3.9 GENERAL PURPOSES BOARD (VERO BOARD):

Vero board is a brand of stripboard, a pre-formed circuit board
material of copper strips on an insulating bonded paper board which was
originated and developed in the early 1960s by the Electronics
Department of Vero Precision Engineering Ltd (VPE). It was introduced
as a general-purpose material for use in constructing electronic circuits -
differing from purpose designed printed circuit boards (PCBs) in that a
variety of electronic circuits may be constructed using a standard wiring
board.This was a long, thin board with the copper strips arranged
transversely, rather than the usual lengthwise. A ready-cut central gap
was provided to isolate the sides of the IC.
Figure 3.9:General Purpose Board (Vero Board)

HYBRID SOLAR CAR
CHAPTER 4
SOFTWARE DESCRIPTION
4.1 Software
Keil Software
ProgIsp
4.2 Source code
#include<reg52.h>
sbit S1=P2^1;// connect switch 1 to Port2.0 for forward
sbit S2=P2^2; //used for backward
sbit S3=P2^3; // used for STOP
sbit S4=P2^4; // used for right turn
sbit S5=P2^5; // used for left turn
sbit motor_pin_1 = P3^0;
void delay(unsigned int);
void main ()
{
S1=1;//set switch as high
S2=1;
S3=1;
S4=1;
S5=1;
P3=0x00; //set Port 3 to low
while(1) //infinte loop
{
if(S1==0) //check swith is low(if anybody press switch 1?)
{
delay(10);
//P3=0x05;
motor_pin_1 = 0;
motor_pin_2 = 1;
motor_pin_3 = 0;
motor_pin_4 = 1;
}
else if(S2==0)
{
delay(10);
//P3=0x0a;
motor_pin_1 = 1;
motor_pin_2 = 0;

HYBRID SOLAR CAR
motor_pin_3 = 1;
motor_pin_4 = 0;
}
else if (S3==0)
{
delay(5);
motor_pin_1 = 0;
motor_pin_2 = 0;
motor_pin_3 = 0;
motor_pin_4 = 0;
}
if (S4==0)
{
delay(5);
motor_pin_1 = 1;
motor_pin_2 = 0;
motor_pin_3 = 0;
motor_pin_4 = 0;
}
if (S5==0)
{
delay(5);
motor_pin_1 = 0;
motor_pin_2 = 0;
motor_pin_3 = 1;
motor_pin_4 = 0;
}
}
}
void delay (unsigned int z) //delay function
{
unsigned i,j;
for(i=0;i<z;i++)
for(j=0;j<1275;j++);
}

HYBRID SOLAR CAR
CHAPTER 5
RESULT ANALYSIS:
Fig 5 (a): Internal Hybrid Solar Car Diagram
Fig 5 (b):Hybrid Solar Car Output

HYBRID SOLAR CAR
ADVANTAGES:
 Unlike regular cars, solar energy powered cars are able to utilize their full
power at any speed.
 Solar powered cars do not require any expense for running.
 Solar cars are Eco Green.
 Solar cars require very low maintenance.
 Solar cars produces no harmful emission
DISADVANTAGES:
 A good solar powered car is expensive.
 Parts used in solar cars are not produced in large quantity so they are
expensive.
 Solar cars don’t have speed or power that regular cars have.
 Solar powered cars can operate only for limited distances is there is no
sun.
APPLICATIONS:
 This concept can be utilized to build a single sitter four wheel vehicles in
practice.
 It can be extended to more commercial Corm of tour wheeler vehicle.
 In industry were small vertices are used to perform lightweight conveys
work from one place to other place.
 It can be used places where, fuel based vehicles are banned due to
production of pollution and noise.
CONCLUSION:
The world has seen great inventions right from small atoms to cursing
missiles, rocket, and planes. But these inventions had indirectly affected
the environment in one (or) more ways, apart from their glorious,
unimaginable use to the environment. The pollutions of air were one of
the most concern things in the world. Here the solar energy comes as a
replacement for the other resources. Because of its non-pollution,
simplicity, easy availability, less costs etc. Our vehicle, which is powered
by solar energy, brings enormous amount of advantageous to the world.

HYBRID SOLAR CAR
So we conclude that in the fast charging world where speed and accuracy
remains a main concern apart from non-pollution of the
environment, solar vehicle provides all the advantageous to create a clean,
green and healthy environment. The next generation will have the
atmosphere, which is free pollutants, and harmful substances, which make
the world a joyous place to live.
FUTURE SCOPE:
 Solar cars have been developing since the last twenty years and are
powered by energy from the sun. Although they are not a practical or
economic form of transportation at present, in the future they may play
a part in reducing our reliance on burning fossil fuels such as petrol and
diesel.
 Most of the concept cars launched today are focusing on solar energy
& Hybrid technology. These vehicles are superstitious in design but
also carry one of the most expensive components to assemble a vehicle
such as titanium, carbon fiber & fiber glass etc.
 Technology is expanding & indeed we will witness many additions to it
in the coming future of the automobile world.
BIBILIOGRAPHY
1. "The 8051 Microcontroller Architecture, Programming & Applications"

-- by Kenneth J Ayala.
2. "The 8051 Microcontroller & Embedded Systems"
-- by Mohammed Ali Mazidi & Janice Gillispie Mazidi.
3. "Power Electronics”
-- by M.D. Singh and K.B. Khanchandan.
4. "Linear Integrated Circuits”
-- by D. Roy Choudary & Shail Jain.
5. "Electrical Machines”
-- by S K Bhattacharya.

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HYBRID SOLAR CAR

Dept. of ECE, TKRCET. Page 1

Fig 2.1: Block diagram of Hybrid Solar Car

2.1.1 SOLAR PANEL:

Photovoltaic modules use light energy (photons) from the Sun to

Dept. of ECE, TKRCET. Page 2

available, based on thin-film cells. The cells must be connected

A rechargeable battery, storage battery, secondary cell,

Rechargeable batteries are produced in many different shapes and

Rechargeable batteries typically initially cost more

The major heart of this project is AT89S52

Dept. of ECE, TKRCET. Page 3

Fig 2.2: Schematic diagram of the project

Dept. of ECE, TKRCET. Page 4

Dept. of ECE, TKRCET. Page 5

Fig 3.2.1: Solar Panel

3.2.2 Theory and construction:

Dept. of ECE, TKRCET. Page 6

Modules electrical connections are made in series to achieve a

Currently the best achieved sunlight conversion rate (solar module

Depending on construction, photovoltaic modules can produce

Dept. of ECE, TKRCET. Page 7

A rechargeable battery, storage battery, secondary cell,

Rechargeable batteries are produced in many different shapes and

Fig 3.3: Rechargeable batteries

3.3.1 Usage and applications of battery:

Devices which use rechargeable batteries include automobile

Dept. of ECE, TKRCET. Page 8

tools, uninterruptible power supplies, and battery storage power stations.

Older rechargeable batteries self-discharge relatively rapidly, and

3.3.2 Charging and discharging:

During charging, the positive active material is oxidized,

Chargers take from a few minutes to several hours to charge a

Dept. of ECE, TKRCET. Page 9

Fig 3.4: AT89S52 IC

Dept. of ECE, TKRCET. Page 10

3.4.1 INTRODUCTION TO MICROCONTROLLER (AT89S52):

Dept. of ECE, TKRCET. Page 11

3.4.3 PIN DIAGRAM:

Fig 3.4.3: Pin Diagram of AT89S52

Dept. of ECE, TKRCET. Page 12

P1.1 T2EX (Timer/Counter 2 capture/reload trigger and

Dept. of ECE, TKRCET. Page 13

RST: Reset input.

Dept. of ECE, TKRCET. Page 14

3.4.4 BLOCK DIAGRAM:

Fig 3.4.4 IC Block diagram of AT89S52

Dept. of ECE, TKRCET. Page 15

3.4.5 LIST OF SPECIAL FUNCTION REGISTERS:

Dept. of ECE, TKRCET. Page 16

enabled or disabled by setting or clearing a bit in Special Function

Dept. of ECE, TKRCET. Page 17

The program that handles serial data communication must reset R1

Dept. of ECE, TKRCET. Page 18

Dept. of ECE, TKRCET. Page 19

set to 1 or cleared to 0 by the programmer as desired. The math flags

Dept. of ECE, TKRCET. Page 20

Fig3.4.5: Oscillator connections

Dept. of ECE, TKRCET. Page 21

Dept. of ECE, TKRCET. Page 22

5. Indexed addressing mode:

Figure 3.4.6(a): L293D Motor Driver IC

Dept. of ECE, TKRCET. Page 23