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NTD4813N

Power MOSFET
30 V, 40 A, Single N--Channel, DPAK/IPAK
Features
• Low RDS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
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• Optimized Gate Charge to Minimize Switching Losses
• These are Pb--Free Devices
V(BR)DSS RDS(ON) MAX ID MAX
Applications
13 mΩ @ 10 V
• CPU Power Delivery 30 V 40 A
• DC--DC Converters 24 mΩ @ 4.5 V

• High Side Switching D

MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)


Parameter Symbol Value Unit
G
Drain--to--Source Voltage VDSS 30 V
Gate--to--Source Voltage VGS ±20 V
Continuous Drain TA = 25°C ID 9.0 A S
Current RθJA N--CHANNEL MOSFET
(Note 1) TA = 85°C 7.0
Power Dissipation TA = 25°C PD 1.94 W 4 4
RθJA (Note 1)
4
Continuous Drain TA = 25°C ID 7.6 A
Current RθJA
(Note 2) Steady TA = 85°C 5.9 1 2 1 1
State 3 2 3
Power Dissipation TA = 25°C PD 1.27 W 2
RθJA (Note 2) 3
CASE 369AA CASE 369AC CASE 369D
Continuous Drain TC = 25°C ID 40 A 3 IPAK
DPAK IPAK
Current RθJC
TC = 85°C 31 (Bent Lead) (Straight Lead) (Straight Lead
(Note 1)
STYLE 2 DPAK)
Power Dissipation TC = 25°C PD 35.3 W
RθJC (Note 1)
Pulsed Drain tp=10ms TA = 25°C IDM 90 A
MARKING DIAGRAMS
Current & PIN ASSIGNMENTS
Current Limited by Package TA = 25°C IDmaxPkg 35 A 4
Drain
Operating Junction and Storage TJ, --55 to °C 4 4
Temperature TSTG +175 Drain Drain
13NG
YWW

Source Current (Body Diode) IS 29 A


48
13NG
YWW

13NG
YWW

Drain to Source dV/dt dV/dt 6 V/ns


48

48

Single Pulse Drain--to--Source Avalanche EAS 72 mJ


Energy (VDD = 24 V, VGS = 10 V,
IL = 12 Apk, L = 1.0 mH, RG = 25 Ω) 2
1 Drain 3 1 2 3
Lead Temperature for Soldering Purposes TL 260 °C
(1/8” from case for 10 s) Gate Source Gate Drain Source 1 2 3
Gate Drain Source
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Y = Year
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability. WW = Work Week
4813N = Device Code
G = Pb--Free Package

ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.

© Semiconductor Components Industries, LLC, 2010 1 Publication Order Number:


June, 2010 -- Rev. 6 NTD4813N/D
NTD4813N

THERMAL RESISTANCE MAXIMUM RATINGS


Parameter Symbol Value Unit
Junction--to--Case (Drain) RθJC 4.25
Junction--to--TAB (Drain) RθJC--TAB 3.5
°C/W
Junction--to--Ambient – Steady State (Note 1) RθJA 77.5
Junction--to--Ambient – Steady State (Note 2) RθJA 118.5
1. Surface--mounted on FR4 board using 1 sq--in pad, 1 oz Cu.
2. Surface--mounted on FR4 board using the minimum recommended pad size.

ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)


Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain--to--Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 30 V
Drain--to--Source Breakdown Voltage V(BR)DSS/ 24.5
mV/°C
Temperature Coefficient TJ
Zero Gate Voltage Drain Current IDSS VGS = 0 V, TJ = 25 °C 1
VDS = 24 V mA
TJ = 125°C 10
Gate--to--Source Leakage Current IGSS VDS = 0 V, VGS = ±20 V ±100 nA
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 mA 1.5 2.5 V
Negative Threshold Temperature VGS(TH)/TJ 5.4
mV/°C
Coefficient
Drain--to--Source On Resistance RDS(on) VGS = 10 V to ID = 30 A 10.9 13
11.5 V
ID = 15 A 10.3

VGS = 4.5 V ID = 30 A 18.6 24
ID = 15 A 17.1
Forward Transconductance gFS VDS = 15 V, ID = 10 A 6.0 S
CHARGES AND CAPACITANCES
Input Capacitance CISS 860
Output Capacitance COSS VGS = 0 V, f = 1.0 MHz, VDS = 12 V 201 pF
Reverse Transfer Capacitance CRSS 115
Total Gate Charge QG(TOT) 6.9 7.9
Threshold Gate Charge QG(TH) 1.2
VGS = 4.5 V, VDS = 15 V; ID = 30 A nC
Gate--to--Source Charge QGS 3.1
Gate--to--Drain Charge QGD 3.6
Total Gate Charge QG(TOT) VGS = 11.5 V, VDS = 15 V; 15.6 nC
ID = 30 A

SWITCHING CHARACTERISTICS (Note 4)


Turn--On Delay Time td(ON) 10.5
Rise Time tr VGS = 4.5 V, VDS = 15 V, ID = 15 A, 19.3
ns
Turn--Off Delay Time td(OFF) RG = 3.0 Ω 10.1
Fall Time tf 3.3
3. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperatures.

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NTD4813N

ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)


Parameter Symbol Test Condition Min Typ Max Unit
SWITCHING CHARACTERISTICS (Note 4)
Turn--On Delay Time td(ON) 6.0
Rise Time tr VGS = 11.5 V, VDS = 15 V, 18.3
ns
Turn--Off Delay Time td(OFF) ID = 15 A, RG = 3.0 Ω 17.7
Fall Time tf 2.1
DRAIN--SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage VSD VGS = 0 V, TJ = 25°C 0.8 1.2
V
IS = 30 A TJ = 125°C 0.9
Reverse Recovery Time tRR 16
Charge Time ta VGS = 0 V, dIs/dt = 100 A/ms, 10 ns
Discharge Time tb IS = 30 A 5.6
Reverse Recovery Charge QRR 7.0 nC
PACKAGE PARASITIC VALUES
Source Inductance LS 2.49 nH
Drain Inductance, DPAK LD 0.0164
Drain Inductance, IPAK LD TA = 25°C 1.88
Gate Inductance LG 3.46
Gate Resistance RG 2.5 Ω
3. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperatures.

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NTD4813N

TYPICAL PERFORMANCE CURVES

60 60
10 V TJ = 25°C VDS ≥ 10 V
6V 4.5 V
ID, DRAIN CURRENT (AMPS)

ID, DRAIN CURRENT (AMPS)


50 5V 50

40 40
4V
30 30
3.8 V

20 3.6 V 20
TJ = 125°C

10 10 TJ = 25°C
3V TJ = --55°C
0 0
0 1 2 3 4 5 1 2 3 4 5 6 7
VDS, DRAIN--TO--SOURCE VOLTAGE (VOLTS) VGS, GATE--TO--SOURCE VOLTAGE (VOLTS)

Figure 1. On--Region Characteristics Figure 2. Transfer Characteristics


RDS(on), DRAIN--TO--SOURCE RESISTANCE (Ω)

RDS(on), DRAIN--TO--SOURCE RESISTANCE (Ω)


0.030 0.042
0.029 ID = 30 A TJ = 25°C
0.028
0.027 TJ = 25°C 0.037
0.026
0.025 0.032
0.024
0.023 0.027
0.022
0.021 VGS = 4.5 V
0.020 0.022
0.019
0.018 0.017
0.017
0.016
0.015 0.012 VGS = 11.5 V
0.014
0.013 0.007
0.012
0.011
0.010 0.002
4 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9 9.5 10 10.5 11 11.5 10 15 20 25 30 35 40 45 50 55 60
VGS, GATE--TO--SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS)

Figure 3. On--Resistance vs. Gate--to--Source Figure 4. On--Resistance vs. Drain Current and
Voltage Gate Voltage
RDS(on), DRAIN--TO--SOURCE RESISTANCE

1.8 100,000
ID = 30 A VGS = 0 V
1.7
VGS = 10 V TJ = 150°C
1.6
1.5 10,000
IDSS, LEAKAGE (nA)

1.4
(NORMALIZED)

1.3 TJ = 125°C
1.2 1000
1.1
1.0
0.9 100
0.8 TJ = 25°C
0.7
0.6 10
--50 --25 0 25 50 75 100 125 150 175 5 10 15 20 25 30
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN--TO--SOURCE VOLTAGE (VOLTS)

Figure 5. On--Resistance Variation with Figure 6. Drain--to--Source Leakage Current


Temperature vs. Drain Voltage

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NTD4813N

TYPICAL PERFORMANCE CURVES

1000 15

VGS , GATE--TO--SOURCE VOLTAGE (VOLTS)


TJ = 25°C
900 13.5
800 Ciss 12 QT
C, CAPACITANCE (pF)

700 10.5
600 9
500 7.5
400 6
Q1 Q2
300 4.5
Coss ID = 30 A
200 3 VDD = 15 V
100 1.5 VGS = 11.5 V
Crss TJ = 25°C
0 0
0 5 10 15 20 25 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VDS, DRAIN--TO--SOURCE VOLTAGE (VOLTS) QG, TOTAL GATE CHARGE (nC)

Figure 7. Capacitance Variation Figure 8. Gate--To--Source and Drain--To--Source


Voltage vs. Total Charge

100 30
IS, SOURCE CURRENT (AMPS) VGS = 0 V
tr 25 TJ = 25°C

20
t, TIME (ns)

td(off)

10 15

td(on)
10

tf VDD = 15 V
ID = 30 A 5
VGS = 11.5 V
1 0
1 10 100 0.5 0.6 0.7 0.8 0.9 1.0
RG, GATE RESISTANCE (OHMS) VSD, SOURCE--TO--DRAIN VOLTAGE (VOLTS)

Figure 9. Resistive Switching Time Figure 10. Diode Forward Voltage vs. Current
Variation vs. Gate Resistance

1000 80
EAS, SINGLE PULSE DRAIN--TO--SOURCE

VGS = 20 V ID = 12 A
I D, DRAIN CURRENT (AMPS)

SINGLE PULSE 70
TC = 25°C
AVALANCHE ENERGY (mJ)

60
100
10 ms 50

40
100 ms
30
10
1 ms 20
RDS(on) LIMIT
THERMAL LIMIT 10 ms 10
PACKAGE LIMIT dc
1 0
0.1 1 10 100 25 50 75 100 125 150 175
VDS, DRAIN--TO--SOURCE VOLTAGE (VOLTS) TJ, JUNCTION TEMPERATURE (°C)

Figure 11. Maximum Rated Forward Biased Figure 12. Maximum Avalanche Energy vs.
Safe Operating Area Starting Junction Temperature

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NTD4813N

TYPICAL PERFORMANCE CURVES

100

I D, DRAIN CURRENT (AMPS)


100°C 25°C
125°C
10

0.1
1 10 100 1000
PULSE WIDTH (ms)

Figure 13. Avalanche Characteristics


r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE

1.0
D = 0.5

0.2
(NORMALIZED)

0.1

0.1 0.05 P(pk)


RθJC(t) = r(t) RθJC
0.02
D CURVES APPLY FOR POWER
0.01 PULSE TRAIN SHOWN
t1 READ TIME AT t1
SINGLE PULSE t2 TJ(pk) -- TC = P(pk) RθJC(t)
DUTY CYCLE, D = t1/t2
0.01
1.0E--05 1.0E--04 1.0E--03 1.0E--02 1.0E--01 1.0E+00 1.0E+01
t, TIME (ms)

Figure 14. Thermal Response

ORDERING INFORMATION
Device Package Shipping†
NTD4813NT4G DPAK 2500 / Tape & Reel
(Pb--Free)

NTD4813N--1G DPAK--3 75 Units / Rail


(Pb--Free)

NTD4813N--35G IPAK Trimmed Lead 75 Units / Rail


(3.5  0.15 mm)
(Pb--Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

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NTD4813N

PACKAGE DIMENSIONS

DPAK (SINGLE GUAGE)


CASE 369AA--01
ISSUE B

NOTES:
C 1. DIMENSIONING AND TOLERANCING PER ASME
A Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
E A 3. THERMAL PAD CONTOUR OPTIONAL WITHIN
DIMENSIONS b3, L3 and Z.
b3 B c2 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
4 5. DIMENSIONS D AND E ARE DETERMINED AT THE
L3 Z OUTERMOST EXTREMES OF THE PLASTIC BODY.
D 6. DATUMS A AND B ARE DETERMINED AT DATUM
DETAIL A H PLANE H.
1 2 3
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
L4 A 0.086 0.094 2.18 2.38
b2 A1 0.000 0.005 0.00 0.13
b c b 0.025 0.035 0.63 0.89
b2 0.030 0.045 0.76 1.14
e 0.005 (0.13) M C H b3 0.180 0.215 4.57 5.46
c 0.018 0.024 0.46 0.61
GAUGE SEATING c2 0.018 0.024 0.46 0.61
L2 PLANE C PLANE D 0.235 0.245 5.97 6.22
E 0.250 0.265 6.35 6.73
e 0.090 BSC 2.29 BSC
H 0.370 0.410 9.40 10.41
L
A1 L 0.055 0.070 1.40 1.78
L1 L1 0.108 REF 2.74 REF
L2 0.020 BSC 0.51 BSC
DETAIL A L3 0.035 0.050 0.89 1.27
ROTATED 90° CW L4 ------ 0.040 ------ 1.01
Z 0.155 ------ 3.93 ------

STYLE 2:
SOLDERING FOOTPRINT* PIN 1. GATE
2. DRAIN
3. SOURCE
6.20 3.00 4. DRAIN
0.244 0.118
2.58
0.102

5.80 1.60 6.17


0.228 0.063 0.243

SCALE 3:1 inches


mm 

*For additional information on our Pb--Free strategy and soldering


details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

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NTD4813N

PACKAGE DIMENSIONS

3 IPAK, STRAIGHT LEAD


CASE 369AC--01
ISSUE O
NOTES:
1.. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2.. CONTROLLING DIMENSION: INCH.
B C 3. SEATING PLANE IS ON TOP OF
DAMBAR POSITION.
V R E 4. DIMENSION A DOES NOT INCLUDE
DAMBAR POSITION OR MOLD GATE.

INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.235 0.245 5.97 6.22
A
B 0.250 0.265 6.35 6.73
C 0.086 0.094 2.19 2.38
SEATING PLANE D 0.027 0.035 0.69 0.88
E 0.018 0.023 0.46 0.58
W K F 0.037 0.043 0.94 1.09
G 0.090 BSC 2.29 BSC
F H 0.034 0.040 0.87 1.01
J J 0.018 0.023 0.46 0.58
G K 0.134 0.142 3.40 3.60
H
R 0.180 0.215 4.57 5.46
D 3 PL V 0.035 0.050 0.89 1.27
0.13 (0.005) W W 0.000 0.010 0.000 0.25

IPAK (STRAIGHT LEAD DPAK)


CASE 369D--01
ISSUE B

B C NOTES:
1. DIMENSIONING AND TOLERANCING PER
V R E ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.

INCHES MILLIMETERS
4 DIM MIN MAX MIN MAX
Z A 0.235 0.245 5.97 6.35
A B 0.250 0.265 6.35 6.73
S C 0.086 0.094 2.19 2.38
1 2 3
D 0.027 0.035 0.69 0.88
E 0.018 0.023 0.46 0.58
--T-- F 0.037 0.045 0.94 1.14
SEATING G 0.090 BSC 2.29 BSC
PLANE K H 0.034 0.040 0.87 1.01
J 0.018 0.023 0.46 0.58
K 0.350 0.380 8.89 9.65
R 0.180 0.215 4.45 5.45
J S 0.025 0.040 0.63 1.01
F V 0.035 0.050 0.89 1.27
H
Z 0.155 ------ 3.93 ------
D 3 PL
STYLE 2:
G 0.13 (0.005) M T PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN

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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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