SPEEDAM 2010
International Symposium on Power Electronics,
Electrical Drives, Automation and Motion
Three-Phase Three-Level Active NPC
Converters for High Power Systems
C. Attaianese, M. Di Monaco, and G. Tomasso.
Università di Cassino - DAEIMI
Via Di Biasio 43, 03043 Cassino (Italy)
Abstract--In last years the multilevel converter
topologies have gained much attention both in the field of
scientific research and in the one of high power applications.
This paper proposes a comparative analysis between the
classical structure of Neutral Point Clamped (NPC)
converter and the emerging Active NPC converter. In
particular, numerical analysis of losses distribution among
power devices for some known carrier based PWM
techniques are reported in the case of ANPC topology.
Furthermore, experimental results concerning the design
and the implementation of a Three-Phase Three-Level
ANPC converter are analysed.
Index Terms--Multilevel power converters, Active NPC
inverter design.
I. INTRODUCTION
In the last three decades, multilevel inverter
technology has gained much attention in the area of
scientific research and in that of the power industry. The
basic principle of a multilevel converter is to synthesize
ac waveforms from several small levels of voltage,
obtained from bank of series capacitors or isolated dc
sources. This concept starts with a topology of converter
introduced by Baker [1] over twenty years ago, which
consisted in a serial connection of dc-sourced full-bridge
cells with DC separated sources. With respect to the two
level solution, the multilevel technology has as main
disadvantages the larger number of power device, the
need of capacitor banks or insulated sources in order to
create the voltage steps on the DC bus voltage. However,
the multilevel approach has several advantages such as
high power quality, high voltage capability, good Electro-
Magnetic Compatibility (EMC) and low switching losses.
Due to these advantages, many topologies of multilevel
converter have been proposed [2]. In particular during the
years, the first development technology was followed by
a Stacked Commutation (SC) cells concept in order to
obtain a multilevel conversion. Following the SC
structure, a new multilevel Neutral Point Clamped (NPC)
topology was developed [3], called also diode-clamped,
which utilises a bank of series capacitors to split the DC
bus voltage. Later, another multilevel converter with
flying-capacitors (FC) was introduced, in which
capacitors were floating rather than series-connected. The
Neutral Point Clamp (NPC) voltage source converter is
widely used in the field of high power industrial
978-1-4244-4987-3/10/$25.00 ©2010 IEEE
204
application such as rolling mills, fans, pumps and in the
one of wind energy. In fact, the NPC topology is more
advantageous than the FC topology with low and
moderate switching frequencies because the size of flying
capacitor is inversely proportional to the switching
frequency. However, this multilevel converter typology
has the disadvantage of an unequal distribution of losses
among power devices. Thereby, due to the unbalanced
distribution of losses, the switching frequency and output
power of the converter have to be limited. In order to
overcame the drawback of a NPC topology in the last
years [4], [5], a new topology called Active Neutral Point
Clamped (ANPC) has been developed. The switching
states of ANPC converter are discussed in order to
analyze their influence on the losses distribution. Starting
from this analysis, numerical results of losses distribution
among power devices of a ANPC converter for some
sinusoidal PWM modulation strategies [6] are analyzed.
Moreover a experimental results of a implementation of a
three-phase three-level ANPC converter are proposed.
II. ANPC CONVERTERS
The structure of three-level ANPC converter (fig.1) is
obtained by means of the connection of active switches in
anti-parallel to the clamp diodes of the classical NPC
structure (fig. 2). In the case of the NPC converter, each
phase has two complementary switch pairs, called
commutation cells. Thus, the turning on of one of the
switches of the cell requires that the other complementary
switch is turned off. The cell-1, for a generic leg x, is
formed by T1x-T1Cx, the cell-2 is composed by T2x-T2Cx. In
Table I the three switching states of the 3L-NPC
converter are reported. In the positive state (P) the
converter phase leg is connected to dc rail “+”, whereas
during the negative state (N) the phase leg is connected to
dc rail “-”. In the case of the zero state (O) the ac terminal
is connected to the neutral point of the dc link. The
unequal loss distribution among the devices in NPC
topology is due to the presence of a single zero switching
state [6]. Considering the structure of ANPC converter,
the additional active switches with respect to NPC
topology allow to enable more then one switch state to
obtain the zero state, which can be used with the aim to
distribute the losses among the power devices by means
of the specific utilization of the upper and lower path of
 +
TABLE I. SWITCH SATES OF THE DIODE -CLAMPED THREE-LEVEL NPC
T1a D1a T1b D1b T1c D1c CONVERTER
D2a D2b D2c
C2
T1Ca T1Cb T1Cc State T1x T1Cx T2x T2Cx
T2a T2b T2c
D1Ca D1Cb D1Cc N 0 1 0 1
Vdc N
T3a D3a a T3b D3b b T3c D3c c
D2Ca D2Cb D2Cc
O 0 1 1 0
C1
P 1 0 1 0
T3Ca T2Ca T3Cb T3Cc
T2Cb T2Cc
D3Ca D3Cb D3Cc
-
TABLE II. SWITCH SATES OF THE THREE-LEVEL ANPC CONVERTER

s State T1x T1Cx T2x T2Cx T3x T3Cx

Fig. 1. Topology of three-phase three level ANPC converter. N1 0 0 0 1 0 1

N2 0 1 0 1 0 1

O1 - 0 0 0 1 1 0
+ T1a T1b T1c

C2 O2 - 0 1 1 0 0 1

Du,a T2a Du,b T2b Du,c T2c O1 + 0 1 1 0 0 0

Vdc N
a b Dd,c c O2 + 1 0 0 1 1 0
Dd,a Dd,b
C1
P1 1 0 1 0 0 0
T1Ca T1Cb T1Cc
T2Ca T2Cb T2Cc
- P2 1 0 1 0 1 0

Fig. 2. Topology of three-phase three level diode-clamped NPC III. MODULATION STRATEGIES
converter.

The sinusoidal PWM modulations for an ANPC

converter can be classified on the basis of the choice of
the redundancies of zero state which are used in the
T1a D1a T1a D1a
D2a D2a
modulation [7]. In fact, the commutations to or from the
Vdc +
-
Vdc +
-
zero states determine the distribution of the switching
2 T1Ca 2 T1Ca losses. It has to be underlined that all commutation occurs
T2a T2a
D1Ca i load N
D1Ca i load between one active switch and one diode. Thereby even if
N
more than two devices turn on or off, only one active and
T3a D3a T3a D3a
D2Ca D2Ca one diode experience essential switching losses. The
Vdc +
-
Vdc +
-
control of the distribution of conduction losses can be
2 T3Ca
T2Ca
2 T3Ca
T2Ca
made by the selection of the upper or the lower path
D3Ca D3Ca during the zero states, whereas the conduction losses can
not be influenced in the positive and negative states.
(a) (b)
The waveforms of the first considered sinusoidal
PWM modulation (PWM-1) are depicted in figure 4. The
Fig. 3. ANPC zero conduction state: (a) upper path; (b) lower path. PWM-1 modulation uses two carriers, c1 and c2 (fig. 4)
with the same amplitude and frequency but level-shifted
the neutral tap. In particular, the commutation cells of a on the vertical axis. In particular, the carrier associated to
generic phase-x are three: T1x-T1Cx, T2x-T2Cx, T3x-T3Cx and negative levels is in opposition of phase with respect to
the switching states of the ANPC converter are shown in the carrier associated to positive ones. Figure 4-(a) shows
Table II. Considering a single phase leg-x of ANPC the control signals for the cells, which are obtained by
converter (fig. 3), by turning on T1Cx and T2x the phase comparison among the reference voltage (v*) and the two
current can flow through the upper path in both carrier waves in the modulation sampling interval Ts,
directions. In the same manner, by turning on T3x and when v*>0. The control signals obtained when the
T2Cx the phase current can be conducted through the reference voltage is negative are depicted in fig. 4-(b).
lower path in both directions. In the case of NPC From figure 4 it is possible to notice that the two
topology, it is not possible to use the upper and lower redundancies O1- and O1+ are used for zero state.
path in order to distribute the power losses because the Furthermore, the cell-2 switches at low frequency, the
use of these paths depends only on the direction of the same of the reference voltage one, while the cell-1 and
phase current. cell-3 switch at high frequency (fs). The waveforms of the

205
 Vdc 0 Vdc Vdc
c1 c1 c2 c1 c2 2
2 c2 2
v*

v* O1- O2- O1-

O1 + P1 O1+ O1 -
N1 O1 -
+ + +
O1 O2 O1 N2 N2
P2 P2
v* v*
Vdc Vdc Vdc
0 − − −
0 Ts 0 Ts 2 2 0 Ts 0 Ts 2
T1 T1
T1 T1
T1C T1C
T1C T1C
T2 T2
T2 T2
T2C T2C
T2C T2C
T3 T3
T3 T3
T3C T3C
T3C T3C VaN 0
Vdc Vdc
VaN Vdc
0 Vdc 0 2 VaN 2
0 2 VaN 2

(a) (b) (a) (b)

Fig. 4. PWM-1: (a) positive voltage reference; (b) negative voltage Fig. 6. PWM-3: (a) positive voltage reference; (b) negative voltage
reference. reference.
high frequency (fs), while the other ones work at low
frequency, which is equal to the frequency of the output
Vdc 0
voltage. Figure 6 shows the modulation waveforms of the
2 c1 c2 last considered modulation strategy (PWM-3). In this
v*
control, the switching states of the converter are obtained
by comparison among the reference voltage (v*) and the
O2+ P2 O2+ O2- N2 O2- two carrier waves that are phase-shifted on the horizontal
axis with Ts/2. It is possible to see that four switching
v*
0 Vdc states are used for the zero state, O1+ and O2+ when the
0 Ts 0 2
Ts
reference is positive (fig. 6-(a)) while O1- and O2- when
the reference is negative (fig. 6-(b)). PWM-3 has some
T1 T1
advantages with respect the previous one [7]. In
T1C T1C particular, it allows to obtain a natural doubling of the
apparent switching frequency and, how it possible to
T2 T2
analyze in the section IV, a better balancing of the loss
T2C T2C distribution in switches.
T3 T3

T3C T3C
0
IV. NUMERICAL ANALYSIS OF THE LOSS DISTRIBUTION
VaN Vdc Vdc

0 2 VaN 2

(b)
A numerical analysis has been carried out in order to
(a)
verify the distribution of semiconductor losses among the
Fig. 5. PWM-2: (a) positive voltage reference; (b) negative voltage devices in the ANPC converter for the three PWM
reference. techniques, which have been discussed in the previous
section. A complete simulation, including the power
second sinusoidal PWM strategy (PWM-2) are shown in electronic system, the control and the load has been
figure 5. Even in the PWM-2, the cells control signals are arranged by using the Power Toolbox of Matlab-
obtained by comparison among the reference voltage (v*) Simulink®. The calculation algorithm of the total losses
and the two carrier waves phase-shifted on the vertical allows to evaluate the total losses both of the active
axis but the two switching states O2- and O2+ are used in switches and of the diodes. As well known, the losses in
order to obtain zero voltage level. In particular, the first semiconductor device can be divided in conduction losses
one is used when the reference voltage is negative, while (Pcon) and switching losses (Psw). The conduction losses
the other one when the reference is positive. During the in an IGBT or a diode can be expressed as:
zero state, the current flows only through the upper path 1
or through the lower one. In this control, as it is possible Pcon = ∫ uon ( t )* iL ( t )dt (1)
T
to see in figure 5-(a) and 5-(b), the cell-2 switches at a

206
where
T = fundamental period
uon(t) = on-stage voltage drop
iL= load current
Assuming the IGBT approximation with a series
connection of dc voltage source (uCE0) representing on-
state zero-current collector-emitter voltage and a
collector-emitter on-state resistance (rc), the equation (1)
can be transformed to the expression [8]:
and PWM-2. It has to be underline that the three PWM
strategy are equivalent from point of view of the total
losses of converter. In fact, the converter total loss of all
three cases is equal to 46W. Moreover, it is possible to
notice in the power loss distribution that the 3L-ANPC
topology is symmetrical: in fact, the total loss in power
devices T1-D1 is equal to the one in power devices T3C-
D3C. The total loss in the T1C-D1C is equal to the one in
power devices T3-D3 and the total loss of T2-D2 is equal
to the one of T2C-D2C.

2
Pcon IGBT = uce0 * I cav + rc I crms (2) [W] 14

12

where 10
Icav= the average value of the IGBT current 8
Icrms = the RMS value of the IGBT current 6

4
In the same manner, the conduction losses of the diode
can be expresses by: 2

0
T1 D1 T1C D1C T2 D2 T2C D2C T3 D3 T3C D3C
2
PconDiode = uD 0 * I Dav + rD I Drms (3)
Switching Loss Conduction Loss

Fig.7. PWM-1: distribution of losses in 3L-ANPC converter

where (Vdc=600V, Iload,rms=5.6A, fs =10kHz, PF=1, m=0.8).
uD0= the on-stage diode voltage drop
rD = the on-state diode resistance [W] 14
IDav= the average value of the diode current 12
IDrms = the RMS value of the diode current 10

8
Regarding the switching losses of active switches, they
have been calculated as the sum of the turn-on energy and 6

turn-off energy. These energies obviously depend on the 4

on the switched voltage and the switched current. The 2

switching losses in the diodes have been evaluated 0
considering only the reverse-recovery energy because the T1 D1 T 1C D1C T 2 D2 T 2C D2C T 3 D3 T 3C D3C

switch-off losses in the diodes have been neglected. The Switching Loss Conduction Loss
characteristics of the International Rectifier Fig. 8. PWM-2: distribution of losses in 3L-ANPC converter
IRG4PH50KDPbF IGBT with free-wheeling diode have (Vdc=600V, Iload,rms=5.6A, fs =10kHz, PF=1, m=0.8).
been considered to obtain the parameters of
semiconductor devices for the total losses evaluation. [W] 14

Figure 7 shows the conduction losses and switching 12

losses in semiconductor device of ANPC converter for 10
the PWM-1 in the following operating condition: 8
Vdc=600V, Iload,rms=5.6A, fs =10kHz, power factor (PF) =
6
1, modulation index (m)=0.8. From distribution of losses
it is possible to notice that the PWM1 does not allow 4

equal distribution among the power devices. In fact, the 2

cell-2 does not switch and it has only conduction losses. 0

T1 D1 T 1C D1C T2 D2 T2C D2C T3 D3 T 3C D3C
The losses distribution for the PWM-2 in the same
operating conditions is shown in figure 8. Even this Switching Loss Conduction Loss

modulation strategy, like the PWM-1, does not allow
equal distribution among the power devices. In fact, cell-
1 and cell-3 do not switch and they have only conduction
losses. Considering always the same operating
conditions, the losses distribution in the case of PWM-3
is reported in figure 9. It is possible to notice that this
modulation technique allows to obtain a better balancing
of the loss distribution among the power device because
each switch commutes. In particular, the switches work at
frequency equal to one half of the one used in PWM-1
Fig. 9. PWM-3: distribution of losses in 3L-ANPC converter
(Vdc=600V, Iload,rms=5.6A, fs =10kHz, PF=1, m=0.8).
V. EXPERIMENTAL SET UP
A three-phase three-level ANPC converter has been
designed and manufactured with the aim to obtain a
compact layout of the power converter. From the scheme
of converter, depicted in fig. 10, it is possible to see that

207
3-phase full-bridge modules have been used for the cells-
1 and cells-3 of each phase of the converter and discrete
IGBTs have been used for the cells-2. Regarding the
power board, the chosen topology for PCB is a sandwich
structure, which allows to reduce the parasitic elements.
In fact, it is very important to reduce the inductive dc-link
since voltage overshoots occur during the switch off of
the IGBT due to stray inductances in the dc-link. These
overshoots may destroy the IGBT module because they
are added to dc-link voltage and may lead to UCE>UCEmax
(UCE voltage collector-emettitor). With low inductive dc- Fig. 12. Picture of ANPC converter negative plane.
link design these voltage overshoots can be reduced
significantly. Thus, a PCB board has been manufactured
for the positive and neutral plain and another one for the
neutral and negative plane. The figures 11 and 12 show
the manufactured PCBs for the positive-neutral planes
and for the neutral-negative planes, respectively. In figure
13 a picture of manufacture converter is shown. It is
possible to notice that the gate driver boards are mounted
in orthogonal way with respect to board for the power
circuit. Among the different modulation strategies, the
sinusoidal PWM-2 has been implemented, because it
allows to use, in the case of the chosen converter
structure, lower-speed switching devices for the 3-phase
full-bridge modules and higher-speed switching devices
for 6-discrete power devices. In particular, Siemens®
IGBT 3-phase full-bridge modules BSM15GD60DN2
and Discrete International Rectifier® IGBTs Fig. 13. Picture of the 3-level ANPC converter.
IRG4PH50KDPbF have been used. The modulation
strategy has been implemented by means of
TMS320F28335 DSP of Texas Instruments®. In order to
test the performances of the manufactured three-phase VI. EXPERIMENTAL RESULTS
3L-ANPC converter the converter has been connected to
600V dc power supply and to resistive/inductive load To test the performances of the manufactured three-
bank. phase 3L-ANPC, several tests have been carried out, in
which the value of m and fs have been modified. In
+
T1c T1b T1a T3c T3b T3a particular, in order to simulate a high power system, a
C2
low switching frequency has been used.
T1Cc T1Cb T1Ca T3Cc T3Cb T3Ca
Figure 14, 15 and 16 respectively show the phase
voltages, the line-to-line voltages and the phase currents
N obtained in the following operating conditions:
Vdc=600V, freference=50Hz, fs=2.5kHz, m=0.8.
C1

T2c a T2Cc T2b bT T2a c T2Ca

- 2Cb

Fig. 10. Structure of three-phase 3L-ANPC converter.

Fig. 14. Experimental results: Ch1- voltage phase vas, Ch2- voltage
phase vbs, Ch3- voltage phase vcs, Math – FFT of voltage phase vas;
Fig. 11. Picture of ANPC converter positive plane. (m=0.8).

208

Fig. 15. Experimental results: Ch1- phase to phase voltage vab, Ch2-
phase to phase voltage vac, Ch3- phase to phase voltage vbc, Math – FFT
of phase to phase voltage vab, (m=0.8).
Fig. 16. Experimental results: Ch1- current phase ia, Ch2- current phase
ib, Ch3- current phase ic, Math – FFT of current phase ia; (m=0.8).
The experimental results confirm that the power
converter has good performances also with low values of
switching frequency. This is very important for high
power applications where the switching frequency is
limited due to high voltage values that the power devices
are required to block in their off-state. Moreover, the
good performances obtained are also justified by the fact
that the design of power PCBs has allowed to reduce the
leakage inductances of converter. As known, the leakage
inductances are a drawback of multilevel converters with
respect to the two-level one.
VII. CONCLUSION
In the paper, the loss distribution among the
semiconductor devices of a ANPC converter for different
sinusoidal PWM modulation techniques has been
analyzed. The total losses both of the active switches and
of the diodes have been evaluated.
As shown in the case of PWM-3, it is possible to obtain a
better distribution of the losses among the power devices
209
by means of the use of redundancies of the zero switch
state. Thereby, the balancing of losses allows to increase
the output power or switching frequency of the converter.
Moreover, the implementation of a three-phase three-
level ANPC converter has been proposed. The achieved
experimental results confirm the good power converter
performances also with low values of switching
frequency. These good performances have been obtained
thank to a correct PCB design of the converter, which
allows to minimize the leakage inductances. Furthermore,
the chosen structure for the converter has allowed to keep
down its dimension with consequent advantage in terms
of power density.
ACKNOWLEDGMENT
The work was supported by the Department of Energy
Technology of Aalborg University. The authors thank
Prof. Stig Munk-Nielsen of Aalborg University for
valuable advice and discussion.
REFERENCES
[1] R. H. Baker, Electric Power Converter, US Patent
Number 03,867,643, February 1975;
[2] J. Rodriquez, J.-S. Lai, F.Z. Peng – “Multilevel Inverters:
A Survey of Topologies, Controls, and Applications”,
IEEE Trans. on Ind. Electronics, Vol. 49, pp. 724-738,
2002;
[3] A. Nabae, I. Takahashi, H. Akagi – “A new neutral-point-
clamped PWM inverter”, IEEE Trans. Industry
Applications, Vol.IA-17, pp. 518-523, 1981;
[4] T. Brückner, S. Bernet, “Loss balancing in three-level
voltage source inverters applying active NPC switches”,
Proc. IEEE PESC, Vancouver, 2001, pp.1135-1140;
[5] T. Brückner, S. Bernet, H. Güldner, “The Active NPC
Converter and Its Loss-Balancing Control”, IEEE Trans.
on Ind. Electronics, Vol.52, pp.855-868, 2005;
[6] D. Floricau, E. Floricau, G. Gateau, “Three-level Active
NPC Converter: PWM Strategies and Loss Distribution”,
IEEE IECON 2008, pp. 3333-3338, 2008;
[7] D. Floricau, E. Floricau, M. Dumitrescu, “Natural
Doubling of the Apparent Switching Frequency using
Three-Level ANPC Converter”, International School on
Nonsinusoidal Currents and Compensation - ISNCC,
Lagow, Poland, 10-13 June 2008;
[8] D. Floricau, G. Gateau, M. Dumitrescu, R. Teodorescu,
“A New Stacked NPC Converter: 3L-topology and
control”, 12th European Conference on Power Electronics
and Applications – EPE 2007, Aalborg, Denmark, 2-5
Sept.2007, Proceedings on CD, Proceedings on CD,
ISBN: 9789075815108, pp.1-10.