Professional Documents
Culture Documents
1 1
Compal Confidential
2 2
2014-04-07
REV:1.0
3 3
Panelization Information
Main Board LA-B211P
PWR Board LS-B161P
USB Board LS-B162P
BATT Board LS-B163P
4 4
PCB@
ZZZ PCB Z5WAL LA-B211P LS-B161P/B162P/B163P
Part Number Description
DAZ15Y00100 PCB Z5WAL LA-B211P LS-B161P/B162P/B163P
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 1 of 39
A B C D E
A B C D E
1
204pin DDR3L-SO-DIMM X1 1
P.13
P.16 P.15
port 0 port 1
P.21 P.15
LAN(GbE) / Card Reader USB 3.0
RTL8411B P.18,19
SOC Conn P.21 HUB port1
PCIE II x1
MINI CARD
FCBGA 1170 Pin port 1
WLAN/BT
P.19
Card Reader
2 in 1(SD)
SATA II x2 HD Audio HDA Codec
page 05~12 ALC283
P.20 port 1 P.20 port 0 P.24
LPC BUS SPI
3 3
P.23
BATT+ 12V Battery power supply ON ON ON 3 20K +/- 5% 0.541 V 0.550 V 0.559 V Board ID PCB Revision
B+ AC or battery power rail for power circuit. (19V/12V) ON ON ON 4 27K +/- 5% 0.691 V 0.702 V 0.713 V 0
5 33K +/- 5% 0.807 V 0.819 V 0.831 V 1 EVT
+RTCVCC RTC Battery Power ON ON ON 6 43K +/- 5% 0.978 V 0.992 V 1.006 V 2 DVT
+1.0VALW +1.0v Always power rail ON ON ON 7 56K +/- 5% 1.169 V 1.185 V 1.200 V 3 PVT
+1.8VALW +1.8v Always power rail ON ON ON 8 75K +/- 5% 1.398 V 1.414 V 1.430 V 4 Pre-MP
+3VALW +3.3v Always power rail ON ON ON 9 100K +/- 5% 1.634 V 1.650 V 1.667 V 5
+5VALW +5.0v Always power rail ON ON ON 10 130K +/- 5% 1.849 V 1.865 V 1.881 V 6
+1.35V +1.35V power rail for DDR3L ON ON OFF 11 160K +/- 5% 2.015 V 2.031 V 2.046 V
+3V_PTP +3.3V power rail for PTP ON ON OFF 12 200K +/- 5% 2.185 V 2.200 V 2.215 V
+SOC_VCC Core voltage for SOC ON OFF OFF 13 240K +/- 5% 2.316 V 2.329 V 2.343 V
+SOC_VNN GFX voltage for SOC ON OFF OFF
+0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF
43 level BOM table
+1.0VS +1.0v system power rail ON OFF OFF
+1.05VS +1.05v system power rail ON OFF OFF 43 Level Description BOM Structure
2
+1.35VS +1.35v system power rail ON OFF OFF 4319SNBOL01 SMT MB AB211 Z5WAL UMA N2920 HDMI N2920@/9022@/EMC@/PCB@/1DMIC@/NTPM@ 2
+1.5VS +1.5v system power rail ON OFF OFF 4319SNBOL02 SMT MB AB211 Z5WAL UMA N3520 HDMI N3520@/9022@/EMC@/PCB@/1DMIC@/NTPM@
+1.8VS +1.8v system power rail ON OFF OFF 4319SNBOL03 SMT MB AB211 Z5WAL UMA N3530 HDMI N3530@/9022@/EMC@/PCB@/1DMIC@/NTPM@
+3VS +3.3v system power rail ON OFF OFF 4319SNBOL04 SMT MB AB211 Z5WAL UMA N2930 HDMI N2930@/9022@/EMC@/PCB@/1DMIC@/NTPM@
+5VS +5.0v system power rail ON OFF OFF 4319SNBOL05 SMT MB AB211 Z5WAL UMA N2820 HDMI N2820@/9022@/EMC@/PCB@/1DMIC@/NTPM@
4319SNBOL06 SMT MB AB211 Z5WAL UMA N2830 HDMI N2830@/9022@/EMC@/PCB@/1DMIC@/NTPM@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
BOM Option Table
2.2K
Item BOM Structure
2.2K
+1.8VS Unpop @
BH10
Connector CONN@
PCU_SMB_CLK
BSS138 EMC requirement EMC@
BG12 PCU_SMB_DATA
SOC BSS138 EMC requirement depop @EMC@
KB9012 9012@
3 KB9022 9022@ 3
2.2K
Touch Screen I2C TSI@
KB BL BL@
2.2K
+3VALW DMIC*1 1DMIC@
DMIC*2 2DMIC@
77 EC_SMB_CK1 100 ohm 7
TPM TPM@
SCL1 BATTERY
78 EC_SMB_DA1 100 ohm 6 NTPM NTPM@
SDA1 CONN
2.2K
Debug SW DBG@ 2.2K 2.2K
1 1
12000mA
+SOC_VNN
VR_ON ISL95833HRTZ-T
(PU801) 14000mA
+SOC_VCC
ADAPTER
SYSON RT8207MZQW 5250mA SUSP#
(PU501) +1.35VP +0.675VSP
CHARGER B+
EC_ON SY8208BQNC SUSP# SY8003DFC_DFN8 958mA
(PU401) +3VALWP +1.5VSP
(PU602)
SUSP# APL5930KAI-TRG 1000mA
+1.05VSP
(PU701)
SPOK APL5930KAI-TRG 110mA TPS22966DPUR
BATTERY +1.8VALWP +1.8VS
(PU702) (U59)
SUSP# TPS22966DPUR JP8
+3VS +3VS_WLAN
(U11)
ENVDD
G5243AT11U
+LCDVDD
LAN_PWR_EN
(U8)
G5243AT11U
+3V_LAN
(U67)
3 3
0 ohm
+5VS_HDD
0 ohm
+5VS_ODD
USB_PWR_EN# SY6288D10CAC
+USB3_VCCA
(U25)
4 4
+1.35V_L +DDR_SOC_VREF
1 2
R965 1
4.7K_0402_1%
C1132
1 2 .1U_0402_16V7K
R966 2
4.7K_0402_1%
A A
D D
USOC1C
AV3 AG3
<16> HDMI_TX2+ DDI0_TXP_0 DDI1_TXP_0 EDP_TXP0 <15>
AV2 1.0V 1.0V AG1
<16> HDMI_TX2- DDI0_TXN_0 DDI1_TXN_0 EDP_TXN0 <15>
AT2 AF3
<16> HDMI_TX1+ DDI0_TXP_1 DDI1_TXP_1 EDP_TXP1 <15>
AT3 AF2
<16> HDMI_TX1- DDI0_TXN_1 DDI1_TXN_1 EDP_TXN1 <15>
AR3 AD3
<16> HDMI_TX0+ DDI0_TXP_2 DDI1_TXP_2
AR1 AD2
<16> HDMI_TX0- DDI0_TXN_2 DDI1_TXN_2
<16> HDMI_CLK+
AP3
DDI0_TXP_3 DDI1_TXP_3
AC3
eDP Panel
HDMI <16> HDMI_CLK-
AP2
DDI0_TXN_3 DDI1_TXN_3
AC1
BA3 CRT_R
VGA_RED CRT_R <17>
AY2 CRT_B
VGA_BLUE CRT_B <17>
BA1 CRT_G
VGA_GREEN CRT_G <17>
AW1 CRT_IREF 1 2
VGA_IREF AY3 R969 357_0402_1%
VGA_IRTN
3.3V
3.3V
VGA_HSYNC
VGA_VSYNC
BD2 CRT_HSYNC
BF2 CRT_VSYNC
CRT_HSYNC
CRT_VSYNC
<17>
<17>
CRT
3.3V BC1 CRT_DDC_CLK
VGA_DDCCLK CRT_DDC_CLK <17>
3.3V BC2 CRT_DDC_DATA
VGA_DDCDATA CRT_DDC_DATA <17>
T2 T7
T3 RESERVED_T2 RESERVED_T7 T9
AB3 RESERVED_T3 RESERVED_T9 AB13
AB2 RESERVED_AB3 RESERVED_AB13 AB12
Y3 RESERVED_AB2 RESERVED_AB12 Y12
RESERVED_Y3 RESERVED_Y12
Y2
W3 RESERVED_Y2 RESERVED_Y13
Y13
V10 CRT RP43
W1 RESERVED_W3 RESERVED_V10 V9 150_0804_8P4R_1%
V2 RESERVED_W1 RESERVED_V9 T12 CRT_R 8 1
V3 RESERVED_V2 RESERVED_T12 T10 CRT_G 7 2
R3 RESERVED_V3 RESERVED_T10 V14 CRT_B 6 3
R1 RESERVED_R3 RESERVED_V14 V13 5 4
+1.8VS AD6 RESERVED_R1 RESERVED_V13 T14
AD4 RESERVED_AD6 RESERVED_T14 T13
AB9 RESERVED_AD4 RESERVED_T13 T6
RESERVED_AB9 RESERVED_T6
1
AB7 T4
@ Y4 RESERVED_AB7 RESERVED_T4 P14
RESERVED_Y4 RESERVED_P14 +1.8VS
B
R970
10K_0402_5%
Y6
V4 RESERVED_Y6 F34
eDP B
V6 RESERVED_V4 GPIO_S0_NC_15 M32
2
RESERVED_V6 GPIO_S0_NC_16
5
GPIO_NC13 A29 D28 U61
@ GPIO_NC14 C29 GPIO_S0_NC_13 GPIO_S0_NC_17 J28 1
P
T186 GPIO_S0_NC14 GPIO_S0_NC_18 NC
1
AB14 K34 4
RESERVED_AB14 GPIO_S0_NC_19 Y ENBKL <22>
@ GPIO_NC12 B30 D34 DDI1_ENBKL 2
T187 GPIO_S0_NC_12 GPIO_S0_NC_20 A
G
R971 C30 F32
10K_0402_5% RESERVED_C30 GPIO_S0_NC_21 F28 NL17SZ07DFT2G_SC70-5 +3VS
3
GPIO_S0_NC_22 K28 SA00004BV00
2
5
U62
Multiplexed with Hardware Straps Pin:MDSI_DDCDATA 1
P
NC 4
Y ENVDD <15>
DDI1_ENVDD 2
A
G
NL17SZ07DFT2G_SC70-5
3
SA00004BV00
RP45
+1.8VS DDI1_ENBKL 8 1
DDI1_ENVDD 7 2
DDI1_PWM 6 3
5
U64 5 4
1
P
NC 4 100K_0804_8P4R_5%
A Y INVT_PWM_SOC <15> A
DDI1_PWM 2
A
G
NL17SZ07DFT2G_SC70-5
3
SA00004BV00
D D
USOC1D
1
R978
10K_0402_5%
EC programing :
2
GPIO_S0_SC_65 "High"for Flash BIOS
D
1
A 2 A
TXE_DBG <22>
G
S Q62
3
MESS138W-G_SOT323-3
+3VS
+1.8VS
1
R982
5
XTAL_25M_IN USOC1E U53 4.7K_0402_5%
1.8V 1 3.3V
2
NC
1
XTAL_25M_IN AH12 AU34 R983 2 1 2.2K_0402_5% +1.8VALW 4
ICLK_OSCIN SIO_UART1_RXD / GPIO_S0_SC_70 Y PLT_RST_BUF# <18,19,22,23>
R981 XTAL_25M_OUT AH10 AV34 PMC_PLTRST# 2
ICLK_OSCOUT SIO_UART1_TXD / GPIO_S0_SC_71 A
G
Y7 1M_0402_5% BA34
25MHZ_10PF_7V25000014 AD9 SIO_UART1_RTS# / GPIO_S0_SC_72 AY34 PMC_ACIN D40 2 1 RB751V40_SC76-2 NL17SZ07DFT2G_SC70-5
ACIN <22,28>
3
RESERVED_AD9 SIO_UART1_CTS# / GPIO_S0_SC_73 SA00004BV00
2
10P_0402_50V8J
BD32 PLT_RST_BUF# 1 2
D C1004 AD10 SIO_UART2_RTS# / GPIO_S0_SC_76 BF32 C1174 @EMC@ D
2 4 10P_0402_50V8J AD12 RESERVED_AD10 SIO_UART2_CTS# / GPIO_S0_SC_77 0.01U_0402_16V7K
2 2 RESERVED_AD12
AF6
<18> CLK_PCIE_LAN# PCIE_CLKN_0 +1.8VALW
LAN <18> CLK_PCIE_LAN
AF4
PCIE_CLKP_0 PMC_SUSPWRDNACK / GPIO_S5_11
D26
G24 PMC_SUSCLK T192@ 32.768k output RP47
AF9 PMC_SUSCLK_0 / GPIO_S5_12 F18 PMC_PCIE_WAKE# 1 8
<19> CLK_PCIE_WLAN# PCIE_CLKN_1 PMC_SLP_S0IX# / GPIO_S5_13
WLAN <19> CLK_PCIE_WLAN
AF7
PCIE_CLKP_1 PMC_SLP_S4#
F22 PMC_SLP_S4# PMC_BATLOW# 2 7
R984 1 2 4.02K_0402_1% ICLK_ICOMP D22 PMC_SLP_S3# GPIO_S5_14 3 6
R985 1 2 47.5_0402_1% ICLK_RCOMP PMC_SLP_S3# J20 GPIO_S5_14 LS_OE 4 5
AK4 GPIO_S5_14 D20 PMC_ACIN
AK6 PCIE_CLKN_2 PMC_ACPRESENT F26 PMC_PCIE_WAKE# 10K_0804_8P4R_5%
PCIE_CLKP_2 PMC_WAKE_PCIE_0# / GPIO_S5_15 K26 PMC_BATLOW#
AM4 PMC_BATLOW# J26 PMC_PWRBTN#
AM6 PCIE_CLKN_3 PMC_PWRBTN# / GPIO_S5_16 BG9 PMC_RSTBTN# T209@ PMC_CORE_PWROK EMC@ C1007 1 2 0.047U_0402_25V7K
PCIE_CLKP_3 PMC_RSTBTN# F20 PMC_PLTRST#
AM9 PMC_PLTRST# J24 GPIO_S5_17 T205@
RESERVED_AM9 GPIO_S5_17
For XDP use AM10
RESERVED_AM10 PMC_SUS_STAT# / GPIO_S5_18
G18 PMC_SUS_STAT# T207@
+1.8VALW
DDR_CORE_PWROK EMC@ C1158 1 2 0.01U_0402_16V7K
R989 1 2 51_0402_5% XDP_H_PRDY#
R1026 1 2 51_0402_5% XDP_H_TDO C11 RTC_TEST#
R1024 1 2 200_0402_5% XDP_H_PREQ_BUF# BH7 ILB_RTC_TEST# C12 RTC_RST# PMC_PLTRST# EMC@ C1006 1 2 .1U_0402_16V7K
BH5 PMC_PLT_CLK_0 / GPIO_S0_SC_96 ILB_RTC_RST#
RP52 BH4 PMC_PLT_CLK_1 / GPIO_S0_SC_97 EC_RSMRST# R990 1 2 100K_0402_5%
4 5 XDP_H_TDI BH8 PMC_PLT_CLK_2 / GPIO_S0_SC_98 B10 EC_RSMRST#
PMC_PLT_CLK_3 / GPIO_S0_SC_99 PMC_RSMRST# EC_RSMRST# <22>
3 6 XDP_H_TMS BH6 B7 PMC_CORE_PWROK EMC@ C1155 1 2 .1U_0402_16V7K
2 7 XDP_H_TCK BJ9 PMC_PLT_CLK_4 / GPIO_S0_SC_100 PMC_CORE_PWROK
PMC_PLT_CLK_5 / GPIO_S0_SC_101 +1.0VS
1 8 XDP_H_TRST# RTC domain
C9 ILB_RTC_X1
51_0804_8P4R_5% XDP_H_TCK D14 ILB_RTC_X1 A9 ILB_RTC_X2 RP55
TAP_TCK ILB_RTC_X2
1
XDP_H_TRST# G12 B8 ILB_RTC_EXTPAD 1 2 1 8
C XDP_H_TMS F14 TAP_TRST# ILB_RTC_EXTPAD P22 C1008 R1064 PMC_SLP_S4# 2 7 EC_SLP_S4# C
XDP_H_TDI F12 TAP_TMS RTC_VCC_P22 .1U_0402_16V7K 73.2_0402_1% SOC_KBRST# 3 6 EC_KBRST#
TAP_TDI +RTCVCC
XDP_H_TDO G16 SOC_LID_OUT#4 5 EC_LID_OUT#
XDP_H_PRDY# D18 TAP_TDO
2
XDP_H_PREQ_BUF# F16 TAP_PRDY# B24 VR_SVID_ALERT#_SOC R1065 1 2 20_0402_1% 0_0804_8P4R_5%
TAP_PREQ# SVID_ALERT# VR_SVID_ALERT# <33>
AT34 A25 VR_SVID_DATA_SOC R1066 1 2 16.9_0402_1% 9022@
RESERVED_AT34 SVID_DATA VR_SVID_DATA <33>
C25 RP56
SVID_CLK VR_SVID_CLK <33>
SOC_SPI_CS0# C23 1 8
@ T193
@T193 C21 PCU_SPI_CS_0# SOC_SMI# 2 7 EC_SMI#
SOC_SPI_MISO B22 PCU_SPI_CS_1# / GPIO_S5_21 AU32 SOC_SCI# 3 6 EC_SCI#
SOC_SPI_MOSI A21 PCU_SPI_MISO SIO_PWM_0 / GPIO_S0_SC_94 AT32 PMC_PWRBTN# 4 5 PBTN_OUT#
SOC_SPI_CLK C22 PCU_SPI_MOSI SIO_PWM_1 / GPIO_S0_SC_95
PCU_SPI_CLK 0_0804_8P4R_5%
ILB_RTC_X1 9022@
SOC_KBRST# B18 ILB_RTC_X2 +1.8VALW +3VALW_EC
0_0402_5%1 TSI@ 2 R1016 TS_INT#_CPU B16 GPIO_S5_0 K24 1 2 U54 9012@
<15> TS_INT_R# GPIO_S5_1 / PMC_WAKE_PCIE_1 GPIO_S5_22
0_0402_5%1 RS@ 2 R1015 TP_INT#_CPU C18 N24 R994 2 19
<23> TP_INT# GPIO_S5_2 / PMC_WAKE_PCIE_2 GPIO_S5_23 VCCA VCCB
A17 M20 10M_0402_5%
SOC_LID_OUT# C17 GPIO_S5_3 / PMC_WAKE_PCIE_3 GPIO_S5_24 J18 PMC_SLP_S3# 1 20
GPIO_S5_4 GPIO_S5_25 A1 B1 EC_SLP_S3# <22>
C16 M18 32.768KHZ_12.5PF_Q13FC135000040 PMC_SLP_S4# 3 18
GPIO_S5_5 / PMU_SUSCLK_1 GPIO_S5_26 A2 B2 EC_SLP_S4# <22>
B14 K18 Y8 1 2 SOC_KBRST# 4 17
GPIO_S5_6 / PMU_SUSCLK_2 GPIO_S5_27 A3 B3 EC_KBRST# <22>
SOC_SMI# C15 K20 SOC_LID_OUT# 5 16
GPIO_S5_7 / PMU_SUSCLK_3 GPIO_S5_28 A4 B4 EC_LID_OUT# <22>
M22 1 1 SOC_SERIRQ 6 15
GPIO_S5_29 <9> SOC_SERIRQ A5 B5 EC_SERIRQ <22,23>
M24 SOC_SMI# 7 14
GPIO_S5_30 A6 B6 EC_SMI# <22>
C1009 C1010 SOC_SCI# 8 13
<7> SOC_SCI# A7 B7 EC_SCI# <22>
C13 18P_0402_50V8J 18P_0402_50V8J PMC_PWRBTN# 9 12
GPIO_S5_8 2 2 A8 B8 PBTN_OUT# <22>
A13
C19 GPIO_S5_9 AV32 LS_OE 10 11
GPIO_S5_10 SIO_SPI_CS# / GPIO_S0_SC_66 BA28 OE GND
SIO_SPI_MISO / GPIO_S0_SC_67 AY28 TXB0108PWR_TSSOP20
GPIO_RCOMP N26 SIO_SPI_MOSI / GPIO_S0_SC_68 AY30
GPIO_RCOMP 5 OF 13 SIO_SPI_CLK / GPIO_S0_SC_69
2
B B
R995 FH8065301546401_FCBGA131170 SOC_SERIRQ R1021 2 NTPM@ 1 0_0402_5% EC_SERIRQ
49.9_0402_1% B0@
PMC_SLP_S3# R1025 2 NTPM@ 1 0_0402_5% EC_SLP_S3#
1
+1.8VALW +3VALW_EC
U71 TPM@ +1.8VALW
1 6
2 VCCA VCCB 5
SOC_SERIRQ 3 GND EO 4 EC_SERIRQ +1.8VALW
A4 B4
G2129TL1U_SC70-6
+BIOS_SPI
2
+BIOS_SPI +1.8VALW +RTCVCC
R999 1 2 3.3K_0402_5% SPI_CS0# RS@ R1034
R998 2 1 0_0402_5% R996 10K_0402_5%
2
G
R1001 1 2 3.3K_0402_5% SPI_WP# 20K_0402_1% TPM@
C1013 2 1 .1U_0402_16V7K RTC_TEST# 2 1
1
R1000 1 2 3.3K_0402_5% SPI_HOLD# PMC_SLP_S3# 3 1 EC_SLP_S3#
RTC_RST# 2 1
D
2 1 R997 20K_0402_1% TPM@ Q83
From EC MESS138W-G_SOT323-3
1
EC_MISO 2 7 SPI_MISO SPI_CS0# 1 8 1 +3VALW
<22> EC_MISO CS# VCC
EC_MOSI 3 6 SPI_MOSI SPI_MISO 2 7 SPI_HOLD# W=20mils R993
<22> EC_MOSI DO(IO1) HOLD#(IO3)
EC_SPICLK 4 5 SPI_CLK SPI_WP# 3 6 SPI_CLK 3 10K_0402_5%
<22> EC_SPICLK WP#(IO2) CLK
5
4 5 SPI_MOSI RTC_TEST# 2 RS@ 1 CLR_CMOS# CLR_CMOS# <22> 1 U55
GND DI(IO0)
22_0804_8P4R_5% 0_0402_5% R1088 BAS40-04_SOT23-3 3.3V 1 1.35V
2
A EMC@ W25Q64DWSSIG_SO8 RTC_RST# 2 @ 1 C151 NC 4 A
Y DDR_CORE_PWROK <5>
1
G
RP48 JCMOS1 2
From CPU SOC_SPI_CS0# 4 5 SPI_CS0# Clear CMOS SHORT PADS NL17SZ07DFT2G_SC70-5
2
3
SOC_SPI_MISO 3 6 SPI_MISO Close to RAM door SA00004BV00
SOC_SPI_MOSI 2 7 SPI_MOSI
SOC_SPI_CLK 1 8 SPI_CLK Reserve for EMI(Near SPI ROM)
22_0804_8P4R_5% Security Classification Compal Secret Data Compal Electronics, Inc.
EMC@ SPI_CLK 1 2 2 1 2013/04/12 2014/04/12 Title
@EMC@ R1002 @EMC@ C1014
Issued Date Deciphered Date VLV-M SOC CLK/PMU/SPI
33_0402_5% 10P_0402_50V8J
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 8 of 39
5 4 3 2 1
5 4 3 2 1
USOC1F
G2 M10
GPIO_S5_31 RESERVED_M10 M9
RESERVED_M9
D M3 P6 D
L1 GPIO_S5_32 RESERVED_P6 P7
K2 GPIO_S5_33 RESERVED_P7
K3 GPIO_S5_34 R1003
M2 GPIO_S5_35 M7 1.24K_0402_1%
N3 GPIO_S5_36 RESERVED_M7 M12 USB3_REXT0 1 2
P2 GPIO_S5_37 USB3_REXT0
L3 GPIO_S5_38 P10
GPIO_S5_39 RESERVED_P10 P12
RESERVED_P12
M4
J3 RESERVED_M4 M6
P3 GPIO_S5_40 RESERVED_M6
H3 GPIO_S5_41 D4
GPIO_S5_42 USB3_RXP0 PCH_USB3_RX0_P <21>
B12 E3 PCH_USB3_RX0_N <21>
GPIO_S5_43 USB3_RXN0
K6
USB3 Port 0
USB3_TXP0 PCH_USB3_TX0_P <21>
M16 K7
<21> USB20_P0 USB_DP0 USB3_TXN0 PCH_USB3_TX0_N <21>
USB3.0 Port K16
<21> USB20_N0 USB_DN0
J14
<21> USB20_P1 USB_DP1
USB Hub G14
<21> USB20_N1 USB_DN1
K12
Touch Panel
<15> USB20_P2
J12 USB_DP2 BIOS/EFI Top Swap
<15> USB20_N2 USB_DN2
K10
<15> USB20_P3 USB_DP3 +1.8VS
Camera H10 H8
+1.8VALW <15> USB20_N3 USB_DN3 RESERVED_H8 H7
RESERVED_H7
1
R1007 1 2 10K_0402_5% USB_OC0# 1K_0402_1% 1 2 R1004 ICLK_USB_TERMP D10 @
R1009 1 2 10K_0402_5% USB_OC1# 1K_0402_1% 1 2 R1005 ICLK_USB_TERMN F10 ICLK_USB_TERMP H4 R1006
C ICLK_USB_TERMN RESERVED_H4 H5 C
RESERVED_H5 10K_0402_5%
C20
<21> USB_OC0#
2
USB_OC1# B20 USB_OC_0# / GPIO_S5_19 GPIO_S0_SC_56
USB_OC_1# / GPIO_S5_20
1
@
R1011
R1008 1 2 USB_RCOMP D6 BD12 10K_0402_5%
45.3_0402_1% C7 USB_RCOMPO GPIO_S0_SC_55 BC12 GPIO_S0_SC_56
USB_RCOMPI GPIO_S0_SC_56 BD14 DBG_UART_TXD T203@
2
GPIO_S0_SC_57 / PCU_UART_TXD BC14
@EMC@ R1010 1 @ 2 USB_PLL_MON M13 GPIO_S0_SC_58 BF14
C1015 2 1 10P_0402_50V8J LPC_CLK_0 0_0402_5% USB_PLL_MON GPIO_S0_SC_59 BD16
GPIO_S0_SC_60 BC16 DBG_UART_RXD T204@
GPIO_S0_SC_61 / PCU_UART_RXD GPIO_S0_SC_56: Top Swap( A16 Override )
B4
USB_HSIC0_DATA
0 = Top address bit is unchanged
B5 BH12 SOC_SPKR
USB_HSIC0_STROBE ILB_8254_SPKR / GPIO_S0_SC_54 SOC_SPKR <24> 1 = Top address bit is inverted
Reference EDS2.0 Page 51
E2
D2 USB_HSIC1_DATA
NOTE: Ref checklist rev1.2 p.25 USB_HSIC1_STROBE BH22
USB_HSIC_RCOMP must NOT float if they are not being used. SIO_I2C0_DATA / GPIO_S0_SC_78 BG23
1 2 HSIC_RCOMP A7 SIO_I2C0_CLK / GPIO_S0_SC_79
R1012 45.3_0402_1% USB_HSIC_RCOMP
BG24 For Touch Screen
SIO_I2C1_DATA / GPIO_S0_SC_80 BH24 +1.8VS
49.9_0402_1%1 2 R1013 LPC_RCOMP BF18 SIO_I2C1_CLK / GPIO_S0_SC_81
+1.8VS BH16 LPC_RCOMP / VGA_RCOMP SOC_I2C5_DATA R1143 1 TSI@ 2 2.2K_0402_5%
<22,23> LPC_AD0 ILB_LPC_AD_0 / GPIO_S0_SC_42
RP49 BJ17 BG25 SOC_I2C2_DATA
<22,23> LPC_AD1 ILB_LPC_AD_1 / GPIO_S0_SC_43 SIO_I2C2_DATA / GPIO_S0_SC_82
5 4 PCU_SMB_CLK BJ13 BJ25 SOC_I2C2_CLK SOC_I2C5_CLK R1144 1 TSI@ 2 2.2K_0402_5%
<22,23> LPC_AD2 ILB_LPC_AD_2 / GPIO_S0_SC_44 SIO_I2C2_CLK / GPIO_S0_SC_83
6 3 PCU_SMB_DATA BG14
B <22,23> LPC_AD3 ILB_LPC_AD_3 / GPIO_S0_SC_45 +1.8VS B
7 2 PCU_SMB_ALERT# BG17
<22,23> LPC_FRAME# ILB_LPC_FRAME# / GPIO_S0_SC_46
8 1 22_0402_5% 1 EMC@ 2 R1014 LPC_CLK_0 BG15 BG26
<22> LPC_CLK_EC ILB_LPC_CLK_0 / GPIO_S0_SC_47 SIO_I2C3_DATA / GPIO_S0_SC_84
22_0402_5% 1 TPM@ 2 R1017 LPC_CLK_1 BH14 BH26
<23> LPC_CLK_TPM ILB_LPC_CLK_1 / GPIO_S0_SC_48 SIO_I2C3_CLK / GPIO_S0_SC_85
4.7K_0804_8P4R_5% BG16
<23> LPC_CLKRUN# ILB_LPC_CLKRUN# / GPIO_S0_SC_49
5
BG13
+1.8VS <8> SOC_SERIRQ ILB_LPC_SERIRQ / GPIO_S0_SC_50 BF27 TSI@
G
SIO_I2C4_DATA / GPIO_S0_SC_86 BG27 SOC_I2C5_DATA 4 3
SIO_I2C4_CLK / GPIO_S0_SC_87 I2C5_SDA_PNL <15>
D
Q80A
2
DMN63D8LDW_SOT363-6
5
G
PCU_SMB_DATA BG12 SIO_I2C5_DATA / GPIO_S0_SC_88 BG28 SOC_I2C5_CLK SOC_I2C5_CLK 1 6
G
D
3 4 PCU_SMB_CLK PCU_SMB_CLK BH10 Q80B
<13,14,19,22> EC_SMB_CK2 PCU_SMB_CLK / GPIO_S0_SC_52
D
DMN63D8LDW_SOT363-6 BJ29
SIO_I2C6_DATA / GPIO_S0_SC_90 BG29
G
+1.8VS
5
G
SOC_I2C2_DATA 4 3
I2C2_SDA_TP <23>
D
A Q81A A
2
DMN63D8LDW_SOT363-6
G
SOC_I2C2_CLK 1 6
I2C2_SCL_TP <23>
D
Q81B
DMN63D8LDW_SOT363-6
D D
+1.35V_SOC +1.35V_L
1
AK32 AJ19 2 1
AK30 UNCORE_VNN_S3_AK32 ICLK_V1P35_S3_F1_AJ19 GND
AK29 UNCORE_VNN_S3_AK30 R1084 4 3 C1179
AK27 UNCORE_VNN_S3_AK29 BD1 VGA_V1P35_S3_F1 C1023 1 2 10U_0603_6.3V6M 8.06K_0402_1% BYP SHDN
UNCORE_VNN_S3_AK27 VGA_V1P35_S3_F1_BD1 1U_0402_6.3V6K
AK25 G916T1UF_SOT23-5 2
2
AK24 UNCORE_VNN_S3_AK25
AK22 UNCORE_VNN_S3_AK24
UNCORE_VNN_S3_AK22
1
AJ24 AD36
AJ22 UNCORE_VNN_S3_AJ24 DRAM_V1P35_S0IX_F1_AD36
+SOC_VNN +SOC_VCC AG24 UNCORE_VNN_S3_AJ22 AG32 R1085
AG22 UNCORE_VNN_S3_AG24 UNCORE_V1P35_S0IX_F2_AG32 V36 100K_0402_1%
B AF24 UNCORE_VNN_S3_AG22 UNCORE_V1P35_S0IX_F3_V36 U36 B
2
AF22 UNCORE_VNN_S3_AF24 UNCORE_V1P35_S0IX_F4_U36
UNCORE_VNN_S3_AF22
1
AD22 AA25
AC24 UNCORE_VNN_S3_AD22 UNCORE_V1P35_S0IX_F5_AA25
R1018 R1019 AC22 UNCORE_VNN_S3_AC24 2 1
UNCORE_VNN_S3_AC22 <22,25,30,31,32> SUSP#
100_0402_1% 100_0402_1% AA24 R1087 1
AD24 UNCORE_VNN_S3_AA24 36K_0402_5%
2
UNCORE_VNN_S3_AD24 C1181
AF19 C1024 1 2 22U_0805_6.3V6M .1U_0402_16V7K
UNCORE_V1P35_S0IX_F6_AF19 2
<33> VGFX_VSNS
BB8
UNCORE_VNN_SENSE UNCORE_V1P35_S0IX_F1_AG19
AG19 C1025 1 2 1U_0402_6.3V6K VOUT = 1.25 (1 + R1/R2).
P28 C1026 1 2 1U_0402_6.3V6K
<33> VCORE_VSNS CORE_VCC_SENSE_P28 7 OF 13
N28 C1027 1 2 1U_0402_6.3V6K
<33> VCORE_GSNS CORE_VSS_SENSE_N28 C1028 1 @2 1U_0402_6.3V6K
1
C1029 1 2 1U_0402_6.3V6K
FH8065301546401_FCBGA131170 C1030 1 2 1U_0402_6.3V6K
R1020 C1031 1 2 1U_0402_6.3V6K
100_0402_1% B0@ C1032 1 2 1U_0402_6.3V6K
C1033 1 2 1U_0402_6.3V6K
2
A A
D D
Follow CRBv1.15
USOC1H +1.05VS
325mA 1000mA
+1.0VALW U22 AC32
V22 UNCORE_V1P0_G3_U22 CORE_V1P0_S3_AC32 Y32
C1034 1 2 1U_0402_6.3V6K C5 UNCORE_V1P0_G3_V22 CORE_V1P0_S3_Y32
UNCORE_V1P0_G3 1uF*4 C1035 1 2 1U_0402_6.3V6K B6 UNCORE_V1P0_G3_C5 AA33
C1036 1 2 1U_0402_6.3V6K UNCORE_V1P0_G3_B6 CORE_V1P05_S3_AA33 AF33
C1037 1 2 1U_0402_6.3V6K Y19 CORE_V1P05_S3_AF33 AG33 C1038 1 2 0.47U_0402_6.3V6K
C3 USB3_V1P0_G3_Y19 CORE_V1P05_S3_AG33 AG35
USB3_V1P0_G3 0.01uF*1 C1039 1 2 0.01U_0402_16V7K USB3_V1P0_G3_C3 CORE_V1P05_S3_AG35 U33 C1040 1 2 1U_0402_6.3V6K
CORE_V1P05_S3_U33 U35 C1041 1 2 1U_0402_6.3V6K CORE_V1P05_S3 1uF*3
CORE_V1P05_S3_U35
2750mA CORE_V1P05_S3_V33
V33 C1042 1 2 1U_0402_6.3V6K
+1.0VS V32
BJ6 SVID_V1P0_S3_V32 +1.8VALW
C AD35 VGA_V1P0_S3_BJ6 C
AF35 DRAM_V1P0_S0IX_AD35 U24
C1043 1 2 1U_0402_6.3V6K AF36 DRAM_V1P0_S0IX_AF35 UNCORE_V1P8_G3_U24 V25
C1044 1 2 1U_0402_6.3V6K AA36 DRAM_V1P0_S0IX_AF36 PCU_V1P8_G3_V25 N20 C1045 1 2 1U_0402_6.3V6K PMC_V1P8_G3 1uF*1
DRAM_V1P0_S0iX 1uF*4 DRAM_V1P0_S0IX_AA36 USB_V1P8_G3_N20
C1046 1 2 1U_0402_6.3V6K AJ36
DRAM_V1P0_S0IX_AJ36
65mA PMU_V1P8_G3_U25 U25
C1047 1 2 1U_0402_6.3V6K AK35 AA18
AK36 DRAM_V1P0_S0IX_AK35 UNCORE_V1P8_G3_AA18
Y35 DRAM_V1P0_S0IX_AK36 +1.8VS
DRAM_V1P0_S0IX_Y35
C1048 1 2 1U_0402_6.3V6K Y36
DRAM_V1P0_S0IX_Y36
10mA
C1049 1 2 1U_0402_6.3V6K AK19 AM30
DDI_V1P0_S0iX 1uF*4 C1050 1 2 1U_0402_6.3V6K AK21 DDI_V1P0_S0IX_AK19 UNCORE_V1P8_S3_AM30 AN32 C1051 1 2 1U_0402_6.3V6K UNCORE_V1P8_S3 1uF*4
C1052 1 2 1U_0402_6.3V6K AJ18 DDI_V1P0_S0IX_AK21 UNCORE_V1P8_S3_AN32 U38 C1053 1 2 1U_0402_6.3V6K
AM16 DDI_V1P0_S0IX_AJ18 UNCORE_V1P8_S3_U38 C1054 1 2 1U_0402_6.3V6K
AN29 DDI_V1P0_S0IX_AM16 C1055 1 @2 1U_0402_6.3V6K +1.5VS
VIS_V1P0_S0IX_AN29
AN30
VIS_V1P0_S0IX_AN30
58mA
C1056 1 2 22U_0805_6.3V6M V24 AM32
UNCORE_V1P0_S0iX 22uF*3 C1057 1 2 22U_0805_6.3V6M Y22 VIS_V1P0_S0IX_V24 HDA_V1P5_S3_AM32 C1058 1 2 1U_0402_6.3V6K HDA_LPE_V1P5V1P8_S3 1uF*1
1uF*2 C1059 1 2 22U_0805_6.3V6M Y24 VIS_V1P0_S0IX_Y22 +3VALW
C1060 1 2 1U_0402_6.3V6K AF16 VIS_V1P0_S0IX_Y24
C1061 1 2 1U_0402_6.3V6K AF18 UNCORE_V1P0_S3_AF16 N22 +3VALW_SOC 2 RS@ 1
UNCORE_V1P0_S3_AF18
Y18
UNCORE_V1P0_S3_Y18
50mA PCU_V3P3_G3_N22 R1022 0_0402_5%
PCIE_SATA_V1P0_S3 1uF*1 C1062 1 2 1U_0402_6.3V6K G1 N18 C1063 1 2 .1U_0402_16V7K USB_V3P3_G3 0.1uF*1
UNCORE_V1P0_S3 1uF*1 C1064 1 2 1U_0402_6.3V6K AK18 UNCORE_V1P0_S3_G1 USB_V3P3_G3_N18 P18 C1065 1 2 1U_0402_6.3V6K USB_ULPI_V1P8_S3 1uF*1
PCIE_V1P0_S3 1uF*1 C1066 1 2 1U_0402_6.3V6K AM18 PCIE_V1P0_S3_AK18 USB_V3P3_G3_P18 C1067 1 2 1U_0402_6.3V6K PCU_V3P3_G3 1uF*1
VGA_V1P0_S3 1uF*1 C1068 1 2 1U_0402_6.3V6K AM21 PCIE_V1P0_S3_AM18 +3VS
USB_V1P0_S3 0.1uF*1 PCIE_V1P0_S3_AM21
C1069 1 2 .1U_0402_16V7K AN21
PCIE_V1P0_S3_AN21
33mA
USB3DEV_V1P0_S3 0.01uF*1 C1070 1 2 0.01U_0402_16V7K AN18 AN24 +3VS_SOC 2 RS@ 1
GPIO_V1P0_S3 1uF*1 C1071 1 2 1U_0402_6.3V6K AN19 PCIE_SATA_V1P0_S3_AN18 VGA_V3P3_S3_AN24 R1023 0_0402_5% VGA_V3P3_S3 1uF*1
SVID_V1P0_S3 1uF*1 C1072 1 2 1U_0402_6.3V6K AF21 SATA_V1P0_S3_AN19 AN27 1 2 +3VS
AG21 UNCORE_V1P0_S0IX_AF21 SD3_V1P8V3P3_S3_AN27 C1073 1U_0402_6.3V6K
M14 UNCORE_V1P0_S0IX_AG21 AM27 +1.8VS_3.3VS LPC 2 TPM@ 1 +1.8VS
U18 USB_V1P0_S3_M14 LPC_V1P8V3P3_S3_AM27 R1031 0_0402_5%
B U19 USB_V1P0_S3_U18 2 NTPM@ 1 B
USB_V1P0_S3_U19
AN25
GPIO_V1P0_S3_AN25
35mA R1032 0_0402_5%
V18 1 2
USB_HSIC_V1P2_G3_V18 C1075 1U_0402_6.3V6K +1.0VALW
USB_HSIC_V1P2_G3 1uF*1
F1
RESERVED_F1 VSS_AD16
AD16 C1074 1 2 1U_0402_6.3V6K Disable HSIC
AD18 @
T195 TP_CORE_V1P05_S4 AF30 VSS_AD18
Pop when use +1.2VALW If the USB HSIC is not used, pin V18 can be connected
TP_CORE_V1P05_S4_AF30
@ to either +V1P2A or +V1P0A.
8 OF 13
FH8065301546401_FCBGA131170
B0@
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VLV-M SOC Power
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 11 of 39
5 4 3 2 1
5 4 3 2 1
D D
C C
USOC1I USOC1J USOC1K USOC1L USOC1M
FH8065301546401_FCBGA131170
B0@
A A
0_0402_5%
4 C125 4
.1U_0402_16V7K LCN_DAN06-K4406-0100
2
Part Number = SP07000N300 Layout Note:
1
<Address: SA1:SA0=00 (A0H)> Security Classification Compal Secret Data Compal Electronics, Inc.
2013/04/12 2014/04/12 Title
Issued Date Deciphered Date DDR3L DIMMA
DIMM_1 STD H:4mm THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 13 of 39
A B C D E
A B C D E
1
4
C147
.1U_0402_16V7K
RS@
R231
0_0402_5%
TYCO_2-2013287-1
Part Number = SP07000KW00 Channel B 4
<Address: SA0:SA1=10 (A2H)> Security Classification Compal Secret Data Compal Electronics, Inc.
SA0/SA1 Follow INTEL demo board 2013/04/12 2014/04/12 Title
Issued Date Deciphered Date DDR3L DIMMB
DIMM_2 REV H:4mm THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 14 of 39
A B C D E
A B C D E
27 26
<6> EDP_HPD# AUXN and a pull-down resistor of 100 kΩ for AUXP between C371 1 2 .1U_0402_16V7K EDP_TXP0_C 28 27
<6> EDP_TXP0 28
1
S TS_INT# 33
34 33
+TS_PWR
3
R364 35 34
<9> USB20_P2 35
100K_0402_5% R427 1 RS@ 2 0_0402_5% USB TS 36
<9> USB20_N2 36
R428 1 RS@ 2 0_0402_5% +3VS 2 RS@ 1 +3VS_Camcra 37
2
+TS_PWR
For Touch Panel
2 TSI@ 1 I2C5_SDA_PNL
2.2K_0402_5% R1147
2 TSI@ 1 I2C5_SCL_PNL
3 +5VS +TS_PWR 2.2K_0402_5% R1150 3
1 TSI@ 2 TS_INT#
10K_0402_5% R635
1 2
R1145 1 TSI@ 2 TS_RST#
0_0603_5% 10K_0402_5% R636 Camera reserve pin define,need to confirm
+3VS
+1.8VS
1
4 TSI@ R634 4
10K_0402_5%
2
G
2
TS_INT_R# 3 1 TS_INT#
<8> TS_INT_R#
S
TSI@ Q78
MESS138W-G_SOT323-3
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eDP CONN.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 15 of 39
A B C D E
A B C D E
HDMI_C_CLK- 4 3 HDMI_R_CK-
U52 4 3
WCM-2012-900T_0805
1 3 HDMI_C_CLK+ L53 @EMC@1 2 HDMI_R_CK+ 1
OUT 1 2
1
1
IN C378 R369 2 RS@ 1 0_0402_5%
2 .1U_0402_16V7K
GND 2
HDMI_C_TX0- 4 3 HDMI_R_D0-
4 3
WCM-2012-900T_0805
HDMI_C_TX0+ L54 @EMC@1 2 HDMI_R_D0+
1 2
2 2
+1.8VS
RP15
HDMI_C_TX2- 4 3 HDMI_R_D2-
HDMI_DDCDATA 5 4 +HDMI_5V_OUT 4 3
HDMI_DDCCLK 6 3 WCM-2012-900T_0805
HDMI_SDATA 7 2 HDMI_C_TX2+ L56 @EMC@1 2 HDMI_R_D2+
HDMI_SCLK 8 1 1 2
+1.8VS
4 3 HDMI_SCLK
HDMI_GND
<6> HDMI_DDCCLK
S
Q82B
DMN63D8LDW_SOT363-6
3 3
3
D
+3VS 5 G Q14A
S DMN66D0LDW-7_SOT363-6
4
+1.8VS
1
17 +5V
<6> HDMI_HPD# DDC/CEC_GND
HDMI_SDATA 16
SDA
6
HDMI_SCLK 15
Q14B
D
G 2 HDMI_HPD 14 SCL
Reserved
2
DMN66D0LDW-7_SOT363-6 S 13
CEC
1
HDMI_R_CK- 12
1
R121 11 CK-
HDMI_R_CK+ 10 CK_shield
100K_0402_5% CK+
HDMI_R_D0- 9
8 D0-
2
D2 HDMI_R_D0+ 7 D0_shield
@EMC@ HDMI_R_D1- 6 D0+
YSLC05CH_SOT23-3 5 D1-
1
HDMI_R_D1+ 4 D1_shield 20
HDMI_R_D2- 3 D1+ GND 21
2 D2- GND 22
D2_shield GND
Reserved for ESD HDMI_R_D2+ 1
D2+ GND
23
4 4
SUYIN_100042GR019M23MZR
DC232001I00
CONN@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI CONN.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 16 of 39
A B C D E
A B C D E
1 1
+HDMI_5V_OUT
W=40mils
07/05 : ripple reduce 1
C450
.1U_0402_16V7K
CRT Connector
T196
2 @
Video Filter
JCRT1
L42 EMC@ 6
77MHz@1920x1200x60Hz BLM15BB470SN1D_2P 11
1 2 CRT_R_2 1
<6> CRT_R
L45 EMC@ 7
BLM15BB470SN1D_2P CRT_DATA 12
1 2 CRT_G_2 2
<6> CRT_G
L46 EMC@ 8
BLM15BB470SN1D_2P 13
1 2 CRT_B_2 3
<6> CRT_B
9
14
15P_0402_50V8J
C648 EMC@
15P_0402_50V8J
C615 EMC@
15P_0402_50V8J
C611 EMC@
10P_0402_50V8J
C647 EMC@
10P_0402_50V8J
C618 EMC@
10P_0402_50V8J
C616 EMC@
RP50 1 1 1 1 1 1 @ T206
@T206 4
CRT_R 8 1 10 G 16
CRT_G 7 2 CRT_CLK 15 G 17
CRT_B 6 3 5
5 4 2 2 2 2 2 2
CCM_070546HR015M25FZR
150_0804_8P4R_1% DC060005810
2
CONN@ 2
+HDMI_5V_OUT
CRT_HSYNC_B
U24 1
1 5 @EMC@
OE Vcc C448
74kHz@1920x1200x60Hz 10P_0402_50V8J
2 2
<6> CRT_HSYNC IN A
3 4 CRT_VSYNC_B
GND OUT Y
1
M74VHC1GT125DF2G_SC70-5 @EMC@
U23 C449
1 5 10P_0402_50V8J
OE Vcc 2
60Hz@1920x1200x60Hz
2
<6> CRT_VSYNC IN A
3 4
GND OUT Y
M74VHC1GT125DF2G_SC70-5
3 3
+3VS
2
+3VS
G
CRT_DDC_DATA 5 4
Q27B CRT_DDC_CLK 6 3
5
DMN66D0LDW-7_SOT363-6 CRT_DATA 7 2
CRT_CLK 8 1
G
CRT_DDC_CLK 4 3 CRT_CLK
<6> CRT_DDC_CLK
S
2.2K_0804_8P4R_5%
Q27A
DMN66D0LDW-7_SOT363-6
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT CONN.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 17 of 39
A B C D E
5 4 3 2 1
+3VALW +3V_LAN
@
R238 2 1 0_0805_5%
W=60mil +LAN_VDD +3V_LAN
60mil 60mil W=60mil IDC=1200mA W=60mil
U67 300mA 1.4A
1 L52
5 OUT +REGOUT 1 2
IN 2.2UH_NLC252018T-2R2J-N_5%
4.7U_0603_6.3V6K
C1215
.1U_0402_16V7K
C1216
.1U_0402_16V7K
C1217
.1U_0402_16V7K
C1218
.1U_0402_16V7K
C1219
.1U_0402_16V7K
C1220
.1U_0402_16V7K
C1221
1U_0402_6.3V6K
C1222
.1U_0402_16V7K
C1223
4.7U_0603_6.3V6K
C1224
.1U_0402_16V7K
C1225
.1U_0402_16V7K
C1226
.1U_0402_16V7K
C1227
2
4 GND
IN 1 1 1 1 1 1 1 1 1 1 1 1 1
2
3 LAN_PWR_EN <22>
C1214 EN
D 1U_0402_6.3V6K G5243T11U_SOT23-5 2 2 2 2 2 2 2 2 2 2 2 2 2 D
1
Part Number = SA000028Y10
1
R1140
10K_0402_5%
U68
2
Power Manahement/Isolation Internal pull high
RS@ ISOLATEB 31
R1124 1 2 0_0402_5% LAN_PME# 39 ISOLATEBPIN
<22> EC_PME# LANWAKEB Card Reader
15 SD_D0 R1126 1 2 0_0402_5% RS@ SD_D0_R
PCI-Express SD_D0/MS_D1 14 SD_D1 R1127 1 2 0_0402_5% RS@ SD_D1_R
CLK_PCIE_LAN 23 SD_D1 16 SD_CLK R1128 1 2 10_0402_5% SD_CLK_R
<8> CLK_PCIE_LAN REFCLK_P SD_CLK/MS_D0
<8> CLK_PCIE_LAN# CLK_PCIE_LAN# 24 17 SD_CMD R1125 1 2 0_0402_5% RS@ SD_CMD_R SD_CLK_R 2 1
REFCLK_N SD_CMD/MS_D2 18 SD_D3 R1129 1 2 0_0402_5% RS@ SD_D3_R
PLT_RST_BUF# 30 SD_D3/MS_D3 19 SD_D2 R1130 1 2 0_0402_5% RS@ SD_D2_R @EMC@ C1229 5P_0402_50V8C
<19,22,23,8> PLT_RST_BUF# PERSTBPIN SD_D2/MS_CLK
LAN_CLKREQ# 29 28 SD_WP
<7> LAN_CLKREQ# CLKREQBPIN MS_BS/SD_WP#
C1228,C1230 <7> PCIE_PRX_DTX_P0
C1228 1 2 .1U_0402_16V7K PCIE_PRX_C_DTX_P0 25
HSOP
Reserve for EMI please close to IC
C C1230 1 2 .1U_0402_16V7K PCIE_PRX_C_DTX_N0 26 C
Place near Pin 25,26 <7> PCIE_PRX_DTX_N0 HSON
<7> PCIE_PTX_C_DRX_P0 21 42 SD_CD#
22 HSIP SD_CD# 43
<7> PCIE_PTX_C_DRX_N0 HSIN MS_CD#
Transceiver Interface
LAN_MIDI0+ 1
<19> LAN_MIDI0+ MDIP0
LAN_MIDI0- 2
<19> LAN_MIDI0- MDIN0
LAN_MIDI1+ 4
<19> LAN_MIDI1+ MDIP1 +3V_LAN
LAN_MIDI1- 5 48
<19> LAN_MIDI1- MDIN1 HV_GIGA
LAN_MIDI2+ 6 11
<19> LAN_MIDI2+ MDIP2 HV_GIGA
<19> LAN_MIDI2-
LAN_MIDI2- 7
MDIN2 VDD33
12 1400mA
LAN_MIDI3+ 9 32
+3VS <19> LAN_MIDI3+ MDIP3 VDD33
LAN_MIDI3- 10
<19> LAN_MIDI3- MDIN3
Write protect Write protect
1
SWR mode 34
ENSWREG
800mA
R1132 +LAN_VDD 46 13 +CARD_3V3
LV_GEN CARD_3V3
15K_0402_5%
R1133 2 1 2.49K_0402_1% LAN_RST 47
RSET 27 +VDD33_18
10mil
1
DV33/18
.1U_0402_16V7K
C1231
4.7U_0603_6.3V6K
C1232
.1U_0402_16V7K
C1233
@ T198 41
GPO 38 LED0
LED1/GPO 1 1 1
37 LEDs
@ T199 LED2
40
B @ T200 LED_CR 49 @ B
E_PAD 2 2 2
+3V_LAN
Card Reader Connector
1 @ 2 Place near Pin 27 JREAD1
R1135 SD_D3_R 1
10K_0402_5% CD/DAT3
RTL8411B-CGT_QFN48_6X6
+CARD_3V3 SD_CMD_R 2
1 @ 2 GPO CMD
<22> LAN_PHY_EN
R1197 3
0_0402_5% VSS1
Close to Card Reader CONN
4
VDD
4.7U_0603_6.3V6K
C1234
.1U_0402_16V7K
C1235
SD_CLK_R 5
CLK
1 1
6
VSS2
SD_D0_R 7
2 2 DAT0
Y10 SD_D1_R 8 12
25MHZ_10PF_7V25000014 DAT1 G1
SD_D2_R 9 13
XTLI 1 3 XTLO DAT2 G2
1 3 SD_CD# 10 14
GND GND CD G3
1 1
SD_WP 11 15
C1236 2 4 C1237 WP G4
15P_0402_50V8J 15P_0402_50V8J TAITW_PSDAT4-11GLBS1NN4H2
2 2 CONN@
SP07000ZC00
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN RTL8411B-CG
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 18 of 39
5 4 3 2 1
A B C D E
LAN Connector
JRJ1
T210
RJ45_MIDI3- 8
1 LAN_TERMAL1 24 PR4- 1
LAN_MIDI3- 2 TCT1 MCT1 23 RJ45_MIDI3- RJ45_MIDI3+ 7
<18> LAN_MIDI3- TD1+ MX1+ PR4+
<18> LAN_MIDI3+ LAN_MIDI3+ 3 22 RJ45_MIDI3+
TD1- MX1- RJ45_MIDI1- 6
4 21 PR2-
LAN_MIDI2- 5 TCT2 MCT2 20 RJ45_MIDI2- RJ45_MIDI2- 5
<18> LAN_MIDI2- TD2+ MX2+ PR3-
<18> LAN_MIDI2+ LAN_MIDI2+ 6 19 RJ45_MIDI2+
TD2- MX2- RJ45_MIDI2+ 4
7 18 PR3+
LAN_MIDI1- 8 TCT3 MCT3 17 RJ45_MIDI1- RJ45_MIDI1+ 3
<18> LAN_MIDI1- TD3+ MX3+ PR2+
<18> LAN_MIDI1+ LAN_MIDI1+ 9 16 RJ45_MIDI1+
TD3- MX3- RJ45_MIDI0- 2
10 15 PR1- 10
LAN_MIDI0- 11 TCT4 MCT4 14 RJ45_MIDI0- RJ45_MIDI0+ 1 SHLD2 9
<18> LAN_MIDI0- TD4+ MX4+ PR1+ SHLD1
<18> LAN_MIDI0+ LAN_MIDI0+ 12 13 RJ45_MIDI0+
TD4- MX4-
JP40 @EMC@
75_0402_1%
75_0402_1%
75_0402_1%
75_0402_1%
B88069X9231T203_4P5X3P2-2
1
GST5009-E 2 1
SP050006B10 SANTA_130452-0B 40mil
R1136
R1137
R1138
R1139
1 DC234005310
CONN@ RJ45_GND 1 2 LANGND
C1238 C1239
2
.1U_0402_16V7K 40mil 10P_0402_50V8J
2
1
Place close to TCT pin LANGND
3
MESC5V02BD03_SOT23-3
JP@
D47
JUMP_43X118 JP42
JP41 @EMC@
RJ45_GND B88069X9231T203_4P5X3P2-2
EMC@
2
2 2
1
+3VS_WLAN
For Wireless LAN
2
+3VS_WLAN
R429
1
JMINI1
2 1 1 1 <22> WLAN_PME# 1 2
JUMP_43X118 @ 3 WAKE# 3.3V 4
C441 C458 C459 C460 5 NC GND 6
4.7U_0603_6.3V6K .1U_0402_16V7K .1U_0402_16V7K 7 NC 1.5V 8
470P_0402_50V7K <7> WLAN_CLKREQ# CLKREQ# NC
1 2 2 2 9 10
3
EMC@ GND NC 3
11 12
<8> CLK_PCIE_WLAN# REFCLK- NC
13 14
<8> CLK_PCIE_WLAN REFCLK+ NC
15 16
17 GND NC 18
19 NC GND 20
+1.5VS +1.5VS_WLAN NC NC WL_OFF# <22>
JP9 21 22
GND PERST# PLT_RST_BUF# <18,22,23,8>
JUMP_43X39 <7> PCIE_PRX_DTX_N1 23 24
1 2 25 PERn0 +3.3Vaux 26
<7> PCIE_PRX_DTX_P1
@ 1 2
1 27 PERp0 GND 28
@ 29 GND +1.5V 30 MINI1_SMBCLK R432 1 @ 2 0_0402_5%
GND SMB_CLK EC_SMB_CK2 <13,14,22,9>
C461 31 32 MINI1_SMBDATAR434 1 @ 2 0_0402_5% EC_SMB_DA2 <13,14,22,9>
<7> PCIE_PTX_C_DRX_N1 PETn0 SMB_DATA
.1U_0402_16V7K 33 34
2 <7> PCIE_PTX_C_DRX_P1 PETp0 GND
35 36
GND USB_D- USB20_Hub_N1 <21>
37 38
NC USB_D+ USB20_Hub_P1 <21>
+3VS_WLAN 39 40
41 NC GND 42
43 NC LED_WWAN# 44
45 NC LED_WLAN# 46
+3VS_WLAN 47 NC LED_WPAN# 48
+3VALW R1079 0_0402_5% 1 RS@ 2 49 NC +1.5V 50
<22> E51TXD_P80DATA NC GND
U9 @ R1080 0_0402_5% 1 RS@ 2 51 52
<22> E51RXD_P80CLK NC +3.3V
1 W=60mils
5 VOUT 53 54
VIN BT_ON# use RX to work. GND GND
1
2
4 GND R437 ACES_50709-0524W-P01
VIN 100K_0402_5% CONN@
1
@ 3 DC04000C400
WLAN_ON <22>
2
C165 EN
1U_0402_6.3V6K G5243AT11U_SOT23-5
2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN/WLAN/BT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 19 of 39
A B C D E
A B C D E
0.01U_0402_16V7K
RD@ C1246
0.1U_0402_16V7K
RD@ C1247
R1180
1 1
SATA HDD2 Cable Conn.
4.7K_0402_5%
RD@
U69 2 2 CL 4.0 mm
2
1 7 10 1
EN VDD 20 JHDD2
SATA_PTX_DRX_P0 RD@ C1248 2 1 SATA_PTX_C_DRX_P0_1 0.01U_0402_16V7K 1 VDD 1
SATA_PTX_DRX_N0 RD@ C1249 2 1 SATA_PTX_C_DRX_N0_1 0.01U_0402_16V7K 2 A_INp 6 1 R1184 2 8527@ RDSATA_PTX_DRX_P0 C1244 1 2 RD@ 0.01U_0402_16V7K RDSATA_PTX_C_DRX_P0 2 1
A_INn NC 16 4.99K_0402_1% RDSATA_PTX_DRX_N0 C1242 1 2 RD@ 0.01U_0402_16V7K RDSATA_PTX_C_DRX_N0 3 2
SATA_PRX_DTX_P0 RD@ C1250 2 1 SATA_PRX_C_DTX_P0_1 0.01U_0402_16V7K 5 NC 4 3
SATA_PRX_DTX_N0 RD@ C1251 2 1 SATA_PRX_C_DTX_N0_1 0.01U_0402_16V7K 4 B_OUTp 9 APE0 RDSATA_PRX_DTX_N0 C1243 1 2 RD@ 0.01U_0402_16V7K RDSATA_PRX_C_DTX_N0 5 4
B_OUTn A_PRE0 8 BPE0 RDSATA_PRX_DTX_P0 C1245 1 2 RD@ 0.01U_0402_16V7K RDSATA_PRX_C_DTX_P0 6 5
APE1 19 B_PRE0 7 6
BPE1 17 A_PRE1 15 RDSATA_PTX_DRX_P0 8 7
B_PRE1 A_OUTp 14 RDSATA_PTX_DRX_N0 9 8
TEST 18 A_OUTn 10 9
R1190 TEST 10
3 11 RDSATA_PRX_DTX_P0 11
2 1 13 GND B_INp 12 RDSATA_PRX_DTX_N0 12 11
+3VS GND B_INn 12
21 +5VS_HDD 13
EPAD 14 13
4.7K_0402_5% 14
2
PS8520CTQFN20GTR2-A_TQFN20_4X4 15
@ R1192 R1193 RD@ 16 15
0_0402_5% 4.7K_0402_5% 17 16
8520@ 8527@ 18 17
19 18
Check BOM structure
1
20 19
21 20
22 G1
23 G2
24 G3
+3VS G4
ACES_50406-02071-001
R1181 1 RD@ 2 4.7K_0402_5% APE0 R1187 1 @ 2 4.7K_0402_5% APE0 CONN@
SP010016L00
R1182 1 RD@ 2 4.7K_0402_5% BPE0 R1188 1 @ 2 4.7K_0402_5% BPE0
FAN1 Conn
SATA HDD1 Conn. +5VS C632
4.7U_0603_6.3V6K
1 2
JHDD1
SATA ODD Conn.
U31
1 1 8
C392 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2 GND JODD1 2 EN GND 7
<7> SATA_PTX_DRX_P0 A+ VIN GND
<7> SATA_PTX_DRX_N0 C393 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3 +VCC_FAN1 3 6
3 4 A- 1 4 VOUT GND 5 3
GND GND <22> EN_DFAN1 VSET GND
C391 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5 <7> SATA_PTX_DRX_P1 C401 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P1 2
<7> SATA_PRX_DTX_N0 B- A+
C394 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6 <7> SATA_PTX_DRX_N1 C402 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N1 3 APE8875M_SO8
<7> SATA_PRX_DTX_P0 B+ A-
7 4
+3VS GND C403 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N1 5 GND SA000050J00
<7> SATA_PRX_DTX_N1 B-
C405 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P1 6
<7> SATA_PRX_DTX_P1 B+
8 7
9 V33 GND
10 V33 +5VS
11 V33 8
+5VS 12 GND R1154 1 RS@ 2 0_0805_5%
80mils +5VS_ODD 9 DP +3VS C629
13 GND 10 +5V 4.7U_0603_6.3V6K
GND +5V
10U_0603_6.3V6M
.1U_0402_16V7K
R1155 1 RS@ 2 0_0805_5% +5VS_HDD 14 1 1 ODD_MD 11 1 2
V5 MD
1
C404
C407
15 T185 12 14
16 V5 @ 13 GND GND 15 R516
17 V5 GND GND
GND 10K_0402_5%
18 2 2
19 Reserved 23 SANTA_201902-1_13P
40mil JFAN1
2
+5VS_HDD 20 GND GND 24 CONN@ +VCC_FAN1 1
21 V12 GND 25 SP01001RS00 2 1 4
V12 GND <22> FAN_SPEED1 2 GND
100mils 22 26 3 5
V12 GND 3 GND
1
EMC@
10U_0603_6.3V6M
1U_0402_6.3V6K
.1U_0402_16V7K
C161
C397
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/ODD/FAN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 20 of 39
A B C D E
A B C D E
1000P_0402_50V7K
.1U_0402_16V7K
150U_6.3V_M_D2
C487 @EMC@
C994 @EMC@
1 2 2
C486
+
+3VALW +3V_HUB
R259
0_0603_5%
+3V_HUB 1 RS@ 2
10U_0603_6.3V6M
.1U_0402_16V7K
1 1
C282
C281
1 2
C279 .1U_0402_16V7K C279 close to U72 pin5
1 2 C280 close to U72 pin9 2 2
C280 .1U_0402_16V7K
C283 close to U72 pin14
1 2 C284 close to U72 pin21
C283 .1U_0402_16V7K
1 2
C284 .1U_0402_16V7K
3 +3V_HUB USB/B Conn. 3
5
U72
1
(USB Port 1, Port2)
AVDD DM0 USB20_N1 <9> +5VALW
9 2
AVDD DP0 USB20_P1 <9>
14 JUSB2
+3V_HUB 21 AVDD 3 1
+3V_HUB DVDD DM1 USB20_Hub_N1 <19> 1
27 4 To BT 2
V5 DP1 USB20_Hub_P1 <19> 2
28 3
V33 3
1
1 2 PSELF 6 USB20_Hub_N2 4
R261 100K_0402_5% R263 DM2 7 USB20_Hub_P2 USB_PWR_EN# 5 4
DP2 <22> USB_PWR_EN# 5
10K_0402_5% 18 6
1 2 HUB_DM4 26 TEST/SCL 12 USB20_Hub_N3 USB20_Hub_N2 7 6
R1134 1K_0402_5% PWREN1#/SDA DM3 13 USB20_Hub_P3 USB20_Hub_P2 8 7
Port4 disable.
2
SA000066310, S IC GL850G‐OHY32 QFN 28P USB2.0 HUB
4 4
Y9
HUB_XIN 1 4 1
1
C287 C286
20P_0402_50V8 20P_0402_50V8
2 3 2 HUB_XOUT Security Classification Compal Secret Data Compal Electronics, Inc.
2 Title
12MHZ_18PF_7V12000001
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB Conn & Hub GL850G
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 21 of 39
A B C D E
A B C D E
+1.8VALW_EC +3VALW_EC
1
+3VLP +3VALW_EC L31 +EC_VCCA R1090 R1091
BLM15AG121SN1D_L0402_2P 0_0603_5% 0_0603_5%
2 RS@ 1 1 2 +EC_VCCA
+1.8VALW +1.8VALW_EC NTPM@ TPM@
1
2
.1U_0402_16V7K
C502
.1U_0402_16V7K
C503
.1U_0402_16V7K
C504
.1U_0402_16V7K
C505
1000P_0402_50V7K
C506 @EMC@
1000P_0402_50V7K
C507 @EMC@
R236 1 1 1 1 2 2
+VCC_LPC
0_0805_5% C508
.1U_0402_16V7K R237 2 RS@ 1 0_0805_5% +VCC_LPC
1 2 1
2 2 2 2 1 1 +3VALW_EC
@
ECAGND <27>
111
125
R480 2 9012@ 1 47K_0402_5% EC_RST#
22
33
96
67
9
U28 +3V_PTP
C509 2 1 .1U_0402_16V7K
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
EC_VDD0
TP_CLK R478 1 2 4.7K_0402_5%
9012@ TP_DATA R479 1 2 4.7K_0402_5%
1 21 +3VS
+3VALW_EC 2 GATEA20/GPIO00 GPIO0F 23 BEEP#
<8> EC_KBRST# KBRST#/GPIO01 BEEP#/GPIO10 BEEP# <24>
3 26 EC_MUTE# R481 1 @ 2 10K_0402_5%
<23,8> EC_SERIRQ 4 SERIRQ GPIO12 27 EC_CLR_CMOS
<23,9> LPC_FRAME# LPC_FRAME# ACOFF/GPIO13
R484 1 @ 2 100K_0402_5% EC_PME# 5
<23,9> LPC_AD3 LPC_AD3
7 PWM Output C510 2 1 100P_0402_50V8J ECAGND
<23,9> LPC_AD2 LPC_AD2
R496 1 TPM@ 2 10K_0402_5% EC_SLP_S3# 8 63 BATT_TEMP
<23,9> LPC_AD1 LPC_AD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP <27>
10 LPC & MISC 64 VCIN1_BATT_DROP
<23,9> LPC_AD0 LPC_AD0 AD1/GPIO39 65 ADP_I
VCIN1_BATT_DROP
ADP_I <27,28>
<27> Reserve EC_CLR_CMOS for clear CMOS
+3VALW_EC 12 ADP_I/AD2/GPIO3A 66 AD_BID0
<9> LPC_CLK_EC CLK_PCI_EC AD Input AD3/GPIO3B
RP12 13 75 WLAN_PME#
<18,19,23,8> PLT_RST_BUF# PCIRST#/GPIO05 AD4/GPIO42 WLAN_PME# <19>
1 8 EC_SMB_CK1 EC_RST# 37 76 EC_PME#
EC_RST# IMON/AD5/GPIO43 EC_PME# <18>
2 7 EC_SMB_DA1 20 CLR_CMOS# <8>
<8> EC_SCI# EC_SCII#/GPIO0E
3 6 EC_SMB_CK2 38
<19> WLAN_ON GPIO1D
+3VS 4 5 EC_SMB_DA2
1
68 LAN_PWR_EN
DAC_BRIG/GPIO3C LAN_PWR_EN <18> D
2.2K_0804_8P4R_5% DA Output 70 EN_DFAN1
+1.8VALW_EC EN_DFAN1/GPIO3D EN_DFAN1 <20>
KSI0 55 71 TP_EN TP_EN <23> EC_CLR_CMOS 2 Q51
KSI1 56 KSI0/GPIO30 IREF/GPIO3E 72 KBL_EN# G
KSI1/GPIO31 CHGVADJ/GPIO3F KBL_EN# <23> 2N7002K_SOT23-3
2
KSI2 57 S @
R488 1 9022@ 2 10K_0402_5% EC_SMI# KSI3 58 KSI2/GPIO32 83 EC_MUTE# R483
3
R492 1 9022@ 2 10K_0402_5% EC_SCI# KSI4 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 USB_PWR_EN# EC_MUTE# <24>
KSI4/GPIO34 USB_EN#/GPIO4B USB_PWR_EN# <21> 10K_0402_5%
2 R494 1 9022@ 2 10K_0402_5% EC_LID_OUT# KSI5 60 85 EC_I2C_TPCLK 2
KSI5/GPIO35 CAP_INT#/GPIO4C EC_I2C_TPCLK <23> @
KSI6 61 PS2 Interface 86 EC_I2C_TPDAT
EC_I2C_TPDAT <23>
1
KSI7 62 KSI6/GPIO36 EAPD/GPIO4D 87 TP_CLK
+3VALW_EC KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK <23>
KSO0 39 88 TP_DATA
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <23>
KSO1 40
KSO2 41 KSO1/GPIO21
R489 1 9012@ 2 10K_0402_5% EC_SMI# KSI[0..7] KSO3 42 KSO2/GPIO22 97 ENBKL
<23> KSI[0..7] KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 ENBKL <6>
R493 1 9012@ 2 10K_0402_5% EC_SCI# KSO4 43 98
KSO[0..17] KSO4/GPIO24 WOL_EN/GPXIOA01 TP_PWR_EN <23>
R495 1 9012@ 2 10K_0402_5% EC_LID_OUT# KSO5 44 99
<23> KSO[0..17]
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH
TXE_DBG <7>
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH <27>
H_PROCHOT#_EC R1169 1 RS@ 2 0_0402_5%
KSO7/GPIO27 SPI Device Interface
KSO8 47
@EMC@ KSO9 48 KSO8/GPIO28 119 EC_MISO
KSO9/GPIO29 SPIDI/GPIO5B EC_MISO <8>
C511 1 2 0.01U_0402_16V7K PLT_RST_BUF# KSO10 49 120 EC_MOSI R482 2 RS@ 1 0_0402_5% H_PROCHOT# <7>
KSO10/GPIO2A SPIDO/GPIO5C EC_MOSI <8> <33> VR_HOT#
KSO11 50 SPI Flash ROM 126 EC_SPICLK
KSO11/GPIO2B SPICLK/GPIO58 EC_SPICLK <8>
1
KSO12 51 128 EC_SPICS#
KSO12/GPIO2C SPICS#/GPIO5A EC_SPICS# <8> D
ESD request KSO13 52
KSO13/GPIO2D
KSO14 53 H_PROCHOT#_EC 2 Q50
KSO15 54 KSO14/GPIO2E 73 G
KSO15/GPIO2F ENBKL/AD6/GPIO40 2N7002K_SOT23-3
R485 2 1 100K_0402_5% PMC_CORE_PWROK KSO16 81 74 TP_INT#_EC S 9012@
KSO16/GPIO48 PECI_KB930/AD7/GPIO41 TP_INT#_EC <23>
KSO17 82 89
3
KSO17/GPIO49 FSTCHG/GPIO50 90 BATT_BLUE_LED#
BATT_CHG_LED#/GPIO52 BATT_BLUE_LED# <23>
91
77 CAPS_LED#/GPIO53 92 PWR_LED
<27,28> EC_SMB_CK1 EC_SMB_CK1/GPIO44 GPIO PWR_LED#/GPIO54 PWR_LED <23>
Charger and BATT <27,28> EC_SMB_DA1
78
EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55
93 BATT_AMB_LED#
BATT_AMB_LED# <23>
79 SM Bus 95 SYSON Latest design guide suggest change to
<13,14,19,9> EC_SMB_CK2 EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON <30>
To SOC <13,14,19,9> EC_SMB_DA2
80
EC_SMB_DA2/GPIO47 VR_ON/GPIO57
121 VR_ON
VR_ON <33>
127 74LVC1G06.
PM_SLP_S4#/GPIO59
6 100 EC_RSMRST#
<8> EC_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_RSMRST# <8>
14 101 EC_LID_OUT#
3 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# <8> 3
15 102 VCIN1_PROCHOT R509 2 RS@ 1 0_0402_5% ACIN <28,8>
<8> EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 VCIN1_PROCHOT <27>
16 103 H_PROCHOT#_EC
<15> TS_RST# GPIO0A H_PROCHOT#_EC/GPXIOA06 H_PROCHOT#_EC <27>
<15> TS_EN 17 104 MAINPWON EMC@
GPIO0B VCOUT0_PH/GPXIOA07 MAINPWON <27,29>
18 GPO 105 EC_BKOFF# EC_ACIN C512 2 1 100P_0402_50V8J
<19> WL_OFF# GPIO0C BKOFF#/GPXIOA08 EC_BKOFF# <15>
19 GPIO 106 LAN_PHY_EN
GPIO0D PBTN_OUT#/GPXIOA09 LAN_PHY_EN <18>
25 107
<29,31,32> SPOK EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10
28 108
<20> FAN_SPEED1 29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11
30 EC_PME#/GPIO15
<19> E51TXD_P80DATA EC_TX/GPIO16
31 110 EC_ACIN
<19> E51RXD_P80CLK EC_RX/GPIO17 AC_IN/GPXIOD01
32 112 EC_ON
<8> PMC_CORE_PWROK PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON <29>
34 114 ON/OFFBTN#
<23> PWR_SUSP_LED# SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFFBTN# <23>
36 GPI 115 LID_SW#
NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# <23> +3VALW_EC
116 SUSP#
SUSP#/GPXIOD05 SUSP# <10,25,30,31,32>
117 VGATE
GPXIOD06 VGATE <33> +1.8VALW_EC
118
PECI_KB9012/GPXIOD07
AGND/AGND
122
<8> PBTN_OUT# XCLKI/GPIO5D
123 124 +V18R R1092 1 RS@ 2 0_0603_5%
GND/GND
GND/GND
GND/GND
GND/GND
2
1
For 9022 +V18R, +EC_VCCLPC can be
GND0
@ @
C515 changed to 1.8V if supports 1.8V I/F R696 R697
4.7U_0603_6.3V6K 10K_0402_5% 10K_0402_5%
KB9012QF-A4_LQFP128_14X14 2 9012@
11
24
35
94
113
69
1
Part Number = SA00004OB30 20mil VCIN0_PH
9012@ VCIN1_PROCHOT
ECAGND 1 2
+3VALW_EC L32
BLM15AG121SN1D_L0402_2P
Board ID
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE KB9012/KB9022
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 22 of 39
A B C D E
A B C D E
+3VALW +3V_PTP
U10 W=20mils H3 H4 H9 H10 H11 H8 H17 FD1 FD2
1 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0
5 VOUT
KB Conn. VIN
1 @ @
1
2
1
4 GND C368 FIDUCIAL_C40M80 FIDUCIAL_C40M80
JKB1 VIN 4.7U_0603_6.3V6K
1 2
3 +3V_PTP FD3 FD4
KSO0 1 C141 EN @ @ @ @ @ @ @
KSO1 2 1 1U_0402_6.3V6K G5243AT11U_SOT23-5
KSO2 3 2 2 TP_SDATA 1 2 H13 H14 H15 H12 H21 @ @
1
KSO3 4 3 R1156 2.2K_0402_5% H_4P0 H_4P0 H_4P0 H_3P2 H_3P2
1 KSO4 5 4 TP_SCLK 1 2 FIDUCIAL_C40M80 FIDUCIAL_C40M80 1
5 <22> TP_PWR_EN
KSO5 6 R1157 2.2K_0402_5%
KSO6 7 6 TP_INT#_R 2 1
1
KSO7 8 7 R633 10K_0402_5%
KSO8 9 8
KSO9 10 9
KSO10 11 10 +3V_PTP @ @ @ @ @
KSO11 12 11
KSO12 13 12 H22 H23
KSO13 14 13 TP module Conn. R1170 1 @ 2 0_0402_5% +3VALW H_3P0N H_3P0X3P5N Stand off for BATT/B.
KSO14 15 14
KSO15 16 15 R1171 1 @ 2 0_0402_5%
16 +3VS
KSO16 17 R1164 1 RS@ 2 0_0402_5% TP_SDATA @ @
<9> I2C2_SDA_TP
1
KSO17 18 17 JTP1
KSI0 19 18 8 C663 1 2 .1U_0402_16V7K R1165 1 RS@ 2 0_0402_5% TP_SCLK
19 8 <9> I2C2_SCL_TP
KSI1 20 9 7 TP_CLK
20 G2 7 TP_CLK <22>
KSI2 21 10 6 TP_DATA
21 G1 6 TP_DATA <22>
KSI3 22 5 R1167 1 @ 2 0_0402_5%
22 5 <22> EC_I2C_TPDAT
KSI4 23 4 TP_SDATA
KSI5 24 23 4 3 TP_SCLK R1168 1 @ 2 0_0402_5%
24 3 <22> EC_I2C_TPCLK
KSI6 25 27 2 TP_INT#_R
KSI7 26 25
26
G1
G2
28 2
1
1 TP_EN TP_EN <22> LED
CVILU_CF31081D0R4-10-NH R1163 1 RS@ 2 0_0402_5% TP_INT#_R
<22> TP_INT#_EC
E-T_6905-E26N-01R CONN@
CONN@
SP01000IJ00 +1.8VS LED6 +3VALW
1
KSO[0..17] 1 1 BATT_AMB_LED# 3 4 1 2
2 KSO[0..17] <22> <22> BATT_AMB_LED# A 2
R1166 @EMC@ @EMC@ R698 390_0402_5%
2.2K_0402_5% C551 C553
2
G
100P_0402_50V8J 100P_0402_50V8J LTST-C295TBKF-CA_AMBER-BLUE
2 2 LED7
2
TP_INT# 3 1 TP_INT#_R
<8> TP_INT#
PWR_LED# 1 2 1 2
D
Q77 B R700 200_0402_1%
MESS138W-G_SOT323-3
<22> PWR_SUSP_LED# PWR_SUSP_LED# 3 4 1 2
A R701 390_0402_5%
LTST-C295TBKF-CA_AMBER-BLUE
KB BackLight Conn. Reserve
BL@
Q44
+5VS DMG2301U-7_SOT23-3
JBL1
D
3 1+5VS_BL 4 6
PWR/B Conn. 3 4
3
G2
G1
5
2 PWR_LED#
JPWR1 +5VALW 1 2
G
2
1
1
1 +3VALW BL@
1 2 1
100K_0402_5% 2 R451 KBL_EN_R ACES_50504-0040N-001 D
2 +3VLP
3 LID_SW# LID_SW# <22> SP01000Z300 <22> PWR_LED 2 Q17
3 4 PWR_LED# CONN@ G
4 2N7002K_SOT23-3
2
.1U_0402_16V7K
.1U_0402_16V7K
7 5 ON/OFFBTN# S
G1 5
C525
C524
8 6 1 1 R452
3
G2 6
RS@ 100K_0402_5%
ACES_51524-0060N-001 <22> KBL_EN# 1 2
SP010014M10 @ @
1
3 CONN@ R592 2 2 3
0_0402_5%
+3VALW +3VALW_TPM
TPM Reserve +3VS_TPM
+3VALW_TPM +3VS_TPM
TPM@ U70 TPM@
0_0603_5% 1 2 R1203 5
1 VSB 10
ON/OFF BTN GPIO0/XOR_OUT VDD
1
+3VLP
10U_0603_6.3V6M
.1U_0402_16V7K
2 19
GPIO1 VDD
C421 TPM@
C398 TPM@
1 1 R517 TPM@ 6 24
Test only EMC@
C408 1 2 .1U_0402_16V7K
10K_0402_5% 0_0402_5% 1 @ 2 R1172 TPM_BADD 9
15
GPIO2/GPX
GPIO3/BADD
VDD
8
<9> LPC_CLKRUN# GPIO4/CLKRUN# TEST
2
2 2 LPC_CLKRUN# 26
<22,9> LPC_AD0 LAD0/MISO
2
near Pin5 23
<22,9> LPC_AD1 LAD1/MOSI
R534 20 3
<22,9> LPC_AD2 LAD2/SPI_IRQ# NC
SW1 @ 100K_0402_5% 17 12
<22,9> LPC_AD3 LAD3 NC
TJE-532QR5_6P 13
1 3 NC 14
Internal PU
1
+3VS +3VS_TPM 28 NC
Internal PU LPCPD#
2 4 ON/OFFBTN# BADD SELECTION 21
ON/OFFBTN# <22> <9> LPC_CLK_TPM LCLK/SCLK
TPM@ 22
<22,9> LPC_FRAME# LRFAME#/SCS#
0_0603_5% 1 2 R1204 0 EEh ‐ EFh <18,19,22,8> PLT_RST_BUF# 16 4
5
6
27 LRSET#/SPI_RST# GND 11
<22,8> EC_SERIRQ SERIRQ GND
10U_0603_6.3V6M
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
7 18
* 1 7Eh ‐ 7Fh PP GND
C422 TPM@
C399 TPM@
C400 TPM@
C406 TPM@
1 1 1 1 25
GND
4 4
NPCT650AA0WX_TSSOP28
2 2 2 2 @EMC@ @EMC@ SA00007IO00
SW2 DBG@ near Pin10,19,24 LPC_CLK_TPM R148 1 2 33_0402_5% C175 1 2 22P_0402_50V8J
TJE-532QR5_6P
1 3
2 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title
5
6
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB/TP/LED/TPM/Screw Hole
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 23 of 39
A B C D E
A B C D E
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z SPKL- R1097 1 RS@ 2 0_0603_5% SPK_L- 4 6
1 1 (output = 300 mA) 4 G2
1
2
C1186
C1187
C1188
@EMC@
ACES_88266-04001
2
@ SP02000K200 GND
2
2 2
MESC5V02BD03_SOT23-3
MESC5V02BD03_SOT23-3
GND CONN@
D41 @EMC@
D42 @EMC@
+AVDD1_HDA
1 1
Place near Pin41 Place near Pin46 20mil
GND R1093 1 RS@ 2 0_0603_5%
+VDDA
1 1
1
1
+1.5VS_DVDDIO
0.1U_0402_16V4Z
C1189
0.1U_0402_16V4Z
C1190
10U_0603_6.3V6M
C1191
GND
R1201 1 RS@ 2 0_0603_5% 20mil
+1.5VS
2
2 @ 2 GND GND
1U_0402_6.3V6K
0.1U_0402_16V4Z
2 1
C2141
C1192
+MICBIAS2
Place near Pin26 GNDA
1 2 Int. MIC Reserve
2
+1.5VS_VDDA R1099 1 RS@ 2 0_0603_5% @ R1195
+3VS_DVDD +1.5VS
Place near Pin9 GND 1 2.2K_0402_5%
1
0.1U_0402_16V4Z
C1193
10U_0603_6.3V6M
C1194
15mil @EMC@
15mil JMIC1
20mil
1
+3VS R1098 1 RS@ 2 0_0603_5% INT_MIC_R R1196 1 2 0_0603_5% INT_MIC_R_1 1
2
2 2 1
2
10U_0603_6.3V6M
1 1 0.1U_0402_16V4Z 1
C1195
41
46
26
40
1
9
U66 ACES_88266-02001
SP020008Y00
DVDD
DVDD-IO
PVDD1
PVDD2
AVDD1
AVDD2
Place near Pin 1 GND GND CONN@
GNDA
Internal MIC Reserve LINE1-L 22
LINE1-R 21 LINE1-L(PORT-C-L) 43 SPKL- +3VS +3VS
2 INT_MIC_R 2 @ 1 INT_MIC C770 1 2 LINE2_C_L LINE1-R(PORT-C-R) SPK-OUT-L-
SPK-OUT-L+
42 SPKL+ Digital MIC MIC2 @ 2
R726 1K_0402_5% @ 4.7U_0603_6.3V6K 24 6 5 DMIC_DATA
C62 1 2 C769 1 2 LINE2_C_R 23 LINE2-L(PORT-E-L) 45 SPKR+ MIC1 @ VDD DATA
GNDA LINE2-R(PORT-E-R) SPK-OUT-R+
@EMC@ 1000P_0402_50V7K @ 4.7U_0603_6.3V6K 44 SPKR- 6 5 DMIC_DATA_S 2 4 DMIC_CLK
RING2 17 SPK-OUT-R- VDD DATA CS CLK
SLEEVE 18 MIC2-L(PORT-F-L) /RING2 2 4 DMIC_CLK 2 R1199 1 1 3
Combo MIC 40mil MIC2-R(PORT-F-R) /SLEEVE CS CLK ENHANCE GND
3
32 HP_LEFT 0_0402_5%
HPOUT-L(PORT-I-L)
2
+MICBIAS +MICBIAS 31 33 HP_RIGHT 1 3 2DMIC@ S MIC ST MP45DT02TR
LINE1-VREFO-L HPOUT-R(PORT-I-R) ENHANCE GND
MESC5V02BD03_SOT23-3
+MICBIAS2 +MICBIAS2 30
LINE1-VREFO-R
SYNC
10 HDA_SYNC_AUDIO HDA_SYNC_AUDIO <7> S MIC ST MP45DT02TR
Main
2
D43 @EMC@
0_0402_5%
R1198 1DMIC@
0.1U_0402_16V4Z
0_0402_5%
R1200 1DMIC@
DMIC_DATA 2 6 HDA_BITCLK_AUDIO 2
GPIO0/DMIC-DATA BCLK HDA_BITCLK_AUDIO <7>
C2140
DMIC_CLK 3
GPIO1/DMIC-CLK 1 @EMC@2
R1100
1
0_0402_5%
2 C1197 @EMC@
22P_0402_50V8J
GND Slave 1
D48
MESC5V02BD03_SOT23-3
EC_MUTE# 47
ALC283-CG 5 HDA_SDOUT_AUDIO HDA_SDOUT_AUDIO <7> @EMC@
1
HDA_RST_AUDIO# 11 PDB SDATA-OUT 8 HDA_SDIN0_AUDIO 1 2 @
HDA_SDIN0 <7>
1
RESETB SDATA-IN
48
R1102 33_0402_5%
左聲道 右聲道
SPDIF-OUT/GPIO2 +MIC2_VREFO
MONO_IN 12
PCBEEP 16
Close codec MONO-OUT
HP_PLUG# R1103 2 1 39.2K_0402_1% SENSE_A 13
14 SENSE A LDO3_CAP C1198 2 1 10U_0603_6.3V6M +MIC2_VREFO
10mil SENSE B GND
1 29
CBP 37 MIC2-VREFO
C1199 CBN 35 CBP 7 LDO2_CAP C1200 2 1 10U_0603_6.3V6M
CBN LDO3-CAP GNDA
1
2.2U_0402_6.3V6M 39
2 LDO2-CAP 27 LDO1_CAP C1201 2 1 10U_0603_6.3V6M HPOUT_L_2 R1107 R1108
LDO1-CAP GNDA
+3VS_DVDD 36 HPOUT_R_2 2.2K_0402_5% 2.2K_0402_5%
CPVDD R1104 1 2 100K_0402_5% 10mil
2
28 CODEC_VREF L57 EMC@
2
VREF
MESC5V02BD03_SOT23-3
+3VS 100K_0402_5% 2 @ 1 R1123 CPVREF 20 1 1 1 SLEEVE_L 1 2 SLEEVE
CPVREF
0.1U_0402_16V4Z
C1203
2.2U_0402_6.3V6M
C1204
10U_0603_6.3V6M
C1205
D45
15 JDREF 20K_0402_1% 1 2 R1106 GNDA BLM15PX330SN1D_2P
3 10U_0603_6.3V6M 2 1 C1202 MIC_CAP 19 JDREF 34 CPVEE RING2_L 1 2 RING2 3
GNDA MIC-CAP CPVEE BLM15PX330SN1D_2P
Close codec
2
2 2 2
@EMC@
680P_0402_50V7K
680P_0402_50V7K
1 1 1 L58 EMC@
AZ5123-02S.R7G_SOT23-3
C2143 EMC@
C2142 EMC@
4
49 DVSS 25 C1206
Thermal PAD AVSS1
D46
38 2.2U_0402_6.3V6M
1
AVSS2 2 2 2
EMC@
ALC283-CG_MQFN48_6X6 Place next pin27 GND
GND
GND
1
GNDA GNDA
R1111 C1207 GND
47K_0402_5% 1U_0402_6.3V6K GND Headphone Jack
2 @ 1 BEEP#_R 1 2 MONO_IN
<22> BEEP# +3VLP JHP1
RING2_L 3
2
100P_0402_50V8J
4.7K_0402_5%
47K_0402_5%
R1115
2 1
<9> SOC_SPKR
2
100K_0402_5%
R1118
HP_PLUG# 5
2
1
HPOUT_R_2 2
1
D
5 G LINE1-L C1209 1 2 4.7U_0603_6.3V6K SLEEVE_L 4
@ S
2 2 7
6
DMN66D0LDW-7_SOT363-6
D
2 G @EMC@ @EMC@
R1122 2 1 10K_0402_5% S +MICBIAS D44 330P_0402_50V7K 330P_0402_50V7K SINGA_2SJ3080-001111F
<7> HDA_RST_AUDIO# 1 1
J2 J3 Q75B 2 R1120 2 1 4.7K_0402_5% GNDA DC23000B300
1
U11,U59 change to SA00006FD00, S IC APE8990GN3B DFN 14P DUAL LOAD SW
VIH=1.2~5.5V Rise Time:
3.3V@82k/0.1uF=3.042ms 1.8V@330pF = 485.28us
U59 JP38JP@
3.3V@47k/0.1uF=1.893ms 1 14 +1.8VS_OUT
1.35V@330pF = 363.96us
+1.8VALW VIN1 VOUT1 +1.8VS
R1055 2 13
82K_0402_5% VIN1 VOUT1 C1123 JUMP_43X79
SUSP# 2 1 1.8VS_ON 3 12 2 1 330P_0402_50V7K
ON1 CT1
C1125 1 2 +5VALW 4 11
VBIAS GND
0701 update .1U_0402_16V7K
2 1 1.35VS_ON 5 10 2 1
2 R1056 ON2 CT2 330P_0402_50V7K 2
47K_0402_5% +1.35V_L 6 9 C1127 JP39JP@
1 2 7 VIN2 VOUT2 8 +1.35VS_OUT
VIN2 VOUT2 +1.35VS
C1128
.1U_0402_16V7K 15 JUMP_43X79
GPAD
TPS22966DPUR_SON14_2X3
+1.0VALW TO +1.0VS
0708:Change to SB00000PZ00 / need apply footprint +5VALW
2
ME4856_SO8
8 1 R1057
2 7 2 2 100K_0402_5%
C1129 6 3 C1130
3 4.7U_0603_6.3V6K 5 4.7U_0603_6.3V6K 3
1
SUSP
1 1 <30> SUSP
4
1
@
R1052 D
470_0603_5% 2
+5VALW <10,22,30,31,32> SUSP#
G Q69
1
1
S 2N7002K_SOT23-3
2 1 1.0VS_GATE +1.0VS_R R1059
3
1
R1061 10K_0402_5%
10K_0402_5% 1 D
1
C1131 2 SUSP
2
D .1U_0402_16V7K G
SUSP 2 S Q71 @
G 2 2N7002K_SOT23-3
3
Q70 S
2N7002K_SOT23-3
3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC INTERFACE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 25 of 39
A B C D E
A B C D
1 1
1
GND
1
EMI@ PC102
100P_0603_50V8 EMI@ PC103
2
1000P_0603_50V7K
2
2 2
3 3
@PR111
@ PR111
0_0402_5%
1 2
+3VLP +CHGRTC
- PBJ101 @ + PR112
560_0603_5%
PR113
560_0603_5%
2 1 1 2 1 2 +RTCBATT
ML1220T13RE
4 4
+3VLP
1
@ PC202
0.1U_0603_25V7K
2
@ PJP201
1
1
WAFER SUYIN 200109MS020G209ZR 20P P2 1
1 2 @ PR204 @ PR205
1 2 10K_0402_1% 10K_0402_1%
3 4
2
3 4
1
PR209 100_0402_1% @ PU201
2 1 EC_SMDA 5 6 TH 2 1 @ PR206 1 8
<22,28> EC_SMB_DA1 5 6 +3VLP 100K_0402_1% VCC TMSNS1
PR208 100_0402_1% PR201
2 1 EC_SMCK 7 8 BI 6.49K_0402_1% 2 7 2 1
<22,28> EC_SMB_CK1 7 8 GND RHYST1
1 2
BATT_TEMP <22>
2
9 10 PR210 MAINPWON 3 6 @ PR207
9 10 OT1 TMSNS2
1
1K_0402_1% 47K_0402_1%
1
11 12 4 5
11 12 OT2 RHYST2 @ PH201
13 14 PR211 G718TM1U_SOT23-8 100K_0402_1%_NCP15WF104F03RC
13 14 0_0402_1%
2
15 16
2
15 16
17 18
17 18
19 20
19 20
EMI@ PL201
HCB2012KF-121T50_0805
BATT_S1 1 2 BATT+
<45,47>
1
EMI@ PC201
1000P_0402_50V7K
2
2
For KB9012 For KB9022 Need confirm the setting 2
OTP OTP
For KB9012
sense 10mΩ
Active Recovery
92℃ 1.2V 1.0V
+EC_VCCA
ADP_I <22,28>
9022@ PR216
1
3 3
9012@ 16.9K_0402_1%
1
PR216
22.6K_0402_1% PR202
10K_0402_1%
2
<22> VCIN0_PH
B value:4250K±1%
@9022@ PR231
2
0_0402_5%
1
1 2
VCIN1_BATT_DROP <22> PH202
100K_0402_1%_NCP15WF104F03RC
1
2
@9022@ PC203
2
1
PR203
0.1U_0402_25V6 @9022@ PR229 44.2K_0402_1%
1
COMMON PART
2
10K_0402_1%
2
4 4
<22> ECAGND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BATTERY CONN / OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Custom Bay Trail M LA-B211P 1.0
Vgs = 20V
1
PQ301 D
2 Vds = 60V B+
G Id = 250mA
S 2N7002KW_SOT323-3
3
PR302
PR301
1 2 1 2 Rds(on) typ = 35mohm max
1
Vgs = 20V Rds(on) = 35mohm max 1
1M_0402_5% 3M_0402_5% max Power loss 0.22W for 90W;0.12W for 65W system Vgs = 20V
Need check the SOA for inrush Vds = 30V CSR rating: 1W Vds = 30V
VIN
P1
ID = 7.7A (Ta=70C)
P2
VACP-VACN spec < 80.64mV COMMON PART ID = 7.7A (Ta=70C)
1 PR303 PL301 CHG_B+
2 1 8 0.02_1206_1% 1UH_2.8A_30%_4X4X2_F 8 1
5 3 2 7 1 4 1 2 7 2
Isat: 4A
2200P_0402_25V7K
10U_0805_25V6K
10U_0805_25V6K
3 6 6 3
2200P_0402_50V7K
0.1U_0402_25V6
5 2 3 5
DCR: 27mohm
0.1U_0402_25V6
@EMI@ PC306
4
1
0_0402_5%
PC303
PC304
EMI@ PC305
0.01U_0402_50V7K
PQ302
PC301
@ PR304
4
1
1
AON6414AL_DFN8-5 PQ303 VIN PQ304
PC302
PC307
AO4406AL_SO8 AO4406AL_SO8
2
2
VF = 0.5V
2
2
3
2
PD301
BQ24725A_ACDRV_1 BAS40CW_SOT323-3
0.1U_0402_25V6
0.1U_0402_25V6
BQ24725A_BATDRV 1 2BQ24725A_BATDRV_1
Rds(on) = 30mohm max
1
1
PC308
PC310
PR305
Vgs = 20V
1 1
1 2
10_1206_1%
PC311 4.12K_0603_1%
0.047U_0402_25V7K Vds = 30V
PR306
2
PC309 1 2
0.1U_0402_25V6 ID = 7A (Ta=70C)
VF = 0.37V
5
2.2_0603_5%
AON7408L_DFN8-5
PR307
PD302
BQ24725A_VCC2
RB751V-40_SOD323-2
7X7X3 Power loss: 0.32W for 3.5A
PQ305
PR308
BQ24725A_ACP
0_0603_5%
BQ24725A_REGN
Isat: 3.8A CSR rating: 1W
BQ24725A_BST2
2
2
DH_CHG 1 2 4 2
BQ24725A_LX
4.12K_0603_1%
4.12K_0603_1%
1
PC312 BATT+
PR309
PR310
DH_CHG
1 2 PL302
10UH_3.5A_20%_7X7X3_M PR311
3
2
1
1U_0603_25V6K 1 2 0.01_1206_1%
BQ24725A_ACN
BQ24725A_LX 1 2 CHG 1 4
2
PC313
5
1U_0603_25V6K 2 3
AON7408L_DFN8-5
20
19
18
17
16
PU301
CSON1
CSOP1
1
680P_0402_50V7K 4.7_1206_5%
VCC
PHASE
HIDRV
BTST
REGN
10U_0805_25V6K
10U_0805_25V6K
PQ306
0.1U_0402_25V6
0.1U_0402_25V6
PAD
PC314
PC315
1
1
1 15 DL_CHG 4
ACN LODRV
PC316
PC317
2
2
2 14
ACP GND PR313
3
2
1
2
1
BQ24725ARGRR_QFN20_3P5X3P5 10_0603_1%
BQ24725A_CMSRC 3 13 SRP1 2 CSOP1
CMSRC SRP
1
PR314
2
6.8_0603_1%
BQ24725A_ACDRV 4 12 SRN1 2 CSON1
2
ACDRV SRN PC318
0.1U_0603_16V7K
+3VLP 1 2 5
ACOK BATDRV
11 BQ24725A_BATDRV **Design Notes**
PR315 100K_0402_1%
#For 65 /90W system, 3S1P/3S2P battery
ACDET
IOUT
SDA
ILIM
SCL
Maximum Charging current 3.5A
<22,8> ACIN Maximum Battery discharge power 55W.
#Register Setting
6
10
+3VALW
3 3
BQ24725A_ILIM 1 2
#Circuit Design
BQ24725A_IOUT
PR316
1. ACOK,ILIM pull high voltage need base on 3/5V enable control
100K_0402_1%
0.01U_0402_25V7K
316K_0402_1%
1
2. Use 10X10 choke and 3X3 H/L Side MOSFET
PC320
PR317
1
PR318
422K_0402_1% Charge current 3.5A
VIN 1 2 Power loss : 1.82W
2
Power density : 0.81 (15X15)
2
#Protect function
66.5K_0402_1%
EC_SMB_CK1 <22,27>
Vin Dectector 1. ACOVP : ACDET voltage > 3.14V
100P_0402_50V8J
1
1
PC321
L-->H 17.16V 17.63V 18.12V 3. ACOC : 3.33 X Input current DAC setting(default)
2
EC_SMB_DA1 <22,27>
4. CHGOCP : 3/4.5/6A based on current current setting
2
4
Close EC chip 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Charger
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Bay Trail M LA-B211P 1.0
1 1
1
150K_0402_1%
PU401
B+
PR404
EMI@ PL401 7 1 3V5V_EN PC402 PR403
HCB2012KF-121T50_0805 IN EN1 0.022U_0402_25V7K 1K_0402_5%
2200P_0402_50V7K
1 2 3V_VIN 8 3 3V_FB 1 2 1 2
IN EN2 PR401 PC403
2
10U_0805_25V6K
10U_0805_25V6K
@EMI@ PC401
EMI@ PC404
0.1U_0402_25V6
6 1
BST_3V 2 1 2
BS
1
1
PC406
1_0603_5%
PC405
0.1U_0603_25V7K
PL402
2
2
10 LX_3V 1 2
@ LX +3VALWP
9 4 1.5UH_PCMB053T-1R5MS_6A_20%
GND OUT
@EMI@
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
PR405
1
1
680P_0603_50V7K 4.7_1206_5%
2 5
+3VALWP PG LDO +3VLP
@ PC407
PC408
PC409
PC410
1
SY8208BQNC_QFN10_3X3
2
PC411
13V_SN
4.7U_0603_6.3V6M
2
1
PR412
100K_0402_5% 3.3V LDO 150mA~300mA
@EMI@
PC412
2
2
2
Vout is 3.234V~3.366V 2
<22,31> SPOK
TDC=6A
@ PJ401
+3VALWP 1 2 +3VALW
1 2
JUMP_43X118
@ PJ402
+5VALWP 1 2 +5VALW
1 2
Vout is 4.998V~5.202V
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
TDC=6A
PC414
PC415
EMI@ PC417
@EMI@ PC418
3 5V_FB PC416
EN2 @ PR407 0.1U_0603_25V7K
6 BST_5V 1 2 1 2
2
BS
@ 0_0603_5%
PL404
9 10 LX_5V 1 2 +5VALWP
GND LX
VCC_3V 5 4 1.5UH_PCMB053T-1R5MS_6A_20%
VCC OUT
680P_0603_50V7K 4.7_1206_5%
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
PR408
1
@EMI@
SPOK 2 7
PG LDO VL
1
PC419
PC420
PC421
PC422
PC423
4.7U_0603_6.3V6M
3 3
SY8208CQNC_QFN10_3X3
2
15V_SN
2
2
1
PC424
4.7U_0603_6.3V6M
2
PC425
@EMI@
PR409
2.2K_0402_5%
1 2 5V LDO 150mA~300mA
<22> EC_ON
@ PR410
1 2
<22,27> MAINPWON 0_0402_5%
3V5V_EN
1M_0402_1%
4.7U_0402_6.3V6M
1
PC426
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
3VALW/5VALW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Bay Trail M LA-B211P 1.0
D D
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
1
1
@EMI@ PC502 +0.675VSP
EMI@ PC503
PC504
PC505
DH_1.35V
2
1
PC501
10U_0805_6.3V6K
10U_0805_6.3V6K
SW_1.35V
0.1U_0603_25V7K
1
PC506
PC507
5
16
17
18
19
20
C PU501 C
2
PHASE
UGATE
BOOT
VTT
VLDOIN
COMMON PART
21
PQ501 PAD
AON7408L_DFN8-5 4 DL_1.35V 15 1
LGATE VTTGND
14 2
PL502 PR502 PGND VTTSNS
1
2
3
1UH_11A_20%_7X7X3_M 9.1K_0402_1%
1 2 1 2 CS_1.35V 13 3
+1.35VP PC508 CS RT8207MZQW_WQFN20_3X3 GND
1
1U_0603_10V6K
1 2 12 4 VTTREF_1.35V
VDDP VTTREF
5
SF000002Z00 H=4.5 @EMI@ PR503 PR504
1
330U_2.5V_ESR17M_6.3X4.5
1 4.7_1206_5% 5.1_0603_5%
COMMON PART
1 2 VDD_1.35V 11 5 PC510
1 2
PGOOD
2
ESR=15m ohm
TON
1
@EMI@ PC512 4
FB
S5
S3
2 680P_0402_50V7K PC513
+5VALW
2
1U_0603_10V6K
10
6
PQ502
1 2
+1.35VP
1
2
3
FB_1.35V
AON7506_DFN33-8-5
EN_0.675VSP
EN_1.35V
TON_1.35V
PR505 100K_0402_5% PR506
8.06K_0402_1%
<5> DDR_PWROK 2 1 +1.35VP
PR507
B 887K_0402_1% B
1
Co-Lay H/S Rds(on): 27mohm(Typ), 34mohm(Max)
Idsm: 7.5A@Ta=25C, 5.5A@Ta=70C PR509 PR508
680K_0402_1% 10K_0402_1%
1 2
<22> SYSON
2
Mode Level +0.675VSP VTTREF_1.35V L/S Rds(on): 9.9mohm(Typ), 13mohm(Max)
S5 L off off Idsm: 13.5A@Ta=25C, 11A@Ta=70C
1
@ PC514
S3 L off on 0.1U_0402_16V7K
S0 H on on Choke: 7x7x3
2
Rdc=8.3mohm(Typ), 10mohm(Max)
Note: S3 - sleep ; S5 - power off PR510
200K_0402_1%
Switching Frequency: 285kHz 1 2 @ PJ501
<10,22,25,31> SUSP# +1.35VP 1 2 +1.35V
Ipeak=10A PC515 1 2
Iocp~13A
1
JUMP_43X118
D
1
0.1U_0402_16V7K @ PJ502
OVP: 110%~120% 2 1 2
VFB=0.75V, Vout=1.515V
2
<> SUSP G 1 2
3
2N7002KW_SOT323-3 @ PJ503
1 2
+0.675VSP 1 2 +0.675VS
JUMP_43X39
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.35VP/0.675VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Custom Bay Trail M LA-B211P 1.0
D D
1
PC602
PR603 0.1U_0402_16V7K
1M_0402_1%
2
2
@EMI@ PR604 @EMI@ PC603
4.7_1206_5% 680P_0603_50V7K
EMI@ PL601 1 2SNB_1.0V 1 2
HCB2012KF-121T50_0805 PU601
B+ 1 2 B+_1.0V 8
IN EN
1 @ PR601 PC601 TDC 8A
10U_0805_25V6K
10U_0805_25V6K
0_0603_5% 0.1U_0603_25V7K
2200P_0402_50V7K
6 BST_1.0V 1 2 1 2 PL602
0.1U_0402_25V6
BS
1
1
PC606
PC604
PC607
1.5UH_PCMC063T-1R5MN_9A_20%
LDO_3V
+1.0VALWP
PC605
9 10 LX_1.0V 1 2
GND LX
@EMI@
2
2
EMI@
13.7K_0402_1%
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
@
1
330P_0402_50V7K
1
1
PR606
4
FB
Rup
PC608
PC609
PC610
PC611
PC612
@ PR605
0_0402_5% ILMT_1.0V 3 7
+3VALW
2
ILMT BYP
4.7U_0603_6.3V6K
2
2
ILMT_1.0V
+3VALW 1 2 +1.0V_PGOOD 2 5 LDO_3V
4.7U_0603_6.3V6K
PG LDO
1
PC614
PR608
1
PC613
10K_0402_5% SY8208DQNC_QFN10_3X3
@ PR607 FB = 0.6V
2
1
0_0402_5%
2
PR609
Rdown
2
20K_0402_1%
2
Pin 7 BYP is for CS. VFB=0.6V
B
The current limit is set to 8A, 12A or 16A when this pin Common NB can delete +3VALW and PC614 B
is pull low, floating or pull high Vout=0.6V* (1+Rup/Rdown)
Vout=1.011V +1.0VALWP PJ601
1 2 +1.0VALW
1 2
JUMP_43X118 @
+3VS PR610
2.55K_0402_1%
+1.05VSP_ON 1 2
SUSP# <10,22,25,30>
1
0.1U_0402_16V7K
1
PC615
@ PR611
1
100K_0402_5% @ PR612
1M_0402_5%
Note:Iload(max)=2.5A
2
PU602
9
1 PGND 8
FB SGND
2 7 PL603
@ PJ602 PG EN 1UH_2.8A_30%_4X4X2_F
+3VALW 1 2 3 6 LX_1.05V 1 2
1 2 IN LX +1.05VSP
COMMON PART
1
4 5
68P_0402_50V8J
JUMP_43X79
PGND NC
1
1
@EMI@ PR613
4.7_0603_5%
PC616
1
PC617
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0805_6.3VAM
2
SY8003DFC_DFN8_2X2 PR614
Rup
PC618
PC619
15K_0402_1%
2
2
@ PJ603
FB_1.05V 1 2
A +1.05VSP 1 2 +1.05VS A
JUMP_43X79
1
1
FB=0.6V
@EMI@ PC620
680P_0402_50V7K
Note:Iload(max)=3A PR615
Rdown
20K_0402_1%
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.05VS/1.0VALW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C Bay Trail M LA-B211P 1.0
+3VALW
1
1
JUMP_43X79
@ PJ701
2
2
D
Ultra Low Dropout 0.23V(typical) at 3A Output Current D
1
@ PC702
1U_0402_6.3V6K
2
PC703 PU701
1
4.7U_0805_6.3V6K APL5930KAI-TRG_SO8
6
5 VCNTL 3
PJ702
2
PR701 9 VIN VOUT 4 @
51K_0402_1% VIN VOUT
+1.5VSP +1.5VSP 1
1 2
2 +1.5VS
20K_0402_1%
SUSP# 1 2 8
<> SUSP# EN
1
1 2 7 2 JUMP_43X79
+3VS
GND
POK FB
PR703
PC704
@ PR702
Rup 0.01U_0402_25V7K
2
1
1
PC701 100K_0402_5% PC705
2
0.15U_0402_10V6K @ PR704 22U_0603_6.3V6M
22K_0402_5%
2
2
1
PR705
Rdown 22.6K_0402_1%
2
C C
+3VALW
Vout=0.8V* (1+Rup/Rdown)=1.507V
1
Ultra Low Dropout 0.23V(typical) at 3A Output Current
JUMP_43X79 1
@ PJ703
2
2
@ PC706
1U_0402_6.3V6K
2
PC707 PU702
1
4.7U_0805_6.3V6K APL5930KAI-TRG_SO8
6
B 5 VCNTL 3 B
PJ704
2
20K_0402_1%
1 2 8
<22,29,31> SPOK EN
1
1 2 7 2 JUMP_43X79
+3VS
GND
POK FB
PR708
PC709
1
@ PR707
Rup 0.01U_0402_25V7K
0.1U_0402_16V7K
1
PC708
2
22K_0402_5% 22U_0603_6.3V6M
2
2
2
1
PR710
Rdown 15.8K_0402_1%
2
Vout=0.8V* (1+Rup/Rdown)=1.81V
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.5VSP/1.8VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Custom Bay Trail M LA-B211P 1.0
Layout Note
Reduce Acoustic Noise
1. The AL bulk capacitor of B+ should be very
close to CPU_CORE MOSFET.
1
@ PC802
1000P_0402_50V7K 2. Input ceramic caps must place on symmetry
<10> VGFX_VSNS
same location on top side and bottom side.
2
1
+CPU_B+
PC803
0.01UF_0402_25V7K
10U_0805_25V6K
10U_0805_25V6K
1
1
PC805
PC806
1 1
2
5
PC804
6800P_0402_25V7K PQ803
OCP setting=21A
1 2 PR804
2K_0402_1%
1
PC807 PC808 0_0603_5%
120P_0402_50V8 470P_0402_50V7K UGA_GFX 1 2 UGA_GFX-14 0.36uH DCR= 1.4+-5% m ohm, Idc~Isat= 16.8~24A
PR802
Close GFX choke 1 2 1 2 1
PR803
2
2
COMMON PART 324_0402_1% 1000P_0402_25V8J MDV1525URH_PDFN33-8-5 0.36UH_PDME064T-R36MS_24A_20%
3
2
1
VSUMG- 1 2 1 2 1 2 1 2
PR806 PHASEA_GFX 1 4
1
137K_0402_1% PR807
@EMI@ PR813
4.7_1206_5%
PH802 2.05K_0402_1% PC813 2 3
5
21K_0402_1%
10K_0402_1%_B25/50 3370K
.1U_0402_16V7K
PR808 BOOTA_GFX 1 2 1 2
0.1U_0402_16V7K
1
1
11K_0402_1%
PC810
PR809
0.047U_0402_25V7K
2K_0402_1% PR812
1
2.2_0603_5% 0.1U_0603_25V7K
PC811
2
1 2
1
PC812
PR811
2
2.61K_0402_1%
2
1
1
PC814 LGA_GFX 4
+3VALWP
1 2
1
680P_0402_50V7K
PQ804
PR810
1000P_0402_50V7K
2
1_0402_5%
Design Note
@EMI@ PC815
AON6554_DFN5X6-8-5
3.65K_0603_1% PR815
1.91K_0402_1%
1
This circuit is for ULV 1+1 17W. VSUMG+ PR814
3
2
1
2
Rds=13.5mΩ(Typ)
CPU: IccMax=33A, TDC=16A(TDP NOM)
2
16.5mΩ(Max)
VSUMG+
VSUMG-
Loadline: -2.9 m V/A
2
Output Cap. follow Intel PDDG
PR816
BOOTA_GFX
330uF/9m*3, 22uF_0805*12, 2.2uF_0402*16
GFX(GT2): IccMax=33A, TDC=21.5A UGA_GFX
Output Cap. follow Intel PDDG Close GFX L/S MOS LGA_GFX +5VALW
PR817
33
32
31
30
29
28
27
26
25
330uF/9m*2, 22uF_0805*6, 10uF_0603*6 , 1uF_0402*11
27.4K_0402_1% PR817 and PR826
1 2 PU801
27.4K ohm for 100 degree
PAD
ISUMPG
ISUMNG
RTNG
FBG
COMPG
PGOODG
BOOTG
UGATEG
1U_0603_10V6K
2 NTCG_1 2
PH803 PR818 61.9K ohm for 110 degree
1
3.83K_0402_1%
1
1 2 1 2 1 24 PR821
PC816
NTCG PHASEG
@PR820
@
1
PR820
2
COMMON PART 2 23
@ PR819
@PR819
0_0603_5%
1_0603_5%
+CPU_B+
2
<22> VR_ON 470K_0402_5%_B25/50 4700K VR_ON LGATEG EMI@ PL801
2
2
0_0402_5% 1 PR843 2 3 22 FBMA-L11-322513-151LMA50T_1210
<8> VR_SVID_CLK SCLK VCCP
20_0402_1% 1 2 B+
10U_0805_25V6K
10U_0805_25V6K
PR844 SVID_ALERT# 4 21
<8> VR_SVID_ALERT# ALERT# VDD
1U_0603_10V6K
16.9_0402_1% ISL95833BHRTZ-T_QFN32_4X4 @PR822
@ PR822 1.91K_0402_1%
2200P_0402_50V7K
PC817
0.1U_0402_25V6
1 2 SVID_DATA 5 20 1 2 1
<8> VR_SVID_DATA SDA PWM2
1
Height 8 mm
68U_25V_M
PC819
PC820
@EMI@ PC823
1
+
EMI@ PC821
@ PC822
6 19 LG1_CPU
<22> VR_HOT# VR_HOT# LGATE1 100u_SF000000I80
2
NTC 7 18 PHASE1_CPU Height 6 mm
2
NTC PHASE1 2
For VR_HOT#, already @ PR823
@PR823
68u_SF000000W00
1 2 8 17
PGOOD
UG1_CPU
pull high at power side.
BOOT1
ISUMN
ISUMP
ISEN2 UGATE1
COMP
ISEN1
69.8_0402_1%
499_0402_1%
69.8_0402_1%
RTN
1
FB
PR801
PR824
PR825
3.83K_0402_1%
47P_0402_50V8J
1
+5VALW
2
10
11
12
13
14
15
16
PR829
@
2
VGATE <22>
1 2 +3VALWP
+1.0VS
1
27.4K_0402_1%
1
1.91K_0402_1% PR827
PR826
@PC801
@ PC801
0.1U_0402_16V7K
2
+CPU_B+
2
PH801
5
470K_0402_5%_B25/50 4700K
COMMON PART PQ801
Close CPU L/S MOS
3
OCP setting=18A 3
PR828 4
0_0603_5%
VDD source use +5VS and PGOOD source use +3VS UG1_CPU 1 2 UG1_CPU-1 0.36uH DCR= 1.4+-5% m ohm, Idc~Isat= 16.8~24A
Please confirm power on and down sequence, MDV1525URH_PDFN33-8-5
3
2
1
make sure VGATE after CPU_CORE on. PL803 +SOC_VCC
0.36UH_PDME064T-R36MS_24A_20%
2.61K_0402_1%
680P_0402_50V7K 2K_0402_1% 66.5K_0402_1%
680P_0402_50V7K 4.7_1206_5%
1 2 1 2 1 2 PC824 2 3
5
PR836
@EMI@ PR831
BOOT_CPU 1 2 1 2
11K_0402_1%
PR830
2K_0402_1%
0.047U_0402_25V7K
2.2_0603_5% 0.1U_0603_25V7K
1
PR838
PC827 PC828
0.1U_0402_16V7K
2
1
PC829
470P_0402_50V7K 120P_0402_50V8
1
1
3.65K_0603_1%
1 2 1 2 1 2 LG1_CPU 4
PC830
1
1
324_0402_1%
PR837
Close CPU choke PQ802
1_0402_5%
1
PR839
PR832
499_0402_1% AON6554_DFN5X6-8-5
2
PR833
PR840
@EMI@ PC825
2
6800P_0402_25V7K
PH804
3
2
1
2
1
Rds=13.5mΩ(Typ)
PC832
2
1.78K_0402_1%
1 2 1 2
1000P_0402_25V8J
1 2
COMMON PART 16.5mΩ(Max)
VSUM+
2
VSUM-
PR842
137K_0402_1% VSUM-
.1U_0402_16V7K
1
Layout Note
PC833
1 2
1. Alert# signal must be routed between
the Clock and Date lines to reduce the cross
talk between them. Signal order arrangement: 1 2 Cn = L/((Rntcnet*Rsum)/(Rntcnet+Rsum))*DCR)
mobile order is Clock-Alert-Date. PC835 If Cn is correctly selected, when the load current has a
4
0.01UF_0402_25V7K square change, the output voltage also has a square response. 4
2. SVID spacing requirement is 18mils(0.475mm).
<10> VCORE_GSNS
reference. DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Bay Trail M LA-B211P 1.0
3 X 330u/9m(47W)
PWR Rule 2 X 330u/9m(37W)
需確認最新SPEC. 24 pcs 22uF and reserve 4 pcs
2013/08/16
Modify 8/6.
D D
+
PC918 2 1 330U_D2_2V_Y
+
PC902 2 1 330U_D2_2V_Y
+
+
+SOC_VCC
PC930 1 2 22U_0603_6.3V6M
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU/GFX capacitor
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Custom Bay Trail M LA-B211P 1.0
D 1 D
Battery BI pin for acer server 27 PR211 change to 0_0402_1% 1/10 DVT
2 common part PH202 change to common part 27 PH202 part number change to SL200002H00 1/10 DVT
3 OTP protect no hysteresis 27 PR227 change to un-pop 1/10 DVT
4
5 cost down chock size change small 28 PL302 change to 10UH_3.5A_20%_7X7X3_M 1/10 DVT
6 MOSFET quality AO4466L has no good quality 28 PQ303、PQ304 change to AO4406AL 1/10 DVT
7 OTP protect no hysteresis 29 PC426 change to pop 1/10 DVT
8 rename for 1.35V lacation 30 @PQ805 change @PQ503 1/10 DVT
9 voltage ripple change chock value 31 PL602 change to 1.5UH_PCMC063T-1R5MN_9A_20%1/10 DVT
PR839 change to 324_0402_1%
10 CPU tranistion CPU tranistion test 33
1/10 DVT
PR814、PR832 change to 3.65K_0603_1%
11 PC908、PC909、PC910、PC922
C 12 34 change to 22U_0603_6.3V6M 1/10 DVT C
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Bay Trail M LA-B211P 1.0
2 P.17 HW 12/23 Follow VESA CRT connector pin assignment. 1. Connect JCRT1.5 to GND. 0.3
3 P.20 HW 12/23 Connect JHDD1 pin8,9,10 to +3VS. 1. Connect JHDD1 pin8,9,10 to +3VS. 0.3
1. Add JP9 for +1.5VS_WLAN.
4 P.19 HW 12/23 Connect JMINI1 pin6,28,48 to +1.5VS_WLAN. 0.3
2. Connect JMINI1 pin6,28,48 to +1.5VS_WLAN.
13 P.21 HW 01/09 Follow 2014 OSCON standard part. 1. Change C486 to SF000006R00. 0.3
14 P.24 HW 01/09 For codec vendor test result. 1. Change R1109,R1112 to 59ohm,SD000006J80. 0.3
15 P.8 HW 01/09 Rename CLRP1 for load BOM error. 1. Rename CLRP1 to JCMOS1. 0.3
16 P.24 HW 01/09 Cap. 1uF 0603 change to 0402. 1. Change C2141 to SE000000K80. 0.3
A A
1. Reserve U70,U71,Q83,R148,R496,R517,R1017,
P.8,9
19 HW 01/13 Reserve TPM circuit. R1034,R1172,R1203,R1204,C175,C398,C399,C400, 0.3
,22,23
C C406,C421,C422. Add R1021,R1025. C
20 P.23 HW 01/14 Change TP conn. type for ME required. 1. Change JTP1 to SP01001AA00. 0.3
1. Remove R1146,R1148,R1149,R1151.
22 P.15 HW 01/14 Separate TS USB/I2C connection(follow Z5WAH). 2. Change I2C5_SDA_PNL to JLVDS1.21. 0.3
Change I2C5_SCL_PNL to JLVDS1.22.
23 P.21 HW 01/14 Height limit issue. 1. Change C486 to SGA00009100,D2 size. 0.3
24 P.8 HW 01/14 Add test point. 1. Add T207 for PMC_SUS_STAT#. 0.3
1. Reserve R1146.
28 P.15 HW 02/21 Reserve +3VS for touch screen. 0.4
2. Rename net +5V_TS to +TS_PWR.
30 P.22 HW 02/25 For PVT board ID. 1. Change R506 to 20k ohm. 0.4
32 P.8 HW 02/27 Cover pad for unused part. 1. Change U54 footprint to TXB0108PWR_TSSOP20-S. 0.4
A A
1. Change R368,R369,R370,R371,R372,R373,R374,
P.6,8, R375,R427,R428,R458,R461,R1022,R1023,R1033,
11,15, R1088,R1164,R1165,R1169,R1142
36 16,20, HW 03/03 Unused part. to R-short,0402 size. 0.4
21,22, 2. Change R259,R1092,R1093,R1098,R1099,R1201
23,24 to R-short,0603 size.
3. Change R1154,R1155 to R-short,0805 size.
1. Add C408,0.1uF.
39 P.5,23 HW 03/06 For ESD. 0.5
2. Change C1159 to SE070473Z80,0.047uF.
41 P.8 HW 03/06 SLP_S3# leak voltage(follow Z5W1M). 1. Change Q83 direction. 0.5
44 P.22 HW 03/21 For Pre-MP borad ID. 1. Change R506 to 27k ohm. 1.0
B B
45 P.22 HW 03/25 For PMC_CORE_PWROK falling time. 1. Change C1157 to R485, 100k ohm. 1.0
47 P.18 HW 03/25 Reserve LAN power. 1. Del J8 and reserve R238. 1.0
A A
+5VALW
+5VALW 3.098ms
+3VALW
+3VALW
SPOK
SPOK 7.256ms
+1.0VALW
+1.0VALW 9.104ms
+1.8VALW
+1.8VALW
ON/OFF
ON/OFF 11.07ms
EC_RSMRST#
EC_RSMRST# 237.4ms
PBTN_OUT#
101ms
PBTN_OUT#
149.8ms
EC_SLP_S4# EC_SLP_S4#
C C
149.8ms
EC_SLP_S3# EC_SLP_S3#
220.2ms
217.1ms
SYSON SYSON
217.8ms 10.87ms
+1.35V_SOC 4.559ms +1.35V_SOC
10.538ms
DDR_PWROK 29.18ms 82.18ms 22.32ms DDR_PWROK
79.28ms
VR_ON 31.65ms 2.464ms VR_ON
96.7ms 5.25ms
+SOC_VCC +SOC_VCC
88ms 64.56ms
+SOC_VNN +SOC_VNN
69.73ms
VGATE 27.5ms 27.73ms VGATE
40.27ms 39.24ms
SUSP# 1.131ms 1.106ms SUSP#
4.279ms 10.33ms
+1.0VS 1.729ms 1.719ms +1.0VS
3.868ms 3.443ms
B
+1.05VS 1.694ms 1.697ms +1.05VS B
15.04ms 5.058ms
+1.35VS 1.658ms 1.763ms +1.35VS
2.636ms 9.966ms
+1.5VS 0.964ms 0.955ms +1.5VS
5.182ms 4.936ms
+1.8VS 1.794ms 1.764ms +1.8VS
4.320ms 11.63ms
+3VS 0.916ms +3VS
25.32ms 24.83ms
+5VS 8.080ms 8.046ms +5VS
97.21ms 44.3ms 4.42ms 97.04ms 20.7ms
+0.675VS +0.675VS
DDR_CORE_PWROK DDR_CORE_PWROK
9.627ms
PMC_CORE_PWROK 5.925ms 5.640ms SUSP# PMC_CORE_PWROK
31.2ms
PMC_PLTRST# PMC_PLTRST#
31.2ms
SOC_SPI_CLK# SOC_SPI_CLK#
30.90ms
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Sequence
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAL_Bay Trail M_LA‐B211P
Date: Monday, April 07, 2014 Sheet 39 of 39
5 4 3 2 1
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