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AO7401

30V P-Channel MOSFET

General Description Product Summary

The AO7401 uses advanced trench technology to VDS -30V


provide excellent RDS(ON), low gate charge, and ID (at VGS=-10V) -1.4A
operation with gate voltages as low as 2.5V, in the RDS(ON) (at VGS=-10V) < 115mΩ
small SOT363 footprint. It can be used for a wide
RDS(ON) (at VGS =-4.5V) < 140mΩ
variety of applications, including load switching, low
current inverters and low current DC-DC converters. RDS(ON) (at VGS =-2.5V) < 200mΩ

SC-70
(SOT-323) D

Top View Bottom View

D
D
G
S
G
S
G S

Absolute Maximum Ratings TA=25°C unless otherwise noted


Parameter Symbol Maximum Units
Drain-Source Voltage VDS -30 V
Gate-Source Voltage VGS ±12 V
Continuous Drain TA=25°C -1.4
ID
Current TA=70°C -1.0 A
C
Pulsed Drain Current IDM -10
TA=25°C 0.35
B
PD W
Power Dissipation TA=70°C 0.22
Junction and Storage Temperature Range TJ, TSTG -55 to 150 °C

Thermal Characteristics
Parameter Symbol Typ Max Units
Maximum Junction-to-Ambient A t ≤ 10s 300 360 °C/W
RθJA
Maximum Junction-to-Ambient A D Steady-State 340 425 °C/W
Maximum Junction-to-Lead Steady-State RθJL 280 320 °C/W

Rev 6: June 2011 www.aosmd.com Page 1 of 5


AO7401

Electrical Characteristics (TJ=25°C unless otherwise noted)

Symbol Parameter Conditions Min Typ Max Units


STATIC PARAMETERS
BVDSS Drain-Source Breakdown Voltage ID=-250µA, VGS=0V -30 V
VDS=-30V, VGS=0V -1
IDSS Zero Gate Voltage Drain Current µA
TJ=55°C -5
IGSS Gate-Body leakage current VDS=0V, VGS= ±12V ±100 nA
VGS(th) Gate Threshold Voltage VDS=VGS ID=-250µA -0.6 -1 -1.4 V
ID(ON) On state drain current VGS=-10V, VDS=-5V -10 A
VGS=-10V, ID=-1.4A 92.5 115
mΩ
TJ=125°C 130 160
RDS(ON) Static Drain-Source On-Resistance
VGS=-4.5V, ID=-1.2A 110 140 mΩ
VGS=-2.5V, ID=-1A 150 200 mΩ
gFS Forward Transconductance VDS=-5V, ID=-1.4A 6 S
VSD Diode Forward Voltage IS=-1A,VGS=0V -0.78 -1 V
IS Maximum Body-Diode Continuous Current -0.5 A
DYNAMIC PARAMETERS
Ciss Input Capacitance 260 315 pF
Coss Output Capacitance VGS=0V, VDS=-15V, f=1MHz 37 pF
Crss Reverse Transfer Capacitance 20 pF
Rg Gate resistance VGS=0V, VDS=0V, f=1MHz 4 8 12 Ω
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge 5.9 7.2 nC
Qg(4.5V) Total Gate Charge 2.8 3.5 nC
VGS=-10V, VDS=-15V, ID=-1.4A
Qgs Gate Source Charge 0.7 nC
Qgd Gate Drain Charge 1 nC
tD(on) Turn-On DelayTime 6 ns
tr Turn-On Rise Time VGS=-10V, VDS=-15V, RL=10Ω, 3.5 ns
tD(off) Turn-Off DelayTime RGEN=3Ω 20 ns
tf Turn-Off Fall Time 5 ns
trr Body Diode Reverse Recovery Time IF=-1.4A, dI/dt=100A/µs 11.5 15 ns
Qrr Body Diode Reverse Recovery Charge IF=-1.4A, dI/dt=100A/µs 4.5 nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25°C.
D. The RθJA is the sum of the thermal impedance from junction to lead RθJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedance which is measured with the device mounted on 1in2 FR-4 board with
2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g.

THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.

Rev 6: June 2011 www.aosmd.com Page 2 of 5


AO7401

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

15 10
-10V -4.5V VDS=-5V

12 -3V 8
-6V

9 6
-ID (A)

-ID(A)
-2.5V

6 4 125°C

3 VGS=-2V 2 25°C

0 0
0 1 2 3 4 5 0 0.5 1 1.5 2 2.5 3 3.5 4

-VDS (Volts) -VGS(Volts)


Fig 1: On-Region Characteristics (Note E) Figure 2: Transfer Characteristics (Note E)

210 1.6
190 VGS=-2.5V Normalized On-Resistance VGS=-10V
ID=-1.4A
170 1.4
RDS(ON) (mΩ )

150
17
130 VGS=-4.5V 1.2
5
VGS=-4.5V
110 ID=-1.2A
2
90 1 10
VGS=-2.5V
70 VGS=-10V ID=-1A
50 0.8
0 1 2 3 4 5 6 0 25 50 75 100 125 150 175
-ID (A)
Temperature (°C) 0
Figure 3: On-Resistance vs. Drain Current and Figure 4: On-Resistance vs. Junction Temperature
Gate Voltage (Note E)
18
(Note E)

250 1.0E+02
ID=-1.4A
1.0E+01
200 40
1.0E+00
125°C
RDS(ON) (mΩ )

1.0E-01 125°C
-IS (A)

150
1.0E-02 25°C

1.0E-03
100 25°C
1.0E-04

50 1.0E-05
0 2 4 6 8 10 0.0 0.2 0.4 0.6 0.8 1.0 1.2
-VGS (Volts) -VSD (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage Figure 6: Body-Diode Characteristics (Note E)
(Note E)

Rev 6: June 2011 www.aosmd.com Page 3 of 5


AO7401

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

10 400
VDS=-15V
ID=-1.4A
8
300 Ciss

Capacitance (pF)
-VGS (Volts)

6
200
4

100 Coss
2

Crss
0 0
0 1 2 3 4 5 6 0 5 10 15 20 25 30
Qg (nC) -VDS (Volts)
Figure 7: Gate-Charge Characteristics Figure 8: Capacitance Characteristics

100.0 20
TA=25°C

10.0 15
10µs
-ID (Amps)

Power (W)

RDS(ON)
100µs
1.0 limited
10
1ms
10ms
0.1
TJ(Max)=150°C 5
TA=25°C
DC 10s
0.0
0
0.01 0.1 1 10 100
0.00001 0.001 0.1 10 1000
-VDS (Volts)
Pulse Width (s)
Figure 9: Maximum Forward Biased Safe Figure 10: Single Pulse Power Rating Junction-to-
Operating Area (Note F) Ambient (Note F)

10
D=Ton/T In descending order
Zθ JA Normalized Transient

TJ,PK=TA+PDM.ZθJA.RθJA D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse


Thermal Resistance

1 RθJA=425°C/W

0.1

PD
0.01
Single Pulse Ton
T

0.001
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)

Rev 6: June 2011 www.aosmd.com Page 4 of 5


AO7401

Gate Charge Test Circuit & Waveform


Vgs
Qg
- -10V
VDC
-
+ Vds Qgs Qgd
VDC
+
DUT
Vgs

Ig

Charge

Resistive Switching Test Circuit & Waveforms


RL
Vds ton toff

td(on) tr t d(off) tf
Vgs
-
Vgs DUT VDC
Vdd 90%
Rg
+

Vgs 10%
Vds

Unclamped Inductive Switching (UIS) Test Circuit & Waveforms


2
L E AR= 1/2 LIAR
Vds

Id Vds
- BVDSS
Vgs
Vgs VDC
Vdd
Rg
+ Id
I AR
DUT
Vgs Vgs

Diode Recovery Test Circuit & Waveforms

Vds + Q rr = - Idt
DUT
Vgs

t rr
Vds - L -Isd -I F
Isd dI/dt
+ Vdd -I RM
Vgs VDC
Vdd
Ig
- -Vds

Rev 6: June 2011 www.aosmd.com Page 5 of 5

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