UNIVERSITY OF LONDON

BEng and MEng EXAMINATIONS 2000

Part II Mechanical Engineering

for Internal Students of the Imperial College of Science Technology and Medicine
This paper is also taken for the relevant examination for the Associateship

ELECTRONICS, INSTRUMENTATION and CONTROL

Thursday, 15th June: 14.00 to 17.00

This paper contains THIRTEEN questions, EIGHT in Section A and FIVE in Section B.
Attempt ALL questions in Section A and THREE questions in Section B.
Section A accounts for one-third of the total marks for the paper and all questions in Section B carry
equal marks.
A handbook of Data and Formulae is provided.

This is a CLOSED BOOK examination

SECTION A
Enter your answers in the spaces provided ON THIS PAPER, and submit the paper at the end of the
examination.
SHOW ALL WORKING, either on this paper or in your answer book.

Candidate’s Number: …………………………

15 V
unregulated
220 ž

C9V

0V

Figure A1

A1. The stage shown in Figure A1 is intended to provide a 9V regulated supply from a 15 V source
whose output varies by ±20%. It uses a 9V, 400 mW Zener diode.
(i) Show clearly on Figure A1 the circuit correction necessary for the stage to work as
intended.

(ii) Calculate the maximum current which the circuit can deliver at 9V when the input voltage
is:
…at its maximum value: ……………… mA

…at its minimum value: ……………… mA

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© 2000 University of London
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(iii) Calculate the maximum power dissipation in the Zener diode:
………… % of rated maximum

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 10 kž
(i) (ii) (iii)

C 10 kž
100 kž
+ 10 kž
100 kž A B
10 V

10 kž
0V 0V 0V

Figure A2

A2. Figure A2 shows three entirely separate stages. Op-amps are connected to voltage supplies and
are active.
(i) The open-circuit output voltage of the potentiometer is 2.0 V. What is the output resistance
from terminal A to ground?
……………… Ω

(ii) What is the input resistance from terminal B to ground?

……………… Ω

(iii) What is the input resistance from terminal C to ground?

……………… Ω

RL Load

+
From
TTL logic 1 kž 15 V
gate output

1 kž

0V

Figure A3

A3. The common-emitter stage shown in Figure A3 drives a load from a TTL logic gate output. The
gate output is equivalent to a perfect voltage source but can provide little current. In the ‘low’
state the gate output voltage is <0.4 V and the transistor is cut off.
(i) In the ‘high’ state, the gate output voltage lies in the range 2.4–3.6 V. For this state sketch
(to the left of the circuit) a Thévenin source equivalent to the gate output and two resistors
driving the base. Indicate the source voltage range as well as the source resistance.

(ii) What will be the range of base current?

…………… mA to …………… mA

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(iii) The transistor is intended to be in the saturated state when the logic gate output is ‘high’.
If the transistor has a minimum current gain hfe of 300, what is the largest allowable value
of RL from the E24 series?
……………… Ω

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A4. The op-amp in the stage shown in Figure A4 is a 741 type. It is connected to ±15 V supplies and
its output voltage can vary between limits of ±13 V. The stage input is connected to the output
of another 741 op-amp.

+15 V

100 k
47 k

vi 22 k
vo

0V

Figure A4

(i) Determine the stage input voltage vi at which the op-amp output voltage vo reaches each of
its limits:
At vo = maximum limit, vi = ……………… V

At vo = minimum limit, vi = ……………… V

(ii) If the op-amp inverting input voltage is measured to be 2V, what are the stage output and
input voltages?
vi = ……………… V

vo = ……………… V

+20 (a) +20 (b)

Gain, dB

0 0
100 1 10 100 1 10
Hz kHz kHz Hz kHz kHz

-20 -20

Figure A5

A5. Figure A5a shows the gain part of the Bode corner plot for a 1 kHz bandpass filter, which
consists of low-pass and high-pass filters connected in cascade.
(i) On Figure A5b, show the gain corner plots for the low-pass and high-pass filters.

(ii) Using the first-order response plots provided in the Handbook, determine the gain and
phase shift of the bandpass filter at 2 kHz.

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 Gain: ……………… dB

Phase shift: ……………… degrees

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A6. The stage shown in Figure A6 is used to detect the concentration of a chemical. A sensor,
equivalent to a current source in proportional to the chemical concentration, is connected to the
stage input. The stage output voltage changes state at a critical value of concentration. The op-
amps run from ±15 V supplies. All resistors are ±1% types.
15 V

47 k
470 k

in vo

R1 10 k

0V

Figure A6

(i) Determine the critical value of electrode current in:

……………… µA

(ii) Assuming the op-amps to be 741 types, like that in Question A4, estimate vo:
When the magnitude of in is less than the critical value, vo = ……………… V

When the magnitude of in is greater than the critical value, vo = ……………… V

(iii) The circuit is now to be modified, by replacing R1, so that the critical electrode current
magnitude is greater by a factor of two. Determine the single E12 value required:

R1 = ……………… kΩ

A7. Figure A7 shows the block diagram for a feedback system.

1
1+ τ 1D

τ 2D

Figure A6

(i) Reduce the system to a single transfer operator in standard form:

……………………………
(ii) If τ1 = 1 s and τ2 = 2 s, determine the gain and phase shift for an input of 2 rad s–1.

Gain: ……………… dB

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 Phase shift: ……………… degrees

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A8. The output signal from a transducer has a bandwidth of DC to over 30 kHz, and a range of 0-50
mV. It is converted to digital form by an ADC which samples at a rate of 18 ×103 samples s–1.
The ADC has a resolution of 12 bits and an input range of 0–10 V.

(i) Determine the maximum signal bandwidth which the ADC can convert without aliasing:

……………… Hz

(ii) Determine the gain by which the signal must be amplified in order to maintain a resolution
of ±0.1%:

……………… dB

(iii) Write down the transfer operator of a filter which, connected between the signal source and
the ADC, would achieve the requirements determined in both Parts (i) and (ii).

…………………………

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SECTION B
Enter your answers IN AN ANSWER BOOK.

B1. In an instrumented Charpy impact testing machine, a force gauge is mounted at the tip of a striker
which fractures the specimen. The test must record the variation with time t of both
(a) the striker force F, up to a maximum of 10 kN, and
(b) the energy delivered by the striker, U = ò F dt , up to a maximum of 100 J.
A suitable piezoelectric force gauge is available. It has a sensitivity of 5 pC N–1 and a
capacitance of 100 pF.

(i) Briefly outline the principles of a piezoelectric force gauge and a piezoelectric
accelerometer. You should describe the electrical output characteristics, but need not
discuss detector circuits.

(ii) Calculate the voltage which would appear at the terminals of this force gauge at maximum
load. State and briefly explain one reason why it is difficult to detect force F from this
voltage.

(iii) Sketch a suitable detector stage circuit, using a single op-amp, for the force gauge. Specify
E6 series component values to give a maximum output of approximately 1V.

(iv) Determine the maximum rate at which F can change with time without reaching the op-
amp current limit of 20 mA. Assume that there is no electrical load connected to the
detector stage output.

(v) Sketch an op-amp stage which, when connected to the output of the detector stage, will
provide an analogue signal representing U. Specify E6 component values to give a
maximum output of approximately 1V.

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B2. Figure B2a shows a basic emitter-follower stage. The circuit of Figure B2b shows a modified
version which, while vi is fixed at an appropriate value, maintains a constant current of 5A in a
variable resistance Rc. The value of Rc is low and may be zero.

15 V 15 V

Rc
(a) (b)

Rb
vi Rb vi 220 ž
Q1

Q2

1ž
RL vL RL vL

0V 0V

Figure B2

(i) For the basic stage of Figure B2a, derive an equation (in terms of Rb, RL, transistor current
gain hfe and base-emitter voltage vbe) relating vL to input voltage vi for vi < 15V.

(ii) Derive from this equation an expression for the current iL in the RL = 1Ω resistor, for the
modified stage of Figure B2b. The Darlington pair transistors Q1 and Q2 have current gains
hfe1 and hfe2. You should assume that Rc = 0, and that vbe = 0.6V for both transistors.

(iii) Q1 is of a type with hfe = 250-750 and Q2 of a type with hfe = 20-60. Calculate the range
within which vi may need to be adjusted to achieve iL = 5A.

If Rc increases slightly from zero, operation of the circuit is not affected. Since the gain of the
Darlington pair (Q1 and Q2) is always high, the current in Rc is equal to iL.

However, when the collector voltage falls below the base voltage of Q1, the circuit will cease to
operate as analysed.
(iv) Calculate the maximum value of Rc in which a current of 5A can be maintained.

(v) By adding an op-amp to this stage and taking negative feedback from vL, 5A can be
maintained in Rc automatically for any hfe1 and hfe2. Sketch this system, specifying the
input voltage to it.

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B3. Figure B3 has been sketched by examination of an electronic circuit board, for which
manufacturer’s information is unavailable. The board is believed to be faulty and has been
disconnected at the eleven connection points ‘0’ to ‘10’. The potentiometer is fitted on a separate
panel. The system has a ±15 V power supply.

22 kž 1 2 3 4 5
potentiometer:
To 47 kž
2

To 10 kž
10

15 kž

To 0
9 3.3 kž

150 nF

10 kž

47 kž 3.3 kž

10 9 8 7 6

Figure B3

(i) Re-draw the circuit diagram, clearly organising the system into well defined stages and
indicating the positions of all eleven connection points. Op-amp supply connections should
not be shown.

The board is now reconnected to the ground and supply connections and to the potentiometer.
For the first two tests, the circuit input point is grounded.

(ii) Tabulate the values of DC voltage at each of connection points ‘0’ to ‘10’, while the
potentiometer is set to (a) its minimum and (b) its maximum position.

A signal generator and an oscilloscope are available. For the next two tests, the potentiometer is
set to the middle of its range. The circuit input point is disconnected from ground and connected
to the signal generator, which is set up to provide 10 V pp square wave with zero DC offset.

(iii) Specify a suitable ‘low’ frequency and ‘high’ frequency to test the dynamic response of the
circuit. For each of these frequencies, sketch the waveform shape to be expected at any
connection point where a waveform should appear. Indicate significant voltages and show
the phase relationship to the input signal.

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B4. A permanent magnet DC motor used in a conveyor system is driven by a voltage amplifier of
fixed gain AM = 5. The amplifier output has a voltage limit of 20 V and a current limit of 12 A.
The motor has an armature resistance Ra = 0.8 Ω.

In service, the speed is to be constant: 200 rad s–1. A feedback speed control system is to be
fitted. A calibrated tachometer, connected directly to the motor shaft, gives an output voltage of
1.00 V at 1000 rev/min.

(i) A permanent magnet DC motor has the torque-speed relationship:

1 æ R ö
θÝ= ç va − a T0 ÷ ,
Ke è Ke ø
where Ke is the EMF constant of the motor and θÝ is the rotational speed at armature voltage
va and shaft torque T0. Show that if external and frictional torques are negligible, the
transfer operator from amplifier input voltage vi to rotational speed is
AM 1
Ke (1 + τ M D)
and give an expression for the mechanical time constant, τ M , in terms of the total moment
of inertia J and other motor parameters.

(ii) The open-loop step response is now to be tested by switching on from rest. Determine the
maximum value of vi which can be applied without limiting either the output voltage or the
output current of the drive amplifier.

(iii) When a step voltage input of this magnitude is applied, the tachometer output voltage
shows a simple first-order response to a final value of 3.60 V. Calculate Ke in units of V
rad–1 s.

(iv) The negative feedback loop is now closed by subtracting a proportion AT of the tacho
output from the speed control voltage vR. Draw a block diagram of the system, showing vR
as input and θÝ as output. Derive the closed-loop transfer function in the same form as that
derived in (i).

(v) This system is to be set up so that the motor reaches 200 rad s–1 as quickly as possible after
switch-on, without the drive amplifier suffering voltage or current limiting. Determine the
required value of AT.

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B5. The speed of a DC motor within the feedback loop of a position servomechanism (‘servo’)
responds to voltage with a first-order lag having a time constant of 2.0 s. Because other stages in
the loop also have lags, the measured open-loop frequency response of the servo is as shown in
the table below. These data indicate a gain margin of 9 dB and phase margin of 24 degrees. In
closed-loop configuration, the position servo response is found to be insufficiently stable.
–1
Frequency, ω (rad s ) 0.2 0.5 1.0 2.0
Loop gain (dB) 10.3 –4.5 –19.3 –35.5
Loop phase shift (degrees) –119 –169 –202 –225

To improve stability, the motor in the position servo is removed and fitted with its own speed
feedback loop. For a given input voltage, the steady-state motor speed is now one-half of that
measured when the same voltage was applied directly to the motor.

(i) State the new time constant for the response of motor speed to input voltage. Sketch a
Bode corner plot showing the gain and phase parts of the frequency response before and
after connection of speed feedback.

The motor, with its feedback loop, is now fitted back into the position servo.
(ii) Calculate and tabulate, at the four frequencies of the original data, the change in loop gain
and phase response which results from introducing internal speed feedback.

(iii) Hence, graphically or by linear interpolation, predict the gain and phase margins of the
modified system. Comment on the effect which this modification will have on system
stability.

___________________________

Note: The gain and phase shift of a first-order lag with time constant τ and DC gain magnitude A
can be calculated from the expressions:
1
H =A 2
æωö
1+ç ÷
è ωc ø
and
é æ ω öù
φ = tan −1 ê −ç ÷ ú ,
êë è ω c ø úû
1
where ω c ≡ .
τ
This response, for A = 1, is also shown graphically in the Handbook supplied.

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