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Vishay Siliconix
VDS (V) rDS(on) () ID (A)
0.075 @ VGS = –4.5 V 3.4
–20
20 0.105 @ VGS = –3.0 V 2.9
S1 S2
SO-8
S1 1 8 D1
G1 G2
G1 2 7 D1
S2 3 6 D2
G2 4 5 D2
Top View
D1 D1 D2 D2
TA = 25C 3.4
Continuous Drain Current (TJ = 150C)a ID
TA = 70C 2.7
A
Pulsed Drain Current IDM 16
TA = 25C 2.0
Maximum Power Dissipationa PD W
TA = 70C 1.3
Operating Junction and Storage Temperature Range TJ, Tstg –55 to 150 C
Notes
a. Surface Mounted on FR4 Board, t 10 sec.
For SPICE model information via the Worldwide Web: http://www.vishay.com/www/product/spice.htm
Parameter Symbol Test Condition Min Typa Max Unit
Static
Gate Threshold Voltage VGS(th) VDS = VGS, ID = –250 mA –0.8 V
Dynamica
Total Gate Charge Qg 10 20
Notes
a. For design aid only; not subject to production testing.
b. Pulse test; pulse width v 300 ms, duty cycle v 2%.
12 12 25C
I D – Drain Current (A)
4 4
2V
0 0
0 2 4 6 8 10 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
0.16
r DS(on) – On-Resistance ( Ω )
1500
VGS = 3 V
C – Capacitance (pF)
1000 Ciss
Coss
500
0.04 Crss
0 0
0 3 6 9 12 15 0 2 4 6 8 10
4.0
VDS = 6 V VGS = 4.5 V
V GS – Gate-to-Source Voltage (V)
3.0
1.2
(Normalized)
2.5
2.0
0.8
1.5
1.0 0.4
0.5
0 0
0 2 4 6 8 10 –50 0 50 100 150
TJ = 150C
0.16
r DS(on) – On-Resistance ( Ω )
10
ID = 3.2 A
I S – Source Current (A)
TJ = 25C 0.12
0.08
0.04
1 0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 2 4 6 8 10
0.6
ID = 250 µA 30
V GS(th) Variance (V)
0.4
Power (W)
0.2 20
0.0
10
–0.2
–0.4 0
–50 –25 0 25 50 75 100 125 150 0.01 0.1 1 10 30
1
Duty Cycle = 0.5
Normalized Effective Transient
Thermal Impedance
0.2
Notes:
0.1
PDM
0.1
0.05
t1
t2
t1
0.02 1. Duty Cycle, D =
t2
2. Per Unit Base = RthJA = 62.5C/W
3. TJM – TA = PDMZthJA(t)
Single Pulse 4. Surface Mounted
0.01
10–4 10–3 10–2 10–1 1 10 30
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