DR Ahmed Heikal Lecture 4 PDF

Electronic Devices
Ninth Edition
Floyd
Chapter 8
Electronic Devices, 9th edition © 2012 Pearson Education. Upper Saddle River, NJ, 07458.
Thomas L. Floyd All rights reserved.
Summary
The FET
The idea for a field-effect transistor (FET) was first
proposed by Julius Lilienthal, a physicist and inventor. In
1930 he was granted a U.S. patent for the device.
His ideas were later refined and
developed into the FET. Materials
were not available at the time to
build his device. A practical FET
was not constructed until the
1950’s. Today FETs are the most
widely used components in
integrated circuits.
Summary
The JFET
The JFET (or Junction Field Effect Transistor) is a normally
ON device. For the n-channel device illustrated, when the
drain is positive with respect to the source and there is no
gate-source voltage, there is current in the channel.
When a negative gate voltage is
applied to the FET, the electric
field causes the channel to
narrow, which in turn causes
current to decrease.
Summary
The JFET
As in the base of bipolar transistors, there are two types of
JFETs: n-channel and p-channel. The dc voltages are
opposite polarities for each type.
RD
The symbol for an n-channel JFET is
shown, along with the proper polarities of Drain
+
the applied dc voltages. For an n-channel Gate VDD
device, the gate is always operated with a –
–
VGG Source
negative (or zero) voltage with respect to +
the source.
Summary
The JFET
There are three regions in the characteristic curve for a JFET
as illustrated for the case when VGS = 0 V.
Between A and B is the Ohmic ID
region, where current and voltage Ohmic region

are related by Ohm’s law. B VGS = 0 C
IDSS
From B to C is the active (or

constant-current) region where
current is essentially independent
of VDS.
Beyond C is the breakdown Active region
(constant current)
Breakdown
A VDS
region. Operation here can 0 VP (pinch-off voltage)
damage the FET.

Summary
The JFET
When VGS is set to different values, the relationship between
VDS and ID develops a family of characteristic curves for the
device. I D
An n-channel
IDSS VGS = 0
characteristic is
illustrated here.
Notice that Vp is VGS = –1 V
positive and has

VGS = –2 V
the same
magnitude as VGS = –3 V
VGS(off). VGS = – 4 V
VGS = VGS(off) = –5 V
VDS
VP = +5 V
Summary
The JFET
A plot of VGS to ID is called the transfer or transconductance
curve. The transfer curve is a is a plot of the output current
(ID) to the input voltage (VGS). ID
The transfer curve is based on the IDSS
equation
2
 VGS 
=I D I DSS 1 − 
 V
 GS(off)  IDSS
2
By substitution, you can find other IDSS

4
points on the curve for plotting the
universal curve. –VGS
VGS(off) 0
0.3 VGS(off)
0.5 VGS(off)
Summary
The JFET
A certain 2N5458 JFET has IDSS = 6.0 mA and VGS(off) = – 3.5 V.

(a) Show the values of the
ID
these end points on the
transfer curve. IDSS = 6.0 mA
(b) Show the point for the

case when ID = 3.0 mA.
3.0 mA
(b) When ID = ½ IDSS,

VGS = 0.3 VGS(off). –VGS
0
Therefore, VGS = −1.05 V VGS(off) = −3.5 V −1.05 V
Summary
The JFET
The transconductance is the ratio of a change in output
current (∆ID) to a change in the input voltage (∆VGS).
∆I D
This definition is g m = ID
∆VGS
The following approximate formula IDSS
is useful for calculating gm if you

know gm0.
 VGS 
=
g m g m0 1 − ∆ ID
 V 
 GS(off)  ∆VGS
The value of gm0 can be found

–VGS
from 2 I DSS VGS(off) 0
gm0 =
VGS(off)
Summary
The JFET
Because the slope changes at every point along the curve,
the transconductance is not constant, but depends on where
it is measured. I D (mA)
10 mA
What is the transconductance for 8.0

the JFET at the point shown? 6.0 5.7
4.0 3.7
∆I D 5.7 mA − 3.7 mA
=
gm = 2.0
∆VGS −0.7 V − (−1.3 V)
–VGS
2.0 mA −4 −3 −2 −1 0
= = 3.33 mS
0.6 V −1.3 −0.7
Summary
JFET Input Resistance

VGS
The input resistance of a JFET is given by: RIN =
I GSS
where IGSS is the current into the reverse biased gate.
JFETs have very high input resistance, but it drops when the temperature
increases.
Compare the input resistance of a 2N5485 at 25 oC and at 100 oC.

The specification sheet shows that for VGS = −20 V, IGSS – 1 nA at
25 oC and 0.2 µA at 100 oC.
VGS 20 V
At 25 oC, =
RIN = = 20 GΩ!
I GSS 1 nA
VGS 20 V
At 100 oC, =
RIN = = 100 MΩ
I GSS 0.2 μA
Summary
JFET Biasing
Self-bias is simple and effective, so it is the most common
biasing method for JFETs. With self bias, the gate is
essentially at 0 V. +V = +12 V DD
An n-channel JFET is illustrated. The current

in RS develops the necessary reverse bias that
RD
forces the gate to be less than the source. 1.5 kΩ
VG = 0 V
Assume the resistors are as shown and the
drain current is 3.0 mA. What is VGS? + IS
RG RS 330 Ω
1.0 MΩ –
VG = 0 V; VS = (3.0 mA)(330 Ω) = 0.99 V
VGS = 0 – 0.99 V = − 0.99 V
Summary
JFET Biasing
You can use the transfer curve to obtain a reasonable value
for the source resistor in a self-biased circuit.
I D (mA)
What value of RS should you use 10 mA

to set the Q point as shown?
8.0
6.0
The Q point is approximately at Q 4.0
ID = 4.0 mA and VGS = −1.25 V.
2.0
VGS 1.25 V
=
RS = = 375 Ω –VGS
ID 3.0 mA −4 −3 −2 −1 0
Summary
Graphical Analysis of a Self-Biased JFET
Summary
JFET Biasing
Voltage-divider biasing is a combination of a voltage-divider
and a source resistor to keep the source more positive than
the gate. +V DD
VG is set by the voltage-divider and is independent

RD
of VS. VS must be larger than VG in order to
R1 ID
maintain the gate at a negative voltage with
respect to the source. VG
VS IS
Voltage-divider bias helps stabilize the bias for
R2 RS
variations between transistors.
Summary
JFET Biasing
A graphical analysis of voltage-divider biasing is illustrated.
A typical transconductance curve for the 2N5485 is shown
with IDSS = 6.5 mA and VGS(off) = −2.2 V. +V DD
+12 V
Start with VG: ID (mA)
The Q-point
VG = 2.79 V
8.0 is read from R1 RD
VG/RS = 2.79 mA the plot. It is 3.3 MΩ 820 Ω
6.0
Connect the 3.3 mA and 2.79 V 2N5485
points to Q 4.0 −0.7 V.
establish the
load line. 2.0 R2 RS
1.0 MΩ 1.0 kΩ
–VGS VGS
−3 −2 −1 0 +1 +2 +3
Summary
Q-Point Stability
Summary
Current-Source Bias
Summary
JFET Biasing
+VDD
An even more stable form of bias is +15 V
current-source bias. The current-source Q1

2N5458
can be either a BJT or another FET. With
current-source biasing, the drain current RG RS1
1.0 MΩ 470 Ω
is essentially independent of VGS. RS2
Offset 1.0 kΩ Vout
control
In this circuit Q2 serves as a current source for Q2
Q1. An advantage to this particular circuit is 2N5458
that the output can be adjusted (using RS2) for RS3

0 V DC. 1.0 kΩ
− VSS
− 15 V
Summary
JFET Ohmic Region

As described before, the ohmic region is between the
origin and the active region. A JFET operated in this
region can act as a variable resistor.
7
Data from an actual FET is Ohmic VG = 0 V
6
region
shown. The slopes (which
5
represent conductance) of VG = − 0.5 V
ID 4
successive VGS lines are (mA)
VG = −1.0 V
different in the ohmic region. 3
This difference is exploited VG = −1.5 V

2
for use as a voltage 1
controlled resistance. 0
0 1 2 3 4 5 6 7 8
VDS (V)
Summary
JFET Ohmic Region
Summary
JFET Ohmic Region

Here is a circuit in which the JFET is used as a variable
resistor. Notice that that the drain is connected through a
capacitor, which means the JFET’s Q-point is at the origin.
VCC
+15 V
The gain of the
RC
BJT depends on R1 3.9 kΩ Vout
56 kΩ
the dc voltage C1
Q1
setting of VGG. 1.0 µF
2N3904 C2
Vs = R2 10 µF R3
400 mV pp 39 kΩ RE Q2
100 k Ω −VGG
1.0 kHz 6.2 kΩ 2N5458
Summary
The MOSFET
The metal oxide semiconductor FET uses an insulated gate
to isolate the gate from the channel. Two types are the
enhancement mode (E-MOSFET) and the depletion mode
(D-MOSFET). E-MOSFET
Drain RD
An E-MOSFET has no ID
channel until it is induced by Induced

SiO2
n n
a voltage applied to the gate, channel
so it operates only in p substrate

+
+
–
– +
Gate + – VDD
enhancement mode. An n- + –
–
channel type is illustrated n

VGG
+ n
–
here; a positive gate voltage
induces the channel. Source
Summary
The MOSFET
The D-MOSFET has a channel that can is controlled by the
gate voltage. For an n-channel type, a negative voltage
depletes the channel; and a positive voltage enhances the
channel. D-MOSFET RD RD
A D-MOSFET can
operate in either n n
mode, depending on –
–
+
+
+
+
–
–
+ +
the gate voltage. –
–
+
+
p
–
VDD
+
+
–
– p
–
VDD
– + + –
– + + –
– +
VGG n VGG n
+ –
operating in D-mode operating in E-mode

Summary
The MOSFET
MOSFET symbols are shown. Notice the broken line
representing the E-MOSFET that has an induced channel.
The n channel has an inward pointing arrow.
E-MOSFETs D-MOSFETs
D D D D
G G G G
S S S S
n channel p channel n channel p channel
Summary
The MOSFET
The transfer curve for a MOSFET is has the same parabolic
shape as the JFET but the position is shifted along the x-axis.
The transfer curve for an n-channel E-MOSFET is entirely in
the first quadrant as shown. I D
The curve starts at VGS(th), which is a

nonzero voltage that is required to have
channel conduction. The equation for
the drain current is
I D K (VGS − VGS(th) )
2
=
0 VGS(th) +VGS
Summary
The MOSFET
Recall that the D-MOSFET can be operated in either mode.
For the n-channel device illustrated, operation to the left of
the y-axis means it is in depletion mode; operation to the
right means is in enhancement mode. I D
As with the JFET, ID is zero at VGS(off).

When VGS is 0, the drain current is
IDSS, which for this device is not the
maximum current. The equation for I DSS
drain current is
2
 V 
I D ≅ I DSS 1 − GS 
 V 
 GS(off)  –VGS
VGS(off) 0
Summary
MOSFET Biasing
E-MOSFETs can be biased using bias methods like the BJT
methods studied earlier. Voltage-divider bias and drain-
feedback bias are illustrated for n-channel devices.
+V DD +VDD
RD RD
R1 RG
R2
Voltage-divider bias Drain-feedback bias

Summary
MOSFET Biasing
The simplest way to bias a D-MOSFET is with zero bias. This
works because the device can operate in either depletion or
enhancement mode, so the gate can go above or below 0 V.
+VDD +V DD
RD RD
C
VG = 0 V IDSS ac
input
VGS = 0
RG RG
Zero bias, which can only be used for the D-MOSFET

Selected Key Terms
J FET Junction field-effect transistor; one of two

major types of field-effect transistors.
Dr ain One of three terminals of a FET analogous to

the collector of a BJT.
Source One of three terminals of a FET analogous to

the emitter of a BJT.
Gate One of three terminals of a FET analogous to

the base of a BJT.
Selected Key Terms
Tr ansconductance The ratio of a change in drain current to a

(gm) change in gate-to-source voltage in a FET.
MOSFET Metal oxide semiconductor field effect
transistor; one of two major types of FETs;
sometimes called IGFET.
Depeletion In a MOSFET, the process of removing or
depleting the channel of charge carriers and
thus decreasing the channel conductivity.
Enhancement In a MOSFET, the process of creating a
channel or increasing the conductivity of the
channel by the addition of charge carriers.
Quiz
1. If an n-channel JFET has a positive drain voltage and the

gate-source voltage is zero, the drain current will be
a. zero
b. IDSS
c. IGSS
d. none of the above
Quiz
2. For a JFET, two voltages with the same magnitude but

opposite signs are
a. VD and Vp
b. VD and VS
c. VGS(th) and Vcutoff
d. Vp and VGS(off)
Quiz
3. A set of characteristic curves for a JFET are shown. The

blue lines represent different values of
a. VDS ID
b. VGS
c. VS
d. Vth
VDS
Quiz
4. Transconductance can be expressed as

∆I D
a. g m =
∆VGS
∆I G
b. g m =
∆VDS
∆I D
c. g m =
∆VDS
∆I G
d. g m =
∆VGS
Quiz
5. JFETs cannot be biased using

a. self bias
b. voltage-divider bias
c. zero bias
d. current-source bias
Quiz
6. The JFET operating point in the circuit shown is

a. at the origin
b. at Isat VCC
+15 V
c. at VCC R1
RC
3.9 kΩ Vout
56 kΩ
C1
Q1
d. undefined 2N3904 C2
1.0 µF
Vs = R2 10 µF R3
100 k Ω −VGG
1.0 kHz 6.2 kΩ 2N5458
Quiz
7. The JFET in this circuit acts like a(n)

a. voltage source
b. amplifier VCC
+15 V
c. capacitor R1
RC
3.9 kΩ Vout
56 kΩ
C1
Q1
d. resistor 2N3904 C2
1.0 µF
Vs = R2 10 µF R3
100 k Ω −VGG
1.0 kHz 6.2 kΩ 2N5458
Quiz
8. The symbol for a p-channel E-MOSFET is
D D D D
G G G G
S S S S
a. b. c. d.
Quiz
9. The transfer curve shown is for an n-channel

a. E-MOSFET ID
b. D-MOSFET
c. JFET
d. all of the above
0 VGS(th) +VGS
Quiz
10. A type of FET that can use the same bias method as a
BJT is a(n)
a. E-MOSFET
b. D-MOSFET
c. JFET
d. all of the above
Quiz
Answers:
1. b 6. a
2. d 7. d
3. b 8. b
4. a 9. a
5. c 10. a

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Electronic Devices

region, where current and voltage Ohmic region

From B to C is the active (or

damage the FET.

positive and has

By substitution, you can find other IDSS

A certain 2N5458 JFET has IDSS = 6.0 mA and VGS(off) = – 3.5 V.

(b) Show the point for the

(b) When ID = ½ IDSS,

is useful for calculating gm if you

The value of gm0 can be found

What is the transconductance for 8.0

JFET Input Resistance

Compare the input resistance of a 2N5485 at 25 oC and at 100 oC.

An n-channel JFET is illustrated. The current

What value of RS should you use 10 mA

Graphical Analysis of a Self-Biased JFET

VG is set by the voltage-divider and is independent

current-source bias. The current-source Q1

that the output can be adjusted (using RS2) for RS3

JFET Ohmic Region

This difference is exploited VG = −1.5 V

JFET Ohmic Region

JFET Ohmic Region

channel until it is induced by Induced

so it operates only in p substrate

channel type is illustrated n

operating in D-mode operating in E-mode

The curve starts at VGS(th), which is a

As with the JFET, ID is zero at VGS(off).

Voltage-divider bias Drain-feedback bias

Zero bias, which can only be used for the D-MOSFET

J FET Junction field-effect transistor; one of two

Dr ain One of three terminals of a FET analogous to

Source One of three terminals of a FET analogous to

Gate One of three terminals of a FET analogous to

Tr ansconductance The ratio of a change in drain current to a

1. If an n-channel JFET has a positive drain voltage and the

2. For a JFET, two voltages with the same magnitude but

3. A set of characteristic curves for a JFET are shown. The

4. Transconductance can be expressed as

5. JFETs cannot be biased using

6. The JFET operating point in the circuit shown is

7. The JFET in this circuit acts like a(n)

8. The symbol for a p-channel E-MOSFET is

9. The transfer curve shown is for an n-channel

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