Lecture 11

Single Stage FET Amplifiers:

Common Source (CS) Amplifier

The Building Blocks of Analog Circuits - I

In this lecture you will learn:

• General amplifier concepts (in terms of the two-port models)

• Common source amplifier (CS)
• Small signal models of amplifiers

ECE 315 – Spring 2007 – Farhan Rana – Cornell University

Reminder: Thevenin and Norton Equivalent Circuits

Consider an arbitrary linear circuit:

Linear circuit

It can be represented by any two of the following equivalent circuits:

RTH

+ ITH RTH
VTH
-

VTH  ITH RTH

ECE 315 – Spring 2007 – Farhan Rana – Cornell University

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 Types of Linear Amplifiers
There are four basic types of amplifiers that we will study in this course:

1) Voltage to Voltage Amplifiers (or just Voltage Amplifiers)

+ +
vin Amp Load vout
- -

2) Voltage to Current Amplifiers (or Transconductance Amplifiers)

iout
+
vin Amp Load
-

3) Current to Current Amplifiers (or just Current Amplifiers)

iout
iin Amp Load

4) Current to Voltage Amplifiers (or Transimpedance Amplifiers)

+
iin Amp Load vout
-

ECE 315 – Spring 2007 – Farhan Rana – Cornell University

Two-Port Amplifier Models: A Voltage Amplifier

A Voltage Amplifier:

Rout
+ + A v +
Linear circuit v in Rin RL v out
- v in
- -

Can be represented as

Rout
RS +
+ + A v
v in Rin RL v out
+ - v in
vs - -
-

ECE 315 – Spring 2007 – Farhan Rana – Cornell University

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 Two-Port Amplifier Models: A Voltage Amplifier

A Voltage Amplifier:

Rout
RS + +
v in + A v v out
Rin - v in RL
+
vs - -
-

v out  Rin  RL 
 Av   R 
vs  in
R  RS  out  R L

Requirements: Input Ouput

Large input resistance Rin voltage voltage
Small output resistance Rout divider divider

Open circuit output voltage gain (i.e. when RL = ∞):

v out
 Av  Voltage gain
v in
ECE 315 – Spring 2007 – Farhan Rana – Cornell University

Two-Port Amplifier Models: A Current Amplifier

A Current Amplifier:

i in iout

is RS Rin Ai i in Rout RL

iout  RS  Rout 
 Ai   
is  RS  Rin  Rout  RL 
Requirements: Input Ouput
Small input resistance Rin current current
Large output resistance Rout divider divider

Short circuit output current gain (i.e. when RL = 0):

iout
 Ai  Current gain
i in
ECE 315 – Spring 2007 – Farhan Rana – Cornell University

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 Two-Port Amplifier Models: A Transconductance Amplifier

A Transconductance Amplifier (or a Voltage-to-Current Amplifier):

iout
RS +
v in Rin Gmv in Rout RL
+
vs -
-

iout  Rin  Rout 

 Gm   
vs  RS  Rin  Rout  RL 

Requirements: Input Ouput

Large input resistance Rin voltage current
Large output resistance Rout divider divider

Short circuit output current and transconductance gain (i.e. when RL = 0):
iout
 Gm  Transconductance gain
v in
ECE 315 – Spring 2007 – Farhan Rana – Cornell University

Two-Port Amplifier Models: A Transimpedance Amplifier

A Transimpedance (or a Transresistance) Amplifier (or a Current-to-Voltage Amplifier):

i in Rout
+ R i +
is RS Rin v out RL
- m in
-

v out  RS  RL 
 Rm   
is  S
R  R in  out
R  R L

Requirements: Input Ouput

current voltage
Small input resistance Rin
divider divider
Small output resistance Rout

Open circuit output voltage and transimpedance gain (i.e. when RL = ∞):
v out
 Rm  Transimpedance gain
i in
ECE 315 – Spring 2007 – Farhan Rana – Cornell University

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 Two-Port Amplifier Models: General Concepts

is equivalent to

Rin Rin

Rout Rout
Rout
Av Ai
Rin

The two-port models are equivalent (inter-convertible)

The designation of an amplifier as a voltage, current, transconductance, or

transimpedance amplifier depends on the values of the input and output resistances

Need to find the input resistance, output resistance, open circuit voltage gain, and
short circuit current gain to characterize an amplifier

ECE 315 – Spring 2007 – Farhan Rana – Cornell University

Unilateral Networks and Two-Port Amplifier Models

For many circuits and amplifiers, the kind of two-port models described here are not
strictly valid

Rout
RS + +
+ A v v out
v in Rin RL
+ - v in
vs - -
-

Reasons:
The input resistance Rin can depend on the load resistance RL
The output resistance Rout can depend on the source resistance Rs

Circuits in which the above does not happen, and for which the two-port models
described here are strictly valid, are unilateral

In many cases, even for non-unilateral networks, two-port models described here
tend to be good approximations for hand-calculations

ECE 315 – Spring 2007 – Farhan Rana – Cornell University

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 The Common Source Amplifier
VDD
VBS  0

R
IOUT + iout
VOUT  v out
D ID + id
RS
G
+
+
vs IG + ig RL VOUT  v out
-
-
S
+
VBIAS
-

The source terminal is “common” between the input and the output

ECE 315 – Spring 2007 – Farhan Rana – Cornell University

The Common Source Amplifier

VDD VOUT
VBS  0
VBIAS  VTN
R
IOUT + iout RL
VOUT  v out VOUT
R  RL
Cut off

Saturation
D ID + id
RS
G
+
+
vs IG + ig RL VOUT  v out
- - Linear
S
+
VBIAS
-
VTN VBIAS
DC Bias Analysis (Large Signal Analysis):
Make sure the output load resistance RL is included in the DC bias analysis

Start by assuming the FET is in saturation (and then later verify):

kn
VDD  IOUT  I D R  VOUT ID  VBIAS  VTN 2 1  nVOUT 
2
V  k
 VDD   OUT  I D R  VOUT ID  n VBIAS  VTN 2
 RL  2
RL
 VOUT  VDD  I D R 
R  RL

ECE 315 – Spring 2007 – Farhan Rana – Cornell University

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 The Common Source Amplifier: Small Signal Model
ib id
Gate Drain
+ 0
RS v gs ro
g mv gs +
- g mbv bs R RL v out
+ -
vs
Source
is
-
-
v bs  0
Base +

Compare with the standard voltage amplifier model:

Rout
RS +
+ + A v
v in Rin RL v out
+ - v in
vs - -
-

ECE 315 – Spring 2007 – Farhan Rana – Cornell University

The Common Source Amplifier: Small Signal Model

ib id
Gate Drain
+ 0
RS v gs ro
g mv gs +
- g mbv bs R RL v out
+ -
vs
Source
is
-
-
v bs  0
Base +

Compare with the standard transconductance amplifier model:

iout
RS
+
v in Rin Gmv in Rout RL
+
vs -
-

ECE 315 – Spring 2007 – Farhan Rana – Cornell University

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 The Common Source Amplifier: Open Circuit Voltage Gain
ig Gate Drain id
+ 0
+ v gs ro +
+ g mv gs
v test v in - g mbv bs R v out
- - -
Source
-
v bs  0
Open circuit voltage gain and transimpedance gain: Base +
To find the open circuit voltage gain or the transimpedance gain one must:

i) Remove the load resistance RL at the output that the circuit will drive
ii) Then apply a test voltage source at the input
iii) Then find the resulting open circuit output voltage
iv) Take the ratio of the output voltage and the input voltage to find the open circuit
voltage gain:
v out i R
Av    d   g m ro || R 
v in v in
v) Or take the ratio of the output voltage and the input current to find the
transimpedance gain:
v out
Rm    This result is somewhat artificial since at non-zero frequencies
there will be a finite input current due to capacitances
i in
ECE 315 – Spring 2007 – Farhan Rana – Cornell University

The Common Source Amplifier: Short Circuit Current Gain

ig Gate Drain id
+ 0
+ v gs ro
+ g mv gs
v test v in - g mbv bs R iout
- -
Source
-
v bs  0
Short circuit current gain and transconductance gain: Base
To find the short circuit current gain or the transconductance gain one must:
+

i) Short the load resistance RL at the output that the circuit will drive
ii) Then apply a test voltage source at the input
iii) Then find the resulting current at the shorted output
iv) Take the ratio of the output and the input currents to find the short circuit current
gain:
i g mv gs ∞ for the CS amplifier
Ai  out   
ig 0 (at DC)
This result is somewhat artificial since at non-zero frequencies
there will be a finite input current due to capacitances

v) Or take the ratio of the output current and the input voltage to find the
transconductance gain: i g mv gs
Gm  out   g m
v in v in
ECE 315 – Spring 2007 – Farhan Rana – Cornell University

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 The Common Source Amplifier: Input Resistance
ig Gate Drain id
+ 0
+ v gs ro
+ g mv gs
v test v in - g mbv bs R RL
- -
Source
-
v bs  0
Input resistance: +
Base
To find the input resistance one must:

i) Make sure the load resistance RL that the circuit will drive is in place at the output
ii) Then apply a test voltage source at the input
iii) Then find the resulting current at the input
iv) Then take the ratio of the input voltage and the input current

v in
Rin   ∞ for the CS amplifier
ig (at DC)
This result is somewhat artificial since at non-zero frequencies
there will be a finite input current due to capacitances

ECE 315 – Spring 2007 – Farhan Rana – Cornell University

The Common Source Amplifier: Output Resistance

ig Gate Drain id itest
+ 0
v gs ro +
- g mv gs g mbv bs v test
RS R
-
Source RD
-
v bs  0
Output resistance: +
Base
To find the output resistance one must:

i) Remove the load resistance RL and put a test voltage source in its place
ii) Make sure the source resistance RS is in place at the input
iii) Then find the resulting test current at the output
iv) Then take the ratio of the test voltage and the test current

v test Fairly large for the CS

Rout   ro || R
itest amplifier

Analysis shows that CS is a good transconductance amplifier!

Resistance looking into the drain end of a FET:
RD  ro
ECE 315 – Spring 2007 – Farhan Rana – Cornell University

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 The Common Source Amplifier: Complete Two-Port Model
ib id
Gate Drain

RS + 0
v gs ro
g mv gs +
+ - g mbv bs R RL v out
vs -
- Source
is
-
Base + v bs  0
Compare with the standard voltage amplifier model:

Rout
Rin  
RS +
+ + A v
+
v in Rin - v in RL v out Av   g m ro || R 
vs - -
- Rout  ro || R 

Now we can use the standard expression:

v out  Rin  RL   RL 
 Av      g m ro || R  
vs  in
R  RS  out
R  R L 
 or || R   R L
ECE 315 – Spring 2007 – Farhan Rana – Cornell University

The Common Source Amplifier: Complete Two-Port Model

ib id iout
Gate Drain

RS + 0
v gs ro
g mv gs +
+ - g mbv bs R RL v out
vs -
- Source
is
-
Base + v bs  0

Compare with the standard transconductance amplifier model:

Rin  
iout
RS
+
Gmv in Gm   g m
v in Rin Rout RL
+
vs - Rout  ro || R 
-

Now we can use the standard expression:

iout  Rin  Rout   ro || R  

 Gm      g m  
vs  in
R  RS  out
R  R L  ro || R   RL 
ECE 315 – Spring 2007 – Farhan Rana – Cornell University

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 The Common Source Amplifier: gm vs go

In saturation:
gm  k n VGS  VTN 1  nVDS 
kn
go  VGS  VTN 2 n
2
Therefore:
gm 21  nVDS  2
 gm ro  
go VGS  VTN 2 n VGS  VTN n

Rough Estimates:

VGS  VTN  ~ 0.5  1.0 V

n ~ 0.05  0.10 V 1
Therefore:

gm 2
 gm ro  ~ 20  80
go VGS  VTN n
ECE 315 – Spring 2007 – Farhan Rana – Cornell University

The Common Source Amplifier with Source Degeneration

VDD
VBS  0

R
IOUT + iout
VOUT  v out
D ID + id
RS
G
+
+
vs IG + ig RL VOUT  v out
-
-
S
+
VBIAS RE
-

kn
VDD  IOUT  I D R  VOUT ID  VGS  VTN 2 1  nVOUT 
2
V  k
 VDD   OUT  I D R  VOUT ID  n VGS  VTN 2
 RL  2
RL
 VOUT  VDD  I D R  VGS  VBIAS  I D RE
R  RL
ECE 315 – Spring 2007 – Farhan Rana – Cornell University

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 CS Amplifier with Source Degeneration: Open Circuit Voltage Gain
ig Gate Drain id
+ g mv gs 0
+ v gs ro +
+
v test v in - g mbv bs R v out
- - vs -
Source
RE
-
v bs  0
Open circuit voltage gain: Base +

v out  v s v  vs
id  g mv gs   g m v in  v s   out
ro ro
 i d R  i d RE R  RE
 id  g m v in  id RE    g mv in  id g m RE  id
ro ro
gm
 id  v in Av is reduced when RE is present
 R  RE 
 1   g m RE 
 ro 
v out  id R g m Rro g m ro || R 
 Av     v in
ro  R  RE 1  g m ro  
1  g m ro 
v in v in RE
 1 
 ro  R  
ECE 315 – Spring 2007 – Farhan Rana – Cornell University

CS Amplifier with Source Degeneration: Transconductance Gain

ig Gate Drain id
+ g mv gs 0
+ v gs ro
+
v test v in - g mbv bs R iout
- - vs
Source
RE
-
v bs  0
Transconductance gain: Base +
v out  v s v  vs
id  g mv gs   g m v in  v s   out
ro ro
0  i d RE R
 id  g m v in  id RE    g mv in  id g m RE  id E
ro ro
gm
 id  v in
 RE  Gm is reduced when RE is present
 1  r  g m RE 
 o 
iout  id g m ro gm
 Gm    
v in v in ro  RE 1  g m ro   RE 
 1  r 1  g m ro 
 o 
ECE 315 – Spring 2007 – Farhan Rana – Cornell University

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 CS Amplifier with Source Degeneration: Output Resistance
ig Gate Drain id itest
+ + 0
g mv gs
v gs ro +
RS v in - g mbv bs R v test
vs -
Source RD
RE
-
-
v bs  0
Output resistance: Base
+
v test  v s v  vs
id  g mv gs   g m v in  v s   test
ro ro
v test  id RE  1
 id  g m i g R s  id RE  
v
  id  g m  RE  test
ro  ro  ro
v test
 id 
ro  RE 1  g m ro 
v test
 RD   ro  RE 1  g m ro  RD is increased when RE is present
id
v test R ro  RE 1  g m ro 
 Rout   R || RD  
itest ro  R  RE 1  g m ro 
ECE 315 – Spring 2007 – Farhan Rana – Cornell University

Relations to Remember

For any small signal amplifier model, the following always hold:

(Transconductance) X (Output resistance) = (Open circuit voltage gain)

(Transimpedance) / (Output resistance) = (Short circuit current gain)

The above follows from the equivalent Thevenin and Norton models of the amplifier

***All quantities must be calculated assuming the same value of Rs (typically zero)

ECE 315 – Spring 2007 – Farhan Rana – Cornell University

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ECE 315 – Spring 2007 – Farhan Rana – Cornell University

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