AMBO UNIVERSITY HACHALU HUNDESSA CAMPUS

SCHOOL OF INFORMATICS AND ELECTRICAL ENGINEERING

DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
APPLIED ELECTRONICS-II LAB-MANUAL

Experiment #1 TO #5:
Operational Amplifiers and Applications

EQUIPMENT

Lab Equipment Equipment Description

(1) DC Power Supply Agilent E3631A Triple Output DC Power Supply
(1) Digital Multimeter (DMM) Agilent 34460A (DMM)
(1) Breadboard Prototype Breadboard
(3) Test Leads Banana to Alligator Lead Set
Table 1 – Equipment List

COMPONENTS

Type Value Symbol Name Multisim Part Description

Resistor --- Ω R Basic/Resistor ---
Op-Amp LM741 LM741 Basic/Analog/OpAmp/741 ---
Table 2 – Component List

OBJECTIVES
• Verify Ideal Model Op-Amp Characteristics
• Design, build, and test a DC Inverting Amplifier
• Design, build, and test a DC Non-Inverting Amplifier
• Design, build, and test a DC Summing Amplifier
• Design, build, and test a DC Difference Amplifier
• Design, build, and test a Buffer (Current Amplifier)
• Design, build, and test a Comparator

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LAB Report Instructions

Besides the general guidelines, report the following for this lab:

 The lab report should be segmented into 4 parts:

o Inverting amplifier
o Non-inverting amplifier
o Differencing amplifier
o Summing amplifier

 Each part should be comprised of

o the circuit design with PSpice Capture and the simulated voltages at each node as well as the
closed-loop gain,
o the analytical equation for each amplifier and the calculated output voltage and gain,
o the experimental voltage readout with a description of the experimental procedure ,
o a table of all three values for the op-amp terminal voltages: from simulation, theory, and
experiment,
o a table of all three values for the closed-loop op-amp gain seen by V3: from simulation, theory,
and experiment,
o and your explanation of the variations between the three values of the last two steps.

 Answer the questions in the Analysis section.

INTRODUCTION
Operational Amplifiers or “Op-Amps” are important building blocks for a wide range of electronic
circuits. They are among the most widely used electronic devices today with usage in a vast array of
consumer, industrial, and scientific devices. The term ‘operational’ is used because they can perform all
the basic arithmetic operations (addition – summing, subtraction – difference, multiplication, and division).
In this lab, we will examine the characteristics of an ideal Op-Amp, build fundamental DC Operational
Amplifier Feedback Circuits and see the effects of the Op-Amps on the output of those circuits.

General Operational Amplifier Physical Details

The circuit symbol for an Op-Amp is shown on the right in Figure 1 where:

• VP: Non-Inverting Input

• VN: Inverting Input
• Vout: Output Voltage
• VCC+: Positive Power Supply
• VCC-: Negative Power Supply

Figure 1 – Op-Amp Symbol

LM741 Operational Amplifier

For this lab, you will use the LM741 Op-Amp, which is included in your ECE 2110 toolkit. LM741 series
are general purpose Op-Amps intended for a wide range of applications and provide superior
performance in general feedback circuits. A picture of the LM741 and its internal connection diagram are
shown in Figure 2 and Figure 3, respectively.

Figure 2 – Picture of the LM741 Op-Amp Figure 3 – LM741 Op-Amp Pin Diagram
(The pins used in this lab are shaded in blue)

If you examine your LM741 Op-Amp, you will find a notch/dot in one of the corners. The notch/dot is
located right next to Pin 1, thus it is used as a marking to identify the orientation of the Op-Amp. There
are a total of eight pins within the LM741.
Basic Operational Amplifier Circuits
Table 1 shows several fundamental feedback Op-Amp circuits including the DC Inverting Amplifier, DC
Non-Inverting Amplifier, Summing Amplifier, Difference Amplifier, Buffer, and Comparator.

Gains Circuit Diagram Block Diagram

Rf
Rin
Inverting Amplifier Vin
Vin K1 V
𝑅𝑅𝑓𝑓 Vout out
𝐾𝐾1 = −
𝑅𝑅 𝑖𝑖𝑛𝑛

Vin
Vout
Non-Inverting Amplifier
𝑅𝑅2 Vin K1 V
𝐾𝐾 = �1 + � R1 R2 out

1
𝑅𝑅1

R2 Rf
Summing Amplifier V2
R1
𝑅𝑅𝑓𝑓 V1 K1
V1 +
𝐾𝐾1 = − 𝚺𝚺𝚺𝚺 V out
𝑅𝑅 1 Vout
+
𝑅𝑅𝑓𝑓 V
2
K
2
𝐾𝐾2 = −
𝑅𝑅 2

Rf

Difference Amplifier R1
𝑅𝑅𝑓𝑓 V1
V1 K1
𝐾𝐾1 = − Vout +
𝑅𝑅 1
R2 𝚺𝚺𝚺𝚺 V
out
V2 +
𝑅𝑅1 + 𝑅𝑅𝑓𝑓 𝑅𝑅𝑔𝑔 V
2
K
2
𝐾𝐾2 = � �� � Rg
𝑅𝑅 𝑅𝑅 + 𝑅𝑅
1 𝑔𝑔 2

Vin
Buffer Vout Vin K1 V
out
𝐾𝐾1 = 1

Comparator V1 V
Vout 1 V1 > V2
V
If V1 > V2 then Vout = VCC+ V1 < V2 out 2
V2
V
If V1 < V2 then Vout = VCC-

Table 1 – Summary of Basic Op-Amp Circuits

(Op-Amp figures are simplified to save space but it is understood that VCC+ and VCC- are still there)

Copyright © 2014 GWU SEAS ECE Department ECE 2110: Circuit Theory
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Operational Amplifier Multisim Tips
Op-Amp Circuits can be simulated using Multisim. Once you have created a new design and have
access to the schematic page, you can click on the “Place Analog” icon located near the upper left corner
of the window. Once the component window pops up, select the OPAMP family, then type in and search
for “741.” Although there are several types of LM741 available in the Multisim Part Database, we will use
the simple 741 model. This is the actual part included in your ECE 2110 parts kit. Table 2 shows
Multisim Part Information for the LM741 Op-Amp.

Component Name Multisim Part Name Instructions Symbol

7 1 5

• Click “Place Analog” 3

Group: Analog
LM741 Operational • Click on OPAMP Family 6
Family: OPAMP LM741
Amplifier • Search for 741
Component: 741 2
• Select and use the 741
4

Table 2 – Multisim Part Information

The pin definition of the LM741 in Multisim is identical to the pin definition given in Figure 3. Op-Amp
Circuits can be constructed by connecting components to the different pins. Figure 4 shows the final
Multisim schematic for a Non-Inverting Amplifier with Vin = 200mV and K = 2. Keep in mind that for VCC-,
the negative terminal of the power supply goes into pin 4. For VCC+, the positive terminal of the power
supply goes into pin 7.

12 V
VCC+
7 1 5

6
LM741 Vout
Vin 200mV 2

4
VCC-
-12 V

R1 R2

10kΩ 10kΩ

Figure 4 – Non-Inverting Amplifier with Vin = 200mV and K = 2

Multisim DC Simulation
The output voltage of an Op-Amp Circuit using only DC input voltages can be simulated quickly and
easily. Once your circuit is complete, click the green arrow to run the simulation. Once the simulation is
running, click on the “Measurement Probe” button and place a probe at Vout, or any other location on
the circuit where you would like to make a measurement. Initially, the probe will show much more
information than is currently necessary. Double-click the probe information to bring up the window shown
in Figure 6. Notice that under the Show column, every property starts with a Yes. Deselect all properties
by clicking the red check mark at the top of the Show column, then proceed to select the desired
properties. In this case, we will only need the top voltage property V. We can also change the Precision
to show six significant figures.

V(rms):
V(dc):
I:
I(p-p):
I(rms):
I(dc):
Freq.:

Figure 5 – Standard Probe Details Figure 6 – Probe Properties Window

12 V
VCC+
7 1 5

6
LM741 ProbV
e1
out
Vin 200mV 2

4
VCC-
-12 V

R1 R2

10kΩ 10kΩ

Figure 7 – Probe Showing Simulated Vout

PRELAB
Part I – Inverting Amplifier

Rf

Rin
Vin
Vout

Figure P.1 – Inverting Amplifier

1. Using Table 1 and Figure P.1, design an DC Inverting Amplifier that has the following
specifications:
• VCC+ = +12V
• VCC- = -12V
• Vin = 200mV
• Closed Loop Voltage Gain (K) = -10
• Assume Rin = 10kΩ (see the textbook to better understand this choice)
2. Show all general equations and design steps.
3. Simulate your design in Multisim as described in the Introduction.

Part II – Non-Inverting Amplifier

Vin
Vout

R1 R2

Figure P.2 – Non-Inverting Amplifier

1. Using Table 1 and Figure P.2, design a DC Non-Inverting Amplifier that has the following
specifications:
• VCC+ = +12V
• VCC- = -12V
• Vin = 200mV
• Closed Loop Voltage Gain (K) = 10
• Assume R1 = 10kΩ
2. Show all general equations and design steps.
3. Simulate your design in Multisim as described in the Introduction.
Part III – Summing Amplifier

R2 Rf
V2
R1
V1
Vout

Figure P.3 – Summing Amplifier

1. Using Table 1 and Figure P.3, design a DC Summing Amplifier that has the following
specifications:
• VCC+ = +12V
• VCC- = -12V
• V1 = 500mV
• V2 = 500mV
• Closed Loop Voltage Gain (K) = K1 = K2 = -2
• Assume Rf = 10kΩ
2. Show all general equations and design steps.
3. Simulate your design in Multisim as described in the Introduction.

Part IV – Difference Amplifier

Rf

R1
V1
Vout
R2
V2

Rg

Figure P.4 – Difference Amplifier

1. Using Table 1 and Figure P.4, design a DC Difference Amplifier that has the following
specifications:
• VCC+ = +12V
• VCC- = -12V
• V1 = 400mV
• V2 = 900mV
• Closed Loop Voltage Gain (K) = K1 = K2 = 2
• Assume R1 = R2 = 10kΩ
2. Show all general equations and design steps.
3. Simulate your design in Multisim as described in the Introduction.
Part V – Buffer

Vin
Vout

Figure P.5 – Buffer

1. Using Table 1 and Figure P.5, design a Buffer that has the following specifications:
• VCC+ = +12V
• VCC- = -12V
• Vin = 500mV
• Closed Loop Voltage Gain (K) = 1
2. Show all general equations and design steps.
3. Simulate your design in Multisim as described in the Introduction.

Part VI – Comparator

V1
Vout
V2
Figure P.6 – Buffer

1. Using Table 1 and Figure P.6, design a Comparator that has the following specifications:
• VCC+ = +12V
• VCC- = -12V
• V1 = 1V
• V2 = 500mV
• If V1 > V2, then Vout = 12V
• If V1 < V2, then Vout = -12V
2. Show all general equations and design steps.
3. Simulate your design in Multisim as described in the Introduction.
LAB
Part I – Verification of Inverting Amplifier
Rf

Rin
Vin
Vout

Figure 1.1 – Inverting Amplifier Figure 1.2 – Op-Amp Positioning on Breadboard

1. Build the Inverting Amplifier according to your prelab design and Figure 1.1.
Note: For this lab, we can utilize the breadboard optimally by plugging the Op-Amp into the
breadboard so that it straddles the gap between the left and right sections of the socket strip.
The Op-Amp must be positioned as shown in Figure 1.2 so that the pins do not short.
2. Set the Agilent Power Supply +25V terminals to 12V and the -25V terminals to -12V.
a. Ensure the output is OFF before attaching the power supply to the LM741.
b. Connect VCC+ (pin 7) to the + 12V terminal on the power supply.
c. Connect VCC- (pin 4) to the - 12V terminal on the power supply.
3. Set the Agilent Power Supply 6V terminals to 200mV.
a. Ensure the output is OFF before attaching the power supply to the LM741.
b. Connect the negative terminal to the common green ground terminal on the Agilent
Power Supply, tying all ground nodes together.
c. Connect the positive terminal to Rin, which is then connected to VN (pin 2).
d. Turn on the power supply once the circuit is fully connected.
4. Measure VP, VN, and Vout of the Op-Amp using the DMM. Verify that the voltage gain (K) is -10.
a. Record all of your data in Table 1.1.
5. Change the original 200mV input to 2V. What is Vout?
a. Record your answer as Vout2. Discuss any limitations you find in the analysis section of
your lab report.
6. Change the input back to 200mV and substitute the feedback resistor Rf on the inverting
amplifier with a resistor of large value.
a. Measure the output and confirm that the gain corresponds to the nominal gain given by
-Rf/Rin.
b. Progressively increase the gain and measure the output. Is there a limit where the
output does not change regardless of the gain?
7. Replace the DC input voltage with a 400mVpp 10kHz sine wave using the function generator.
a. Measure Vout using the oscilloscope. Does the signal invert?
b. Save a screenshot from the oscilloscope showing both Vin and Vout.

Calculated Simulated Percent Error Measured Percent Error

VP
VN
Vin
Vout
K
Vout2
Table 1.1 – Inverting Amplifier Data

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Part II – Verification of DC Non-Inverting Amplifier
Vin
Vout

R1 R2

Figure 2.1 – Non-Inverting Amplifier

1. Build the Non-Inverting Amplifier according to your prelab design and Figure 2.1.
2. Connect the power supplies similar to the connection done in Part I.
3. Measure VP, VN, and Vout of the Op-Amp using the DMM. Verify that the voltage gain (K) is 10.
a. Record all of your data in Table 2.1.

Calculated Simulated Percent Error Measured Percent Error

VP
VN
Vin
Vout
K
Table 2.1 – Non-Inverting Amplifier Data

Part III – Verification of Summing Amplifier

R2 Rf
V2
R1
V1
Vout

Figure 3.1 – Summing Amplifier

1. Build the Summing Amplifier according to your prelab design and Figure 3.1.
2. Connect the power supplies similar to the connection done in Part I.
3. Measure VP, VN, and Vout of the Op-Amp using the DMM. Verify that the voltage gain (K) is -2
and Vout = -2(V1 + V2).
a. Record all of your data in Table 3.1.

Calculated Simulated Percent Error Measured Percent Error

VP
VN
Vin
Vout
K
Table 3.1 – Summing Amplifier Data
Part IV – Verification of Difference Amplifier
Rf

R1
V1
Vout
R2
V2

Rg

Figure 4.1 – Difference Amplifier

1. Build the Summing Amplifier according to your prelab design and Figure 4.1.
2. Connect the power supplies similar to the connection done in Part I.
3. Measure VP, VN, and Vout of the Op-Amp using the DMM. Verify that the voltage gain (K) is 2
and Vout = 2(V2 – V1).
a. Record all of your data in Table 4.1.

Calculated Simulated Percent Error Measured Percent Error

VP
VN
V1
V2
Vout
K
Table 4.1 – Difference Amplifier Data

Part V – Verification of the Op-Amp Buffer (Current Amplifier)

Vin
Vout

Figure 5.1 – Buffer (Current Amplifier)

1. Build the Buffer (Current Amplifier) according to your prelab design and Figure 5.1.
2. Connect the power supplies similar to the connection done in Part I.
3. Measure VP, VN, and Vout of the Op-Amp using the DMM. Verify that the voltage gain (K) is 1.
a. Record all of your data in Table 5.1.

Calculated Simulated Percent Error Measured Percent Error

VP
VN
Vin
Vout
K
Table 5.1 – Buffer (Current Amplifier) Data

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Part VI – Verification of the Op-Amp Comparator

V1
Vout
V2
Figure 6.1 – Comparator

1. Build the Comparator according to your prelab design and Figure 6.1.
2. Connect the power supplies similar to the connection done in Part I.
3. Measure VP, VN, and Vout of the Op-Amp using the DMM. Verify that the comparator follows the
behavior specified in the prelab.
a. Record all of your data in Table 6.1.

Calculated Simulated Percent Error Measured Percent Error

VCC+
VCC-
V1
V2
Vout
K
Table 6.1 – Comparator Data
POST-LAB ANALYSIS
Compare and contrast the calculated and simulated results from your prelab to the DC measurements
made from the experiments.
1. Explain the reasons for any differences between prelab design and measurements.
2. Explain how each mathematical operation can be performed using the circuits you’ve built in lab.
3. Give one example where a comparator circuit can be used in a practical application.
4. Give one example where a current amplifier circuit can be used in a practical application.
5. Also, explain why the output reaches a limit and saturates regardless of the gain.
Lab# 1(A): Study of Basic OPAMP Configurations and Simple Mathematical
Operations
Objectives:

(I) Study of the inverting amplifier configuration and to find its gain
(II) Study of the non-inverting amplifier configuration and to find its gain
(III) Study simple mathematical operation and design an averaging amplifier

Components: OPAMP 741 chip, Resistors, Oscilloscope, DC voltage source, Bread board

Theory: Please refer the supplementary note.

Circuit Diagram:

Inverting amplifier

Non-inverting amplifier

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Procedure:

(I) Inverting amplifier

1. Configure the circuit as shown in the circuit diagram. Connect the pins 7 and 4 of the IC
to the ±15V output terminals of the D.C. power supply. Connect the 0V terminal to
ground. Choose Rin = 1KΩ and Rf = 10KΩ. Measure the resistance values with
multimeter and calculate gain, -(Rf/Rin). Connect a resistor R3 (= Rin║Rf ≈ Rin) as shown
in the circuit diagram so as to minimize offset due to input bias current.
2. Connect one of the output terminals of the D.C. power supply (0-30V) at the inverting
input (pin no. 2).
3. Switch on the power supply and apply different voltages in the range 0- 1.5V (why?) in
steps of 0.2 V at the inverting terminal. Measure this input using a digital multimeter.
4. Measure the corresponding output voltages with the multimeter and calculate gain V o/Vin.
Note the sign of the output voltage.
5. Now, replace Rf by 50KΩ. Measure the resistance value with multimeter and calculate
gain, -(Rf/Rin).
6. Apply different voltages in the range 0- 0.5V in steps of 0.1 V at the inverting terminal.
Measure this input using a digital multimeter.
7. Measure the corresponding output voltages with the multimeter and calculate gain V o/Vin.
8. Plot graphs for V in ~ Vo for both the values of RF.
9. You may also use a function generator to give a sinusoidal input and notice the output
waveform using an oscilloscope.

(II) Non-inverting amplifier

1. Configure the circuit as shown in the circuit diagram with R in = 1KΩ and Rf = 10KΩ.
using the measured value of resistance calculate gain, 1+ (R f/Rin).
2. Connect one of the output terminals of the D.C. power supply (0-30V) at the non-
inverting input (pin no. 3).
3. Repeat steps 3 onwards of procedure (I) with inputs applied at non-inverting terminal.

Observations

Table (I):

Obs. Input Rf Rf
No. (V)  = ------  = ------
Rin Rin
Output Gain Average Output Gain Average
(V) Vo/Vin (V) Vo/Vin
0.2
0.4
…

2
Table (For II):

Obs. Input Rf Rf
No. (V) 1 = ------ 1 = ------
Rin Rin
Output Gain Average Output Gain Average
(V) Vo/Vin (V) Vo/Vin
1 0.1
2 0.2
.. …

(ΙΙΙ) Simple mathematical operations using OPAMP

a. To study OPAMP as summing amplifier

Circuit Diagram:

Procedure:
1. Assemble the circuit as shown in circuit diagram choosing R 1, R2, Rf = 10KΩ each. Use
0- ±15V terminal output to provide supply to the IC.
2. Using 0 – 30V and 5V terminals of the power supply, apply two inputs at the inverting
terminal. Measure each input with multimeter.
3. Measure the output with multimeter for at least five input combinations.
4. Compare the output with the sum of the two inputs.

Observations:

Obs.No V1 V2 Vout V1 + V2
(V) (V) (V)
(V)
1
..
5

3
 b. To study OPAMP as difference amplifier

Circuit Diagram:

Procedure:
1. Assemble the circuit as shown in circuit diagram choosing R 1, R2, R3, Rf = 10KΩ each.
Use 0- ±15V terminal output to provide supply to the IC.
2. Using 0 – 30V and 5V terminals of the power supply, apply two inputs, one at the
inverting and the other at the non-inverting terminal. Measure each input with
multimeter.
3. Measure output with multimeter for at least five input combinations.
4. Compare the output with the difference of the two inputs.

Observations:

Obs.No V1 V2 Vout V2 – V1
(V) (V) (V)
(V)
1
..
5

c. Inverting amplifier configuration of OPAMP is nothing but multiplication or

division of input voltage with a number equal to Rf/R1. With the knowledge of
division and addition design an averaging amplifier of inputs V1 and V2 and
tabulate.

Conclusions:

________________________________________________________________________

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Lab#2a: Differentiation and Integration using OPAMP

Objectives:

(I) To study OPAMP as a differentiator

(II) To study OPAMP as an integrator

Apparatus:

1. OPAMP IC 741
2. D.C. power supply
3. Resistors
4. Digital multimeter
5. Connecting wires
6. Breadboard
7. Function generator
8. Digital storage oscilloscope

Theory:

Please refer to the supplementary note.

(I) To study OPAMP as a differentiator

Circuit Diagram of practical differentiator:

Differentiator action can be performed by the circuit given in supplementary material, which
consists of only Rf in the feedback and input capacitor Cin with a gain equal to Rf/Cin. With
increase in frequency gain, Rf/Cin increases which makes differentiator unstable. Further input
impedance decreases at high frequency, which makes noise to amplify and override the signal.
For the practical differentiator, Cf is added in parallel to Rf to control the gain and a small
resistance R1 at the input in series with Cin drops the noise at the input. R2 is known as offset
minimizing resistor (ROM) which reduces output offset voltage due to input bias current.

1
Procedure:
1. Assemble the circuit as shown in circuit diagram choosing R1, R2 = 1KΩ each, Rf =
10KΩ, Cin= 0.1 µF and Cf = 0.01µF. Use 0- ±15V terminal output to provide supply to
the IC.
2. Feed a triangular input signal of required amplitude from the function generator, which is
set at 1K frequency.
3. Feed both the input and output signals to an oscilloscope and save. The output should be
approximately a square wave.
4. Check the output waveform with sine and square waves as inputs and save.

Observations: (Paste the various input and corresponding output waveforms here)

Observation Waveform
Input triangular sine square
Output

Discussions

(VII) To study OPAMP as an integrator

Circuit Diagram of practical integrator

In this practical integrator circuit Rf is connected parallel with Cf which is absent in the
integrator circuit given in supplementary material. Rf discharges left over charges present in the
capacitor before next pulse being applied and limits the gain of the circuit at low frequencies,
which is infinite at D.C. R2 is known as offset minimizing resistor (ROM) which reduces output
offset voltage due to input bias current.

Procedure:

2. Assemble the circuit as shown in circuit diagram choosing R1, R2 = 10KΩ each, Rf =
100KΩ, and Cf = 0.1µF. Use 0- ±15V terminal output to provide supply to the IC. Feed a
2
 square wave input of required amplitude from the function generator, which is set at 1KΩ
frequency.
3. Feed both the input and output signals to an oscilloscope. The output should be a
triangular wave.

Observations: (Paste the various input and corresponding output waveforms here)

Observation Waveform
Input
Output

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Lab#1(B): Applications of OPAMP as Comparator and Schmitt Trigger
Objectives:

(i) Study of OPAMP as comparator

(ii) Study of OPAMP as Schmitt trigger

(i) Comparator

Theory

When the feedback signal (voltage) is applied to the inverting (-) input of the op-
amp then the feedback is negative. Negative feedback tends to reduce the difference
between the voltages at the inverting and non-inverting terminals and make linear
circuits. Without negative feedback the op-amp output is highly sensitive to the input,
which can be used to design switching or nonlinear circuits. The voltage comparator is a
device which uses no feedback; then saturation is the desired result. In this circuit we
want a simple yes-no answer to be signified by either positive saturation or negative
saturation of the output.
In the circuit diagrams shown below, for Fig.(i), if Vin > 0, Vo ≈ V++ and if Vin <
0, Vo ≈ V--.The output is no longer linearly related to the input– it’s more like a digital
signal, high or low depending on how Vin compares to ground (0 V). Needless to mention
that, if Vin is applied at the inverting terminal with respect to a grounded non-inverting
terminal, the output will switch to low when Vin >0. Figure (ii) shows a small
modification, allowing the circuit to switch its output when Vin crosses a certain preset
voltage level, often called the threshold voltage, Vth.
Typical applications of this circuit are crossover detectors, analog to digital
converters or counting applications where one wants to count pulses that exceed a certain
voltage level.

Components/Equipments:

(i) OPAMP (IC-741) chip, (ii) A D.C. power supply, (iii) A digital multimeter (DMM),
(iv) A digital storage oscilloscope (DSO), (v) Connecting wires, (vi) Breadboard

Circuit Diagram:

(i)

1
 (ii)

Procedure:
1. Construct the comparator circuit on the breadboard as shown in the circuit
diagram. Take care to give proper connections at the desired pins of the IC.
2. Use terminal C of the d.c. power supply (denoted by V+ and V- knobs) to provide
power supply to IC. Connect the 0Vterminal to ground.
3. Connect terminal A of the d.c. power supply (0-30V) at the input. Use terminal B
(5V) to provide threshold voltage Vth for circuit shown in Fig. (ii).
4. Vary the input from a negative value to a positive value through 0.
5. Using the DMM, measure and tabulate Vin and Vout. You can also look at the
output using a DSO by coupling the output to it in DC mode.
6. Make a plot of Vout vs Vin for each circuit. Estimate Vth from graph for Fig. (ii)
and compare with the Vth value actually applied. You can repeat the same
procedure for different values of threshold.
7. Repeat the entire procedure described above with input at the inverting terminal
and the non-inverting terminal being grounded w/o and with the threshold voltage
connected to it.

Observations:

For Fig. (i)

Obs.No Vi Vo
(V) (V)
1
..
..
For Fig. (ii)
Vth = ----- V
Obs.No Vi Vo
(V) (V)
1
..
..

2
Disscusions:

Discuss the graphs you obtained.

Precautions:

(ii) Schmitt trigger

The Schmitt trigger is a variation of the simple comparator which has hysteresis,
that is, it has a toggle action. It uses a positive feedback. When the output is high,
positive feedback makes the switching level higher than it is when the output is low. A
little positive feedback makes a comparator with better noise immunity.
Now, to understand what causes the hysteresis let’s analyze the circuit diagram
given below, using the same rules as in the previous section for the comparator. The key
in understanding this circuit will again be in calculating the voltages that cause its output
to switch. If V+ and V- are the actual voltages at the non-inverting and inverting terminals
of the OPAMP, then the output will be the following, considering that V-=0:

if V+ > 0, Vout ≈ V++

& if V+ < 0, Vout ≈ V--.

Since Vout changes its state whenever V+ crosses 0V, we need to find what value of Vin
results in V+ = 0. The two values of Vin for which the output switches are called the trip
points. V+ acts as a voltage divider formed by R1 and R2 between Vin and Vout. Thus the
trip points of a noninverting Schmitt trigger are:

Vin = -Vout (R1/R2) (Lower trip point, LTP)

= + Vout (R1/R2) (Upper trip point, UTP)

Choosing suitable ratios of R1 to R2, enough hysteresis can be created in order to prevent
unwanted noise triggers.

Components/Equipments:

(i) OPAMP (IC-741) chip

(ii) A D.C. power supply
(iii) A digital multimeter
(iv) Connecting wires
(v) Breadboard
(vi) Digital storage oscilloscope (DSO)

3
Circuit Diagram:

Procedure:
1. Construct the schmitt trigger circuit on the breadboard as shown in the circuit
diagram.
2. Connect the d.c. power supply at the input. Vary the input from a negative value
to a positive value through 0.
3. Using the DMM, measure and tabulate Vin and Vout.
4. Make a plot of Vout vs Vin. Estimate the trip points from the graph and compare
with the computed value, i.e. Vin = ±Vout R1/R2
5. You can also look at the output using a DSO by coupling the output to it in DC
mode.

Observations:

Obs.No Vi Vo
(V) (V)
1
..
..

Disscusions:

Analyze the graph you obtained. Discuss the switching action.

Precautions:
________________________________________________________________________

4
 Lab#3: Phase Shift Oscillator using Opamps

Objectives:

To construct and determine the resonant frequency of

(i) A phase shift oscillator

Overview:

The main principle of oscillator is positive feedback. Block diagram of oscillator

is shown in Figure 1.

Σ Amplifier
Av
Vin=0 Vd Vo output

Feedback
Circuit β
Vf

Figure.1

In the block diagram (Fig.1), Vd = Vf + Vin

Vo=AvVd and Vf = βVo

Using these relationships, following equation can be obtained:

.
When AVβ = 1, =∞= , This will happen only when Vi n= 0. That is we get a
signal at output without any input. The condition AVβ = 1 is known as Barkhausen
condition. This condition expressed in polar form as follows. AVβ = 1 ∠0° 360°

Barkhausen condition gives two requirements for oscillation.

1) The magnitude of the loop gain must be equal to 1.
2) The total phase shift of the loop gain must be equal to 0° 360°.

1
 Lab#9: Design and study of IC 555 multivibrator circuits (2 turns)

Objectives:

To design and study the following circuits using IC 555:

I. An astable multivibrator
II. A monostable multivibrator
III. A bistable multivibrator

Overview:

Multivibrators

Individual Sequential Logic circuits can be used to build more complex circuits such as
Counters, Shift Registers, Latches or Memories etc, but for these types of circuits to
operate in a "Sequential" way, they require the addition of a clock pulse or timing signal
to cause them to change their state. Clock pulses are generally square shaped waves that
are produced by a single pulse generator circuit such as a Multivibrator which oscillates
between a "HIGH" and a "LOW" state and generally has an even 50% duty cycle, that is
it has a 50% "ON" time and a 50% "OFF" time. Sequential logic circuits that use the
clock signal for synchronization may also change their state on either the rising or falling
edge, or both of the actual clock signal. There are basically three types of pulse
generation circuits depending on the number of stable states,

 Astable - has NO stable states but switches continuously between two states this
action produces a train of square wave pulses at a fixed frequency.
 Monostable - has only ONE stable state and if triggered externally, it returns back
to its first stable state.
 Bistable - has TWO stable states that produces a single pulse either positive or
negative in value.

IC 555 TIMER

The 555 timer IC was first introduced around 1971 by the Signetics Corporation as the
SE555/NE555 and was called "The IC Time Machine" and was also the very first and
only commercial timer IC available. It provided circuit designers with a relatively cheap,
stable, and user-friendly integrated circuit for timer and multivibrator applications. These
ICs come in two packages, either the round metal-can called the 'T' package or the more
familiar 8-pin DIP 'V' package as shown in figure below. The IC comprises of 23
transistors, 2 diodes and 16 resistors with built-in compensation for component tolerance
and temperature drift.

1
IC 555 in 8-pin DIP package
Functional block diagram of IC 555

The pin connections are as follows:

1. Ground.
2. Trigger input.
3. Output.
4. Reset input.
5. Control voltage.
6. Threshold input.
7. Discharge.
8. +VCC. +5 to +15 volts in normal use.

Pin1: Ground. All voltages are measured with respect to this terminal.

Pin2: Trigger. The output of the timer depends on the amplitude of the external trigger
pulse applied to this pin. When a negative going pulse of amplitude greater than 1/3 VCC
is applied to this pin, the output of the timer high. The output remains high as long as the
trigger terminal is held at a low voltage.

Pin3: Output. The output of the timer is measured here with respect to ground. There are
two ways by which a load can be connected to the output terminal: either between pin 3
and ground or between pin3 and supply voltage +VCC. When the output is low the load
current flows through the load connected between pin3 and +VCC into the output terminal
and is called sink current. The current through the grounded load is zero when the output
is low. For this reason the load connected between pin 3 and +VCC is called the normally
on load (we will use this for our circuit) and that connected between pin 3 and ground is
called normally off-load. On the other hand, when the output is high the current through
the load connected between pin 3 and +VCC is zero. The output terminal supplies current

2
to the normally off load. This current is called source current. The maximum value of
sink or source current is 200mA.

Pin4: Reset. The 555 timer can be reset (disabled) by applying a negative pulse to this
pin. When the reset function is not in use, the reset terminal should be connected to +VCC
to avoid any possibility of false triggering.

Pin5: Control Voltage. An external voltage applied to this terminal changes the threshold
as well as trigger voltage. Thus by imposing a voltage on this pin or by connecting a pot
between this pin and ground, the pulse width of the output waveform can be varied.
When not used, the control pin should be bypassed to ground with a 0.01µF Capacitor to
prevent any noise problems.

Pin6: Threshold. When the voltage at this pin is greater than or equal to the threshold
voltage 2/3 VCC, the output of the timer low.

Pin7: Discharge. This pin is connected internally to the collector of transistor Q. When
the output is high Q is OFF and acts as an open circuit to external capacitor C connected
across it. On the other hand, when the output is low, Q is saturated and acts as a short
circuit, shorting out the external capacitor C to ground.

Pin8: +VCC. The supply voltage of +5V to + 18V is applied to this pin with respect to
ground.

OPERATION:

The functional block diagram shows that the device consists of two comparators, three
resistors and a flip-flop. A comparator is an OPAMP that compares an input voltage and
indicates whether an input is higher or lower than a reference voltage by swinging into
saturation in both the direction. The operation of the 555 timer revolves around the three
resistors that form a voltage divider across the power supply to develop the reference
voltage, and the two comparators connected to this voltage divider. The IC is quiescent so
long as the trigger input (pin 2) remains at +VCC and the threshold input (pin 6) is at
ground. Assume the reset input (pin 4) is also at +VCC and therefore inactive, and that the
control voltage input (pin 5) is unconnected.

The three resistors in the voltage divider all have the same value (5K in the bipolar
version of this IC and hence the name 555), so the trigger and threshold comparator
reference voltages are 1/3 and 2/3 of the supply voltage, respectively. The control voltage
input at pin 5 can directly affect this relationship, although most of the time this pin is
unused. The internal flip-flop changes state when the trigger input at pin 2 is pulled down
below +VCC/3. When this occurs, the output (pin 3) changes state to +V CC and the
discharge transistor (pin 7) is turned off. The trigger input can now return to +V CC; it will
not affect the state of the IC.

3
However, if the threshold input (pin 6) is now raised above +(2/3)V CC, the output will
return to ground and the discharge transistor will be turned on again. When the threshold
input returns to ground, the IC will remain in this state, which was the original state when
we started this analysis. The easiest way to allow the threshold voltage (pin 6) to
gradually rise to +(2/3)VCC is to connect it externally to a capacitor being allowed to
charge through a resistor. In this way we can adjust the R and C values for almost any
time interval we might want.

IC 555 Timer as Multivibrator

The 555 can operate in either mono/bi-stable or astable mode, depending on the
connections to and the arrangement of the external components. Thus, it can either
produce a single pulse when triggered, or it can produce a continuous pulse train as long
as it remains powered.

Astable multivibrator

These circuits are not stable in any state and switch outputs after predetermined time
periods. The result of this is that the output is a continuous square/rectangular wave with
the properties depending on values of external resistors and capacitors. Thus, while
designing these circuits following parameters need to be determined:
1. Frequency (or the time period) of the wave.
2. The duty cycle of the wave.

Figure 1: A rectangular waveform

Referring to the above figure of a rectangular waveform, the time period of the pulse is
defined as T and duration of the pulse (ON time) is τ. Duty cycle can be defined as the
On time/Period that is, τ/T in the above figure. Obviously, a duty cycle of 50% will yield
a square wave.
The key external component of the astable timer is the capacitor. An astable
multivibrator can be designed as shown in the circuit diagram (with typical component
values) using IC 555, for a duty cycle of more than 50%. The corresponding voltage
across the capacitor and voltage at output is also shown. The astable function is achieved
by charging/discharging a capacitor through resistors connected, respectively, either to
VCC or GND. Switching between the charging and discharging modes is handled by

4
resistor divider R1-R3, two Comparators, and an RS Flip-Flop in IC 555. The upper or
lower comparator simply generates a positive pulse if VC goes above 2/3 VCC or below
1/3 VCC. And these positive pulses either SET or RESET the Q output.

The time for charging C from 1/3 to 2/3 Vcc, i.e, ON Time = 0.693 (RA + RB). C
The time for discharging C from 2/3 to 1/3 Vcc, i.e. OFF Time = 0.693 RB. C
To get the total oscillation period, just add the two:

Tosc = 0.693∙(RA+RB)∙C + 0.693∙(RB)∙C = 0.693 ∙ (RA + 2∙RB) ∙ C

Thus,
fosc = 1/ Tosc = 1.44/( RA + 2∙RB).C
Duty cycle = RA+RB/ RA + 2∙RB

Circuit Diagram:

Astable multivibrator with duty cycle less than 50%:

Generally astable mode of IC 555 is used to obtain the duty cycle between 50 to 100%.
But for a duty cycle less than 50%, the circuit can be modified as per the circuit diagram.
Here a diode D1 is connected between the discharge and threshold terminals (as also
across RB). Thus the capacitor now charges only through R A (since RB is shorted by diode
conduction during charging) and discharges through R B. Another optional diode D2 is
also connected in series with RB in reverse direction for better shorting of RB. Therefore,
the frequency of oscillation and duty cycle are

fosc = 1/ Tosc = 1.44/(RA + RB).C

Duty Cycle = RA/ (RA + RB)

5
Circuit Diagram:

Astable multivibrator with duty cycle variable from 0 to 100%:

In some applications, it is needed to vary the duty cycle from about 0 to 100%. In that
case the circuit is designed as shown in the circuit diagram. Here a potentiometer, R X, is
used so that RA = R1+R2, RB = RX-R2+R3. A diode is now connected across a variable R B.
Thus a variable duty cycle is achieved. Therefore, the frequency of oscillation and duty
cycle can be derived as follows.

fosc = 1/ Tosc = 1.44/(RA + RB).C = 1.44/(R1 + RX + R3).C

Min. Duty Cycle = R1/(R1 + RX + R3)

Max. Duty Cycle = (R1 + RX)/(R1 + RX + R3)

Circuit Diagram:

6
Monostable multivibrator

Monostable multivibrator often called a one shot multivibrator is a pulse generating

circuit in which the duration of this pulse is determined by the RC network connected
externally to the 555 timer. In a stable or standby state, the output of the circuit is
approximately zero or a logic-low level. When external trigger is applied (See circuit
diagram) output is forced to go high ( VCC). The time for which output remains high is
determined by the external RC network connected to the timer. At the end of the timing
interval, the output automatically reverts back to its logic-low stable state. The output
stays low until trigger pulse is again applied. Then the cycle repeats. The monostable
circuit has only one stable state (output low) hence the name monostable.

Initially when the circuit is in the stable state i.e, when the output is low, transistor Q in
IC 555 is ON and the capacitor C is shorted out to ground. Upon the application of a
negative trigger pulse to pin 2, transistor Q is turned OFF, which releases the short circuit
across the external capacitor C and drives the output high. The capacitor C now starts
charging up towards VCC through R. When the voltage across the capacitor equals 2/3
VCC, the upper comparator’s (see schematics of IC 555) output switches from low to high,
which in turn drives the output to its low state via the output of the flip-flop. At the same
time the output of the flip-flop turns transistor Q ON and hence the capacitor C rapidly
discharges through the transistor. The output of the monostable remains low until a
trigger pulse is again applied. Then the cycle repeats. The pulse width of the trigger input
must be smaller than the expected pulse width of the output waveform. Also the trigger
pulse must be a negative going input signal with amplitude larger than 1/3 V CC (Why?).
The pulse width can be calculated as (How?): T= 1.1 R.C.

Once triggered, the circuit’s output will remain in the high state until the set time, T,
elapses. The output will not change its state even if an input trigger is applied again
during this time interval. The circuit can be reset during the timing cycle by applying
negative pulse to the reset terminal. The output will remain in the low state until a trigger
is again applied. The circuit is designed as shown in the circuit diagram, the left part of
which shows how to generate negative a trigger pulse from a square wave signal.

Circuit Diagram:

7
Bistable Multivibrator

In these circuits, the output is stable in both the states. The states are switched using an
external trigger but unlike the monostable multivibrator, it does not return back to its
original state. Another trigger is needed for this to happen. This operation is similar to a
flip-flop. There are no RC timing network and hence no design parameters. The
following circuit can be used to design a bistable multivibrator. The trigger and reset
inputs (pins 2 and 4 respectively on a 555) are held high via pull-up resistors while the
threshold input (pin 6) is simply grounded. Thus configured, pulling the trigger
momentarily to ground acts as a 'set' and transitions the output pin (pin 3) to Vcc (high
state). Pulling the threshold input to supply acts as a 'reset' and transitions the output pin
to ground (low state). No capacitors are required in a bistable configuration.

Circuit Diagram:

8
Circuit components/Equipments:

1. IC 555 (1 No.)
2. Resistors (1KΩ, 2 Nos; 10KΩ, 2 Nos; 2.7KΩ, 1 No)
3. Potentiometer (10 KΩ, 1 No)
4. Capacitors (0.01 μF, 0.047 μF, 0.1 μF, 1 μF; 1 No. each)
5. Diodes 1N 4148 (2 Nos.)
6. D.C. Power supply (10V)
7. Function Generators
8. Oscilloscope
9. Connecting wires
10. Breadboard

Circuit Diagrams: Already provided with text.

Procedure:
I. Astable Multivibrator:

(a) For duty cycle more than 50%:

1. Configure the circuit as per the circuit diagram.
2. Use RA = RB = 10 kΩ, RL = 1 kΩ and CT = 0.1 μF, C = 0.01 μF. Using the
power supply set VCC = 10 V.
3. Compute the expected values of fosc and duty cycle (%).
4. Connect the output terminal (pin 3) to channel 1 of the oscilloscope. Also feed the
voltage across capacitor to channel 2.
5. Power on your circuit and observe and save the output. Determine the values of
fosc and duty cycle (%) from your observations and compare with the theoretical
values.
6. When you are done, turn off the power to your experimental circuit.

(b) For duty cycle less than 50%:

1. Configure the circuit as per the circuit diagram.
2. Use RA = 2.7 kΩ, RB = 10 kΩ, RL = 1 kΩ and CT = 0.1 μF, C = 0.01 μF. Using
the power supply set VCC = 10 V.
3. Repeat steps 3 to 6 of procedure (a).

(c) For duty cycle variable from 0 to 100%:

1. Configure the circuit as per the circuit diagram.
2. Use R1 = 1 kΩ, R2 = 2.7 kΩ, RX = 10 kΩ, RL = 1 kΩ and CT = 0.047 μF, C =
0.01 μF. Using the power supply set VCC = 10 V.
3. Calculate RA and RB for different settings of the potentiometer using R A = R1+R2,
RB = RX-R2+R3 and repeat steps 3 to 6 of procedure (a) for each setting.

II. Monostable Multivibrator

1. Configure the circuit as per the circuit diagram. set VCC = 10 V
2. Connect the output terminal (pin 3) to the oscilloscope.

9
 3. Power on your circuit and trigger the circuit using momentarily connecting
jumper wire from 2 to ground and observe the output.
4. Observe time for which output is high, compare with RC value. While output is
high, try triggering repeatedly and observe the output.

III. Bistable Multivibrator

1. Configure the circuit as per the circuit diagram.
2. Use RA = RB = 10 kΩ, RL = 1 kΩ and C1 = 1 μF, C2 = 0.01 μF. Using the power
supply set VCC = 10 V.
3. Connect the output terminal (pin 3) to the oscilloscope in DC COUPLING mode.
4. Power on your circuit.
5. Connect the point F to ground momentarily. This will set the output Q in the
oscilloscope to 1 or HIGH level. This state will be permanently stable state and
the operation is called “SET”.
6. Now connect the point G to VCC momentarily. This will set the output Q in the
oscilloscope to 0 or LOW level. This is called “RESET” operation.
7. When you are done, turn off the power to your experimental circuit

Observations:

I. Astable Multivibrator:
(a) For duty cycle more than 50%:
RA = RB = _________ kΩ, CT = ________ μF

Output waveform and capacitor voltage as observed in oscilloscope: (paste data here)

Parameters Calculated value Observed value Error

fosc
Duty cycle (%)

(b) For duty cycle more than 50%:

RA = _________ kΩ, RB = _________ kΩ, CT = ________ μF

Output waveform and capacitor voltage as observed in oscilloscope: (paste data here)

Parameters Calculated value Observed value Error

fosc
Duty cycle (%)

(c) For duty cycle variable from 0 to 100%:

R1 = ______ kΩ, R2 = ______ kΩ, RX = ______ kΩ, CT = ________ μF

Output waveform and capacitor voltage as observed in oscilloscope: (paste data here
for each setting of the pot.)

10
Calculated fosc = _______

Sl. No. RA(kΩ) RB(kΩ) Observed Duty cycle (%) Error

fosc (kHz) Observed Calculated
1 R1=.. Minimum =..
..
..
5 R1 + R X Maximum =..

II. Monostable Multivibrator:

RA = ________ kΩ, CT = ________ μF

Parameter Calculated value Observed value Error

(ms) (ms)
Output high
duration

III. Bistable Multivibrator:

Point Connected to Output

F Ground

G VCC

Discussions:

Precautions:

________________________________________________________________________

11
 EXPERIMENT NO: 4
ASTABLE MULTIVIBRTATOR USING IC555 TIMER

4.1 AIM:
To design a Astable Multivibrator using IC555 and compare it is theoretical and practical
pulse width and Duty Cycle

4.2 COMPONENTS & EQUIPMENT REQUIRED: -

S.No Device Range / Quantity

Rating (in No’s)
1 Bread Board - 1
2 IC555 - 1
3 Capacitors µF 1
4 Function Generator 0-1MHz 1
5 Resistors 1-100kΩ 1
6 CRO 0-20MHz 1
7 Probes, Connecting Wires - 1

4.3 THEORY:

4.3.1 ASTABLE MULTIVIBRATOR:

The 555 Oscillator is another type of relaxation oscillator for generating stabilized square
wave output waveforms of either a fixed frequency of up to 500kHz or of varying duty
cycles from 50 to 100%.

In order to get the 555 Oscillator to operate as an astable multivibrator it is necessary to

continuously re-trigger the 555 IC after each and every timing cycle.

This re-triggering is basically achieved by connecting the trigger input (pin 2) and
the threshold input (pin 6) together, thereby allowing the device to act as an astable
oscillator. Then the 555 Oscillator has no stable states as it continuously switches from one
state to the other. Also the single timing resistor of the previous monostable multivibrator
circuit has been split into two separate resistors, R1 and R2 with their junction connected to
the discharge input (pin 7) .

30
4.4 PROCEDURE:
ASTABLE:

1. Connect the components/equipment as shown in the circuit diagram.

2. Observe the square wave output at pin 3 on CRO.
3. Calculate Duty cycle from the output waveform & compare with theoretical value.
4. Plot the output waveforms.

4.5 CIRCUIT DIAGRAM

ASTABLE MULTIVIBRATOR:

31
4.6 EXPECTED WAVEFORMS:

4.7

CALCULATIONS

4.8 RESULT:

32
4.9 PRE LAB QUESTIONS:
1. What are the applications of IC555?
2. Why feedback is not used in Schmitt trigerr?
3. What is the output of Schmitt trigger for different inputs?
4. How output of Schmitt trigger varies to +Vsat and – Vsat?
5. Why positive feedback is used in Schmitt trigger?

4.10 POST LAB QUESTIONS:

1. What is the other name for Astable multivibrator (MSMV)?

2. When MSMV is in stable state, what is the output level?
3. Why trigger is required in the case of MSMV?
4. Which type of trigger pulse is required for MSMV?
5. What is the formula for the output pulse width of MSMV?
6. How long MSMV stays in unstable state?

33
 EXPERIMENT NO: 5
MONOSTABLE MULTIVIBRATOR USING IC555 TIMER

5.1 AIM:
To design a Monostable Multivibrator using IC555 and compare it is theoretical and
practical pulse width.

5.2 COMPONENTS & EQUIPMENT REQUIRED: -

S.No Device Range / Quantity

Rating (in No’s)
1 Bread Board 1
2 IC555 1
3 Capacitors 1
4 Function Generator 1
5 Resistors 1
6 CRO 1
7 Probes, Connecting Wires 1

5.3 THEORY:

5.3.1 MONOSTABLE MULTIVIBRATOR:

Monostable multivibrator is also called as one–shot Multivibrator. When the output is
low, the circuit is in stable state, transistor T1 is ON and Capacitor C is shorted to the
ground. However, upon application of a negative trigger pulse to Pin–2, transistor T1
is turned OFF, which releases short circuit across the external capacitor and drives the
output High. The capacitor C now starts charging up toward VCC through R.
However when the voltage across the external capacitor equals 2/3 VCC, upper
comparator‟s output switches from low to high which in turn derives the output to its
low state. And the output of the flip flop turns transistor T1 ON, and hence the
capacitor C rapidly discharges through the transistor. The output of the Monostable
remains low until a trigger pulse is again applied.
Then the cycle repeats. The time during which the output remains high is given by

tp = 1.1 RC

34
5.4 PROCEDURE:
MONOSTABLE:
1. Connect the components/equipment as shown in the circuit diagram.
2. Switch ON the power supply.
3. Connect function generator at the trigger input.
4. Connect channel-1 of CRO to the trigger input and channel-2 of CRO to the
output (Pin 3).
5. Using Function Generator, apply 1 KHz square wave with amplitude of approx.
equal to 9 Vpp at the trigger input.
6. Observe the output voltage with respect to input and note down the pulse width
and amplitude.
7. Now connect channel-2 of CRO across capacitor and observe the voltage across
the capacitor and note it down.
8. Compare the practical pulse width noted in the step above with its theoretical
value (tp=1.1 RC)

5.5 CIRCUIT DIAGRAM

MONOSTABLE MULTIVIBRATOR:

35
 R C Theoretical Time period TON=1.1 RC Practical Time period Vo(p-p)

47kΩ 0.1 µF

22KΩ 0.1 µF

10KΩ 0.1µF

5.6 EXPECTED WAVEFORMS:

MONOSTABLE:

36
5.7 CALCULATIONS:

MONOSTABLE:

Theoretical Pulse width

tp = 1.1 RC

Practical Pulse width

tp = 1.1 RC

5.8 RESULT:

5.9 PRE LAB QUESTIONS:

1. What are the applications of IC741?
2. Why feedback is not used in Schmitt trigerr?
3. What is the output of Schmitt trigger for different inputs?
4. How output of Schmitt trigger varies to +Vsat and – Vsat?
5. Why positive feedback is used in Schmitt trigger?

5.10 POST LAB QUESTIONS:

1. What is the other name for monostable multivibrator (MSMV)?

2. When MSMV is in stable state, what is the output level?
3. Why trigger is required in the case of MSMV?
4. Which type of trigger pulse is required for MSMV?
5. What is the formula for the output pulse width of MSMV?
6. How long MSMV stays in unstable state?

37
 EXPERIMENT NO: 6
SCHMITT TRIGGER CIRCUITS USING IC555 & IC 741

6.1 AIM:
To study the Schmitt trigger characteristics by using IC741& IC 555 and compare
theoretical and practical values of the Upper Threshold voltage, VUT and the Lower
Threshold voltage, VLT.

6.2 COMPONENTS & EQUIPMENT REQUIRED: -

Range / Quantity (in

S.No Device
Rating No’s)
1 Bread Board - 1

2 IC741 & IC 555 - 1

3 Capacitors µF 1
4 Function Generator 0-1MHz 1
5 Resistors 1-100kΩ 1
6 CRO 0-20MHz 1
7 Probes, Connecting Wires - 1

6.3 THEORY:

Circuit shows an inverting comparator with positive feedback. This circuit converts an
irregular shaped waveform to square wave or pulse. This circuit is known as Schmitt
trigger or Regenerative comparator or Squaring circuit. The input voltage Vin triggers
(changes the state of ) the output Vo every time it exceeds certain voltage levels called
Upper threshold voltage, VUT and Lower threshold voltage, VLT. The hysteresis width
is the difference between these two threshold voltages i.e. VUT – VLT. These threshold
voltages are calculated as follows.

VUT = (R1/R1+R2) Vsatwhen Vo= Vsat

VLT = (R1/R1+R2) (-Vsat)when Vo= -Vsat

The output of Schmitt trigger is a square wave when the input is sine wave or
triangular wave, where as if the input is a saw tooth wave then the output is a pulse
wave.

38
6.4 CIRCUIT DIAGRAM:

Fig: Schmitt Trigger using IC555

39
6.5 PROCEDURE:

1. Connect the components/equipment as shown in the circuit diagram.

2. Switch ON the power supply.
3. Apply the input sine wave using function generator.
4. Connect the channel–1 of CRO at the input terminals and Channel-2 at the output
terminals.
5. Observe the output square waveform corresponding to input sinusoidal signal.
6. Overlap both the input and output waves and note down voltages at positions on sine
wave where output changes its state. These voltages denote the Upper threshold
voltage and the Lower threshold voltage (see expected waveforms below).
7. Verify that these practical threshold voltages are almost same as the theoretical
threshold voltages calculated using formulas given in the theory section above.
8. Sketch the waveforms by noting down the amplitude and the time period of the input
Vin and the output Vo.

6.6 EXPECTED WAVEFORMS:

6.7 TABLE:

VUTP VLTP VH Ton Toff Vo(p-p)

IC741

IC 555

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6.8 RESULT:

6.9 PRE LAB QUESTIONS:

1. what is a output of Schmitt trigger if input varies?

2. Give the formulae for hysteresis voltage?
3. What is the other name for Schmitt trigger?
4. Give the formulae for Upper Threshold Point?
5. Give the formulae for Lower Threshold Point?
6. What are the application of emitter coupled Bistable MV?

6.10 POST LAB QUESTIONS:

1. what is a output of Schmitt trigger if input varies?

2. Define hysteresis voltage?
3. What is the other name for Schmitt trigger?
4. What is UTP?
5. What is LTP?
6. What are the application of emitter coupled Bistable MV?

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