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Lecture 2

Basic principles of switch-mode power conversion (DC-DC)

• Bi-positional switch
• PWM and duty ratio
• Cycle-by-cycle averaging
• Concept of DC steady-state
• Volt-sec balance
• Current-sec balance
• Power balance

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Bi-positional switch as a building-block
Buck converter

Boost dc-dc converter Buck-boost dc-dc converter

DC motor drive DC-AC and AC-DC applications


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Bi-positional switch implementation

+ +
1 iA ( t )
iA Vd
A
Vd A +
v AN ( t )
2 −

- N
Pulse Width
Modulator SPST
SPDT vc A ( t ) q A ( t ) implementation
(single pole double throw)

qA = 1 Top switch S1 ON, bottom switch S2 OFF vA = Vd

qA = 0 Top switch S1 OFF, bottom switch S2 ON vA = 0

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Electronic implementation

+ 1
D1
S1 Which devices conduct?
iA (t)
A
qA= 1 qA= 0
D2 + iA > 0 S1 D2
S2 vA (t) iA < 0 D1 S2
_ 2 _

• Combination of a controllable switch (MOSFET or IGBT) and diode


for each SPST can support current in both directions
• iA (t) can be bi-directional
• vA (t) is unipolar (positive or zero only)
• Power flow is bi-directional

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Bi-directional and uni-directional power flow
+ 1 + 1
iA (t) > 0
iA (t) iA (t)
Vd A Vd A
+ +
vAN (t) vAN (t)
_ 2 _ _ 2 _

For bi-directional iA For uni-directional iA


uni-directional power flow

• Numerous applications of dc-dc converters require only


uni-directional power flow; e.g., power supplies for electronics
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Electronic implementation

For bi-directional iA For uni-directional iA

• Controllable switch - Power MOSFETs or IGBTs


• turn-on and turn-off by controlling the gate drive signal
• Power diode – ultrafast diodes
• turn-on (forward bias) and turn-off (reverse bias) by
circuit operating conditions
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Ideal vs. real switches
Commercially available switches have several non-idealities which
are neglected for the sake of simplicity in our initial analysis which
is based on ideal switch assumptions
• Switching losses: finite rise/fall times for switch voltage and current,
and overlap of high voltage and current during switching transitions
• Conduction losses: finite voltage drop across switch (or diode)
during conduction
• Gate drive losses: negligible at low switching frequencies, but can be
significant at high switching frequencies (~ MHz)
• Parasitic elements: junction capacitance, stray inductance; resulting
voltage and current spikes and energy loss
• Need to ensure operation within the permissible limits on
current/voltage/power/temperature ratings during steady-state and
transient conditions

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Basic principles of switch-mode power conversion (DC-DC):
PWM and duty ratio
• Bi-positional switch
• PWM and duty ratio
• Cycle-by-cycle averaging
• Concept of DC steady-state
• Volt-sec balance
• Current-sec balance
• Power balance
Constant switching frequency
1 qA(t)
+ q A (t )
1
iA (t)
A
Vdin
V 0
+ t
q A (t ) TS
vA (t) vA(t)
_ 2 _ Vd

q A (t ) 0 t
TS

Example:
Switching frequency, fS = 200 kHz

Period, TS = 1/ fS = 5 us

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Duty ratio
1 qA(t)
+ q A (t )
1
iA (t)
A
Vdin
V 0 T
+ ON t
q A (t ) TS
vA (t) vA(t)
_ 2 _ Vd

q A (t ) 0 t

• TON : duration for which qA = 1 in Ts

TON
duty ratio, d A =
TS
• Duty ratio is the main control variable

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Pulse width modulation
qA(t)
1

Vd 0 T
ON t
vA(t) TS
Vd
Avg(vA)
0

• PWM: Control of average (CCA) quantity by controlling


(modulating) the pulse width in a switching cycle
(duty ratio control)
• Normally constant switching frequency

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PWM example

Different output voltages with a fixed input


vA (t)
d = 0.5
12V v A  6V

0
vA (t)
d = 0.75
12V
v A  9V
0 t

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PWM example

Constant output voltage with varying input


vA (t)
d = 0.5
10V v A  5V

0
vA (t) d = 5/14
14V
v A  5V

0 t

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PWM implementation
vramp
1
+ vc A
Vd
+
0
vA
− qA t

1
vc A 0
qA t
vvAN
A
Vd

vcA > vramp ⇒ q A ( t ) =


1 ⇒ top switch ON avg (vvAN
A)

⇒ vA (t ) =
0
Vd TON t
vcA < vramp ⇒ q A ( t ) =
0 ⇒ bottom switch ON TS =1/fs

⇒ vA (t ) =
0

TON
Duty ratio, d A =
Ts
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Relationship between duty ratio and control voltage
vramp
V̂ramp
1
+ vc A
Vd
+
0
vA
− qA t1 t

1
vc A 0
qA t
vvAN
A
Vd
Vˆramp Vˆramp = 1
vramp ( t ) = t 0 ≤ t < Ts
Ts avg (vvAN
A)
0
Vˆramp Vˆramp t
vramp ( t1 ) =
TON
t1 = TON = vcA
Ts Ts TS =1/fs

TON
= dA
Ts For Vˆramp = 1, d A ( t ) = vc A ( t )
1 0 ≤ vc A ( t ) ≤ 1
d A (t ) = vc A ( t )
Vˆramp 0 ≤ vc A ( t ) ≤ Vˆramp For this course we will assume Vˆramp = 1

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PWM example: boost converter
• Vd is not always an energy source; in boost converter Vd is the
output (load) voltage
• Average of the pole output voltage, vA is not always the output
voltage of the converter; in boost converter, the average of vA is
controlled by PWM to apply the right voltage to control the
inductor current, and thereby the output voltage, Vo

iL +
Vd = Vo

+ Rload

Vin vA −

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Basic principles of switch-mode power conversion (DC-DC):
Cycle-by-cycle averaging

• Bi-positional switch
• PWM and duty ratio
• Cycle-by-cycle averaging
• Concept of DC steady-state
• Volt-sec balance
• Current-sec balance
• Power balance
Cycle-by-cycle averaging (CCA)

• Average over a switching period referred to as cycle-by-cycle


average (CCA) or as periodic average
• Control objectives are achieved essentially by controlling the
CCA value of different quantities
• Average models, steady-state analysis & controller design
use CCA quantities

Buck converter example

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Definition of cycle-by-cycle averaging
• Average over a switching period
• CCA values denoted by a bar ( - ) on top, like v AN , id

1 t
x t    x   d 
Ts t Ts

x (t )
x (t )

TS =1/fs t

• CCA quantities can be time varying

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CCA value of qA and vAN

qA(t) 1 qA  d
0T (t)
ON
TS t
vAN (t)
Vd v AN ( t ) = Vd q A ( t )
v A  d Vd

0 t

1 t TON t 
q A t   q A t  dt   d t 
TS t Ts TS

1 t 1 t
v AN   v AN  
t dt   Vd q A t  dt  Vd d t 
TS t Ts TS t Ts

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CCA examples: DC-DC converters

v A (t )
v A (t )

iL (t )
iL (t )

Steady state Transient

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CCA examples: sinusoidal PWM

f m : 50 Hz f s : 5 kHz

v AN ( t )
(V)

Ts

v AN ( t )
(V)

Time (s)

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Some properties of CCA
• Just like instantaneous quantities, KCL and KVL apply for
CCA quantities too
KCL KVL
 ik 0  vk 0
k k
At a node Around a loop

i1 ( t ) i3 ( t ) i1 t   i2 t   i3 t   0
Integrating both sides and dividing by TS

i2 ( t ) 1 t 1 t 1 t
 i1 t  dt   i2 t  dt   i3 t  dt  0
TS tTs TS tTs TS tTs

 i1  i2  i3  0

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CCA KCL and KVL example

io
x
+ vL − iC
y = vo

CCA KCL at node x ? CCA KVL around loop y ?

iL − iC − io =
0 −v A + vL + vo =
0

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Some properties of CCA
• V-I relationship in CCA for R, L and C similar to the
instantaneous relationships
Instantaneous CCA

v t   R i t  v t   R i t 
d d
vL t   L iL t  vL t   L iL t 
dt dt
d d
iC t   C vC t  iC t   C vC t 
dt dt

• The derivative is given by

d 1
()
x=
t  x ( t ) − x ( t − Ts ) 
dt Ts

Raja Ayyanar, ASU


Basic principles of switch-mode power conversion (DC-DC):
Concept of DC steady state

• Bi-positional switch
• PWM and duty ratio
• Cycle-by-cycle averaging
• Concept of DC steady-state
• Volt-sec balance
• Current-sec balance
• Power balance
DC steady state in power converters

• DC steady state analysis is useful for


• Thorough understanding of the operation, including
various sub-intervals and modes of operation
• Deriving input-output voltage and current relationships
of various converter topologies
• Design of various components such as inductors, capacitors,
transformers

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DC Steady state in non-switching circuits

In non-switching circuits,
Transient Steady state DC steady state can be defined
iL as a condition when all the
(A)
variables (voltages, currents)
are CONSTANT in time

vC
(V)

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DC steady state in switching converters
• In a switching converter, most of the voltages and
currents are always switching or time varying
• Need for a different definition of DC steady state

vA (t)
(V)

iL (t)
(A)

Time (s)

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Concept of DC steady state in switching converters
A switching converter is in DC steady state, if
• ALL waveforms repeat exactly every switching period
Example: iA(t) = iA(t-TS)

Steady state Transient

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Concept of DC steady state in switching converters
A switching converter is in DC steady state, if
• CCA values of ALL variables remain constant

v A (t )
v A (t )

iL (t )
iL (t )

Steady state Transient

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Basic principles of switch-mode power conversion (DC-DC)

• Bi-positional switch
• PWM and duty ratio
• Cycle-by-cycle averaging
• Concept of DC steady-state
• Volt-sec balance
• Current-sec balance
• Power balance

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Characteristics of inductors and capacitors
Inductor iL Capacitor
+
L vL C
-

diL t  dvC t 
vL t   L iC t   C
dt dt

X
X X
X
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Volt-sec balance in inductors

• The average (CCA)


voltage across an inductor
in DC steady-state
is zero

vL = 0

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Volt-sec balance in inductors

d iL
vL = L
dt iL
since, iL should beconstant +
d iL vL
in steadystate, =0 -
dt
d iL
∴ vL = L =
0
dt
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Volt-sec balance in inductors

vL = 0 does not imply that the inductor voltage is zero instantaneously,


only the average over a complete period is zero

vL (t)
V1 Area A = Area B

A
0
t
B V2

d Ts (1 − d )Ts
Ts

V1 d + V2 (1 − d ) =
0
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Volt-sec balance in inductors
vL = 0 iL ( t0 + Ts ) =
iL ( t0 )

vL
(V), (A)

iL

Time (s)

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If volt-sec balance is violated
vL < 0 ⇒ iL continuously decreases ⇒ non-steady-state

vL
(V), (A)

iL

Time (s)

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If volt-sec balance is violated
vL > 0 ⇒ iL continuously increases ⇒ non-steady-state

vL
(V), (A)

iL

Time (s)

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Violation of volt-sec balance: diode across inductor

Ideal diode

Invalid
(with ideal diode and
ideal inductor)

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Example
Calculate the input-output relationship for a
dc-dc converter, Vo / Vin in terms of the duty ratio, d
given the inductor voltage below
vL
+
V
100
in
Net vL V2  ?
work 0
- 
−V
V2o
4dTss (16−ds)Ts

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Basic principles of switch-mode power conversion (DC-DC):
Current-sec balance in capacitors

• Bi-positional switch iC (t) I1 Area A = Area B


• PWM and duty ratio
• Cycle-by-cycle averaging A
0
• Concept of DC steady-state t
• Volt-sec balance B I2

• Current-sec balance d Ts (1 − d )Ts


• Power balance
Current-sec balance in capacitors

• The average (CCA)


current through a capacitor
in steady-state
is zero

iC = 0

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Current-sec balance: derivation

d vC
iC = C =0
dt
(since, vC should beconstant
in steadystate)

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Current-sec balance in capacitors

iC = 0 does not imply that the capacitor current is zero instantaneously,


only the average over a complete period is zero

iC (t)
I1 Area A = Area B

A
0
t
B I2

d Ts (1 − d )Ts

I1 d + I 2 (1 − d ) =
0
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Current-sec balance in capacitors

iC = 0 ⇒ vC remains constant
vC

iC
(V), (A)

Time (s)

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If current-sec balance is violated
iC > 0 ⇒ vC continuously increases ⇒ non-steady-state

iC
(V), (A)

vC

Time (s)

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Violation of current-sec balance: series diode

Invalid
(with ideal diode and
ideal capacitor)

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Example
Given that the circuit is in DC steady state, calculate D
ic
ic
4
Net (A)
work
0
D?
-2 t

DTs 1 DTs

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Basic principles of switch-mode power conversion (DC-DC):
Power balance

• Bi-positional switch
• PWM and duty ratio
• Cycle-by-cycle averaging
• Concept of DC steady-state
• Volt-sec balance
• Current-sec balance
• Power balance
Power balance
• Neglecting all losses, and in an average (CCA) sense
and under steady state, input power equals output power

iin

pin = po
+ pin iint io
vin A
+
- +
vint p vo
int po
-
-
N

_______ _______
p=
in ( vin iin=) p=
o ( vo io )

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Input-output power balance
iin

_______ _______ + pin iint io


p=
in ( vin iin=) p=
o ( vo io ) vin
-
A
+
vint p
+
int po vo
-
-
N

px ≠ vx ix
• But, normally for dc-dc converters with dc input voltage source
and regulated dc output voltage and smooth dc output current,
=pin V=
in iin ; po Vo I o

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Power balance is valid at intermediate stages too

iin

=
pin p=
int po +
vin
pin
A
iint io
+
- +
in steady-state and with no losses vint p vo
int po
-
-
N

px ≠ vx ix
• Need to be careful in writing
_______
pint = ( vint iint )
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Power balance
• Power balance is NOT valid in an instantaneous sense
even in steady-state
• Power balance is NOT valid during transients
even in CCA sense
• Both the above because of storage elements – L and C
• In general,
dE ( t )
in ( t )
p= po ( t ) +
dt
E is the total stored energy (in all L and C)

• In steady-state and in CCA sense, stored energy remains


constant, and
dE / dt = 0
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Example
Given that the circuit is in DC steady state, and that the circuit inside the
block ‘Valid network’ has no sources, loads or loss, calculate Vo
iin
+
+

+
D = 0.4 Valid 5Ω
Vo
− 24V network

iin
6 A−
4 A−

0
4 10 14 t (µs)

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