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ICS925AG-31
MODEL NAME : 888M1 LA-1081 uBGA2/uPGA2 PAGE 11
CPU
REV:1.0 PAGE 2,3
CRT & TV-OUT
PAGE 13
PSB
GMCH2-M
KB/PS2 Interface
Host-HUB Bridge IDSEL: AD11 SODIMM X2
VGA Board Connector AGP BUS MEMORY BUS POWER
-BANK 2,3,4,5 INTERFACE
Internal GFX IDSEL: AD13
PAGE 29
PIRQA# PAGE 12 PAGE 7
PAGE 4,5,6
Direct CD HUB Link
Play
PAGE 19
PCI BUS
IDSEL: AD26 IDSEL: AD16 IDSEL: AD23 IDSEL: AD27
INTERNAL IDE MASTER 2 MASTER 3 MASTER 1 MASTER 0
IDE/CD PIRQC# PIRQA#, PIRQB# PIRQD# PIRQA#,
SIRQ PIRQD#
/FDD
PAGE 20
ICH2-M 1394 Controller CARDBUS LAN Controller Mini PCI
FUNC 0: LAN, HUB-TO-PCI , TAB43AB22 PCI1420 RTL8139C Connector
PCI-TO-LPC BRIDGE
FUNC 1: IDE Controller PAGE 17 PAGE 14 PAGE 16 PAGE 18
FUNC 2: USB Controller #1
FUNC 3: POWER MANAGEMENT
Smart FUNC 4: USB Controller #2 AC LINK
FUNC 5: AC97 Audio Controller
Media FUNC 5: AC97 Modem Controller
PAGE 8,9,10
PAGE 21
MDC PCMCIA
Connector SOCKET
LPC
LPC
PAGE 12 PAGE 15
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND 888M1 COVER SHEET
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THEETENT
COMP
DIVISION OF R&D Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE 888M1
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 1 of 38
A B C D E
+5VS
CPU_IO
1
1 2 CPURST# HA#[3..31] HD#[0..63]
4 HA#[3..31] U7A HD#[0..63] 4
R256 56.2_1%_0603 R11
1
1 2 FLUSH# HA#3 L3 D10 HD#0
R235 1.5K HA#4 A3# D0# HD#1 C14 200
1 2 FERR# HA#5
K3
J2 A4# COPPERMINE D1#
D11
C7 HD#2 .1UF
R229 1.5K HA#6 A5# D2# HD#3
2
L4 C8
CPUSLP# HA#7 A6# D3# HD#4 1617VCC
1 2 L1 B9
R233 1.5K HA#8 K5 A7# D4# A9 HD#5
ITP_PREQ# HA#9 A8# D5# HD#6 U3
1 2 K1 C10
1
R195 1.5K HA#10 J1 A9# D6# B11 HD#7 C15 1 16
GTL_PRDY# HA#11 A10# D7# HD#8 NC NC
4 2 1 J3 C12 2 15 4
R196 @56.2_1%_0603 HA#12 A11# D8# HD#9 2200PF THERMDA VCC STBY
K4 B13 3 14 EC_SMC2 19,27,34
A12# D9# DXP SMBCLK
2
2 1 SELPSB0 HA#13 G1 A14 HD#10 THERMDC 4 13
R227 10K HA#14 A13# D10# HD#11 DXN NC
H1 B12 5 12 EC_SMD2 19,27,34
2 1 SELPSB1 HA#15 E4 A14# D11# E12 HD#12 1 2 6 NC SMBDATA 11 ATF#
R224 @10K HA#16 A15# D12# HD#13 +5VS R12 1K ADD1 ALERT
F1 B16 7 10
1
HA#17 A16# D13# HD#14 GND ADD0
2 1 F4 A13 8 9
R223 0 HA#18 F2 A17# D14# D13 HD#15 GND NC R174
HA#19 A18# D15# HD#16 MAX1617/MAX6654
E1 D15 1K
HA#20 C4 A19# D16# D12 HD#17
HA#21 A20# D17# HD#18
D3 B14
A21# D18#
2
HA#22 D1 E14 HD#19
HA#23 E2 A22# D19# C13 HD#20
HA#24 A23# D20# HD#21 +5VS
D5 A19
HA#25 D4 A24# D21# B17 HD#22
HA#26 A25# D22# HD#23
C3 A18
HA#27 A26# REQUEST DATA D23# HD#24 +5VS RP34 +5VS CPU_VID[0..4]
C1 C17 CPU_VID[0..4] 3
HA#28 B3 A27# D24# D17 HD#25 10P8R-10K
A28# PHASE PHASE D25#
HA#29 A3 SIGNALS SIGNALS C18 HD#26 6 5 1 2 CPU_VID4
2
HA#30 B2 A29# D26# B19 HD#27 CPU_VID3 7 4 R326 10K CPU_VID2
HA#31 A30# D27# HD#28
C2 D18 8 3
A31# D28# HD#29 R323 CPU_VID0 CPU_VID1
A4 B20 9 2
A5 A32# D29# A20 HD#30 10 1
A33# D30# +5VS
B4 B21 HD#31
A34# D31#
1
+2.5V_CLK C5 D19 HD#32 @10K
A35# D32# HD#33
C21
D33#
1 2 CPU_PWRGD 4 HREQ#0 T2 E18 HD#34
R252 1.5K V4 REQ0# D34# C20 HD#35 VID[0..4]
4 HREQ#1 REQ1# D35# U44 VID[0..4] 37
1 2 BREQ0# 4 HREQ#2 V2 F19 HD#36
3 R243 10 W3 REQ2# D36# D20 HD#37 CPU_VID0 3 2 VID0 3
4 HREQ#3 REQ3# D37# HD#38 CPU_VID1 A0 C0 VID1
4 HREQ#4 W5 D21 7 6
RP4 REQ4# D38# HD#39 CPU_VID2 A1 C1 VID2
W2 H18 11 10
1 8 ITP_TDI RP# D39# F18 HD#40 CPU_VID3 17 A2 C2 16 VID3
ITP_TMS D40# HD#41 CPU_VID4 A3 C3 VID4
2 7 4 ADS# AB2 J18 21 20
3 6 ITP_TCK ADS# D41# F21 HD#42 A4 C4
ITP_TRST# D42# HD#43
4 5 E20 4 5
D43# HD#44 B0 D0
AA1 H19 8 9
8P4R-1K AB1 AERR# ERROR D44# E21 HD#45 14
B1 D1
15
AP0# D45# HD#46 B2 D2
Y2 SIGNALS J20 18 19
E6 AP1# D46# H21 HD#47 22
B3 D3
23
BERR# D47# HD#48 B4 D4
V21 L18
IERR# BINIT# D48# HD#49
AD9 G20 1 24 +5VS
IERR# D49# P18 HD#50 BE# VCC
1
BREQ0# D50# HD#51 C436
C6 G21 13 12
2
U4 BREQ0# D51# K18 HD#52 BX GND
4 BPRI# BPRI# D52#
T4 ARBITRATION K21 HD#53 1K @1K 1K 1K 1K .1UF
4 BNR# BNR# D53# SN74CBT3383
2
R1 PHASE M18 HD#54
4 HLOCK# LOCK# D54#
SIGNALS L21 HD#55
D55# HD#56 R330 R325 R324 R302 R304
R19
D56#
1
V1 K19 HD#57
4 HIT# HIT# D57#
Y4 SNOOP PHASE T20 HD#58 VR_HI/LO#
4 HITM# HITM# D58# VR_HI/LO# 9,37
U3 SIGNALS J21 HD#59
4 DEFER# DEFER# D59# L20 HD#60
D60# HD#61
AA21 M19
Y21 BP2# RESPONSE D61# U18 HD#62
1
BP3# D62# HD#63 D38
W21
BPM0#
PHASE
D63#
R18 VID[4..0]
W19 SIGNALS 22 17V/16V# 1 2 2
U2 BPM1#
2 4 HTRDY# TRDY# 4 3 2 1 0 V 2
U1 V20 Q77
4 RS#0 RS0# DEP0#
3
AA2 T21 RB751V 2N7002 0 0 0 0 0 2.00
4 RS#1 RS1# DEP1#
4 RS#2 W1 U21
RS2# DEP2#
Y1
RSP# DEP3#
R21 0 0 0 0 1 1.95
V18
A20M# DEP4#
8 A20M# AD10
A20M# DEP5#
P21 0 0 0 1 0 1.90
FERR# AC12 PC P20
8 FERR# IGNNE# FERR# DEP6#
8 IGNNE# AC13
IGNNE# COMPATIBILITY
DEP7#
U19 0 0 0 1 1 1.85
CPU_PWRGD V5 SIGNALS
8 CPU_PWRGD PWRGOOD
SMI# AB10 AA3 0 0 1 0 0 1.80
8 SMI# SMI# DBSY# DBSY# 4
T1 DRDY# 4
AC15 DRDY#
TDO 0 0 1 0 1 1.75
ITP_TDI AD13 DIAGNOSTIC
ITP_TMS TDI
AD14
TMS & TEST For 1GHz CPU * 0 0 1 1 0 1.70
ITP_TRST# AA14 SIGNALS
ITP_TCK TRST#
AA11
TCK 0 0 1 1 1 1.65
ITP_PREQ# AB20 AA18 1 2
GTL_PRDY# PREQ# PICCLK R200 1K
W20
PRDY# PICD1
Y20 * 0 1 0 0 0 1.60
SELPSB0 AA12 AB21
SELPSB1 AB15 SELPSB0 PICD0
SELPSB1 0 1 0 0 1 1.55
AA10 CPUINIT#
INIT# CPUINIT# 8
INTR AB18 AC9 FLUSH# 0 1 0 1 0 1.50
8 INTR NMI INTR/LINT0 EXECUTION FLUSH# CPURST#
8 NMI AC19 A6 CPURST# 4
STPCLK# NMI/LINT1 RESET#
8 STPCLK# AC11
STPCLK# CONTROL 0 1 0 1 1 1.45
CPUSLP# AB12 SIGNALS M3
8 CPUSLP# SLP# BCLK HCLK_CPU 11
0 1 1 0 0 1.40
2
Title
10 RESERVED Mobile Coppermine Processor in Micro-PGA2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
11 133MHZ PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THEETENT
COMP
DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE B 888M1 1.0
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 2 of 38
A B C D E
A B C D E
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. ONTAINS
AND C CONFIDENTIAL AND
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
PETENT
COMDIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE ATION
INFORMIT CONTAINS MAY BE
1 2 VCCT_VCCA
CPU_IO USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OFALCOMP
ELECTRONICS, INC.
L3 4.7Uh
1
+ C91 C362 U7B CPU_IO
A2 U7C
.1UF VSS0
33U_D L2 A7 G6 R12
VCCTREF VCCA PLL ANALOG VOLTAGE VSS1 VCCT0 VSS102
2
VCCT_VSSA M2 A8 G7 R14
1
VSSA VSS2
A12 G8
VCCT1 VSS103 R16
VSS3 C264 C282 C297 C312 C328 C345 C344 C343 C342 C258 VCCT2
VCCTREF VSS104
CPU_IO 1 2 E5 A21 G9 R20
R208 E16 VREF0 VSS4
B1 .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF G10
VCCT3 VSS105 T3
1
1K_1%_0603 VREF1 VSS5 VCCT4 VSS106
2
4 C250 C357 C356 C226 E17 B5 G11 T5 4
VREF2 VSS6 VCCT5 VSS107
F5 B6 G12 T7
R199 .1UF .1UF .1UF F17 VREF3 VSS7
B7 CPU_IO G13
VCCT6 VSS108 T9
2K_1%_0603 VREF4 VSS8 VCCT7 VSS109
2
U5 B8 G14 T11
Y17 VREF5 VSS9
B10 G15
VCCT8 VSS110 T13
VREF6 COPPERMINE VSS10 VCCT9 VSS111
2
1
4.7U_0805 VREF7 VSS11 VCCT10 VSS112
B18 C276 C291 C306 C246 C247 C248 C249 C245 C321 C348 G17 T18
VSS12 VCCT11 VSS113
H8 C9 H6 T19
H10
VCC0 VSS13
C11 .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF H17
VCCT12 COPPERMINE VSS114
U8
VCC1 VSS14 VCCT13 VSS115
2
H12 C15 J6 U10
VCC2 VSS15 VCCT14 VSS116
H14 C16 J17 U12
VCC3 VSS16 CPU_IO VCCT15 VSS117
H16 C19 K6 U14
J7 VCC4 VSS17
D2 K17
VCCT16 VSS118 U16
VCC5 VSS18 VCCT17 VSS119
J9 D6 L6 U20
J11 VCC6 VSS19
D7 L17
VCCT18 VSS120 V3
VCC7 VSS20 VCCT19 VSS121
J13 D9 M6 V19
1
VCC8 VSS21 + C64 VCCT20 VSS122
J15 E3 C349 M17 W4
K8 VCC9 VSS22 E7 N6 VCCT21 VSS123 W18
VCC10 VSS23 220U_E VCCT22 VSS124
K10 POWER, E8 .1UF N17 POWER, GROUND AND NC Y3
VCC11 VSS24 VCCT23 VSS125
2
CPU_CORE K12 GROUND, E9 P1 Y9
VCC12 VSS25 CPU_CORE VCCT24 VSS126
K14 RESERVED E10 P6 Y10
VCC13 VSS26 CPU_CORE VCCT25 VSS127
K16 SIGNALS E11 P17 Y11
L7 VCC14 VSS27 E13 R6 VCCT26 VSS128 Y12
VCC15 VSS28 VCCT27 VSS129
L9 E19 R17 Y13
L11 VCC16 VSS29 F3 T6 VCCT28 VSS130 Y14
1
VCC17 VSS30 C259 C269 C277 C284 C292 C299 C307 C315 C323 C332 C333 VCCT29 VSS131
L13 F6 T17 Y15
VCC18 VSS31 VCCT30 VSS132
L15 F7 U6 Y16
M8 VCC19 VSS32 F8 U17 VCCT31 VSS133 Y19
VCC20 VSS33 .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U VCCT32 VSS134
2
M10 F9 V6 AA4
3 M12 VCC21 VSS34 F10 V7 VCCT33 VSS135 AA13 3
VCC22 VSS35 CPU_CORE VCCT34 VSS136
M14 F11 V8 AA20
VCC23 VSS36 VCCT35 VSS137
M16 F12 V9 AB3
N7 VCC24 VSS37 F13 V10 VCCT36 VSS138 AB4 CPU_VID4
VCC25 VSS38 VCCT37 VID4
N9 F14 V11 AB5
1
N11 VCC26 VSS39 F15 C324 C316 C308 C300 C293 C285 C278 V12 VCCT38 VSS140 AB9
C270 C260 C261
VCC27 VSS40 VCCT39 VSS141
N13 F16 V13 AB11
VCC28 VSS41 .1U .1U .1U .1U VCCT40 VSS142
N15 F20 .1U .1U .1U .1U .1U .1U V14 AB13
VCC29 VSS42 VCCT41 VSS143
2
P8 G3 V15 AB14
VCC30 VSS43 VCCT42 VSS144
P10 G19 V16 AB17
P12 VCC31 VSS44 H2 CPU_CORE V17 VCCT43 VSS145 AC1
VCC32 VSS45 VCCT44 VSS146
P14 H7 W6 AC2
VCC33 VSS46 VCCT45 VSS147 CPU_VID3
P16 H9 W7 AC4
R7 VCC34 VSS47 H11 W8 VCCT46 VID3 AC5
1
VCC35 VSS48 VCCT47 VSS149
R9 H13 C271 C279 C286 C294 C301 C309 C317 C325 C334 C262 C272 W9 AC10
R11 VCC36 VSS49 H15 W10 VCCT48 VSS150 AC14
VCC37 VSS50 .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U VCCT49 VSS151
R13 H20 W11 AC16
VCC38 VSS51 VCCT50 VSS152
2
R15 J4 W12 AC18
T8 VCC39 VSS52 J8 W13 VCCT51 VSS153 AC21
+2.5V_CLK +2.5V_CLK VCC40 VSS53 CPU_CORE VCCT52 VSS154
T10 J10 W14 AD1
T12 VCC41 VSS54 J12 W15 VCCT53 VSS155 AD2 CPU_VID0
VCC42 VSS55 VCCT54 VID0 CPU_VID1
T14 J14 W16 AD3
2
1
R246 R268 U7 VCC44 VSS57 J19 Y6 VCCT56 VID2 AD5
C280 C287 C295 C302 C310 C318 C326 C335 C336 C327 C319
VCC45 VSS58 VCCT57 VSS159
1.5K_1%_0603 2K_1%_0603 U9 K2 Y7 AD16
U11 VCC46 VSS59 K7 .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U Y8 VCCT58 VSS160 AD21
VCC47 VSS60 VCCT59 VSS161
2
2
U13 K9 AA6
VCC48 VSS61 VCCT60
1
1
.1UF .1UF .1UF RSVD VSS66 VCCT65 NC5
L8 C311 C303 C296 C288 C281 C273 C263 C374 AC6 D14
VSS67 VCCT66 NC6
2
2
L14 AD6 G2
1K_1%_0603 2K_1%_0603 VSS70 VCCT69 NC9
L16 AD7 G5
VSS71 CPU_CORE VCCT70 NC10
L19 AD8 G18
CMOSREF AA9 VSS72 M7 VCCT71 NC11 H3
CMOSREF1 VSS73 NC12
AD18 M9 H5
1
1
CMOSREF2 VSS74 M11 NC13 J5
C22 C40 C67 C23 C60 C47 C20
VSS75 NC14
M13 M4
VSS76 2.2U_0805 2.2U_0805 2.2U_0805 2.2U_0805 2.2U_0805 2.2U_0805 2.2U_0805 NC15
M15 M5
VSS77 NC16
2
2
9 IST_CPU_PERF# R2 M20 P3
GHI# VSS78 NC17
AD19 N2 P4
RTTIMPEDP VSS79 N3 CPU_CORE NC18 AA5
VSS80 NC19
N4 AA19
VSS81 NC20
N8 AC3
VSS82 N10 NC21 AC17
VSS83 NC22
CPU_IO 2 1 AD17 N12 AC20
R218 1.5K TESTHI VSS84 N14 + C92 + C93 + C94 + C4 + C9 + C8 NC23 AD15
VSS85 220U_E 220U_E NC24
N16 220U_E 220U_E 220U_E 220U_E
VSS86
Y5 N18 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
N5 TESTLO1 VSS87 N19
TESTLO2 VSS88 MICRO-PGA
N20
VSS89 P5
VSS90 CPU_CORE CPU_VID[0..4]
AD20 P7 2 CPU_VID[0..4]
TESTP1 VSS91
1 H4 P9 1
AA17 TESTP2 VSS92 P11
TESTP3 VSS93
G4 P13
TESTP4 VSS94 P15
2
VSS95 + C7 + C6
P19
2
R10
VSS101
1
GMCH2-M-1/3(GTL+,AGP,HUB)
2 HD#[0..63] HD#[0..63] HA#[3..31]
HA#[3..31] 2 GAD[0..31]
12 GAD[0..31]
U6A U6C
@33
HD#0 AA1 U6 1 2 GAD0 K26 AD16
HD#1 AB2 HD#0 GTLREFA
AA10 R205 C251 @18PF GAD1 J22 G_AD0/LDQM0 LTVD0
AF17
HD#1 GTLREFB +GTLREF G_AD1/LMD4 LTVD1
HD#2 AF2 GAD2 K25 AE17
HD#3 AD4 HD#2 AA7 GAD3 J21 G_AD2/LMD7 LTVD2
AD17
HD#3 HCLKIN HCLK_GMCH 11 G_AD3/LMD3 LTVD3
HD#4 AB1 GAD4 L24 AF18
HD#5 AB3 HD#4 H3 GAD5 J20 G_AD4/LMD6 LTVD4
AD18
1 HD#6 HD#5 RSTIN# GAD6 G_AD5/LMD2 LTVD5 1
AA3 L26 AF20
HD#7 AC4 HD#6 U18D GAD7 K23 G_AD6/LMD5 LTVD6
AD20
13
HD#8 HD#7 74LVC125 GAD8 G_AD7/LMD1 LTVD7
AC1 K22 AC20
HD#9 AF3 HD#8 AA5 GAD9 M25 G_AD8/LMD0 LTVD8
AF21
HD#9 CPURST# CPURST# 2 G_AD9/LMA4 LTVD9
HD#10 AD1 L4 11 12 GAD10 M24 AE21
HD#10 HLOCK# HLOCK# 2 PCIRST# 8,12,14,15,16,17,18,20,22,27,30 G_AD10/LDQM1 LTVD10
HD#11 AE3 M3 DEFER# 2
GAD11 M26 AD21 +1_8VS
HD#12 HD#11 DEFER# +3V POWER GAD12 G_AD11/LMA2 LTVD11
AD2 G1 ADS# 2 M21 AB19
HD#13 AD3 HD#12 ADS#
N4 GAD13 N24 G_AD12/LMD8 BLANK#
AC18 1 2
HD#13 BNR# BNR# 2 G_AD13/LMA5 TVCLKIN/STALL
DVO
HD#14 AF1 M5 GAD14 N22 AE19 R428 2.2K
HD#14 BPRI# BPRI# 2 G_AD14/LMD9 CLKOUT0
HD#15 AA4 J3 GAD15 N26 AF19
HD#15 DBSY# DBSY# 2 G_AD15/MA1 CLKOUT1
HD#16 AD6 J1 GAD16 T26 AC16 +3V
HD#16 DRDY# DRDY# 2 G_AD16/LMA8 LTVVSYNC
HD#17 AC3 K1 HIT# 2
GAD17 T22 AB17
HD#18 HD#17 HIT# GAD18 G_AD17/LMD14 LTVHSYNC
AE1 L3 HITM# 2 U24 AA20 1 2
HD#19 HD#18 HITM# GAD19 G_AD18/LMA11/LBA LTVDA R186 4.7K
AB6 K3 HTRDY# 2 T23 AB21 1 2
HD#20 HD#19 HTRDY# GAD20 G_AD19/LMD15 LTVCK R187 4.7K
AF4 U26
HD#21 HD#20 HA#3 GAD21 G_AD20/LMA9
AE5 R4 T24 AB18 1 2
HD#22 HD#21 HA#3 HA#4 GAD22 G_AD21/LMD16 DDCK R184 10K
AC8 P1 V24 AA18 1 2
HD#23 HD#22 HA#4 HA#5 GAD23 G_AD22/LMA0 DDDA R185 10K
AB5 T2 U21 AE24 1 2
HD#24 HD#23 HA#5 HA#6 GAD24 G_AD23/LMD17 DCLKREF R193 4.7K
AF5 R3 V25 Y20
HD#25 HD#24 HA#6 HA#7 GAD25 G_AD24/LCKE IWASTE GMCH_IREF
AC6 N5 V21 AD23 1 2
HD#26
HD#27
AF6
AD11
HD#25
HD#26
HD#27
HOST HA#7
HA#8
HA#9
P5
R1
HA#8
HA#9
GAD26
GAD27
V26
W21
G_AD25/LMD18
G_AD26/LCAS#
G_AD27/LMD19
IREF
VSYNC
AF22
R183 174_1%_0603
AGP
HD#30 HD#29 HA#11 HA#12 GAD30 G_AD29/LMD20 RED
AD5 T1 W26 AE22
HD#31 HD#30 HA#12 HA#13 GAD31 G_AD30/LTCLK0 GREEN
AB7 T3 Y21 AE23
HD#32 HD#31 HA#13 HA#14 G_AD31/LMD21 BLUE
AF7 P3
HD#33 HD#32 HA#14 HA#15
AD7 T5 12 GC/BE#0 H23
HD#34 HD#33 HA#15 HA#16 G_C/BE#0/LMA3 CLK_HUB_GMCH
AB8 R5 12 GC/BE#1 N21 F22 CLK_HUB_GMCH 11
HD#35 HD#34 HA#16 HA#17 G_C/BE#1/LMD10 HLCLK HL0
AE7 V5 12 GC/BE#2 T25 H24
HD#36 HD#35 HA#17 HA#18 G_C/BE#2/LMD13 HL0 HL1
AE9 Y2 12 GC/BE#3 Y26 H26
HD#37 HD#36 HA#18 HA#19 G_C/BE#3/LRAS# HL1 HL2
AB9 V3 H25
2 HD#38 HD#37 HA#19 HA#20 GFRAME# HL2 HL3 2
AF9 W1 12 GFRAME# R26 G24
HD#39 HD#38 HA#20 HA#21 GDEVSEL# G_FRAME#/LMA10 HL3 HL4 HUBREF
AD10 U4 12 GDEVSEL# P26 F24
HD#40 HD#39 HA#21 HA#22 GIRDY# G_DEVSEL#/LMD11 HL4 HL5
AF12 V2 12 GIRDY# P23 E26
1
HD#41 HD#40 HA#22 HA#23 GTRDY# G_IRDY#/LMD12 HL5 HL6 C341
AB11 W3 P21 E25
HD#42 AB10
HD#41
HD#42
HA#23
HA#24
W4 HA#24
12
12
GTRDY#
GSTOP#
GSTOP# P25
G_TRDY#/LMA7
G_STOP#/LCS#
HUB HL6
HL7
D26 HL7
HD#43 AD9 U5 HA#25
12 GPAR
GPAR R24 D25 HL8 .1UF
HD#43 HA#25 G_PAR/LMA6 HL8
2
HD#44 AC10 Y5 HA#26 GREQ# AE26 D24 HL9
HD#44 HA#26 12 GREQ# G_REQ#/LMD27 HL9
HD#45 AF10 Y3 HA#27
12 GGNT#
GGNT# AD25 C26 HL10
HD#46 HD#45 HA#27 HA#28 PIPE# G_GNT# HL10 HUBREF
AD14 U3 12 PIPE# AC26 H21 HUBREF 8
HD#47 HD#46 HA#28 HA#29 PIPE#/LMD24 HLREF HL_STB
AD12 Y1 G25 HL_STB 8
HD#48 HD#47 HA#29 HA#30 AD_STBA HLPSTRB HL_STB#
AB12 W5 12 AD_STBA M22 F26 HL_STB# 8
HD#49 HD#48 HA#30 HA#31 AD_STBA# AD_STB0 HLPSTRB#
AE11 V1 12 AD_STBA# L23 H20 +GMCH_HLCOMP 1 2 +1_8VS
HD#50 HD#49 HA#31 AD_STBB AD_STB#0 HLZCOMP R237
AE15 12 AD_STBB U22
HD#51 HD#50 AD_STBB# AD_STB1 36.5_1%_0603
AF11 12 AD_STBB# V23
HD#52 HD#51 HREQ#0 SBSTB AD_STB#1
AF13 M1 12 SBSTB Y23
HD#53 HD#52 HREQ#0 HREQ#1 SBSTB# SB_STB SBA0
AB14 N1 12 SBSTB# AA24 AB22
HD#54 HD#53 HREQ#1 HREQ#2 SB_STB# SBA0/LMD31 SBA1
AF14 M2 AB25
HD#55 HD#54 HREQ#2 HREQ#3 SBA1/LMD25 SBA2
AB13 L5 AB23
HD#56 HD#55 HREQ#3 HREQ#4 HREQ#[0..4] RBF# SBA2/LDQM2 SBA3
AB15 N3 HREQ#[0..4] 2 12 RBF# AD26 AB26
HD#57 HD#56 HREQ#4 WBF# RBF#/LMD30 SBA3/LMD26 SBA4
AE13 12 WBF# AB24 AA22
HD#58 HD#57 RS#0 WBF# SBA4/LMD23 SBA5
AC14 K2 AA26
HD#59 HD#58 RS#0 RS#1 AGP_VGAREF SBA5/LWE# SBA6
AD13 L1 12 AGP_VGAREF J24 Y22
HD#60 HD#59 RS#1 RS#2 RS#[0..2] AGPREF SBA6/LMD22
AD15 H1 RS#[0..2] 2 1 2 GRCOMP J26 Y25 SBA7
HD#61 HD#60 RS#2 R50 36.5_1%_0603 G10 GRCOMP SBA7/LGM_FRQ_SEL
AF16
HD#62 HD#61 NC ST0
AF15 AD24 ST0 12
HD#63 HD#62 ST0/LMD28 ST1
AC12 R22 AC24 ST1 12
HD#63 LOCLK ST1/LDQM3 ST2
P22 AC23 ST2 12
LRCLK ST2/LMD29
GMCH2v0
GMCH2v0 HL[0..10] HL[0..10] 8
SBA[0..7] +1_5VS
3 SBA[0..7] 12 3
GTRDY# 2 1
R88 8.2K
GIRDY# 2 1
R293 8.2K
GDEVSEL#2 1
R300 8.2K
TYPEDET# +VDDQ AGP-REF GSTOP# 2 1
R91 8.2K
0 1.5V 0.5VDDQ AD_STBA 2 1
R312 8.2K
1 3.3V 0.4VDDQ AD_STBB 2 1
R292 8.2K
GFRAME# 2 1
R83 8.2K
+1_5VS GREQ# 2 1
C26 R273 8.2K
GGNT# 2 1
R64 8.2K
1
470PF SBSTB 2 1
R282 8.2K
R30 R29 RBF# 2 1
1K_1%_0603 82_1%_0603 R280 8.2K
CLK_HUB_GMCH PIPE# 2 1
2
R66 8.2K
CPU_IO AGP_NBREF WBF# 2 1
12 AGP_NBREF
1
R68 8.2K
1
R255
1
@33 GPAR2 1
R230 R36 R35 R95 100K
1K_1%_0603 1K_1%_0603 82_1%_0603 AD_STBA# 2 1
12
R101 8.2K
4
2
C39 C358 AD_STBB# 2 4
1
2
R76 8.2K
@22PF SBSTB# 2 1
+GTLREF
2
470PF R69 8.2K
1
R231
2K_1%_0603 C267 C230 Place reference circuitry near GMC H2-M
.1UF .1UF Compal Electronics, Inc.
2
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, ANDINC.
CONTAINS CONFIDENTIAL AND
GMCH2-M-1/3(GTL+,AGP,HUB)
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY E OFCOMPETENT
TH DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR NFORMATION
THE I IT CONTAINS MAY BE B 888M1 1.0
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENTCOMPAL
OF ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 4 of 38
A B C D E
A B C D E
GMCH2-M-2/3(SDRAM)
MD[0..63]
7 MD[0..63]
U6B
RP25 RP26
MD46 1 16 MMD46 MD38 1 16 MMD38 MMD0 D23 D13 MAA0
SMD0 SMAA0 MAA0 7
MD47 2 15 MMD47 MD39 2 15 MMD39 MMD1 C23 B16 MAA1
SMD1 SMAA1 MAA1 7
MD43 3 14 MMD43 MD36 3 14 MMD36 MMD2 D22 F12 MAA2
SMD2 SMAA2 MAA2 7
MD44 4 13 MMD44 MD37 4 13 MMD37 MMD3 F21 A16 MAA3
SMD3 SMAA3 MAA3 7
MD45 5 12 MMD45 MD34 5 12 MMD34 MMD4 E21 B12
MD40 MMD40 MD35 MMD35 MMD5 SMD4 SMAA4
6 11 6 11 G20 A12
MD41 MMD41 MD33 MMD33 MMD6 SMD5 SMAA5
7 10 7 10 F20 C11
MD42 MMD42 MD32 MMD32 MMD7 SMD6 SMAA6
8 9 8 9 D20 A11
1 MMD8 SMD7 SMAA7 MAA8 1
F19 D12 MAA8 7
16P8R-10 16P8R-10 MMD9 SMD8 SMAA8 MAA9
E19 C13 MAA9 7
MMD10 SMD9 SMAA9 MAA10
D19 E11 MAA10 7
MMD11 SMD10 SMAA10 MAA11
E18 A13 MAA11 7
RP10 RP9 MMD12 SMD11 SMAA11 MAA12
B18 B7 MAA12 7
MD10 MMD10 MD1 MMD1 MMD13 SMD12 SMAA12
1 16 1 16 F18
MD9 MMD9 MD0 MMD0 MMD14 SMD13 SMAB#4 SMAB#6
2 15 2 15 G18 B15 1 8 MAB#6 7
MD8 MMD8 MD2 MMD2 MMD15 SMD14 SMAB#4 SMAB#5 SMAB#7
3 14 3 14 D17 A15 2 7 MAB#7 7
MD12 MMD12 MD4 MMD4 MMD16 SMD15 SMAB#5 SMAB#6 SMAB#4
4 13 4 13 A3 C14 3 6 MAB#4 7
MD11 MMD11 MD3 MMD3 MMD17 SMD16 SMAB#6 SMAB#7 SMAB#5
5 12 5 12 A1 A14 4 5 MAB#5 7
MD13 MMD13 MD7 MMD7 MMD18 SMD17 SMAB#7 RP13 8P4R-10
6 11 6 11 C1
MD14 MMD14 MD6 MMD6 MMD19 SMD18 SMAC#4 SMAC#6
7 10 7 10 F2 B10 1 8 MAC#6 MAC#6 7
MD15 MMD15 MD5 MMD5 MMD20 SMD19 SMAC#4 SMAC#5 SMAC#4
8 9 8 9 G3 A10 2 7 MAC#4 MAC#4 7
MMD21 SMD20 SMAC#5 SMAC#6 SMAC#5
D6 C10 3 6 MAC#5 MAC#5 7
16P8R-10 16P8R-10 MMD22 SMD21 SMAC#6 SMAC#7 SMAC#7
C5 A9 4 5 MAC#7 MAC#7 7
MMD23 SMD22 SMAC#7 RP27 8P4R-10
B4
MMD24 SMD23 SBS0
D4 B13 SBS0 7
SMD24 SBS0
MEMORY
MMD25 C2 D11 SBS1
SMD25 SBS1 SBS1 7
RP23 RP11 MMD26 D3
MD31 MMD31 MD53 MMD53 MMD27 SMD26
1 16 1 16 E4 D15
MD63 MMD63 MD21 MMD21 MMD28 SMD27 SCSA#0
2 15 2 15 F5 A17
MD30 MMD30 MD54 MMD54 MMD29 SMD28 SCSA#1 CSA#2
3 14 3 14 G4 D14 CSA#2 7
MD62 MMD62 MD22 MMD22 MMD30 SMD29 SCSA#2 CSA#3
4 13 4 13 J6 E14 CSA#3 7
MD29 MMD29 MD55 MMD55 MMD31 SMD30 SCSA#3 CSA#4
5 12 5 12 K5 E13 CSA#4 7
MD61 MMD61 MD23 MMD23 MMD32 SMD31 SCSA#4 CSA#5
6 11 6 11 A26 B17 CSA#5 7
MD28 MMD28 MD48 MMD48 MMD33 SMD32 SCSA#5
7 10 7 10 A25
MD60 MMD60 MD16 MMD16 MMD34 SMD33
8 9 8 9 B24 F9
MMD35 SMD34 SCSB#0
A24 F8
16P8R-10 16P8R-10 MMD36 SMD35 SCSB#1
B23 D10
MMD37 SMD36 SCSB#2
A23 D9
MMD38 SMD37 SCSB#3
C22 B9
RP24 RP12 MMD39 SMD38 SCSB#4
A22 A8
2 MD52 MMD52 MD24 MMD24 MMD40 SMD39 SCSB#5 2
1 16 1 16 D21
MD20 MMD20 MD27 MMD27 MMD41 SMD40 SRASA#
2 15 2 15 B21 C16 SRASA# 7
MD19 MMD19 MD59 MMD59 MMD42 SMD41 SRAS# SCASA#
3 14 3 14 A21 D18 SCASA# 7
MD51 MMD51 MD56 MMD56 MMD43 SMD42 SCAS# RMWEA#
4 13 4 13 C20 E16 RMWEA# 7
MD18 MMD18 MD26 MMD26 MMD44 SMD43 SWE#
5 12 5 12 B20
MD50 MMD50 MD58 MMD58 MMD45 SMD44
6 11 6 11 A20 D8
MD17 MMD17 MD25 MMD25 MMD46 SMD45 SCKE0
7 10 7 10 C19 E8
MD49 MMD49 MD57 MMD57 MMD47 SMD46 SCKE1 CKE2
8 9 8 9 A19 E9 CKE2 7
MMD48 SMD47 SCKE2 CKE3
A4 D7 CKE3 7
16P8R-10 16P8R-10 MMD49 SMD48 SCKE3 CKE4
A2 C8 CKE4 7
MMD50 SMD49 SCKE4 CKE5
B1 C7 CKE5 7
MMD51 SMD50 SCKE5
E1
MMD52 SMD51 CLK_MEM_GMCH
G2 F7 CLK_MEM_GMCH 11
MMD53 SMD52 SCLK
E6
MMD54 SMD53 DQM#0
D5 D16 DQM#0 7
MMD55 SMD54 SDQM0 DQM#1
C4 F15 DQM#1 7
MMD56 SMD55 SDQM1 DQM#2
B3 A7 DQM#2 7
MMD57 SMD56 SDQM2 DQM#3
D2 A6 DQM#3 7
MMD58 SMD57 SDQM3 DQM#4
E3 A18 DQM#4 7
MMD59 SMD58 SDQM4 DQM#5
F4 C17 DQM#5 7
MMD60 SMD59 SDQM5 DQM#6
F6 B6 DQM#6 7
MMD61 SMD60 SDQM6 DQM#7
G5 A5 DQM#7 7
MMD62 SMD61 SDQM7
H4
MMD63 SMD62 SRCOMP
J4 G7 1 2 +3V
SMD63 SRCOMP R239 36.5_1%_0603
GMCH2v0
Power-Up Strap Options
Pin Name Strap Description Configuration Interface Internal
3 3
SCAS# Host Freq. "H" : 133MHz (Default) System PULL_UP
"L" : 100MHz Memory
1
SMAC6# Enable VCH Serial "H" : Enabled (Default) System SCASA# R263 1 2 10K
PULL_UP R254
Programming "L" : Disabled Memory SBS0 R267 1 2 10K
@33
Mode MAA9 R264 1 2 10K
SMAC5# "H" : Disabled System
2
Enable Quick Start (Stop Grant Mode) SMAC#5 R270
Memory PULL_UP 1 2 10K
Support "L" : Enabled (Default) C352
(Quick Start Mode) SMAC#6 R266 1 2 10K
@22PF
4 4
Local Memory Freq. Select "H" : 133MHz (Default) AGP/LM i815/i815-m
VGA_LFSEL#
"L" : 100MHz
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, ANDINC.
CONTAINS CONFIDENTIAL AND
GMCH2-M-2/3(SDRAM)
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY E OFCOMPETENT
TH DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR NFORMATION
THE I IT CONTAINS MAY BE B 888M1 1.0
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENTCOMPAL
OF ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 5 of 38
A B C D E
A B C D E
GMCH2-M-3/3(Power)
Please make sre the ESR and art
p nmber
1
GND/VSSDPLL VCC1_8 C5 C274
M6
VCC1_8
1
1 + C314 + C329 C331 AE25 P6 + + C236 C219 C221 C231 C304 C353 C354 C366 C360 C350 C234 C224 C227 1
GND/VSSDACA1 VCC1_8
AF24 Y9
4.7UF_0805 4.7UF_0805 .1UF GND/VSSDACA2 VCC1_8 150UF_E 22UF_10V_1206 .1UF .1UF 82PF .1UF .1UF 82PF .1UF .1UF 82PF .1UF .1UF .1UF .1UF
E22 Y18
GND/VSSBA VCC1_8
2
Y8 AA8 6.3V
GND VCC1_8
AB4 AA11
GND VCC1_8
M13 AA13
GND VCC1_8
AC2 AA15
GND VCC1_8
AC5 AA17
GND VCC1_8
AC7 AA19
GND VCC1_8
AC9 AB16
GND VCC1_8 +1_8VS
AC11 AB20
GND VCC1_8
AC13 AC22
GND VCC1_8
AC15 AD19
GND VCC1_8
AC17 C25
GND VCC1_8
2
AC19 E24
GND VCC1_8
AC21 F23
GND VCC1_8 L26
AC25 G22
GND VCC1_8 68nH
AE2 K6
GND VCC1_8
AE4 Y7
GND VCC1_8
1
AE6 AA21 +VCCDA
GND VCCDA/(VCC1_8)
AE8 E23
GND VCCBA/(VCC1_8)
AE10 AF26
GND VCCDACA1/(VCC1_8)
1
AE12 AF25 C232 C257 C256
GND VCCDACA2/(VCC1_8)
AE14 AA6
GND HCLK# .1UF 4.7UF_0805 22UF_1206
AE16 V7
GND VCC1_8
2
AE18 T6
GND VCC1_8 +3V
AE20
GND
B26
GND
C3 B2
GND VSUS_3.3_1
C6 B5
GND VSUS_3.3_2
C9 B8
GND VSUS_3.3_3
C12 B11
2 GND VSUS_3.3_4 +3V 2
C15 B14
GND VSUS_3.3_5
C18 B19
GND VSUS_3.3_6
C21 B22
GND VSUS_3.3_7
C24 B25
GND VSUS_3.3_8
1
D1 E2
GND VSUS_3.3_9 C74 C337 C347 C346 C338 C340 C339 C372 C365 C371 C368 C369 C370 C367 C359
E5 F10 +
GND VSUS_3.3_10
E10 F14
GND VSUS_3.3_11 150UF_E 4.7UF_0805 .01UF .01UF 82PF .01UF .01UF 82PF .01UF .01UF 82PF .01UF .01UF .01UF .01UF
E12 F17
GND VSUS_3.3_12 6.3V
2
E15 G6
GND VSUS_3.3_13
E17 G8
GND VSUS_3.3_14
E20 G19
GND VSUS_3.3_15
F1 H2
GND VSUS_3.3_16
F3 H5
GND VSUS_3.3_17
F11 H7
GND VSUS_3.3_18 +1_5VS
F13
GND
T21 K20 +1_5VS
GND VDDQ
U2 Y24
GND VDDQ
U7 L21
GND VDDQ C289
K24 M23
GND VDDQ + C252 C283 C305 C322 C298 C237 C268 C275
V4 U25
GND VDDQ
V6 N25
GND VDDQ 22UF_10V_1206 .1UF .1UF .1UF .1UF .1UF 82PF 82PF 82PF
V20 R21
GND VDDQ
V22 U20
GND VDDQ
W2 U23
GND VDDQ
W23 W20
GND VDDQ
W25
GND
Y4 Y17 1 2
POWER/GND
GMCH2v0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, ANDINC.
CONTAINS CONFIDENTIAL AND
GMCH2-M-3/3(Power)
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY E OFCOMPETENT
TH DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR NFORMATION
THE I IT CONTAINS MAY BE B 888M1 1.0
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENTCOMPAL
OF ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 6 of 38
A B C D E
A B C D E
+3V
DIMM0 6 1 SCKDIMM0
DIMM1
VCC
9,11 SCKP4 3
+ C411 C539 C545 C544 C538 C520 C496 C481 X SDADIMM0 + C528 C455 C440 C424 C401 C399
12
10UF_1206 .1UF .1UF .1UF .1UF .01UF .01UF .01UF 13 Y0 14 SDADIMM1 10UF_1206 .1UF .1UF .1UF .1UF .01UF
6.3V 9,11 SDAP4 Y Y1 6.3V
15
GND
GND
Y2
4 11 4
Y3
74HC4052
7
8
+3VS
RP14 Compal Electronics, Inc.
1 8 SCKDIMM1
2 7 SCKDIMM0 Title
SDADIMM1
3
4
6
5 SDADIMM0 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND S.O. DIMM CONNECTOR
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THEETENT
COMP
DIVISION OF R&D Size Document Number Rev
B 1.0
8P4R-10K DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE 888M1
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 7 of 38
A B C D E
A B C D
1 1
AD[0..31]
ICH-2M
14,16,17,18 AD[0..31]
U34A
(FW82801BAM)
AD0 AA4 D11 A20M# A20M# 2
AD1 AD0 A20M#
AB4 A12 1 2 CPUSLP# 2
AD2 AD1 CPUSLP# FERR# R260 @0
Y4 R22 FERR# 2
AD3 AD2 FERR# IGNNE#
W5 A11 IGNNE# 2
AD4 AD3 IGNNE# CPUINIT#
W4 C12 CPUINIT# 2
AD5 AD4 INIT# INTR
AD6
Y5
AB3
AD5 CPU INTR
C11
B11 NMI
INTR 2
AD6 NMI NMI 2
AD7 AA5 B12 SMI#
AD7 SMI# SMI# 2
AD8 AB5 C10 STPCLK# STPCLK# 2
AD9 AD8 STPCLK# RC#
Y3 B13 RC# 27
AD10 AD9 RCIN# GATEA20
W6 C13 GATEA20 27
AD11 AD10 A20GATE CPU_PWRGD
W3 A13
AD12 AD11 CPUPWRGD CPU_PWRGD 2
Y6
AD13 AD12
Y2
AD14 AD13 HL0 HL[0..10]
AA6 A4 HL[0..10] 4
AD15 AD14 HL0 HL1
Y1 B5
AD16 AD15 HL1 HL2
V2 A5
AD17 AD16 HL2 HL3
AA8 B6
AD18 AD17 HL3 HL4
V1 B7
2 AD19 AD18 HL4 HL5 2
AB8 A8
AD20 AD19 HL5 HL6
U4 HUB B8
AD21 AD20 HL6 HL7
W9 A9
AD22 AD21 HL7 HL8
U3 C8
AD23 AD22 HL8 HL9
Y9 C6
AD24 AD23 HL9 HL10
U2 PCI C7
AD25 AD24 HL10 HL11
AB9 C5
AD26 AD25 HL11 HL_STB
U1 A6 HL_STB 4
AD27 AD26 HL_STB HL_STB#
W10 A7 HL_STB# 4
AD28 AD27 HL_STB# +ICH_HLCOMP
T4 A3
AD29 AD28 HLCOMP HUBREF
Y10 B4 2 1
AD30 AD29 HUBREF C80 .1UF
T3
AD31 AD30
AA10
AD31 PIRQA#
P1 PIRQA# 12,14,18
PIRQA# PIRQB#
14,16,17,18 C/BE#0 AA3 P2 PIRQB# 14
C/BE0# PIRQB# PIRQC#
14,16,17,18 C/BE#1 AB6 IRQ P3 PIRQC# 17
C/BE1# PIRQC# PIRQD#
14,16,17,18 C/BE#2 Y8 N4 PIRQD# 16,18
C/BE2# PIRQD#
14,16,17,18 C/BE#3 AA9
C/BE3#
1
REQ#3 PCMCIA CONTROLLER R287 R283 GPI5 4 5
2
PCLK_ICH 4 HUBREF HUBREF
1
1
R281 R275
+3VS R57
RP31 PICD0 2 1
REQ#0 @33 300_1%_0603 56_1%_0603 R21 10K
1 8
2 7 REQ#1 PICD1 2 1
4
12
2
REQ#2 R23 10K 4
3 6 1 2
4 5 REQ#3 C380 470PF CLK_APIC_ICH 1 2
C66 R43 0
8P4R-8.2K
@22PF
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, ANDINC.
CONTAINS CONFIDENTIAL AND
ICH2M-A(PCI,HUB,CPU) & FWH
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY E OFCOMPETENT
TH DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR NFORMATION
THE I IT CONTAINS MAY BE B 888M1 1.0
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENTCOMPAL
OF ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 8 of 38
A B C D
A B C D
1 2 5PF
+3V R34
1
10K
2 BATTLOW# RP8
1
C50
2
RP6 1
5PF
2
ICH2M-B(IDE,LPC,GPIO)
27 LLBATT#
D22 RB751V USBP2+ 1 8 USBP3+ 1 8 C42 USB3_D+
1 2 USBP2- 2 7 USB2_D+ 21 USBP3- 2 7 USB3_D- USB3_D+ 24
+3V R249 10K USBP0+ USB2_D- 21 USBP1+ USB3_D- 24
3 6 3 6
1 2 LID# USBP0- 4 5 USB0_D+ 24 USBP1- 4 5 USB1_D+ 24
27 EC_LID_OUT# USB0_D- 24 USB1_D- 24
D26 RB751V
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
8P4R-15 1 2 8P4R-15 1 2
1 2 PBTN# CP6 RP7 C45 5PF CP5 C37 5PF
27 PBTN_OUT#
D20 RB751V 8P4C-22PF 8P4R-15K 8P4C-22PF RP5 1 2 USBBT_D+ 24
8P4R-15K R435 @0
27,30 ON/OFF 1 2 1 2 USBBT_D- 24
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
D21 RB751V R436 @0
1 2 CLOSE TO ICH2-M(< 1 inch)
1 +3V R53 10K 1
SMLINK0 U19
SMLINK1 SMLINK0 PDD0
V20 H19
SMLINK1 PDD0 PDD1
H22
R210 +RTCRST# PDD1 PDD2
T20 J19
RTCRST# PDD2
1 2 +R_VBAIS 1 2 +VBIAS T21 J22 PDD3
2 RTCX1 VBIAS PDD3 PDD4 2
U22 K21
1K C228 RTCX2 RTCX1 PDD4 PDD5
T22 L20
.047UF_0603 RTCX2 PDD5 PDD6
1
R215
2
10M_0603
IDE PDD6
M21
M22 PDD7
R206 X2 PDD7 PDD8 PDD[0..15]
12,25 IAC_RST# V22 L22 PDD[0..15] 20
ICH_AC_SYNC AC_RST# PDD8 PDD9
1 2 P19 AC97 L21
IAC_BITCLK AC_SYNC PDD9 PDD10
12,25 IAC_BITCLK R19 K22
10M_0603 ICH_AC_SDOUT AC_BIT_CLK PDD10 PDD11
32.768KHZ P21 K20
AC_SDOUT PDD11
1
H20 PDD15
EXT_SMI# PDD15
Y14
DSCACHE# GPI8 SDA0
AA11 GPIO A16 SDA0 19
SCI# GPI7 SDA0 SDA1
W14 D16 SDA1 19
LID# GPI12 SDA1 SDA2
AB15 B16 SDA2 19
GPI13 SDA2 SDCS1#
12 C3_STAT# L1 C15 SDCS1# 19
C3_STAT#/GPO21 SDCS1# SDCS3#
7 SM_SEL AB14 D15 SDCS3# 19
GPIO27 SDCS3#
20 SYSIDEPWR AA14
GPIO28 SDDREQ
B18 SDDREQ 19
LAD0 SDDREQ SDDACK#
22,27 LAD0 Y12 B17 SDDACK# 19
LAD1 LAD0/FWH0 SDDACK# SDIOR#
22,27 LAD1 W12 LPC D17 SDIOR# 19
LAD2 LAD1/FWH1 SDIOR# SDIOW#
22,27 LAD2 AB13 C17 SDIOW# 19
LAD3 LAD2/FWH2 SDIOW# SDIORDY
22,27 LAD3 AB12 A17 SDIORDY 19
LDRQ#0 LAD3/FWH3 SIORDY
27 LDRQ#0 Y13
LDRQ#1 LDRQ0# SDD0
22 LDRQ#1 W13 D18
LFRAME# LDRQ1# SDD0 SDD1
22,27 LFRAME# AB11 B19
LFRAME#/FWH4 SDD1 SDD2
1 2 AA12 D19
R258 @10K FSO SDD2 SDD3
A20
USBP0+ SDD3 SDD4
W17 C20
USBP0- USBP0+ SDD4 SDD5
Y18 C21
+RTCVCC USBP1+ USBP0- SDD5 SDD6
AB19 D22
3 USBP1- USBP1+ SDD6 SDD7 3
AA19 E20
INTRUDER# USBP2+ USBP1- SDD7 SDD8
1 2 W18 USB D21
R39 10K USBP2- USBP2+ SDD8 SDD9
Y19 C22
USBP3+ USBP2- SDD9 SDD10
AB20 D20
+3V USBP3- USBP3+ SDD10 SDD11
AA20 B20
USBP3- SDD11 SDD12
C19
SMLINK0 SDD12 SDD13
1 2 24 OVCUR#0 W19 A19
R20 10K OC0# SDD13 SDD14
24 OVCUR#1 Y20 C18
SMLINK1 OVCUR#2 OC1# SDD14 SDD15 SDD[0..15]
1 2 Y21 A18 SDD[0..15] 19
R38 10K OVCUR#3 OC2# SDD15
24 OVCUR#3 W20
OC3#
ICH-2M
+3VS +5VS
1 2 V_GATE 1 2 ICH_AC_SYNC
12,25 IAC_SYNC
R55 100K R49 22 PDIORDY 1 2
1 2 OVCUR#2 1 2 ICH_AC_SDOUT R46 1K
12,25 IAC_SDATAO
R19 10K R22 22 SDIORDY 1 2
1
R248 10K
1 2 SCKP4
R244 10K
1 2 LDRQ#1
R257 @10K CLK_USB_ICH CLK_14M_ICH CLK_HUB_ICH
2 1 AGP_BUSY#
1
R261 10K
2 1 DSCACHE#
R262 10K R42 R44 R67
1 2 ICH_AC_SDOUT @33 @33 @33
R24 @10K
4
12
12
12
AC_SDOUT Strapping: "1" -> Safe Mode B oot IAC_BITCLK 4
2
R26 10K
IAC_SDATAI @33
2 1
R40 10K
2
2 1 IAC_SDATAI1
R25 10K Compal Electronics, Inc.
2 1 SPKR C34 Title
R45 1K ICH2M-B(IDE,LPC,GPIO)
@33PF THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, ANDINC.
CONTAINS CONFIDENTIAL AND
SPKR Strapping: "0" -> No Reboot PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY E OFCOMPETENT
TH DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR NFORMATION
THE I IT CONTAINS MAY BE B 888M1 1.0
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENTCOMPAL
OF ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 9 of 38
A B C D
A B C D
+1_8VS +3VS
U34C
1 1
D10 E14
VCC1_8_1 VCC3_3_1
E5 E15
VCC1_8_2 VCC3_3_2
K19 E16
VCC1_8_3 VCC3_3_3
L19 E17
VCC1_8_4 VCC3_3_4
P5 E18
VCC1_8_5 VCC3_3_5
V9 F18
VCC1_8_6 VCC3_3_6
G18
VCC3_3_7
H18
VCC3_3_8
A1 J18
GND1 VCC3_3_9
A2 P18
GND2 VCC3_3_10
A10 R18
GND3 VCC3_3_11 +3VS +5VS
B1 R5
GND4 VCC3_3_12
B2 T5
GND5 VCC3_3_13
B3 U5
GND6 VCC3_3_14
1
B9 V5
GND7 VCC3_3_15 R222
B10 V6
GND8 VCC3_3_16 D19 1K
C2 V7
GND9 VCC3_3_17 1SS355
C3 V8
GND10 VCC3_3_18
C4
GND11
2
C9 K2 +VCC5REF
GND12 V5REF1
D5 M20
GND13 V5REF2
D6
GND14
1
D7 V14 C265 C30
GND15 VCCSUS1_8_1 +1_8V
D8 V15
GND16 VCCSUS1_8_2 1UF_0805 .1UF
D9 V16
GND17 VCCSUS1_8_3
2
E6
GND18
E7 T18 +3V
GND19 VCCSUS3_3_1
E8 U18
GND20 VCCSUS3_3_2 LAN_1.8V 1
E9 H5 2 +1_8V
GND21 VCCLAN1_8_1 R63 0
J10 J5
GND22 VCCLAN1_8_2
J11
GND23 LAN_3V
J12 F5 1 2 +3V
2 GND24 VCCLAN3_3_1 R271 0 2
J13 G5
GND25 VCCLAN3_3_2
J14
GND26
J9 V17
GND27 VCCSUS3_3_3
K10 V18
GND28 VCCSUS3_3_4
K11
GND29
K12 D12 CPU_IO
+3V GND30 V_CPU_IO_1
K13 D13
GND31 V_CPU_IO_2
K14
GND32
K9 D2 +1_8VS
GND33 VCC1_8_7
L10
GND34
1
L14 1 2
GND38 C29 .1UF
L9
GND39
M10 EEPROM
GND40
M11 K4
GND41 EE_CS
M12 J3
GND42 EE_SHCLK
M13 J4 1 2
GND43 EE_DOUT R74 @10K
M14 K3
GND44 EE_DIN
M9
GND45
N10
N11
GND46
GND47
LAN
N12
GND48
P9 G3
+3VS GND49 LAN_CLK
P14 G2
GND50 LAN_RXD0
P13 G1
GND51 LAN_RXD1
P12 H1
GND52 LAN_RXD2
P11 F3
1
A21
GND58
A22
GND59
B21
GND60
B22
GND61
AA1
GND62
AA2
GND63
AA21
+1_8VS GND64
AA22
GND65
AB1
GND66
AB2
GND67
AB21
GND68
1
AB22
1
ICH-2M
+1_8V CPU_IO
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, ANDINC.
CONTAINS CONFIDENTIAL AND
ICH2M-C(LAN,Power) & Pull-Up
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY E OFCOMPETENT
TH DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR NFORMATION
THE I IT CONTAINS MAY BE B 888M1 1.0
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENTCOMPAL
OF ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 10 of 38
A B C D
A B C D E F G H
Clock Generator
+3V_CLK
L2
+3VS 1 2 +3V_CLK
BLM21A601SPT
1
C87 C95 C101 C103 C105 C96 C102 C104 L1
1 +2.5V_CLKS 1
2 1 +2.5V_CLK
4.7UF_10V_0805 .1UF .1UF .1UF .1UF .1UF .1UF .1UF BLM21A601SPT
1
C89 C88 C85
2
C86
2 1 CK133-XIN U9
23
22
17
10
37
27
44
35
51
53
1
2
18PF Y1
GNDA
VCC3/(SDRAM6)
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC2
VCC2
VDDA
R70 14.318MHZ 3
C84 2M_0603 X1
2
2 1 CK133-XOUT 4 55
X2 APIC0
2
54
18PF APIC1
9 CLK_14M_ICH 2 1 SEL0 28
R72 33 SEL1 SEL0 HCLK1 R73
29 52 1 2 33 HCLK_CPU 2
CLK_14M SEL1(TRIST#) CPU0 HCLK2 R75
22 14.3M_SIO 2 1 1 50 1 2 33 HCLK_GMCH 4
R71 33 REF0/(SEL1) CPU1
49
CPU2(ITP)
46
PCISTP# 11 SDRAM0 45
9 PCI_STP# PCI_STP#/(VCC3) SDRAM1
1 2 CLK_ICH 12 43 SDRAM2 1 2
8 PCLK_ICH PCI_F(PCI0_ICH) SDRAM2 CLK_SDRAM2 7
22 PCLK_SIO R81 33 1 2 CLK_PCI1 13 42 SDRAM3 1 2 R82 10 CLK_SDRAM3 7
R80 33 CLK_LAN PCI1 SDRAM3 SDRAM4 R86 10
16 PCLK_LAN 1 2 15 40 1 2 CLK_SDRAM4 7
R85 33 CLK_SIO PCI2 SDRAM4 SDRAM5 R87 10
14 PCLK_PCM 1 2 16 39 1 2 CLK_SDRAM5 7
R84 33 CLK_1394 PCI3 SDRAM5 R90 10
17 PCLK_1394 1 2 18
R89 33 CLK_MINI PCI4
18 PCLK_MINI 1 2 19 36
R92 33 CLK_EC PCI5 VCH_CLK/(SDRAM7)
27 PCLK_EC 1 2 20
R93 33 PCI6
2 CLK_3V66_AGP 2
9 1 2 AGP_CLK 12
1 2 CLK_USB 25 3V66_AGP 8 CLK_3V66_1 1 2 R79 33
9 CLK_USB_ICH USB(48M) 3V66_1 CLK_HUB_GMCH 4
R98 33 26 7 CLK_3V66_0 R77 33 1 2
DOT(48M) 3V66_0 CLK_HUB_ICH 9
R78 33
1 2 33 38 DCLK 1 2
+3V_CLK TEST#/(VCC3) DCLK/(VCC3) CLK_MEM_GMCH 5
R102 8.2K 1 2 32 34 R94 33 CPU_STP# 9
9,27 SLP_S1# R97 0 PWR_DWN# CPU_STP#(DCLK)
1 2
+3V_CLK R103 10K SDACG
7,9 SDAP4 30
SCKCG SDATA
31
GND
GND
GND
GND
GND
GND
GND
GND
GND
7,9 SCKP4 SCLK
CK133-SOLANO2-M
14
21
24
41
47
48
56
5
6
SEL1 SEL0 PSB SDRAM
TSSOP-56 SA092500000 ICS 9 250AG-31
0 0 66 100
* 0 1 100 100
1 0 133 133
3
1 1 133 100 3
+3V_CLK +3V_CLK
1
R104 R100
@10K
10K
2
SEL0 SEL1
2
R96
1K
1
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, ANDINC.
CONTAINS CONFIDENTIAL AND
Clock Generator
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY E OFCOMPETENT
TH DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR NFORMATION
THE I IT CONTAINS MAY BE B 888M1 1.0
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENTCOMPAL
OF ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 11 of 38
A B C D E F G H
5 4 3 2 1
KSI[0..7]
27 KSI[0..7]
KS0[0..15]
27 KSO[0..15]
JP8
JP11
D
13 R 1 2 CRMA 13 +12V D
1 2 1 2
13 G 3 4 LUMA 13 +3V +3V
3 4 3 4
13 B 5 6 COMPS 13
5 6 5 6
13 HSYNC1 7 8 TV_SYNC 13
9 7 8 10 7 8
13 VSYNC1 9 10 PID0 22 +2.5V 9 10
11 12 KSI0 KSI1
13 DDC_DATA 11 12 PID1 22 11 12
13 14 KSI2 KSI3
13 DDC_CLK 13 14 PID2 22 13 14
13 DDC_MD2 15 16 PID3 22 KSI4 KSI5
15 16 KSI6 15 16 KSI7
13 M_SEN# 17 18 INVT_PWM 27
19 17 18 20 KSO0 17 18 KSO1
+5VALW 19 20 +5VALW 19 20
21 22 +1_5V KSO2 KSO3
27 DAC_BRIG 21 22 ENBKL 27 21 22
23 24 KSO4 KSO5
14,15,16,17,18 CBRST# 23 24 ENVEE 27 23 24
+1_5V 25 26 +1_5V KSO6 KSO7
25 26 C375 KSO8 25 26 KSO9
27 28
29 27 28 30 + KSO10 27 28 KSO11
+1_5VS 29 30 +1_5VS 29 30
31 32 KSO12 KSO13
31 32 22UF_10V_1206 KSO14 31 32 KSO15
9,22,30 SUS_STAT# 33 34 PIRQA# 8,14,18
35 33 34 36 33 34
9 AGP_BUSY# 35 36 PCIRST# 4,8,14,15,16,17,18,20,22,27,30 +3VS 35 36 +5V
4 GREQ# 37 38 GGNT# 4
39 37 38 40 +5VS 37 38
4 ST0 39 40 ST1 4 27 TP_DATA 39 40 TP_CLK 27
4 ST2 41 42 PIPE# 4
41 42
4 RBF# 43 44 WBF# 4 HEADER 2X20
45 43 44 46
SBA0 45 46 SBA1
47 48
SBA2 49 47 48 50 SBA3
49 50
4 SBSTB 51 52 SBSTB# 4
SBA4 51 52 SBA5 +3.3VAUX +3VS_MDC +5VS_MDC
53 54
SBA6 55 53 54 56 SBA7
AGP_CLK 55 56
11 AGP_CLK 57 58
1
C 59 57 58 60 C
59 60 GC/BE#3 4
GAD31 61 62 GAD30 C450 C443 C115
GAD29 61 62 GAD28
63 64
63 64
2
GAD27 65 66 GAD26 1UF_0805 1UF_0805 1UF_0805
GAD25 65 66 GAD24
67 68
69 67 68 70
69 70
4 AD_STBB 71 72 AD_STBB# 4
71 72
73 74 JP13
GAD23 75 73 74 76 GAD22
75 76 25 MD_MIC 1 2 MDC_DN# 28
GAD21 77 78 GAD20
77 78 3 4 MD_SPK 25
GAD19 79 80 GAD18
GAD17 79 80 GAD16 5 6
81 82
81 82 7 8 +5VS_MDC 1
83 84 2 +5VS
4 GC/BE#2 85 83 84 86 9 10 L5 CHB1608U121
85 86 GFRAME# 4 11 12
4 GIRDY# 87 88 GTRDY# 4
89 87 88 90 13 14 1 2
4 GDEVSEL# 89 90 GSTOP# 4 15 16 +3VS
91 92 R112 10K
91 92 GPAR 4 +3.3VAUX 17 18
93 94
4 GC/BE#1 GAD14 95 93 94 96 GAD15 1 2 +3VS_MDC 19 20
95 96 +3VS 21 22 IAC_SYNC 9,25
GAD12 97 98 GAD13 L35 CHB1608U121
97 98 9,25 IAC_SDATAO 23 24
GAD10 99 100 GAD11 1 2
99 100 9,25 IAC_RST# 25 26 IAC_SDATAI1 9
GAD8 101 102 GAD9 R108 22
101 102 27 28
103 104 1 2 IAC_BITCLK 9,25
105 103 104 106 29 30 R106 22
4 AD_STBA 105 106 AD_STBA# 4
107 108 AMP 108-5424
109 107 108 110
9 C3_STAT# 109 110 GC/BE#0 4
GAD7 111 112 GAD6
GAD5 111 112 GAD4
113 114
GAD3 115 113 114 116 GAD2
B
GAD1 115 116 GAD0 B
117 118
119 117 118 120
4 AGP_NBREF 119 120 AGP_VGAREF 4
HEADER 2X60
4 GAD[0..31] GAD[0..31]
SBA[0..7]
4 SBA[0..7]
AGP_CLK
1
R447
@33
12
A A
C580
@22PF
2
1
1 1
3
+5VS
L18
1 2
12 TV_SYNC JP2
@FBM-11-160808-121 L23
12 LUMA 1 2
FBM-11-160808-121 1
2
L21 3
12 CRMA 1 2
FBM-11-160808-121 4
L22 5
1 2 6
12 COMPS 7
FBM-11-160808-121
S CONN._SUYIN
1
1
R179 R178 R180 C207 C206 C208 C178 C180 C179
C186
0_0603 75 75 47PF
75 47PF 47PF 47PF 47PF 47PF @470PF
L19
2
2
2
1 2 TV_GND
2 2
+5VS
CRT Connector
1
10K D7 D6 D5 2 1 1 2
3 3
1
FUSE_1A
2
RB491D
12 DDC_MD2
C169
.1UF
2
DAN217 DAN217 DAN217 JP3
2
CRT-15P
12 M_SEN#
L13 6
11
1 2 1
12 R FCM2012C80_0805 7
L12 12
1 2 2 +12VS +5VS +5VS
12 G FCM2012C80_0805 8
L11 13
1
1 2 3
12 B FCM2012C80_0805 CRT_VCC 9
2
2
@75 @75 @75 15
2
C167 5
2
100PF
1
L10
12 HSYNC1 3 1 1 2 1 3 DDC_DATA 12
2N7002 CHB1608U121
Q21 Q15
2
Q20 L14 2N7002
1
1
2
3 1 1 2 C173
4 12 VSYNC1 220PF
4
CHB1608U121 C166 1 3 DDC_CLK 12
1
220PF
2N7002
2
+12VS
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND CRT&TV-OUT Connector
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THEETENT
COMP
DIVISION OF R&D Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE 888M1
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 13 of 38
A B C D E
A B C D E
15 SLATCH
9,15
15
8
8
RTCCLK
SLDATA
GNT#3
REQ#3
PCM_SPK# 26
8,16,17,18 C/BE#3
1
8,16,17,18 C/BE#2
8,16,17,18 C/BE#1
8,16,17,18 C/BE#0
C154
.1UF
C158
.1UF PCI1420 C161
.1UF
C160
.1UF
2
1 2
11 PCLK_PCM C140 .1UF
1
8,16,17,18 FRAME# R135 S2_VCC
8,16,17,18 DEVSEL# +3V
1 R134 4,8,12,15,16,17,18,20,22,27,30 PCIRST# S1_VCC 1
33
+12VS 1 2
8,16,17,18 TRDY#
1 2
1
8,16,17,18 IRDY# +3V +3V C138 .1UF
12
100K
8,16,17,18 STOP# C162 C153 C157
3 1 8,16,17,18 PERR# CBRST# .1UF .1UF
8,16,17,18 SERR# 10PF CBRST# 12,15,16,17,18
2
Q13 2N7002 8,16,17,18 PAR
2
S1_D[0..15]
W12
M17
G15
G19
C13
N15
A14
A10
A15
B13
E19
E11
B14
A11
F14
F17
F18
15 S1_D[0..15]
M5
C6
C7
C8
D1
U7
C9
B6
A6
A7
B7
E2
A5
E7
F7
F8
F3
S1_A[0..25] +3V
L3
U16
15 S1_A[0..25] S2_D[0..15]
15 S2_D[0..15] S2_A[0..25]
VCCI
VCCA
PAR
IRDY#
DEVSEL#
FRAME#
DATA
VCCP
VCCP
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCB
SERR#
PERR#
RSTIN#
PCLK
C/BE0#
C/BE1#
C/BE2#
C/BE3#
REQ#
CLOCK
LATCH
STOP#
TRDY#
GNT#
SPKOUT
GRST#
15 S2_A[0..25] +3V
1
S2_D0 W10 H14 S1_D0
S2_D1 B_D0/CAD27 A_D0/CAD27 S1_D1 C139 C137
U10 G18
S2_D2 B_D1/CAD29 A_D1/CAD29 S1_D2 1000PF 1000PF
P10 G14
1
B_D2/RSVD A_D2/RSVD
2
S2_D3 H2 U11 S1_D3
S2_D4 J1 B_D3/CAD0 A_D3/CAD0 R11 S1_D4 C146 C156
S2_D5 J3
B_D4/CAD1
B_D5/CAD3
Power A_D4/CAD1
A_D5/CAD3
U12 S1_D5 1000PF 1000PF
2
S2_D6 K1 R12 S1_D6
S2_D7 B_D6/CAD5 A_D6/CAD5 S1_D7
K3 V13
S2_D8 B_D7/CAD7 A_D7/CAD7 S1_D8
V10 H15
S2_D9 R10 B_D8/CAD28 A_D8/CAD28
G17 S1_D9
S2_D10 B_D9/CAD30 A_D9/CAD30 S1_D10
W11 F19
S2_D11 H1 B_D10/CAD31 A_D10/CAD31
P11 S1_D11
S2_D12 B_D11/CAD2 A_D11/CAD2 S1_D12
J2 V12
S2_D13 B_D12/CAD4 A_D12/CAD4 S1_D13
J6 P12
S2_D14 K2 B_D13/CAD6 A_D13/CAD6
W13 S1_D14
S2_D15 B_D14/RSVD A_D14/RSVD S1_D15
K5 U13
2 B_D15/CAD8 A_D15/CAD8 2
S2_A0 R8
B_A0/CAD26
PCI A_A0/CAD26
J19 S1_A0
S2_A1 W7 K14 S1_A1
S2_A2 V7 B_A1/CAD25 A_A1/CAD25
K15 S1_A2
S2_A3 B_A2/CAD24 A_A2/CAD24 S1_A3
W6 K19
S2_A4 V6 B_A3/CAD23 A_A3/CAD23 L15 S1_A4
S2_A5 U6
B_A4/CAD22
B_A5/CAD21
Interface A_A4/CAD22
A_A5/CAD21
L17 S1_A5
S2_A6 V5 L19 S1_A6
S2_A7 U5 B_A6/CAD20 A_A6/CAD20
M15 S1_A7
S2_A8 B_A7/CAD18 A_A7/CAD18 S1_A8
N1 W16
S2_A9 B_A8/CC/BE1# A_A8/CC/BE1# S1_A9
M3 R14
S2_A10 B_A9/CAD14 A_A9/CAD14 S1_A10
L1 W14
S2_A11 M1
B_A10/CAD9 Slot A_A10/CAD9
P14 S1_A11
S2_A12 T1 B_A11/CAD12
B_A12/CC/BE2#
Slot A_A11/CAD12
A_A12/CC/BE2#
N18 S1_A12
S2_A13 N3 R17 S1_A13
S2_A14 B_A13/CPAR A_A13/CPAR S1_A14
P1 N14
S2_A15 B_A14/CPERR# A_A14/CPERR# S1_A15
R130 P5 M14 R128
S2_A16 1 2 SB_A16 P6
B_A15/CIRDY#
B_A16/CCLK
B A A_A15/CIRDY#
A_A16/CCLK
P18 SA_A16 1 2 S1_A16
S2_A17 M6 U15 S1_A17
S2_A18 B_A17/CAD16 A_A17/CAD16 S1_A18
47 N2 T19 47
S2_A19 N6 B_A18/RSVD A_A18/RSVD
P15 S1_A19
Placement near B_A19/CBLOCK# A_A19/CBLOCK# Placement near
S2_A20 N5 R18 S1_A20
to PCMCIA B_A20/CSTOP# A_A20/CSTOP# to PCMCIA
S2_A21 R1 P17 S1_A21
controller S2_A22 B_A21/CDEVSEL# A_A21/CDEVSEL# S1_A22 controller
R2 P19
S2_A23 B_A22/CTRDY# A_A22/TRDY# S1_A23
R3 N17
S2_A24 B_A23/CFRAME# A_A23/CFRAME# S1_A24
W4 N19
S2_A25 B_A24/CAD17 A_A24/CAD17 S1_A25
R6 M18
B_A25/CAD19 A_A25/CAD19
DMAGNT#/MFUNC5
CLKRUN#/MFUNC6
P8 K17
15 S2_REG# B_REG#/CC/BE3# A_REG#/CC/BE3# S1_REG# 15
IRQSER/MFUNC3
S1_RST 15
INTA#/MFUNC0
INTB#/MFUNC1
GND RB751V
C10 IDSEL
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
D2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
PCM_INTB# 1 2
PIRQB# 8
C12
C11
D19
C15
E10
E13
B11
A12
B12
E12
A13
E17
A16
E14
B15
V14
K18
E18
B10
F10
F11
F15
F13
F12
PCI1420-GHK RB751V
G1
G3
G5
G6
G2
H5
H6
C5
E1
E3
A4
E6
B5
B8
A8
E9
B9
A9
P2
P9
E8
F1
F2
F5
F6
F9
J5
S1_A23
PCM_INTA
PCM_INTB#
4 4
1
S1_VCC
R131 22K
R136 S1_WP 1 2
PCM_PME# R132 S1_VCC
100 22K
AD29
AD30
AD31
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
PCM_PME# 27
#
S2_WP 1 2
S2_VCC CLKRUN# 9,16,17,18,22,27
R129 22K PCM1_LED
PCM1_LED 28 Compal Electronics, Inc.
2 AD16
S2_A23 RING# 27
S2_VCC
R127 22K SIRQ 8,22,27
AD[0..31] PCM2_LED Title
8,16,17,18 AD[0..31] PCM2_LED 28
R133 22K
+3V TI 1420
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 2 1 Size Document Number Rev
PCM_SUSP# 27 B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS D3
RB751V
888M1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 14 of 38
A B C D E
PCMCIA POWER CTRL.
CARDBUS
+3V +5V +12V S1_VPP
W=40mils
S1_VPP
S1_VCC
SOCKET
U15 JP19
1
25 8 A77 B77
VCC_5V AVPP C134 a68 b68
9 A76 B76
C135 7 AVCC 10 S1_CD2# A75
a34 b34
B75 S2_CD2#
12V AVCC 14 S1_CD2# a67 b67 S2_CD2# 14
2 1UF_25V_0805 4.7UF_10V_0805 S1_WP S2_WP
2
1 24 11 A74 B74
12V AVCC 14 S1_WP a33 b33 S2_WP 14
A73 B73
GND GND
1 2 C130 1 23 S2_VPP S2_VPP S1_D10 A72 B72 S2_D10
.1UF 5V BVPP S1_D2 a66 b66 S2_D2
2 20 A71 B71
1 2 C129 30 5V BVCC 21 W=40mils S1_D9 A70
a32 b32
B70 S2_D9
5V BVCC S2_VCC a65 b65
.1UF 22 S1_D1 A69 B69 S2_D1
1
BVCC a31 b31
1 2 C128 15 S1_D8 A68 B68 S2_D8
.1UF 3.3V C133 S1_D0 a64 b64 S2_D0
16 6 A67 B67
3.3V RESET a30 b30
1 2 C142 17 14 S1_BVD1 A66 B66 S2_BVD1
3.3V RESET# 14 S1_BVD1 a63 b63 S2_BVD1 14
2
.1UF 4.7UF_10V_0805 A65 B65
GND GND
1 2 C143 14 SLDATA 3 26 S1_A0 A64 B64 S2_A0
.1UF DATA NC S1_BVD2 a29 b29 S2_BVD2
14 SLATCH 5 27 A63 B63
1 2 C136 4 LATCH NC 28
14 S1_BVD2 S1_A1 A62
a62 b62
B62 S2_A1 S2_BVD2 14
.1UF 9,14 RTCCLK CLOCK NC CBRST# S1_REG# a28 b28 S2_REG#
29 A61 B61 S2_REG# 14
13 NC 14 S1_REG# S1_A2 A60
a61 b61
B60 S2_A2
APWR_GOOD# S1_INPACK# a27 b27 S2_INPACK#
19 A59 B59
BPWR_GOOD# 14 S1_INPACK# S1_A3 a60 b60 S2_A3 S2_INPACK# 14
28 OCCB# 18 12 A58 B58
OC# GND A57
a26 b26
B57
+3V S1_WAIT# GND GND S2_WAIT#
1 2 A56 B56
14 S1_WAIT# S1_A4 a59 b59 S2_A4 S2_WAIT# 14
TPS2206AI/TPS2216 A55 B55
R126 S1_RST a25 b25 S2_RST
A54 B54
100K 14 S1_RST S1_A5 a58 b58 S2_A5 S2_RST 14
A53 B53
S1_VS2 a24 b24 S2_VS2
A52 B52
14 S1_VS2 S1_A6 a57 b57 S2_A6 S2_VS2 14
A51 B51
S1_A25 a23 b23 S2_A25
A50 B50
a56 b56
A49 B49
S1_A7 GND GND S2_A7
A48 B48
S1_A24 a22 b22 S2_A24
A47 B47
S1_A12 a55 b55 S2_A12
A46 B46
S1_A23 a21 b21 S2_A23
A45 B45
S1_A15 a54 b54 S2_A15
A44 B44
S1_A22 a20 b20 S2_A22
A43 B43
a53 b53
A42 B42
S1_A16 GND GND S2_A16
A41 B41
a19 b19
A40 B40
S1_VPP a52 b52 S2_VPP
A39 B39
a18 b18
S1_VCC A38 B38
a51 b51 S2_VCC
A37 B37
S1_A21 a17 b17 S2_A21
A36 B36
S1_RDY# a50 b50 S2_RDY#
A35 B35
S1_A[0..25] +3V 14 S1_RDY# S1_A20 a16 b16 S2_A20 S2_RDY# 14
14 S1_A[0..25] A34 B34
S1_D[0..15] S1_WE# a49 b49 S2_WE#
A33 B33
14 S1_D[0..15] S2_A[0..25] 14 S1_WE# S1_A19 A32
a15 b15
B32 S2_A19 S2_WE# 14
14 S2_A[0..25] a48 b48
S2_D[0..15] S1_A14 A31 B31 S2_A14
1
GND GND
2
A19 B19
14 S1_OE# a9 b9 S2_OE# 14
2
S2_VCC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B 888M1 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 15 of 38
5 4 3 2 1
AD[0..31]
8,14,17,18 AD[0..31] U4
AD0 45 50 LAN_EECS
AD1 44 AD0 EECS U29
AD2 AD1 LAN_EEDO
43 47 4 5
AD3 AD2 MA0 LAN_EEDI DO GND +3V
42 48 3 6
AD4 AD3 MA1 LAN_EECLK DI NC
D 41 49 2 7 D
AD5 AD4 MA2 SK NC
39 51 1 8
AD6 AD5 MA3 CS VCC
38 52
1
AD7 AD6 MA4 C220
37 53
AD8 34 AD7 MA5 57 1 2 9346
AD9 33
AD8 MA6/9356SEL
60 R13 @10K +3V .1UF
AD9 MA7
2
AD10 32 61 1 2
AD10 MA8 +3V
AD11 31 63 R10 5.6K
AD12 AD11 MA9
29 64
LAN_IDSEL AD13 28 AD12 MA10 65
AD14 AD13 MA11
27 66
AD15 AD14 MA12
26 67
1
1
2N7002 AD30 AD29 OEB Pulse H0013
121 89
1
AD30 WEB
1
2
8,14,17,18 C/BE#1 24 98
C/BE#1 LED1 +3V
2
C/BE#2 14 97 RJ45_PR
8,14,17,18 C/BE#2
2
1
C/BE#3 LAN_TD+
92
AD23 1 3 1 2 LAN_IDSEL 3 TXD+ 91 LAN_TD- C198 C197 C201
R201 100 IDSEL TXD- .1UF +3V .1UF 0.01UF
2
Q70 23 87 LAN_RD+
8,14,17,18 PAR PAR RXIN+
FDV301 8,14,17,18 FRAME# 15 86 LAN_RD-
FRAME# RXIN-
8,14,17,18 IRDY# 16
17 IRDY# 79 LAN_X1
8,14,17,18 TRDY# TRDY# X1
8,14,17,18 DEVSEL# 19
DEVSEL#
8,14,17,18 STOP# 20
STOP# 78 LAN_X2
X2 D41
8,14,17,18 PERR# 21
22 PERR# 83 1 2 1 2 Q72
8,14,17,18 SERR# SERR# LWAKE +3VS
R181 1K DTA114YKA
JP5
118 95 1 2
E
8 REQ#1 REQ# ISOLATE#
8 GNT#1 117 R176 15K RB751V 3 1 1 2 12
47K
GNT# +3V R452 300_0603 Amber LED+
84 1 2
C
114 RTSET R177 11
8,18 PIRQD#
10K
INTA# 1.69K_1%_0603 Amber LED-
81 16
B
RTT3 SHLD4
9,14,17,18,22,27 CLKRUN# 75 82 8
76 CLKRUN# RTT2 PR4-
15
18,27 LAN_PME# PME# SHLD3
2
4,8,12,14,15,17,18,20,22,27,30 PCIRST# 1 2 54 7
1 R458 2 @0 115 NC 71 ACTIVITY# PR4+
12,14,15,17,18 CBRST# R459 0 RST# NC
72 RJ45_RX- 6
PCLK_LAN NC PR2-
11 PCLK_LAN 116 73
CLK NC 94 5
B NC PR3- B
+3V 1
12 VDD 7 4
VDD GND PR3+
25 18
VDD GND RJ45_RX+
35 30 3
46 VDD GND 40 PR2+
VDD GND Y2 RJ45_TX-
59 55 2
58 VDD GND 56 25 MHz PR1- 14
VDD GND LAN_X1 LAN_X2 RJ45_TX+ SHLD2
106 62 1
VDD GND Q73 PR1+
109 74 13
1
1
119 VDD GND 80 C210 C209 DTA114YKA 10 SHLD1
VDD GND Green LED-
85
E
1 2 LAN_VDD1 77 GND 93 27PF_NPO 27PF_NPO 3 1 1 2 9
+3V +3V
47K
L20 4.7UH VDD GND R453 300_0603 Green LED+
2
2
111
C
LAN_VDD2 GND
1 2 90 112 AMP RJ45/RJ11 with LED
10K
L24 4.7UH VDD GND 113
2
LAN_VDD3 GND
1 2 96 124
L25 4.7UH VDD GND R157 R156
2
RTL8139C
1
1
2
RJ45_PR 1 2 LANGND
+3V
1
C177 C176
1000PF_2KV_1206
.1UF 4.7UF_10V_0805
1
2
PCLK_LAN C12 C10 C17 C27 C244 C33 C32 C18 C13 C11
1
A
.1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF .1UF A
Termination plane should be copled to chas
sis ground
2
2
R16
@22
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THEETENT
COMP
DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE B 888M1 1.0
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 16 of 38
5 4 3 2 1
A B C D E
+3V
+3V
1
RP38 C486 C498 C516 C513 C523 C473 C522 C468 C525
AD[0..31] 1 8
8,14,16,18 AD[0..31] 2 7 .01UF .01UF .01UF .01UF .01UF .1UF .1UF .1UF .1UF
2
+3V 3 6
4 5
8P4R_4.7K
1 +3V 1
U49
TSB43AB22
20
35
48
62
78
87
86
96
10
11
1
C515 C472 C497 C487
VDDP
VDDP
VDDP
VDDP
VDDP
CYCLEIN
CNA
CYCLEOUT/CARDBUS
TEST17
TEST16
15 .1UF .1UF .1UF .1UF
DVDD +3V
2
AD31 22 27
AD30 PCI_AD31 DVDD
24 39
AD29 25 PCI_AD30 DVDD 51
AD28 PCI_AD29 DVDD
26 59
AD27 PCI_AD28 DVDD
28 72
AD26 29 PCI_AD27 DVDD 88
AD25 PCI_AD26 DVDD L40
31 100
AD24 32 PCI_AD25 DVDD 7 1 2
AD23 PCI_AD24 PLLVDD 0_0805 +3V
37 1
1
AD22 PCI_AD23 AVDD +3V
38 2
AD21
AD20
40
41
PCI_AD22
PCI_AD21
TSB43AB22 AVDD
AVDD
107
108
C521 C530
PCI_AD20 AVDD
2
AD19 42 120 .01UF 4.7UF_0805
AD18 PCI_AD19 AVDD
43
AD17 PCI_AD18 PCI BUS INTERFACE
45
AD16 46 PCI_AD17 106 1 2
AD15 PCI_AD16 CPS R399 1K
61
AD14 PCI_AD15
63
AD13 PCI_AD14
65 PHY PORT 2 125 1 2
AD12 PCI_AD13 TPBIAS1 C517 .1UF
66 124
AD11 PCI_AD12 TPA1+ R395 1K
67 123
AD10 PCI_AD11 TPA1-
69 122 1 2
2 AD9 PCI_AD10 TPB1+ 2
70 121 1 2
AD8 PCI_AD9 TPB1- R394 1K
71
AD7 PCI_AD8
74 BIAS CURRENT 118
AD6 PCI_AD7 R0 R385
76
AD5 PCI_AD6 6.34K_1%_0603
77
AD4 PCI_AD5
79
AD3 PCI_AD4
80
AD26 PCI_AD3 C534
1 2 1394_IDSEL AD2 81 119
R398 100 AD1 PCI_AD2 R1
82 1 2
AD0 PCI_AD1
84 OSCILLATOR 6
C/BE#3 PCI_AD0 X0 15PF
8,14,16,18 C/BE#3 34
C/BE#2 PCI_C/BE3 Y5
8,14,16,18 C/BE#2 47
C/BE#1 PCI_C/BE2
8,14,16,18 C/BE#1 60
C/BE#0 73 PCI_C/BE1 5 24.576 MHz C533
8,14,16,18 C/BE#0 PCI_C/BE0 X1
PCLK_1394 16 1 2
11 PCLK_1394 PCI_CLK
GNT#2 18
8 GNT#2 REQ#2 PCI_GNT
19 FILTER 3 1 2 15PF
8 REQ#2 PCI_REQ FILTER0
1394_IDSEL 36 C526 .1UF
FRAME# 49 PCI_IDSEL 4
8,14,16,18 FRAME# PCI_FRAME FILTER1 JP12
IRDY# 50
8,14,16,18 IRDY# PCI_IRDY
TRDY# 52 92 1 2 TPB0- 1
8,14,16,18 TRDY# DEVSEL# 53
PCI_TRDY EEPROM 2 WIRE BUS SDA R363 220 TPB0+ 2
1
8,14,16,18 DEVSEL# PCI_DEVSEL 2
STOP# 54 91 1 2 TPA0- 3
8,14,16,18 STOP# PCI_STOP SCL 3
PERR# 56 R364 220 TPA0+ 4
8,14,16,18 PERR# PCI_PERR 4
PIRQC# 13 POWER CLASS 99
8 PIRQC# PCI_INTA/CINT PC0
1394_PME# 21 98 R335 56.2_1%_0603 C448
27 1394_PME# SERR# PCI_PME/CSTSCHG PC1 Molex SD-54030-0411
8,14,16,18 SERR# 57 97
PAR PCI_SERR PC2 0.33UF_0603
8,14,16,18 PAR 58
PCI_PAR TPBIAS0 R344
9,14,16,18,22,27 CLKRUN# 12 PHY PORT 1 116
3
PCIRST# PCI_CLKRUN TPBIAS0 56.2_1%_0603 TPA0+ 3
4,8,12,14,15,16,18,20,22,27,30 PCIRST# 85 115
PCI_RST TPA0+ TPA0-
114
TPA0- TPB0+
113
TPB0 + TPB0-
112
TPB0 -
94 R362 1 2 220
TEST9 R361 1
95 2 220 R345 R333
TEST8 56.2_1%_0603 5.11K_1%_0603
12,14,15,16,18 CBRST# 14
G_RST 101 R372 1 2 220
TEST3 R378 220
PLLGND1
89 102 1 2
REG_EN
REG18
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
GPIO2 TEST1
AGND
AGND
AGND
AGND
AGND
AGND
AGND
109
110
111
117
126
127
128
103
17
23
30
33
44
55
64
68
75
83
93
8
9
R359 R355
220 220
1
4
@0.1UF @0.1UF C654,C655 4
1
R400 change to 0
@22 ohm to short
to GND
2
D
3 1 1 2 +3V
0
1
G
2
C461 C113
@1UF_25V_0805 @1UF_25V_0805
2
R343
1 2
27 EN_WOL# +5VALW
@100K
JP18
TIP 1 2 RING
1 2
KEY KEY
3 4 1 2 PCIRST#
LAN RESERVED 3 4 PCIRST# 4,8,12,14,15,16,17,20,22,27,30
5 6 R113 0
5 6 MINI_RST#
7 8 1 2 CBRST# 12,14,15,16,17
D39 9 7 8 10 LAN RESERVED R114 @0
RB751V 9 10
11 12
11 12
+3VS_MINIPCI 24,28,30 RFOFF# 1 2 13 14
15 13 14 16
PIRQA# 15 16 W=30mils +5VS_MINIPCI
L6 17 18
1 2 W=40mils8,12,14 PIRQA# 19 17 18 20 PIRQD#
+3V 19 20 PIRQD# 8,16
21 22
CHB1608U121 21 22 W=40mils +3VS_MINIPCI
23 24 +3.3VAUX
0603 25 23 24 26 MINI_RST# L7
11 PCLK_MINI 25 26 W=40mils
27 28 1 2
29 27 28 30
+3V
8 REQ#0 29 30 GNT#0 8
31 32 CHB1608U121
AD31 31 32 0603
33 34
AD29 35 33 34 36 WLANPME# 16,27
35 36 AD30
37 38
AD27 39 37 38 40
AD25 39 40 AD28
41 42
41 42 AD26
43 44
45 43 44 46 AD24 R122
8,14,16,17 C/BE#3 45 46
AD23 47 48 MINI_IDSEL 1 2 AD27
49 47 48 50
AD21 49 50 AD22
51 52
AD19 51 52 AD20 100
53 54
55 53 54 56
55 56 PAR 8,14,16,17
AD17 57 58 AD18
59 57 58 60 AD16
8,14,16,17 C/BE#2 59 60 IDSEL : AD27
61 62
8,14,16,17 IRDY# 61 62
63 64 FRAME# 8,14,16,17
65 63 64 66
9,14,16,17,22,27 CLKRUN# 65 66 TRDY# 8,14,16,17
67 68 STOP# 8,14,16,17 +5VS_MINIPCI
8,14,16,17 SERR# 67 68
69 70
69 70
8,14,16,17 PERR# 71 72 DEVSEL# 8,14,16,17
1
71 72 C119 C159 C155
73 74
8,14,16,17 C/BE#1 AD14 73 74 AD15 C118
75 76
75 76 AD13 @1000PF @.1UF @.1UF @10U_1210
77 78
77 78
2
AD12 79 80 AD11
AD10 79 80
81 82
81 82 AD9
83 84
AD8 85 83 84 86
PCLK_MINI AD7 85 86 C/BE#0 8,14,16,17
87 88
89 87 88 90 AD6
AD5 89 90 AD4
91 92 +3VS_MINIPCI
1
91 92 AD2
93 94
R116 AD3 95 93 94 96 AD0
1
10 W=30mils 95 96 C123 C117 C127 C141 C152
+5VS_MINIPCI 97 98
AD1 99 97 98 100 C112
99 100 .1UF .1UF .1UF .1UF .1UF 10U_1210
101 102
101 102
12
2
103 104
105 103 104 106
C120 105 106
107 108
33PF 109 107 108 110
109 110
2
111 112
111 112
113 114
115 113 114 116
115 116
117 118
119 117 118 120
119 120
121 122
121 122
+5VS 1 2 W=30mils 123 124 W=20mils
+3.3VAUX
L4 0 123 124
1
C116
0603 Mini-PCI SLOT
.1UF
+5VS_MINIPCI
2
@RB751V
CDD[0..15]
CDD[0..15] 20 U46
44
58
9
OZ163
SDD[0..15]
VDD
VDD
VDD
SDD[0..15] 9
SDD0 76 77 CDD0
SDD1 HDD0 CDD0 CDD1
78 79
SDD2 HDD1 CDD1 CDD2
81 82
SDD3 83 HDD2 CDD2 84 CDD3
SDD4 HDD3 CDD3 CDD4
86 87
SDD5 90 HDD4 CDD4 91 CDD5
SDD6 HDD5 CDD5 CDD6
95 96
SDD7 HDD6 CDD6 CDD7
97 98
SDD8 2 HDD7 CDD7 1 CDD8
SDD9 HDD8 CDD8 CDD9
4 3
SDD10 8 HDD9 CDD9 7 CDD10
SDD11 HDD10 CDD10 CDD11
11 10
SDD12 HDD11 CDD11 CDD12
15 14
SDD13 18 HDD12 CDD12 17 CDD13
SDD14 HDD13 CDD13 CDD14
20 19
SDD15 22 HDD14 CDD14 21 CDD15
HDD15 CDD15 +5VCD
74 75 CD_IRQ 8P4R-10K
X3 8 IRQ15 HINTRQ CHINTRQ CD_IRQ 20
SDDREQ 12 13 CD_DREQ
9 SDDREQ HDMARQ CDMARQ CD_DREQ 20
OSC1 OSC2 SDDACK# 88 89 CD_DACK# RP32
9 SDDACK# HDMACK# CHDMACK# CD_DACK# 20
PLAYBTN# 1 8
REVBTN# 2 7
8MHZ
24 23 CD_RSTDRV# FRDBTN# 3 6
R309 20 SIDE_RST# HRESET# CRESET# CD_RSTDRV# 20
59 60 CDASPN OZ_STOPBTN# 4 5
HDASPN CDASPN
48 47 8P4R-10K
HSYNC SSYNC
1M 53 52
HBIT_CLK SBIT_CLK RP37
55 54
50 HDATA_OUT SDATA_OUT 49 CDD3 1 16
C397 C398 HDATA_IN SDATA_IN CDD1
46 45 2 15
HACRSTN SACRSTN 1 2 CDD2 3 14
10PF 10PF +5VCD
DM_ON 28 R305 @10K CDD0 4 13
PLAYBTN# PAV_EN CDD4
30 PLAYBTN# 36 51 1 2 5 12
FRDBTN# 35 PLAY/PAUSE PWR_CTL CDD6 6 11
30 FRDBTN# FFORWARD R306 10K
REVBTN# 34 1 2 CDD5 7 10
30 REVBTN# REWIND MEDIA_DETECT 28
OZ_STOPBTN# 37 80 1 2 ISCDROM R427 0 CDD7 8 9
STOP/EJECT ISCDROM R424 @0
39 GPIO_1 16P8R_4.7K
C111 10UF_1206_10V DM_ON 29
GPIO[1]/VOL_UP
40 GPIO_0
PCSYSTEM_OFF GPIO[0]/VOL_DN ** N o stuff R427 when stuff OZ163
R316 10K INTN 25 ** No stuf f R424 and R320 when stuff OZ168 RP36
28 CD_INTA# INTN R320 @1K CDD8
1 2 30 8 9
+5VCD RESET# CDD9
56 1 2 7 10
D33 MODE0 MODE1 CDD10
57 6 11
1 2 1 3 26 MODE1 CDD11 5 12
2,27,34 EC_SMD2 SDATA
Q32 CDD12 4 13
2N7002 38 1 2 CDD13 3 14
RB751V PAVMODE CDD14
27 R310 10K 2 15
SCLK
2
1 3 41 CDD15 1 16
2,27,34 EC_SMC2 CSN
42
1
1 2
GND
GND
GND
GND
GND
16
33
65
85
92
+5VCD
R308 CIOCS16# 1 2
+5VCD +5VCD R339 47K
100K
CDD7 1 2
C107 C415 R117 10K
10U_1206 1UF_0805 U11 R99 DM_ON CD_DREQ 1 2
DM_ON 25
1 8 100K R111 5.6K
+5VALW
1
S D C106 C409 Q6
2 7
R307 240K S D 10U_1206 .1UF SUSP#
3 6 2
S D 2N7002
1 2 4 5
+5VALW G D DM_ON#
DM_ON# 25
SI4425DY
3
1
C407 Q7
1 2 DM_ON 2
2N7002
1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, April 26, 2001 Sheet 19 of 38
+5VS
IDE,CD-ROM Module CONN.
C82
1
C81 C381
C387
1000PF 10U_1210 1UF_25V_0805 .1UF
2
Place component's closely IDE CONN. +5VCD Q10 +5VMOD
SI3456DV
6
5 4
JP7 2
1
PIDE_RST# 1
PDD7 1 2 PDD8 + C125 R115
PDD6 3 4 PDD9 4.7UF_A
5 6
3
PDD5 PDD10 <1st Part Field> 1K
PDD4 7 8 PDD11 +12VALW
2
9 10
2
PDD3 PDD12
PDD2 11 12 PDD13 R366
PDD1 13 14 PDD14 2 1
PDD0 15 16 PDD15 1
Q8
1
17 18
100K DTC144EKA 2 EXTIDE_EN#
19 20 3
9 PDDREQ 21 22 Q39
9 PDIOW# 23 24 47K
2 2N7002
28 EXTIDEPWR#
1
9 PDIOR# 25 26 PCSEL R338 1K
1 2
9 PDIORDY 27 28 R242 470 C122
9 PDDACK# IRQ14 29 30 .01UF
8 IRQ14 47K
1
PDA1 31 32 Q40
2
9 PDA1 33 34
PDA0 PDA2 2
9 PDA0 35 36 PDA2 9 9 SYSIDEPWR
3
9 PDCS1# PDCS1# PDCS3# PDCS3# 9 2N7002
37 38
28 PHDD_LED# 39 40
3
+5VS 41 42 +5VS
1 2
+5VS R276 100K 43 44
SI3456DV: N CHANNEL
HDD 44P SUYIN 20225A-44G5-A
VGS: 4.5V, RDS: 65 mOHM
1 2 SHDD_LED# Id(MAX): 5.1A
+5VMOD
R371 100K VGS,+-20V
PDD[0..15]
9 PDD[0..15]
CDD[0..15]
19 CDD[0..15]
JP17
25 INT_CD_L 1 2 INT_CD_R 25
CD_AGND CD_AGND
25 CD_AGND 3 4
CD_RSTDRV# CDD8
19 CD_RSTDRV# 5 6
CDD7 CDD9
CDD6 7 8 CDD10
CDD5 9 10 CDD11
CDD4 11 12 CDD12
CDD3 13 14 CDD13
CDD2 15 16 CDD14
CDD1 17 18 CDD15 +5VS
CDD0 19 20 C212
21 22 CD_DREQ 19
CD_SIOR# 19 2 1
23 24
19 CD_SIOW# 25 26 CD_DACK# 19
0.1UF U25
19 CD_SIORDY CD_SBA2 19
5
27 28
19 CD_IRQ 29 30 CD_SCS3# 19
EXTID0 PCIRST# 1
19 CD_SBA1 31 32 EXTID0 28 4,8,12,14,15,16,17,18,22,27,30 PCIRST#
EXTID1 4 PIDE_RST#
19 CD_SBA0 33 34 EXTID1 28
EXTID2 2
19 CD_SCS1# 35 36 EXTID2 28 8 PIDERST#
SHDD_LED# HDSEL#
28 SHDD_LED# 37 38 HDSEL# 22
EXTCSEL
39 40
3
WGATE# 7SH08FU
41 42 WGATE# 22
RDATA# 43 44
22 RDATA# 45 46
22 WP# WP#
TRACK0# 47 48 FDDIR#
22 TRACK0# 49 50 FDDIR# 22
WDATA# 3MODE#
22 WDATA# 51 52 3MODE# 22
STEP#
22 STEP# 53 54 +5VS
MTR0#
22 MTR0# 55 56 C572
22 DSKCHG# DSKCHG# INDEX# INDEX# 22
DRV0# 57 58
22,28 DRV0# +5VMOD 2 1
59 60
HEADER 2X30 0.1UF U54
5
PCIRST# 1
+5VS +3VALW 4 SIDE_RST#
SIDE_RST# 19
RP17 RP15 2
8 SIDERST#
8 1 DSKCHG# 1 8 EXTID0
7 2 INDEX# 2 7 EXTID1
3
6 3 WP# 3 6 EXTID2 7SH08FU
5 4 TRACK0# 4 5
8P4R_1K 8P4R-100K
1 2 DRV0#
R120 1K
RP16
WDATA# 6 5 +5VS
WGATE# 7 4 STEP#
HDSEL# 8 3 MTR0#
FDDIR# 9 2 RDATA# W=80mils
+5VMOD
+5VS 10 1
1
Title
1 2 EXTCSEL IDE/ FDD MODULE CONN.
R119 470 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Place component's closely CD-ROM CONN. Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B 888M1 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 20 of 38
5 4 3 2 1
X4 +3VS +5VS
MS_X1 MS_X2
Q71
SI2301DS
8MHZ
1
D
2
1
R438 1M G C578
1
S C582
C573 C574 Q74 R446 4.7UF_0805 Q75
3
+5VS
2
15PF 15PF SI2301DS SI2301DS 4.7UF_0805
3
S S
D G G D
SM_3VON# 2 @0_0805 2 SM_5VON#
2
1
1
D D
1
R455 R456 F5
U47 1 2 SMC_VCC
46 22 MS_X1 @4.7K @4.7K
USB_GND OSCIN MS_X2 FUSE_0.5A
1 2 47 24
1
R439 1.5K USB_VCC OSCOUT U55
2
9 USB2_D+ 50
1
51 USB_DP 20 5 4 R454
9 USB2_D- USB_DM SDA/P60 SDA GND
19 6 3 C579
SCL/P61 SCL A2 470
1 2 35 18 7 2
+5VS #RESET WKUP12/P62 WC A1
2
R440 16 8 1 1UF_0603
1
2
45 15 1 2 Q76
DSN AIN2/P64 C583 @.1UF
14 2N7002
1
1UF_0603 SM_FD7 AIN3/P65 @NM24C02
4 13
D7/P07 AIN4/P66
2
SM_FD6 5 12 2 SMCD#
SM_FD5 6 D6/P06 AIN5/P67
SM_FD4 D5/P05
7 34
D4/P04 INT1/P50
3
SM_FD3 8 31
SM_FD2 D3/P03 INT4/P51
9 30
SM_FD1 D2/P02 INT3/P52
10 29
SM_FD0 11 D1/P01 INT2/P53 28 SM_R/B
D0/P00 WKUP8/P54 SM_FWE#
27
60 INT0/P55 26 SM_LVD 1 2
SM_3VON# A15/P17 WKUP9/P56 SM_5VON# R443 100K
61 25
SM_CE#0 A14/P16 NMI/P57
62
SM_FALE 63 A13/P15 55
SM_FCLE A12/P14 P40 SMCD#
64 54 1 2 +5VS
C 1 A11/P13 P41 53 SM_FWP# R444 4.7K C
A10/P12 P42
2 52
+5VS A9/P11 P43
3
A8/P10 44
SOUT/P30
1 2 17 43
R445 4.7K 36 AVDD P31 42
VPP CLKOUT/P32
56 41
VDD RXCLK/P33
21 40
VDD WKUP4/P34 39
SIN/P35 JP14
57 38
23 VSS WKUP6/P36 37 12
SM_LED 30
1
48 59 14
NC NC Q_FD3 9
I/O5
ST92163/TQFP Q_FD6 I/O3
15
Q_FD2 I/O6
8
Q_FD7 I/O2
16
Q_FD1 I/O7
7
Q_LVD I/O1
17
+5VS Q_FD0 LVD
6
I/O0
18
1
5
4.7K Q_FRE# WE#
20
U57 RD#
2
2 1 15 48 4 Q_CE#0 21
B +5VS VCC OE1# SM_3VON# Q_FCLE CE# B
1 47 2 2
NC OE2# CLE
1N4148 SMC_VCC 22
SM_FD4 Q_FD4 VCC
2 46 1
1A1 1B1 VSS
3
SM_FD5 3 45 Q_FD5 23
SM_FD3 4 1A2 1B2 44 Q_FD3 1 2 24 GND
1A3 1B3 SMC_VCC WPRO#
SM_FD6 5 43 Q_FD6 R317 100K
SM_FD2 6 1A4 1B4 42 Q_FD2
1A5 1B5 SmartMedia Slot
SM_FD7 7 40 Q_FD7
SM_FD1 1A6 1B6 Q_FD1
9 39
SM_LVD 10 1A7 1B7 38 Q_LVD
SM_FD0 1A8 1B8 Q_FD0
11 37
SM_FWP# 12 1A9 1B9 36 Q_FWP#
1A10 1B10
SM_R/B 13 35 Q_R/B
SM_FWE# 14 2A1 2B1 34 Q_FWE#
SM_FRE# 2A2 2B2 Q_FRE#
16 33
SM_FALE 18 2A3 2B3 31 Q_FALE
SM_CE#0 2A4 2B4 Q_CE#0
19 30
SM_FCLE 2A5 2B5 Q_FCLE
20 29
21 2A6 2B6 28
2A7 2B7
22 27
23 2A8 2B8 26
2A9 2B9
24 25
2A10 2B10
8 41
GND GND
17 32
GND GND
FST16210
A A
LAD[0..3] LPD[0..7]
9,27 LAD[0..3] LPD[0..7] 23
U24
LAD0 20 68 LPD0
LAD1 21 LAD0 PD0/INDEX# 69 LPD1
LAD2 LAD1 PD1/TRK0 LPD2
22 70
LAD3 LAD2 PD2/WRTPRT# LPD3
23 71
LAD3 PD3/RDATA# 72 LPD4
PD4/DSKCHG# LPD5
9,27 LFRAME# 24 73
25 LFRAME# PD5 74 LPD6
9 LDRQ#1 LDRQ# PD6/MTR0# LPD7
75
PD7
4,8,12,14,15,16,17,18,20,27,30 PCIRST# 26
27 PCIRST# 79 LPTBUSY
9,12,30 SUS_STAT# LPCPD# BUSY/MTR1# LPTBUSY 23
78 LPTPE
1 2 50 PE/WDATA# 77 LPTSLCT LPTPE 23
+3VS R167 10K GPIO12/IO_SMI# SLCT/WGATE# LPTERR# LPTSLCT 23
1 2 17 81
R198 10K IO_PME# ERROR#/HDSEL# LPTACK# LPTERR# 23
8,14,27 SIRQ 30 80
28 SIRQ ACK#/DS1# 66 LPTACK# 23
9,14,16,17,18,27 CLKRUN# CLKRUN# INIT#/DIR# INIT# 23
PCLK_SIO 29 82 RP1 +3VS RP3 +3VS
11 PCLK_SIO PCICLK AUTOFD#/DRVDEN0# LPTAFD# 23
83 LPTSTB# 23
14.3M_SIO STROBE#/DS0# DCD#1 CTS#2
19 67 SLCTIN# 23 1 8 1 8
11 14.3M_SIO CLK14 SLCTIN#/STEP# RI#1 DSR#2
2 7 2 7
48 100 CTS#1 3 6 DCD#2 3 6
12 PID0 GPIO10 DTR2#
54 99 CTS#2 DSR#1 4 5 RI#2 4 5
2
12 PID1 GPIO15 CTS2# 2
12 PID2 55 98
GPIO16 RTS2# DSR#2
12 PID3 56 97 8P4R-4.7K 8P4R-4.7K
GPIO17 DSR2#
2 17V/16V# 57 96
58 GPIO20 TXD2 95 1 2
GPIO21 RXD2 DCD#2 R188 1K +5V
59 94
6 GPIO22 DCD2# 92 RI#2
GPIO24 RI2#
32 JP24
GPIO30 DTR#1
33 89
34 GPIO31 DTR1# 88 CTS#1 1
GPIO32 CTS1# RTS#1 1
35 87 2
36 GPIO33 RTS1# 86 DSR#1 RXD1 3
2
GPIO34 DSR1# TXD1 TXD1 3
37 85 4
GPIO35 TXD1 RXD1 DSR#1 4
38 84 1 2 5
39 GPIO36 RXD1 91 DCD#1 R175 1K RTS#1 6 5
GPIO37 DCD1# RI#1 CTS#1 6
40 90 7
41 GPIO40 RI1# DTR#1 8 7
GPIO41 RI#1 8
42 63 IRMODE 23 9
GPIO42 IRMODE/IRRX3 DCD#1 9
43 61 IRRX 23 10
44 GPIO43 IRRX2 62 10
GPIO44 IRTX2 IRTXOUT 23
45
46 GPIO45 16 RDATA# @96212-1011S
GPIO46 RDATA# WDATA# RDATA# 20
47 10 WDATA# 20
GPIO47 WDATA# WGATE#
11 WGATE# 20
WGATE# HDSEL#
1 2 51 12 HDSEL# 20
R166 10K GPIO13/IRQIN1 HDSEL# FDDIR#
52 8 FDDIR# 20
1 2 64 GPIO14/IRQIN2 DIR#
9 STEP#
R164 10K GPIO23/FDC_PP STEP# DRV0# STEP# 20
5 DRV0# 20,28
DS0# INDEX#
18 13 INDEX# 20
14.3M_SIO PCLK_SIO +3VS VTR INDEX# 4 DSKCHG#
3 DSKCHG# DSKCHG# 20 3
53 15 WP#
WP# 20
2
65 VCC WRTPRT#
14 TRACK0#
R197 R189 VCC TRK0# MTR0# TRACK0# 20
93 3 MTR0# 20
VCC MTR0#
1 3MODE# 20
1
21
76 49 1 2
C222 C215 VSS GPIO11/SYSOPT R168 1K
15PF 22PF
Base I/O Address
1
SMsC LPC47N227
* 0 = 02Eh
1 = 04Eh
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND SUPER I/O
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THEETENT
COMP
DIVISION OF R&D Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE 888M1
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 22 of 38
A B C D E
FIR Module +3VS
1
+3VS
R1 R457
FIR_VCC 4.7_1206 4.7_1206
1
1/4W + C163
1
U1
2
C1 C2
10UF_1206
+ 1 10 W=40mils 10UF_1206
0.47UF_0603 VCC LEDA
2
7 2
GND AGND
1 2 4 9 IRTXOUT
MODE0 TXD IRTXOUT 22
R141 10K
1 2 5 8 IRRX
MODE1 RXD IRRX 22
R142 10K
3 6
FIR_SEL N.C
IRMODE
22 IRMODE
HSDL-3600
+5V_PRN
LPTSLCT
LPTPE
PARALLEL PORT
LPTBUSY
LPTACK#
+5V_PRN
10
9
8
7
6
CP4
RP18 AFD#/3M# 1 8
10P8R-2.7K D8 LPTERR# 2 7
2 1 LPTINIT# 3 6
+5VS LPTSLCTIN# 4 5
RB420D
R139 8P4C-220PF
2.2K C164 CP1
1
2
3
4
5
220PF LPTSLCT 4 5
+5V_PRN R140 LPTPE 3 6
LPTSTB# LPTBUSY 2 7
AFD#/3M# 22 LPTSTB# LPTACK# 1 8
LPTERR# AFD#/3M# 33
LPTINIT# 8P4C-220PF
LPTSLCTIN# R138 1 CP3
R2 14 FD0 1 8
22 LPTAFD# FD0 FD1
33 33 2 2 7
1 2 LPTINIT# LPTERR# 15 FD2 3 6
22 INIT# 22 LPTERR# FD1 FD3
3 4 5
+5V_PRN R3 LPTINIT# 16
1 33 2 LPTSLCTIN# FD2 4 8P4C-220PF
FD4 22 SLCTIN# LPTSLCTIN# 17 CP2
FD5 FD3 5 FD4 1 8
FD6 18 FD5 2 7
FD7 FD4 6 FD6 3 6
19 FD7 4 5
FD5 7
8P4C-220PF
10
20
9
8
7
6
RP21 FD6 8
RP19 LPD0 1 8 FD0 21 JP4
10P8R-2.7K LPD1 2 7 FD1 FD7 9
LPD2 3 6 FD2 22 LPTCN-25
LPD3 4 5 FD3 LPTACK# 10
22 LPTACK#
23
8P4R-68 RP20 LPTBUSY 11
22 LPTBUSY
LPD7 1 8 FD7 24
1
2
3
4
5
+5VS +5VS
1
C395 + C569 +
POLYSWITCH_0.75A POLYSWITCH_0.75A
1
C100 C568
R298 .1UF 150UF_E R422 .1UF 150UF_E
2
470K USB_AGND 470K USB_CGND
2
9 OVCUR#0 9 OVCUR#3
1
C406 R303 C570 R423
2
2
2
JP9
L29 L42
0_0805 1 0_0805
USB0_D- 1 2 USB3_D- 1 2
9 USB0_D- 2 9 USB3_D-
9 USB0_D+ USB0_D+ 1 2 9 USB3_D+
USB3_D+ 1 2
L28 3 L43
0_0805 4 0_0805
SUYIN USB Connector 2569A-04G3T-B
1
1
1
L30 L44
CHB4516G750_1806 C393 CHB4516G750_1806 C571
4516 4516
2
.1UF .1UF
USB_VCCB
F1
+5VS
1
C181 +
POLYSWITCH_0.75A
1
C3
R146 .1UF 150UF_E
2
470K USB_BGND
2
9 OVCUR#1
1
C183 R145
2
1000PF 560K JP1
1
2
2
3
L16 4
0_0805 5
USB1_D- 1 2
9 USB1_D- 6
USB1_D+ 1 2
9 USB1_D+ 7
L15
0_0805 8
SUYIN 2553A-0BG5T-A
1
L17
CHB4516G750_1806 C182
4516
.1UF
2
1
+5VALW +3VALW R121
@100K
2
JP15
1
2
R123 C132 28 BT_DETACH
@100K 1 2
@.1UF 28 BT_WAKE_UP 3 4
5 6
2
3 9 USBBT_D+ 7 8
1
2 9 USBBT_D-
1 9 10
Q11 11 12
28 BT_RESET#
1
C131 @SI2301DS 13 14
15 16
BT_VCC BT_VCC 17 18
@.1UF
ANT_SW 28
1
19 20
2
C126
1
2 22K C121
18,28,30 RFOFF#
Q9
+ @.1UF
@HRS DF15-08-20DS-065V
2
22K @4.7UF_1206
@DTC124EK
10V
2
3
1
C414 C408 2 6 1UF_25V_0805 Q46 Q47
1
DELAY SENSE C405 2N7002 2N7002
2
4.7UF_10V_0805 .1UF 7 1
ERROR CNOISE input to AMPLIFY
2
2
4.7UF_10V_0805
2
8 3
1
ON/OFF# GND C402 C499
SI9182 R_INT_CD_R 3 1 1 3 RIGHT
20 INT_CD_R
.1UF
2
1UF_25V_0805 Q45 Q49
2N7002 2N7002
2
DM_ON
19 DM_ON
+5VAMP_PU
R369 R370
0 10K
1 2 2 1 R_INT_CD_L 3 1 1 3 CDROM_L
+3VS
1
Q51 Q44
R374 2N7002 2N7002
2
@10K
C488
10UF_10V_1206 input to CS 4297A
2
R375
AVDD_AC97 10K
L32 2 1 R_INT_CD_R 3 1 1 3 CDROM_R
VDDC +5VAMP_PU
1 2
1
VDDA Q48 Q52
CHB2012U170 R328 R376 2N7002 2N7002
@10K
2
1 2 +3VS
0_0603
1
C413 C449 C437
1
4.7UF_10V_0805
2
.1UF C426
.1UF
4.7UF_10V_0805
2
2
2
2
DM_ON#
19 DM_ON#
25
38
9
U45 C416
2 1 1000PF
AVCC
AVCC
VCC
VCC
C423
2 1 AUD_VREF 1 2 1000PF
R349 6.8K C410
2 1 14 35 LINEL 1 2 4.7UF_10V_0805 LEFT
AUX_L LINE_OUT_L LEFT 26
R346 6.8K C403
15 36 LINER 1 2 4.7UF_10V_0805 RIGHT
AUX_R LINE_OUT_R RIGHT 26
2 1 C400
26 LINE_IN_L
R357 6.8K 16 37 1 2 1UF_10V_0805
VIDEO_L MONO_OUT MD_MIC 12
2 1 C412
26 LINE_IN_R
R347 6.8K 17 39 2 1 1000PF
VIDEO_R HP_OUT_L
2 1
R342 6.8K 1 2 23 41
C466 1UF_25V_0805 LIN_IN_L HP_OUT_R
2 1
R356 6.8K 1 2 24 R319
C460 1UF_25V_0805 LIN_IN_R
6 1 2 22 IAC_BITCLK 9,12
CDROM_L CD_L_R 1 BIT_CLK R321
2 1 2 18
R354 20K C457 1UF_25V_0805 CD_L 8 1 2 22
SDATA_IN IAC_SDATAI 9
CDROM_R 2 1 CD_R_R 1 2 20
R358 20K C458 1UF_25V_0805 CD_R 2 C422
CD_GNA 1 XTL_IN 22PF NPO
2 19
C465 1UF_25V_0805 CD_GNA Y4
MIC 1 2 21
26 MIC MIC1 24.576 MHz
C581 1UF_25V_0805
1 2 2 1 22 3
C452 1000PF R341 2.4K AUD_VREF MIC2 XTL_OUT C447
1 2 2 1 1 2 13 29 1 2 22PF NPO
12 MD_SPK PHONE AFLT1
C464 1UF_25V_0805 R340 10K C451 1UF_25V_0805 C435
12 30 1000PF NPO 1 2
26 MONO_IN PC_BEEP AFLT2 C433
28 1000PF NPO 1 2
VREFOUT AUD_VREF
2 1 11 R348 0
9,12 IAC_RST# RESET#
R331 100 27
REFFLT
9,12 IAC_SYNC 10
SYNC 32
FLT3D
9,12 IAC_SDATAO 5
1
SDATA_OUT
1
45 31
ID0# BPCFG C439 C444
46 33
1
ID1# FLTI
2
34 .1UF 1UF_25V_0805
FLTO C431
2
47 43
26 EAPD EAPD# NC R334 .01UF AUD_VREF
44
NC
2
48 @100K L31 0_0805
1
S/PDIF_OUT C429
40 1 2
NC
4 26 1
GND AGND 1000PF NPO L36 0_0805
7 42
GND AGND
2
1 2
1
C454
CS4299A L37 0_0805 C459
1 2 .1UF 4.7UF_10V_0805
2
2 1 CD_GNA
20 CD_AGND
R352
3.3K
1
ETENT
COMP
DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE B 888M1 1.0
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 25 of 38
A B C D E
+5VCD
AMP & Audio Jack
1
+5VCD R390
2
SHUTDOWN# INTSPK_R2
1
C474 C507 INTSPK_L1 2
3
1 Q50 INTSPK_L2
.1UF 4.7UF_10V_0805 4
4 2 EAPD 25 4
2
3 ACES 85205-0400
2N7002
U48
7 22
18 PVDD SHUTDOWN# 15 NBA_PLUG 2 1
PVDD SE/BTL# +5VCD
19 14 C505 1 2 R382 100K
R368 100K VDD PC-BEEP .1UF
11
1 2 2 BYPASS 9 INTSPK_L2
PC-ENABLE LOUT- INTSPK_R2
3 16
27 VOL_AMP INTSPK_L1 4 VOLUME ROUT- 10
INTSPK_R1 LOUT+ LIN
21 8
U3-5 ROUT+ RIN
1 2 5
25 LEFT C476 .47UF_0603 U3-23 23 LLINEIN 1
1
U3-6 RLINEIN GND C469 C471 C470
1 2 6 12
25 RIGHT U3-20 20 LHPIN GND 13
C509 .47UF_0603 RHPIN GND .47UF_0603.47UF_0603
.47UF_0603
24
GND
2
C475 .47UF_0603 17
1 2 CLK
C506 JP20
1
1 2 TPA0132 5
2
C477 FBM-11-160808-700T
25 LINE_IN_R 1 2 3
3 .1UF L9 6 3
2
25 LINE_IN_L 1 2 2
L8 1
FBM-11-160808-700T
1
C149 C151
PHONEJACK
330PF 330PF
2
JP23
5
C494 NBA_PLUG 4
150UF_D L38
+ +
+3V +3V INTSPK_R1 1 2 1 2 1 2 INTSPK_R1-3 3
27 BEEP# R396 47 FBM-11-160808-700T 6
VDDA INTSPK_L1 1 2 1 2 1 2 INTSPK_L1-3 2
1
1
100K 150UF_D C541 C150
.1UF R350 PHONEJACK
10K 330PF 330PF
4
2
14 U36A
C514 R392
2
5 6 1 2 1 2 1 2 1 2
R284 8.2K 560
1
2 2
7 74LVC14 1UF_10V_0603 C489
1
74LVC125 .22UF_0603
2
AVDD_AC97
C453
2
1 2 MONO_IN R388
MONO_IN 25
18K_1%_0603 1
C502 R387 1 1UF_10V_0603 1 2 2 Q53
2
1 2 1 2 2 AVDD_AC97 3 2SC2411EK
1
14 PCM_SPK#
3 Q43 R332 1 2
1
1UF_10V_0603 560 2SC2411EK 2.4K R381 C527
18K_1%_0603
1
1
2
1UF_10V_0603 R402
+3V R389
2
100K_1%_0603 2.2K JP21
5
2
4 EXT.
14 U36B
C501 3
3 4 1 2 1
R386
2 6 MICPHONE
9 SPKR
74LVC14 1UF_10V_0603
560 25 MIC
MIC 1
L41
2 2 JACK
7 1
+3V POWER FBM-11-160808-700T
1
1
R391 C540 PHONEJACK
1
10K D35 220PF 1
2
RB751V
2
+3VALW 1 2
+3VALW R48 0 +3VALW 51AVCC +RTCVCC KBA[0..18] 1 2
51VDD 28 KBA[0..18] ADB[0..7] +3V R204 10K
+3VS 1 2
R47 @0 28 ADB[0..7] KSI[0..7]
12 KSI[0..7]
1
1
C242 C391 C313 C241 C239 C73 C48 KSO[0..15] MMO_ON 1 2
12 KSO[0..15] VR_ON 29,37
123
136
157
166
161
.1UF .1UF .1UF .1UF 1000PF 1000PF .1UF D18 RB751V
16
34
45
95
U32
2
2
2 1
AVCC
VDD
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VBAT
KBA0 +3VS R31 10K
124
INVT_PWM 32 IOPH0/A0/ENV0 125 KBA1
51AVCC +3VALW 12 INVT_PWM IOPA0/PWM0 IOPH1/A1/ENV1 KBA2 ATFOUT# 1
26 BEEP# 33 126 2 ATF_INT# 9
+RTCVCC L45 For PWM EN_D
FAN IOPA1/PWM1 IOPH2/A2/BADDR0 KBA3
36 127
IOPA2/PWM2 IOPH3/A3/BADDR1 KBA4 D23 RB751V
D 1 2 33 ACOFF 37 128 D
CHB1608U800 IOPA3/PWM3 IOPH4/A4/TRIS KBA5
9 LLBATT# 38 131
1
143
EC_URXD IOPK0/A8 KBA9
153 142
EC_UTXD 154 IOPB0/URXD IOPK1/A9 135 KBA10
EC_USCLK IOPB1/UTXD IOPK2/A10 KBA11
18 EN_WOL# 162 134
EC_SMC1 163 IOPB2/USCLK IOPK3/A11 130 KBA12
28,34 EC_SMC1 IOPB3/SCL1 IOPK4/A12
EC_SMD1 164 129 KBA13
28,34 EC_SMD1 IOPB4/SDA1 IOPK5/A13/BE0
165 121 KBA14
4,8,12,14,15,16,17,18,20,22,30 PCIRST# IOPB7/RING#/PFAIL# IOPK6/A14/BE1
+3VS 120 KBA15
IOPK7/A15/CBRD
9 PBTN_OUT# 168
EC_SMC2 169 IOPC0 113 KBA16
2,19,34 EC_SMC2 IOPC1/SCL2 IOPL0/A16
EC_SMD2 170 112 KBA17
2,19,34 EC_SMD2
2
75 IOPJ5/PFS# 173
34 A/B#USE IOPJ6/PLI SEL0# FSEL# 28
1 2 R28 76 174
+12V 9,11 SLP_S1# IOPJ7/BRKL_RSTO# SEL1#
R137 100K 10K
34 BATT_TEMPA BATT_TEMPA 81 148 SYSON SYSON 29
2
2
JP25 G20 IOPD3/ECSCI# CRY1 20M_0603 IRE 0 0 0
5 158
1 RCL# 6 GA20/IOPB5 32KX1/32KCLKOUT R214 * OBD 0 1 0
1 +3VALW KBRST#/IOPB6
2 EC_TINIT# 160 CRY2 510K DEV 1 0 0
2 3 EC_TCK 18 32KX2 PROG 1 1 0
3 11 PCLK_EC LCLK
AGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7
NC10
4 EC_TDO 47 X1
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
4 CLK
1
A 5 EC_TDI SHBM(KBA5)=1: Enable shared memory w ith host BIOS A
5 EC_TMS
6 TRIS(KBA4)=1: While in IRE and OBD, float all the
1
6
122
137
159
167
96
11
12
20
21
85
86
91
92
97
98
2
EC_USCLK L27
10
10
ECAGND 1 2
Compal Electronics, Inc.
CHB1608U800
@96212-1011S Title
EC PC87591
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THEETENT
COMP
DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE B 888M1 1.0
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 27 of 38
5 4 3 2 1
+3VALW .1UF
C213 +5VALW
1 2 C195
1 2
.1UF
20
20
U27
2 18 ADB0 U22
VCC
30 BUTTON1# 1A1 1Y1
4 16 ADB1 +3VALW ADB0 3 2
VCC
30 INTERNET# 1A2 1Y2 D0 Q0 EXTIDEPWR# 20
6 14 ADB2 RP2 +3VALW ADB1 4 5
19 CD_INTA# 1A3 1Y3 C214 D1 Q1 MDC_DN# 12
PCM_LED 8 12 ADB3 ADB2 7 6
1A4 1Y4 D2 Q2 BT_DETACH 24
11 9 ADB4 DD 1 8 1 2 ADB3 8 9 1 2
20 SHDD_LED# 2A1 2Y1 D3 Q3 RFOFF# 18,24,30
20 PHDD_LED# 13 7 ADB5 AA 2 7 ADB4 13 12 R433 @0 BT_RESET# 24
2A2 2Y2 ADB6 BB ADB5 D4 Q4
20,22 DRV0# 15 5 3 6 14 15 CD_PLAY 19
17 2A3 2Y3 3 ADB7 CC 4 5 .1UF U26A ADB6 17 D5 Q5 16
15 OCCB# 2A4 2Y4 74LVC32 D6 Q6 HDD_LED# 30
14 ADB7 18 19
D7 Q7 2ND_CHGI_CD_FDD_LED# 30
+3VALW 1 8P4R_100K KBA2 1
GND
19 1G 3 AA 11
GND
U26B 2G SELIO# LARST# CLK
2 1
14 74LVC32 74LVC244 7 CLR
10
KBA1 4 74HCT273
10
6 CC
SELIO# 5
27 SELIO# R192 C216
7
1 2 1 2
+5VALW
20K 1UF_25V_0805
1
R217
1
14 PCM1_LED
3 PCM_LED +3VALW 1 2
1
2 C202
14 PCM2_LED
R8 1 2 .1UF
20
DAN202U 100K .1UF U21
20
U23 ADB0 3 2
VCC
D0 Q0 PWR_LED# 30
2
2 18 ADB0 ADB1 4 5
VCC
20 EXTID0 1A1 1Y1 D1 Q1 2ND_BATT_LOW_LED# 30
20 EXTID1 4 16 ADB1 ADB2 7 6 BATT_LOW_LED# 30
1A2 1Y2 ADB2 ADB3 D2 Q2
20 EXTID2 6 14 8 9 BATT_CHGI_LED# 30
8 1A3 1Y3 12 ADB3 +3VALW ADB4 13 D3 Q3 12
24 BT_WAKE_UP 1A4 1Y4 D4 Q4 ANT_SW 24
11 9 ADB4 ADB5 14 15
19 MEDIA_DETECT 2A1 2Y1 U26C D5 Q5 CD_STOPBTN# 19
13 7 ADB5 ADB6 17 16
30 VOL_UP# 2A2 2Y2 74LVC32 D6 Q6 PCMRST# 15
30 VOL_DW# 15 5 ADB6 14 ADB7 18 19 EN_LAN# 16
2A3 2Y3 ADB7 KBA4 D7 Q7
30 KILL_SW# 17 3 9
2A4 2Y4 8 BB 11
GND
+3VALW SELIO# LARST# CLK
1 10 1
GND
1G CLR
19 7
U26D 2G 74HCT273
10
14 74LVC32 74LVC244
10
KBA3 12
11 DD
SELIO# 13
7
+5VALW
+3VALW +3VALW +3VALW
C185 +5VALW +5VALW +5VALW
1
1 2 C238
1
1 2 R220 1 2 R15
1
.1UF C225 .1UF R209
20
1 2 +12VS 100K
U19 100K R18 R17 .1UF
100K
2
G
MP3_STOPBTN# 2 18 ADB0 U28
VCC
30 MP3_STOPBTN#
5
1A1 1Y1
2
30 MP3_PLAYBTN# MP3_PLAYBTN# 4 16 ADB1 Q24 4.7K 4.7K 8 1
MP3_FRDBTN# 1A2 1Y2 ADB2 VCC A0
2
30 MP3_FRDBTN# 6 14 2 1 3 7 2
1A3 1Y3 FLASH# 9
6 WC
+3VALW A1
2
MP3_REVBTN# 8 12 ADB3 FWE# 4 3
S
C194 30 MP3_REVBTN# 1A4 1Y4 27,34 EC_SMC1 SCL A2
11 9 ADB4 1 2N7002 5 4
19,30 STOPBTN# 2A1 2Y1 FWR# 27 27,34 EC_SMD1 SDA GND
1 2 1 2 13 7 ADB5 U31
R153 100K 1 2 15 2A2 2Y2 5 ADB6 7SH32FU NM24C16
.1UF 2A3 2Y3
2 R152 BID 100K ADB7
3
1 17 3
5
1
KBA5 2 1 2 1
GND
7SH32FU
BID= 1for Rev 0.4 M/B or up.
3
2
1 2 +5VALW
R105 0 1 2
1 2 C110 .1UF U13
+3VALW
C114 R110 @0 U12
1 2 FLASH_VCC KBA11 1 32 FRD#
U14 KBA18 KBA9 A11 OE# KBA10
1 32 FLASH_VCC 2 31
.1UF KBA16 2 NC VCC 31 FWE# KBA8 3 A9 A10 30 FSEL#
KBA11 FRD# KBA15 A16 WE* KBA17 KBA13 A8 CE# ADB7
1 32 3 30 4 29
KBA9 2 A11 OE# 31 KBA10 FRD# 27 KBA12 4 A15 A17
29 KBA14 KBA14 5 A13 DQ7 28 ADB6
KBA8 A9 A10 FSEL# KBA7 A12 A14 KBA13 KBA17 A14 DQ6 ADB5
3 30 5 28 6 27
KBA13 A8 CE# ADB7 FSEL# 27 KBA6 A7 A13 KBA8 FWE# A17 DQ5 ADB4
4 29 6 27 7 26
KBA14 A13 DQ7 ADB6 KBA5 A6 A8 KBA9 WE# DQ4 ADB3
5 28 7 26 FLASH_VCC 8 25
KBA17 A14 DQ6 ADB5 KBA4 A5 A9 KBA11 KBA18 VCC DQ3
6 27 8 25 9 24
FWE# 7 A17 DQ5 26 ADB4 KBA3 9 A4 A11 24 FRD# KBA16 10 A18 VSS 23 ADB2
WE# DQ4 ADB3 KBA2 A3 OE* KBA10 KBA15 A16 DQ2 ADB1
8 25 10 23 11 22
KBA18 VCC DQ3 KBA1 A2 A10 FSEL# KBA12 A15 DQ1 ADB0
9 24 11 22 12 21
KBA16 A18 VSS ADB2 KBA0 A1 CE* ADB7 KBA7 A12 DQ0 KBA0
10 23 12 21 13 20
KBA15 A16 DQ2 ADB1 ADB0 A0 DQ7 ADB6 KBA6 A7 A0 KBA1
11 22 13 20 14 19
KBA12 A15 DQ1 ADB0 ADB1 DQ0 DQ6 ADB5 KBA5 A6 A1 KBA2
12 21 14 19 15 18
KBA7 A12 DQ0 KBA0 ADB2 DQ1 DQ5 ADB4 KBA4 A5 A2 KBA3
13 20 15 18 16 17
KBA6 A7 A0 KBA1 DQ2 DQ4 ADB3 A4 A3
14 19 16 17
KBA5 15
A6 A1
18 KBA2 VSS DQ3 Compal Electronics, Inc
KBA4 A5 A2 KBA3 @29F040_TSOP
16 17
A4 A3 Title
29F040/SST39VF040_PLCC
BIOS & EXT. I/O PORT
@SST39VF040_TSOP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
27 KBA[0..18] KBA[0..18] AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
ADB[0..7] B 888M1 1.0
27 ADB[0..7] DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 25, 2001 Sheet 28 of 38
A B C D E
1
8936 1 8936 C58
+ C561 R406 2N7002 2 SYSON# + 4.7UF_1206 1UF_0805
C549 Q58 C72
10UF_1206 3 4.7UF_1206
.01UF @1M 16V
6.3V 16V
2
C41
.01UF
+3V R5 R7 R211 R415 R420
+ C243 470 470 470 470 470
U30 C254 1UF_0805
8 1 10UF_1206
D1 S1 Q1 Q3 Q23
7 2 6.3V
D1 G1 2N7002 2N7002 2N7002
6 3 1 1 1 1 1
D2 S2
5 4 2 SUSP 2 SUSP 2 SUSP 2 SUSP 2 SUSP
D2 G2 3 3 3 3 3
R408
8936 5VS_GATE +12VALW Q68 Q66
2N7002 2N7002
1
+ 1 100K
C253
R405 2N7002 2 SUSP
10UF_1206
C218 3 +2.5V
6.3V .01UF @1M Q60
2 2
C99 1UF_0805
2
+5VALW
3
S
Q5 +12VALW
+5VALW +5VS VR_ON# 2
G
U51 SI2301DS +12VALW
8 1 D R409
D1 S1 +2.5V_CLK
1
7 2 10K
D1 G1 R404
6 3 C550
5 D2 S2 4 + C555 100K
.1UF
D2 G2 C559 1UF_0805 C551 SYSON#
4.7UF_1206 1UF_0805 36 SYSON#
8936 3
+ 16V + 2 50V 1
C543 C97
C98 1 SYSON 2
4.7UF_1206 1UF_0805 27 SYSON
4.7UF_1206 Q55 3
16V R403 NDS352P Q62
16V 51K 2N7002
+12VS
5VS_GATE
+ C547
1 1UF_1206
SUSP# 2 Q56 25V
C553 3 +5VALW
.01UF 2N7002
5VS_GATE R9
3
10K 3
C25
+5VALW +5V .01UF VR_ON#
U50
8 1 1
D1 S1 VR_ON
7 2 27,37 VR_ON 2
6 D1 G1 3 +12VALW 3
D2 S2 +1_5V +1_5VS Q22
5 4
D2 G2 + +12VALW 2N7002
C558 U5
8936 C554 8 1
+ 4.7UF_1206 1UF_0805 D1 S1
C548 7 2
6 D1 G1 3 R411
4.7UF_1206 C564
16V D2 S2 100K
5 4 .1UF
16V D2 G2 + C565 +5VALW
C19 1UF_0805_50V
8936 C21 3
+ 4.7UF_1206 1UF_0805 +5V 2 50V
C44
SYSON_ALW 1
4.7UF_1206 16V Q57 R417
1
1 1
1 2 VR_GATE 2 Q59 25V SUSP# 2
+12VALW 19,27,35,37 SUSP#
R14 100K 3 3
2N7002 Q61
1
Q4 2N7002
4
VR_ON# 2 4
C24 C31
.01UF 1UF_0805
3
2N7002
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND POWER CONTROL CKT
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THEETENT
COMP
DIVISION OF R&D Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE 888M1
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 29 of 38
A B C D E
5 4 3 2 1
+3VS RP22
1 8 MP3_STOPBTN#
2 7 MP3_PLAYBTN#
3 6 MP3_FRDBTN#
4 5 MP3_REVBTN#
10K-8P4R
MP3_FRDBTN# 2 1 FRDBTN#
28 MP3_FRDBTN#
D14 RB751V
MP3_REVBTN# 2 1 REVBTN#
28 MP3_REVBTN# D17 RB751V
D D
MP3_PLAYBTN# 2 1 PLAYBTN#
28 MP3_PLAYBTN#
D16 RB751V
JP6
9,27 ON/OFF 1 2 51ON# 32
27 51ON 3 4 LID_SW# 27
28 2ND_BATT_LOW_LED# 5 6 MP3# 27
18,24,28 RFOFF# 1 2 SM_LED 21
R434 0 7 8
28 KILL_SW# 9 10 CAPS_LED# 27
27 ARROW_LED# 11 12 NUM_LED# 27
28 INTERNET# 13 14 BUTTON1# 28
28 VOL_DW# 15 16 VOL_UP# 28
9,27,32,35 ACIN 17 18 PWR_LED# 28
28 BATT_LOW_LED# 19 20 BATT_CHGI_LED# 28
28 HDD_LED# 21 22 2ND_CHGI_CD_FDD_LED# 28
27 CDON#/MP3 23 24
FRDBTN# REVBTN#
19 FRDBTN# 25 26 REVBTN# 19
+3VALW STOPBTN# PLAYBTN#
19,28 STOPBTN# 27 28 PLAYBTN# 19
C 29 30 C
1
+3VALW 31 32
R51 33 34
+5VALW 35 36 +3VALW
1
470K 37 38
+3V 39 40 +3VS
R202
51RST# SUYIN-80065A-040G2T
2
51RST# 27
470K
1
Q25
2
27 PC7 2
2N7002
3
FAN CONN.
+12V
1
+5V
R418
3.6K
1
B C B
C427
2
2 Q36 D34
B 2SC2411K 10UF_1206
1
+3VALW +5V E
2
3
C566 D37 C108 1SS355
FAN1
2
1 2 1 2
1N4148
2
C383 .1UF .1UF C567 .1UF .1UF JP10
1
U37
5
1
5 VCC
1
U53 D32
1 EN_DFAN 1 1N4148 2
4,8,12,14,15,16,17,18,20,22,27 PCIRST# 27 EN_DFAN 3
4 LPCPD# 4 Q64
LPCPD# 27 2SA1036K
2 1 2 3 53398-0310-FAN
9,12,22 SUS_STAT#
R414
2
2
13K_1%_0603 VEE LMV321_SOT23-5
+3V
3
LPCPD# 7SH08FU
R274 @0
1
1 2
R413 R329
For PC87591 REV 0.A Only 7.32K_1%_0603
10K
2
27 FAN_SPEED
A A
+3V
47K
14 U36C 14 U36D
+3V - BATT1 + R278
5 6 9 8 RSMRST#
RSMRST# 9
2 1 +RTCBATT
330K C378 7 74LVC14 7 74LVC14
14 U36F
1 .22UF_0603 +3V POWER +3V POWER 1
13 12 RTCBATT
1
7 74LVC14 D31
HSM1265
+RTCVCC +5V +3V
C382
2
1 2
1
ST1 ST2 H11 +3V
R250 U39
CHGRTC
5
.1UF
47K 14 U36E 2
C428 R251 4
2
.1UF 1 2 11 10 1
1
1
1
330K 7 74LVC14
7SH32FU
3
C355
Stand-Off 053 Stand-Off 053 Stand-Off 053
2
.1UF
ST3 H2
1
+3VS
2 Stand-Off 090 Stand-Off 090 C363 2
+5VS 1 2
ST4 H24
1
.1UF U18C
10
R58 74LVC125
2
U35
240K 1 7 9 8
VCC
MR# RST# SYS_PWROK 9
1
2
4 8
1
PFI RST +3V POWER
1
Screw Boss 070 Stand-Off 115 6 5 R65
GND
1
1
R59 C78 C70 NC PFO#
10K
H12 H13 H16 H15 MAX708
2
100K .01UF .1UF
2
1
J CPU Thermal Plane Screw Hold J CPU Thermal Plane Screw Hold J CPU Thermal Plane Screw Hold J CPU Thermal Plane Screw Hold
CF17 CF1 CF2 CF5 CF6 CF7 CF20 CF19 CF14 CF15
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80
H26 H5 H29
3 3
1
CF4 CF11 CF13 CF10 CF12 CF16 CF18 CF8 CF9 CF3
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80
1
1
H3 H23 H31 H1 H4 H27
1
A Screw Hold C Screw Hold D Screw Hold F Screw Hold G Screw Hold I Screw Hold
4 4
L Screw Hold M Screw Hold N Screw Hold O Screw Hold O Screw Hold O Screw Hold O Screw Hold O Screw Hold O Screw Hold
H7 H8 H20 H21
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND RESET
1
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THEETENT
COMP
DIVISION OF R&D Size Document Number Rev
E HDD Frame Hold E HDD Frame Hold E HDD Frame Hold E HDD Frame Hold B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE 888M1
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date: Tuesday, April 24, 2001 Sheet 31 of 38
A B C D E
A B C D
PL2 VIN
PF1 CHC4532U800_1812
5A
PCN1 1 2
1
1
1
PR3 Vin Detector
1
3 10_1206
2
3 PD1 PC1 High 18.7 17.9 17.1
21
2 BYS10-45 PC2 PC3 PC4
DC JACK 1000PF_0603_50V 100PF_0603_50V 1000PF_0603_50V 100PF_0603_50V Low 18.0 17.3 16.5
2
PZD1
1 RLZ24B PR101 1
1M_1% VS
2
PJP1 1 2
1 2 1 2 VIN
3MM PL1
CHC4532U800_1812
1
1
PR98
PR99 PR94
78.7K_1% 10K 0
CPU thermal protection at 99 degree C 1 2
ACIN 9,27,30,35
2
PR103
Recovery at 51 degree C
8
22K
2
1 2 3 +
VL 1
PC6 VS PACIN 33,34
2 -
1
0.1UF_50V
1
PC83 PR100 PC84 PU1A
4
1000PF 20K_1% 0.1UF_50V PZD4 PR86
1
2
PR4 47K
2
2.15K_1%
2
2
2 1 RTCVREF
PR13
8
16.9K_1% PR107
5 10K
+
7 MAINPWON
MAINPWON 35
2 TM_REF 6 -
2
@10K_1%_0805
PU1B
4
LM393M
PH2
F_0805
PC8
1000P
PR6
0.22UF_0805_16V
10K_1%_080
VL
5
100K_1%
PH1
PC7
PJP8
PR9 2 1 +12VALW (120mA,20mils ,Via NO.= 1)
+12VALWP
100K_1%
JOPEN/+12V
PJP6
PH1 under CPU side +5VALWP 1 2 +5VALW (5A,200mils ,Via NO.= 10)
PH2 close to RAM door
PAD-OPEN 4x4m
PD21 PJP7
RB751V VIN 1 2 (5A,200mils ,Via NO.= 10)
+3VALWP +3VALW
2 1
34 VMBA
PAD-OPEN 4x4m
2
PD20 PJP2
3 RB751V PD19 2 1 +1_5V (1.5A,60mils ,Via NO.= 3) 3
+1_5VP
2 1 RLS4148
34 VMBB
3MMA/CPU_IO
VS
1
RLZ6.2C
1
1
2
2
2
30 51ON# 1 2
PR88
22K
CHGRTCP
RTCVREF PR102
PU7
S-81235SG 200_0805
4 4
1 2 3 2
CHGRTC
1
3 2
PR106
1
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE Connector / DC-DC Interface
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR Size Document Number Rev
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY B 888M1 1.0
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC. Date: Tuesday, April 24, 2001 Sheet 32 of 38
A B C D
A B C D
Iadp=0~2.9A
P1 P2 P3 B+ B++
PQ13 PQ12 PR15 PQ22
SI4835DY SI4835DY 0.02_2512_1% SI4835DY
VIN 8 1 1 8 2 1 1 2 1 8
7 2 2 7 PL3 2 7
1
1 6 3 3 6 FBM-L11-453215-900LMAT PC34 PC35 PC43 PC33 3 6 1
5 5 5
1
1
4.7UF_1210_25V 4.7UF_1210_25V 0.1UF_0805_25V @1000PF
2
4
4
PR36 PR35
10K 200K
PR39
2
2
47K
ACOFF# 1 2 1 2 VIN
1
PR43 10K
PR72
1
PU6 0
PD2 PR1 MB3878
1SS355 150K 1 24
3
2
1
-INC2 +INC2
2
ACOFF# 1 2
1
2
2 1 2 23 PC60
OUTC2 GND 4
PR2 PR79 220PF
1
1
S 4 21 1 2
1
PR90 -INE2 VCC(o) 100K PQ14
3
5
6
7
8
24.9K_1% PC53 DTC115EUA
PR95 0.1UF_0805_25V
3
34 ACON 1 2 1 2 5 20
10K_1% PC72 FB2 OUT PC54
2
2
PC97 0.1UF_16V PC71 PR89 0.1UF_50V
4700PF 10K LXCHRG
2
6 19 1 2
2 0.1UF_16V VREF VH PC55 2
1
0.1UF_0805_25V
1
1 2 1 2 7 18 1 2
PR96 FB1 VCC PL7 PR40
@24.9K_1% PC73 PR80 22UH_SPC-1205PA 0.02_2512_1% BATT+
2
FSTCHG 27,34
2200PF 10K 8 17 1 2 1 2 1 2
-INE1 RT
2
PR97 PR55
4.7UF_1210_25V
27 IREF 1 2 9 16 68K
1
+INE1 -INE3
_25V
_25V
1
1
PC22
PC48
PC47
4.7UF_1210
162K_1% PR91 10K PD18 +
100UF_EC
2 1 10 15 1 2 1 2 1SS355 PD14
1
1
PC98 OUTC1 FB3 RB051L-40
2
PR92 0.1UF_16V PR48 PC56
IREF=1.31*Icharge 100K_1% 47K 1500PF
2
11 14
OUTD CTL
2
IREF=0~3.3V
1
2
12 13 PR56
-INC1 +INC1 47K
2
2 1 2 1
3 3
PR93 PR81
47.5K_1% 143K_1%
CC=0~2.52A
CV=16.84V(2P4S
cells)
4 4
VMBA
32 VMBA VMBB 32
1
PC96 BATT+ PC20
1000PF P5 P4 1000PF
PQ10 PQ9 PQ8 PQ11
PL10 PL9
2
PJP5 7A PF3 FMT_600AT_1806 FDS4435 FDS4435 FDS4435 FDS4435 FMT_600AT_1806 5A PF2 PJP4
2 1 8 1 1 8 8 1 1 8 2 1
1 ALI/NIMH# BLI/NIMH# 1
7 2 2 7 7 2 2 7
2 AB/I BB/I 2
6 3 3 6 6 3 3 6
3 TSA TSB 3
1 5 5 5 5 1
1
4 4
1
5 PR138 PR23 5
1
6 1K PC95 PC21 1K 6
4
1
1
7 0.01UF PR129 PR134 0.01UF 7
PR34 PR132 39K 39K PR26 PR27
2
SUYIN 25063A-07G1
2
SUYIN 25063A-07G1 100 100 100 100
2
PR135 PR136
2
2
1 2 22K
EC_SMD1 22K 1 2 EC_SMD2
EC_SMD1 27,28 2,19,27 EC_SMD2
1
EC_SMC1 EC_SMC1 27,28 2 1
PQ38 3 2 EC_SMC2
2,19,27 EC_SMC2
HMBT2222A PQ33 3
HMBT2222A
1
2
PD10 PD27
1
@BAS40-04 @BAS40-04 PD25
PD28
PR128 RLS4148 PR137 PD6 PD7
10K 10K RLS4148 @BAS40-04 @BAS40-04
3
1
2 1 2 1
1
1
3
+5VALWP 100K 100K
GA 2 GB 2
2
36 GA 36 GB 2
2
100K DTC115EK 100K DTC115EK
PR131 PR133
3
10K 10K
1
1
VS
PU10 VMBB
7
74HC253 VL +3VALWP
1Y
2Y
GND
1
PC89 PR32
1
2
100K PR113
1EN
2EN
1
1
1C0
1C1
1C2
1C3
2C0
2C1
2C2
2C3
LM393A 200K_1%
S0
S1
33 ACON
1
2
PC94 + 3 1 2 PR28
1
14
15
1
PR120 1K
2
6
5
4
3
2
1
- 2 PD8 PD9
1
270K PR121 4.7K PR30 3 3
PR109 PC92 @1K
2
4
2
243K_1% 100PF ALI/NIMH# 2 1 1 1 BATT_TEMPA 27
2
2
2
3 2 2 3
1 2
8 CELLS BATTERY UVP
1
PR111 +3VALWP PR25
1
100K
10K PR116 H 12.16V L 11.09V 6.49K_1%
2 PR122 PU9B 549K_1% 1 2 TSB
27,33 FSTCHG PR115
1 2 LM393A
1
100K 200K_1%
2
1
100K PR118 PR29
2
+ 5 2 1
2
- 6 PD29 PD5 1K
1
PR123 4.7K PR31 3 3
1
2
PC90 PR117 PC93 @1K
1000PF 243K_1% 100PF BLI/NIMH# 2
2
1 1 1 BATT_TEMPB 27
1
1 2
1
2 2
PR119
5.6M 27 BLI/MH#
@BAS40-04 @BAS40-04
100K
2 PQ30
27 A/B#USE 100K
2 2 1 PACIN 32,33
DTC115EK
PQ37 100K PR112
DTC115EK 100K 47K
3
2 1 TRICKLE 27
4 4
PD24
RLS4148
+5VALWP VS
DAP202U
B++ PD16 B++
3
VL PC37 PC32 PC36
0.1U_0805_25V
PC99 PC38 PC39
8
7
6
5
5_25V
5
6
7
8
PR62 PR63 PQ24 4.7UF_1210_25V 0.1UF_0805_25V 4.7UF_1210_25V
PC57
PC59
1
PC25 2200PF 4.7UF_1210_25V 10K_1% 10K_1% SI4800
D
D
D
D
D
D
D
D
0.1U_080
470PF_0805_100V 4.7UF_1210_25V PQ23 PC58
2
SI4800 2.2UF_0805_16V
1 PC49 1
G
S
S
S
S
S
S
PR38
22_1206
1
2
3
4
4
3
2
1
4.7UF_1206_16V PC50
22
21
25
24
23
PC46 PR51 0.1UF_0805_25V PL6
1 2 4 1 30 16 2 1
REG5V_IN
VREF5
VCC
TRIP1
TRIP2
0 LH1 LH2
0.1UF_0805_25V PR57 0 10UH_SPC_1205P_100
PD11 29 17
1
8
7
6
5
5
6
7
8
EC11FS2 PR47 0 OUT1_U OUT2_U
2 3
PZD7 PR46 0
D
D
D
D
D
D
D
D
28 PU5 18
@RLZ16B PQ25 LL1 LL2
PC31 PT1 SI4810DY TPS5120 PQ26
G
S
S
S
S
S
S
2.2UF_1206_25V 10UH_SDT-1205P-118-120 SI4810DY
2
27 19
OUT1_D OUT2_D
SKIP/PWM #
1
2
3
4
4
3
2
1
26 20 PC41
5V_STBY
OUTGND1 OUTGND2 @1000PF
SOFT1
SOFT2
STBY1
STBY2
PGOD
PC40
INV1
GND
INV2
SCP
REF
FB1
FB2
@1000PF
CT
10
11
12
13
14
15
1
9
PR61 PR74
PU8
AMS2906 57.6K_1% PC69 33.2K_1%
3
+5VALWP
SCP
PR66 0.01UF PR73
Vin
2 2
1
PC51 PR65 PC64 PC70 PR78 4700P
+ + 3300P 430 2200P 220
PR108 PD22 PZD2 PC79 PC81 2200P + + + PZD3 PD23
1
2
VL
4.7UF_1206
PC68 PR77
PC91
1
PR83
MAINPWON 32
VS
150K
1
100K
19,27,29,37 SUSP# 2 PC75
PC74 PR82 .047U_0603_16V
0.01UF 100K
PQ28 100K
2
DTC115EK
3
3 3
VIN
1
1
PQ27 PC100
9,27,30,32 ACIN 2
2
2N7002 SCP 0.1UF_0805
3
PQ39
3 TP0610T PR141
2 1 2 VL
1
10K
1
PR142
330
2
4 4
1 1
+1.8V+-5%
PQ3
PQ4
SI3445DV PL8 +1_8VP SI3442DV +1.5V+-5%
D
+5VALWP 5uH-SPC-06704 6
S
D
6 LX18 1 2 5 4
S
+1_5VP
4 5 2
2 1
1
1
G
2
2
VL
_25V
PR20
G
PD3 191K_1% + PC10 + PC5
PR10
4.7UF_1206
PR12
5.1K
1
PC24
3
0
PD4 PQ6 RB051L-40 150UF_D_4V_FP
PC16 RB751V HMBT2222A 47UF_D_6.3V
0.1UF_50V
4.7UF_1206_25V PR17
2
1
1
2
1
1 2 2 10K
PC23
1
220PF
PC29
3
2
PR18 PR21
1
2
1K 162K_1%
PC9 1 2 VS
2 2200PF PR139 0 PU3A PR37 2
8
69.8K_1%
2
2
1 2 +5VALWP LM358
PR140 @0 + 3 2 1 VL
1
PU2A 2
-
8
1
LM393A
0.01UF
3 + 3
4
PQ5 PR19 PR11
PC30
2 1 PC28
2SA1036K 1 2 1 2 PR5 30.1K_1%
- 0.85VREF 68PF 100K
5.1K 2 1 2 SUSP 29
1
10K 1 2 PR14 @0
1
1
4
3
100K
2 SYSON#
SYSON# 29
100K
PQ7
3
DTC115EK
8 Cells Charger OVP 18.13V
3 3
P1
34 GA PQ31
1
2 PD26
1SS355 BATT+
3
2 1
2N7002 PR125
36K
PR54
1M_0.5%
PU2B PR53
LM393A
34 GB PQ35 PR126 0
1 309K 1% + 5
2 7
3 - 6
0.85VREF
2N7002 PR22
100K
1%
PC18 PR45 PR52
PR130 PC19 1000P 100K_0.5% 97.6K_1%
100K 1UF_1206 PC52
25V 1UF_0805_16V
4 4
B++
+5VALWP
0_25V
_25V
_25V
_25V
_25V
@4.7UF_121
5
6
7
8
5
6
7
8
5
6
7
8
1
0.1UF_0805
4.7UF_1210
4.7UF_1210
4.7UF_1210
1 2
PC12
PC13
PC15
PC14
PC11
2,9 VR_HI/LO#
2
PR44 @0
RB751V
PD17
1 PQ15 PQ16 PQ17 1
2
SI4894DY SI4894DY @SI4894DY
IRF7811A IRF7811A @IRF7811A
4 4 4
1
1 2 BSTCORE1
19,27,29,35 SUSP#
PR42 0
_25V
PR41
3
2
1
3
2
1
3
2
1
PC44
0.1UF_0805
100K PL5
@1UH
2
PU4 1 2
CPU_CORE
PR49
MAX1711
2.2
PL4 PR7
2 VID4 16 21
D4 SKIP 0.9UH/20A_LPI 0.002_2512_1%
1
2 VID3 17 23 LXCORE 1 2 2 1
D3 LX
5
6
7
8
2 VID2 18 24 DHCORE
5
6
7
8
5
6
7
8
1
D2 DH
220UF_D_4V
PQ19 PQ21
EC10QS04
_4V
1
1
19 22 BSTCORE SI4404DY SI4404DY PQ20
PD12
220UF_D
2 VID1 D1 BST + +
FDS7764A FDS7764A SI4404DY
PC26
PC27
1
EC31QS04
20 14 FDS7764A
2 VID0 D0 PGND
4
PD15
2
1 2 2 13 DLCORE 4 4
27,29 VR_ON PR68 0 SHDN DL
12 1 PR71
9 V_GATE PGOOD V+
2
20 PC42
VCCORE 2200PF
3
2
1
15 7 2 1
+5VALWP VDD VCC
3
2
1
3
2
1
2 2
5 3
CC FB PC62
MAX1711_2VREF 9 4 0.22UF_0805_16V
MAX1711_2VREF REF FBS
6 11
ILIM GNDS PR67
0 PR59
5_25V
10 8 2 1
GND TON +5VALWP
220PF
PC61
0
PC45
0.22UF_0805_16V
FBCORE
1UF_080
2 1
1
2 1
150K_1%
PR70
PC63
PR50 PR69
1M_1% PR60 @
10K_1% 2 1 MAX1711_2VREF
MAX1711_2VREF
2
3 3
4 4