10/31/2020 VLSI Physical Design: STA Interview Questions Part 1

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Saturday, 20 February 2016

STA Interview Questions Part 1

What is slack?

What is SDC constraint file contains?

Delay of a cell depends on which factors ?

Write Setup and Hold equations?

Where do you get the WLM's? Do you create WLM's? How do you specify?

In which case inserting a buffer will solve the setup timing?

What is cross talk? How it affects timing.

How can you avoid cross talk? Contact Form

what is shielding ? how doe it prevents cross talk ?

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How spacing helps in reducing crosstalk noise?

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How buffer can be used in victim to avoid crosstalk?

What are the problems faced related to timing?

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How did you resolve the setup and hold problem?

How does delays varies with different PVT conditions? please explain with the help of graph.

What is cell delay and net delay?

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What are different delay models available and what are the difference between them?

What is cloning and buffering?

What is the derate value that can be used?

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What are the corners you check for timing sign-off? Is there any changes in the derate value for each
corner? Search

Where do you mean by the de-rating value? What are the factors that decide the de-rating values?

factor? Translate

What factors decides the setup time of flip-flop? Select Language ▼

What is metastability?

In a system with insufficient hold time, will slowing down the clock frequency help?

Posted by Akshay at 22:43

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10/31/2020 VLSI Physical Design: STA Interview Questions Part 1

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