LAB REPORT 02

OBJECTIVE :
 To construct various logic gates using NAND gates.
 To construct various logic gates using NOR gates.

REQUIRED EQUIPMENT :
Hardware:

 Trainer set
 AND Gate (74HC08)
 OR Gate (74HC32)
 NOT Gate (74HC04)
 NAND Gate (74HC00)
 NOR Gate (74HC02)
 XOR Gate (74HC86)
 Jumper wires
 Power supply

Software:

 Proteus

METHDOLOGY :
PART 1 (Verification of Logic gates using NAND gate) :

 Insert the IC on the trainer’s breadboard.

 Use any one or more of the NAND gates of the IC for this experiment.
 Any one or more Logic Switches of the trainer can be used for input to the NAND gate.
 For output indication, connect the output pin of the circuit to any one of the LEDs of the trainer.

Lab Task 1 (Verification of AND Gate) :

 Take an IC of NAND Gate. Inputs Output

 Connect the circuit as shown. A B
0 0 0
0 1 0
 Connect +5V to pin 14 (Vcc) and Ground to pin 7 (GND) of the IC. 1 0 0
 By setting the switches to 1 and 0, verify that the output of the circuit 1 1 1
confirms to that of an AND gate.
 Construct the truth table.

Lab Task 2 (Verification of OR Gate) :

 Take an IC of NAND gate.

 Connect the circuit as shown; Inputs Output
A B
0 0 0
0 1 0
1 0 0
1 1 1
  Connect +5V to pin 14 (Vcc) and Ground to pin 7 (GND) of the IC.
 By setting the switches to 1 and 0, verify that the output of the circuit
confirms to that of an OR gate.
 Construct the truth table.

Lab Task 3 (Verification of NOT Gate) :

 Take an IC of NAND gate.

 Connect the circuit as shown. Input Output
A
0 1
 Connect +5V to pin 14 (Vcc) and Ground to pin 7 (GND) of the IC. 1 0
 By setting the switch to 1 and 0, verify that the output of the circuit
conforms to that of a NOT gate.

PART 2 (Verification of Logic gates using NOR gate) :

 Insert the IC on the trainer’s breadboard.

 Use any one or more of the NOR gates of the IC for this experiment.
 Any one or more Logic Switches of the trainer can be used for input to the NOR gate.
 For output indication, connect the output pin of the circuit to any one of the LEDs of the trainer.

Lab Task 1 (Verification of AND Gate) :

 Take an IC of NOR Gate. Inputs Output

 Connect the circuit as shown. A B
0 0 0
0 1 0
1 0 0
 Connect +5V to pin 14 (Vcc) and Ground to pin 7 (GND) of the IC. 1 1 1
 By setting the switches to 1 and 0, verify that the output of the circuit
confirms to that of an AND gate.
 Construct the truth table.

Lab Task 2 (Verification of OR Gate) :

 Take an IC of NOR gate. Inputs Output

 Connect the circuit as shown; A B
0 0 0
0 1 0
1 0 0
 Connect +5V to pin 14 (Vcc) and Ground to pin 7 (GND) of the IC. 1 1 1
 By setting the switches to 1 and 0, verify that the output of the circuit
confirms to that of an OR gate.
 Construct the truth table.
Lab Task 3 (Verification of NOT Gate) :

 Take an IC of NOR gate.

 Connect the circuit as shown. Input Output
A
0 1
1 0
 Connect +5V to pin 14 (Vcc) and Ground to pin 7 (GND) of the IC.
 By setting the switch to 1 and 0, verify that the output of the circuit
conforms to that of a NOT gate.

POST LAB :
Task 1 :

 NOR Gate using NAND gate;

Inputs Output
A B
0 0 1
0 1 0
1 0 0
1 1 0

 XOR Gate using NAND gate;

Inputs Output
A B
0 0 0
0 1 1
1 0 1
1 1 0

 XNOR Gate using NAND gate;

Inputs Output
A B
0 0 1
0 1 0
1 0 0
1 1 1
Task 2 :

 NAND Gate using NOR gate;

Inputs Output
A B
0 0 1
0 1 1
1 0 1
1 1 0

 XOR Gate using NOR gate;

Inputs Output
A B
0 0 0
0 1 1
1 0 1
1 1 0

 XNOR Gate using NOR gate;

Inputs Output
A B
0 0 1
0 1 0
1 0 0
1 1 1

CONCULUSION :
This experiment describes the universality of NAND and NOR gate, that how these gates can
be used to form other logic and Exclusive gates. Analysis of this experiment also shows that NAND gate is more
preferable then NOR gate because it occupies less space while performing the same function. It shows that a NAND
gate gives an output 0 when both inputs are 1 and a NOR gate gives an output 1 when both of the inputs are 0.