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Name : Mendoza, Aldrin Daniel G.

Course & Section : BET-CpET-2C-STEM


Date : November 9, 2022
Teacher : Ms. Mary Jane Concepcion

NOR Gate

I. Objective

1. To examine the characteristics and operation of a TTL NOR gate.


2. To implementteh function of NOR gate using the combination of NOT and OR gate.

II. Materials and Equipment

• 5V DC power • 1pc 74LS32 (quad 2-input


supply OR gate)
• 1pc 74LS02 (quad 2-input • 1 pc 5mm red LED
NOR gate) • 1pc 1/2w 220Ω resistor
• 1pc 74LS04 (hex inverter • 2 pcs SPDT switch
gate) • 1 pc breadboard
• Solid wires

III. Introductory Information


The standard logic symbol for a 2-input NOR gate is shown in Figure 1. The symbol
consists of an OR gate followed by a small circle or bubble to indicate
complementation. NOR is a contraction of NOT OR, and the Boolean expression for
its output is expressed as an. OR gate followed by a NOT or INVERTER gate, as
shown in Figure 2, is the equivalent logic circuit of a NOR gate. NOR gate may have
more than two inputs. A NOR gate has an output of 0 when any or all the inputs are 1,
and an output of 1only when all the inputs are 0.
IV. Procedure

1. Construct on the breadboard the NOR gate circuit shown in Figure


2. Set the NAND circuit to each input combination as shown in truth table
A.1.Observe and record in the truth table the output for each combination.
3. Using the same circuit as shown in Figure A, complete truth tables A.2 and A.3.
4. Construct on the breadboard the NOT-OR gate circuit shown in Figure B.
5. Set the NOR circuit to each input combination as shown in truth table Observe
and record in the truth table the output for each combination.

Figure A

Truth table A.1

Input Output
B A Y
0 0 1
0 1 0
1 0 0
1 1 0

Truth table A.2

Input Output
B A Y
open 0 1
open 1 0

Truth table A.3

Input Output
B A Y
0 open 1
1 pen 0
Figure B

Input Output
B A Y
0 0 1
0 1 0
1 0 0
1 1 0

V. Conclusion

As for the results, it has been concluded that the NOR gate’s output only gives state
1 when both inputs are in 0. This is due to the function of the NOT Gate where the
OR gate’s output gets inversed by the NOT Gate. It has been observed throughout
the process especially for the figure B on how NOR Gate works individually in step
by step which helps us clearly understands its mechanism.

Youtube link :

https://www.youtube.com/watch?v=KlDmKQLguzY&t=8s

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