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Combinational
n inputs • • m outputs
•
• Circuits •
•
When input changes, output may change (after a
delay)
2
Combinational Circuits
Analysis
◦ Given a circuit, find out its function A
B
C
A
F1
?
◦ Function may be expressed as:
B
C
A
B
A
C
F2
?
Boolean function B
C
Truth table
Design
◦ Given a desired function, determine its circuit
◦ Function may be expressed as:
Boolean function
Truth table
3
Analysis Part
Boolean Expression Approach
A
B
F1
C T2=ABC
A T1=A+B+C
B T3=AB'C'+A'BC'+A'B'C
C
A
B F’2=(A’+B’)(A’+C’)(B’+C’)
A
F2
C
F2=AB+AC+BC
B
C F1=AB'C'+A'BC'+A'B'C+ABC
F2=AB+AC+BC 4
Analysis Part
Truth Table Approach A B C F1 F2
A=0 0 0 0 0 0
0 0
B=0
F1
C=0
A=0 0
B=0 0
C=0
0 1
A=0
B=0
0
A=0 0
F2
C=0 0
=0
B=0
C
5
Analysis Part
Truth Table Approach A B C F1 F2
A=0
0
0 0 0 0 0
B=0 1
F1 0 0 1 1 0
C=1
A=0 1
B=0 1
C=1
0 1
A=0
B=0
0
A=0 0
F2
C=1 0
=0
B=1
C
6
Analysis Part
Truth Table Approach A B C F1 F2
A=0
0
0 0 0 0 0
B=1 1
F1 0 0 1 1 0
C=0
0 1 0 1 0
A=0 1
B=1 1
C=0
0 1
A=0
B=1
0
A=0 0
F2
C=0 0
=1
B=0
C
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Analysis Part
Truth Table Approach A B C F1 F2
A=0
0
0 0 0 0 0
B=1 0
F1 0 0 1 1 0
C=1
A=0 1
0 1 0 1 0
B=1 0 0 1 1 0 1
C=1
0 0
A=0
B=1
0
A=0 1
F2
C=1 1
=1
B=1
C
8
Analysis Part
Truth Table Approach A B C F1 F2
A=1
0
0 0 0 0 0
B=0 1
F1 0 0 1 1 0
C=0
A=1 1
0 1 0 1 0
B=0 1 0 1 1 0 1
C=0 1 0
0 1 1 0 0
A=1
B=0
0
A=1 0
F2
C=0 0
=0
B=0
C
9
Analysis Part
Truth Table Approach A B C F1 F2
A=1
0
0 0 0 0 0
B=0 0
F1 0 0 1 1 0
C=1
A=1 1
0 1 0 1 0
B=0 0 0 1 1 0 1
C=1
0 0 1 0 0 1 0
A=1 1 0 1 0 1
B=0
1
A=1 1
F2
C=1 0
=0
B=1
C
10
Analysis Part
Truth Table Approach A B C F1 F2
A=1
0
0 0 0 0 0
B=1 0
F1 0 0 1 1 0
C=0
A=1 1
0 1 0 1 0
B=1 0 0 1 1 0 1
C=0
1 0 1 0 0 1 0
A=1 1 0 1 0 1
B=1
0 1 1 0 0 1
A=1 1
F2
C=0 0
=1
B=0
C
11
Analysis Part
Truth Table Approach A B C F1 F2
A=1
1
0 0 0 0 0
B=1 1
F1 0 0 1 1 0
C=1
A=1 1
0 1 0 1 0
B=1 0 0 1 1 0 1
C=1
1 0 1 0 0 1 0
A=1 1 0 1 0 1
B=1
1 1 1 0 0 1
A=1 1
C=1
F2 1 1 1 1 1
1
=1
B=1
C B B
0 1 0 1 0 0 1 0
A 1 0 1 0 A 0 1 1 1
C C
F1=AB'C'+A'BC'+A'B'C+ABC F2=AB+AC+BC
12
Design (Synthesis) Part
Given a problem statement:
◦ Determine the number of inputs and outputs
◦ Derive the truth table
◦ Simplify the Boolean expression for each output
◦ Produce the required circuit
Example:
Design a circuit to convert a “BCD” code to “Excess
3” code
4-bits 4-bits
0-9 values
? Value+3
13
Design (Synthesis) Part
BCD-to-Excess 3 Converter
C C
A B C D w x y z
0 0 0 0 0 0 1 1 1 1 1
1 1 1 1
0 0 0 1 0 1 0 0 B B
x x x x x x x x
0 0 1 0 0 1 0 1 A 1 1 x x A x x
1
0 0 1 1 0 1 1 0
D D
0 1 0 0 0 1 1 1
0 1 0 1 1 0 0 0 w = A+BC+BD x = B’C+B’D+BC’D’
0 1 1 0 1 0 0 1
0 1 1 1 1 0 1 0 C C
1 0 0 0 1 0 1 1 1 1 1 1
1 0 0 1 1 1 0 0 1 1 1 1
1 0 1 0 x x x x x x x x B x x x x B
1 0 1 1 x x x x
A 1 x x A 1 x x
1 1 0 0 x x x x D D
1 1 0 1 x x x x
1 1 1 0 x x x x y = C’D’+CD z = D’
1 1 1 1 x x x x 14
Design (Synthesis) Part
BCD-to-Excess 3 Converter
A B C D w x y z
A
0 0 0 0 0 0 1 1 w
0 0 0 1 0 1 0 0
0 0 1 0 0 1 0 1
0 0 1 1 0 1 1 0
0 1 0 0 0 1 1 1 x
B
0 1 0 1 1 0 0 0
0 1 1 0 1 0 0 1
0 1 1 1 1 0 1 0
1 0 0 0 1 0 1 1 C y
1 0 0 1 1 1 0 0
1 0 1 0 x x x x
D z
1 0 1 1 x x x x
1 1 0 0 x x x x
1 1 0 1 x x x x w = A + B(C+D) y = (C+D)’ + CD
1 1 1 0 x x x x x = B’(C+D) + B(C+D)’ z = D’
1 1 1 1 x x x x 15
Seven-Segment Decoder
a
w x y z abcdefg
w a
0 0 0 0 1111110 b
0 0 0 1 0110000 x c f b
? d g
0 0 1 0 1101101 y e
0 0 1 1 1111001 f
z g
0 1 0 0 0110011 e c
0 1 0 1 1011011 BCD code
0 1 1 0 1011111
0 1 1 1 1110000 y d
1 0 0 0 1111111
1 1 1
1 0 0 1 1111011
1 1 1
1 0 1 0 xxxxxxx x x x x x
1 0 1 1 xxxxxxx w 1 1 x x
1 1 0 0 xxxxxxx z
1 1 0 1 xxxxxxx
1 1 1 0 xxxxxxx a = w + y + xz + x’z’ b=...
c=...
1 1 1 1 xxxxxxx
d=... 16
Binary Adder
Half Adder x S
y HA
◦ Adds 1-bit plus 1-bit C
◦ Produces Sum and Carry
x
+ y
───
x y C S C S
0 0 0 0
0 1 0 1
x S
1 0 0 1
1 1 1 0
y C
17
Binary Adder
Full Adder x S
y FA
◦ Adds 1-bit plus 1-bit plus 1-bit z C
◦ Produces Sum and Carry
x
+ y
y + z
x y z C S
───
0 0 0 0 0 0 1 0 1 C S
0 0 1 0 1 x 1 0 1 0
0 1 0 0 1 z
S = xy'z'+x'yz'+x'y'z+xyz = x y z
0 1 1 1 0
y
1 0 0 0 1
1 0 1 1 0 0 0 1 0
1 1 0 1 0 x 0 1 1 1
1 1 1 1 1 z
C = xy + xz + yz
18
Binary Adder
Full Adder S = xy'z'+x'yz'+x'y'z+xyz = x y z
x C = xy + xz + yz
y
z
x
y x
x z y
x S z S
y
z
x
x
x y
y y y
z x
x z C
y z
y
z x C
z
z
y
z
19
Binary Adder
Full Adder
x S
y HA HA
z C
x
S
y
C
20
Binary Subtractor
Half Subtractor x D
y HS
◦ Subtract 1-bit from 1-bit B
◦ Produces Difference and Borrow
x
- y
───
x y B D B D
0 0 0 0
0 1 1 1
x D
1 0 0 1
1 1 0 0
y B
21
Binary Subtractor
Full Subtractor
◦ Subtract 1-bit minus 1-bit minus 1-bit
◦ Produces Difference and Borrow x D
y FS
z B
x
x y z B D y - y
- z
0 0 0 0 0 0 1 0 1
───
0 0 1 1 1 x 1 0 1 0 B D
0 1 0 1 1 z
D = xy'z'+x'yz'+x'y'z+xyz = x y z
0 1 1 1 0
y
1 0 0 0 1
1 0 1 0 0 0 1 1 1
1 1 0 0 0 x 0 0 1 0
1 1 1 1 1 z
B = x'y + x'z +
yz 22
Binary Subtractor
Full Subtractor D = xy'z'+x'yz'+x'y'z+xyz = x y z
x B = x'y + x'z +
y
z yz
x
y x
x z y
x D z D
y
z
x
x
x y
y y y
z x
x z B
y z
y
z x B
z
z
y
z
23
4 Bit - Binary Adder
x3x2x1x0 y3y2y1y0
c3 c 2 c1 .
+ x3 x2 x1 x0
Carry + y3 y2 y1 y0
Cy Binary Adder C0 Propagate
Addition
────────
Cy S3 S2 S1 S0
S3 S 2 S1 S0
x3 x2 x1 x0
y3 y2 y1 y0
0
FA FA FA FA
C4 C3 C2 C1
S3 S2 S1 S0
24
4 Bit - Binary Adder
1011 0011
0 11 .
1011
Carry Carry + 0011
Cy Binary Adder C0 Propagate Propagate ────
Addition Addition Cy 1110
S3 S 2 S1 S0
1 0 1 1
0 0 1 1
0
FA FA FA FA
0 0 1 1
1 1 1 0
25
8 Bit - Binary Sequential Adder
Carry Propagate Adder
x7 x6 x5 x4 y7 y6 y5 y4 x3 x2 x1 x0 y3 y2 y1 y0
A3 A2 A1 A0 B3 B2 B1 B0 A3 A2 A1 A0 B3 B2 B1 B0
Cy CPA C0 Cy CPA C0 0
S3 S2 S1 S0 S3 S2 S1 S0
S7 S6 S5 S4 S3 S2 S1 S0
26