AI CT LOGIC GATE WORK Ssuet

AI & CT SSUET/CS-129L
EXPERIMENT #
LOGIC GATES
Objective:
Follow the concepts of basic logic gates and verify their truth tables.
Hardware Required:
Proto board, Logic Probe, Connecting Wires, IC’s (7404, 7408, 7432, 7400, 7402, 7486).
Theory:
Digital Logic Design may be practically implemented by using electronic gates. The
following points are important to understand. Electronic gates require a power supply. Gate
INPUTS are driven by voltages having two nominal values, e.g. 0V and 5V representing logic
0 and logic 1 respectively. The OUTPUT of a gate provides two nominal values of voltage
only, e.g. 0V and 5V representing logic 0 and logic 1 respectively. In general, there is only
one output to a logic gate except in some special cases.
• IC 7404 is a single input NOT gate. A NOT gate will produce the complements of any
input applied to it. If the input is 1 then output will be zero and vice versa.
• IC 7408 is a 2-input AND gate IC. Any AND gate can have 2 or more inputs. The basic
property of AND gate is that it will produce a high signal i.e. binary ‘1’ and electronically
5V only if all of its input are high i.e. binary ‘1’ or 5V. If any one of its input is ‘0’ the
output will become ‘0’ i.e. 0V.
• IC 7432 is a 2-input OR gate IC. Any OR gate will produce ‘0’ only when all of its inputs
are ‘0’. Any one high input will result in a high output.
• IC 7400 is a 2-input NAND gate IC. Any NAND gate can have 2 or more inputs. The
basic property of NAND gate is that it will produce a low signal i.e. binary ‘0’ and
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NAME: MUHAMMAD IZHAAN
HUMAYUN
electronically 0V only if all of its input are high i.e. binary ‘1’ or 5V. If any one of its
input is ‘0’ the output will become ‘1’ i.e. 5V.
• IC 7402 is a 2-input NOR gate IC. Any NOR gate will produce ‘1’ only when all of its
inputs are ‘0’. Any one high input will result in a low output.
• IC 7486 is a 2-input XOR gate IC. Any XOR gate will produce ‘0’ only when both of its
input is same either ’0’ or ’1’.
i) Logic gates symbols:
Figure 1.1 Basic Logic Gate Symbols.
ii) Logic gates IC pin configurations:
Figure 1.2 IC pin configurations of Basic Logic Gates Experiments:
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Figure 1.1 and fig 1.2 shows the logic symbols of AND, OR, NAND, NOR, NOT, XOR,
XNOR gates and IC layouts of all basic gates. The pin configuration is also given in the
layouts. Construct the circuit with the help of these layouts. Pin no. 7 and Pin no 14 of each
IC is Ground and Vcc respectively. Apply different inputs on the given inputs and observe
the outputs then complete the truth tables from 1-1 to 1-9 of logic gates.
a) 1-input NOT gate and verify its truth table.
Table 1-1: Truth table for NOT gate

A Y = A’
0 1
1 0
b) 2-input AND gate, OR gate, NAND gate, NOR gate.
Table 1.2: Truth table for 2-Input AND gate

A B Y=A.B
0 0 0
0 1 0
1 0 0
1 1 1
Table 1.3: Truth table for 2-Input OR gate

A B Y=A+B
0 0 0
0 1 1
1 0 1
1 1 1
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Table 1.4: Truth table for 2-Input NAND gate

A B Y = (A. B )’
0 0 1
0 1 1
1 0 1
1 1 0
Table 1.5: Truth table for 2-Input NOR gate

A B Y = ( A + B )’
0 0 1
0 1 0
1 0 0
1 1 0
c) Design 2-input XOR and XNOR gates using basic gates.
Figure 1.3 XOR an XNOR circuit using Basic Logic Gates
Table 1.6: Truth table for XOR gate
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A B Output
0 0 0
0 1 1
1 0 1
1 1 0
Table 1.7: Truth table for XNOR gate

A B Output
0 0 1
0 1 0
1 0 0
1 1 1
d) 2 -input XOR and XNOR using IC 7486
Table 1.8: Truth table for XOR gate

A B Output
0 0 0
0 1 1
1 0 1
1 1 0
Table 1.9: Truth table for XNOR gate
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A B Output
0 0 1
0 1 0
1 0 0
1 1 1
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EXPERIMENT #
BOOLEAN ALGEBRA AND DEMORGAN’S LAW
Objective:
Follow the De Morgan’s theorem, Boolean algebra law, rule and verify them by using logic
gates.
Hardware Required:
Proto board, Logic Probe, Connecting Wires, IC’s (7400, 7402, 7408, 7432, 7404).
Theory:
Boolean algebra is a deductive mathematical system closed over the values zero and One
(false and true). A binary operator defined over this set of values accepts a pair of Boolean
inputs and produces a single Boolean value.
a) Laws of Boolean Algebra
i. Commutative law:
Figure 2.1: Commutative law logic diagram for addition and multiplication.
ii. Associative law:
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Figure 2.2: Associative law logic diagram for addition and multiplication.
iii. Distributive law:

A. ( B + C ) = A . B + A . C
Figure 2.3: Distributive law logic diagram.
Rules of Boolean Algebra:

A set of rules or Laws of Boolean Algebra expressions have been invented to help reduce
the number of logic gates needed to perform a particular logic operation resulting in a list of
functions or theorems known commonly as the Rules of Boolean Algebra.
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b) Demorgan’s Theorem
Construct the two circuits corresponding to the functions given below. Show that for all
combinations of A and B, the two circuits give identical results. Connect these circuits and
verify their operations using truth table.
Figure 2.4 DeMorgan’s law.
Experiments:
Connect the circuits and verify their operations using truth tables.
a. To verify laws of Boolean algebra.
Commutative Law
Circuit Diagram:
A+B A.B
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B+A B.A
Table 2.1: Truth table of Commutative

Law
A B A+B B +A A.B B.A
0 0 0 0 0 0
0 1 1 1 0 0
1 0 1 1 0 0
1 1 1 1 1 1
Associative Law
Circuit Diagram:
A+(B+C) (A+B)+C
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A.(B.C) (A.B).C
Table 2.2: Truth table of Associative Law
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AI & CT
SSUET/CS-
129L
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A B C A+(B+C) (A+B)+C A.(B.C) (A . B) . C
0 0 1 1 1 0 0
0 1 0 0 0 0 0
1 0 1 1 1 0 0
1 1 0 1 1 1 1
Distributive Law
Circuit Diagram:
A(B+C) A.B+A.C
Table 2.3: Truth table of Distributive Law

A B C A . (B + C) A.B+A.C
0 0 0 0 0
0 0 1 0 0
0 1 0 0 0
0 1 1 0 0
1 0 0 0 0
1 0 1 1 1
1 1 0 1 1
1 1 1 1 1
12 | NAME: MUHAMMAD IZHAAN HUMAYUN
ROLL NO: 021

AI & CT
SSUET/CS-
129L
b. To verify De Morgan’s Law.
Circuit Diagram:
Page ComputerScienceDepartment
A’.B’ (A.B)’
A’+B’ (A+B)’
Table 2.4: Truth table of Distributive Law

A B A’ . B’ ( A + B )’ ( A . B )’ A’ + B’
0 0 1 1 1 1
0 1 0 0 1 1
1 0 0 0 1 1
1 1 0 0 0 0
Page ComputerScienceDepartment
13 | NAME: MUHAMMAD IZHAAN HUMAYUN
ROLL NO: 021

AI CT LOGIC GATE WORK Ssuet

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AI & CT SSUET/CS-129L

i) Logic gates symbols:

Figure 1.1 Basic Logic Gate Symbols.

ii) Logic gates IC pin configurations:

Figure 1.2 IC pin configurations of Basic Logic Gates Experiments:

Table 1-1: Truth table for NOT gate

b) 2-input AND gate, OR gate, NAND gate, NOR gate.

Table 1.2: Truth table for 2-Input AND gate

Table 1.3: Truth table for 2-Input OR gate

Table 1.4: Truth table for 2-Input NAND gate

Table 1.5: Truth table for 2-Input NOR gate

c) Design 2-input XOR and XNOR gates using basic gates.

Figure 1.3 XOR an XNOR circuit using Basic Logic Gates

Table 1.6: Truth table for XOR gate

Table 1.7: Truth table for XNOR gate

d) 2 -input XOR and XNOR using IC 7486

Table 1.8: Truth table for XOR gate

Table 1.9: Truth table for XNOR gate

a) Laws of Boolean Algebra

ii. Associative law:

iii. Distributive law:

Figure 2.3: Distributive law logic diagram.

Rules of Boolean Algebra:

Figure 2.4 DeMorgan’s law.

a. To verify laws of Boolean algebra.

Table 2.1: Truth table of Commutative

A B A+B B +A A.B B.A

Table 2.2: Truth table of Associative Law

A B C A+(B+C) (A+B)+C A.(B.C) (A . B) . C

Table 2.3: Truth table of Distributive Law

12 | NAME: MUHAMMAD IZHAAN HUMAYUN

ROLL NO: 021

b. To verify De Morgan’s Law.

Table 2.4: Truth table of Distributive Law

13 | NAME: MUHAMMAD IZHAAN HUMAYUN

ROLL NO: 021

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