Lenovo Ideapad Y700

A B C D E
m
1 1
LCFC Confidential
co
a.
si
BY511/BY710 M/B Schematics Document
ne
2 2
Intel Skylake H-Processor with DDR4 + NV N16P-GX GPU
do
MB NMA541
in
2015-07-31
i- REV:1.0
3 3
is
kn
te
w.
4 4
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Security Classification LC Future Center Secret Data Title

Issued Date 2015/02/26 Deciphered Date 2016/02/26 Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
BY511/BY710 0.3
Date: Friday, July 31, 2015 Sheet 1 of 66

A B C D E
A B C D E
LCFC confidential
nVidia N16P-GX
m
GB4B-128 Package Memory BUS (DDR4 non-ECC)
1
Page 18~24 PCI-Express 16X Gen3 1
Intel CPU Dual Channel DDR4-SO-DIMM X2
co
Page 14,15
VRAM 256/128*16
gDDR5L*8 4GB/2GB
Skylake-H 45W 1.2V DDR4 2133 MT/s
UP TO 8G x 2
Page 25~26
BGA-1440
HDMI 42mm*28mm
a.
HDMI Conn.
Page 34
eDP Conn eDP x4 Lane DMI *4

FHD : 15", 17" USB Right
si
UHD : 15"
USB 3.0 2x
USB 3.0 Port1
USB2.0 1x USB 3.0 Port2
Int. Camera
Int. 3D Camera USB3.0 1x USB 2.0 2x
USB 2.0 Port*2
ne
Intel PCH Page 41
2 Skylake H 2
USB2.0 1x USB Left with charge
do
SATA HDD SATA Gen3 USB2.0 Port0
Page 42 SATA Port2
FCBGA PCIE 1x
23mm*23mm
Cardreader Bayhub SD/MMC SD4.0 Conn.
SATA SSD SATA Gen3 BH777FJ2LN-B1
PCIe Port5
USB Board
in
Page 42 SATA Port1
USB 2.0 1x
NGFF Card
PCIe 4x WLAN&BT
RJ45 Conn. LAN Realtek PCIe 1x PCIe Port4
i-
Page 38 Page 40 USB2.0 Port6
RTL8111H-CG
Page 37 PCIe Port3 SPI BUS SPI ROM
8MB Page 07
HD Audio Page 3~13

SPI ROM 4MB
is for reserve
Page 07
3
LPC Sub-board 3
Codec SPK Conn.

Subwoofer Conn. Realtek ALC3248 Page 43 LED BOARD
Page 43
kn
EC TPM
ITE IT8371-LQFP USB Board
Z32H320TC
Page 44 Page 45
Int. MIC Conn. HP&Mic Combo Conn. MIC Board

te
USB Board
Touch Pad Int.KBD Thermal Sensor
Page 45 Page 45 NCT7718W
Page 39
w.
ww
4 4
Issued Date 2015/02/26 Deciphered Date 2016/02/26 Block Diagram

C
BY511/BY710 0.3

A B C D E
A B C D E
Voltage Rails ( O --> Means ON , X --> Means OFF )

SIGNAL
+5VS STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
+3VS
Power Plane Full ON HIGH HIGH HIGH HIGH ON ON ON ON
+1.5VS
+1.2VS S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
m
1
+1.05VS 1
S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
+3VALW +0.6VS
co
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
B+ +3VALW_PCH CPU_CORE
+5VALW +1.2V S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+VGA_CORE
State
a.
+3VGS
+1.8VGS
+1.35VGS
+0.95VGS BOM Structure Table
BOM Structure BTO Item
si
@ Not stuff
S0 O O O O O 14@ For 14" part
15@ For 15" part
AOAC@ AOAC support part
ne
S3 O O O O X GIGA@ GIGA LAN Part
2 ME@ ME part(connector, hole) 2
S3 RANKA@ For VRAM RankA part

Battery only O O O O X RANKB@ For VRAM RankB part
do
OPT@ For GPU part
TS@ For support touch panel sku part
S5 S4/AC Only O O O X X TPM@ For support TPM sku part
U31@ For support USB re-driver part
in
3D@ For support 3D camera sku part
S5 S4
Battery only O X X X X H4@ Hynix 256Mx16 VRAM part
M4@ Micron 256Mx16 VRAM part
S5 S4 S4@ Samsung 256Mx16 VRAM part
i-
AC & Battery X X X X X S4GX4@ Samsung 256Mx16 VRAM x4pcs sku
don't exist H4GX4@ Hynix 256Mx16 VRAM x4pcs sku
M4GX4@ Micron 256Mx16 VRAM x4pcs sku
CD@ Cost down part
SMBUS Control Table
is H4GX8@ Hynix 256Mx16 VRAM x8pcs sku
3 3
WLAN Thermal PCH TP M4GX8@ Micron 256Mx16 VRAM x8pcs sku

SOURCE VGA BATT IT8586E SODIMM WiMAX Sensor Module charger
S4GX8@ Samsung 256Mx16 VRAM x8pcs sku
kn
EC_SMB_CK1 IT8586E V
EC_SMB_DA1 +3VALW X V +3VALW X X X X X V
EC_SMB_CK2 IT8586E V V
X X V V X X
te
EC_SMB_DA2 +3VS +3VGS X +3VS +3VS +3VALW_PCH
PCH_SMB_CLK PCH
PCH_SMB_DATA +3VALW_PCH X X X V V X V X X
+3VS +3VS +3VALW_PCH
w.
EC SM Bus1 address EC SM Bus2 address PCH SM Bus address

Device Address
Device Device Address DDR DIMMA 1010 000Xb
ww
4 4
Smart Battery 0X16 Thermal Sensor NCT7718W 1001_100xb DDR DIMMB 1010 010Xb
Charger 0001 0010 b VGA 0x41(default) W lan Rsvd
PCH need to update

Issued Date 2015/02/26 Deciphered Date 2016/02/26 Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom
BY511/BY710 0.3

A B C D E
5 4 3 2 1
D
+3VALW_R D
m
Battery JBATT2 Change IC PU102
co
2.2K
BQ24780SRUYR
a.
EC_SMB_CK1
EC_SMB_DA1
si
C C
ne
+3VS_AON +3VALW_PCH
do
EC
UE1 2.2K 2.2K
IT8371E VGA( UV1 ) PCH( UH1 )
in
+3VS VGA_SMB_CK2
SML1CLK
VGA_SMB_DA2
SML1DATA
Thermal sensor U1
+3VS_AON +3VS F75303M
Dual MOS Control Dual MOS Control
i-
2.2K
B B
is
EC_SMB_CK2
EC_SMB_DA2
kn
te
A A
w.

Issued Date 2016/02/26 Blank4
ww
2015/02/26 Deciphered Date

Custom
BY511/BY710 0.3
5 4 3 2 1
5 4 3 2 1
[24] PCIE_CRX_GTX_N[0..15]
[24] PCIE_CRX_GTX_P[0..15]
VCCIO
PCIE_CTX_C_GRX_N[0..15] [24]
m
PCIE_CTX_C_GRX_P[0..15] [24] PEG_COMP 1 2 24.9_0402_1%
RC1
D D
UC1C SKYLAKE_HALO CAD Note:

Trace width=12 mils ,Spacing=15mil
co
BGA1440 Max length= 400 mils.
PCIE_CRX_GTX_P15E25 B25 PCIE_CTX_GRX_P15 OPT@ CC32 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P15
PCIE_CRX_GTX_N15D25 PEG_RXP[0] PEG_TXP[0] A25 PCIE_CTX_GRX_N15 OPT@ CC16 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N15
PEG_RXN[0] PEG_TXN[0]
PCIE_CRX_GTX_N14F24 PEG_RXP[1] PEG_TXP[1] C24 PCIE_CTX_GRX_N14 OPT@ CC15 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N14
a.
si
PCIE_CRX_GTX_N8F18 PEG_RXP[7] PEG_TXP[7] PCIE_CTX_GRX_N8 PCIE_CTX_C_GRX_N8
ne
C18 OPT@ CC9 1 2 0.22U_0402_10V6K
PCIE_CRX_GTX_P7D17 A17 PCIE_CTX_GRX_P7 OPT@ CC24 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P7
PCIE_CRX_GTX_N7E17 PEG_RXP[8] PEG_TXP[8] B17 PCIE_CTX_GRX_N7 OPT@ CC8 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N7
C PEG_RXN[8] PEG_TXN[8] C
PCIE_CRX_GTX_P6F16 C16 PCIE_CTX_GRX_P6 OPT@ CC23 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P6
do
in
i-
PEG_COMP G2
PEG_RCOMP
DMI_CRX_PTX_P0 D8 B8 DMI_CTX_PRX_P0
[19] DMI_CRX_PTX_P0 DMI_CRX_PTX_N0 E8 DMI_RXP[0] DMI_TXP[0] A8 DMI_CTX_PRX_N0 DMI_CTX_PRX_P0 [19]
[19] DMI_CRX_PTX_N0 DMI_CTX_PRX_N0 [19]
[19] DMI_CRX_PTX_P1
DMI_CRX_PTX_P1 E6
DMI_RXN[0]
DMI_RXP[1]
DMI_TXN[0]
DMI_TXP[1]
is
C6 DMI_CTX_PRX_P1
DMI_CTX_PRX_P1 [19]
B DMI_CRX_PTX_N1 F6 B6 DMI_CTX_PRX_N1 B
[19] DMI_CRX_PTX_N1 DMI_RXN[1] DMI_TXN[1] DMI_CTX_PRX_N1 [19]
DMI_CRX_PTX_P2 D5 B5 DMI_CTX_PRX_P2
[19] DMI_CRX_PTX_P2 DMI_CRX_PTX_N2 E5 DMI_RXP[2] DMI_TXP[2] A5 DMI_CTX_PRX_N2 DMI_CTX_PRX_P2 [19]
DMI_CRX_PTX_P3 J8 D4 DMI_CTX_PRX_P3
[19] DMI_CRX_PTX_P3 DMI_CRX_PTX_N3 J9 DMI_RXP[3] DMI_TXP[3] B4 DMI_CTX_PRX_N3 DMI_CTX_PRX_P3 [19]
kn

3 OF 14
SKYLAKE-H-CPU_BGA1440
te
w.
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A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 CPU (1/7) DMI,PEG
Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
Change RC28,RC29,RC15,RC13,RC16,RC17 to R-Short

VCCST
PCH_CPU_BCLK
RC28 1
RC29 1
2 0_0402_5%
2 0_0402_5%
CPU_BCLK
CPU_BCLK#
B31
A32
UC1E
BCLKP
SKYLAKE_HALO
BGA1440
CFG[0]
BN25
BN27
CFG0
CFG1 @ 1
CFG STRAPS for CPU
PAD
S
t
a
l
l
r
e
s
e
t
s
e
q
u
e
n
c
e
a
f
t
e
r
P
C
U
P
L
L
l
o
c
k
u
n
t
i
l
d
e
-
a
s
s
e
r
t
e
d
PCH_CPU_BCLK# BCLKN CFG[1] TC89
BN26 CFG2
H_THRMTRIP#_R RC15 1 CPU_PCIBCLK CFG[2]
1t
=l
(
D
e
f
a
u
l
t
)
N
o
r
m
a
l
O
p
e
r
a
t
i
o
n
;
RC11 1 2 2 0_0402_5% D35 BN28 CFG3
PCH_CPU_PCIBCLK CPU_PCIBCLK# PCI_BCLKP CFG[3] CFG3
*—
1K_0402_5% RC13 1 2 0_0402_5% C36 BR20 CFG4
PCH_CPU_PCIBCLK# PCI_BCLKN CFG[4]
N
o
s
a
l
.
BM20 CFG5
RC174 1 2 H_CATERR# RC17 1 2 0_0402_5% CPU_NSSC_CLK E31 CFG[5] BT20 CFG6
PCH_CPU_NSSC_CLK CPU_NSSC_CLK# CLK24P CFG[6]
0
=
S
t
a
l
l
.
RC16 1 2 0_0402_5% D31 BP20
10K_0402_5%
PCH_CPU_NSSC_CLK# CLK24N CFG[7]
CFG7
CFG0
CFG[8]
BR23
BR22
CFG8 @
CFG9 @
PAD
PAD
1
1 TC77 —
CFG[9] TC78
R
e
s
e
r
v
e
d
c
o
n
f
i
g
u
r
a
t
i
o
n
l
a
n
e
.
VCCST BT23 CFG10@ PAD 1
CFG[10] BT22 1 TC79
CFG11@ PAD
CFG[11] TC80
1
VCCST
m
BM19 CFG12@ PAD 1
CFG[12] TC81
D RC7 BR19 CFG13@ PAD 1 D
CFG[13] TC82
N
/
A
1K_0402_5% BP19 CFG14@ PAD 1
VR_SVID_ALRT#_R CFG[14] TC83
1
BH31 BT19 CFG15@ PAD 1

VR_SVID_CLK BH32 VIDALERT# CFG[15] TC84
RC76 CFG1
2
VR_SVID_DAT VIDSCK
co
56.2_0402_1% BH29 BN23 @ PAD 1
H_PROCHOT#_R VIDSOUT CFG[17] TC85
RC9 1 2 499_0402_1% BR30 BP23 @ PAD 1
H_PROCHOT# PROCHOT# CFG[16] TC86
P
C
I
E
x
p
r
e
s
s
*
S
t
a
t
i
c
x
1
6
L
a
n
e
N
u
m
b
e
r
i
n
g
R
e
v
e
r
s
a
l
.
BP22 @ PAD 1
CFG[19] TC87
2
DDR_PG_CTRL BT13 BN22 @ PAD 1

VR_SVID_ALRT#_R DDR_VTT_CNTL CFG[18] TC88
1
=
N
o
r
m
a
l
o
p
e
r
a
t
i
o
n
RC65 1 2 220_0402_5%
-SVID_ALERT VR_SVID_CLK
SVID_CLK VR_SVID_DAT BPM#[0]
BR27
BT27
@
@
PAD
PAD
1
1
TC27 —
SVID_DATA BPM#[1] BM31 1 TC28
@ PAD
VCCST_PWRGD BPM#[2] TC29
0
=
L
a
n
e
n
u
m
b
e
r
s
r
e
v
e
r
s
e
d
.
H13 BT30 1
VCCST_PWRGD BPM#[3]
@ PAD
TC42 CFG2
1
a.
RC32 1 2 0_0402_5% VCCPWRGOOD_0_R BT31
RC66 H_CPUPWRGD BUF_CPU_RST# PROCPWRGD *
R
e
s
e
r
v
e
d
c
o
n
f
i
g
u
r
a
t
i
o
n
l
a
n
e
.
100_0402_1% BP35 BT28 XDP_TDO
H_PM_SYNC BM34 RESET# PROC_TDO BL32
H_PM_SYNC H_PM_DOWN_R BP31 PM_SYNC PROC_TDI XDP_TDI
RC33 1 2 20_0402_1% BP28
H_PM_DOWN PM_DOWN PROC_TMS XDP_TMS
2
EC_PECI BT34 BR28

EC_PECI H_THRMTRIP#_R J31 PECI PROC_TCK XDP_TCK
N
/
A
RC34 1 2 0_0402_5%
H_THRMTRIP# THERMTRIP#
VCCST BP30
BR33 PROC_TRST# BL30 XDP_TRST#
BN1 SKTOCC# PROC_PREQ# BP27
XDP_PREQ# CFG3
PROC_SELECT# PROC_PRDY# XDP_PRDY#
si
H_CATERR#
e
D
P
e
n
a
b
l
e
BM30
CATERR# BT25
CFG_RCOMP
1
=
D
i
s
a
b
l
e
d
.
RC176
2
+3VALW +3VS
5 OF 14
RC175 51_0402_1% —
SKYLAKE-H-CPU_BGA1440 49.9_0402_1%
0
=
E
n
a
b
l
e
d
.
20150527_Mount CFG4
1
*—
@ RC176 to enable
1
2
ne
RC177 RC178 DCI function
UC1K SKYLAKE_HALO
100K_0402_5% 100K_0402_5%
BGA1440
P
C
I
E
x
p
r
e
s
s
*
B
i
f
u
r
c
a
t
i
o
n
1 PAD @ D1 BM33 @ PAD 1
1
C TC100 1 E1 RSVD_TP_1 RSVD_TP_7 BL33 1 TC90 C

PAD @ @ PAD
SM_PG_CTRL TC101 RSVD_TP_2 RSVD_TP_8 TC91
+1.2V 1 PAD @ E3
SM_PG_CTRL TC102 RSVD_TP_3
0
0
=
1
x
8
,
2
x
4
P
C
I
E
x
p
r
e
s
s
*
1 PAD @ E2 BJ14 @ PAD 1
TC103 RSVD_TP_4 RSVD_TP_9 TC92
—
BJ13 @ PAD 1
RSVD_TP_10 TC93
1 PAD @ BR1
0
1
=
r
e
s
e
r
v
e
d
TC104 1 PAD BT2 RSVD_TP_5 BK28
1
do
C TC105
—
RSVD_TP_6 RSVD_43 BJ28
2 QC1 RSVD_44
1
0
=
2
x
8
P
C
I
E
x
p
r
e
s
s
*
BN35
B MMBT3904WH_SOT323-3 RSVD_23 CFG[6:5]
—
E BJ18
VSS_447
3
J24
1
1
=
1
x
1
6
P
C
I
E
x
p
r
e
s
s
*
H24 RSVD_24 BJ16 @ PAD 1
*—
DDR_PG_CTRL RSVD_25 RSVD_TP_11 TC94
BN33 BK16 @ PAD 1
RSVD_26 RSVD_TP_12 TC95
BL34
RSVD_27
P
E
G
T
r
a
i
n
i
n
g
N29 BK24 @ PAD 1
TC96
2
@ RSVD_28 RSVD_TP_13
in
R14 BJ24 @ PAD 1
RC179 RSVD_29 RSVD_TP_14 TC97
1e
=i
(t
dle
ey
f a
afs
uos
lle
tlr
)ot
Pw
Ei
Gn
T
r
a
i
n
AE29
RSVD_30
10K_0402_5% AA14 BK21
*—
i
m R0
mE
dS
aT
e
g O
RSVD_31 RSVD_45 BJ21
A36 RSVD_46
E=
#P
dW
ir
oB
nI
.
1
A37 RSVD_32 BT17

RSVD_33 RSVD_47 CFG7
E
G
a
i
t
f
o
S
f
o
r
t
r
a
i
n
i
n
g
.
BR17
CPU_TRIGIN H23 RSVD_48
CPU_TRIGIN PCH_TRIGIN RC4 1 2 CPU_TRIGOUT J23 PROC_TRIGIN BK18 —
PCH_TRIGIN PROC_TRIGOUT VSS_448
N
e
e
de
c
o
n
f
i
r
mo
w
i
t
hr
I
n
t
e
l
i
fa
t
h
i
s
r
e
s
e
r
v
e
d
c
i
r
c
u
i
t
c
a
n
b
e
d
e
l
e
t
e
d
.
i-
30_0402_1% F30 BJ34 @ PAD 1
R
e
s
r
v
e
d
c N
n
f
i
g
u
a
t
i
o
n
l
n
e
.
E30 BJ33 @ PAD 1
B30
/
A
C30 RSVD_36
20150729 RSVD_37 G13
RSVD_49
1. Change R10022 and R9994 G3
RSVD_38 RSVD_50
AJ8 CFG[19:8]
to SD02810028J J3 BL31
RSVD_39 RSVD_51
+3VS +3VALW B2
VCCST
is BR35
NCTF_1
NCTF_2
NCTF_3
B38
BP1
BR2
B RSVD_40 NCTF_4 B
BR31 C1
BH30 RSVD_41 NCTF_5 C38
2
2
@ RSVD_42 NCTF_6 VCCIO

R9994 11 OF 14
R10022
1
10K_0402_5% 10K_0402_5% SKYLAKE-H-CPU_BGA1440

RC75
1K_0402_5%
kn
1
1
Change RC22 to 0ohm jump after SDV phase
1
1
1
RC50 RC22 1 2 0_0402_5% BUF_CPU_RST#
1 2 60.4_0402_1% VCCST_PWRGD CPU_PLTRST# RC139 RC140 RC141 RC142 RC143 RC144
1K_0402_5% 1K_0402_5% 1K_0402_5% 1K_0402_5% 1K_0402_5% 1K_0402_5%
@ @ @
2
2
2
1
Q2 D @
CFG7
1
Q1 D 2 CFG1 CFG6
te
CPUCORE_ON 2 G VCCST
CPUCORE_ON CFG5
G CFG4
S 2N7002KW_SOT323-3
CFG2
3
S 2N7002KW_SOT323-3 CFG0
3
1
1
1
RC57
1
1K_0402_1% RC56 RC53 RC54 RC52 RC51 RC55

@ RC146
1K_0402_5% 1K_0402_5% 1K_0402_5% 1K_0402_5% 1K_0402_5% 1K_0402_5%
1K_0402_5%
w.
@ @ @ @
2
2
2
2
2
XDP_PREQ#
ww
A A
Issued Date 2015/02/26 Deciphered Date 2016/02/26 CPU (2/7) PM, XDP, CLK, CFG
C
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
SKYLAKE_HALO UC1A SKYLAKE_HALO UC1B

DDRA_DQ[0..63] [12] DDRB_DQ[0..63] [13]
AG1 BGA1440 BR6 DDRA_DQ0 AM9 BGA1440 BT11 DDRB_DQ0
[12] DDRA_CLK0 DDR0_CKP[0] DDR0_DQ[0] DDRA_DQ1 [13] DDRB_CLK0 DDR1_CKP[0] DDR1_DQ[0]/DDR0_DQ[16] DDRB_DQ1
AG2 BT6 AN9 BR11
[12] DDRA_CLK0# AK1 DDR0_CKN[0] DDR0_DQ[1] BP3 DDRA_DQ2 [13] DDRB_CLK0# AM8 DDR1_CKN[0] DDR1_DQ[1]/DDR0_DQ[17] BT8 DDRB_DQ2
[12] DDRA_CLK1# DDR0_CKN[1] DDR0_DQ[2] DDRA_DQ3 [13] DDRB_CLK1# DDR1_CKN[1] DDR1_DQ[2]/DDR0_DQ[18] DDRB_DQ3
AK2 BR3 AM7 BR8
[12] DDRA_CLK1 DDR0_CKP[1] DDR0_DQ[3] DDRA_DQ4 [13] DDRB_CLK1 DDR1_CKP[1] DDR1_DQ[3]/DDR0_DQ[19] DDRB_DQ4
AL3 BN5 AM11 BP11
AK3 DDR0_CLKP[2] DDR0_DQ[4] BP6 DDRA_DQ5 AM10 DDR1_CLKP[2] DDR1_DQ[4]/DDR0_DQ[20] BN11 DDRB_DQ5
AL2 DDR0_CLKN[2] DDR0_DQ[5] BP2 DDRA_DQ6 AJ10 DDR1_CLKN[2] DDR1_DQ[5]/DDR0_DQ[21] BP8 DDRB_DQ6
AL1 DDR0_CLKP[3] DDR0_DQ[6] BN3 DDRA_DQ7 AJ11 DDR1_CLKP[3] DDR1_DQ[6]/DDR0_DQ[22] BN8 DDRB_DQ7
m
DDR0_CLKN[3] DDR0_DQ[7] BL4 DDRA_DQ8 DDR1_CLKN[3] DDR1_DQ[7]/DDR0_DQ[23] BL12 DDRB_DQ8
D
AT1 DDR0_DQ[8] BL5 DDRA_DQ9 AT8 DDR1_DQ[8]/DDR0_DQ[24] BL11 DDRB_DQ9 D
[12] DDRA_CKE0 AT2 DDR0_CKE[0] DDR0_DQ[9] BL2 DDRA_DQ10 [13] DDRB_CKE0 AT10 DDR1_CKE[0] DDR1_DQ[9]/DDR0_DQ[25] BL8 DDRB_DQ10
[12] DDRA_CKE1 DDR0_CKE[1] DDR0_DQ[10] DDRA_DQ11 [13] DDRB_CKE1 DDR1_CKE[1] DDR1_DQ[10]/DDR0_DQ[26] DDRB_DQ11
AT3 BM1 AT7 BJ8
DDR0_CKE[2] DDR0_DQ[11] DDRA_DQ12 DDR1_CKE[2] DDR1_DQ[11]/DDR0_DQ[27] DDRB_DQ12
co
AT5 BK4 AT11 BJ11
DDR0_CKE[3] DDR0_DQ[12] BK5 DDRA_DQ13 DDR1_CKE[3] DDR1_DQ[12]/DDR0_DQ[28] BJ10 DDRB_DQ13
AD5 DDR0_DQ[13] BK1 DDRA_DQ14 AF11 DDR1_DQ[13]/DDR0_DQ[29] BL7 DDRB_DQ14
[12] DDRA_CS0# AE2 DDR0_CS#[0] DDR0_DQ[14] BK2 DDRA_DQ15 [13] DDRB_CS0# AE7 DDR1_CS#[0] DDR1_DQ[14]/DDR0_DQ[30] BJ7 DDRB_DQ15
[12] DDRA_CS1# DDR0_CS#[1] DDR0_DQ[15] DDRA_DQ16 [13] DDRB_CS1# DDR1_CS#[1] DDR1_DQ[15]/DDR0_DQ[31] DDRB_DQ16
AD2 BG4 AF10 BG11
AE5 DDR0_CS#[2] DDR0_DQ[16]/DDR0_DQ[32] BG5 DDRA_DQ17 AE10 DDR1_CS#[2] DDR1_DQ[16]/DDR0_DQ[48] BG10 DDRB_DQ17
DDR0_CS#[3] DDR0_DQ[17]/DDR0_DQ[33] BF4 DDRA_DQ18 DDR1_CS#[3] DDR1_DQ[17]/DDR0_DQ[49] BG8 DDRB_DQ18
DDRA_ODT0 AD3 DDR0_DQ[18]/DDR0_DQ[34] BF5 DDRA_DQ19 DDRB_ODT0 AF7 DDR1_DQ[18]/DDR0_DQ[50] BF8 DDRB_DQ19
[12] DDRA_ODT0 DDRA_ODT1 AE4 DDR0_ODT[0] DDR0_DQ[19]/DDR0_DQ[35] BG2 DDRA_DQ20 [13] DDRB_ODT0 DDRB_ODT1 AE8 DDR1_ODT[0] DDR1_DQ[19]/DDR0_DQ[51] BF11 DDRB_DQ20
[12] DDRA_ODT1 DDR0_ODT[1] DDR0_DQ[20]/DDR0_DQ[36] DDRA_DQ21 [13] DDRB_ODT1 DDR1_ODT[1] DDR1_DQ[20]/DDR0_DQ[52] DDRB_DQ21
AE1 BG1 AE9 BF10
DDR0_ODT[2] DDR0_DQ[21]/DDR0_DQ[37] DDRA_DQ22 DDR1_ODT[2] DDR1_DQ[21]/DDR0_DQ[53] DDRB_DQ22
a.
AD4 BF1 AE11 BG7
DDR0_ODT[3] DDR0_DQ[22]/DDR0_DQ[38] BF2 DDRA_DQ23 DDR1_ODT[3] DDR1_DQ[22]/DDR0_DQ[54] BF7 DDRB_DQ23
AH5 DDR0_DQ[23]/DDR0_DQ[39] BD2 DDRA_DQ24 AH10 DDR1_DQ[23]/DDR0_DQ[55] BB11 DDRB_DQ24
[12] DDRA_BA0 AH1 DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR0_DQ[24]/DDR0_DQ[40] BD1 DDRA_DQ25 [13] DDRB_MA16_RAS# AH11 DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] DDR1_DQ[24]/DDR0_DQ[56] BC11 DDRB_DQ25
[12] DDRA_BA1 DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR0_DQ[25]/DDR0_DQ[41] DDRA_DQ26 [13] DDRB_MA14_WE# DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR1_DQ[25]/DDR0_DQ[57] DDRB_DQ26
AU1 BC4 AF8 BB8
[12] DDRA_BG0 DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR0_DQ[26]/DDR0_DQ[42] BC5 DDRA_DQ27 [13] DDRB_MA15_CAS# DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] DDR1_DQ[26]/DDR0_DQ[58] BC8 DDRB_DQ27
AH4 DDR0_DQ[27]/DDR0_DQ[43] BD5 DDRA_DQ28 AH8 DDR1_DQ[27]/DDR0_DQ[59] BC10 DDRB_DQ28
[12] DDRA_MA16_RAS# DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR0_DQ[28]/DDR0_DQ[44] DDRA_DQ29 [13] DDRB_BA0 DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] DDR1_DQ[28]/DDR0_DQ[60] DDRB_DQ29
AG4 BD4 AH9 BB10
[12] DDRA_MA14_WE# AD1 DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] DDR0_DQ[29]/DDR0_DQ[45] BC1 DDRA_DQ30 [13] DDRB_BA1 AR9 DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_DQ[29]/DDR0_DQ[61] BC7 DDRB_DQ30
[12] DDRA_MA15_CAS# DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR0_DQ[30]/DDR0_DQ[46] DDRA_DQ31 [13] DDRB_BG0 DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_DQ[30]/DDR0_DQ[62] DDRB_DQ31
BC2 BB7
[12] DDRA_MA[0..9] [13] DDRB_MA[0..9]
si
DDRA_MA0 AH3 DDR0_DQ[31]/DDR0_DQ[47] AB1 DDRA_DQ32 DDRB_MA0 AJ9 DDR1_DQ[31]/DDR0_DQ[63] AA11 DDRB_DQ32
DDRA_MA1 AP4 DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR0_DQ[32]/DDR1_DQ[0] AB2 DDRA_DQ33 DDRB_MA1 AK6 DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] DDR1_DQ[32]/DDR1_DQ[16] AA10 DDRB_DQ33
DDRA_MA2 AN4 DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_DQ[33]/DDR1_DQ[1] AA4 DDRA_DQ34 DDRB_MA2 AK5 DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_DQ[33]/DDR1_DQ[17] AC11 DDRB_DQ34
DDRA_MA3 AP5 DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR0_DQ[34]/DDR1_DQ[2] AA5 DDRA_DQ35 DDRB_MA3 AL5 DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] DDR1_DQ[34]/DDR1_DQ[18] AC10 DDRB_DQ35
DDRA_MA4 AP2 DDR0_MA[3] DDR0_DQ[35]/DDR1_DQ[3] AB5 DDRA_DQ36 DDRB_MA4 AL6 DDR1_MA[3] DDR1_DQ[35]/DDR1_DQ[19] AA7 DDRB_DQ36
DDRA_MA5 AP1 DDR0_MA[4] DDR0_DQ[36]/DDR1_DQ[4] AB4 DDRA_DQ37 DDRB_MA5 AM6 DDR1_MA[4] DDR1_DQ[36]/DDR1_DQ[20] AA8 DDRB_DQ37
DDRA_MA6 AP3 DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_DQ[37]/DDR1_DQ[5] AA2 DDRA_DQ38 DDRB_MA6 AN7 DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_DQ[37]/DDR1_DQ[21] AC8 DDRB_DQ38
DDRA_MA7 AN1 DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_DQ[38]/DDR1_DQ[6] AA1 DDRA_DQ39 DDRB_MA7 AN10 DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_DQ[38]/DDR1_DQ[22] AC7 DDRB_DQ39
DDRA_MA8 AN3 DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR0_DQ[39]/DDR1_DQ[7] V5 DDRA_DQ40 DDRB_MA8 AN8 DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR1_DQ[39]/DDR1_DQ[23] W8 DDRB_DQ40
DDRA_MA9 AT4 DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_DQ[40]/DDR1_DQ[8] V2 DDRA_DQ41 DDRB_MA9 AR11 DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_DQ[40]/DDR1_DQ[24] W7 DDRB_DQ41
ne
DDRA_MA10_AP AH2 DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_DQ[41]/DDR1_DQ[9] U1 DDRA_DQ42 DDRB_MA10_AP AH7 DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_DQ[41]/DDR1_DQ[25] V10 DDRB_DQ42
[12] DDRA_MA10_AP DDRA_MA11 DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR0_DQ[42]/DDR1_DQ[10] DDRA_DQ43 [13] DDRB_MA10_AP DDRB_MA11 DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] DDR1_DQ[42]/DDR1_DQ[26] DDRB_DQ43
AN2 U2 AN11 V11
[12] DDRA_MA11 DDRA_MA12 DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR0_DQ[43]/DDR1_DQ[11] DDRA_DQ44 [13] DDRB_MA11 DDRB_MA12 DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDR1_DQ[43]/DDR1_DQ[27] DDRB_DQ44
AU4 V1 AR10 W11
[12] DDRA_MA12 DDRA_MA13 AE3 DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_DQ[44]/DDR1_DQ[12] V4 DDRA_DQ45 [13] DDRB_MA12 DDRB_MA13 AF9 DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_DQ[44]/DDR1_DQ[28] W10 DDRB_DQ45
[12] DDRA_MA13 DDRA_BG1 DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDR0_DQ[45]/DDR1_DQ[13] DDRA_DQ46 [13] DDRB_MA13 DDRB_BG1 DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] DDR1_DQ[45]/DDR1_DQ[29] DDRB_DQ46
C AU2 U5 AR7 V7 C
[12] DDRA_BG1 DDRA_ACT# AU3 DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR0_DQ[46]/DDR1_DQ[14] U4 DDRA_DQ47 [13] DDRB_BG1 DDRB_ACT# AT9 DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR1_DQ[46]/DDR1_DQ[30] V8 DDRB_DQ47
[12] DDRA_ACT# DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_DQ[47]/DDR1_DQ[15] DDRA_DQ48 [13] DDRB_ACT# DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_DQ[47]/DDR1_DQ[31] DDRB_DQ48
R2 R11
DDRA_PARITY AG3 DDR0_DQ[48]/DDR1_DQ[32] P5 DDRA_DQ49 DDRB_PARITY AJ7 DDR1_DQ[48] P11 DDRB_DQ49
[12] DDRA_PARITY DDRA_ALERT# AU5 DDR0_PAR DDR0_DQ[49]/DDR1_DQ[33] R4 DDRA_DQ50 [13] DDRB_PARITY DDRB_ALERT# AR8 DDR1_PAR DDR1_DQ[49] P7 DDRB_DQ50
[12] DDRA_ALERT# DDR0_ALERT# DDR0_DQ[50]/DDR1_DQ[34] DDRA_DQ51 [13] DDRB_ALERT# DDR1_ALERT# DDR1_DQ[50] DDRB_DQ51
P4 R8
do
DDR0_DQ[51]/DDR1_DQ[35] R5 DDRA_DQ52 DDR1_DQ[51] R10 DDRB_DQ52
DDRA_DQS#0 DDR0_DQ[52]/DDR1_DQ[36] DDRA_DQ53 [13] DDRB_DQS#[0..7] DDRB_DQS#0 DDR1_DQ[52] DDRB_DQ53
BR5 P2 BP9 P10
DDRA_DQS#1 BL3 DDR0_DQSN[0] DDR0_DQ[53]/DDR1_DQ[37] R1 DDRA_DQ54 DDRB_DQS#1 BL9 DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQ[53] R7 DDRB_DQ54
DDRA_DQS#2 BG3 DDR0_DQSN[1] DDR0_DQ[54]/DDR1_DQ[38] P1 DDRA_DQ55 DDRB_DQS#2 BG9 DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQ[54] P8 DDRB_DQ55
DDRA_DQS#3 BD3 DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQ[55]/DDR1_DQ[39] M4 DDRA_DQ56 DDRB_DQS#3 BC9 DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQ[55] L11 DDRB_DQ56
DDRA_DQS4 AB3 DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQ[56]/DDR1_DQ[40] M1 DDRA_DQ57 DDRB_DQS#4 AC9 DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQ[56] M11 DDRB_DQ57
DDRA_DQS5 V3 DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQ[57]/DDR1_DQ[41] L4 DDRA_DQ58 DDRB_DQS#5 W9 DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQ[57] L7 DDRB_DQ58
DDRA_DQS6 R3 DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQ[58]/DDR1_DQ[42] L2 DDRA_DQ59 DDRB_DQS#6 R9 DDR1_DQSN[5]/DDR1_DQSN[3] DDR1_DQ[58] M8 DDRB_DQ59
DDRA_DQS7 M3 DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQ[59]/DDR1_DQ[43] M5 DDRA_DQ60 DDRB_DQS#7 M9 DDR1_DQSN[6] DDR1_DQ[59] L10 DDRB_DQ60
DDR0_DQSP[7]/DDR1_DQSP[5] DDR0_DQ[60]/DDR1_DQ[44] M2 DDRA_DQ61 DDR1_DQSN[7] DDR1_DQ[60] M10 DDRB_DQ61
in
DDRA_DQS0 BP5 DDR0_DQ[61]/DDR1_DQ[45] L5 DDRA_DQ62 [13] DDRB_DQS[0..7] DDRB_DQS0 BR9 DDR1_DQ[61] M7 DDRB_DQ62
DDRA_DQS1 BK3 DDR0_DQSP[0] DDR0_DQ[62]/DDR1_DQ[46] L1 DDRA_DQ63 DDRB_DQS1 BJ9 DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQ[62] L8 DDRB_DQ63
DDRA_DQS2 BF3 DDR0_DQSP[1] DDR0_DQ[63]/DDR1_DQ[47] DDRB_DQS2 BF9 DDR1_DQSP[1]/DDR0_DQSP[3] DDR1_DQ[63]
DDRA_DQS3 BC3 DDR0_DQSP[2]/DDR0_DQSP[4] BA2 DDRB_DQS3 BB9 DDR1_DQSP[2]/DDR0_DQSP[6] AW11
DDRA_DQS#4 AA3 DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_ECC[0] BA1 DDRB_DQS4 AA9 DDR1_DQSP[3]/DDR0_DQSP[7] DDR1_ECC[0] AY11
DDRA_DQS#5 U3 DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_ECC[1] AY4 DDRB_DQS5 V9 DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_ECC[1] AY8
DDRA_DQS#6 P3 DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_ECC[2] AY5 DDRB_DQS6 P9 DDR1_DQSP[5]/DDR1_DQSP[3] DDR1_ECC[2] AW8
DDRA_DQS#7 L3 DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_ECC[3] BA5 DDRB_DQS7 L9 DDR1_DQSP[6] DDR1_ECC[3] AY10
DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_ECC[4] BA4 DDR1_DQSP[7] DDR1_ECC[4] AW10
DDR0_ECC[5] DDR1_ECC[5]
i-
AY3 AY1 AW9 AY7
BA3 DDR0_DQSP[8] DDR0_ECC[6] AY2 AY9 DDR1_DQSP[8] DDR1_ECC[6] AW7
DDR0_DQSN[8] DDR0_ECC[7] DDR1_DQSN[8] DDR1_ECC[7]
DDRA_DQS#[0..7] [12] DDR CHANNEL B
DDRA_DQS[0..7] [12]
DDR CHANNEL RC147 1 2 0_0402_5% +V_DDR_REFA_R BN13 G1 SM_RCOMP0
+VREF_CA_DIMMA_R DDR_VREF_CA DDR_RCOMP[0]
A
PAD @ TC109 1 +VREF_DQ_DIMM_R RC36 1 2 0_0402_5% @ +V_DDR_REF_R BP13 H1 SM_RCOMP1
1 OF 14 RC37 1 2 0_0402_5% +V_DDR_REFB_R BR13 DDR0_VREF_DQ 2 OF 14 DDR_RCOMP[1] J2 SM_RCOMP2
+VREF_DQ_DIMMB_R DDR1_VREF_DQ DDR_RCOMP[2]
is CAD Note: SKYLAKE-H-CPU_BGA1440
B Trace width= 20 mil, Spcing=20 mils B
DDR_VREF_CA : Connected to VREF_CA on DIMM CH-A

DDR0_VREF_DQ : NC
DDR1_VREF_DQ : Connected to VREF_CA on DIMM CH-B
DDR4 COMPENSATION SIGNALS
kn
SM_RCOMP0 RC5 1 2 121_0402_1%

SM_RCOMP1 RC6 1 2 75_0402_1%
SM_RCOMP2 RC8 1 2 100_0402_1%
CAD Note:
Trace width=12~15 mil, Spcing=20 mils
te
Max trace length= 500 mil

w.
ww
A A
Issued Date 2015/02/26 Deciphered Date 2016/02/26 CPU (3/7) DDRVI

C
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
UC1D SKYLAKE_HALO
HDMI_TX2+ K36 BGA1440 D29 CPU_EDP_TX0+
m
[35] HDMI_TX2+ HDMI_TX2- K37 DDI1_TXP[0] EDP_TXP[0] E29 CPU_EDP_TX0- CPU_EDP_TX0+ [34]
D
HDMI D2 [35] HDMI_TX2- HDMI_TX1+ DDI1_TXN[0] EDP_TXN[0] CPU_EDP_TX1+ CPU_EDP_TX0- [34] D
J35 F28
[35] HDMI_TX1+ HDMI_TX1- J34 DDI1_TXP[1] EDP_TXP[1] E28 CPU_EDP_TX1- CPU_EDP_TX1+ [34]
HDMI D1 [35] HDMI_TX1- HDMI_TX0+ H37 DDI1_TXN[1] EDP_TXN[1] B29 CPU_EDP_TX2- CPU_EDP_TX1- [34]
[35] HDMI_TX0+ DDI1_TXP[2] EDP_TXN[2] CPU_EDP_TX2- [34]
co
HDMI_TX0- H36 A29 CPU_EDP_TX2+
HDMI D0 [35] HDMI_TX0- HDMI_TXC+ DDI1_TXN[2] EDP_TXP[2] CPU_EDP_TX3- CPU_EDP_TX2+ [34]
J37 B28
[35] HDMI_TXC+ HDMI_TXC- J38 DDI1_TXP[3] EDP_TXN[3] C28 CPU_EDP_TX3+ CPU_EDP_TX3- [34]
HDMI CLK [35] HDMI_TXC- DDI1_TXN[3] EDP_TXP[3] CPU_EDP_TX3+ [34]
D27 C26 CPU_EDP_AUX
E27 DDI1_AUXP EDP_AUXP B26 CPU_EDP_AUX# CPU_EDP_AUX [34]
DDI1_AUXN EDP_AUXN CPU_EDP_AUX# [34]
H34
H33 DDI2_TXP[0]
a.
F37 DDI2_TXN[0] A33 VCCIO
G38 DDI2_TXP[1] EDP_DISP_UTIL
F34 DDI2_TXN[1]
F35 DDI2_TXP[2] D37 EDP_COMP 2 1
E37 DDI2_TXN[2] EDP_RCOMP 24.9_0402_1% RC49
E36 DDI2_TXP[3]
DDI2_TXN[3]
F26 COMPENSATION PU FOR eDP
si
E26 DDI2_AUXP
DDI2_AUXN CAD Note:Trace width=20 mils ,Spacing=25mil,
C34
DDI3_TXP[0]
Max length=100 mils.
D34
B36 DDI3_TXN[0]
B34 DDI3_TXP[1]
F33 DDI3_TXN[1]
E33 DDI3_TXP[2]
DDI3_TXN[2]
ne
C33
B33 DDI3_TXP[3]
DDI3_TXN[3] G27 PROC_AUDIO_CLK_CPU
PROC_AUDIO_CLK PROC_AUDIO_CLK_CPU [16]
A27 G25 PROC_AUDIO_SDO_CPU
DDI3_AUXP PROC_AUDIO_SDI PROC_AUDIO_SDO_CPU [16]
C B27 G29 PROC_AUDIO_SDI_CPU_R 20_0402_1% 1 2 RC180 C
DDI3_AUXN PROC_AUDIO_SDI_CPU [16]
4 OF 14 PROC_AUDIO_SDO
Place near CPU.
Need create 5% P/N
do
1
RH762
33_0402_5%
@
2
in
1
CH264
10P_0402_50V8J
@ 2
i-
is
B B
kn
te
w.
ww
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 CPU (4/7) eDP, DDI
Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
VCCGFXCORE
UC1N SKYLAKE_HALO
VCCGFXCORE
AJ29 BGA1440
VCCCPUCORE AJ30 VCCGT_109
UC1G SKYLAKE_HALO VCCCPUCORE AJ31 VCCGT_110 AF29
AJ32 VCCGT_111 VCCGTX_1 AF30
BGA1440 AJ33 VCCGT_112 VCCGTX_2 AF31
AA13 V32 AJ34 VCCGT_113 VCCGTX_3 AF32
AA31 VCC_1 VCC_64 V33 AJ35 VCCGT_114 VCCGTX_4 AF33
AA32 VCC_2 VCC_65 V34 AJ36 VCCGT_115 VCCGTX_5 AF34
AA33 VCC_3 VCC_66 V35 AK31 VCCGT_116 VCCGTX_6 AG13
AA35 VCC_5 VCC_68 V37 AK33 VCCGT_118 VCCGTX_8 AG31 VCCGFXCORE
VCC_7 VCC_70 VCCGT_120 VCCGTX_10 VCCGFXCORE
CRB place to CPU
AA37 W13 AK35 AG33
AA38 VCC_8 VCC_71 W14 AK36 VCCGT_121 VCCGTX_11 AG34 VCCGFXCORE
VCC_9 VCC_72 VCCGT_122 VCCGTX_12
AB29
AB30
AB31
VCC_10
VCC_11
VCC_73
VCC_74
W29
W30
W31
AK37
AK38
AL13
VCCGT_123
VCCGT_124
VCCGTX_13
VCCGTX_14
AG35
AG36
AH13
UC1H SKYLAKE_HALO VCCGT_SENSE
1
VCC_12 VCC_75 VCCGT_125 VCCGTX_15 BG34 BGA1440 AV29 RC60
AB32 W32 AL29 AH14 VCCGT_1 VCCGT_55
VCC_13 VCC_76 VCCGT_126 VCCGTX_16 BG35 AV30 100_0402_1%
AB36 VCC_14 VCC_77 W36 AL31 VCCGT_127 VCCGTX_17 AH30 BG36 AV31
D VCC_15 VCC_78 VCCGT_128 VCCGTX_18 BH33 VCCGT_3 VCCGT_57 AV32 D
VCC_16 VCC_79 VCCGT_129 VCCGTX_19 BH34 AV33
2
AB38 W38 AL35 AH32 VCCGT_SENSE_R
m
VCC_17 VCC_80 VCCGT_130 VCCGTX_20 BH35 VCCGT_5 VCCGT_59 AV34 RC40 1 2
AC13 Y29 AL36 AJ13 VCCGT_6 VCCGT_60 [56] VCCGT_SENSE
VCC_18 VCC_81 VCCGT_131 VCCGTX_21 BH36 AV35 0_0402_5% VSSGT_SENSE_R
AC14 Y30 AL37 AJ14 VCCGT_7 VCCGT_61
VCC_19 VCC_82 VCCGT_132 VCCGTX_22 BH37 AV36 RC41 1 2
AC29 Y31 AL38 VCCGT_8 VCCGT_62 [56] VSSGT_SENSE
AC30 VCC_20 VCC_83 Y32 AM13 VCCGT_133 BH38 AW14 0_0402_5%
1
VCC_21 VCC_84 VCCGT_134 BJ37 VCCGT_9 VCCGT_63 AW31
AC31 Y33 AM14 VCCGT_10 VCCGT_64
AC32 VCC_22 VCC_85 Y34 AM29 VCCGT_135 BJ38 AW32
VCC_23 VCC_86 VCCGT_136 BL36 VCCGT_11 VCCGT_65 AW33 RC63
co
VCC_24 VCC_87 VCCGT_137 BL37 AW34 100_0402_1%
VCC_25 VCC_88 VCCGT_138 BM36 AW35
2
AC35 L14 AM32 VCCGT_14 VCCGT_68
AC36 VCC_26 VCC_89 P29 AM33 VCCGT_139 BM37 AW36
VCC_27 VCC_90 VCCGT_140 BN36 VCCGT_15 VCCGT_69 AW37
AD13 P30 AM34 VCCGT_16 VCCGT_70
AD14 VCC_28 VCC_91 P31 AM35 VCCGT_141 BN37 AW38
VCC_29 VCC_92 VCCGT_142 BN38 VCCGT_17 VCCGT_71 AY29
AD31 P32 AM36 VCCGT_18 VCCGT_72
AD32 VCC_30 VCC_93 P33 AN13 VCCGT_143 BP37 AY30
VCC_31 VCC_94 VCCGT_144 BP38 VCCGT_19 VCCGT_73 AY31
AD33 P34 AN14 VCCGT_20 VCCGT_74
AD34 VCC_32 VCC_95 P35 AN31 VCCGT_145 BR37 AY32
VCC_33 VCC_96 VCCGT_146 BT37 VCCGT_21 VCCGT_75 AY35
AD35 P36 AN32 VCCGT_22 VCCGT_76
AD36 VCC_34 VCC_97 R13 AN33 VCCGT_147 BE38 AY36
VCC_35 VCC_98 VCCGT_148 BF13 VCCGT_23 VCCGT_77 AY37
AD37 R31 AN34 VCCGT_24 VCCGT_78
AD38 VCC_36 VCC_99 R32 AN35 VCCGT_149 BF14 AY38
VCC_37 VCC_100 VCCGT_150 BF29 VCCGT_25 VCCGT_79 BA13
AE13 R33 AN36 VCCGT_26 VCCGT_80
AE14 VCC_38 VCC_101 R34 AN37 VCCGT_151 BF30 BA14
a.
VCC_39 VCC_102 VCCGT_152 BF31 VCCGT_27 VCCGT_81 BA29
AE30 R35 AN38 VCCGT_28 VCCGT_82
AE31 VCC_40 VCC_103 R36 AP13 VCCGT_153 BF32 BA30
VCC_41 VCC_104 VCCGT_154 BF35 VCCGT_29 VCCGT_83 BA31 CRB place to CPU
AE32 R37 AP14 VCCGT_30 VCCGT_84
AE35 VCC_42 VCC_105 R38 AP29 VCCGT_155 BF36 BA32
VCC_43 VCC_106 VCCGT_156 BF37 VCCGT_31 VCCGT_85 BA33 VCCCPUCORE
AE36 T29 AP30 VCCGT_32 VCCGT_86
AE37 VCC_44 VCC_107 T30 AP31 VCCGT_157 BF38 BA34
AE38
AF35
VCC_45
VCC_46
VCC_108
VCC_109
T31
T32
AP32
AP35
VCCGT_158
VCCGT_159
BG29
BG30
VCCGT_33
VCCGT_34
VCCGT_87
VCCGT_88
BA35
BA36
VCC_SENSE
1
VCC_47 VCC_110 VCCGT_160 BG31 VCCGT_35 VCCGT_89 BB13 RC59
AF36 T35 AP36 VCCGT_36 VCCGT_90
AF37 VCC_48 VCC_111 T36 AP37 VCCGT_161 BG32 BB14 100_0402_1%
VCC_49 VCC_112 VCCGT_162 BG33 VCCGT_37 VCCGT_91 BB31
AF38 T37 AP38 VCCGT_38 VCCGT_92
K13 VCC_50 VCC_113 T38 AR29 VCCGT_163 BC36 BB32
VCC_51 VCC_114 VCCGT_164 BC37 VCCGT_39 VCCGT_93 BB33
K14 U29 AR30 CAD Note: RC38 SHOULD BE PLACED CLOSE TO CPU
2
VCC_52 VCC_115 VCCGT_165 BC38 VCCGT_40 VCCGT_94 BB34
L13 U30 AR31 VCCGT_41 VCCGT_95
VCC_53 VCC_116 VCCGT_166 BD13 BB35
si
N13 U31 AR32 VCCGT_42 VCCGT_96 VCCCORE_SENSE VCCSENSE_R
N14 VCC_54 VCC_117 U32 AR33 VCCGT_167 AH38 VCCGT_SENSE_R BD14 BB36 RC38 1 2
VCCGT_43 VCCGT_97 [56] VCCCORE_SENSE
N30 VCC_55 VCC_118 U33 AR34 VCCGT_168 VCCGT_SENSE AH35 @ PAD 1 BD29 BB37 0_0402_5%
VCC_56 VCC_119 VCCGT_169 VSSGTX_SENSE VSSGT_SENSE_R TC60 BD30 VCCGT_44 VCCGT_98 BB38
N31 U34 AR35 AH37 VCCGT_45 VCCGT_99
VCC_57 VCC_120 VCCGT_170 VSSGT_SENSE BD31 BC29
N32
VCC_58 VCC_121
U35 AR36
VCCGT_171 VCCGTX_SENSE
AH36 @ PAD 1
TC62 BD32 VCCGT_46 VCCGT_100 BC30
CAD Note: RC39 SHOULD BE PLACED CLOSE TO CPU
N35 U36 AT14 VCCGT_47 VCCGT_101
N36 VCC_59 VCC_122 V13 AT31 VCCGT_172 BD33 BC31
VCCGT_48 VCCGT_102 VSSCORE_SENSE VSSSENSE_R
N37 VCC_60 VCC_123 V14 AT32 VCCGT_173 BD34 BC32 [56] VSSCORE_SENSE RC39 1 2
VCC_61 VCC_124 VCCGT_174 BD35 VCCGT_49 VCCGT_103 BC35
N38 V31 AT33 VCCGT_50 VCCGT_104 0_0402_5%
P13 VCC_62 VCC_125 P14 AT34 VCCGT_175 BD36 BE33
1
VCC_63 VCC_126 VCCGT_176 BE31 VCCGT_51 VCCGT_105 BE34
AT35 VCCGT_52 VCCGT_106
AT36 VCCGT_177 BE32 BE35
C VCCGT_178 BE37 VCCGT_53 VCCGT_107 BE36 RC62 C
AT37 VCCGT_54 VCCGT_108
AG37 VCCSENSE_R AT38 VCCGT_179 100_0402_1%
VCC_SENSE AG38 VSSSENSE_R AU14 VCCGT_180 8 OF 14
2
ne
VSS_SENSE AU29 VCCGT_181
AU30 VCCGT_182 SKYLAKE-H-CPU_BGA1440
7 OF 14 AU31 VCCGT_183
AU32 VCCGT_184
SKYLAKE-H-CPU_BGA1440 AU35 VCCGT_185
AU36 VCCGT_186
AU37 VCCGT_187
AU38 VCCGT_188
VCCGT_189 14 OF 14
do
in
VCCGFXCORE
10uF 35pcs
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
i-
CC98
CC108
CC107
CC110
CC106
CC105
CC104
CC102
CC103
CC109
CC111
CC119
CC116
CC120
CC117
CC114
CC115
CC112
CC113
CC118
CC128
CC123
CC126
CC127
CC122
CC125
CC121
CC124
CC131
CC135
CC134
CC130
CC132
CC129
CC133
B 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 B
VCCCPUCORE
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
10U_0402_6.3V6-M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CD75 CD76
CC62
CC80
CC79
CC82
CC78
CC77
CC76
CC74
CC75
CC81
CC83
CC91
CC88
CC92
CC89
CC86
CC87
CC84
CC85
CC90
CC101
CC173
CC100
CC99
CC94
CC97
CC93
CC95
33P_0402_50V8J 33P_0402_50V8J
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
is 2
RF@
2
RF@
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CD77 CD78
CH157
CH158
CH159
CH160
CH162
CH161
CH164
CH163
CH165
CH167
CH166
CH169
CH168
CH171
CH170
CH172
CH174
CH173
CH175
CH176
CH177
CH178
CH179
CH180
CH181
CH182
CH183
CH184
33P_0402_50V8J 33P_0402_50V8J
RF@ RF@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
Near CPU
10uF 28pcs
kn
Near CPU
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CH93
CH94
CH95
CH96
CH97
CH98
CH99
CH100
CH101
CH102
CH103
CH104
CH105
CH106
CH107
CH108
CH109
CH110
CH111
CH112
CH113
CH114
CH115
CH116
CH117
CH118
CH119
CH120
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CH185
CH187
CH186
CH189
CH188
CH191
CH190
CH193
CH192
CH195
CH194
CH197
CH196
CH199
CH198
CH201
CH200
CH203
CH204
CH202
CH206
CH205
CH208
CH207
CH209
CH211
CH210
CH212
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
te
1uF 68pcs
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CH121
CH122
CH123
CH124
CH125
CH126
CH127
CH128
CH129
CH130
CH131
CH132
CH133
CH134
CH135
CH136
CH137
CH138
CH140
CH139
CH142
CH141
CH144
CH143
CH145
CH147
CH146
CH148
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1
CH215
CH213
CH217
CH214
CH216
CH218
CH219
CH220
CH233
CH234
CH235
CH225
A A
2 2 2 2 2 2 2 2 2 2 2 2
w.
1uF 64pcs
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1 1 1 1 1 1 1 1
CH151
CH149
CH153
CH150
CH152
CH154
CH155
CH156
2 2 2 2 2 2 2 2
Issued Date 2015/02/26 Deciphered Date 2016/02/26 CPU (5/7) PWR, BYPASS
ww
D
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
UC1J SKYLAKE_HALO
VCCSA +1.2V VCCSA
UC1I SKYLAKE_HALO
10uF 7pcs BJ17
BJ19 VCCOPC_1
BGA1440
BJ20 VCCOPC_2
J30 BGA1440 AA6 BK17 VCCOPC_3
VCCSA_1 VDDQ_1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
K29 AE12 BK19 VCCOPC_4
K30 VCCSA_2 VDDQ_2 AF5 VCCOPC_5
VCCSA_3 VDDQ_3 1 1 1 1 1 1 1 1 1 BK20
K31 AF6 CD79 CD80 BL16 VCCOPC_6
VCCSA_4 VDDQ_4
CC136
CC141
CC140
CC142
CC139
CC138
CC137
K32 AG5 +1.2V 33P_0402_50V8J 33P_0402_50V8J BL17 VCCOPC_7
K33 VCCSA_5 VDDQ_5 AG9 RF@ VCCOPC_8
RF@ BL18
K34 VCCSA_6 VDDQ_6 AJ12 2 2 2 2 2 2 2 2 2 VCCOPC_9
10U_0603_6.3V6M
VCCSA_7 VDDQ_7 BL19
K35 AL11 BL20 VCCOPC_10
L31 VCCSA_8 VDDQ_8 AP6 1 VCCOPC_11
VCCSA_9 VDDQ_9 BL21
L32 AP7 VCCOPC_12
CC172
VCCSA_10 VDDQ_10 BM17
L35 AR12 BN17 VCCOPC_13
VCCSA_11 VDDQ_11
m
L36 AR6 2 VCCOPC_14
L37 VCCSA_12 VDDQ_12 AT12
D VCCSA_13 VDDQ_13 BJ23 D
L38
M29
M30
VCCSA_14
VCCSA_15
VDDQ_14
VDDQ_15
AW6
AY6
J5
Near CPU BJ26
BJ27
RSVD_1
RSVD_2
RSVD_3
VCCSA_16 VDDQ_16 BK23
co
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
M31 J6 1 1 1 BK26 RSVD_4
M32 VCCSA_17 VDDQ_17 K12 RSVD_5
VCCSA_18 VDDQ_18 BK27
CH222
CH221
CH223
M33 K6 BL23 RSVD_6
VCCIO M34 VCCSA_19 VDDQ_19 L12 RSVD_7
M35
M36
VCCSA_20
VCCSA_21
VDDQ_20
VDDQ_21
L6
R6
2 2 2
1uF 3pcs BL24
BL25
BL26
RSVD_8
RSVD_9
VCCSA_22 VDDQ_22 T6 RSVD_10
VDDQ_23 BL27
W6 BL28 RSVD_11
AG12 VDDQ_24 +1.2V RSVD_12
VCCIO_1 BM24
G15 Y12 RSVD_13
a.
G17 VCCIO_2 VDDQC
G19 VCCIO_3 BH13
VCCIO_4 VCCPLL_OC_1 1 PAD @ BL15
TC56
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
G21 G11 1 PAD @ BM16 VCCOPC_SENSE

H15 VCCIO_5 VCCPLL_OC_2 TC58 VSSOPC_SENSE
1 1 1 VCCIO_6 VCCST
H16 BL22
VCCIO_7 RSVD_14
CC147
CC148
CC149
H17 H30 VCCSTG BM22

H19 VCCIO_8 VCCST RSVD_15
2 2 2 H20 VCCIO_9 H29
1U_0402_6.3V6K
1U_0402_6.3V6K
H21 VCCIO_10 VCCSTG_1 1 1
BP15
1U_0402_6.3V6K
1U_0402_6.3V6K
H26 VCCIO_11 G30 VCCEOPIO_1
VCCST 1 1
CH252
BR15
si
CC150
H27 VCCIO_12 VCCSTG_2 VCCEOPIO_2
1U_0402_6.3V6K
BT15
CH249
CH250
J15 VCCIO_13 H28 1 VCCEOPIO_3
2 2
J16 VCCIO_14 VCCPLL_1 J28
CH242
VCCIO_15 VCCPLL_2 2 2 BP16
J17 BR16 RSVD_16
J19 VCCIO_16 RSVD_17
2 BT16
J20 VCCIO_17 M38 VCCSA_SENSE_R RSVD_18
J21 VCCIO_18 VCCSA_SENSE M37 VSSSA_SENSE_R
J26 VCCIO_19 VSSSA_SENSE
VCCIO_20 1 PAD @ BN15
J27 H14 VCCIO_SENSE_R TC75
1 PAD @ BM15 VCCEOPIO_SENSE
VCCIO_21 VCCIO_SENSE J14 VSSIO_SENSE_R TC74 VSSEOPIO_SENSE
ne
VSSIO_SENSE
1U_0402_6.3V6K
1 BP17
BN16 RSVD_19
CH251
RSVD_20
C 2 1 PAD BM14 C
@
TC45 1 PAD BL14 VCC_OPC_1P8_1
@
9 OF 14 TC76 VCC_OPC_1P8_2
BJ35
SKYLAKE-H-CPU_BGA1440 BJ36 RSVD_21
RSVD_22
do
1 PAD @ AT13
TC47 1 PAD AW13 ZVM#
+1.2V @
VDDQ DECOUPLING TC48 MSM#
1 PAD @ AU13
TC49 1 PAD AY13 ZVM2#
@
TC51 MSM2#
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1 PAD @ BT29
TC54 OPC_RCOMP
1 1 1 1 1 1 1 1 1 1 1 PAD @ BR25
TC53
in
1 PAD @ BP25 OPCE_RCOMP
TC52 OPCE_RCOMP2
CC51
CC52
CC53
CC54
CC55
CC56
CC57
CC58
CC59
CC60
10 OF 14
2 2 2 2 2 2 2 2 2 2
i-
CC63
22U_0603_6.3V6-M
22U_0603_6.3V6-M
CC64
22U_0603_6.3V6-M
CC65
22U_0603_6.3V6-M
CC66
1 1 1 1
2 2 2 2
is
B B
kn
CRB place to CPU

CRB place to CPU VCCIO
VCCSA VCCIO_SENSE
VCCSA_SENSE
1
RC155
te
100_0402_1%
1
RC151
100_0402_1%
0_0402_5%
2
RC154 1 2 VCCIO_SENSE_R
0_0402_5% [62] VCC_IO_SEN
2
RC150 1 2 VCCSA_SENSE_R RC152 1 VSSIO_SENSE_R

[56] VCCSA_SENSE 2
[62] VSS_IO_SEN
VSSSA_SENSE_R 0_0402_5%
1
RC148 1 2
[56] VSSSA_SENSE
0_0402_5%
w.
1
RC153
100_0402_1%
RC149
2
100_0402_1%
2
ww
A A
Issued Date 2015/02/26 Deciphered Date 2016/02/26 CPU (6/7) PWR, BYPASS
C
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
UC1M SKYLAKE_HALO
m
UC1F SKYLAKE_HALO UC1L SKYLAKE_HALO
D BGA1440 D
BB4 AK30
Y38 BGA1440 K1 C17 BGA1440 C25 BB3 VSS_300 VSS_378 AK29
Y37 VSS_1 VSS_78 J36 C13 VSS_154 VSS_239 C23 BB2 VSS_301 VSS_379 AK4
VSS_2 VSS_79 VSS_155 VSS_240 VSS_302 VSS_380
co
Y14 J33 C9 C21 BB1 AJ38
Y13 VSS_3 VSS_80 J32 BT32 VSS_156 VSS_241 C19 BA38 VSS_303 VSS_381 AJ37
Y7 VSS_8 VSS_85 J7 BT14 VSS_161 VSS_246 BM29 BA9 VSS_308 VSS_386 AJ2
W34 VSS_9 VSS_86 J4 BT12 VSS_162 VSS_247 BM25 BA8 VSS_309 VSS_387 AJ1
W33 VSS_10 VSS_87 H35 BT9 VSS_163 VSS_248 BM18 BA7 VSS_310 VSS_388 AH34
W12 VSS_11 VSS_88 H32 BT5 VSS_164 VSS_249 BM11 BA6 VSS_311 VSS_389 AH33
a.
W5 H25 BR36 BM8 B9 AH12
W4 VSS_13 VSS_90 H22 BR34 VSS_166 VSS_251 BM7 AY34 VSS_313 VSS_391 AH6
W3 VSS_14 VSS_91 H18 BR29 VSS_167 VSS_252 BM5 AY33 VSS_314 VSS_392 AG30
W2 VSS_15 VSS_92 H12 BR26 VSS_168 VSS_253 BM3 AY14 VSS_315 VSS_393 AG29
W1 VSS_16 VSS_93 H11 BR24 VSS_169 VSS_254 BL38 AY12 VSS_316 VSS_394 AG11
V30 VSS_17 VSS_94 G28 BR21 VSS_170 VSS_255 BL35 AW30 VSS_317 VSS_395 AG10
V6 VSS_20 VSS_97 G23 BR12 VSS_173 VSS_258 BK25 AW5 VSS_320 VSS_398 AG6
U38 VSS_21 VSS_98 G22 BR7 VSS_174 VSS_259 BK22 AW4 VSS_321 VSS_399 AF14
si
U37 VSS_153 VSS_99 G20 BP34 VSS_175 VSS_260 BK13 AW3 VSS_322 VSS_400 AF13
U6 VSS_22 VSS_100 G18 BP33 VSS_176 VSS_261 BK6 AW2 VSS_323 VSS_401 AF12
T34 VSS_23 VSS_101 G16 BP29 VSS_177 VSS_262 BJ30 AW1 VSS_324 VSS_402 AF4
T33 VSS_24 VSS_102 G14 BP26 VSS_178 VSS_263 BJ29 AV38 VSS_325 VSS_403 AF3
T14 VSS_25 VSS_103 G12 BP24 VSS_179 VSS_264 BJ15 AV37 VSS_326 VSS_404 AF2
T13 VSS_26 VSS_104 G10 BP21 VSS_180 VSS_265 BJ12 AU34 VSS_327 VSS_405 AF1
T12 VSS_27 VSS_105 G9 BP18 VSS_181 VSS_266 BH11 AU33 VSS_328 VSS_406 AE34
T9 VSS_30 VSS_108 G5 BP7 VSS_184 VSS_269 BH6 AU10 VSS_331 VSS_409 AD30
ne
T8 VSS_31 VSS_109 G4 BN34 VSS_185 VSS_270 BH3 AU9 VSS_332 VSS_410 AD29
T7 VSS_32 VSS_110 F36 BN31 VSS_186 VSS_271 BH2 AU8 VSS_333 VSS_411 AD12
T5 VSS_33 VSS_111 F31 BN30 VSS_187 VSS_272 BG37 AU7 VSS_334 VSS_412 AD11
T4 VSS_34 VSS_112 F29 BN29 VSS_188 VSS_273 BG14 AU6 VSS_335 VSS_413 AD10
T3 VSS_35 VSS_113 F27 BN24 VSS_189 VSS_274 BG6 AT30 VSS_336 VSS_414 AD9
C C
T2 VSS_36 VSS_114 F25 BN21 VSS_190 VSS_275 BF34 AT29 VSS_337 VSS_415 AD8
T1 VSS_37 VSS_115 F23 BN20 VSS_191 VSS_276 BF6 AT6 VSS_338 VSS_416 AD7
R30 VSS_38 VSS_116 F21 BN19 VSS_192 VSS_277 BE30 AR38 VSS_339 VSS_417 AD6
R29 VSS_39 VSS_117 F19 BN18 VSS_193 VSS_278 BE5 AR37 VSS_340 VSS_418 AC38
R12 VSS_40 VSS_118 F17 BN14 VSS_194 VSS_279 BE4 AR14 VSS_341 VSS_419 AC37
do
P38 VSS_41 VSS_119 F15 BN12 VSS_195 VSS_280 BE3 AR13 VSS_342 VSS_420 AC12
P6 VSS_44 VSS_122 F9 BN4 VSS_198 VSS_283 BD38 AR3 VSS_345 VSS_423 AC4
N34 VSS_45 VSS_123 F8 BN2 VSS_199 VSS_284 BD37 AR2 VSS_346 VSS_424 AC3
N33 VSS_46 VSS_124 F5 BM38 VSS_200 VSS_285 BD12 AR1 VSS_347 VSS_425 AC2
N12 VSS_47 VSS_125 F4 BM35 VSS_201 VSS_286 BD11 AP34 VSS_348 VSS_426 AC1
N11 VSS_48 VSS_126 F3 BM28 VSS_202 VSS_287 BD10 AP33 VSS_349 VSS_427 AB34
N10 VSS_49 VSS_127 F2 BM27 VSS_203 VSS_288 BD8 AP12 VSS_350 VSS_428 AB33
N9 VSS_50 VSS_128 E38 BM26 VSS_204 VSS_289 BD7 AP11 VSS_351 VSS_429 AB6
in
N8 VSS_51 VSS_129 E35 BM23 VSS_205 VSS_290 BD6 AP10 VSS_352 VSS_430 AA30
N7 VSS_52 VSS_130 E34 BM21 VSS_206 VSS_291 BC33 AP9 VSS_353 VSS_431 AA29
N6 VSS_53 VSS_131 E9 BM13 VSS_207 VSS_292 BC14 AP8 VSS_354 VSS_432 AA12
N5 VSS_54 VSS_132 E4 BM12 VSS_208 VSS_293 BC13 AN30 VSS_355 VSS_433 A30
N4 VSS_55 VSS_133 D33 BM9 VSS_209 VSS_294 BC6 AN29 VSS_356 VSS_434 A28
N3 VSS_56 VSS_134 D30 BM6 VSS_210 VSS_295 BB30 AN12 VSS_357 VSS_435 A26
N2 VSS_57 VSS_135 D28 BM2 VSS_211 VSS_296 BB29 AN6 VSS_358 VSS_436 A24
N1 VSS_58 VSS_136 D26 BL29 VSS_212 VSS_297 BB6 AN5 VSS_359 VSS_437 A22
M14 VSS_59 VSS_137 D24 BK29 VSS_213 VSS_298 BB5 AM38 VSS_360 VSS_438 A20
i-
M13 D22 BK15 AM37 A18
M12 VSS_61 VSS_139 D20 BK14 VSS_215 AM12 VSS_362 VSS_440 A16
M6 VSS_62 VSS_140 D18 BJ32 VSS_216 AM5 VSS_363 VSS_441 A14
L34 VSS_63 VSS_141 D16 BJ31 VSS_217 AM4 VSS_364 VSS_442 A12
L29 VSS_66 VSS_144 D10 BH14 VSS_220 AM1 VSS_367 VSS_445 A6
K38 VSS_67 VSS_145 D9 BH12 VSS_221 C2 AL34 VSS_368 VSS_446
K11 VSS_68 VSS_146 D6 BH9 VSS_222 NCTFVSS_2 BT36 AL33 VSS_369
K10 VSS_69 VSS_147 D3 BH8 VSS_223 NCTFVSS_3 BT35 AL14 VSS_370 B37
VSS_70 VSS_148 VSS_224 NCTFVSS_4 VSS_371 NCTFVSS_8
K9
K8
K7
VSS_71
VSS_72
VSS_149
VSS_150
C37
C31
C29
is BH5
BH4
BH1
VSS_225
VSS_226
NCTFVSS_5
NCTFVSS_6
BT4
BT3
BR38
AL12
AL10
AL9
VSS_372
VSS_373
NCTFVSS_9
NCTFVSS_10
B3
A34
A4
B
K5 VSS_73 VSS_151 C27 BG38 VSS_227 NCTFVSS_7 AL8 VSS_374 NCTFVSS_11 A3 B
K4 VSS_74 VSS_152 BG13 VSS_228 AL7 VSS_375 NCTFVSS_12
K3 VSS_75 D38 BG12 VSS_229 AL4 VSS_376
K2 VSS_76 NCTFVSS_1 BF33 VSS_230 VSS_377
VSS_77 6 OF 14 BF12 VSS_231 13 OF 14
BE29 VSS_232
SKYLAKE-H-CPU_BGA1440 BE6 VSS_233 SKYLAKE-H-CPU_BGA1440
kn
BD9 VSS_234
BC34 VSS_235
BC12 VSS_236
BB12 VSS_237
VSS_238 12 OF 14
te
w.
ww
A A
Issued Date 2015/02/26 Deciphered Date 2016/02/26 CPU (6/7) PWR, VSS
C
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
DDR4 SO-DIMM A
+1.2V+1.2V +1.2V+1.2V
JDDRL1B
+1.2V+1.2V +1.2V+1.2V
DDRA_MA3 131 132DDRA_MA2
[7] DDRA_MA3 DDRA_MA1 A3 A2 DDRA_MA2 [7]
JDDRL1A 133 134
[7] DDRA_MA1 A1 EVENT_n/NF
135 136
DDRA_CLK0 137 VDD_9 VDD_10 138 DDRA_CLK1
[7] DDRA_CLK0 DDRA_CLK0# CK0_t CK1_t/NF DDRA_CLK1 [7]
1 2 139 140 DDRA_CLK1#
DDRA_DQ4 3 VSS_1 VSS_2 4 DDRA_DQ1 [7] DDRA_CLK0# 141 CK0_c CK1_c/NF 142 DDRA_CLK1# [7]
[7] DDRA_DQ4 DQ5 DQ4 DDRA_DQ1 [7] DDRA_PARITY VDD_11 VDD_12
5 6 143 144DDRA_MA0
DDRA_DQ0 VSS_3 VSS_4 DDRA_DQ5 [7] DDRA_PARITY Parity A0 DDRA_MA0 [7]
7 8
[7] DDRA_DQ0 DQ1 DQ0 DDRA_DQ5 [7]
m
9 10
DDRA_DQS#0 11 VSS_5 VSS_6 12 DDRA_BA1 145 146DDRA_MA10_AP
D [7] DDRA_DQS#0 DDRA_DQS0 13 DQS0_C DM0_n/DBI0_n 14 [7] DDRA_BA1 147 BA1 A10/AP 148 DDRA_MA10_AP [7] D
[7] DDRA_DQS0 DQS0_t VSS_7 DDRA_DQ6 DDRA_CS0# VDD_13 VDD_14
15 16 149 150 DDRA_BA0
DDRA_DQ7 VSS_8 DQ6 DDRA_DQ6 [7] [7] DDRA_CS0# DDRA_MA14_WE# CS0_n BA0 DDRA_BA0 [7]
17 18 151 152 DDRA_MA16_RAS#
[7] DDRA_DQ7 DQ7 VSS_9 DDRA_DQ2 [7] DDRA_MA14_WE# WE_n/A14 RAS_n/A16 DDRA_MA16_RAS# [7]
co
19 20 153 154
DDRA_DQ3 VSS_10 DQ2 DDRA_DQ2 [7] DDRA_ODT0 VDD_15 VDD_16
21 22 155 156 DDRA_MA15_CAS#
[7] DDRA_DQ3 23 DQ3 VSS_11 24 DDRA_DQ9 [7] DDRA_ODT0 DDRA_CS1# 157 ODT0 CAS_n/A15 158DDRA_MA13 DDRA_MA15_CAS# [7]
DDRA_DQ13 VSS_12 DQ12 DDRA_DQ9 [7] [7] DDRA_CS1# CS1_n A13 DDRA_MA13 [7]
25 26 159 160
[7] DDRA_DQ13 DQ13 VSS_13 DDRA_DQ8 DDRA_ODT1 VDD_17 VDD_18
27 28 161 162
DDRA_DQ12 29 VSS_14 DQ8 30 DDRA_DQ8 [7] [7] DDRA_ODT1 163 ODT1 C0/CS2_n/NC 164 +VREF_CA_DIMMA
[7] DDRA_DQ12 DQ9 VSS_15 DDRA_DQS#1 VDD_19 VREFCA
31 32 165 166 DDRA_SA2
33 VSS_16 DQS1_c 34 DDRA_DQS1 DDRA_DQS#1 [7] 167 C1/CS3_n/NC SA2 168
.1U_0402_10V6-K
2.2U_0603_6.3V6K
DM1_n/DBl1_n DQS1_t DDRA_DQS1 [7] DDRA_DQ33 VSS_53 VSS_54 DDRA_DQ36
35 36 169 170 1 1
DDRA_DQ15 VSS_17 VSS_18 DDRA_DQ10 [7] DDRA_DQ33 DQ37 DQ36 DDRA_DQ36 [7]
37 38 171 172
[7] DDRA_DQ15 DQ15 DQ14 DDRA_DQ10 [7] VSS_55 VSS_56
a.
39 40 DDRA_DQ37 173 174 DDRA_DQ32
DDRA_DQ14 VSS_19 VSS_20 DDRA_DQ11 [7] DDRA_DQ37 DQ33 DQ32 DDRA_DQ32 [7]
41 42 175 176
[7] DDRA_DQ14 43 DQ10 DQ11 44 DDRA_DQ11 [7] DDRA_DQS#4 177 VSS_57 VSS_58 178 2 2
DDRA_DQ21 VSS_21 VSS_22 DDRA_DQ16 [7] DDRA_DQS#4 DDRA_DQS4 DQS4_c DM4_n/DBl4_n
45 46 179 180
CD2
CD3
[7] DDRA_DQ21 DQ21 DQ20 DDRA_DQ16 [7] [7] DDRA_DQS4 DQS4_t VSS_59 DDRA_DQ35
47 48 181 182
DDRA_DQ20 49 VSS_23 VSS_24 50 DDRA_DQ17 DDRA_DQ38 183 VSS_60 DQ39 184 DDRA_DQ35 [7]
[7] DDRA_DQ20 DQ17 DQ16 DDRA_DQ17 [7] [7] DDRA_DQ38 DQ38 VSS_61 DDRA_DQ34
51 52 185 186
DDRA_DQS#2 53 VSS_25 VSS_26 54 DDRA_DQ39 187 VSS_62 DQ35 188 DDRA_DQ34 [7]
[7] DDRA_DQS#2 DDRA_DQS2 DQS2_c DM2_n/DBl2_n [7] DDRA_DQ39 DQ34 VSS_63 DDRA_DQ40
55 56 189 190
[7] DDRA_DQS2 DQS2_t VSS_27 DDRA_DQ19 DDRA_DQ44 VSS_64 DQ45 DDRA_DQ40 [7]
57 58 191 192
si
DDRA_DQ22 59 VSS_28 DQ22 60 DDRA_DQ19 [7] [7] DDRA_DQ44 193 DQ44 VSS_65 194 DDRA_DQ45
[7] DDRA_DQ22 DQ23 VSS_29 DDRA_DQ23 DDRA_DQ41 VSS_66 DQ41 DDRA_DQ45 [7]
61 62 195 196
DDRA_DQ18 63 VSS_30 DQ18 64 DDRA_DQ23 [7] [7] DDRA_DQ41 197 DQ40 VSS_67 198DDRA_DQS#5
[7] DDRA_DQ18 DQ19 VSS_31 DDRA_DQ24 VSS_68 DQS5_c DDRA_DQS#5 [7]
65 66 199 200DDRA_DQS5
DDRA_DQ29 VSS_32 DQ28 DDRA_DQ24 [7] DM5_n/DBl5_n DQS5_t DDRA_DQS5 [7]
67 68 201 202
[7] DDRA_DQ29 69 DQ29 VSS_33 70 DDRA_DQ25 DDRA_DQ43 203 VSS_69 VSS_70 204 DDRA_DQ47
DDRA_DQ28 VSS_34 DQ24 DDRA_DQ25 [7] [7] DDRA_DQ43 DQ46 DQ47 DDRA_DQ47 [7]
71 72 205 206
[7] DDRA_DQ28 73 DQ25 VSS_35 74 DDRA_DQS#3 DDRA_DQ46 207 VSS_71 VSS_72 208 DDRA_DQ42
VSS_36 DQS3_c DDRA_DQS#3 [7] [7] DDRA_DQ46 DQ42 DQ43 DDRA_DQ42 [7]
75 76 DDRA_DQS3 209 210
DM3_n/DBl3_n DQS3_t DDRA_DQS3 [7] DDRA_DQ50 VSS_73 VSS_74 DDRA_DQ48
77 78 211 212
ne
DDRA_DQ27 79 VSS_37 VSS_38 80 DDRA_DQ26 [7] DDRA_DQ50 213 DQ52 DQ53 214 DDRA_DQ48 [7]
[7] DDRA_DQ27 DQ30 DQ31 DDRA_DQ26 [7] DDRA_DQ52 VSS_75 VSS_76 DDRA_DQ49
81 82 215 216
DDRA_DQ30 83 VSS_39 VSS_40 84 DDRA_DQ31 [7] DDRA_DQ52 217 DQ49 DQ48 218 DDRA_DQ49 [7]
[7] DDRA_DQ30 DQ26 DQ27 DDRA_DQ31 [7] DDRA_DQS#6 VSS_77 VSS_78
85 86 219 220
VSS_41 VSS_42 [7] DDRA_DQS#6 DDRA_DQS6 DQS6_c DM6_n/DBl6_n
C 87 88 221 222 C
89 CB5/NC CB4/NC 90 [7] DDRA_DQS6 223 DQS6_t VSS_79 224 DDRA_DQ53
VSS_43 VSS_44 DDRA_DQ54 VSS_80 DQ54 DDRA_DQ53 [7]
91 92 225 226
93 CB1/NC CB0/NC 94 [7] DDRA_DQ54 227 DQ55 VSS_81 228 DDRA_DQ55
VSS_45 VSS_46 DDRA_DQ51 VSS_82 DQ50 DDRA_DQ55 [7]
95 96 229 230
DQS8_c DBI8_n/DBI_n/NC [7] DDRA_DQ51 DQ51 VSS_83 DDRA_DQ56
97 98 231 232
do
99 DQS8_t VSS_47 100 DDRA_DQ57 233 VSS_84 DQ60 234 DDRA_DQ56 [7]
VSS_48 CB6/NC [7] DDRA_DQ57 DQ61 VSS_85 DDRA_DQ60
101 102 235 236
103 CB2/NC VSS_49 104 DDRA_DQ61 237 VSS_86 DQ57 238 DDRA_DQ60 [7]
VSS_50 CB7/NC [7] DDRA_DQ61 DQ56 VSS_87
105 106 239 240DDRA_DQS#7
CB3/NC VSS_51 PCH_DRAMRST# VSS_88 DQS7_c DDRA_DQS#7 [7]
107 108 241 242DDRA_DQS7
DDRA_CKE0 109 VSS_52 RESET_n 110 DDRA_CKE1 PCH_DRAMRST# [16] 243 DM7_n/DBl7_n DQS7_t 244 DDRA_DQS7 [7]
[7] DDRA_CKE0 CKE0 CKE1 DDRA_CKE1 [7] DDRA_DQ62 VSS_89 VSS_90 DDRA_DQ59
111 112 245 246
DDRA_BG1 113 VDD_1 VDD_2 114DDRA_ACT# [7] DDRA_DQ62 247 DQ62 DQ63 248 DDRA_DQ59 [7]
[7] DDRA_BG1 DDRA_BG0 BG1 ACT_n DDRA_ALERT# DDRA_ACT# [7] DDRA_DQ58 VSS_91 VSS_92 DDRA_DQ63
[7] DDRA_BG0 115 116 249 250
BG0 ALERT_n DDRA_ALERT# [7] [7] DDRA_DQ58 DQ58 DQ59 DDRA_DQ63 [7]
in
117 118 251 252
DDRA_MA12 119 VDD_3 VDD_4 120DDRA_MA11 SMB_CLK_S3 253 VSS_93 VSS_94 254 SMB_DATA_S3
[7] DDRA_MA12 DDRA_MA9 A12 A11 DDRA_MA11 [7] [13,16,40,45] SMB_CLK_S3 SCL SDA SMB_DATA_S3 [13,16,40,45]
[7] DDRA_MA9 121 122DDRA_MA7 1 2 DDRA_VDDSPD 255 256 DDRA_SA0
A9 A7 DDRA_MA7 [7] 1 +3VS VDDSPD SA0
123 124 RD18 0_0402_5% 257 258
DDRA_MA8 VDD_5 VDD_6 VPP_1 Vtt +0.6VS
[7] DDRA_MA8 125 126DDRA_MA5 CD69 1 1 259 260 DDRA_SA1
DDRA_MA6 A8 A5 DDRA_MA5 [7] VPP_2 SA1
127 128DDRA_MA4 0.1U_0402_10V7K
[7] DDRA_MA6 A6 A4 DDRA_MA4 [7]
129 130 2 CD27 CD28 261 262
VDD_7 VDD_8 @ 2.2U_0603_6.3V6K .1U_0402_10V6-K GND_1 GND_2
2 2 FOX_AS0A826-H8SB-7H
Layout Note:
i-
Place near DIMM FOX_AS0A826-H8SB-7H
RD20 1 2 0_0402_5%
+2.5V
+2.5V
+0.6VS
+3VS +3VS +3VS

is
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0402_6.3V6-M
10U_0402_6.3V6-M
1 1 1 1
1
1
1U_0402_6.3V6K
CD59
CD60
CD57
CD58
RD22 RD24 RD26
10U_0402_6.3V6-M
10U_0402_6.3V6-M
B 1 1 1 B
CD23 0_0402_5% 0_0402_5% 0_0402_5%
CD24
CD25
@ @ @ 2 2 2 2
2
2 2 2
DDRA_SA0 DDRA_SA1 DDRA_SA2
kn
1
RD23 RD25 RD27

0_0402_5% 0_0402_5% 0_0402_5%
2
Note:
VREF trace width:20 mils at least
Spacing:20mils to other signal/planes
te
Place near DIMM scoket

SPD Address = 0H Layout Note:
Place near DIMM
+VREF_CA_DIMMA_R
+1.2V
Change RD2 to 0ohm jump
1
+1.2V
w.
RD1
1K_0402_1%
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_10V7K
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
+VREF_CA_DIMMA
0.1U_0402_10V7K
220U_6.3V_M
1 2 CD7 1 CD8 1 CD9 1 CD10 1 CD11 1 CD12 1 CD13 1 CD14 1 1 1 1 1 1 CD19 1
RD2 CD98 1 CD97 1 CD96 1 CD95 1 1 1 1 + 1
CD66
CD67
CD82
CD15
CD65
CD68
CD81
CD16
CD17
CD18
1
.1U_0402_10V6-K
2_0402_5% 33P_0402_50V8J 33P_0402_50V8J

RF@ RF@
1K_0402_1%
1 1
EMC@
EMC@
EMC@
EMC@
2 2
CD21
CD1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
0.022U_0402_16V7-K
ww
CD@ @
2
A 2 2 A
RD3
1
RD4
24.9_0402_1% Near JDDRL1
CD@
2
For EMC Security Classification LC Future Center Secret Data Title
Issued Date 2015/02/26 Deciphered Date 2016/02/26 DDRVI SO-DIMM A

C
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
DDR4 SO-DIMM B
+1.2V+1.2V +1.2V+1.2V
JDDRH1A +1.2V+1.2V +1.2V+1.2V
1 2 JDDRH1B
DDRB_DQ2 3 VSS_1 VSS_2 4 DDRB_DQ4
[7] DDRB_DQ2 DQ5 DQ4 DDRB_DQ4 [7]
5 6
m
DDRB_DQ5 7 VSS_3 VSS_4 8 DDRB_DQ0 DDRB_MA3 131 132DDRB_MA2
D [7] DDRB_DQ5 DQ1 DQ0 DDRB_DQ0 [7] [7] DDRB_MA3 DDRB_MA1 133 A3 A2 134 DDRB_MA2 [7] D
9 10 [7] DDRB_MA1
DDRB_DQS#0 VSS_5 VSS_6 135 A1 EVENT_n 136
11 12
[7] DDRB_DQS#0 DDRB_DQS0 13 DQS0_C DM0_n/DBIO_n 14 DDRB_CLK0 137 VDD_9 VDD_10 138 DDRB_CLK1
[7] DDRB_DQS0 DQS0_t VSS_7 DDRB_DQ1 [7] DDRB_CLK0 DDRB_CLK0# 139 CK0_t CK1_t 140 DDRB_CLK1# DDRB_CLK1 [7]
15 16
co
DDRB_DQ6 VSS_8 DQ6 DDRB_DQ1 [7] [7] DDRB_CLK0# CK0_c CK1_c DDRB_CLK1# [7]
17 18 141 142
[7] DDRB_DQ6 DQ7 VSS_9 DDRB_DQ7 DDRB_PARITY 143 VDD_11 VDD_12 144DDRB_MA0
19 20 [7] DDRB_PARITY DDRB_MA0 [7]
DDRB_DQ3 VSS_10 DQ2 DDRB_DQ7 [7] Parity A0
21 22
[7] DDRB_DQ3 23 DQ3 VSS_11 24 DDRB_DQ8
DDRB_DQ10 VSS_12 DQ12 DDRB_DQ8 [7] DDRB_BA1 145 146 DDRB_MA10_AP
25 26 [7] DDRB_BA1 DDRB_MA10_AP [7]
[7] DDRB_DQ10 DQ13 VSS_13 DDRB_DQ9 147 BA1 A10/AP 148
27 28
DDRB_DQ14 VSS_14 DQ8 DDRB_DQ9 [7] DDRB_CS0# 149 VDD_13 VDD_14 150 DDRB_BA0
29 30 [7] DDRB_CS0# DDRB_BA0 [7]
[7] DDRB_DQ14 DQ9 VSS_15 DDRB_MA14_WE# CS0_n BA0 DDRB_MA16_RAS#
31 32 DDRB_DQS#1 [7] DDRB_MA14_WE#
151 152
DDRB_MA16_RAS# [7]
33 VSS_16 DQS1_c 34 DDRB_DQS1 DDRB_DQS#1 [7] 153 WE_n/A14 RAS_n/A16 154
DM1_n/DBl1_n DQS1_t DDRB_DQS1 [7] DDRB_ODT0 155 VDD_15 VDD_16 156 DDRB_MA15_CAS#
a.
35 36 [7] DDRB_ODT0 DDRB_MA15_CAS# [7]
DDRB_DQ12 VSS_17 VSS_18 DDRB_DQ11 DDRB_CS1# 157 ODT0 CAS_n/A15 158DDRB_MA13
37 38 [7] DDRB_CS1#
[7] DDRB_DQ12 DQ15 DQ14 DDRB_DQ11 [7] 159 CS1_n A13 160 DDRB_MA13 [7]
39 40
DDRB_DQ13 VSS_19 VSS_20 DDRB_DQ15 DDRB_ODT1 161 VDD_17 VDD_18 162
41 42 [7] DDRB_ODT1
[7] DDRB_DQ13 43 DQ10 DQ11 44 DDRB_DQ15 [7] 163 ODT1 C0/CS2_n/NC 164 +VREF_CA_DIMMB
DDRB_DQ22 VSS_21 VSS_22 DDRB_DQ17 165 VDD_19 VREFCA 166 DDRB_SA2
45 46
[7] DDRB_DQ22 DQ21 DQ20 DDRB_DQ17 [7] 167 C1/CS3_n/NC RFU 168
47 48
DDRB_DQ18 VSS_23 VSS_24 DDRB_DQ16 DDRB_DQ38 169 VSS_53 VSS_54 170 DDRB_DQ34
49 50
.1U_0402_10V6-K
2.2U_0603_6.3V6K
[7] DDRB_DQ18 DQ17 DQ16 DDRB_DQ16 [7] [7] DDRB_DQ38 DQ37 DQ36 DDRB_DQ34 [7]
51 52 171 172 1 1
DDRB_DQS#2 53 VSS_25 VSS_26 54 DDRB_DQ35 173 VSS_55 VSS_56 174 DDRB_DQ39
[7] DDRB_DQS#2 DDRB_DQS2 DQS2_c DM2_n/DBl2_n [7] DDRB_DQ35 DQ33 DQ32 DDRB_DQ39 [7]
si
55 56 175 176
[7] DDRB_DQS2 DQS2_t VSS_27 DDRB_DQ23 DDRB_DQS#4 177 VSS_57 VSS_58 178
57 58
DDRB_DQ20 VSS_28 DQ22 DDRB_DQ23 [7] [7] DDRB_DQS#4 DDRB_DQS4 179 DQS4_c DM4_n/DBl4_n 180 2 2
59 60 [7] DDRB_DQS4
[7] DDRB_DQ20 DQ23 VSS_29 DDRB_DQ21 181 DQS4_t VSS_59 182 DDRB_DQ36
CD30
CD31
61 62 DDRB_DQ36 [7]
DDRB_DQ19 63 VSS_30 DQ18 64 DDRB_DQ21 [7] DDRB_DQ33 183 VSS_60 DQ39 184
[7] DDRB_DQ19 DQ19 VSS_31 DDRB_DQ28 [7] DDRB_DQ33 185 DQ38 VSS_61 186 DDRB_DQ37
65 66 DDRB_DQ37 [7]
DDRB_DQ27 VSS_32 DQ28 DDRB_DQ28 [7] DDRB_DQ32 187 VSS_62 DQ35 188
67 68
[7] DDRB_DQ27 DQ29 VSS_33 DDRB_DQ25 [7] DDRB_DQ32 189 DQ34 VSS_63 190 DDRB_DQ44
69 70 DDRB_DQ44 [7]
DDRB_DQ31 VSS_34 DQ24 DDRB_DQ25 [7] DDRB_DQ40 191 VSS_64 DQ45 192
71 72 [7] DDRB_DQ40
[7] DDRB_DQ31 73 DQ25 VSS_35 74 DDRB_DQS#3 193 DQ44 VSS_65 194 DDRB_DQ45
DDRB_DQS#3 [7] DDRB_DQ41 VSS_66 DQ41 DDRB_DQ45 [7]
ne
75 VSS_36 DQS3_c 76 DDRB_DQS3 195 196
DDRB_DQS3 [7] [7] DDRB_DQ41 DQ40 VSS_67
77 DM3_n/DBl3_n DQS3_t 78 197 198DDRB_DQS#5
DDRB_DQ30 VSS_37 VSS_38 DDRB_DQ26 199 VSS_68 DQS5_c 200DDRB_DQS5 DDRB_DQS#5 [7]
79 80 DDRB_DQS5 [7]
[7] DDRB_DQ30 DQ30 DQ31 DDRB_DQ26 [7] 201 DM5_n/DBl5_n DQS5_t 202
81 82
DDRB_DQ24 83 VSS_39 VSS_40 84 DDRB_DQ29 DDRB_DQ42 203 VSS_69 VSS_70 204 DDRB_DQ47
C [7] DDRB_DQ24 DQ26 DQ27 DDRB_DQ29 [7] [7] DDRB_DQ42 DQ46 DQ47 DDRB_DQ47 [7] C
85 86 205 206
VSS_41 VSS_42 DDRB_DQ46 207 VSS_71 VSS_72 208 DDRB_DQ43
87 88
CB5/NC CB4/NC [7] DDRB_DQ46 209 DQ42 DQ43 210 DDRB_DQ43 [7]
89 90
91 92 [7] DDRB_DQ52 DDRB_DQ54 [7]
93 CB1/NC CB0/NC 94 213 DQ52 DQ53 214
do
95 96 [7] DDRB_DQ48 DDRB_DQ55 [7]
DQS8_c DBI8_n 217 DQ49 DQ48 218
97 98
DQS8_t VSS_47 DDRB_DQS#6 219 VSS_77 VSS_78 220
99 100 [7] DDRB_DQS#6
VSS_48 CB6/NC DDRB_DQS6 221 DQS6_c DM6_n/DBl6_n 222
101 102 [7] DDRB_DQS6
103 CB2/NC VSS_49 104 223 DQS6_t VSS_79 224 DDRB_DQ53
VSS_50 CB7/NC DDRB_DQ50 225 VSS_80 DQ54 226 DDRB_DQ53 [7]
105 106 [7] DDRB_DQ50
CB3/NC VSS_51 PCH_DRAMRST# 227 DQ55 VSS_81 228 DDRB_DQ49
107 108
DDRB_CKE0 VSS_52 RESET_n DDRB_CKE1 PCH_DRAMRST# [16] DDRB_DQ51 229 VSS_82 DQ50 230 DDRB_DQ49 [7]
109 110 [7] DDRB_DQ51
[7] DDRB_CKE0 CKE0 CKE1 DDRB_CKE1 [7] 231 DQ51 VSS_83 232 DDRB_DQ59
111 112 DDRB_DQ59 [7]
DDRB_BG1 113 VDD_1 VDD_2 114DDRB_ACT# DDRB_DQ57 233 VSS_84 DQ60 234
in
[7] DDRB_BG1 DDRB_BG0 BG1 ACT_n DDRB_ALERT# DDRB_ACT# [7] [7] DDRB_DQ57 235 DQ61 VSS_85 236 DDRB_DQ62
115 116 DDRB_DQ62 [7]
[7] DDRB_BG0 BG0 ALERT_n DDRB_ALERT# [7] DDRB_DQ61 237 VSS_86 DQ57 238
117 118
DDRB_MA12 VDD_3 VDD_4 [7] DDRB_DQ61 DQ56 VSS_87 240DDRB_DQS#7
119 120DDRB_MA11 239
DDRB_DQS#7 [7]
[7] DDRB_MA12 DDRB_MA9 A12 A11 DDRB_MA11 [7] VSS_88 DQS7_c 242DDRB_DQS7
121 122DDRB_MA7 241
DDRB_DQS7 [7]
[7] DDRB_MA9 A9 A7 DDRB_MA7 [7] 1 243 DM7_n/DBl7_n DQS7_t 244
123 124
DDRB_MA8 VDD_5 VDD_6 DDRB_DQ56 VSS_89 VSS_90 DDRB_DQ63
125 126DDRB_MA5 CD70 [7] DDRB_DQ56
245 246
DDRB_DQ63 [7]
[7] DDRB_MA8 DDRB_MA6 A8 A5 DDRB_MA5 [7] DQ62 DQ63
127 128DDRB_MA4 0.1U_0402_10V7K 247 248
[7] DDRB_MA6 A6 A4 DDRB_MA4 [7] 2 DDRB_DQ60 249 VSS_91 VSS_92 250 DDRB_DQ58
129 130 [7] DDRB_DQ60 DDRB_DQ58 [7]
VDD_7 VDD_8 @ 251 DQ58 DQ59 252
SMB_CLK_S3 253 VSS_93 VSS_94 254 SMB_DATA_S3
i-
SMB_DATA_S3 [12,16,40,45]
RD19 [12,16,40,45]
1 SMB_CLK_S3
2 0_0402_5% DDRB_VDDSPD 255 SCL SDA 256 DDRB_SA0
+3VS VDDSPD SA0
FOX_AS0A826-H4SB-7H 1 1 257 258 +0.6VS
CD53 259 VPP_1 Vtt 260 DDRB_SA1
2.2U_0603_6.3V6K CD54 VPP_2 SA1
.1U_0402_10V6-K 261 262
2 2 GND_1 GND_2
+3VS +3VS +3VS FOX_AS0A826-H4SB-7H
1
RD28
0_0402_5%
RD30
0_0402_5%
RD33
0_0402_5%
is +2.5V
RD21 1 2 0_0402_5%
B B
@ @
2
DDRB_SA0 DDRB_SA1 DDRB_SA2

1
RD29 RD31 RD32

kn
0_0402_5% 0_0402_5% 0_0402_5%

@ +2.5V
2
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0402_6.3V6-M
10U_0402_6.3V6-M
+VREF_DQ_DIMMB_R +1.2V
1 1 1 1
Change RD12 to 0ohm jump
SPD Address = 2H
te
CD61
CD62
CD63
CD64
1
2 2 2 2
Layout Note: RD11
Place near DIMM 1K_0402_1%
1 2 +VREF_CA_DIMMB
+1.2V
2
RD12
2_0402_5%
1
w.
1 1
Layout Note: CD29
.1U_0402_10V6-K
0.022U_0402_16V7-K
1K_0402_1%
Place near DIMM CD@
2 2
2
1
CD47
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
RD14
RD13
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD35 1 CD36 1 CD37 1 CD38 1 CD39 1 CD40 1 CD41 1 CD42 1 1 1 1 1 1 24.9_0402_1%
1 1 1 1 1 CD84
CD43
CD44
CD45
CD83
CD46
CD71
CD72
CD73
CD74
CD@
+0.6VS 33P_0402_50V8J 33P_0402_50V8J
2
RF@ RF@
ww
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
A A
CAD Note:
Trace width= 20 mil, Spcing=20 mils
1U_0402_6.3V6K
10U_0402_6.3V6-M
10U_0402_6.3V6-M
For EMC
CD49
1 1 1
Near JDDRH1
CD50
CD51
2 2 2
Issued Date 2015/02/26 Deciphered Date 2016/02/26 DDRVI SO-DIMM B

C
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
m
D D
+3VS UH1C SPT-H_PCH
co
AV2 G31 PCIE_SATA_PRX_DTX_N9
AV3 CL_CLK PCIE9_RXN/SATA0A_RXN H31 PCIE_SATA_PRX_DTX_P9 PCIE_SATA_PRX_DTX_N9 [40]
1
AW2 CL_DATA CLINK PCIE9_RXP/SATA0A_RXP C31 PCIE_SATA_PTX_DRX_N9 PCIE_SATA_PRX_DTX_P9 [40]
RH133 CL_RST# PCIE9_TXN/SATA0A_TXN B31 PCIE_SATA_PTX_DRX_P9 PCIE_SATA_PTX_DRX_N9 [40] NGFF SSD
R44 PCIE9_TXP/SATA0A_TXP PCIE_SATA_PTX_DRX_P9 [40]
10K_0402_5%
R43 GPP_G8/FAN_PWM_0
U39 GPP_G9/FAN_PWM_1 G29 PCIE_PRX_DTX_N10
a.
N42 GPP_G10/FAN_PWM_2 PCIE10_RXN/SATA1A_RXN E29 PCIE_PRX_DTX_P10 PCIE_PRX_DTX_N10 [40]
GPP_G11/FAN_PWM_3 PCIE10_RXP/SATA1A_RXP C32 PCIE_PTX_DRX_N10 PCIE_PRX_DTX_P10 [40]
FAN PCIE10_TXN/SATA1A_TXN PCIE_PTX_DRX_P10 PCIE_PTX_DRX_N10 [40] NGFF SSD
U43 B32
U42 GPP_G0/FAN_TACH_0 PCIE10_TXP/SATA1A_TXP PCIE_PTX_DRX_P10 [40]
EC_SCI# RH95 1 2 0_0402_5% U41 GPP_G1/FAN_TACH_1 F41
[44] EC_SCI# GPP_G2/FAN_TACH_2 PCIE15_RXN/SATA2_RXN SATA_PRX_DTX_N2 [42]
M44 E41
U36 GPP_G3/FAN_TACH_3 PCIE15_RXP/SATA2_RXP B39 SATA_PRX_DTX_P2 [42]
GPP_G4/FAN_TACH_4 PCIE15_TXN/SATA2_TXN SATA_PTX_DRX_N2 [42] HDD
P44 A39
T45 GPP_G5/FAN_TACH_5 PCIE15_TXP/SATA2_TXP SATA_PTX_DRX_P2 [42]
si
T44 GPP_G6/FAN_TACH_6 D43
PCIe/SATA
GPP_G7/FAN_TACH_7 PCIE16_RXN/SATA3_RXN E42
PCIE_PTX_DRX_P11 B33 PCIE16_RXP/SATA3_RXP A41
[40] PCIE_PTX_DRX_P11 PCIE_PTX_DRX_N11 C33 PCIE11_TXP PCIE16_TXN/SATA3_TXN A40
[40] PCIE_PTX_DRX_N11 PCIE_PRX_DTX_P11 K31 PCIE11_TXN PCIE16_TXP/SATA3_TXP
NGFF SSD[40] PCIE_PRX_DTX_P11 PCIE_PRX_DTX_N11 PCIE11_RXP
L31 H42
[40] PCIE_PRX_DTX_N11 PCIE11_RXN PCIE17_RXN/SATA4_RXN H40
AB33 PCIE17_RXP/SATA4_RXP E45
ne
AB35 GPP_F10/SCLOCK PCIE17_TXN/SATA4_TXN F45
AA44 GPP_F11/SLOAD PCIE17_TXP/SATA4_TXP
AA45 GPP_F13/SDATAOUT0 K37
GPP_F12/SDATAOUT1 PCIE18_RXN/SATA5_RXN G37
C PCIE18_RXP/SATA5_RXP C
B38 G45
C38 PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN G44
D39 PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP SATA_LED# [45]
E37 PCIE14_RXN/SATA1B_RXN AD44 SATA_LED# RH15 1 2
PCIE14_RXP/SATA1B_RXP GPP_E8/SATALED# SSD_DET# +3VS
do
AG36 10K_0402_5%
GPP_E0/SATAXPCIE0/SATAGP0 SSD_DET# [40]
C36 AG35
B36 PCIE13_TXN/SATA0B_TXN GPP_E1/SATAXPCIE1/SATAGP1 AG39
G35 PCIE13_TXP/SATA0B_TXP GPP_E2/SATAXPCIE2/SATAGP2 AD35
E35 PCIE13_RXN/SATA0B_RXN GPP_F0/SATAXPCIE3/SATAGP3 AD31
PCIE13_RXP/SATA0B_RXP GPP_F1/SATAXPCIE4/SATAGP4 AD38
PCIE_PTX_DRX_P12 A35 GPP_F2/SATAXPCIE5/SATAGP5 AC43
[40] PCIE_PTX_DRX_P12 PCIE_PTX_DRX_N12 B35 PCIE12_TXP GPP_F3/SATAXPCIE6/SATAGP6 AB44
NGFF SSD[40] PCIE_PTX_DRX_N12 PCIE_PRX_DTX_P12 H33 PCIE12_TXN GPP_F4/SATAXPCIE7/SATAGP7
in
[40] PCIE_PRX_DTX_P12 PCIE_PRX_DTX_N12 G33 PCIE12_RXP
[40] PCIE_PRX_DTX_N12 PCIE12_RXN W36
J45 GPP_F21/EDP_BKLTCTL W35 PCH_EDP_PWM [34]
K44 PCIE20_TXP/SATA7_TXP GPP_F20/EDP_BKLTEN W42 PCH_EDP_ENBKL [34]
N38 PCIE20_TXN/SATA7_TXN GPP_F19/EDP_VDDEN PCH_EDP_ENVDD [34]
HOST
N39 PCIE20_RXP/SATA7_RXP AJ3 PCH_THRMTRIP#_R
RH341 2 620_0402_5% H_THRMTRIP#
PCIE20_RXN/SATA7_RXN THERMTRIP# H_THRMTRIP# [6,24]
H44 AL3 PCH_PECI RH35 1 2 43_0402_1%
PCIE19_TXP/SATA6_TXP PECI EC_PECI [6,44]
H43 AJ4 H_PM_SYNC_R RH13 1 2 30_0402_1%
PCIE19_TXN/SATA6_TXN PM_SYNC H_PM_SYNC [6]
i-
L39 AK2 CPU_PLTRST#
L37 PCIE19_RXP/SATA6_RXP PLTRST_PROC# AH2 PCH_PM_DOWN CPU_PLTRST# [6]
3 OF 12 H_PM_DOWN [6]
PCIE19_RXN/SATA6_RXN PM_DOWN
SKYLAKE-H-PCH_FCBGA837
0.1U_0402_25V6
EMC_NS@CH263
1
2
is
B B
kn
te
w.
ww
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (1/9) PCIe/SATA/GPPFG
Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
m
+3VS
D D
KBRST# 2 1
SPT-H_PCH 10K_0402_5% RH113
UH1F
co
USB30_TX_N1 C11 AT22 LPC_AD0
PCH_SMI#
LPC/eSPI
[41] USB30_TX_N1 USB30_TX_P1 USB3_1_TXN GPP_A1/LAD0/ESPI_IO0 LPC_AD1 LPC_AD0 [44,45] 2 1
B11 AV22
[41] USB30_TX_P1 USB30_RX_N1 B7 USB3_1_TXP GPP_A2/LAD1/ESPI_IO1 AT19 LPC_AD2 LPC_AD1 [44,45] 10K_0402_5% @ RH129
LEFT USB (3.0)[41] USB30_RX_N1 USB30_RX_P1 A7 USB3_1_RXN GPP_A3/LAD2/ESPI_IO2 BD16 LPC_AD3 LPC_AD2 [44,45] +3VALW
[41] USB30_RX_P1 USB30_TX_N2 B12 USB3_1_RXP GPP_A4/LAD3/ESPI_IO3 LPC_AD3 [44,45]
[41] USB30_TX_N2 USB30_TX_P2 A12 USB3_2_TXN/SSIC_1_TXN BE16 LPC_FRAME#
[41] USB30_TX_P2 USB30_RX_N2 C8 USB3_2_TXP/SSIC_1_TXP GPP_A5/LFRAME#/ESPI_CS0# BA17 SERIRQ LPC_FRAME# [44,45]
LEFT USB (3.0)[41] USB30_RX_N2 USB30_RX_P2 USB3_2_RXN/SSIC_1_RXN GPP_A6/SERIRQ/ESPI_CS1# SERIRQ [44,45] SERIRQ 2 1
a.
B8 AW17
[41] USB30_RX_P2 USB3_2_RXP/SSIC_1_RXP GPP_A7/PIRQA#/ESPI_ALERT0# AT17 KBRST# 10K_0402_5% RH104
USB30_TX_N6 GPP_A0/RCIN#/ESPI_ALERT1# KBRST# [44]
B15 BC18
[45] USB30_TX_N6 USB30_TX_P6 C15 USB3_6_TXN GPP_A14/SUS_STAT#/ESPI_RESET#
[45] USB30_TX_P6 USB30_RX_N6 USB3_6_TXP
3D Camera [45] USB30_RX_N6 USB30_RX_P6
K15
USB3_6_RXN CLK_PCI_EC_R CLK_PCI_EC
USB
K13 BC17 RH84 1 2 22_0402_5%
[45] USB30_RX_P6 USB3_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK AV19 CLK_PCI_TPM_R 1 2 CLK_PCI_TPM CLK_PCI_EC [44]
RH87 22_0402_5%
B14 GPP_A10/CLKOUT_LPC1 CLK_PCI_TPM [45]
C14 USB3_5_TXN M45 PCH_SMI# 1 TC110 PAD @
si
G13 USB3_5_TXP GPP_G19/SMI# N43
H13 USB3_5_RXN GPP_G18/NMI#
10P_0402_50V8J CH266
USB3_5_RXP
10P_0402_50V8J
1
EMC_NS@
EMC_NS@
CH265
D13 AE45 1
C13 USB3_3_TXP/SSIC_2_TXP GPP_E6/DEVSLP2 AG43
A9 USB3_3_TXN/SSIC_2_TXN GPP_E5/DEVSLP1 AG42 DEVSLP0_R
B10 USB3_3_RXP/SSIC_2_RXP GPP_E4/DEVSLP0 AB39
DEVSLP0_R [40] NGFF SSD 2
USB3_3_RXN/SSIC_2_RXN GPP_F9/DEVSLP7 AB36 2
SATA
GPP_F8/DEVSLP6
ne
B13 AB43
A14 USB3_4_TXP GPP_F7/DEVSLP5 AB42
G11 USB3_4_TXN GPP_F6/DEVSLP4 AB41
E11 USB3_4_RXP 6 OF 12 GPP_F5/DEVSLP3
C USB3_4_RXN C
do
in
i-
UH1E SPT-H_PCH
BB3
HDMI_HPD AW4 GPP_I7/DDPC_CTRLCLK BD6
[35] HDMI_HPD GPP_I0/DDPB_HPD0 GPP_I8/DDPC_CTRLDATA
AY2 BA5 DDPB_CLK +3VS
AV4
BA4
GPP_I1/DDPC_HPD1
GPP_I2/DDPD_HPD2
is GPP_I5/DDPB_CTRLCLK
GPP_I6/DDPB_CTRLDATA
BC4 DDPB_DATA
BE5
DDPB_CLK [35]
DDPB_DATA [35]
HDMI
B GPP_I3/DDPE_HPD3 GPP_I9/DDPD_CTRLCLK BE6 DDPB_CLK
B
GPP_I10/DDPD_CTRLDATA 2 1 RH32
2.2K_0402_5%
Y44
GPP_F14 V44 DDPB_DATA 2 1 RH33
GPP_F23 W39
GPP_F22 2.2K_0402_5%
PCH_EDP_HPD BD7
[34] PCH_EDP_HPD GPP_I4/EDP_HPD
kn
L43
GPP_G23 L44 DDPB_CTRLDATA
GPP_G22 U35 The signal has a weak internal pull-down.
GPP_G21
GPP_G20
R35
BD36
* H
L
Port B is detected.
Port B is not detected.
GPP_H23
5 OF 12
DDPC_CTRLDATA
SKYLAKE-H-PCH_FCBGA837 The signal has a weak internal pull-down.
te
H Port C is detected.
* L Port C is not detected. (Default)
DDPD_CTRLDATA
The signal has a weak internal pull-down.
H Port D is detected.
* L Port D is not detected. (Default)
w.
ww
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (2/9) USB3/GPPAEFGHI
Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
RPH1
PCH_HDA_RST# 1 8 HDA_RST#
[43] PCH_HDA_RST# PCH_HDA_SYNC HDA_SYNC
2 7
[43] PCH_HDA_SYNC PCH_HDA_BIT_CLK 3 6 HDA_BIT_CLK
[43] PCH_HDA_BIT_CLK PCH_HDA_SDOUT HDA_SDOUT
4 5
[43] PCH_HDA_SDOUT
33_0804_8P4R_5%
1
CH77
100P_0402_50V8J For EMC
2 EMC_NS@
+1.2V
m
D UH1D SPT-H_PCH D
1
RH756
HDA_BIT_CLK BA9 BB17
co
HDA_BCLK GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF# 470_0402_5%
HDA_RST# BD8 AW22PM_CLKRUN#
PCH_HDA_SDIN0 BE7 HDA_RST# GPP_A8/CLKRUN#
[43] PCH_HDA_SDIN0 HDA_SDI0
2
BC8 AR15
HDA_SDI1 GPD11/LANPHYPC
RH9 1 2 0_0402_5% HDA_SDOUT BB7 AV13
ME_FLASH HDA_SYNC BD9 HDA_SDO GPD9/SLP_WLAN#
HDA_SYNC BC14
BD1 DRAM_RESET# BD23 PCH_DRAMRST# [12,13]
BE2 RSVD_BD1 GPP_B2/VRALERT# AL27
RSVD_BE2 GPP_B1
a.
AR27
PROC_AUDIO_SDO_CPU RH754 2 1 30_0402_1% PROC_AUDIO_SDO_PCH AM1 AUDIO GPP_B0 N44
[8] PROC_AUDIO_SDO_CPU PROC_AUDIO_SDI_CPU DISPA_SDO GPP_G17/ADR_COMPLETE
[8] PROC_AUDIO_SDI_CPU AN2 AN24
PROC_AUDIO_CLK_CPU RH755 2 1 30_0402_1% PROC_AUDIO_CLK_PCH AM2 DISPA_SDI GPP_B11 AY1 SYS_PWROK_R RH1931 2 0_0402_5%
[8] PROC_AUDIO_CLK_CPU DISPA_BCLK SYS_PWROK SYS_PWROK [36,44]
PLACE NEAR PCH AL42 BC13 WAKE# RH69 1 2 0_0402_5% PCIE_WAKE#
GPP_D8/I2S0_SCLK WAKE# PCIE_WAKE# [37,40,44]
AN42 BC15 SLP_A# 1 PAD @
GPP_D7/I2S0_RXD GPD6/SLP_A# TH30
AM43 AV15 SLP_LAN# 1 PAD @
AJ33 GPP_D6/I2S0_TXD SLP_LAN# BC26 SLP_S0 1 TH31
PAD @
GPP_D5/I2S0_SFRM GPP_B12/SLP_S0# TH32
AH44 AW15PM_SLP_S3#_R RH70 1 2 0_0402_5% PM_SLP_S3#
GPP_D20/DMIC_DATA0 GPD4/SLP_S3# PM_SLP_S3# [44]
si
AJ35 BD15 PM_SLP_S4#_R RH71 1 2 0_0402_5% PM_SLP_S4#
AJ38 GPP_D19/DMIC_CLK0 GPD5/SLP_S4# BA13 PM_SLP_S5#_R 1 PM_SLP_S4# [44]
PAD @
GPP_D18/DMIC_DATA1 GPD10/SLP_S5# TH33
AJ42
GPP_D17/DMIC_CLK1 AN15 SUSCLK
GPD8/SUSCLK SUSCLK [40]
BD13 BATLOW#
GPD0/BATLOW# BB19 SUSACK#_R 0_0402_5% 2 @ 1 RH66
PCH_RTCRST# BC10 GPP_A15/SUSACK# SUSWARN#_R SUSACK# [44] SUSACK#_R CRB Reserve
BD19 RH74 1 2 0_0402_5% SUSWARN#_R
[44] PCH_RTCRST# PCH_SRTCRST# BB10 RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK SUSWARN# [44] RH7451 2 0_0402_5%
[44] PCH_SRTCRST# SRTCRST#
RH12 1 2 0_0402_5% PCH_PWROK_R AW11 BD11 PCH_LAN_WAKE#
[36,44] PCH_PWROK
ne
RH14 1 2 0_0402_5% PCH_RSMRST#_R BA11 PCH_PWROK GPD2/LAN_WAKE# BB15 PCH_AC_PRESENT_R RH76 1 2 0_0402_5%
[36,44] EC_RSMRST# RH239 1 2 0_0402_5% RSMRST# GPD1/ACPRESENT BB13 PM_SLP_SUS#_R AC_PRESENT [44]
RH77 1 @ 20_0402_5%
PCH_DPWROK_R AV11 SLP_SUS# PM_PWRBTN#_R PM_SLP_SUS# [44]
[44] DPWROK_EC RH68 1 @ 2 0_0402_5% AT13 RH75 1 2 0_0402_5% PBTN_OUT# [44]
SMB_ALERT# BB41 DSW_PWROK GPD3/PWRBTN# AW1 SYS_RESET#
PCH_SMBCLK GPP_C2/SMBALERT# SYS_RESET# SYS_RESET# [36]
AW44 BD26
SMBUS
C PCH_BEEP [43] C
PCH_SMBDATA BB43 GPP_C0/SMBCLK GPP_B14/SPKR AM3
SMB0_ALERT# BA40 GPP_C1/SMBDATA PROCPWRGD H_CPUPWRGD [6]
SML0CLK AY44 GPP_C5/SML0ALERT# AT2
SML0DATA BB39 GPP_C3/SML0CLK ITP_PMODE AR3
SMB1_ALERT# GPP_C4/SML0DATA JTAGX JTAGX [36]
AT27 JTAG AR2
do
[39] SMB1_ALERT# GPP_B23/SML1ALERT#/PCHHOT# JTAG_TMS PCH_TMS [36]
SML1CLK AW42 AP1
AW45 GPP_C6/SML1CLK JTAG_TDO AP2 PCH_TDO [36]
SML1DATA
GPP_C7/SML1DATA JTAG_TDI PCH_TDI [36]
AN3
JTAG_TCK PCH_TCK [36]
4 OF 12
+3VALW_PCH
RH56 1 2 10K_0402_5% SUSWARN#
in
+3VALW CMOS
RH58 1 2 10K_0402_5% PCH_AC_PRESENT_R W=20mils W=20mils Total Length 8000 mils
VCCRTC +RTCVCC
+RTCVCC
1
1
RH60 1 2 10K_0402_5% BATLOW#
2 0_0402_5% CH4
RH2 1
1U_0402_6.3V6K @ JME1
RH80 1 2 10K_0402_5% WAKE# 1
CH1 SHORT PADS
i-
2
1 RH3 2 2 PCH_SRTCRST#
1U_0402_6.3V6K
1 RH747 2 PCH_LAN_WAKE# 20K_0402_5%
20K_0402_5% 2 CD@
+3VS Place JUMPER under RAM door PCH_RTCRST#

1 RH4 2
20K_0402_5% 1
SYS_RESET#
1
RH67 1 @ 2 10K_0402_5% CH5 JCMOS1
RH65 1 2 8.2K_0402_5% PM_CLKRUN#
1U_0402_6.3V6K @ SHORT PADS
is
2
2
RH54 2 1 10K_0402_5% PCH_PWROK Y only
B B
RH59 1 2 10K_0402_5% PCH_RSMRST#_R
PCH_DPWROK_R
Walter PD 100K
RH61 1 2 100K_0402_5% Walter PU 10K VCC3M
+3VALW_PCH
AS EMC request +3VALW_PCH

kn
RH28 1 @ 2 PCH_BEEP PCH_PWROK SYS_PWROK_R PCH_DPWROK_R

+3VALW_PCH RH25 1 @ 2 ME_FLASH
1K_0402_5%
ST01obtfFA(
Ph
Ke== lerH8a
R
/ii
Gab
Plll
P
_ e t
Bh
1a
4s TSt
1K_0402_5%
sDn
gsa
n
aT
wpSa
eSw
a p tottTC
kw
ip i
n mm
t owlPpdw
e datCpra
rmereHeep
no er rs
ad. nw sB
le hait l
p.hu
u(i
lDs,bi6n
leison4e
- noov-si
df
oa
wlrtbtBA
n t) t h l
.
1 1 1 HDA_SDO This signal has a weak internal pull-down.

a s
a fh
RH101 1 2 2.2K_0402_5% SML0CLK

“ ” * 0 = Enable security measures defined in the Flash Descriptor.
Ea
b
e
oP
p
T tlwlo
v tr
e
seo
ap
nr
ac
d n
ds
roea ra
er
s a
s
RH102 1 2 2.2K_0402_5% SML0DATA CH83 CH84 CH85

“ ” .1U_0402_10V6-K .1U_0402_10V6-K .1U_0402_10V6-K 1 = Disable Flash Descriptor Security (override). This
nehoW1h
ce
ce
esr
s g
o lg
Ih
nsl
d
ra ud
beloic
oi k
e
s
* 2 2 2 strap should only be asserted high using external pull-

i
voy
i
ta el
f o
ebi
co
et
e.
c1o o
k6
sd
t
du
o)
f
EMC@ EMC@ EMC@

up in manufacturing/debug environments ONLY.
te ic
ie
n
ogr
-t
bor
cheo)
ke p.
eK(z
(s7
en
f
lh
te
+3VALW_PCH
RH765 1 2 2.2K_0402_5% SMB_ALERT# RH768 1 @ 2 2.2K_0402_5%
2 2.2K_0402_5% SMB0_ALERT# RH769
co d
ltsd
s
npe
b,s
l
cAt
i t
t
RH766 1 @ 1 @ 2 2.2K_0402_5% HDA_SYNC

RH767 1 2 2.2K_0402_5% SMB1_ALERT# RH770 1 2 2.2K_0402_5% RH31 1 @ 2
rae
hs
ac
pto
o
pi
inF
a
1e
6
1
,s
o
@ @
1K_0402_5%
)n
et
er
dh
k
s
r
p
Strap
l
h
u
g
I
T
SMBALERT# / GPP_C2
0 = Disable Intel ME Crypto Transport Layer Security GPU, EC, Thermal Sensor
(TLS) cipher suite (no confidentiality). (Default)
w.
1 = Enable Intel ME Crypto Transport Layer Security +3VS

(TLS) cipher suite (with confidentiality). Must be +3VALW_PCH 1 RH121 2 2.2K_0402_5%
2
pulled up to support Intel AMT with TLS and Intel

G
1 RH122 2 2.2K_0402_5%
SBA (Small Business Advantage) with TLS.
SML0ALERT# / GPP_C5 SML1CLK 6 1 EC_SMB_CK2

S
0 = LPC Is selected for EC. (Default) EC_SMB_CK2 [27,35,39,44]

D
5
1 = eSPI Is selected for EC. QH2A 2N7002KDWH_SOT363-6

G
+3VS
ww
A SML1ALERT# / PCHHOT#/GPP_B23 DIMM1, DIMM2, Mini CARD, TP A

This signal has an internal pull-down EC_SMB_DA2
+3VS SML1DATA 3 4
S
EC_SMB_DA2 [27,35,39,44]
D
1 RH114 2 2.2K_0402_5% 2N7002KDWH 1 RH115 2 2.2K_0402_5% QH2B 2N7002KDWH_SOT363-6

+3VALW_PCH
2
Vth= min 1V, max 2.5V

G
ESD 2KV
1 RH116 2 2.2K_0402_5% 1 RH117 2 2.2K_0402_5%
PCH_SMBCLK 6 1 SMB_CLK_S3
S
SMB_CLK_S3 [12,13,40,45]
D

5
QH1A 2N7002KDWH_SOT363-6
G
Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (3/9) HDA,RTC,SMBUS,PM

PCH_SMBDATA 3 4 SMB_DATA_S3 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
S
SMB_DATA_S3 [12,13,40,45] AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
BY511/BY710
D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.3
QH1B 2N7002KDWH_SOT363-6 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5 4 3 2 1
5 4 3 2 1
UH1G SPT-H_PCH
m
AR17
GPP_A16/CLKOUT_48
D D
G1 L1
[6] PCH_CPU_NSSC_CLK F1 CLKOUT_CPUNSSC_P CLKOUT_ITPXDP L2
[6] PCH_CPU_NSSC_CLK# CLKOUT_CPUNSSC CLKOUT_ITPXDP_P
co
G2 J1
[6] PCH_CPU_BCLK H2 CLKOUT_CPUBCLK_P CLKOUT_CPUPCIBCLK J2 PCH_CPU_PCIBCLK# [6]
+1.0VALW [6] PCH_CPU_BCLK# CLKOUT_CPUBCLK CLKOUT_CPUPCIBCLK_P PCH_CPU_PCIBCLK [6]
XTAL24_OUT A5 N7
+VCCCLK XTAL24_IN A6 XTAL24_OUT CLKOUT_PCIE_N0 N8
XTAL24_IN CLKOUT_PCIE_P0
RH198 1 2 0_0402_5% RH6 1 2 2.7K_0402_1% PCH_CLK_BIASREF E1 L7 CLK_PCIE_CR#
XCLK_BIASREF CLKOUT_PCIE_N1 L5 CLK_PCIE_CR CLK_PCIE_CR# [45]
CR
a.
PCH_RTCX1 BC9 CLKOUT_PCIE_P1 CLK_PCIE_CR [45]
PCH_RTCX2 BD10 RTCX1 D3 CLK_PCIE_WLAN#
RTCX2 CLKOUT_PCIE_N2 F2 CLK_PCIE_WLAN CLK_PCIE_WLAN# [40]
CLKOUT_PCIE_P2 CLK_PCIE_WLAN [40] WLAN
BC24
CR_CLKREQ# AW24 GPP_B5/SRCCLKREQ0# E5 CLK_PCIE_LAN#
[45] CR_CLKREQ# WLAN_CLKREQ# AT24 GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_N3 CLK_PCIE_LAN# [37]
G4 CLK_PCIE_LAN LAN
[40] WLAN_CLKREQ# LAN_CLKREQ# BD25 GPP_B7/SRCCLKREQ2# CLKOUT_PCIE_P3 CLK_PCIE_LAN [37]
[37] LAN_CLKREQ# BB24 GPP_B8/SRCCLKREQ3# D5
GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_N4
si
BE25 E6
AT33 GPP_B10/SRCCLKREQ5# CLKOUT_PCIE_P4
SSD_CLKREQ# AR31 GPP_H0/SRCCLKREQ6# D8
[40] SSD_CLKREQ# GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_N5
BD32 D7
BC32 GPP_H2/SRCCLKREQ8# CLKOUT_PCIE_P5
BB31 GPP_H3/SRCCLKREQ9# R8
GPU_CLKREQ# BC33 GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_N6 R7
[24] GPU_CLKREQ# GPP_H5/SRCCLKREQ11# CLKOUT_PCIE_P6
BA33
AW33 GPP_H6/SRCCLKREQ12# U5 CLK_PCIE_SSD#
ne
BB33 GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_N7 U7 CLK_PCIE_SSD CLK_PCIE_SSD# [40]
GPP_H8/SRCCLKREQ14# CLKOUT_PCIE_P7 CLK_PCIE_SSD [40] M.2 SSD
BD33
GPP_H9/SRCCLKREQ15# W10
C +3VS R13 CLKOUT_PCIE_N8 W11 C
R11 CLKOUT_PCIE_N15 CLKOUT_PCIE_P8
CLKOUT_PCIE_P15 N3
RH89 1 2 10K_0402_5% LAN_CLKREQ# P1 CLKOUT_PCIE_N9 N2
R2 CLKOUT_PCIE_N14 CLKOUT_PCIE_P9
do
RH90 1 2 10K_0402_5% WLAN_CLKREQ# CLKOUT_PCIE_P14 P3
W7 CLKOUT_PCIE_N10 P2
RH91 1 2 10K_0402_5% CR_CLKREQ# Y5 CLKOUT_PCIE_N13 CLKOUT_PCIE_P10
CLKOUT_PCIE_P13 R3 CLK_PCIE_GPU#
RH93 1 2 10K_0402_5% SSD_CLKREQ# U2 CLKOUT_PCIE_N11 R4 CLK_PCIE_GPU CLK_PCIE_GPU# [24]
CLKOUT_PCIE_N12 CLKOUT_PCIE_P11 CLK_PCIE_GPU [24] GPU
U3
RH94 1 2 10K_0402_5% GPU_CLKREQ# CLKOUT_PCIE_P12 7 OF 12
in
i-
2 1 PCH_RTCX1
RH92 1M_0402_5%
RH1
1 2 PCH_RTCX2
YH2 10M_0402_5%
2 3 XTAL24_IN YH1
GND1 OSC2 1 2
XTAL24_OUT
1
1
OSC1 GND2
4
1
is 32.768KHZ_7PF_200458-PG14
B 1 1 B
CH9 24MHZ_6PF_7V24000032 CH10
4.7P_0402_50V8-J 4.7P_0402_50V8-J CH2 CH3
2 2 6.8P_0402_50V8-D 6.8P_0402_50V8-D
2 2
kn
te
w.
ww
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (3/9) CLOCK,GPPBH
Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
UH1A SPT-H_PCH
BD17 BB27 PLT_RST#

GPP_A11/PME# GPP_B13/PLTRST# PLT_RST# [27,36,37,40,44,45]
1
AG15
AG14 RSVD_1 P43 RH43
m
AF17 RSVD_2 GPP_G16/GSXCLK R39 100K_0402_5%
SPI_CLK_PCH_0 AE17 RSVD_3 GPP_G12/GSXDOUT R36
D RH105 1 2 33_0402_5% D
[44] SPI_CLK_PCH_0 SPI_CLK_PCH_1 SPI_CLK_PCH
RSVD_4 GPP_G13/GSXSLOAD R42
RH106 1 2 33_0402_5%
2
1 PAD @ AR19 GPP_G14/GSXDIN R41
TC107 TP2 GPP_G15/GSXSRESET#
SPI_CS0#_R SPI_CS0# 1 PAD @ AN17
co
[44] SPI_CS0#_R RH107 1 2 TC108 TP1
0_0402_5% SPI_SI
SPI_CS1#_R RH108 1 2 SPI_CS1# BB29 AF41
SPI_SO BE30 SPI0_MOSI GPP_E3/CPU_GP0 AE44
0_0402_5% SPI_CS0# SPI0_MISO GPP_E7/CPU_GP1
BD31 BC23
SPI_SI_R0 SPI_CLK_PCH BC31 SPI0_CS0# GPP_B3/CPU_GP2 BD24
RH109 1 2 33_0402_5% SPI_CS1# SPI0_CLK GPP_B4/CPU_GP3
[44] SPI_SI_R0 SPI_SI_R1 SPI_SI AW31
RH110 1 2 33_0402_5% SPI0_CS1# BC36
SPI_SO_R0 SPI_SO SPI_WP# BC29 GPP_H18/SML4ALERT# BE34
RH111 1 2 33_0402_5% [36] SPI_WP# SPI_HOLD# SPI0_IO2 GPP_H17/SML4DATA GPP_H12
[44] SPI_SO_R0 SPI_SO_R1 BD30 BD39
RH112 1 2 33_0402_5% SPI0_IO3 GPP_H16/SML4CLK This strap should sample LOW. There should NOT be any
AT31 BB36
a.
SPI0_CS2# GPP_H15/SML3ALERT# BA35 +3VS on-board device driving it to opposite direction during
SPI_WP#_R0 AN36 GPP_H14/SML3DATA BC35 strap sampling.
RH250 1 2 33_0402_5% 4.7K_0402_5%
SPI_WP#_R1 SPI_WP# AL39 GPP_D1/SPI1_CLK GPP_H13/SML3CLK BD35 RH753 1 @ 2
RH249 1 2 33_0402_5%
AN41 GPP_D0/SPI1_CS# GPP_H12/SML2ALERT# AW35
SPI_CLK_PCH_0 SPI_HOLD#_R0 SPI_HOLD# GPP_D3/SPI1_MOSI GPP_H11/SML2DATA
RH252 1 2 33_0402_5% AN38 BD34
SPI_CLK_PCH_1 SPI_HOLD#_R1 AH43 GPP_D2/SPI1_MISO GPP_H10/SML2CLK
RH251 1 2 33_0402_5%
AG44 GPP_D22/SPI1_IO3 BE11 RH743 2 1 1M_0402_5%
GPP_D21/SPI1_IO2 INTRUDER# +RTCVCC
1 OF 12
si
1 1 SKYLAKE-H-PCH_FCBGA837
CH267 CH268
10P_0402_50V8J 10P_0402_50V8J
2 EMC_NS@ 2 EMC_NS@
ne
C @ C
SPI_HOLD# RH771 1 2 1K_0402_5% +3VALW_PCH +3V_SPI
RC1711 2 0_0402_5%
+3VALW_PCH +3VS
do
RC172 1 @ 2
RH123 1 2 1K_0402_5% SPI_WP# 0_0402_5%
RH125 1 2 1K_0402_5% SPI_HOLD#
RH772 1 @ 2 1K_0402_5% SPI_SO +3V_SPI
RH773 1 @ 2 1K_0402_5% SPI_SI 1. If support DS3, connect to +3VS and don't support EC mirror code;
2. If don't support DS3, connect to +3VALW_PCH and support EC mirror code.
SPI0_MOSI *
SPI0_MISO
in
This signal has an internal pull-up.
This strap should sample HIGH. There should NOT be any
on-board device driving it to opposite direction during
strap sampling.
i-
64Mb Flash ROM +3V_SPI 32Mb
UC7
Flash ROM +3V_SPI
UC3 SPI_CS1#_R 1 8
SPI_CS0#_R SPI_SO_R1 CS# VCC SPI_HOLD#_R1 1 For EMI
1 8 1 2 7
SPI_SO_R0 2 CS# VCC 7 SPI_HOLD#_R0 SPI_WP#_R1 DO HOLD# SPI_CLK_PCH_1 RH742 10_0402_5%
DO HOLD# 3 6 CH246 SPI_CLK_PCH_1 1 2
SPI_WP#_R0 SPI_CLK_PCH_0
3
4 WP#
GND
CLK
DI
6
5 SPI_SI_R0
2
CH13
.1U_0402_10V6-K
is 4 WP#
GND
CLK
DI
5 SPI_SI_R1
2
.1U_0402_10V6-K
EMC_NS@
1
W25Q32FVSSIQ_SO8 CH247
B W25Q64FVSSIG_SO8 B
10P_0402_50V8J
2 EMC_NS@
kn
RH119 10_0402_5%
SPI_CLK_PCH_0 1 2
To add SPI socket LTCX004C100 and co-layout with UC3. 1
(SMT Notice is need as well.) To add SPI socket LTCX004C100 and co-layout with UC7. EMC_NS@
UC8 (SMT Notice is need as well.) CH11
SPI_CS0#_R 1 8 +3V_SPI 10P_0402_50V8J
CS# VCC 2 EMC_NS@
UC9
SPI_SO_R0 2 7 SPI_HOLD#_R0 SPI_CS1#_R 1 8 +3V_SPI
DO HOLD# CS# VCC
te
SPI_WP#_R0 3 6 SPI_CLK_PCH_0 SPI_SO_R1 2 7 SPI_HOLD#_R1

WP# CLK DO HOLD#
4 5 SPI_SI_R0 SPI_WP#_R1 3 6 SPI_CLK_PCH_1
GND DI WP# CLK
4 5 SPI_SI_R1
W25Q64FVSSIQ_SO8 GND DI
SA000039A00
@ W25Q64FVSSIQ_SO8
SA00005P500
w.
@
ww
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (5/9) SPI,SMBUS,GPPBEGH
Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
m
D D
co
UH1B SPT-H_PCH
DMI_CTX_PRX_N0 L27
a.
[5] DMI_CTX_PRX_N0 DMI_CTX_PRX_P0 DMI_RXN0
N27 AF5 USB20_N0
[5] DMI_CTX_PRX_P0 DMI_CRX_PTX_N0 C27 DMI_RXP0 USB2N_1 AG7 USB20_P0 USB20_N0 [45] RIGHT USB (2.0)
[5] DMI_CRX_PTX_N0 DMI_CRX_PTX_P0 B27 DMI_TXN0 USB2P_1 AD5 USB20_N1 USB20_P0 [45]
[5] DMI_CRX_PTX_P0 DMI_CTX_PRX_N1 E24 DMI_TXP0 USB2N_2 AD7 USB20_P1 USB20_N1 [41] LEFT USB (3.0)
[5] DMI_CTX_PRX_N1 DMI_CTX_PRX_P1 DMI_RXN1 USB2P_2 USB20_P1 [41]
G24 AG8 USB20_N2
[5] DMI_CTX_PRX_P1 DMI_CRX_PTX_N1 DMI_RXP1 USB2N_3 USB20_N2 [41]
B28 AG10 USB20_P2
[5] DMI_CRX_PTX_N1 DMI_CRX_PTX_P1 A28 DMI_TXN1 USB2P_3 AE1 USB20_P2 [41] LEFT USB (3.0)
[5] DMI_CRX_PTX_P1 DMI_CTX_PRX_N2 G27 DMI_TXP1 USB2N_4 AE2
[5] DMI_CTX_PRX_N2 DMI
DMI_RXN2 USB2P_4
si
DMI_CTX_PRX_P2 E26 AC2 USB20_N4
[5] DMI_CTX_PRX_P2 USB20_N4 [34]
[5] DMI_CRX_PTX_N2
DMI_CRX_PTX_N2 B29 DMI_RXP2
DMI_TXN2
USB2N_5
USB2P_5
AC3 USB20_P4
USB20_P4 [34]
Touch Screen
DMI_CRX_PTX_P2 C29 AF2 USB20_N5
[5] DMI_CRX_PTX_P2 DMI_CTX_PRX_N3 L29 DMI_TXP2 USB2N_6 AF3 USB20_P5 USB20_N5 [34]
[5] DMI_CTX_PRX_N3 DMI_CTX_PRX_P3 K29 DMI_RXN3 USB2P_6 AB3 USB20_P5 [34] Camera
[5] DMI_CTX_PRX_P3 DMI_CRX_PTX_N3 DMI_RXP3 USB2N_7
B30 USB 2.0 AB2 Some PCH config not support USB port 6 & 7.
[5] DMI_CRX_PTX_N3 DMI_CRX_PTX_P3 A30 DMI_TXN3 USB2P_7 AL8
[5] DMI_CRX_PTX_P3 DMI_TXP3 USB2N_8 AL7
RH741 1100_0402_1%
2 PCIE_RCOMN B18 USB2P_8 AA1
ne
CAD Note: PCIE_RCOMP PCIE_RCOMPN USB2N_9
Trace width=15 mils ,Spacing=15mil C17 AA2
PCIE_RCOMPP USB2P_9 AJ8 1 PAD @
Max length= N/A mils. USB2N_10 TH28
AJ7 1 PAD @ Debug port, reserved test point
C H15 USB2P_10 W2 USB20_N10 TH29 C
G15 PCIE1_RXN/USB3_7_RXN USB2N_11 W3 USB20_P10 USB20_N10 [40]
A16 PCIE1_RXP/USB3_7_RXP USB2P_11 AD3 USB20_P10 [40] Buletooth
B16 PCIE1_TXN/USB3_7_TXN USB2N_12 AD2
PCIe/USB 3
CH2401 2 .1U_0402_10V6-K PCIE_PTX_DRX_N2 B19 PCIE1_TXP/USB3_7_TXP USB2P_12 V2
do
[45] PCIE_PTX_C_DRX_N2 PCIE_PTX_DRX_P2 PCIE2_TXN/USB3_8_TXN USB2N_13
Cardreader [45] CH2411 2 .1U_0402_10V6-K C19 V1
PCIE_PTX_C_DRX_P2 PCIE_PRX_DTX_N2 E17 PCIE2_TXP/USB3_8_TXP USB2P_13 AJ11
[45] PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 PCIE2_RXN/USB3_8_RXN USB2N_14
G17 AJ13
[45] PCIE_PRX_DTX_P2 PCIE_PRX_DTX_N3 PCIE2_RXP/USB3_8_RXP USB2P_14
L17
[40] PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3 PCIE3_RXN/USB3_9_RXN
K17
[40] PCIE_PRX_DTX_P3 PCIE_PTX_DRX_N3 PCIE3_RXP/USB3_9_RXP
WLAN [40] PCIE_PTX_C_DRX_N3
CH17 1 2 .1U_0402_10V6-K
PCIE_PTX_DRX_P3
B20
PCIE3_TXN/USB3_9_TXN USB_OC0#
CH18 1 2 .1U_0402_10V6-K C20 AD43
[40] PCIE_PTX_C_DRX_P3 PCIE_PRX_DTX_N4 E20 PCIE3_TXP/USB3_9_TXP GPP_E9/USB2_OC0# AD42 USB_OC1#
[37] PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4 PCIE4_RXN/USB3_10_RXN GPP_E10/USB2_OC1# USB_OC2# USB_OC1# [41] USB 3.0
in
G19 AD39
[37] PCIE_PRX_DTX_P4 PCIE_PTX_DRX_N4 PCIE4_RXP/USB3_10_RXP GPP_E11/USB2_OC2# USB_OC3# USB_OC2# [45] USB 2.0
LAN CH15 1 2 .1U_0402_10V6-K B21 AC44
[37] PCIE_PTX_C_DRX_N4 PCIE_PTX_DRX_P4 PCIE4_TXN/USB3_10_TXN GPP_E12/USB2_OC3# USB_OC4#
CH16 1 2 .1U_0402_10V6-K A21 Y43
[37] PCIE_PTX_C_DRX_P4 K19 PCIE4_TXP/USB3_10_TXP GPP_F15/USB2_OCB_4 Y41 USB_OC5#
L19 PCIE5_RXN GPP_F16/USB2_OCB_5 W44 USB_OC6#
D22 PCIE5_RXP GPP_F17/USB2_OCB_6 W43 USB_OC7#
C22 PCIE5_TXN GPP_F18/USB2_OCB_7
G22 PCIE5_TXP Within 500 mils
E22 PCIE6_RXN AG3 USB2_ COMP
i-
B22 PCIE6_RXP USB2_COMP AD10
A23 PCIE6_TXN USB2_VBUSSENSE AB13
L22 PCIE6_TXP RSVD_AB13 AG2
K22 PCIE7_RXN USB2_ID
2
2
PCIE7_RXP
2
C23
B23 PCIE7_TXN RC183 RC182 RH127
K24 PCIE7_TXP BD14 113_0402_1%
1K_0402_5% 1K_0402_5%
L24 PCIE8_RXN GPD7/RSVD
PCIE8_RXP
is C24
1
1
1
B24 PCIE8_TXN
B
PCIE8_TXP 2 OF 12 B
+3VALW_PCH
RPH5
kn
USB_OC4# 4 5
USB_OC7# 3 6
USB_OC6# 2 7
USB_OC3# 1 8
10K_1206_8P4R_5%
RPH6
te
USB_OC0# 4 5
USB_OC5# 3 6
USB_OC2# 2 7
USB_OC1# 1 8
10K_1206_8P4R_5%
w.
ww
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (5/9) DMI, PCIe, USB2, GPPEF
Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
GSPI1_MOSI / GPP_B22 Bit 6 Boot BIOS

This field determines the destination of accesses to the Destination
+3VS
BIOS memory range. Also controllable using Boot BIOS
Destination bit (Bus0, Device31, Function0, offset BCh, 0 SPI (Default)
RH160 2 1 10K_0402_5% PCH_BT_OFF# bit 6).
RH161 2 1 10K_0402_5% PCH_WLAN_OFF# 1 LPC
RH748 2 1 10K_0402_5% PCH_TS_ON# TS@
+3VALW_PCH +3VS
SPT-H_PCH
SKU ID
RH750 UH1K
1 @ 2 4.7K_0402_5% AT29
m
PCH_WLAN_OFF# AR29 GPP_B22/GSPI1_MOSI AL44 PCH_GPD9
[40] PCH_WLAN_OFF# GPP_B21/GSPI1_MISO GPP_D9 PCH_GPD10
D AV29 AL36 RH152 RH155 RH153 RH163 RH774 RH776 RH778 D
EC_TS_ON# BC27 GPP_B20/GSPI1_CLK GPP_D10 AL35 PCH_GPD11
[34] PCH_TS_ON# GPP_B19/GSPI1_CS# GPP_D11
2
PCH_GPD12
2
2
AJ39
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
GPP_B18_NO_REBOOT BD28 GPP_D12
co
[36] GPP_B18_NO_REBOOT GPP_B18/GSPI0_MOSI
BD27 AJ43 @ @ @ @ @ @ @
[37] LAN_PWR_ON# GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS#
AW27 AL43
AR24 GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS# AK44
1
GPP_B15/GSPI0_CS# GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL
1
PCH_GPD9
1
@ AK45
EC_SCI# RH780 1 2 0_0402_5% AV44 GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA PCH_GPD10
[44] EC_SCI# PCH_BT_OFF# GPP_C9/UART0_TXD
BA41 PCH_GPD11
[40] PCH_BT_OFF# 3D_FR GPP_C8/UART0_RXD
AU44 PCH_GPD12
[45] 3D_FR PCH_CMOS_ON GPP_C11/UART0_CTS#
AV43
[45] PCH_CMOS_ON GPP_C10/UART0_RTS# PCH_GPD23
AU41 BC38 PCH_GPD22
a.
AT44 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL BB38
GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA PCH_GPD21
AT43
[29] VGA_PWRGD 2 1 VGA_ALERT_PCH# AU43 GPP_C13/UART1_TXD/ISH_UART1_TXD BD38
[27] VGA_ALERT# GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL
DV5 RB751V-40_SOD323-2 BE39
AN43 GPP_H21/ISH_I2C1_SDA
@ GPP_C23/UART2_CTS#
AN44 RH157 RH158 RH159 RH195 RH775 RH777
PCH_UART2_TXD AR39 GPP_C22/UART2_RTS# RH779
[48] PCH_UART2_TXD
2
PCH_UART2_RXD GPP_C21/UART2_TXD BC22 PCH_GPD23
2
AR45
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
2
10K_0402_5%
[48] PCH_UART2_RXD GPP_C20/UART2_RXD GPP_A23/ISH_GP5 BD18 PCH_GPD22
10K_0402_5%
RC10 AR41 GPP_A22/ISH_GP4 BE21 PCH_GPD21
si
1K_0402_5% [27] GPIO52 GPIO52 @ @ @ @ @ @
PXS_PWREN 1 OPT@ 2 PXS_PWREN_R AR44 GPP_C19/I2C1_SCL GPP_A21/ISH_GP3 BD22 @
[27,28] PXS_PWREN PXS_RST# PXS_RST#_R GPP_C18/I2C1_SDA GPP_A20/ISH_GP2
RC12 1 2 0_0402_5% AR38 BD21
[27] PXS_RST#
1
GPP_C17/I2C0_SCL GPP_A19/ISH_GP1
1
GPIO53 AT42 BB22
1
[27] GPIO53 GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 BC19
AM44 GPP_A17/ISH_GP7
AJ44 GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA
GPP_D23/ISH_I2C2_SCL/ISH_I2C3_SCL 11 OF 12
1
D SKYLAKE-H-PCH_FCBGA837
ne
RC170 1 @ 2 2 QC13
[44] VGA_GATE# G
0_0402_5% 2N7002KW_SOT323-3
1
CC96 @ S
3
.1U_0402_10V6-K
C C
@
2
do
Function PCH_GPD9 PCH_GPD10 PCH_GPD11 PCH_GPD12 PCH_GPD21 PCH_GPD22 PCH_GPD23
17" 0 X X X X X X
15" 1 X X X X X X
in
non 3D Camera X 0 X X X X X
3D Camera X 1 X X X X X
i-
non-touch X X 0 X X X X
touch X X 1 X X X X
SDV X X X X 0 0 0
is
B SIV X X X X 0 0 1 B
SIT X X X X 0 1 0
kn
SVT X X X X 0 1 1
te
w.
ww
A A
Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (6/9) GPPPABCD, I2C
C
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
+VCCPRIM_1P0 +1.0VS_VCCMPHY
m
D +3VS D
JC3
co
1 2 +3VALW_PCH
1 2
JUMP_43X79
2
1
RH759 RH760
0_0805_5% 0_0805_5%
+VCCPFUSE_3P3
+1.0VALW Need short +VCCPRIM_1P0
@
1
2
UH1H SPT-H_PCH
a.
JC2 RH220 1 2 0_0402_5%
1 2 AA23 +VCCPRIM_1P0
1 2 AA26 VCCPRIM_1P0_1 +VCCPGPPD
AA28 VCCPRIM_1P0_2 AL22
JUMP_43X79 VCCPRIM_1P0_3 VCCPRIM_1P0_17
CORE
AC23 RH221 1 2 0_0402_5%
AC26 VCCPRIM_1P0_4 BA24
VCCPRIM_1P0_5 VCCDSW_3P3_2 +VCCDSW +VCCPGPPA
AC28 BA31
VCCPRIM_1P0_6 VCCPGPPA +VCCPGPPA
VCCGPIO
AE23
AE26 VCCPRIM_1P0_7 BC42 2 0_0402_5%
+VCCPGPPBCH RH222 1
VCCPRIM_1P0_8 VCCPGPPBCH_1
si
Y23 BD40
CH25 VCCPRIM_1P0_9 VCCPGPPBCH_2 +VCCPGPPBCH
Y25 AJ41 +VCCPGPPEF
+VCCPRIM_1P0 1 2 DCPDSW_1P0 BA29 VCCPRIM_1P0_10 VCCPGPPEF_1 AL41
1U_0402_6.3V6K DCPDSW_1P0 VCCPGPPEF_2 AD41 RH223 1 2 0_0402_5%
VCCPGPPG +VCCPGPPG
N17 AN5
VCCCLK1_1 VCCPRIM_3P3 +VCCPRIM_3P3 +VCCPGPPEF
R19
U20 VCCCLK3_2
V17 VCCCLK4_3 AD15 RH224 1 2 0_0402_5%
VCCCLK2_4 VCCPRIM_1P0_15 +VCCPRIM_1P0
R17 AD13 +V3.3A_VCCATS
K2 VCCCLK2_5 VCCATS BA20 +VCCPGPPG
VCCCLK5_6 VCCRTCPRIM_3P3 +VCCPRTCPRIM
ne
K3 BA22
VCCCLK5_7 VCCRTC +VCCRTC_3P3
BA26 DCPRTC RH225 1 2 0_0402_5%
DCPRTC 2
.1U_0402_10V6-K
U21 AJ20 +VCCPRIM_3P3
VCCMPHY_1P0_1 VCCPRIM_1P0_11
CH26
+VCCPRIM_1P0
MPHY
C +1.0VS_VCCMPHY U23 AJ21 C
U25 VCCMPHY_1P0_2 VCCPRIM_1P0_12 AJ23 RH226 1 2 0_0402_5%
VCCMPHY_1P0_3 VCCPRIM_1P0_13 1
+1.0VS_VCCMPHY +1.0VS_VCCMPHYPLL U26 AJ25
V26 VCCMPHY_1P0_4 VCCPRIM_1P0_14 +V3.3A_VCCATS
RH199 1 2 0_0402_5% A43 VCCMPHY_1P0_5
B43 VCCMPHYPLL_1P0_1 BE41 +3V_SPI RH219 1 2 0_0402_5%
do
+1.0VS_VCCAPLLEBB C44 VCCMPHYPLL_1P0_2 VCCSPI_1 BE43
VCCPCIE3PLL_1P0_1 VCCSPI_2 +VCCPRTCPRIM
C45 BE42
VCCPCIE3PLL_1P0_2 VCCSPI_3 BC44
RH200 1 2 0_0402_5% V28 VCCPGPPD_1 BA45 +VCCPGPPD RH746 1 2 0_0402_5%
VCCAPLLEBB_1P0 VCCPGPPD_2
USB
AC17 BC45
+VCCPRIM_1P0 VCCPRIM_1P0_16 VCCPGPPD_3
AJ5 BB45
1U_0402_6.3V6K
+VCCUSBPLL_1P0 VCCUSB2PLL_1P0_1 VCCPGPPD_4
AL5
AN19 VCCUSB2PLL_1P0_2 BD3 +VCCPFUSE_3P3 1
+VCCHDAPLL_1P0 VCCHDAPLL_1P0 VCCPRIM_3P3_1
BA15 BE3
CH23
+VCCHDA VCCHDA VCCPRIM_3P3_2
W15 BE4
in
+VCCDSW VCCDSW_3P3_1 VCCPRIM_3P3_3
8 OF 12 2
i-
+1.0VS_VCCMPHYPLL
NEAR PCH PIN +1.0VS_VCCMPHY +VCCPRIM_1P0
NEAR +VCCPGPPA
CH257
22U_0603_6.3V6-M
CH256
22U_0603_6.3V6-M
1U_0402_6.3V6K
1 1 1 K2
CH254
22U_0603_6.3V6-M
CH253
22U_0603_6.3V6-M
.1U_0402_10V6-K
.1U_0402_10V6-K
1
1U_0402_6.3V6K
CH29
22U_0603_6.3V6-M
1U_0402_6.3V6K
1
CH255
1 1 1
1 1
CH260
CH261
CH22
2 @ 2@
CH30
2
@ 2@ NEAR @ @ NEAR
2@ 2
2 2 @
is
BA31 2 2 BA31
+VCCPFUSE_3P3 +VCCPGPPD
+VCCPRIM_3P3 +VCCPGPPG +VCCPGPPEF +VCCPGPPBCH +V3.3A_VCCATS
B B
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
1U_0402_6.3V6K
1 1 1 1 1 1 1
CH243
CH82
CH81
CH28
CH262
CH20
CH36
@ @ @ @
2 2 2 2 2 2 2
kn
+3VALW +VCCHDA
+VCCPRIM_1P0
+VCCUSBPLL_1P0 +3VALW_PCH +VCCDSW
RH761 1 2 0_0402_5% 0_0805_5% RH203
1 2 +3VALW
+3VS VCCRTC +VCCRTC_3P3
RH206 1 2 0_0402_5%
1U_0402_6.3V6K
+VCCHDAPLL_1P0 1 @
0_0805_5% RH202 RH216 1 2 0_0402_5%
RH205 1 2 0_0402_5%
CH258
RH204 1 2 0_0402_5% 1 2
te
1U_0402_6.3V6K
.1U_0402_10V6-K
@ 2
2 2
1U_0402_6.3V6K
1 CH80 1 1
CH245
CH248 @
CH259
CH244
1U_0402_6.3V6K
.1U_0402_10V6-K 1
1 @
2 2 2
w.
ww
A A
Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (7/9) PWR

C
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
UH1I SPT-H_PCH
UH1L SPT-H_PCH
AC18 AR5
AN4 VSS_1 VSS_75 AR7
C42 AB11 AN10 VSS_2 VSS_76 U15
D10 VSS_149 VSS_217 AB7 VSS_3 VSS_77
VSS_150 VSS_218 BE14 AL4
D12 AB14 BE18 VSS_4 VSS_78 AE29
D15 VSS_151 VSS_219 AB31 VSS_5 VSS_79
VSS_152 VSS_220 BE23 AE4
D16 AB32 BE28 VSS_6 VSS_80 AE42
D17 VSS_153 VSS_221 AB38 VSS_7 VSS_81 UH1J SPT-H_PCH
VSS_154 VSS_222 BE32 AF18
m
D D19 AB4 VSS_8 VSS_82 D
VSS_155 VSS_223 BE37 AF20
D21 AB5 BE40 VSS_9 VSS_83 AF21
D24 VSS_156 VSS_224 AC1 VSS_10 VSS_84
VSS_157 VSS_225 BE9 AF23 BD2 AR22
D25 AC20 VSS_11 VSS_85
co
VSS_158 VSS_226 C10 AF25 BD45 VSS_286 RSVD_7 W13
D27 AC21 C2 VSS_12 VSS_86 AF26 VSS_287 RSVD_8
D29 VSS_159 VSS_227 AC25 VSS_13 VSS_87 BD44 U13
VSS_160 VSS_228 C28 AF28 BE44 VSS_288 RSVD_9 P31
D30 AC29 C37 VSS_14 VSS_88 AF29 VSS_289 RSVD_10
D31 VSS_161 VSS_229 AC45 VSS_15 VSS_89 D45 N31
VSS_162 VSS_230 J7 AG11 A42 VSS_290 RSVD_11
D33 AB8 K10 VSS_16 VSS_90 AG13 VSS_291
D35 VSS_163 VSS_231 AD11 VSS_17 VSS_91 B45 P27
VSS_164 VSS_232 K27 AG31 B44 VSS_292 RSVD_12 R27
D36 AD14 VSS_18 VSS_92
a.
VSS_165 VSS_233 K33 AG32 A4 VSS_293 RSVD_13 N29
E13 AB15 K36 VSS_19 VSS_93 AG33 VSS_294 RSVD_14
E15 VSS_166 VSS_234 AD32 VSS_20 VSS_94 A3 P29
VSS_167 VSS_235 K4 AG38 B2 VSS_295 RSVD_15 AN29
E31 AD33 K42 VSS_21 VSS_95 AG4 VSS_296 RSVD_16
E33 VSS_168 VSS_236 AD36 VSS_22 VSS_96 A2 R24
VSS_169 VSS_237 K43 AH1 B1 VSS_297 RSVD_17 P24
F44 AD4 L12 VSS_23 VSS_97 AH17 VSS_298 RSVD_18
F8 VSS_170 VSS_238 AD8 VSS_24 VSS_98 BB1
VSS_171 VSS_239 L13 AH18 BC1 VSS_299 AT3
G42 AE18 VSS_25 VSS_99
si
VSS_172 VSS_240 L15 AH20 A44 VSS_300 PREQ# AT4 PCH_PREQ# [36]
G9 AE20 L4 VSS_26 VSS_100 AH21 VSS_301 PRDY# PCH_PRDY# [36]
H17 VSS_173 VSS_241 AE21 VSS_27 VSS_101 AY5
VSS_174 VSS_242 L41 AH23 C1 CPU_TRST# AL2PCH_TRIGOUT CPU_TRST# [36]
H19 AE25 VSS_28 VSS_102 RH7581 230_0402_1%
CPU_TRIGIN [6]
VSS_175 VSS_243 L8 AH25 D1 RSVD_5 PCH_TRIGOUT AK1
H22 AE28 M35 VSS_29 VSS_103 AH26 RSVD_6 PCH_TRIGIN PCH_TRIGIN [6]
H24 VSS_176 VSS_244 AL10 VSS_30 VSS_104
VSS_177 VSS_245 M42 AH28 10 OF 12
H27 AL11 N10 VSS_31 VSS_105 AH29
C VSS_178 VSS_246 C
H29 AL13 VSS_32 VSS_106
ne
VSS_179 VSS_247 N15 AH45 SKYLAKE-H-PCH_FCBGA837
H3 AL17 N19 VSS_33 VSS_107 AJ10
H35 VSS_180 VSS_248 AL19 VSS_34 VSS_108
VSS_181 VSS_249 N22 AJ14
J10 AL24 N24 VSS_35 VSS_109 AJ15
J11 VSS_182 VSS_250 AL29 VSS_36 VSS_110
VSS_183 VSS_251 N35 AJ17
J3 AL32 N36 VSS_37 VSS_111 AJ18
J39 VSS_184 VSS_252 AL33 VSS_38 VSS_112
VSS_185 VSS_253 N4 AJ26
J5 AL38 VSS_39 VSS_113
do
VSS_186 VSS_254 N41 AJ28
T42 AM15 N5 VSS_40 VSS_114 AJ29
U10 VSS_187 VSS_255 AM17 VSS_41 VSS_115
VSS_188 VSS_256 P17 AJ31
U11 AM19 P19 VSS_42 VSS_116 AJ32
VSS_190 VSS_258 P22 AJ36
U17 AM24 P45 VSS_44 VSS_118 AK4
VSS_192 VSS_260 R10 AK42
U28 AM29 VSS_46 VSS_120
in
VSS_193 VSS_261 R14 AU7
U29 AM45 R22 VSS_47 VSS_121 AV17
U31 VSS_194 VSS_262 AN11 VSS_48 VSS_122
VSS_195 VSS_263 R29 AV24
U32 AN22 R33 VSS_49 VSS_123 AV27
VSS_197 VSS_265 R38 AV31
U38 AN31 R5 VSS_51 VSS_125 AV33
VSS_199 VSS_267 T1 AV6
U8 AN7 VSS_53 VSS_127
i-
VSS_200 VSS_268 T2 AW13
V18 AN8 T4 VSS_54 VSS_128 AW19
V20 VSS_201 VSS_269 AP11 VSS_55 VSS_129
B Y18 AW29 B
V21 VSS_202 VSS_270 AP4 VSS_56 VSS_130
VSS_203 VSS_271 Y20 AW37
V23 AR33 Y21 VSS_57 VSS_131 AW9
V25 VSS_204 VSS_272 AR34 VSS_58 VSS_132
VSS_205 VSS_273 Y26 AY38
V29 AR42 Y28 VSS_59 VSS_133 AY45
V3 VSS_206 VSS_274 AR9 VSS_60 VSS_134
V45 VSS_207
VSS_208
VSS_275
VSS_276
AT10
Y29
A18
is VSS_61 VSS_135
B25
B3
W14 AT15 A25 VSS_62 VSS_136 B37
W31 VSS_209 VSS_277 AT36 VSS_63 VSS_137
VSS_210 VSS_278 A32 B40
W32 AT9 A37 VSS_64 VSS_138 B6
W33 VSS_211 VSS_279 AU1 VSS_65 VSS_139
VSS_212 VSS_280 AA17 BA1
W38 AU35 AA18 VSS_66 VSS_140 BB11
W4 VSS_213 VSS_281 AU36 VSS_67 VSS_141
kn
VSS_214 VSS_282 AA20 BB16

W8 AU39 AA21 VSS_68 VSS_142 BB21
Y17 VSS_215 VSS_283 AU45 VSS_69 VSS_143
VSS_216 VSS_284 AA25 BB25
C4 AA29 VSS_70 VSS_144 BB30
VSS_285 VSS_71 VSS_145
AA4 BB34
AA42 VSS_72 VSS_146 BC2
AB10 VSS_73 VSS_147 BD43
12 OF 12 VSS_74 VSS_148
te
9 OF 12
SKYLAKE-H-PCH_FCBGA837 SKYLAKE-H-PCH_FCBGA837
A A
w.

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PCH (9/9) VSS
BY511/BY710
ww
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.3
5 4 3 2 1
5 4 3 2 1
N16P-GX GPIO
Performance Mode P0 TDP at Tj = 102 C* (DDR5)
GPIO I/O ACTIVE Function Description
FBVDDQ PCI Express I/O and Other
GPU Mem NVCLK FBVDD (GPU+Mem) (1.05V) PLLVDD
GPIO0 OUT - FB Enable for GC6 2.0 (4) (1,5) /MCLK NVVDD (1.35V) (1.35V) (6) (1.05V) (3.3V)
m
Products (W) (W) (MHz) (V) (A) (W) (A) (W) (A) (W) (A) (W) (A) (W) (A) (W)
D GPIO1 OUT N/A D
N16P-GX
GPIO2 OUT N/A 128bit 50 3.27 2505 TBD 51.1 TBD 3.46 4.67 8.75 11.81 TBD TBD 2.57 2.7 0.34 TBD
co
2GB
DDR5
GPIO3 OUT N/A
GPIO4 OUT N/A
GPIO5 OUT N/A GPU power sequencing---3V3_MAIN_EN
a.
GPIO6 IN - GPU wake signal for GC6 2.0
GPIO7 OUT N/A
GPIO8 IN - System side PCIe reset Monitor
si
GPIO9 I/O - VGA_ALERT#
N16P-GX Multi-level Straps
GPIO10 OUT - Memory VREF Control (100K pull Down)
GPIO11 OUT - GPU Core VDD PWM control signal
GPIO12 IN - AC Power Detect Input (10K pull High)
ne
Physical Logical Logical Logical Logical
GPIO13 OUT - Phase Shedding Strapping pin Power Rail Strapping Bit3 Strapping Bit2 Strapping Bit1 Strapping Bit0
C ROM_SCLK +3VGS SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED C
GPIO14 IN N/A
ROM_SI +3VGS RAM_CFG[3] RAM_CFG[2] RAM_CFG[1] RAM_CFG[0]
GPIO15 IN N/A ROM_SO +3VGS DEVID_SEL PCIE_CFG SMB_ALT_ADDR VGA_DEVICE
do
STRAP0 +3VGS Reserved(keep pull-up and pull-down footprint and stuff 50Kohm pull-up)
GPIO16 IN N/A
STRAP1 +3VGS
GPIO17 IN N/A STRAP2 +3VGS
Reserved(keep pull-up and pull-down footprint and not stuff by default)
STRAP3 +3VGS
GPIO18 IN N/A
STRAP4 +3VGS
in
GPIO19 IN N/A
GPIO20 N/A SMBUS_ALT_ADDR

GPIO21 OUT - GPU PCIe self-reset control 0 0x9E (Default)
i-
OVERT I/O - Active Low Thermal Catastrophic Over Temperature 1 0x9C (Multi-GPU usage)
N16P-GX Power Sequence is

B
N16P-GX Binary Straps B
Other Power rail

+3VG_AON
+3VG_AON
kn
+VGA_CORE Physical
Strapping pin Power Rail Strap Mapping
tNVVDD >0 Tpower-off <10ms ROM_SCLK +3VGS SMB_ALT_ADDR
+1.05VS_VGA
ROM_SI +3VGS SUB_VENDOR
ROM_SO +3VGS VGA_DEVICE
+1.35VGS
STRAP0 +3VGS RAM_CFG[0]
te
tPEX_VDD >0
1.all GPU power rails should be turned off within 10ms STRAP1 +3VGS RAM_CFG[1]
2. Optimus system VDD33 avoids drop down earlier than NVDD and FBVDDQ
STRAP2 +3VGS RAM_CFG[2]
1. all power rail ramp up time should be larger than 40us
and is recommended to be less than 2ms. +3VGS RAM_CFG[3]
STRAP3
STRAP4 +3VGS PCIE_MAX_SPEED
w.
ww
A A
Issued Date 2015/02/26 Deciphered Date 2016/02/26 VGA Notes List

C
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
PCIE_CTX_C_GRX_N[0..15]
[5,24] PCIE_CTX_C_GRX_N[0..15]
PCIE_CTX_C_GRX_P[0..15]
[5,24] PCIE_CTX_C_GRX_P[0..15]
PCIE_CRX_GTX_N[0..15]
[5,24] PCIE_CRX_GTX_N[0..15] UV1A
PCIE_CRX_GTX_P[0..15]
[5,24] PCIE_CRX_GTX_P[0..15] U?
N16P-GX-B-A2_BGA908
1/18 PCI_EXPRESS
GM107/GM108 UV1P
GK107/GK208 Near GPU +1.05VS_VGA
GF117 2000mA U?
N16P-GX-B-A2_BGA908
AJ11
PEX_WAKE* NC 12/18 XTAL_PLL +3VS_AON
AG19 +PLLVDD
PLT_RST_VGA# AJ12 PEX_IOVDD_1 AG21
[24,27] PLT_RST_VGA# 1 1 1 1 1 1 2 2 2 2 1 1
60mA
33P_0402_50V8J
33P_0402_50V8J
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
PEX_RST* PEX_IOVDD_2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
AG22 AD8
CLK_REQ_GPU# AK12 PEX_IOVDD_3 AG24 PLLVDD
PEX_CLKREQ* PEX_IOVDD_4 AE8
m
AH21 SP_PLLVDD
2
RF@
CLK_PCIE_GPU AL13 PEX_IOVDD_5 AH25 2 2 2 2 2 2 1 1 1 1 2 2 +SP_PLLVDD 45mA
OPT@
OPT@
OPT@
OPT@
D [17] CLK_PCIE_GPU CLK_PCIE_GPU# PEX_REFCLK PEX_IOVDD_6 AD7 RV211 D
AK13 NC
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
CV2
CV3
CV4
CV5
CV6
CV7
CV8
CV9
VID_PLLVDD
CV10
CV11
RF@
CD85
CD86
[17] CLK_PCIE_GPU# PEX_REFCLK* 45mA 10K_0402_5%
PCIE_CRX_GTX_P0 PCIE_CRX_C_GTX_P0 GM107 GM108 @
[5,24] PCIE_CRX_GTX_P0 CV12 1 2 0.22U_0402_10V6K OPT@ AK14
PCIE_CRX_GTX_N0 CV13 1 2 0.22U_0402_10V6K PCIE_CRX_C_GTX_N0 AJ14 PEX_TX0 GK107/GK208 GF117
1
[5,24] PCIE_CRX_GTX_N0 OPT@ Under GPU(below 150mils) Mid way between GPU and PWR supply
PEX_TX0*
co
PCIE_CTX_C_GRX_P0 AN12 1 2 XTALSSIN H1 J4 XTALOUT
[5,24] PCIE_CTX_C_GRX_P0
[5,24] PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_N0 AM12 PEX_RX0
PEX_RX0* PEX_IOVDDQ_01
AG13
AG15
1 1 1 1
+1.05VS_VGA
Near GPU RV45 XTAL_SSIN XTAL_OUTBUFF
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
PCIE_CRX_GTX_P1 PCIE_CRX_C_GTX_P1 PEX_IOVDDQ_02 10K_0402_5%
CV17 1 2 0.22U_0402_10V6K OPT@ AH14 AG16 XTAL_IN XTAL_OUT
1
[5,24] PCIE_CRX_GTX_P1 PCIE_CRX_GTX_N1 PCIE_CRX_C_GTX_N1 PEX_TX1 PEX_IOVDDQ_03 OPT@ H3 H2
[5,24] PCIE_CRX_GTX_N1 CV19 1 2 0.22U_0402_10V6K OPT@ AG14 AG18 XTAL_IN XTAL_OUT RV46
PEX_TX1* PEX_IOVDDQ_04 AG25 2 2 2 2
OPT@
OPT@
OPT@
OPT@
PCIE_CTX_C_GRX_P1 PEX_IOVDDQ_05 OPT@ 10K_0402_5%
[5,24] PCIE_CTX_C_GRX_P1 AN14 AH15 1 2 OPT@
CV14
CV18
CV15
CV16
PCIE_CTX_C_GRX_N1 AM14 PEX_RX1 PEX_IOVDDQ_06 AH18
[5,24] PCIE_CTX_C_GRX_N1 PEX_RX1* PEX_IOVDDQ_07 RV209
AH26
2
PCIE_CRX_GTX_P2 PCIE_CRX_C_GTX_P2 PEX_IOVDDQ_08 10M_0402_5% OPT@
[5,24] PCIE_CRX_GTX_P2 CV22 1 2 0.22U_0402_10V6K OPT@ AK15 AH27
PCIE_CRX_GTX_N2 CV23 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N2 AJ15 PEX_TX2 PEX_IOVDDQ_09 AJ27 YV1
[5,24] PCIE_CRX_GTX_N2 PEX_TX2* PEX_IOVDDQ_10 AK27
PCIE_CTX_C_GRX_P2 AP14 PEX_IOVDDQ_11 AL27 XTAL_IN
Mid way between GPU and PWR supply
a.
[5,24] PCIE_CTX_C_GRX_P2 PCIE_CTX_C_GRX_N2 PEX_RX2 PEX_IOVDDQ_12 1 4
AP15 AM28 OSC1 GND2
[5,24] PCIE_CTX_C_GRX_N2 PEX_RX2* PEX_IOVDDQ_13 AN28 2 3 XTAL_OUT
PCIE_CRX_GTX_P3 CV24 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P3 AL16 PEX_IOVDDQ_14 GND1 OSC2
[5,24] PCIE_CRX_GTX_P3 PCIE_CRX_GTX_N3 PCIE_CRX_C_GTX_N3 PEX_TX3
[5,24] PCIE_CRX_GTX_N3 CV25 1 2 0.22U_0402_10V6K OPT@ AK16
PEX_TX3* 1 1
PCIE_CTX_C_GRX_P3 CV262 27MHZ_10PF_7V27000050 CV263
AN15
[5,24] PCIE_CTX_C_GRX_P3 PCIE_CTX_C_GRX_N3 PEX_RX3 10P_0402_50V8J OPT@ 10P_0402_50V8J
[5,24] PCIE_CTX_C_GRX_N3 AM15 OPT@ OPT@
PEX_RX3*
2 2
PCIE_CRX_GTX_P4 PCIE_CRX_C_GTX_P4
PCIE_CRX_GTX_N4 CV27 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N4 AJ17 PEX_TX4
[5,24] PCIE_CRX_GTX_N4 PEX_TX4*
PCIE_CTX_C_GRX_P4 AN17
[5,24] PCIE_CTX_C_GRX_P4 PCIE_CTX_C_GRX_N4 PEX_RX4
AM17
si
[5,24] PCIE_CTX_C_GRX_N4 PEX_RX4*
PCIE_CRX_GTX_P5 CV28 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P5 AH17 +3VS_AON
[5,24] PCIE_CRX_GTX_N5 CV29 1 2 0.22U_0402_10V6K OPT@ AG17
PEX_TX5* AH12 RV7 1 2 0_0402_5%
PCIE_CTX_C_GRX_P5 AP17 PEX_PLL_HVDD
0.1U_0402_10V7K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
[5,24] PCIE_CTX_C_GRX_N5 AP18 AG12 1 1 1
PEX_RX5* PEX_SVDD_3V3
PCIE_CRX_GTX_N6 CV34 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N6 AJ18 PEX_TX6
[5,24] PCIE_CRX_GTX_N6 PEX_TX6* 2 2 2
OPT@
OPT@
OPT@
PCIE_CTX_C_GRX_P6 AN18 +3VS_AON
CV31
CV32
CV33
[5,24] PCIE_CTX_C_GRX_N6 AM18
PEX_RX6*
ne
PCIE_CRX_GTX_P7 CV35 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P7 AL19
2
[5,24] PCIE_CRX_GTX_N7 CV36 1 2 0.22U_0402_10V6K OPT@ AK19 Near GPU
PEX_TX7* RV29
PCIE_CTX_C_GRX_P7 AN20 10K_0402_5%
AM20 OPT@
C C
1
PCIE_CRX_GTX_P8 CV38 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P8 AK20 +3VS_VGA +3VS_AON
[5,24] PCIE_CRX_GTX_N8 CV39 1 2 0.22U_0402_10V6K OPT@ AJ20
PEX_TX8* L4 VCCSENSE_VGA
PCIE_CTX_C_GRX_P8 VDD_SENSE VGA_VCC_SENSE [60]
2
AP20 1
[5,24] PCIE_CTX_C_GRX_P8
2
PCIE_CTX_C_GRX_N8 AP21 PEX_RX8 CV66
[5,24] PCIE_CTX_C_GRX_N8 PEX_RX8* L5 VSSSENSE_VGA VGA_VSS_SENSE [60] .1U_0402_10V6-K
PCIE_CRX_GTX_P9 PCIE_CRX_C_GTX_P9 GND_SENSE
CV40 1 2 0.22U_0402_10V6K AH20
do
[5,24] PCIE_CRX_GTX_P9 OPT@ OPT@
10K_0402_5%
10K_0402_5%
PEX LANES 4 TO 15 NC FOR GM108
PCIE_CRX_GTX_N9 CV42 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N9 AG20 PEX_TX9 2

[5,24] PCIE_CRX_GTX_N9 trace width: 16mils
1
PEX_TX9*
differential voltage sensing.
1
PCIE_CTX_C_GRX_P9 AN21
OPT@
RV30
RV31
[5,24] PCIE_CTX_C_GRX_P9 PCIE_CTX_C_GRX_N9 PEX_RX9 differential signal routing.
2
AM21 @
G
PCIE_CRX_GTX_P10 CV43 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P10 AK21
[5,24] PCIE_CRX_GTX_N10 CV44 1 2 0.22U_0402_10V6K OPT@ AJ21
PEX_TX10* P8 1 3 CLK_REQ_GPU#
PCIE_CTX_C_GRX_P10 NC_3V3AUX [17] GPU_CLKREQ#
AN23
S
AM23 QV5
[5,24] PCIE_CTX_C_GRX_N10 PEX_RX10* 2N7002KW_SOT323-3
PCIE_CRX_GTX_P11 CV45 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P11 AL22 OPT@
2
in
PEX_TX11* 1 2 RV33
PCIE_CTX_C_GRX_P11 AP23 1 2 RV35 10K_0402_5%
[5,24] PCIE_CTX_C_GRX_N11 AP24 RV28 0_0402_5% @
PEX_RX11* AJ26 PEX_TSTCLK_OUT 200_0402_1% @
1
PCIE_CRX_GTX_P12 CV47 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_P12 AK23 PEX_TSTCLK_OUT AK26 PEX_TSTCLK_OUT# @
[5,24] PCIE_CRX_GTX_P12 PCIE_CRX_GTX_N12 PCIE_CRX_C_GTX_N12 PEX_TX12 PEX_TSTCLK_OUT*
CV48 1 2 0.22U_0402_10V6K OPT@ AJ23
PEX LANES 8 TO 15 NC FOR GK208/GF117
[5,24] PCIE_CRX_GTX_N12 PEX_TX12*

PCIE_CTX_C_GRX_P12 AN24 Differential signal
[5,24] PCIE_CTX_C_GRX_P12 PCIE_CTX_C_GRX_N12 PEX_RX12 +1.05VS_VGA
AM24
[5,24] PCIE_CRX_GTX_P13 PCIE_CRX_GTX_N13
CV49 1
CV50 1
2 0.22U_0402_10V6K
2 0.22U_0402_10V6K
OPT@
OPT@
PCIE_CRX_C_GTX_N13
AH23
AG23 PEX_TX13 AG26 +PEX_PLLVDD 120mA Near GPU
2 1
[5,24] PCIE_CRX_GTX_N13 PEX_TX13* PEX_PLLVDD
i-
LV1
PCIE_CTX_C_GRX_P13 AN26 0_0603_5%
[5,24] PCIE_CTX_C_GRX_P13 1 1 1
1U_0603_10V6K
PCIE_CTX_C_GRX_N13 PEX_RX13
0.1U_0402_10V7K
4.7U_0603_6.3V6K
AM26 OPT@
PCIE_CRX_GTX_N14 CV55 1 2 0.22U_0402_10V6K OPT@ PCIE_CRX_C_GTX_N14 AJ24 PEX_TX14 AK11 TESTMODE 1 2 2 2 2
OPT@
OPT@
[5,24] PCIE_CRX_GTX_N14 PEX_TX14* TESTMODE
OPT@
RV32
CV51
CV52
CV53
PCIE_CTX_C_GRX_P14 AP26 10K_0402_5%
[5,24] PCIE_CTX_C_GRX_N14 AP27 OPT@
PEX_RX14*
PCIE_CRX_GTX_P15 PCIE_CRX_C_GTX_P15 Under GPU
[5,24] PCIE_CRX_GTX_P15 CV56 1 2 0.22U_0402_10V6K OPT@ AL25
PCIE_CRX_GTX_N15 PCIE_CRX_C_GTX_N15 PEX_TX15
PEX_TX15*
PCIE_CTX_C_GRX_P15 AP29 PEX_TERMP 1
[5,24]
[5,24]
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_N15
AN27
AM27 PEX_RX15
PEX_RX15*
PEX_TERMP RV34
2.49K_0402_1%
OPT@
2
is
B B
OPT@
1 2
WRST# [44]
RV20
0_0402_5% For SWG mode
kn
+3VS_VGA @
+PLLVDD 1 2
H_THRMTRIP# [6,14]
RV1
1
0_0402_5% 1
30 ohms @100MHz (ESR=0.05) RV2 @ For UMA mode
+1.05VS_VGA
LV2
1 2
1 1
+PLLVDD
choose one 10K_0402_5%
@
CV1
.1U_0402_10V6-K
0.1U_0402_10V7K
PBY160808T-300Y-N_2P 2@
22U_0603_6.3V6-M
D
2
OPT@ 5
G
2 2 QV1B
OPT@
2N7002KDWH_SOT363-6
OPT@
S
CV60
CV59
4
6
D @
te
[27] OVERT# OVERT# 2

G
QV1A
Near GPU Under GPU S 2N7002KDWH_SOT363-6
1
@
1
D 1
PLT_RST_VGA# 1 2 2
[24,27] PLT_RST_VGA#
RV3 G CV20
0_0402_5% QV2 .1U_0402_10V6-K
@ S 2N7002KW_SOT323-3 2@
3
1 @
CV21
w.
.1U_0402_10V6-K
@
2
300ohms (ESR=0.2) Bead 150mA

1 2 +SP_PLLVDD
+1.05VS_VGA
47U_0805_6.3V6M
10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
LV3 2 1 1
1
PBY160808T-301Y-N_2P
OPT@
2
1 2 2
OPT@
OPT@
OPT@
OPT@
CV61
ww
CV62
CV63
CV64
A A
Under GPU(below 150mils)
Issued Date 2015/02/26 Deciphered Date 2016/02/26 N16P-GX_PEG I/F

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Re v
Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
UV1L
U?
N16P-GX-B-A2_BGA908
8/18 IFPEF
UV1I ALL PINS NC FOR GF117

ALL PINS NC FOR GM108 EXCEPT GPIO18/19
U?
N16P-GX-B-A2_BGA908
DVI-DL DVI-SL/HDMI DP
5/18 IFPAB
ALL PINS NC FOR GF117
ALL PINS NC FOR GM108 EXCEPT GPIO14
DP I2CY_SDA I2CY_SDA IFPE_AUX_I2CY_SDA* AB4

LVDS
IFPAB have to use (GK208/GM107)
I2CY_SCL I2CY_SCL IFPE_AUX_I2CY_SCL AB3
AN6 2 1 +IFPEF_PLLVDD AB8
DPA_L3 IFPA_TXC* IFPEF_PLLVDD
AM6 RV71
DPA_L3 IFPA_TXC
2 1 AJ8 1K_0402_1% AC5
m
IFPAB_RSET TXC TXC IFPE_L3*
RV68 @ 2 1 AD6 AC4
D IFPEF_RSET TXC TXC IFPE_L3 D
1K_0402_1% DPA_L2
AN3 RV70
@ IFPA_TXD0* AP3 1K_0402_1% NC FOR GK208 AC3
DPA_L2 IFPA_TXD0 TXD0 TXD0 IFPE_L2*
@ AC2
1 2 +IFPAB_PLLVDD AH8 TXD0 TXD0 IFPE_L2
IFPAB_PLLVDD
co
RV69 DPA_L1 AM5 AC1
IFPA_TXD1* TXD1 TXD1 IFPE_L1*
10K_0402_5% DPA_L1 AN5 AD1
@ IFPA_TXD1
IFPEF have to use IFPE TXD1 TXD1 IFPE_L1
AD3
AK6 TXD2 TXD2 IFPE_L0* AD2
DPA_L0 IFPA_TXD2* TXD2 TXD2 IFPE_L0
DPA_L0
AL6
IFPA_TXD2
NC FOR GK208
AH6
IFPA_TXD3* AJ6
IFPA_TXD3 HPD_E HPD_E R1
GPIO18
a.
DPB_L3
AH9
IFPB_TXC* AJ9
DPB_L3 IFPB_TXC
1 2 +IFPAB_IOVDD AG8
RV72 IFPA_IOVDD AP5
DPB_L2 IFPB_TXD4*
10K_0402_5% AG9 DPB_L2
AP6
@ IFPB_IOVDD IFPB_TXD4 1 2 +IFPEF_IOVDD AC7
RV82 IFPE_IOVDD AF2
I2CZ_SDA IFPF_AUX_I2CZ_SDA*
DPB_L1 AL7 10K_0402_5% I2CZ_SCL IFPF_AUX_I2CZ_SCL AF3
IFPB_TXD5* AM7 @ AC8
DPB_L1
IFPB_TXD5 IFPF_IOVDD
si
NC FOR GK208
TXC AF1
AM8 IFPF_L3* AG1
DPB_L0 IFPB_TXD6* TXC IFPF_L3
DPB_L0 AN8
IFPB_TXD6 AD5
TXD3 TXD0 IFPF_L2* AD4
TXD3 TXD0 IFPF_L2
AL8
IFPB_TXD7* AK8 AF5
TXD4 TXD1
IFPB_TXD7 IFPF TXD4 TXD1
IFPF_L1*
IFPF_L1
AF4
AE4
TXD5 TXD2 IFPF_L0* AE3
ne
TXD5 TXD2 IFPF_L0
N4
GPIO14 NC FOR GK208
IFPAB
C OPT@ P3 C
HPD_F
GPIO19
OPT@
do
UV1J
UV1K UV1M
U?
N16P-GX-B-A2_BGA908 U? U?
6/18 IFPC N16P-GX-B-A2_BGA908 N16P-GX-B-A2_BGA908
7/18 IFPD 9/18 IFPG
ALL PINS NC FOR GF117
ALL PINS NC FOR GF117 ALL PINs XVDD FOR GM108/
in
ALL PINS NC FOR GM108 EXCEPT GPIO15
ALL PINS NC FOR GM108 EXCEPT GPIO17 GK107/GK208/GF117
2 1 AF8
RV73 IFPC_RSET 2 1 AN2
DVI/HDMI DP NC
1K_0402_1% IFPCD_RSET IFPD_RSET 2 1 AA8 DVI/HDMI DP
RV75 DVI/HDMI DP IFPG_PLLVDD
GM107
@ 1K_0402_1% GK107/GK208 GM107
RV74
1 2 +IFPC_PLLVDDAF7 AG2 1K_0402_1%
I2CW _SDA @
RV76 IFPC_PLLVDD IFPC_AUX_I2CW_SDA* AG3 1 2 +IFPD_PLLVDD AG7 AK2 @ 1 2 +IFPG_PLLVDD AA6
I2CW_SCL I2CX_SDA IFPG_RSET
10K_0402_5% IFPC_AUX_I2CW_SCL RV77 IFPD_PLLVDD IFPD_AUX_I2CX_SDA* AK3 RV78
I2CX_SCL
@ 10K_0402_5% IFPD_AUX_I2CX_SCL 10K_0402_5%
TXC
AG4 @ @
IFPC_L3* AG5 AK5 AA5
i-
TXC TXC TXC IFPG_L3*
IFPC_L3 IFPD_L3* AK4 AA4
TXC TXC IFPG_L3
AH4 IFPD_L3
TXD0 IFPC_L2* Y3
IFPC TXD0
AH3
TXD0
AL4 TXD0 IFPG_L2*
IFPC_L2 IFPD TXD0
IFPD_L2* AL3 IFPG TXD0 IFPG_L2
Y2
AJ2 IFPD_L2
TXD1 IFPC_L1* AJ3 AM4 TXD1 AA3
TXD1 IFPC_L1 TXD1 IFPD_L1* IFPG_L1*
AM3 TXD1 AA2
TXD1 IFPD_L1 IFPG_L1
AJ1
TXD2 IFPC_L0* Y1
AK1 AM2 TXD2
TXD2 IFPC_L0 TXD2 IFPD_L0* IFPG_L0* AA1
AM1 TXD2
TXD2 IFPD_L0 IFPG_L0
B RV80
1 2 +IFPC_IOVDD AF6
IFPC_IOVDD GPIO15
P2
is 1 2 +IFPD_IOVDD AG6 M6 1 2 +IFPG_IOVDD AA7 B
IFPD_IOVDD GPIO17 IFPG_IOVDD
10K_0402_5% RV81 RV79
@ OPT@ 10K_0402_5% 10K_0402_5%
@ OPT@ @ OPT@
1MB SPI ROM FOR VBIOS ROM (SLI)
kn
+3VS_AON
te
2
RV17
UV1N RV19 2.2K_0402_5%
2.2K_0402_5% OPT@
U? OPT@
1
N16P-GX-B-A2_BGA908
4/18 DACA
GM107 GF 117 GM107/GK208
GM108/GF 117
GK107/GK208 GM108 GK107
AG10 R4 VGA_CRT_CLK
w.
NC NC
DACA_VDD I2CA_SCL R5 VGA_CRT_DATA
NC I2CA_SDA
AP9
DACA_VREF TSEN_VREF GM108 GM107
GF 117 GK107/GK208
AP8 NC AM9
DACA_RSET NC DACA_HSYNC AN9
NC DACA_VSYNC
AK9
NC DACA_RED
AL10
NC DACA_GREEN
ww
A AL9 A
NC DACA_BLUE
OPT@

Issued Date 2015/02/26 Deciphered Date 2016/02/26 N16P-GX_DIGITAL OUT I/F
Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
+1.05VS_VGA
30ohms (ESR=0.01) Bead +FB_PLLAVDD
P/N;SM010007W00
200mA
RV110 DV4 GC6@
1 2 +FB_PLLAVDD FB_GC6_EN 1 2 0_0402_5% GC6_EN 2
[27] FB_GC6_EN
LV7 1
SBK160808T-300Y-N +3VS_VGA
1 2 3 FBVDDQ_PWR_EN [64] GDDR5
OPT@ RV111
10K_0402_5% BAV70W-7-F_SOT323-3 Mode H - Mirror Mode Mapping
Place close to BGA OPT@
1
RV112 DATA Bus
200K_0402_5% UV1C
[60] GPU_PWRGD
30ohms (ESR=0.01) Bead GC6@ Address 0..31 32..63
+3VS_VGA +FB_PLLAVDD
P/N;SM010007W00 U?
2
N16P-GX-B-A2_BGA908 FBx_CMD0 CS#
D 200mA D
+FB_PLLAVDD
3/18 FBB FBx_CMD1 A3_BA3
1 2
LV8 UV1B FBx_CMD2 A2_BA0
ALL PINS NC FOR GM108/
SBK160808T-300Y-N
U? @ [32,33] FBC_D[0..63] GK208/GF117
N16E-GR@ N16P-GX-B-A2_BGA908 FBx_CMD3 A4_BA2
FB_CLAMP RV113 FB_GC6_EN FBC_D0
m
2 1 G9
FBC_D1 E9 FBB_D0
Place close to BGA 2/18 FBA
0_0402_5% FBC_D2 FBB_D1 FBx_CMD4 A5_BA1
G8
FBC_D3 F9 FBB_D2
FBC_D4 FBB_D3 FBx_CMD5 WE#
20141216 F11
[30,31] FBA_D[0..63] FBC_D5 G11 FBB_D4
FBA_D0 FBC_D6 FBB_D5 FBx_CMD6 A7_A8
L28 E1 2 1 F12
FBA_D1 FBA_D0 FB_CLAMP FBC_D7 FBB_D6
co
M29 RV114 N16E-GR@ G12 FBx_CMD7 A6_A11
FBA_D2 L29 FBA_D1 FBC_D8 G6 FBB_D7
10K_0402_5%
FBA_D3 M28 FBA_D2 RV300 2 0_0603_5% FBC_D9 F5 FBB_D8
OPT@ 1 FBx_CMD8 ABI#
FBA_D4 N31 FBA_D3 +PLLVDD FBC_D10 E6 FBB_D9
FBA_D5 P29 FBA_D4 K27 2 1 FBC_D11 F6 FBB_D10
FBA_D6 FBA_D5 FB_DLL_AVDD +FB_PLLAVDD FBC_D12 FBB_D11 FBx_CMD9 A12_RFU
R29 RV301 F4
FBA_D7 P28 FBA_D6 0_0603_5% FBC_D13 G4 FBB_D12
FBA_D8 FBA_D7 OPT@ FBC_D14 FBB_D13 FBx_CMD10 A0_A10
J28 1 E2
FBA_D9 H29 FBA_D8 FBC_D15 F3 FBB_D14
FBA_D10 FBA_D9 FBC_D16 FBB_D15 FBx_CMD11 A1_A9
J29 CV172 C2
FBA_D11 H28 FBA_D10 FBC_D17 D4 FBB_D16
FBA_D12 FBA_D11 0.1U_0402_10V7K
2 OPT@ FBC_D18 FBB_D17 FBx_CMD12 RAS#
G29 D3
FBA_D13 E31 FBA_D12 FBC_D19 C1 FBB_D18
FBA_D14 FBA_D13 FBC_D20 FBB_D19 FBx_CMD13 RST#
E32 B3
FBA_D15 FBC_D21
a.
F30 FBA_D14 C4 FBB_D20
FBA_D16 FBA_D15 FBC_D22 FBB_D21 FBx_CMD14 CKE#
C34 B5
FBA_D17 D32 FBA_D16 FBC_D23 C5 FBB_D22
FBA_D18 FBA_D17
Under GPU FBC_D24 FBB_D23 FBx_CMD15 CAS#
B33 A11
FBA_D19 C33 FBA_D18 FBC_D25 C11 FBB_D24
FBA_D20 FBA_D19 FBC_D26 FBB_D25 FBx_CMD16 CS#
F33 D11
FBA_D21 F32 FBA_D20 FBC_D27 B11 FBB_D26
FBA_D22 FBA_D21 FBC_D28 FBB_D27 FBx_CMD17 A3_BA3
H33 D8
FBA_D23 H32 FBA_D22 FBC_D29 A8 FBB_D28
P34 C8 PU for X16 mode
FBA_D25 P32 FBA_D24 FBC_D31 B8 FBB_D30
P31 F24
FBA_D27 P33 FBA_D26 FBC_D33 G23 FBB_D32 D13 FBC_CS#_L
FBA_D28 FBA_D27 FBC_D34 FBB_D33 FBB_CMD0 FBC_MA3_BA3_L FBC_CS#_L [32] FBx_CMD20 A5_BA1
C L31 E24 E14 C
FBA_D29 FBC_D35 FBC_MA2_BA0_L FBC_MA3_BA3_L [32]
si
L34 FBA_D28 G24 FBB_D34 FBB_CMD1 F14
FBA_D30 FBA_D29 FBC_D36 FBB_D35 FBB_CMD2 FBC_MA4_BA2_L FBC_MA2_BA0_L [32] +1.35VS_VGA FBx_CMD21 WE#
L32 D21 A12
FBA_D31 L33 FBA_D30 FBC_D37 E21 FBB_D36 FBB_CMD3 B12 FBC_MA5_BA1_L FBC_MA4_BA2_L [32]
FBA_D32 FBA_D31
PU for X16 mode FBC_D38 FBB_D37 FBB_CMD4 FBC_WE#_L FBC_MA5_BA1_L [32] FBx_CMD22 A7_A8
AG28 G21 C14
FBA_D33 AF29 FBA_D32 U30 FBA_CS#_L FBC_D39 F21 FBB_D38 FBB_CMD5 B14 FBC_MA7_MA8_L FBC_WE#_L [32]
FBA_D34 FBA_D33 FBA_CMD0 FBA_MA3_BA3_L FBA_CS#_L [30] FBC_D40 FBB_D39 FBB_CMD6 FBC_MA6_MA11_L FBC_MA7_MA8_L [32] FBx_CMD23 A6_A11
AG29 T31 G27 G15
FBA_D35 FBA_D34 FBA_CMD1 FBA_MA2_BA0_L FBA_MA3_BA3_L [30] FBC_D41 FBB_D40 FBB_CMD7 FBC_ABI#_L FBC_MA6_MA11_L [32]
1
AF28 U29 D27 F15 FBx_CMD24 ABI#
FBA_D36 AD30 FBA_D35 FBA_CMD2 R34 FBA_MA4_BA2_L FBA_MA2_BA0_L [30] FBC_D42 G26 FBB_D41 FBB_CMD8 E15 FBC_MA12_RFU_L FBC_ABI#_L [32]
RV116
FBA_D37 AD29 FBA_D36 FBA_CMD3 R33 FBA_MA5_BA1_L FBA_MA4_BA2_L [30] FBC_D43 E27 FBB_D42 FBB_CMD9 D15 FBC_MA0_MA10_L FBC_MA12_RFU_L [32]
10K_0402_5% FBx_CMD25 A12_RFU
FBA_D38 AC29 FBA_D37 FBA_CMD4 U32 FBA_WE#_L FBA_MA5_BA1_L [30] +1.35VS_VGA FBC_D44 E29 FBB_D43 FBB_CMD10 A14 FBC_MA1_MA9_L FBC_MA0_MA10_L [32]
OPT@
FBA_D39 AD28 FBA_D38 FBA_CMD5 U33 FBA_MA7_MA8_L FBA_WE#_L [30] FBC_D45 F29 FBB_D44 FBB_CMD11 D14 FBC_RAS#_L FBC_MA1_MA9_L [32]
FBA_D40 FBA_MA6_MA11_L FBA_MA7_MA8_L [30] FBC_D46 FBC_RST#_L FBC_RAS#_L [32] FBx_CMD26 A0_A10
2
AJ29 FBA_D39 FBA_CMD6 U28 E30 FBB_D45 FBB_CMD12 A15
FBA_D41 FBA_ABI#_L FBA_MA6_MA11_L [30] FBC_D47 FBC_CKE_L FBC_RST#_L [32]
1
AK29 FBA_D40 FBA_CMD7 V28 D30 FBB_D46 FBB_CMD13 B15
FBA_D42 FBA_D41 FBA_CMD8 FBA_MA12_RFU_L FBA_ABI#_L [30] FBC_D48 FBB_D47 FBB_CMD14 FBC_CAS#_L FBC_CKE_L [32] FBx_CMD27 A1_A9
AJ30 V29 RV115 A32 C17
ne
FBA_D43 AK28 FBA_D42 FBA_CMD9 V30 FBA_MA0_MA10_L FBA_MA12_RFU_L [30] FBC_D49 C31 FBB_D48 FBB_CMD15 D18 FBC_CS#_H FBC_CAS#_L [32]
10K_0402_5% FBx_CMD28 RAS#
FBA_D44 AM29 FBA_D43 FBA_CMD10 U34 FBA_MA1_MA9_L FBA_MA0_MA10_L [30] FBC_D50 C32 FBB_D49 FBB_CMD16 E18 FBC_MA3_BA3_H FBC_CS#_H [33]
OPT@
FBA_D45 AM31 FBA_D44 FBA_CMD11 U31 FBA_RAS#_L FBA_MA1_MA9_L [30] FBC_D51 B32 FBB_D50 FBB_CMD17 F18 FBC_MA2_BA0_H FBC_MA3_BA3_H [33]
FBA_D46 FBA_RST#_L FBA_RAS#_L [30] FBx_CMD29 RST#
2
AN29 FBA_D45 FBA_CMD12 V34 FBC_D52 D29 FBB_D51 FBB_CMD18 A20 FBC_MA4_BA2_H FBC_MA2_BA0_H [33] +1.35VS_VGA
FBA_D47 AM30 FBA_D46 FBA_CMD13 V33 FBA_CKE_L FBA_RST#_L [30] FBC_D53 A29 FBB_D52 FBB_CMD19 B20 FBC_MA5_BA1_H FBC_MA4_BA2_H [33]
FBA_D48 FBA_D47 FBA_CMD14 FBA_CAS#_L FBA_CKE_L [30] FBC_D54 FBB_D53 FBB_CMD20 FBC_WE#_H FBC_MA5_BA1_H [33] FBx_CMD30 CKE#
AN31 Y32 C29 C18
FBA_D49 AN32 FBA_D48 FBA_CMD15 AA31 FBA_CS#_H FBA_CAS#_L [30] FBC_D55 B29 FBB_D54 FBB_CMD21 B18 FBC_MA7_MA8_H FBC_WE#_H [33]
FBA_D50 FBA_D49 FBA_CMD16 FBA_MA3_BA3_H FBA_CS#_H [31] FBC_D56 FBB_D55 FBB_CMD22 FBC_MA6_MA11_H FBC_MA7_MA8_H [33] FBx_CMD31 CAS#
AP30 AA29 B21 G18
FBA_D51 FBA_D50 FBA_CMD17 FBA_MA2_BA0_H FBA_MA3_BA3_H [31] FBC_D57 FBB_D56 FBB_CMD23 FBC_ABI#_H FBC_MA6_MA11_H [33]
1
AP32 AA28 C23 G17
FBA_D52 AM33 FBA_D51 FBA_CMD18 AC34 FBA_MA4_BA2_H FBA_MA2_BA0_H [31] FBC_D58 A21 FBB_D57 FBB_CMD24 F17 FBC_MA12_RFU_H FBC_ABI#_H [33]
RV118
FBA_D53 AL31 FBA_D52 FBA_CMD19 AC33 FBA_MA5_BA1_H FBA_MA4_BA2_H [31] FBC_D59 C21 FBB_D58 FBB_CMD25 D16 FBC_MA0_MA10_H FBC_MA12_RFU_H [33]
10K_0402_5%
FBA_D54 AK33 FBA_D53 FBA_CMD20 AA32 FBA_WE#_H FBA_MA5_BA1_H [31] +1.35VS_VGA FBC_D60 B24 FBB_D59 FBB_CMD26 A18 FBC_MA1_MA9_H FBC_MA0_MA10_H [33]
OPT@
FBA_D55 FBA_D54 FBA_CMD21 FBA_MA7_MA8_H FBA_WE#_H [31] FBC_D61 FBB_D60 FBB_CMD27 FBC_RAS#_H FBC_MA1_MA9_H [33]
AK32 AA33 C24 D17
FBA_D56 FBA_MA6_MA11_H FBA_MA7_MA8_H [31] FBC_D62 FBC_RST#_H FBC_RAS#_H [33]
2
AD34 FBA_D55 FBA_CMD22 Y28 B26 FBB_D61 FBB_CMD28 A17
do
FBA_D57 FBA_D56 FBA_CMD23 FBA_ABI#_H FBA_MA6_MA11_H [31] FBC_D63 FBB_D62 FBB_CMD29 FBC_CKE_H FBC_RST#_H [33]
1
AD32 Y29 C26 B17
FBA_D58 AC30 FBA_D57 FBA_CMD24 W31 FBA_MA12_RFU_H FBA_ABI#_H [31] FBB_D63 FBB_CMD30 E17 FBC_CAS#_H FBC_CKE_H [33]
FBA_D59 AD33 FBA_D58 FBA_CMD25 Y30 FBA_MA0_MA10_H FBA_MA12_RFU_H [31] FBB_CMD31 G14 FBC_CAS#_H [33]
RV117 FBB_DEBUG0
FBA_D60 AF31 FBA_D59 FBA_CMD26 AA34 FBA_MA1_MA9_H FBA_MA0_MA10_H [31] FBC_DBI0# E11 FBB_CMD32 G20
10K_0402_5% FBB_DEBUG1
FBA_D61 AG34 FBA_D60 FBA_CMD27 Y31 FBA_RAS#_H FBA_MA1_MA9_H [31] [32] FBC_DBI0# FBC_DBI1# E3 FBB_DQM0 FBB_CMD33 C12 1 2
OPT@ NC +1.35VS_VGA
FBA_D62 FBA_RST#_H FBA_RAS#_H [31]
2
AG32 FBA_D61 FBA_CMD28 Y34 [32] FBC_DBI1# FBC_DBI2# A3 FBB_DQM1 FBB_CMD34 C20 RV121
FBA_D63 FBA_D62 FBA_CMD29 FBA_CKE_H FBA_RST#_H [31] [32] FBC_DBI2# FBC_DBI3# FBB_DQM2 NC FBB_CMD35
AG33 Y33 C9 60.4_0402_1%
FBA_D63 FBA_CMD30 V31 FBA_CAS#_H FBA_CKE_H [31] [32] FBC_DBI3# FBC_DBI4# F23 FBB_DQM3 GK107 GM107 @
FBA_CMD31 R28 FBA_CAS#_H [31] [33] FBC_DBI4# FBC_DBI5# F27 FBB_DQM4
FBA_DBI0# P30 FBA_DEBUG0 FBA_CMD32 [33] FBC_DBI5# FBC_DBI6# FBB_DQM5
FBA_DEBUG1
AC28 C30 1 2
[30] FBA_DBI0# FBA_DBI1# F31 FBA_DQM0 FBA_CMD33 R32 1 2 [33] FBC_DBI6# FBC_DBI7# A24 FBB_DQM6
NC +1.35VS_VGA RV122
B [30] FBA_DBI1# FBA_DBI2# F34 FBA_DQM1 FBA_CMD34 AC32 [33] FBC_DBI7# FBB_DQM7 B
NC
RV119 60.4_0402_1%
[30] FBA_DBI2# FBA_DBI3# M32 FBA_DQM2 FBA_CMD35 60.4_0402_1% @
[30] FBA_DBI3# FBA_DBI4# AD31 FBA_DQM3 GK107/GK208
GM107/GM108 FBC_EDC0 D10
@
in
FBA_DBI5# AL29 GF117 FBC_EDC1
[31] FBA_DBI4# FBA_DQM4 1 2 [32] FBC_EDC0 D5 FBB_DQS_WP0
[31] FBA_DBI5# FBA_DBI6# AM32 FBA_DQM5 [32] FBC_EDC1 FBC_EDC2 C3 FBB_DQS_WP1 D12 FBC_CLK0
RV120
[31] FBA_DBI6# FBA_DBI7# AF34 FBA_DQM6 [32] FBC_EDC2 FBC_EDC3 B9 FBB_DQS_WP2 FBB_CLK0 E12 FBC_CLK0# FBC_CLK0 [32]
60.4_0402_1%
[31] FBA_DBI7# FBA_DQM7 [32] FBC_EDC3 FBC_EDC4 E23 FBB_DQS_WP3 FBB_CLK0* E20 FBC_CLK1 FBC_CLK0# [32]
@
[33] FBC_EDC4 FBC_EDC5 E28 FBB_DQS_WP4 FBB_CLK1 F20 FBC_CLK1# FBC_CLK1 [33]
FBA_EDC0 M31 [33] FBC_EDC5 FBC_EDC6 B30 FBB_DQS_WP5 FBB_CLK1* FBC_CLK1# [33]
[30] FBA_EDC0 FBA_EDC1 G31 FBA_DQS_WP0 [33] FBC_EDC6 FBC_EDC7 A23 FBB_DQS_WP6
[30] FBA_EDC1 FBA_EDC2 E33 FBA_DQS_WP1 R30 FBA_CLK0 [33] FBC_EDC7 FBB_DQS_WP7
[30] FBA_EDC2 FBA_EDC3 M33 FBA_DQS_WP2 FBA_CLK0 R31 FBA_CLK0# FBA_CLK0 [30]
[30] FBA_EDC3 FBA_EDC4 AE31 FBA_DQS_WP3 FBA_CLK0* AB31 FBA_CLK1 FBA_CLK0# [30] D9 F8 FBC_WCK0
[31] FBA_EDC4 FBA_EDC5 AK30 FBA_DQS_WP4 FBA_CLK1 AC31 FBA_CLK1# FBA_CLK1 [31] E4 FBB_DQS_RN0 FBB_WCK01 E8 FBC_WCK0_N FBC_WCK0 [32]
[31] FBA_EDC5 FBA_EDC6 AN33 FBA_DQS_WP5 FBA_CLK1* FBA_CLK1# [31] FBA_RST#_L B2 FBB_DQS_RN1 FBB_WCK01* A5 FBC_WCK1 FBC_WCK0_N [32]
[31] FBA_EDC6 FBA_EDC7 AF33 FBA_DQS_WP6 FBA_RST#_H A9 FBB_DQS_RN2 FBB_WCK23 A6 FBC_WCK1_N FBC_WCK1 [32]
[31] FBA_EDC7 FBA_DQS_WP7 D22 FBB_DQS_RN3 FBB_WCK23* D24 FBC_WCK2 FBC_WCK1_N [32]
i-
D28 FBB_DQS_RN4 FBB_WCK45 D25 FBC_WCK2_N FBC_WCK2 [33]
M30 K31 FBA_WCK0 A30 FBB_DQS_RN5 FBB_WCK45* B27 FBC_WCK3 FBC_WCK2_N [33]
FBA_DQS_RN0 FBA_WCK01 FBA_WCK0_N FBA_WCK0 [30] FBB_DQS_RN6 FBB_WCK67 FBC_WCK3_N
1
1
H30 L30 B23 C27 FBC_WCK3 [33]
E34 FBA_DQS_RN1 FBA_WCK01* H34 FBA_WCK1 FBA_WCK0_N [30] FBB_DQS_RN7 FBB_WCK67* FBC_WCK3_N [33] FBC_RST#_L
RV123 RV124
M34 FBA_DQS_RN2 FBA_WCK23 J34 FBA_WCK1_N FBA_WCK1 [30] D6 FBC_RST#_H
10K_0402_5% 10K_0402_5%
AF30 FBA_DQS_RN3 FBA_WCK23* AG30 FBA_WCK2 FBA_WCK1_N [30] FBB_WCKB01 D7
OPT@ OPT@ FBB_WCKBxx ARE
AK31 FBA_DQS_RN4 FBA_WCK45 AG31 FBA_WCK2_N FBA_WCK2 [31] FBB_WCKB01* C6
FBA_WCK3 RESERVED,NC ON:
2
FBA_DQS_RN5 FBA_WCK45* FBA_WCK2_N [31] FBB_WCKB23
1
AM34 AJ34 GM108/GM107 B6
AF32 FBA_DQS_RN6 FBA_WCK67 AK34 FBA_WCK3_N FBA_WCK3 [31] FBB_WCKB23* F26 RV125 RV126
FBA_DQS_RN7 FBA_WCK67* FBA_WCK3_N [31] USED ONLY ON: FBB_WCKB45 E26 10K_0402_5% 10K_0402_5%
J30 GK107 FBB_WCKB45* A26 OPT@ OPT@
FBA_WCKBxx ARE
FBA_WCKB01 J31 FBB_WCKB67 A27
2
FBA_WCKB01* J32 FBB_WCKB67*
RESERVED,NC ON:
GM108/GM107
FBA_WCKB23 J33 H17
GK208/GF117
USED ONLY ON:
FBA_WCKB23*
FBA_WCKB45
FBA_WCKB45*
AH31
AJ31
AJ32
is FBB_PLL_AVDD
1
+FB_PLLAVDD
0.1U_0402_10V7K
GK107 FBA_WCKB67 AJ33 OPT@
FBA_WCKB67*
PASSH26 U27 2
FB_VREF FBA_PLL_AVDD +FB_PLLAVDD
22U_0603_6.3V6-M
OPT@
CV176
1 1 1
0.1U_0402_10V7K
A OPT@ A
1U_0402_6.3V6K
Under GPU
OPT@
2 2 2
CV175
OPT@
CV173
CV174
kn
Under GPU Near GPU

Issued Date 2015/02/26 Deciphered Date 2016/02/26 N16P-GX_VRAM I/F
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom
BY511/BY710 0.3

te
5 4 3 2 1
w.
ww
5 4 3 2 1
Physical Logical Logical Logical Logical

Strapping pin Power Rail Strapping Bit3 Strapping Bit2 Strapping Bit1 Strapping Bit0
UV1Q +3VS_AON
ROM_SCLK +3VGS SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED
U? +3VS_VGA
N16P-GX-B-A2_BGA908 ROM_SI +3VGS RAM_CFG[3] RAM_CFG[2] RAM_CFG[1] RAM_CFG[0]
13/18 MISC2 ROM_SO +3VGS DEVID_SEL PCIE_CFG SMB_ALT_ADDR VGA_DEVICE
2
STRAP0 +3VGS Reserved(keep pull-up and pull-down footprint and stuff 50Kohm pull-up)
RV187 RV188 RV189 RV190 RV191
2
RV198 49.9K_0402_1% 4.99K_0402_1% 10K_0402_1% 4.99K_0402_1% 20K_0402_1% STRAP1 +3VGS
H6 RV197 4.99K_0402_1% RV199 @ @ @ @
ROM_CS* OPT@
4.99K_0402_1% @ 24.9K_0402_1% STRAP2 +3VGS
1
H5 ROM_SI
ROM_SI ROM_SO
@ @ Reserved(keep pull-up and pull-down footprint and not stuff by default)
H7 STRAP0 STRAP3 +3VGS
1
ROM_SO ROM_SCLK
m
STRAP0 J2 H4
J7 STRAP0 ROM_SCLK
D
STRAP1
STRAP1 NC ROM_SI
STRAP1 STRAP4 +3VGS D
STRAP2 J6
STRAP2 NC
STRAP3 J5 NC STRAP2
STRAP4 J3 STRAP3 ROM_SO
STRAP4 NC
+3VS_AON GK107/GK208 GM107
STRAP3
ROM_SCLK
co
GF117 GM108
STRAP4 Pull-up to
1
Resistor Values +3VGS Pull-down to Gnd
2
RV205 L2
BUFRST* DEVID_SEL
2
10K_0402_5% RV200 4.99K 1000 0000
1
RV201 RV202 RV192 RV193 RV194 RV195 RV196
@
RV203 X76 10K_0402_1%
X76@ 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 10K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 10K 1001 0001 0 (Default)
2
J1 10K_0402_5% @ @ @ @ @
1
MULTI_STRAP_REF OPT@ OPT@
@ 15K 1010 0010
1
2
2
RV204 20K 1011 0011
40.2K_0402_1%
OPT@ 24.9K 1100 0100
a.
PCIE_CFG
1
30.1K 1101 0101

OPT@
34.8K 1110 0110 0 (Default)
45.3K 1111 0111
X76 1
GPU FB Memory (GDDR5) ROM_SI ROM_SO ROM_SCLK STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
SMBUS_ALT_ADDR
K4G20325FD-FC03 128X16 PD 5K
Samsung 0 0x9E (Default)
si
K4G41325FC-HC03 256X16 PD 20K
PD 5K PD 5K PU 50K NC NC NC NC 1 0x9C (Multi-GPU usage)
H5GC2H24BFR-T2C 128X16 PD 10K
Hynix
+3VS_AON +3VS_AON
N16P-GX H5GC4H24AJR-T2C 256X16 PD 34.8K
VGA_DEVICE
0 3D Device (Class Code 302h)
EDW2032BBBG-6A-F 128X16 PD 30.1K
Micron
ne
1 1 VGA Device (Default)
.1U_0402_10V6-K
EDW4032BABG-60-F 256X16 PD 24.9K RV57
10K_0402_5% CV68
2
GC6@ GC6@
G
2
1
C RV56 C
GPU_EVENT#_R 3 1 GPU_EVENT# 1 2 0_0402_5%
GPIO53 [20]
D
QV7
2N7002KW_SOT323-3
GC6@
1 2
do
RV64
0_0402_5%
@
+3VS_AON
+3VS_AON
2
RV48
+3VS_AON 10K_0402_5%
+3VS_VGA +3VS_AON @
+3VS_AON
.1U_0402_10V6-K
1
in
1
CV65
2
2
2
2
2
RV5 RV6 RV52 @
G
5
2.2K_0402_5% 2.2K_0402_5% RV49 RV50 10K_0402_5% 2

G
OPT@ OPT@ 2.2K_0402_5% 10K_0402_5% @

GC6@ @ RV51
DV2
1
1
FB_GC6_EN 3 1 FB_GC6_EN_R 1 2
GPIO52 [20]
1
VGA_SMB_CK2 GPU_PEX_RST_HOLD#
D
4 3 2
S
EC_SMB_CK2 [16,35,39,44] PLT_RST_VGA# 0_0402_5%

D
1 QV6
SYS_PEX_RST_MON# PLT_RST_VGA# [24]
2
3 RV54 2N7002KW_SOT323-3
QV3B 10K_0402_5% @
2N7002KDWH_SOT363-6 GC6@
BAT54AW_SOT323-3
i-
OPT@
GC6@ RV55 1 2 0_0402_5%
1
2
2 1
G
RV8
0_0402_5%
@
VGA_SMB_DA2 1 6
S
EC_SMB_DA2 [16,35,39,44]
D
QV3A
2N7002KDWH_SOT363-6 PU AT EC SIDE, +3VS AND 4.7K
OPT@
RV12
2 1 [20,28] PXS_PWREN
is 2
RV220
0_0402_5%
1
B B
0_0402_5% @
@
RV219 1 2 0_0402_5%
[27,28] 3VGS_PWR_EN EN_VGA [29,60]
+3VS_AON
kn
+3VS_AON
+3VS_VGA
UV1R
2
RV214 U?
100K_0402_5% N16P-GX-B-A2_BGA908 2 1
OPT@ 11/18 MISC1 +3VS RV36
VGA_SMB_CK2 3VGS_PWR_EN RV18 2 1
T4 0_0402_5% +3VS_AON
1
I2CS_SCL T3 VGA_SMB_DA2 10K_0402_5% OPT@ @

GM107/GM108 GK107
I2CS_SDA Internal Thermal Sensor VGA_ALERT# RV23 1 2
GK208 GF117 RV38 1 2 0_0402_5%
OVERT# M1 R2 VGA_EDID_CLK 1 2 10K_0402_5% OPT@
[24] OVERT# OVERT GPIO8 I2CC_SCL VGA_EDID_DATA +3VS_AON VGA_AC_DET_R 1
R3 RV212 1 2 2.2K_0402_5% OPT@ RV26 1 2
I2CC_SDA
2
te
RV210 2.2K_0402_5% OPT@ 100K_0402_5% OPT@ CV58

I2CB_SCL GPU_PSI RV213 1 2
NC R7 1 2 RV216 .1U_0402_10V6-K
K4 I2CB_SCL R6 I2CB_SDA 10K_0402_5% OPT@ 2
NC RV22 1 2 2.2K_0402_5% OPT@ GPU_PEX_RST_HOLD# RV215 1 10K_0402_5% OPT@
THERMDN I2CB_SDA RV25 2.2K_0402_5% OPT@ 2 @
GM107/GM108
K3 GF117
GK107/GK208
10K_0402_5% OPT@
1
THERMDP UV2
TV1 @ 1 AM10 PLT_RST# 1 5

JTAG_TCK [18,36,37,40,44,45] PLT_RST# B VCC
TV2 @ 1 AP11
1 AM11 JTAG_TMS +3VS_AON 2
TV3 @
TV4 @ 1 AP12 JTAG_TDI [20] PXS_RST# A
AN11 JTAG_TDO P6 FB_GC6_EN 3 4 SYS_PEX_RST_MON#
JTAG_TRST* GPIO0 M3 FB_GC6_EN [26] GND Y
GPIO1
w.
1
L6 RV303 1 2
VDDQ_OTW# [64]
10K_0402_5%
GPIO2
2
P5
GPIO3 0_0402_5% 74LVC1G08SE-7 SOT353-1-5
2
RV37 P7 RV217
RV39
GPIO4 VGA_ALERT# 2 1
10K_0402_5% L7 3VGS_PWR_EN 100K_0402_5% OPT@ RV42
GPIO5 M7 GPU_EVENT#_R 3VGS_PWR_EN [27,28] @ DV6 RB751V-40_SOD323-2
OPT@ 10K_0402_5%
2
GPIO6 N8 OPT@
1
GK107/GK208/GF 117 GPIO7 L3SYS_PEX_RST_MON# VGA_AC_DET_R 2 1
1
NC
GPIO8 M2 VGA_ALERT# PASS VGA_AC_DET [44]
GPIO9 VGA_ALERT# [20] DV1 RB751V-40_SOD323-2
L1 MEM_VREF [30,31,32,33]
GPIO10 M5 PWMVID @
GPIO11 N3 VGA_AC_DET_R PWMVID [60]
GPIO12 M4 1 2
GPIO13 GPU_PSI [60]
2
GPIO16
R8 RV44
NC GPIO16
ww
GPIO16 P4 RV41 0_0402_5%

A
GPIO20 NC NC GPIO20 P1GPU_PEX_RST_HOLD# 100K_0402_5%
20150723 @ A
GPIO8 NC NC GPIO21
GM107 OPT@
1. Add VDDQ_OTW# function to avoid PU703 OTP
GK208 GF117 GK107 GM108 2. Add RV303 (R-short)
1
OPT@
Issued Date 2015/02/26 Deciphered Date 2016/02/26 N16P-GX_PEG I/F

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Re v
Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
UV1D UV1O
U?
N16P-GX-B-A2_BGA908 U?
+1.35VS_VGA N16P-GX-B-A2_BGA908
+3VS_AON
Under GPU(below 150mils)
Near GPU 3.5A 15/18 FBVDDQ
18/18 NC/VDD33
AA27 GK208 GM107

FBVDDQ_01
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1 1 1 1 2 2 2 2 1 1 1 1 AA30 GK107
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
GM108
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
GF117
AB27 FBVDDQ_02
AJ28 J8 +3VS_AON
AB33 FBVDDQ_03 NC_1VDD33 3V3MISC
3V3_AON_1
FBVDDQ_04 C15 K8
AC27 NC_2VDD33 3V3MISC
3V3_AON_2
4.7U_0805_25V6-K
1 1 1
@
OPT@
OPT@
OPT@
D19
0.1U_0402_10V7K
2 2 2 2 1 1 1 1 2 2 2 2 AD27 FBVDDQ_05 NC_3
m
1 1
1U_0603_10V6K
D20 L8
33P_0402_50V8J
33P_0402_50V8J
CV91
CV97
CV92
CV93
FBVDDQ_06
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
AE27 NC_4 VDD33_1
CV94
CV86
CV87
CV88
CV95
CV89
CV96
CV90
D FBVDDQ_07 D23 M8 D
@ @ AF27 D26 NC_5 VDD33_2
AG27 FBVDDQ_08 NC_6 2 2 2
RF@
FBVDDQ_09 H31
CV118
2 2
OPT@
OPT@
OPT@
B13 NC_7
CV116
CV117
FBVDDQ_10 V32
co
B19 NC_8
RF@
CD87
CD88
+1.35VS_VGA E13 FBVDDQ_11
Under GPU(below 150mils) E19 FBVDDQ_12 AC6
DNU_5 DO NOT
FBVDDQ_13 AJ4
H10 AJ5 DNU_4 CONNECT Under GPU Near GPU
H11 FBVDDQ_14 DNU_2 THESE
1 1 1 1 1 1 1 1 AL11
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
FBVDDQ_15
H12
H13
H14
FBVDDQ_16
FBVDDQ_17
T8 DNU_1
DNU_3
PINS
+3VS_VGA
Near GPU
2 2 2 2 2 2 2 2 FBVDDQ_18
OPT@
OPT@
H18
FBVDDQ_19 OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
H19
CV99
CV100
CV101
CV102
CV103
CV104
CV105
CV106
FBVDDQ_20
a.
H20
H21 FBVDDQ_21
1 1 1 1
0.1U_0402_10V7K
0.1U_0402_10V7K
4.7U_0603_6.3V6K
H22 FBVDDQ_22
1 1
1U_0603_10V6K
33P_0402_50V8J
33P_0402_50V8J
H23 FBVDDQ_23
H24 FBVDDQ_24
H8 FBVDDQ_25 2 2 2 2
RF@
FBVDDQ_26 2 2
OPT@
OPT@
OPT@
OPT@
H9
CV119
CV120
CV122
CV121
L27 FBVDDQ_27
RF@
CD91
CD92
M27 FBVDDQ_28
N27 FBVDDQ_29
si
P27 FBVDDQ_30
+1.35VS_VGA FBVDDQ_31 Under GPU Near GPU
R27
FBVDDQ_32
T27
T30
T33
FBVDDQ_33
FBVDDQ_34
Near GPU
Y27 FBVDDQ_35
FBVDDQ_36
Near GPU Under GPU(below 150mils) CALIBRATION PIN GDDR5
B16
FBVDDQ_AON_1 FBVDDQ
1 1 1 1 1 E16
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_10V7K
0.1U_0402_10V7K
4.7U_0603_6.3V6K
FBVDDQ_AON_2 FBVDDQ
H15
FB_CAL_x_PD_VDDQ 40.2Ohm
ne
1 FBVDDQ_AON_3 FBVDDQ
33P_0402_50V8J
1 H16
33P_0402_50V8J
FBVDDQ_AON_4 FBVDDQ
V27
2 2 2 2 2 FBVDDQ_AON_5 FBVDDQ
OPT@
W27
FB_CAL_x_PU_GND 40.2Ohm
RF@
FBVDDQ_AON_6 FBVDDQ
OPT@
OPT@
OPT@
OPT@
W30
CV111
CV112
CV113
CV114
CV115
2 2 FBVDDQ
W33 FBVDDQ_AON_7
C C
CD89
FBVDDQ_AON_8 FBVDDQ
RF@
CD90
GM107/GM108
GK107/ FB_CAL_xTERM_GND 60.4Ohm
GK208/
GF117
Near GPU
do
F1 FB_VDDQ_SENSE RV90 1 2 0_0402_5%
FB_VDDQ_SENSE VDDQ_SENSE [64]
F2 FB_VSS_SENSE RV91 1 2 0_0402_5%
FB_GND_SENSE
J27 1 2
Add CV300 for FB_CAL_PD_VDDQ RV92 40.2_0402_1% OPT@
+1.35VS_VGA
power noise issue H27 1 2
FB_CAL_PU_GND RV93 40.2_0402_1% OPT@
+1.35VS_VGA H25 1 2
FB_CAL_TERM_GND RV94 60.4_0402_1% OPT@
in
OPT@
330U_D1_2VM_R6M
Place near balls

1 Pass
+
CV300
i-
+3VS +3VS_AON
+3VS_AON +3VS_VGA
+3.3VS TO +3VGS
+3VS +5VALW
is
S
1 3
B B
QV11 1 2
1
LP2301ALT1G_SOT23-3 RV208
2
RV63 OPT@ 0_0603_5% @

G
1 1 1
2
RV218 47K_0402_5% CV71 CV70 RV65 CV67

10K_0402_5% OPT@ .1U_0402_10V6-K 0.01U_0402_25V7K 470_0603_5% 10U_0603_6.3V6M +5VALW
D
OPT@ @ @ @ OPT@ 1 3
2
2 2 2 QV16
kn
1
1
PXS_PWREN# 1 2 LP2301ALT1G_SOT23-3
1
RV86 GC6@
G
1 1 1
2
RV66 1 47K_0402_5% CV73 RV85 CV74
1
D 10K_0402_5% OPT@ GC6@ CV72 0.01U_0402_25V7K 470_0603_5% 10U_0603_6.3V6M

1
2 OPT@ CV69 D .1U_0402_10V6-K GC6@ @ GC6@

[20,27] PXS_PWREN
2
G .1U_0402_10V6-K PXS_PWREN# 2 2 @ 2 2
2
QV12 2 G DGPU_PWR_EN# 1 2
1
S 2N7002KW_SOT323-3 QV13
3
OPT@ S 2N7002KW_SOT323-3 RV83 1

3
1
RV67 @ D 4.7K_0402_5% GC6@
te
1
100K_0402_5% 2 GC6@ CV75 D
[27] 3VGS_PWR_EN G .1U_0402_10V6-K DGPU_PWR_EN# 2
@
2
QV19 2 G QV20
1
S 2N7002KW_SOT323-3 2N7002KW_SOT323-3
3
GC6@ S @
3
RV84
100K_0402_5%
2
w.
+1.35VS_VGA +1.05VS_VGA
1
R171 R165
470_0603_5% 470_0603_5%
@ @
1 2
1 2
ww
A Q31 D Q4 D A
PXS_PWREN# 2 PXS_PWREN# 2
PXS_PWREN# G G
@ S 2N7002KW_SOT323-3 @ S 2N7002KW_SOT323-3
3
Issued Date 2015/02/26 Deciphered Date 2016/02/26 POWER

C
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
UV1E
UV1F UV1H
U? UV1G
N16P-GX-B-A2_BGA908 U? U?
N16P-GX-B-A2_BGA908 N16P-GX-B-A2_BGA908 U?
16/18 GND_1/2 10/18 XVDD
+VGA_CORE +VGA_CORE N16P-GX-B-A2_BGA908
17/18 GND_2/2
A2 AM25 14/18 NVVDD
A33 GND_001 GND_071 AN1 N19 T28 CONFIGURABLE
AA13 GND_002 GND_072 AN10 N2 GND_141 GND_170 T32 AA12
POW ER
AA15 GND_003 GND_073 AN13 N21 GND_142 GND_171 T5 AA14 VDD_01
CHANNELS
AA17 GND_004 GND_074 AN16 N23 GND_143 GND_172 T7 U1 1 AA16 VDD_02
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
GND_005 GND_075 GND_144 GND_173 XVDD_01 1 1 1 1 1 1 1 1 1 1 1 1 VDD_03
AA18 AN19 N28 U12 U2 AA19
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
33P_0402_50V8J
33P_0402_50V8J
GND_006 GND_076 GND_145 GND_174 XVDD_02 1 1 VDD_04
AA20 AN22 N30 U14 U3 AA21
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
AA22 GND_007 GND_077 AN25 N32 GND_146 GND_175 U16 XVDD_03 U4 AA23 VDD_05
D GND_008 GND_078 GND_147 GND_176 XVDD_04 2 2 2 2 2 2 2 2 2 2 2 2 2 VDD_06 D
m
AB12 AN30 N33 U19 U5 AB13
RF@
GND_009 GND_079 GND_148 GND_177 XVDD_05 2 2 VDD_07
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
AB14 AN34 N5 U21 U6
CV134
CV135
CV136
CV137
CV138
CV139
CV145
CV146
AB15
GND_010 GND_080 GND_149 GND_178 XVDD_06 VDD_08
OPT@
OPT@
OPT@
OPT@
OPT@
AB16 AN4 N7 U23 U7
CV140
CV141
CV142
CV143
CV144
AB17
RF@
CD94
CD93
AB19 GND_011 GND_081 AN7 P13 GND_150 GND_179 V12 XVDD_07 U8 AB18 VDD_09
AB2 GND_012 GND_082 AP2 P15 GND_151 GND_180 V14 XVDD_08 V1 AB20 VDD_10
co
AB21 GND_013 GND_083 AP33 P17 GND_152 GND_181 V16 XVDD_09 AB22 VDD_11
AB23
AB28
GND_014
GND_015
GND_016
GND_084
GND_085
GND_086
B1
B10
P18
P20
GND_153
GND_154
GND_155
GND_182
GND_183
GND_184
V19
V21
XVDD_10
V2 Near GPU AC12
AC14
VDD_12
VDD_13
VDD_14
AB30 B22 P22 V23 V3 AC16
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
AB32 GND_017 GND_087 B25 R12 GND_156 GND_185 W13 XVDD_11 V4 AC19 VDD_15
GND_018 GND_088 GND_157 GND_186 XVDD_12 1 1 1 1 1 1 1 VDD_16
AB5 B28 R14 W15 V5 AC21
AB7 GND_019 GND_089 B31 R16 GND_158 GND_187 W17 XVDD_13 V6 AC23 VDD_17
AC13 GND_020 GND_090 B34 R19 GND_159 GND_188 W18 XVDD_14 V7 M12 VDD_18
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
AC15 GND_021 GND_091 B4 R21 GND_160 GND_189 W20 XVDD_15 V8 2 2 2 2 2 2 2 M14 VDD_19
a.
CV147
CV148
CV149
CV150
CV151
CV152
CV153
AC17 GND_022 GND_092 B7 R23 GND_161 GND_190 W22 XVDD_16 W2 M16 VDD_20
AC18 GND_023 GND_093 C10 T13 GND_162 GND_191 W28 XVDD_17 W3 M19 VDD_21
AC20 GND_024 GND_094 C13 T15 GND_163 GND_192 Y12 XVDD_18 M21 VDD_22
AC22 GND_025 GND_095 C19 T17 GND_164 GND_193 Y14 M23 VDD_23
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
GND_026 GND_096 GND_165 GND_194 1 1 1 1 1 1 1 1 VDD_24
AE2 C22 T18 Y16 W4 N13
AE28 GND_027 GND_097 C25 T2 GND_166 GND_195 Y19 XVDD_19 W5 N15 VDD_25
AE30 GND_028 GND_098 C28 T20 GND_167 GND_196 Y21 XVDD_20 W7 N17 VDD_26
AE32 GND_029 GND_099 C7 T22 GND_168 GND_197 Y23 XVDD_21 W8 2 2 2 2 2 2 2 2 N18 VDD_27
1
330U_D2_2.5VY_R9M
GND_030 GND_100 GND_169 GND_198 XVDD_22 VDD_28
si
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
AE33 D2 Y4
CV154
CV155
CV156
CV157
CV158
CV159
CV160
N20
CV161
AE5 GND_031 GND_101 D31 XVDD_23 Y5 + N22 VDD_29
GND_032 GND_102 XVDD_24 To delete a capacitance VDD_30
AE7 D33 Y6 P12
AH10 GND_033 GND_103 E10 XVDD_25 Y7 of 330U,If test is OPT@ P14 VDD_31
AH13 GND_034 GND_104 E22 XVDD_26 Y8 fail,Need to change 2 P16 VDD_32
GND_035 GND_105 XVDD_27 VDD_33
AH16 E25 330U to 470U
CV162
P19
AH19 GND_036 GND_106 E5 AG11 AH11 P21 VDD_34
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
GND_037 GND_107 GND_F GND_H 1 1 1 1 1 1 1 VDD_35
C AH2 E7 P23 C
AH22 GND_038 GND_108 F28 R13 VDD_36
ne
AH24 GND_039 GND_109 F7 R15 VDD_37
AH28 GND_040 GND_110 G10 2 2 2 2 2 2 2 R17 VDD_38
GND_041 GND_111 VDD_39
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
AH29 G13
CV164
CV165
CV166
CV167
CV168
CV169
R18
CV170
AH30 GND_042 GND_112 G16 R20 VDD_40
AH32 GND_043 GND_113 G19 R22 VDD_41
AH33 GND_044 GND_114 G2 C16 T12 VDD_42
AH5
AH7
GND_045
GND_046
GND_047
GND_115
GND_116
GND_117
G22
G25
GND_OPT_1
GND_OPT_2
W32
POSCAP T14
T16
VDD_43
VDD_44
VDD_45
AJ7 G28 T19
do
Optional CMD GNDs (2)
AK10
AK7
GND_048
GND_049
GND_050
GND_118
GND_119
GND_120
G3
G30
NC for 4-Lyr cards
NEAR GPU UNDER GPU T21
T23
VDD_46
VDD_47
VDD_48
AL12 G32 OPT@ U13
AL14 GND_051 GND_121 G33 U15 VDD_49
AL15 GND_052 GND_122 G5 U17 VDD_50
AL17 GND_053 GND_123 G7 U18 VDD_51
OPT@
AL18 GND_054 GND_124 K2 U20 VDD_52
AL2 GND_055 GND_125 K28 U22 VDD_53
GND_056 GND_126 VDD_54
in
AL20 K30 V13
AL21 GND_057 GND_127 K32 V15 VDD_55
AL23 GND_058 GND_128 K33 +3VS_VGA V17 VDD_56
AL24 GND_059 GND_129 K5 V18 VDD_57
AL26 GND_060 GND_130 K7 V20 VDD_58
AL28 GND_061 GND_131 M13 V22 VDD_59
2
AL30 GND_062 GND_132 M15 W12 VDD_60
AL32 GND_063 GND_133 M17 RV104 W14 VDD_61
GND_064 GND_134 +VGA_CORE VDD_62
AL33 M18 10K_0402_5% W16
i-
AL5 GND_065 GND_135 M20 +5VALW OPT@ W19 VDD_63
AM13 GND_066 GND_136 M22 W21 VDD_64
1
1
B
AM16 GND_067 GND_137 N12 W23 VDD_65 B
DV3
2
AM19 GND_068 GND_138 N14 RV106 Y13 VDD_66

AM22 GND_069 GND_139 N16 RV108 470_0603_5% 2 Y15 VDD_67
GND_070 GND_140 @ [64] VDDQPWROK VDD_68
47K_0402_5% 1 Y17
VGA_PWRGD [44] VDD_69
@ 3 Y18
1 2
[65] VDDAPWROK VDD_70

Y20
1
D
Y22 VDD_71
OPT@
2
G
is
QV23
2N7002KW_SOT323-3
BAT54AW_SOT323-3
OPT@
VDD_72
1
D @ OPT@
2 QV24 S
3
[27,60,65] EN_VGA
G 2N7002KW_SOT323-3
@
S
3
kn
te
A A
w.
Issued Date 2015/02/26 Deciphered Date 2016/02/26 GND

BY511/BY710
ww
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.3
5 4 3 2 1
5 4 3 2 1
Memory - Lower 32 bits UV4 UV5
MF=0 MF=1 MF=1 MF=0 MF=0 MF=1 MF=1 MF=0
FBA_D0 FBA_D[0..7] [26] FBA_D24 FBA_D[24..31] [26]

A4 A4
FBA_EDC0 C2 DQ24 DQ0 A2 FBA_D1 FBA_EDC3 C2 DQ24 DQ0 A2 FBA_D25
[26] FBA_EDC0 EDC0 EDC3 DQ25 DQ1 FBA_D2 [26] FBA_EDC3 EDC0 EDC3 DQ25 DQ1 FBA_D26
C13 B4 C13 B4
FBA_EDC2 R13 EDC1 EDC2 DQ26 DQ2 B2 FBA_D3 FBA_EDC1 R13 EDC1 EDC2 DQ26 DQ2 B2 FBA_D27
[26] FBA_EDC2 EDC2 EDC1 DQ27 DQ3 FBA_D4 BYTE0 [26] FBA_EDC1 EDC2 EDC1 DQ27 DQ3 FBA_D28
R2 E4 R2 E4 BYTE3
EDC3 EDC0 DQ28 DQ4 E2 FBA_D5 EDC3 EDC0 DQ28 DQ4 E2 FBA_D29
DQ29 DQ5 F4 FBA_D6 DQ29 DQ5 F4 FBA_D30
FBA_DBI0# D2 DQ30 DQ6 F2 FBA_D7 FBA_DBI3# D2 DQ30 DQ6 F2 FBA_D31
[26] FBA_DBI0# DBI0# DBI3# DQ31 DQ7 [26] FBA_DBI3# DBI0# DBI3# DQ31 DQ7
D13 A11 D13 A11
FBA_DBI2# P13 DBI1# DBI2# DQ16 DQ8 A13 FBA_DBI1# P13 DBI1# DBI2# DQ16 DQ8 A13
D PASS P2 B11 P2 B11 D
DBI3# DBI0# DQ18 DQ10 B13 DBI3# DBI0# DQ18 DQ10 B13
m
FBA_CLK0 J12 DQ19 DQ11 E11 FBA_CLK0 J12 DQ19 DQ11 E11
[26,30] FBA_CLK0 FBA_CLK0# CK DQ20 DQ12 [26,30] FBA_CLK0 FBA_CLK0# CK DQ20 DQ12
J11 E13 J11 E13
[26,30] FBA_CLK0# FBA_CKE_L CK# DQ21 DQ13 [26,30] FBA_CLK0# FBA_CKE_L CK# DQ21 DQ13
J3 F11 J3 F11
[26,30] FBA_CKE_L CKE# DQ22 DQ14 [26,30] FBA_CKE_L CKE# DQ22 DQ14
F13 F13
DQ23 DQ15 FBA_D20 FBA_D[16..23] [26] DQ23 DQ15 FBA_D8 FBA_D[8..15] [26]
U11 U11
FBA_MA2_BA0_L DQ8 DQ16 FBA_D22 FBA_MA4_BA2_L DQ8 DQ16 FBA_D9
co
H11 U13 H11 U13
[26,30] FBA_MA2_BA0_L FBA_MA5_BA1_L BA0/A2 BA2/A4 DQ9 DQ17 FBA_D23 [26,30] FBA_MA4_BA2_L FBA_MA3_BA3_L BA0/A2 BA2/A4 DQ9 DQ17 FBA_D10
K10 T11 K10 T11
K11 T13 K11 T13 BYTE1
H10 N11 BYTE2 H10 N11
[26,30] FBA_MA3_BA3_L BA3/A3 BA1/A5 DQ12 DQ20 FBA_D16 [26,30] FBA_MA5_BA1_L BA3/A3 BA1/A5 DQ12 DQ20 FBA_D13
N13 N13
DQ13 DQ21 M11 FBA_D17 DQ13 DQ21 M11 FBA_D14
FBA_MA7_MA8_L K4 DQ14 DQ22 M13 FBA_D19 FBA_MA0_MA10_L K4 DQ14 DQ22 M13 FBA_D15
[26,30] FBA_MA7_MA8_L FBA_MA1_MA9_L A8/A7 A10/A0 DQ15 DQ23 [26,30] FBA_MA0_MA10_L FBA_MA6_MA11_L A8/A7 A10/A0 DQ15 DQ23
H5 U4 H5 U4
H4 U2 H4 U2
K5 T4 K5 T4
[26,30] FBA_MA6_MA11_L FBA_MA12_RFU_L A11/A6 A9/A1 DQ2 DQ26 [26,30] FBA_MA1_MA9_L FBA_MA12_RFU_L A11/A6 A9/A1 DQ2 DQ26
J5 T2 J5 T2
[26,30] FBA_MA12_RFU_L A12/RFU/NC DQ3 DQ27 [26,30] FBA_MA12_RFU_L A12/RFU/NC DQ3 DQ27
a.
N4 +1.35VS_VGA 2 1 N4
2 1 A5 DQ4 DQ28 N2 RV128 A5 DQ4 DQ28 N2
RV127 U5 VPP/NC1 DQ5 DQ29 M4 1K_0402_1% U5 VPP/NC1 DQ5 DQ29 M4
1K_0402_1% RANKA@ VPP/NC2 DQ6 DQ30 M2 RANKA@ VPP/NC2 DQ6 DQ30 M2
2 1 DQ7 DQ31 2 1 DQ7 DQ31
RV129 J1 +1.35VS_VGA RV130 J1 +1.35VS_VGA
1K_0402_1% RANKA@ J10 MF 1K_0402_1% J10 MF
2 1 J13 SEN B1 RANKA@ J13 SEN B1
RV131 ZQ VDDQ1 D1 PASS 2 1 ZQ VDDQ1 D1
PASS 121_0402_1% RANKA@ VDDQ2 F1 RV132 PASS VDDQ2 F1
Follow DG FBA_ABI#_L VDDQ3 FBA_ABI#_L VDDQ3
J4 M1 121_0402_1% J4 M1
[26,30] FBA_ABI#_L FBA_RAS#_L ABI# VDDQ4 [26,30] FBA_ABI#_L FBA_CAS#_L ABI# VDDQ4
si
G3 P1 RANKA@ G3 P1
FBA_CLK0 [26,30] FBA_RAS#_L FBA_CS#_L RAS# CAS# VDDQ5 [26,30] FBA_CAS#_L FBA_WE#_L RAS# CAS# VDDQ5
1 2 G12 T1 G12 T1
[26,30] FBA_CS#_L FBA_CAS#_L CS# WE# VDDQ6 [26,30] FBA_WE#_L FBA_RAS#_L CS# WE# VDDQ6
RV133 L3 G2 L3 G2
[26,30] FBA_CAS#_L FBA_WE#_L CAS# RAS# VDDQ7 [26,30] FBA_RAS#_L FBA_CS#_L CAS# RAS# VDDQ7
40.2_0402_1% L12 L2 L12 L2
[26,30] FBA_WE#_L [26,30] FBA_CS#_L
1
@ WE# CS# VDDQ8 B3 WE# CS# VDDQ8 B3

RV134 VDDQ9 D3 VDDQ9 D3
80.6_0402_1% VDDQ10 F3 VDDQ10 F3
RANKA@ FBA_WCK0_N D5 VDDQ11 H3 FBA_WCK1_N D5 VDDQ11 H3
C
[26,30]
[26,30]
FBA_WCK0_N
FBA_WCK0
FBA_WCK0 D4 WCK01# WCK23# VDDQ12 K3
[26,30]
[26,30]
FBA_WCK1_N
FBA_WCK1
FBA_WCK1 D4 WCK01# WCK23# VDDQ12 K3 GDDR5 C
2
FBA_CLK0# 1 2 WCK01 WCK23 VDDQ13 M3 WCK01 WCK23 VDDQ13 M3

RV135
[26,30] FBA_WCK1_N
FBA_WCK1_N
FBA_WCK1
P5
WCK23# WCK01#
VDDQ14
VDDQ15
P3
[26,30] FBA_WCK0_N
FBA_WCK0_N
FBA_WCK0
P5
WCK23# WCK01#
VDDQ14
VDDQ15
P3 Mode H - Mirror Mode Mapping
P4 T3 P4 T3
ne
40.2_0402_1% 1 [26,30] FBA_WCK1 WCK23 WCK01 VDDQ16 [26,30] FBA_WCK0 WCK23 WCK01 VDDQ16
@ E5 E5
0.01U_0402_25V7K
VDDQ17 N5 VDDQ17 N5
+FBA_VREFD_L VDDQ18 +FBA_VREFD_L VDDQ18 DATA Bus
A10 E10 A10 E10
2 [30] +FBA_VREFD_L VREFD1 VDDQ19 [30] +FBA_VREFD_L VREFD1 VDDQ19
U10 N10 U10 N10 Address 0..31 32..63
+FBA_VREFC0 VREFD2 VDDQ20 +FBA_VREFC0 VREFD2 VDDQ20
@
J14 B12 J14 B12

[30] +FBA_VREFC0 VREFC VDDQ21 [30] +FBA_VREFC0 VREFC VDDQ21
D12 D12
CV177
VDDQ22 VDDQ22
FBx_CMD0 CS#
F12 F12
VDDQ23 H12 VDDQ23 H12
FBA_RST#_L VDDQ24 FBA_RST#_L VDDQ24
FBx_CMD1 A3_BA3
PASS J2 K12 J2 K12
[26,30] FBA_RST#_L RESET# VDDQ25 [26,30] FBA_RST#_L RESET# VDDQ25
M12 M12 FBx_CMD2 A2_BA0
VDDQ26 P12 VDDQ26 P12
do
+1.35VS_VGA VDDQ27 T12 VDDQ27 T12
VDDQ28 VDDQ28
FBx_CMD3 A4_BA2
G13 G13
H1 VDDQ29 L13 H1 VDDQ29 L13
VSS1 VDDQ30 VSS1 VDDQ30 FBx_CMD4 A5_BA1
K1 B14 K1 B14
1
B5 VSS2 VDDQ31 D14 B5 VSS2 VDDQ31 D14

VSS3 VDDQ32 VSS3 VDDQ32
FBx_CMD5 WE#
RV136 G5 F14 G5 F14
549_0402_1% L5 VSS4 VDDQ33 M14 L5 VSS4 VDDQ33 M14
FBx_CMD6 A7_A8
RANKA@ T5 P14 T5 P14
B10 VSS6 VDDQ35 T14 B10 VSS6 VDDQ35 T14 FBx_CMD7 A6_A11
2
1 2 +FBA_VREFC0 D10 VSS7 VDDQ36 D10 VSS7 VDDQ36

RV137 G10 VSS8 G10 VSS8
FBx_CMD8 ABI#
in
1
931_0402_1% RV138 L10 VSS9 A1 L10 VSS9 A1

1 16 mil VSS10 VSSQ1 VSS10 VSSQ1
RANKA@ 1.33K_0402_1% CV178 P10 C1 P10 C1 FBx_CMD9 A12_RFU
RANKA@ 820P_0402_25V7 T10 VSS11 VSSQ2 E1 T10 VSS11 VSSQ2 E1
RANKA@ H14 VSS12 VSSQ3 N1 H14 VSS12 VSSQ3 N1
2 VSS13 VSSQ4 VSS13 VSSQ4
FBx_CMD10 A0_A10
K14 R1 K14 R1
2
+1.35VS_VGA VSS14 VSSQ5 U1 +1.35VS_VGA VSS14 VSSQ5 U1

VSSQ6 VSSQ6
FBx_CMD11 A1_A9
H2 H2
G1 VSSQ7 K2 G1 VSSQ7 K2
VDD1 VSSQ8 VDD1 VSSQ8
FBx_CMD12 RAS#
L1 A3 L1 A3
G4 VDD2 VSSQ9 C3 G4 VDD2 VSSQ9 C3
FBx_CMD13 RST#
L4 E3 L4 E3
i-
C5 VDD4 VSSQ11 N3 C5 VDD4 VSSQ11 N3
B
+1.35VS_VGA VDD5 VSSQ12 VDD5 VSSQ12 FBx_CMD14 CKE# B
R5 R3 R5 R3
C10 VDD6 VSSQ13 U3 C10 VDD6 VSSQ13 U3
FBx_CMD15 CAS#
R10 C4 R10 C4
1
RV139 D11 VDD8 VSSQ15 R4 D11 VDD8 VSSQ15 R4

FBx_CMD16 CS#
549_0402_1% G11 F5 G11 F5
RANKA@ L11 VDD10 VSSQ17 M5 L11 VDD10 VSSQ17 M5
FBx_CMD17 A3_BA3
P11 F10 P11 F10
G14 VDD12 VSSQ19 M10 G14 VDD12 VSSQ19 M10 FBx_CMD18 A2_BA0
2
1 2 +FBA_VREFD_L L14 VDD13 VSSQ20 C11 L14 VDD13 VSSQ20 C11

RV140 VDD14 VSSQ21 R11 VDD14 VSSQ21 R11 FBx_CMD19 A4_BA2
is
1
931_0402_1% RV141 VSSQ22 A12 VSSQ22 A12

1 CV179 VSSQ23 VSSQ23
RANKA@ 1.33K_0402_1% 820P_0402_25V7 C12 C12 FBx_CMD20 A5_BA1
1
D
RANKA@ RANKA@ VSSQ24 E12 VSSQ24 E12
2 QV26 VSSQ25 N12 VSSQ25 N12
[27] MEM_VREF 2 VSSQ26 VSSQ26
FBx_CMD21 WE#
G 2N7002W-T/R7_SOT323-3 R12 R12
2
RANKA@ 170-BALL VSSQ27 U12 170-BALL VSSQ27 U12

S FBx_CMD22 A7_A8
3
VSSQ28 H13 VSSQ28 H13

SGRAM GDDR5 VSSQ29 K13 SGRAM GDDR5 VSSQ29 K13
VSSQ30 VSSQ30 FBx_CMD23 A6_A11
A14 A14
VSSQ31 C14 VSSQ31 C14
VSSQ32 VSSQ32 FBx_CMD24 ABI#
E14 E14
kn
VSSQ33 N14 +1.35VS_VGA VSSQ33 N14

VSSQ34 UV4 SIDE VSSQ34 FBx_CMD25 A12_RFU
R14 R14
VSSQ35 U14 VSSQ35 U14
X76@ X76@ FBx_CMD27 A1_A9
10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
2 1 1 1 1 1 1 1
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
H5GC2H24BFR-T2C_BGA170 H5GC2H24BFR-T2C_BGA170 FBx_CMD28 RAS#
+1.35VS_VGA UV3 SIDE 1 2 2 2 2 2 2 2
RANKA@
RANKA@
RANKA@
RANKA@
RANKA@
RANKA@
RANKA@
RANKA@
FBx_CMD29 RST#
CV188
CV189
CV190
CV191
CV192
CV193
CV194
CV195
FBx_CMD30 CKE#
te
10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
2 1 1 1 1 1 1 1
FBx_CMD31 CAS#
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1 2 2 2 2 2 2 2
RANKA@
RANKA@
RANKA@
RANKA@
RANKA@
RANKA@
RANKA@
RANKA@
A A
CV180
CV181
CV182
CV183
CV184
CV185
CV186
CV187
w.

Issued Date 2015/02/26 Deciphered Date 2016/02/26 N16P-GX_VRAM A Lower
Custom
BY511/BY710 0.3
ww

5 4 3 2 1
5 4 3 2 1
Memory - Upper 32 bits

UV6 UV7
MF=0 MF=1 MF=1 MF=0 MF=0 MF=1 MF=1 MF=0
FBA_D39 FBA_D[32..39] [26] FBA_D56 FBA_D[56..63] [26]

A4 A4
FBA_EDC4 C2 DQ24 DQ0 A2 FBA_D38 FBA_EDC7 C2 DQ24 DQ0 A2 FBA_D58
[26] FBA_EDC4 EDC0 EDC3 DQ25 DQ1 FBA_D36 [26] FBA_EDC7 EDC0 EDC3 DQ25 DQ1 FBA_D57
C13 B4 C13 B4
FBA_EDC6 R13 EDC1 EDC2 DQ26 DQ2 B2 FBA_D37 FBA_EDC5 R13 EDC1 EDC2 DQ26 DQ2 B2 FBA_D59
[26] FBA_EDC6 EDC2 EDC1 DQ27 DQ3 FBA_D32 BYTE4 [26] FBA_EDC5 EDC2 EDC1 DQ27 DQ3 FBA_D60
R2 E4 R2 E4 BYTE7
EDC3 EDC0 DQ28 DQ4 E2 FBA_D35 EDC3 EDC0 DQ28 DQ4 E2 FBA_D61
PASS DQ29 DQ5 F4 FBA_D33 DQ29 DQ5 F4 FBA_D62
FBA_DBI4# D2 DQ30 DQ6 F2 FBA_D34 FBA_DBI7# D2 DQ30 DQ6 F2 FBA_D63
D13 A11 D13 A11
FBA_DBI6# P13 DBI1# DBI2# DQ16 DQ8 A13 FBA_DBI5# P13 DBI1# DBI2# DQ16 DQ8 A13
D
[26] FBA_DBI6#
P2 DBI2#
DBI3#
DBI1#
DBI0#
DQ17
DQ18
DQ9
DQ10
B11
B13
PASS [26] FBA_DBI5#
P2 DBI2#
DBI3#
DBI1#
DBI0#
DQ17
DQ18
DQ9
DQ10
B11
B13
PASS D
m
FBA_CLK1 J12 DQ19 DQ11 E11 FBA_CLK1 J12 DQ19 DQ11 E11
[26,31] FBA_CLK1 FBA_CLK1# CK DQ20 DQ12 [26,31] FBA_CLK1 FBA_CLK1# CK DQ20 DQ12
J11 E13 J11 E13
[26,31] FBA_CLK1# FBA_CKE_H CK# DQ21 DQ13 [26,31] FBA_CLK1# FBA_CKE_H CK# DQ21 DQ13
J3 F11 J3 F11
[26,31] FBA_CKE_H CKE# DQ22 DQ14 [26,31] FBA_CKE_H CKE# DQ22 DQ14
F13 F13
DQ23 DQ15 FBA_D48 FBA_D[48..55] [26] DQ23 DQ15 FBA_D40 FBA_D[40..47] [26]
U11 U11
FBA_MA2_BA0_H DQ8 DQ16 FBA_D49 FBA_MA4_BA2_H DQ8 DQ16 FBA_D41
co
H11 U13 H11 U13
[26,31] FBA_MA2_BA0_H FBA_MA5_BA1_H BA0/A2 BA2/A4 DQ9 DQ17 FBA_D50 [26,31] FBA_MA4_BA2_H FBA_MA3_BA3_H BA0/A2 BA2/A4 DQ9 DQ17 FBA_D42
K10 T11 [26,31] FBA_MA3_BA3_H K10 T11
[26,31] FBA_MA5_BA1_H FBA_MA4_BA2_H K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 FBA_D51 FBA_MA2_BA0_H K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 FBA_D43
[26,31] FBA_MA4_BA2_H FBA_MA3_BA3_H BA2/A4 BA0/A2 DQ11 DQ19 FBA_D52 [26,31] FBA_MA2_BA0_H FBA_MA5_BA1_H BA2/A4 BA0/A2 DQ11 DQ19 FBA_D44 BYTE5
H10 N11 BYTE6 H10 N11
[26,31] FBA_MA3_BA3_H BA3/A3 BA1/A5 DQ12 DQ20 FBA_D53 [26,31] FBA_MA5_BA1_H BA3/A3 BA1/A5 DQ12 DQ20 FBA_D45
N13 N13
DQ13 DQ21 M11 FBA_D54 DQ13 DQ21 M11 FBA_D46
FBA_MA7_MA8_H K4 DQ14 DQ22 M13 FBA_D55 FBA_MA0_MA10_H K4 DQ14 DQ22 M13 FBA_D47
[26,31] FBA_MA7_MA8_H FBA_MA1_MA9_H A8/A7 A10/A0 DQ15 DQ23 [26,31] FBA_MA0_MA10_H FBA_MA6_MA11_H A8/A7 A10/A0 DQ15 DQ23
H5 U4 H5 U4
H4 U2 H4 U2
K5 T4 [26,31] FBA_MA1_MA9_H
K5 T4
[26,31] FBA_MA6_MA11_H FBA_MA12_RFU_H A11/A6 A9/A1 DQ2 DQ26 FBA_MA12_RFU_H A11/A6 A9/A1 DQ2 DQ26
J5 T2 J5 T2
[26,31] FBA_MA12_RFU_H A12/RFU/NC DQ3 DQ27 [26,31] FBA_MA12_RFU_H A12/RFU/NC DQ3 DQ27
a.
Follow DG N4 +1.35VS_VGA 2 1 N4
2 1 A5 DQ4 DQ28 N2 RV142 A5 DQ4 DQ28 N2
RV143 U5 VPP/NC1 DQ5 DQ29 M4 1K_0402_1% RANKA@ U5 VPP/NC1 DQ5 DQ29 M4
FBA_CLK1 1 2 1K_0402_1% RANKA@ VPP/NC2 DQ6 DQ30 M2 2 1 VPP/NC2 DQ6 DQ30 M2
RV148 2 1 DQ7 DQ31 RV144 DQ7 DQ31
40.2_0402_1% RV145 J1 +1.35VS_VGA 1K_0402_1% RANKA@ J1 +1.35VS_VGA
@ 1K_0402_1% RANKA@ J10 MF J10 MF
1
2 1 J13 SEN B1 2 1 J13 SEN B1

RV149 RV147 ZQ VDDQ1 D1 RV146 ZQ VDDQ1 D1
80.6_0402_1% 121_0402_1% RANKA@ VDDQ2 F1 121_0402_1% RANKA@ VDDQ2 F1
RANKA@ FBA_ABI#_H J4 VDDQ3 M1 FBA_ABI#_H J4 VDDQ3 M1
[26,31] FBA_ABI#_H FBA_RAS#_H ABI# VDDQ4 [26,31] FBA_ABI#_H FBA_CAS#_H ABI# VDDQ4
si
G3 P1 G3 P1
[26,31] FBA_RAS#_H [26,31] FBA_CAS#_H
2
FBA_CLK1# 1 2 FBA_CS#_H G12 RAS# CAS# VDDQ5 T1 FBA_WE#_H G12 RAS# CAS# VDDQ5 T1
[26,31] FBA_CS#_H FBA_CAS#_H CS# WE# VDDQ6 [26,31] FBA_WE#_H FBA_RAS#_H CS# WE# VDDQ6
RV150 L3 G2 L3 G2
40.2_0402_1%
[26,31] FBA_CAS#_H FBA_WE#_H L12 CAS# RAS# VDDQ7 L2 [26,31] FBA_RAS#_H FBA_CS#_H L12 CAS# RAS# VDDQ7 L2 GDDR5
0.01U_0402_25V7K
1 [26,31] FBA_WE#_H WE# CS# VDDQ8 [26,31] FBA_CS#_H WE# CS# VDDQ8
@ B3 B3
VDDQ9
VDDQ10
D3 VDDQ9
VDDQ10
D3 Mode H - Mirror Mode Mapping
F3 F3
2 FBA_WCK2_N VDDQ11 FBA_WCK3_N VDDQ11
@
D5 H3 D5 H3
[26,31] FBA_WCK2_N FBA_WCK2 WCK01# WCK23# VDDQ12 [26,31] FBA_WCK3_N FBA_WCK3 WCK01# WCK23# VDDQ12
D4 K3 D4 K3
CV196
C [26,31] FBA_WCK2 WCK01 WCK23 VDDQ13 [26,31] FBA_WCK3 WCK01 WCK23 VDDQ13
DATA Bus C
M3 M3
FBA_WCK3_N P5 VDDQ14 P3 FBA_WCK2_N P5 VDDQ14 P3
[26,31] FBA_WCK3_N [26,31] FBA_WCK2_N Address 0..31 32..63
FBA_WCK3 P4 WCK23# WCK01# VDDQ15 T3 FBA_WCK2 P4 WCK23# WCK01# VDDQ15 T3
ne
PASS [26,31]
[31]
[31]
FBA_WCK3
+FBA_VREFD_H
+FBA_VREFC1
+FBA_VREFD_H
+FBA_VREFC1
A10
U10
J14
WCK23
VREFD1
VREFD2
VREFC
WCK01 VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
E5
N5
E10
N10
B12
D12
[26,31]
[31]
[31]
FBA_WCK2
+FBA_VREFD_H
+FBA_VREFC1
+FBA_VREFD_H
+FBA_VREFC1
A10
U10
J14
WCK23
VREFD1
VREFD2
VREFC
WCK01 VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
E5
N5
E10
N10
B12
D12
FBx_CMD0
FBx_CMD1
FBx_CMD2
CS#
A3_BA3
A2_BA0
VDDQ22 F12 VDDQ22 F12
VDDQ23 VDDQ23
FBx_CMD3 A4_BA2
H12 H12
FBA_RST#_H J2 VDDQ24 K12 FBA_RST#_H J2 VDDQ24 K12
[26,31] FBA_RST#_H RESET# VDDQ25 [26,31] FBA_RST#_H RESET# VDDQ25 FBx_CMD4 A5_BA1
M12 M12
VDDQ26 P12 VDDQ26 P12
do
VDDQ27 VDDQ27
FBx_CMD5 WE#
T12 T12
VDDQ28 G13 VDDQ28 G13
VDDQ29 VDDQ29
FBx_CMD6 A7_A8
H1 L13 H1 L13
+1.35VS_VGA K1 VSS1 VDDQ30 B14 K1 VSS1 VDDQ30 B14 FBx_CMD7 A6_A11
PASS B5
G5
VSS2
VSS3
VDDQ31
VDDQ32
D14
F14
B5
G5
VSS2
VSS3
VDDQ31
VDDQ32
D14
F14 FBx_CMD8 ABI#
1
L5 VSS4 VDDQ33 M14 L5 VSS4 VDDQ33 M14

RV151 T5 VSS5 VDDQ34 P14 T5 VSS5 VDDQ34 P14
VSS6 VDDQ35 VSS6 VDDQ35 FBx_CMD9 A12_RFU
549_0402_1% B10 T14 B10 T14
RANKA@ D10 VSS7 VDDQ36 D10 VSS7 VDDQ36
VSS8 VSS8
FBx_CMD10 A0_A10
G10 G10
in
2
1 2 +FBA_VREFC1 L10 VSS9 A1 L10 VSS9 A1

VSS10 VSSQ1 VSS10 VSSQ1
FBx_CMD11 A1_A9
RV152 16 mil P10 C1 P10 C1
1
931_0402_1% T10 VSS11 VSSQ2 E1 T10 VSS11 VSSQ2 E1

1 VSS12 VSSQ3 VSS12 VSSQ3
FBx_CMD12 RAS#
RANKA@ RV153 H14 N1 H14 N1
1.33K_0402_1% CV197 K14 VSS13 VSSQ4 R1 K14 VSS13 VSSQ4 R1
+1.35VS_VGA VSS14 VSSQ5 +1.35VS_VGA VSS14 VSSQ5
FBx_CMD13 RST#
RANKA@ 820P_0402_25V7 U1 U1
2 RANKA@ VSSQ6 H2 VSSQ6 H2 FBx_CMD14 CKE#
2
G1 VSSQ7 K2 G1 VSSQ7 K2
L1 VDD1 VSSQ8 A3 L1 VDD1 VSSQ8 A3
FBx_CMD15 CAS#
G4 C3 G4 C3
L4 VDD3 VSSQ10 E3 L4 VDD3 VSSQ10 E3 FBx_CMD16 CS#
i-
C5 VDD4 VSSQ11 N3 C5 VDD4 VSSQ11 N3
B VDD5 VSSQ12 VDD5 VSSQ12 B
R5 R3 R5 R3 FBx_CMD17 A3_BA3
Verify remove VrefD C10 VDD6 VSSQ13 U3 C10 VDD6 VSSQ13 U3
R10 VDD7 VSSQ14 C4 R10 VDD7 VSSQ14 C4
+1.35VS_VGA VDD8 VSSQ15 VDD8 VSSQ15
FBx_CMD18 A2_BA0
D11 R4 D11 R4
G11 VDD9 VSSQ16 F5 G11 VDD9 VSSQ16 F5
VDD10 VSSQ17 VDD10 VSSQ17 FBx_CMD19 A4_BA2
L11 M5 L11 M5
1
P11 VDD11 VSSQ18 F10 P11 VDD11 VSSQ18 F10

FBx_CMD20 A5_BA1
RV154 G14 M10 G14 M10
549_0402_1% L14 VDD13 VSSQ20 C11 L14 VDD13 VSSQ20 C11
FBx_CMD21 WE#
RANKA@ R11 R11
is VSSQ22 A12 VSSQ22 A12 FBx_CMD22 A7_A8
2
1 2 +FBA_VREFD_H VSSQ23 C12 VSSQ23 C12

RV155 VSSQ24 E12 VSSQ24 E12 FBx_CMD23 A6_A11
1
931_0402_1% VSSQ25 N12 +1.35VS_VGA VSSQ25 N12

VSSQ26 UV6 SIDE VSSQ26
RANKA@ RV156 1 CV198 R12 R12 FBx_CMD24 ABI#
1
D 1.33K_0402_1% 820P_0402_25V7 170-BALL VSSQ27 U12 170-BALL VSSQ27 U12

2 QV27 RANKA@ RANKA@ VSSQ28 H13 VSSQ28 H13
[27] MEM_VREF VSSQ29 VSSQ29 FBx_CMD25 A12_RFU
G 2N7002W-T/R7_SOT323-3 SGRAM GDDR5 K13 SGRAM GDDR5 K13
10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
2 1 1 1 1 1 1 1
2
RANKA@ 2 VSSQ30 A14 VSSQ30 A14 FBx_CMD26 A0_A10
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
S
3
VSSQ31 C14 VSSQ31 C14

VSSQ32 E14 VSSQ32 E14
RANKA@
RANKA@
RANKA@
RANKA@
FBx_CMD27 A1_A9
kn
VSSQ33 N14 1 2 2 2 2 2 2 2 VSSQ33 N14
RANKA@
RANKA@
RANKA@
RANKA@
VSSQ34 R14 VSSQ34 R14
CV207
CV208
CV209
CV210
CV211
CV212
CV213
CV214
VSSQ35 VSSQ35 FBx_CMD28 RAS#
U14 U14
VSSQ36 VSSQ36
FBx_CMD29 RST#
X76@ X76@
FBx_CMD30 CKE#
H5GC2H24BFR-T2C_BGA170 H5GC2H24BFR-T2C_BGA170
FBx_CMD31 CAS#
te
+1.35VS_VGA UV5 SIDE

10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
A 2 1 1 1 1 1 1 1 A
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
RANKA@
RANKA@
RANKA@
1 2 2 2 2 2 2 2
RANKA@
RANKA@
RANKA@
RANKA@
RANKA@
CV199
CV200
CV201
CV202
CV203
CV204
CV205
CV206
w.

Issued Date 2015/02/26 Deciphered Date 2016/02/26 N16P-GX_VRAM A Upper
Custom
BY511/BY710 0.3
ww

5 4 3 2 1
5 4 3 2 1
Memory Partition C - Lower 32 bits

UV8
MF=0 MF=1 MF=1 MF=0 UV9
A4 FBC_D2 FBC_D[0..7] [26] MF=0 MF=1 MF=1 MF=0

FBC_EDC0 C2 DQ24 DQ0 A2 FBC_D0
[26] FBC_EDC0 C13 EDC0 EDC3 DQ25 DQ1 B4 FBC_D1 A4 FBC_D24 FBC_D[24..31] [26]
FBC_EDC2 R13 EDC1 EDC2 DQ26 DQ2 B2 FBC_D3 FBC_EDC3 C2 DQ24 DQ0 A2 FBC_D25
[26] FBC_EDC2 R2 EDC2 EDC1 DQ27 DQ3 E4 FBC_D4 BYTE0 [26] FBC_EDC3 C13 EDC0 EDC3 DQ25 DQ1 B4 FBC_D26
EDC3 EDC0 DQ28 DQ4 E2 FBC_D5 FBC_EDC1 R13 EDC1 EDC2 DQ26 DQ2 B2 FBC_D27
DQ29 DQ5 F4 FBC_D6 [26] FBC_EDC1 R2 EDC2 EDC1 DQ27 DQ3 E4 FBC_D28 BYTE3
FBC_DBI0# D2 DQ30 DQ6 F2 FBC_D7 EDC3 EDC0 DQ28 DQ4 E2 FBC_D29
[26] FBC_DBI0# D13 DBI0# DBI3# DQ31 DQ7 A11 DQ29 DQ5 F4 FBC_D30
D D
m
FBC_DBI2# P13 DBI1# DBI2# DQ16 DQ8 A13 FBC_DBI3# D2 DQ30 DQ6 F2 FBC_D31
[26] FBC_DBI2# P2 DBI2# DBI1# DQ17 DQ9 B11 [26] FBC_DBI3# D13 DBI0# DBI3# DQ31 DQ7 A11
DBI3# DBI0# DQ18 DQ10 B13 FBC_DBI1# P13 DBI1# DBI2# DQ16 DQ8 A13
[26,32] FBC_CLK0
[26,32] FBC_CLK0#
FBC_CLK0
FBC_CLK0#
FBC_CKE_L
J12
J11 CK
CK#
DQ19
DQ20
DQ21
DQ11
DQ12
DQ13
E11
E13
PASS [26] FBC_DBI1#
FBC_CLK0
P2 DBI2#
DBI3#
DBI1#
DBI0#
DQ17
DQ18
DQ19
DQ9
DQ10
DQ11
B11
B13
PASS
co
J3 F11 J12 E11
[26,32] FBC_CKE_L CKE# DQ22 DQ14 F13 [26,32] FBC_CLK0 FBC_CLK0# J11 CK DQ20 DQ12 E13
DQ23 DQ15 U11 FBC_D21 FBC_D[16..23] [26] [26,32] FBC_CLK0# FBC_CKE_L J3 CK# DQ21 DQ13 F11
FBC_MA2_BA0_L H11 DQ8 DQ16 U13 FBC_D22 [26,32] FBC_CKE_L CKE# DQ22 DQ14 F13
[26,32] FBC_MA2_BA0_L FBC_MA5_BA1_L K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 FBC_D16 DQ23 DQ15 U11 FBC_D8 FBC_D[8..15] [26]
[26,32] FBC_MA5_BA1_L FBC_MA4_BA2_L K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 FBC_D20 FBC_MA4_BA2_L H11 DQ8 DQ16 U13 FBC_D12
[26,32] FBC_MA4_BA2_L FBC_MA3_BA3_L H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 FBC_D23 [26,32] FBC_MA4_BA2_L FBC_MA3_BA3_L K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 FBC_D9
[26,32] FBC_MA3_BA3_L BA3/A3 BA1/A5 DQ12 DQ20 N13 FBC_D19 BYTE2 [26,32] FBC_MA3_BA3_L FBC_MA2_BA0_L K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 FBC_D10
DQ13 DQ21 M11 FBC_D17 [26,32] FBC_MA2_BA0_L FBC_MA5_BA1_L H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 FBC_D11
FBC_MA7_MA8_L K4 DQ14 DQ22 M13 FBC_D18 [26,32] FBC_MA5_BA1_L BA3/A3 BA1/A5 DQ12 DQ20 N13 FBC_D13 BYTE1
[26,32] FBC_MA7_MA8_L FBC_MA1_MA9_L H5 A8/A7 A10/A0 DQ15 DQ23 U4 DQ13 DQ21 M11 FBC_D14
Follow DG
a.
[26,32] FBC_MA1_MA9_L FBC_MA0_MA10_L H4 A9/A1 A11/A6 DQ0 DQ24 U2 FBC_MA0_MA10_L K4 DQ14 DQ22 M13 FBC_D15
[26,32] FBC_MA0_MA10_L FBC_MA6_MA11_L K5 A10/A0 A8/A7 DQ1 DQ25 T4 [26,32] FBC_MA0_MA10_L FBC_MA6_MA11_L H5 A8/A7 A10/A0 DQ15 DQ23 U4
FBC_CLK0 1 2 [26,32] FBC_MA6_MA11_L FBC_MA12_RFU_L J5 A11/A6 A9/A1 DQ2 DQ26 T2 [26,32] FBC_MA6_MA11_L FBC_MA7_MA8_L H4 A9/A1 A11/A6 DQ0 DQ24 U2
[26,32] FBC_MA12_RFU_L A12/RFU/NC DQ3 DQ27 [26,32] FBC_MA7_MA8_L FBC_MA1_MA9_L A10/A0 A8/A7 DQ1 DQ25
RV163 N4 K5 T4
40.2_0402_1% 2 1 A5 DQ4 DQ28 N2 [26,32] FBC_MA1_MA9_L FBC_MA12_RFU_L J5 A11/A6 A9/A1 DQ2 DQ26 T2
VPP/NC1 DQ5 DQ29 [26,32] FBC_MA12_RFU_L A12/RFU/NC DQ3 DQ27
@ RV157 RANKB@ U5 M4 2 1 N4
VPP/NC2 DQ6 DQ30 +1.35VS_VGA DQ4 DQ28
1
1K_0402_1% M2 RV158 RANKB@ A5 N2

RV164 2 1 DQ7 DQ31 1K_0402_1% U5 VPP/NC1 DQ5 DQ29 M4
80.6_0402_1% RV159 RANKB@ J1 +1.35VS_VGA 2 1 VPP/NC2 DQ6 DQ30 M2
RANKB@ 1K_0402_1% J10 MF RV160 RANKB@ DQ7 DQ31
2 1 J13 SEN B1 J1 +1.35VS_VGA
si
1K_0402_1%
2
RV161 RANKB@ ZQ VDDQ1 D1 J10 MF

121_0402_1% VDDQ2 F1 2 1 J13 SEN B1
FBC_CLK0# 1 2 FBC_ABI#_L J4 VDDQ3 M1 RV162 RANKB@ ZQ VDDQ1 D1
[26,32] FBC_ABI#_L FBC_RAS#_L G3 ABI# VDDQ4 P1 VDDQ2 F1
RV165 121_0402_1%
40.2_0402_1% [26,32] FBC_RAS#_L FBC_CS#_L G12 RAS# CAS# VDDQ5 T1 FBC_ABI#_L J4 VDDQ3 M1
1 [26,32] FBC_CS#_L FBC_CAS#_L CS# WE# VDDQ6 [26,32] FBC_ABI#_L FBC_CAS#_L ABI# VDDQ4
0.01U_0402_25V7K
@ L3 G2 G3 P1
[26,32] FBC_CAS#_L FBC_WE#_L L12 CAS# RAS# VDDQ7 L2 [26,32] FBC_CAS#_L FBC_WE#_L G12 RAS# CAS# VDDQ5 T1
[26,32] FBC_WE#_L WE# CS# VDDQ8 [26,32] FBC_WE#_L FBC_RAS#_L CS# WE# VDDQ6
B3 L3 G2
2 VDDQ9 D3 [26,32] FBC_RAS#_L FBC_CS#_L L12 CAS# RAS# VDDQ7 L2
VDDQ10 [26,32] FBC_CS#_L WE# CS# VDDQ8
@
F3 B3
C
GDDR5 C
ne
FBC_WCK0_N VDDQ11 VDDQ9
CV215
D5 H3 D3
PASS [26,32]
[26,32]
[26,32]
[26,32]
FBC_WCK0_N
FBC_WCK0
FBC_WCK1_N
FBC_WCK1
FBC_WCK0
FBC_WCK1_N
FBC_WCK1
+FBC_VREFD_L
D4
P5
P4
WCK01#
WCK01
WCK23#
WCK23
WCK23#
WCK23
WCK01#
WCK01
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
K3
M3
P3
T3
E5
N5
[26,32]
[26,32]
[26,32]
[26,32]
FBC_WCK1_N
FBC_WCK1
FBC_WCK0_N
FBC_WCK0
FBC_WCK1_N
FBC_WCK1
FBC_WCK0_N
FBC_WCK0
D5
D4
P5
P4
WCK01#
WCK01
WCK23#
WCK23
WCK23#
WCK23
WCK01#
WCK01
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
F3
H3
K3
M3
P3
T3
Mode H - Mirror Mode Mapping
DATA Bus
A10 E10 E5 Address 0..31 32..63
[32] +FBC_VREFD_L U10 VREFD1 VDDQ19 N10 VDDQ17 N5
+FBC_VREFC0 J14 VREFD2 VDDQ20 B12 +FBC_VREFD_L A10 VDDQ18 E10
[32] +FBC_VREFC0 VREFC VDDQ21 [32] +FBC_VREFD_L VREFD1 VDDQ19 FBx_CMD0 CS#
D12 U10 N10
do
VDDQ22 F12 +FBC_VREFC0 J14 VREFD2 VDDQ20 B12
VDDQ23 [32] +FBC_VREFC0 VREFC VDDQ21 FBx_CMD1 A3_BA3
H12 D12
FBC_RST#_L J2 VDDQ24 K12 VDDQ22 F12
[26,32] FBC_RST#_L RESET# VDDQ25 VDDQ23 FBx_CMD2 A2_BA0
M12 H12
VDDQ26 P12 FBC_RST#_L J2 VDDQ24 K12
+1.35VS_VGA VDDQ27 [26,32] FBC_RST#_L RESET# VDDQ25 FBx_CMD3 A4_BA2
T12 M12
VDDQ28 G13 VDDQ26 P12
VDDQ29 VDDQ27 FBx_CMD4 A5_BA1
H1 L13 T12
K1 VSS1 VDDQ30 B14 VDDQ28 G13 FBx_CMD5 WE#
PASS VSS2 VDDQ31 VDDQ29

1
B5 D14 H1 L13
in
RV166 G5 F14 K1 B14 FBx_CMD6 A7_A8
549_0402_1% L5 VSS4 VDDQ33 M14 B5 VSS2 VDDQ31 D14
T5 VSS5 VDDQ34 P14 G5 VSS3 VDDQ32 F14
RANKB@
VSS6 VDDQ35 VSS4 VDDQ33 FBx_CMD7 A6_A11
B10 T14 L5 M14
2
1 2 +FBC_VREFC0 D10 VSS7 VDDQ36 T5 VSS5 VDDQ34 P14

VSS8 VSS6 VDDQ35 FBx_CMD8 ABI#
RV167 G10 B10 T14
VSS9 VSS7 VDDQ36
1
931_0402_1% 1 L10 A1 D10 FBx_CMD9 A12_RFU

RANKB@ RV168 CV216 P10 VSS10 VSSQ1 C1 G10 VSS8
T10 VSS11 VSSQ2 E1 L10 VSS9 A1
1.33K_0402_1% 820P_0402_25V7
VSS12 VSSQ3 VSS10 VSSQ1 FBx_CMD10 A0_A10
RANKB@ RANKB@ H14 N1 P10 C1
2 K14 VSS13 VSSQ4 R1 T10 VSS11 VSSQ2 E1 FBx_CMD11 A1_A9
i-
2
+1.35VS_VGA VSS14 VSSQ5 U1 H14 VSS12 VSSQ3 N1

VSSQ6 H2 K14 VSS13 VSSQ4 R1
VSSQ7 +1.35VS_VGA VSS14 VSSQ5 FBx_CMD12 RAS#
G1 K2 U1
L1 VDD1 VSSQ8 A3 VSSQ6 H2
VDD2 VSSQ9 VSSQ7 FBx_CMD13 RST#
B
G4 C3 G1 K2 B
L4 VDD3 VSSQ10 E3 L1 VDD1 VSSQ8 A3
Verify remove VrefD +1.35VS_VGA VDD4 VSSQ11 VDD2 VSSQ9 FBx_CMD14 CKE#
C5 N3 G4 C3
R5 VDD5 VSSQ12 R3 L4 VDD3 VSSQ10 E3
VDD6 VSSQ13 VDD4 VSSQ11 FBx_CMD15 CAS#
C10 U3 C5 N3
R10 VDD7 VSSQ14 C4 R5 VDD5 VSSQ12 R3
VDD8 VSSQ15 VDD6 VSSQ13 FBx_CMD16 CS#
1
D11 R4 C10 U3
RV169
549_0402_1%
G11
L11
VDD9
VDD10
VDD11
is VSSQ16
VSSQ17
VSSQ18
F5
M5
R10
D11
VDD7
VDD8
VDD9
VSSQ14
VSSQ15
VSSQ16
C4
R4
FBx_CMD17 A3_BA3
RANKB@ P11 F10 G11 F5 FBx_CMD18 A2_BA0
G14 VDD12 VSSQ19 M10 L11 VDD10 VSSQ17 M5
2
L14 VDD13 VSSQ20 C11 P11 VDD11 VSSQ18 F10

+FBC_VREFD_L VDD14 VSSQ21 VDD12 VSSQ19 FBx_CMD19 A4_BA2
1 2 R11 G14 M10
VSSQ22 A12 L14 VDD13 VSSQ20 C11
RV170
VSSQ23 VDD14 VSSQ21 FBx_CMD20 A5_BA1
1
931_0402_1% 1 C12 R11

VSSQ24 E12 VSSQ22 A12
RANKB@ RV171 CV217
VSSQ25 VSSQ23 FBx_CMD21 WE#
1.33K_0402_1% 820P_0402_25V7 N12 C12
VSSQ26 VSSQ24
kn
RANKB@ RANKB@ R12 E12 FBx_CMD22 A7_A8

VSSQ27 VSSQ25
1
D 2 U12 N12
170-BALL +1.35VS_VGA UV8 SIDE
2
2 VSSQ28 H13 VSSQ26 R12

[27] MEM_VREF
QV28
G 2N7002W-T/R7_SOT323-3 SGRAM GDDR5 K13 170-BALL U12
VSSQ30 A14 VSSQ28 H13
S RANKB@ FBx_CMD24 ABI#
3
VSSQ31 VSSQ29
10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
C14 2 1 1 1 1 1 1 1 SGRAM GDDR5 K13
VSSQ32 VSSQ30
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
E14 A14 FBx_CMD25 A12_RFU
VSSQ33 N14 VSSQ31 C14
VSSQ34 VSSQ32
RANKB@
RANKB@
RANKB@
RANKB@
RANKB@
R14 E14 FBx_CMD26 A0_A10
VSSQ35 1 2 2 2 2 2 2 2 VSSQ33
RANKB@
RANKB@
RANKB@
U14 N14
VSSQ36 VSSQ34
CV218
CV219
CV220
CV221
CV222
CV223
CV224
CV225
R14 FBx_CMD27 A1_A9
te
X76@ VSSQ35 U14

VSSQ36
FBx_CMD28 RAS#
H5GC2H24BFR-T2C_BGA170 X76@
FBx_CMD29 RST#
H5GC2H24BFR-T2C_BGA170
+1.35VS_VGA UV7 SIDE FBx_CMD30 CKE#
FBx_CMD31 CAS#
10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
A 2 1 1 1 1 1 1 1 A
w.
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
RANKB@
RANKB@
RANKB@
RANKB@
1 2 2 2 2 2 2 2
RANKB@
RANKB@
RANKB@
RANKB@
CV226
CV227
CV228
CV229
CV230
CV231
CV232
CV233

ww
Issued Date 2015/02/26 Deciphered Date 2016/02/26 N16P-GX_VRAM C Lower

Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
Memory Partition C - Upper 32 bits

UV10
MF=0 MF=1 MF=1 MF=0 UV11
A4 FBC_D32 FBC_D[32..39] [26] MF=0 MF=1 MF=1 MF=0

FBC_EDC4 C2 DQ24 DQ0 A2 FBC_D33
[26] FBC_EDC4 C13 EDC0 EDC3 DQ25 DQ1 B4 FBC_D34 A4 FBC_D60 FBC_D[56..63] [26]
FBC_EDC6 R13 EDC1 EDC2 DQ26 DQ2 B2 FBC_D35 FBC_EDC7 C2 DQ24 DQ0 A2 FBC_D57
[26] FBC_EDC6 R2 EDC2 EDC1 DQ27 DQ3 E4 FBC_D36 BYTE4 [26] FBC_EDC7 C13 EDC0 EDC3 DQ25 DQ1 B4 FBC_D61
EDC3 EDC0 DQ28 DQ4 E2 FBC_D37 FBC_EDC5 R13 EDC1 EDC2 DQ26 DQ2 B2 FBC_D58
DQ29 DQ5 F4 FBC_D38 [26] FBC_EDC5 R2 EDC2 EDC1 DQ27 DQ3 E4 FBC_D63
FBC_DBI4# D2 DQ30 DQ6 F2 FBC_D39 EDC3 EDC0 DQ28 DQ4 E2 FBC_D56 BYTE7
PASS [26] FBC_DBI4# DBI0# DBI3# DQ31 DQ7 DQ29 DQ5
D13 A11 F4 FBC_D62
D
FBC_DBI6# P13 DBI1# DBI2# DQ16 DQ8 A13 PASS PASS FBC_DBI7# D2 DQ30 DQ6 F2 FBC_D59
D
m
[26] FBC_DBI6# P2 DBI2# DBI1# DQ17 DQ9 B11 [26] FBC_DBI7# D13 DBI0# DBI3# DQ31 DQ7 A11
DBI3# DBI0# DQ18 DQ10 B13 FBC_DBI5# P13 DBI1# DBI2# DQ16 DQ8 A13
FBC_CLK1 J12 DQ19 DQ11 E11 [26] FBC_DBI5# P2 DBI2# DBI1# DQ17 DQ9 B11
[26,33]
[26,33]
[26,33]
FBC_CLK1
FBC_CLK1#
FBC_CKE_H
FBC_CLK1#
FBC_CKE_H
J11
J3
CK
CK#
CKE#
DQ20
DQ21
DQ22
DQ12
DQ13
DQ14
E13
F11
[26,33] FBC_CLK1
FBC_CLK1
FBC_CLK1#
J12
DBI3#
CK
DBI0# DQ18
DQ19
DQ20
DQ10
DQ11
DQ12
B13
E11
PASS
co
F13 J11 E13
DQ23 DQ15 U11 FBC_D52 FBC_D[48..55] [26] [26,33] FBC_CLK1# FBC_CKE_H J3 CK# DQ21 DQ13 F11
FBC_MA2_BA0_H H11 DQ8 DQ16 U13 FBC_D55 [26,33] FBC_CKE_H CKE# DQ22 DQ14 F13
[26,33] FBC_MA2_BA0_H FBC_MA5_BA1_H K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 FBC_D54 DQ23 DQ15 U11 FBC_D46 FBC_D[40..47] [26]
[26,33] FBC_MA5_BA1_H FBC_MA4_BA2_H K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 FBC_D53 FBC_MA4_BA2_H H11 DQ8 DQ16 U13 FBC_D44
Follow DG [26,33] FBC_MA4_BA2_H FBC_MA3_BA3_H H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 FBC_D50 [26,33] FBC_MA4_BA2_H FBC_MA3_BA3_H K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 FBC_D47
[26,33] FBC_MA3_BA3_H BA3/A3 BA1/A5 DQ12 DQ20 N13 FBC_D49 BYTE6 [26,33] FBC_MA3_BA3_H FBC_MA2_BA0_H K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 FBC_D45
FBC_CLK1 1 2 DQ13 DQ21 M11 FBC_D51 [26,33] FBC_MA2_BA0_H FBC_MA5_BA1_H H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 FBC_D40
FBC_MA7_MA8_H K4 DQ14 DQ22 M13 FBC_D48 [26,33] FBC_MA5_BA1_H BA3/A3 BA1/A5 DQ12 DQ20 N13 FBC_D43 BYTE5
RV178
40.2_0402_1% [26,33] FBC_MA7_MA8_H FBC_MA1_MA9_H H5 A8/A7 A10/A0 DQ15 DQ23 U4 DQ13 DQ21 M11 FBC_D42
@ [26,33] FBC_MA1_MA9_H FBC_MA0_MA10_H H4 A9/A1 A11/A6 DQ0 DQ24 U2 FBC_MA0_MA10_H K4 DQ14 DQ22 M13 FBC_D41
a.
A10/A0 A8/A7 DQ1 DQ25 A8/A7 A10/A0 DQ15 DQ23
1
[26,33] FBC_MA0_MA10_H FBC_MA6_MA11_H K5 T4 [26,33] FBC_MA0_MA10_H FBC_MA6_MA11_H H5 U4

RV179 [26,33] FBC_MA6_MA11_H FBC_MA12_RFU_H J5 A11/A6 A9/A1 DQ2 DQ26 T2 [26,33] FBC_MA6_MA11_H FBC_MA7_MA8_H H4 A9/A1 A11/A6 DQ0 DQ24 U2
80.6_0402_1% [26,33] FBC_MA12_RFU_H 2 1 A12/RFU/NC DQ3 DQ27 N4 [26,33] FBC_MA7_MA8_H FBC_MA1_MA9_H K5 A10/A0 A8/A7 DQ1 DQ25 T4
RANKB@ RV172 RANKB@ A5 DQ4 DQ28 N2 [26,33] FBC_MA1_MA9_H FBC_MA12_RFU_H J5 A11/A6 A9/A1 DQ2 DQ26 T2
1K_0402_1% U5 VPP/NC1 DQ5 DQ29 M4 [26,33] FBC_MA12_RFU_H A12/RFU/NC DQ3 DQ27 N4
2
2 1 VPP/NC2 DQ6 DQ30 M2 2 1 A5 DQ4 DQ28 N2

DQ7 DQ31 +1.35VS_VGA VPP/NC1 DQ5 DQ29
RV174 RANKB@ RV173 RANKB@ U5 M4
FBC_CLK1# 1 2 1K_0402_1% J1 +1.35VS_VGA 1K_0402_1% VPP/NC2 DQ6 DQ30 M2
RV180 J10 MF 2 1 DQ7 DQ31
SEN +1.35VS_VGA
0.01U_0402_25V7K
40.2_0402_1% 1 2 1 J13 B1 RV176 RANKB@ J1

ZQ VDDQ1 D1 J10 MF
si
@ RV175 RANKB@ 1K_0402_1%
121_0402_1% VDDQ2 F1 2 1 J13 SEN B1
FBC_ABI#_H J4 VDDQ3 M1 RV177 RANKB@ ZQ VDDQ1 D1
2 [26,33] FBC_ABI#_H FBC_RAS#_H ABI# VDDQ4 VDDQ2
@
G3 P1 PASS 121_0402_1% F1
[26,33] FBC_RAS#_H FBC_CS#_H RAS# CAS# VDDQ5 FBC_ABI#_H VDDQ3
CV234
G12 T1 J4 M1
[26,33] FBC_CS#_H FBC_CAS#_H L3 CS# WE# VDDQ6 G2 [26,33] FBC_ABI#_H FBC_CAS#_H G3 ABI# VDDQ4 P1
C
PASS [26,33]
[26,33]
[26,33]
FBC_CAS#_H
FBC_WE#_H
FBC_WCK2_N
FBC_WE#_H
FBC_WCK2_N
L12
D5
CAS#
WE#
RAS#
CS#
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
L2
B3
D3
F3
H3
[26,33]
[26,33]
[26,33]
[26,33]
FBC_CAS#_H
FBC_WE#_H
FBC_RAS#_H
FBC_CS#_H
FBC_WE#_H
FBC_RAS#_H
FBC_CS#_H
G12
L3
L12
RAS#
CS#
CAS#
WE#
CAS#
WE#
RAS#
CS#
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
T1
G2
L2
B3
D3
GDDR5
Mode H - Mirror Mode Mapping C
ne
FBC_WCK2 D4 WCK01# WCK23# VDDQ12 K3 VDDQ10 F3
[26,33] FBC_WCK2 WCK01 WCK23 VDDQ13 M3 FBC_WCK3_N D5 VDDQ11 H3
FBC_WCK3_N P5 VDDQ14 P3 [26,33] FBC_WCK3_N FBC_WCK3 D4 WCK01# WCK23# VDDQ12 K3
[26,33] FBC_WCK3_N FBC_WCK3 WCK23# WCK01# VDDQ15 [26,33] FBC_WCK3 WCK01 WCK23 VDDQ13 DATA Bus
P4 T3 M3
[26,33] FBC_WCK3 WCK23 WCK01 VDDQ16 E5 FBC_WCK2_N P5 VDDQ14 P3
VDDQ17 [26,33] FBC_WCK2_N WCK23# WCK01# VDDQ15
Address 0..31 32..63
N5 FBC_WCK2 P4 T3
+FBC_VREFD_H A10 VDDQ18 E10 [26,33] FBC_WCK2 WCK23 WCK01 VDDQ16 E5
[33] +FBC_VREFD_H VREFD1 VDDQ19 VDDQ17 FBx_CMD0 CS#
U10 N10 N5
+FBC_VREFC1 J14 VREFD2 VDDQ20 B12 +FBC_VREFD_H A10 VDDQ18 E10
[33] +FBC_VREFC1 VREFC VDDQ21 [33] +FBC_VREFD_H VREFD1 VDDQ19 FBx_CMD1 A3_BA3
D12 U10 N10
VDDQ22 F12 +FBC_VREFC1 J14 VREFD2 VDDQ20 B12 FBx_CMD2 A2_BA0
do
VDDQ23 H12 [33] +FBC_VREFC1 VREFC VDDQ21 D12
FBC_RST#_H J2 VDDQ24 K12 VDDQ22 F12
[26,33] FBC_RST#_H RESET# VDDQ25 VDDQ23 FBx_CMD3 A4_BA2
PASS M12 H12
VDDQ26 P12 FBC_RST#_H J2 VDDQ24 K12
VDDQ27 [26,33] FBC_RST#_H RESET# VDDQ25 FBx_CMD4 A5_BA1
T12 M12
+1.35VS_VGA VDDQ28 G13 VDDQ26 P12
VDDQ29 VDDQ27 FBx_CMD5 WE#
H1 L13 T12
K1 VSS1 VDDQ30 B14 VDDQ28 G13 FBx_CMD6 A7_A8
PASS VSS2 VDDQ31 VDDQ29

1
B5 D14 H1 L13
G5 VSS3 VDDQ32 F14 K1 VSS1 VDDQ30 B14
RV181
VSS4 VDDQ33 VSS2 VDDQ31 FBx_CMD7 A6_A11
in
549_0402_1% L5 M14 B5 D14
T5 VSS5 VDDQ34 P14 G5 VSS3 VDDQ32 F14
RANKB@
VSS6 VDDQ35 VSS4 VDDQ33 FBx_CMD8 ABI#
B10 T14 L5 M14
2
1 2 +FBC_VREFC1 D10 VSS7 VDDQ36 T5 VSS5 VDDQ34 P14

VSS8 VSS6 VDDQ35 FBx_CMD9 A12_RFU
RV182 G10 B10 T14
VSS9 VSS7 VDDQ36
1
931_0402_1% 1 L10 A1 D10 FBx_CMD10 A0_A10

RANKB@ RV183 CV235 P10 VSS10 VSSQ1 C1 G10 VSS8
T10 VSS11 VSSQ2 E1 L10 VSS9 A1
1.33K_0402_1% 820P_0402_25V7
VSS12 VSSQ3 VSS10 VSSQ1 FBx_CMD11 A1_A9
RANKB@ RANKB@ H14 N1 P10 C1
2 K14 VSS13 VSSQ4 R1 T10 VSS11 VSSQ2 E1 FBx_CMD12 RAS#
2
+1.35VS_VGA VSS14 VSSQ5 U1 H14 VSS12 VSSQ3 N1
i-
VSSQ6 H2 K14 VSS13 VSSQ4 R1
VSSQ7 +1.35VS_VGA VSS14 VSSQ5 FBx_CMD13 RST#
G1 K2 U1
L1 VDD1 VSSQ8 A3 VSSQ6 H2
VDD2 VSSQ9 VSSQ7 FBx_CMD14 CKE#
G4 C3 G1 K2
B
Verify remove VrefD L4 VDD3 VSSQ10 E3 L1 VDD1 VSSQ8 A3 FBx_CMD15 CAS# B
+1.35VS_VGA C5 VDD4 VSSQ11 N3 G4 VDD2 VSSQ9 C3
R5 VDD5 VSSQ12 R3 L4 VDD3 VSSQ10 E3
VDD6 VSSQ13 VDD4 VSSQ11 FBx_CMD16 CS#
C10 U3 C5 N3
R10 VDD7 VSSQ14 C4 R5 VDD5 VSSQ12 R3
1
D11 R4 C10 U3
G11 VDD9 VSSQ16 F5 R10 VDD7 VSSQ14 C4
RV184
549_0402_1%
RANKB@
L11
P11
VDD10
VDD11
VDD12
is VSSQ17
VSSQ18
VSSQ19
M5
F10
D11
G11
VDD8
VDD9
VDD10
VSSQ15
VSSQ16
VSSQ17
R4
F5
FBx_CMD18
FBx_CMD19
A2_BA0
A4_BA2
G14 M10 L11 M5
2
1 2 +FBC_VREFD_H L14 VDD13 VSSQ20 C11 P11 VDD11 VSSQ18 F10

RV185 R11 G14 M10
VSSQ22 VDD13 VSSQ20
1
931_0402_1% 1 A12 L14 C11 FBx_CMD21 WE#

RANKB@ RV186 CV236 VSSQ23 C12 VDD14 VSSQ21 R11
VSSQ24 E12 VSSQ22 A12
1.33K_0402_1% 820P_0402_25V7
RANKB@ RANKB@ N12 C12
VSSQ26 VSSQ24
1
D 2 R12 E12 FBx_CMD23 A6_A11

2
VSSQ27 VSSQ25
kn
2 QV29 170-BALL U12 N12
[27] MEM_VREF VSSQ28 H13 VSSQ26 R12
G 2N7002W-T/R7_SOT323-3
VSSQ29
+1.35VS_VGA UV10 SIDE VSSQ27 FBx_CMD24 ABI#
S RANKB@ SGRAM GDDR5 K13 170-BALL U12
3
VSSQ30 A14 VSSQ28 H13

VSSQ31 VSSQ29 FBx_CMD25 A12_RFU
C14 SGRAM GDDR5 K13
VSSQ32 10U_0603_6.3V6M VSSQ30
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
E14 2 1 1 1 1 1 1 1 A14 FBx_CMD26 A0_A10
VSSQ33 VSSQ31
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
N14 C14
VSSQ34 R14 VSSQ32 E14
RANKB@
RANKB@
RANKB@
U14 N14
VSSQ36 1 2 2 2 2 2 2 2 VSSQ34
RANKB@
RANKB@
RANKB@
RANKB@
RANKB@
R14 FBx_CMD28 RAS#
VSSQ35
CV238
CV239
CV240
CV241
CV242
CV243
CV244
CV245
X76@ U14
te
VSSQ36
FBx_CMD29 RST#
H5GC2H24BFR-T2C_BGA170 X76@
FBx_CMD30 CKE#
H5GC2H24BFR-T2C_BGA170
+1.35VS_VGA UV9 SIDE FBx_CMD31 CAS#
10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
2 1 1 1 1 1 1 1
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
1U_0603_25V6
A A
w.
RANKB@
1 2 2 2 2 2 2 2
RANKB@
RANKB@
RANKB@
RANKB@
RANKB@
RANKB@
RANKB@
CV237
CV246
CV247
CV248
CV249
CV250
CV251
CV252

ww
Issued Date 2015/02/26 Deciphered Date 2016/02/26 N16P-GX_VRAM C Upper

Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
LCD POWER CIRCUIT

B+ +LED_VDD
W=60mils
+LCD_VDD 2A 80 mil R17 0_0805_5% 2A 80 mil
2 1
4.7U_0805_25V6K
0.1U_0402_25V6
+3VS 1 1
C15
U9 AO3401A_SOT23-3
C14
W=60mils 0_0603_5% 2 R22
CD@
1 1 5 2 2
OUT IN
D
Q33 3 1 @
EMI Request
.1U_0402_10V6-K
2
4.7U_0603_6.3V6K
C7
C8
m
GND
1 1
G
D 2 1 3 4 EMC@ D
2
R9977
OC EN
R179 1 @ 2 LEDVDD_EN#
0_0402_5% B+
co
2 2 G524B1T11U_SOT23-5 100K_0402_5%
@
1
R180
CD@
For Battery Life test 100K_0402_5%
@
1 2
R6 1 2 0_0402_5% Q34 D
[14] PCH_EDP_ENVDD PCH_EDP_ENVDD R181 1 2 2
a.
@
0_0402_5% G
C23
.1U_0402_10V6-K
CD@
1 1
R7 C132 @ S
3
100K_0402_5% .1U_0402_10V6-K 2N7002KW_SOT323-3
@
2 2
si
Reserve for power consumption test
JEDP1
+3VS 1
CPU_EDP_TX3- C910 1 2 .1U_0402_10V6-K EDP_TX3- 21
[8] CPU_EDP_TX3- CPU_EDP_TX3+ EDP_TX3+ 2
C909 1 2 .1U_0402_10V6-K 3
[8] CPU_EDP_TX3+
EMI request 3
2
4
R10 CPU_EDP_TX2- C25 1 2 .1U_0402_10V6-K EDP_TX2- 54
4.7K_0402_5% DMIC_CLK DISPOFF# INVT_PWM C911 1 2 .1U_0402_10V6-K 6
[8] CPU_EDP_TX2+ 6
@ 7
470P_0402_50V7K
ne
CPU_EDP_TX1- EDP_TX1- 7
180P_0402_50V8-J
C18 1 2 .1U_0402_10V6-K 8
470P_0402_50V7K
C12
C13
C11
[8] CPU_EDP_TX1-
1
CPU_EDP_TX1+ C17 1 2 .1U_0402_10V6-K EDP_TX1+ 98

1 1 1 [8] CPU_EDP_TX1+ 9
R9733 1 2 0_0402_5% ENBKL 10
EMC_NS@
[14] PCH_EDP_ENBKL ENBKL [44] CPU_EDP_TX0- C16 1 2 .1U_0402_10V6-K EDP_TX0- 1110
EMC_NS@
C C19 1 2 .1U_0402_10V6-K 12 C
R12 1 2 0_0402_5% DISPOFF# [8] CPU_EDP_TX0+ 12
[44] BKOFF# 2 2 2 13
CPU_EDP_AUX C20 1 2 .1U_0402_10V6-K EDP_AUX 1413
[8] CPU_EDP_AUX CPU_EDP_AUX# EDP_AUX# 14
C21 1 2 .1U_0402_10V6-K 15
[8] CPU_EDP_AUX# 15
16
do
1716
17
20150729 +LCD_VDD W=60mils 18
18
19
1. Change C11 from 150P to 180P PCH_EDP_HPD 2019
Connect +LCD_VDD to JEDP1 pin 17 for LCD power 2120
20150706 2221
DISPOFF# 2322
+3VS 2423
+LED_VDD 24
25
in
2625 31
2
INVT_PWM 2726 G1 32
R18 2827 G2 33
1K_0402_5% PCH_EDP_HPD 2928 G3 34
@ PCH_EDP_HPD [15] 3029 G4 35
30 G5
1
CVILU_CVS3302M1R0-NH
2 0_0402_5% INVT_PWM
1
R19 1 ME@
[14] PCH_EDP_PWM
i-
R57
1
100K_0402_5%
R20
2
100K_0402_5%
2
is +3VS
B 1 2 B
R10018 0_0603_5%
1
20150727_Add C10019
by EMC suggestion CMOS Camera
R9951
100K_0402_5%
Touch Screen
kn
C10019 close to JCCD JCCD
2
D22 2 1 RB751V-40_SOD323-2 TS@
C8407
LID_SW# [45]
C8408
.1U_0402_10V6-K
1 2
.1U_0402_10V6-K
3 1 2 4 TS_RS 10K_0402_5% 1 @ 2 R2084
[43,45] DMIC_CLK DMIC_DATA_R 3 4 PCH_TS_ON# [20]
[43,45] DMIC_DATA R9735 1 2 0_0402_5% 5 6
7 5 6 8
1 +3VS_CMOS +3VS 1 1
C10019 R23 1 @ 2 0_0402_5% USB20_P5_R 9 7 8 10 USB20_N4_CONN 0_0402_5% 2 @ 1 R2082
[19] USB20_P5 9 10 USB20_N4 [19]
33P_0402_50V8J R24 1 2 0_0402_5% USB20_N5_R 11 12 USB20_P4_CONN 0_0402_5% 2 @ 1 R2083 W=40mils
te
[19] USB20_N5 @ 11 12 USB20_P4 [19]

13 14 R3
2 13 14 2 1 2 2 2
2 @ @
15 16 C10015 0_0603_5%
GND1 GND2
.1U_0402_10V6-K C24
1
HIGHS_WS22141-C1431-HF EMC@ 0.047U_0402_16V7K
1
CD@
ME@
+3VS
w.
Close to JCCD Pin2

For EMI For EMI
1
EMC_NS@
L13 L12
D32 USB20_P5 USB20_P5_R
1
USB20_P4 1 2 USB20_P4_CONN 1 2
1 2 1 2
ww
USB20_N4 USB20_N4_CONN USB20_N5 4 3 USB20_N5_R

4 3
2
4 3 4 3
A A
EXC24CH900U_4P
2
AZ5215-01F_DFN1006P2E2 EXC24CH900U_4P
EMC@ EMC@
For EMI
Issued Date 2015/02/26 Deciphered Date 2016/02/26 eDP/ CMOS/Touch screen

Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
ISET
HDMI_TX0+ HDMI@ CRE1 1 2 0.1U_0402_10V7K HDMI_TX0+_REIN H Increase +13%
[8] HDMI_TX0+ +1.2VS
HDMI_TX0- HDMI@ CRE3 1 2 0.1U_0402_10V7K HDMI_TX0-_REIN
[8] HDMI_TX0- L default
HDMI_TX1+ HDMI@ CRE5 1 2 0.1U_0402_10V7K HDMI_TX1+_REIN
[8] HDMI_TX1+
HDMI_TX1- HDMI@ CRE7 1 2 0.1U_0402_10V7K HDMI_TX1-_REIN +3VS M Reduce -13%
[8] HDMI_TX1-
HDMI_TX2+ HDMI@ CRE9 1 2 0.1U_0402_10V7K HDMI_TX2+_REIN
[8] HDMI_TX2+ EQ
HDMI_TX2- HDMI@ CRE11 1 2 0.1U_0402_10V7K HDMI_TX2-_REIN CRE17 CRE18 CRE19 CRE20
[8] HDMI_TX2- CRE21 CRE22
m
[8] HDMI_TXC+
HDMI_TXC+ HDMI@ CRE13 1 2 0.1U_0402_10V7K HDMI_TXC+_REIN
R10016
H EQ for channel loss up to 4.3 dB
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
D D
.01U_0402_16V7-K
.01U_0402_16V7-K
HDMI_TXC- HDMI@ CRE14 1 2 0.1U_0402_10V7K HDMI_TXC-_REIN 0_0603_5%
1 1 1 1 1 1
[8] HDMI_TXC- L EQ for channel loss up to 12.4 dB
co
2 2 2 2 2 2 M EQ for channel loss up to 8.6 dB
+3VS
11
37
12
40
20
31
19
URE1 HDMI@ HDMI@ HDMI@ HDMI@ PRE
HDMI@ HDMI@ HDMI@
1 PS8407A_CFG
VDD33_1
VDD33_2
VDDRX_1
VDDRX_2
VDDTX_1
VDDTX_2
RRE25
VDDTA
2 HDMI_TX0+_REIN 6
4.7K_0402_5% HDMI_TX0-_REIN 7 IN_D0p
IN_D0n
H 1.6dB pre-emphasis
@ HDMI_TX1+_REIN 4
RRE26 2 1 PS8407A_DCIN_EN HDMI_TX1-_REIN IN_D1p
5
a.
4.7K_0402_5% HDMI_TX2+_REIN 1 IN_D1n
IN_D2p
L no pre-emphasis
Parade FAE suggest reserved. HDMI_TX2-_REIN 2
@ HDMI_TXC+_REIN 9 IN_D2n
RRE31 2 1 I2C_CTL_EN HDMI_TXC-_REIN IN_CKp M 2.5dB pre-emphasis
10
@ IN_CKn 25 HDMI_TX0+_D
4.7K_0402_5% I2C reserved. OUT_D0p HDMI_TX0-_D
TP71 1 36 24
PD# OUT_D0n
OUT_D1p
27 HDMI_TX1+_D DDCBUF
I2C_CTL_EN 8 26 HDMI_TX1-_D
I2C_CTL_EN OUT_D1n 30 HDMI_TX2+_D
+3VS OUT_D2p HDMI_TX2-_D H active DDC buffer with default threshold
29
si
PS8407A_DCIN_EN 13 OUT_D2n 22 HDMI_CLK+_D
@ PS8407A_DDCBUF 14 DCIN_EN/SCL_CTL OUT_CKp 21 HDMI_CLK-_D
RRE34 1 2 4.7K_0402_5% DDCBUF/SDA_CTL OUT_CKn L default,passive DDC pass-through
PS8407A_ISET 34
ISET
R9754 2 @ 1 0_0402_5% PS8407A_DCIN_EN
[16,27,39,44] EC_SMB_CK1 M active DDC buffer without default threshold
DDPB_CLK 38 32 HDMI_CLK_CON
R9755 2 @ 1 0_0402_5% PS8407A_DDCBUF [15] DDPB_CLK SCL_SRC SCL_SNK
[16,27,39,44] EC_SMB_DA1 DDPB_DATA 39 33 HDMI_DAT_CON
[15] DDPB_DATA SDA_SRC SDA_SNK I2C_CTL_EN
ne
PS8407A_CFG 23
I2C reserved. CFG/I2C_ADDR1 28 HDMI_HPD_CON H I2C control is selected
HPD_SNK
PS8407A_EQ 17
C PS8407A_PRE 16 EQ/I2C_ADDR0 L Pin control is selected C
PRE
[15] HDMI_HPD
HDMI_HPD 3
HPD_SRC
CFG
do
GND_PAD
18
REXT
H HDMI ID enable
GND1
GND2
1
1
R10002 RRE20
L HDMI ID disable
27K_0402_5% 5.36K_0402_1% PS8407ATQFN40GTR2A1_TQFN40_5X5
+3VS
15
35
41
HDMI@
CRE23
CRE24 +3VS
@ HDMI@ DCIN_EN
197mA
2
H DC coupling input
0.1U_0402_10V7K
in
.01U_0402_16V7-K
1 1
L default,AC coupling input

2 2
+3VS PD#
HDMI@
HDMI@
H Normal operation
i-
1
1
1
一一PS84 07 p in contr ol mod e RRE22 RRE23 RRE24 RRE32 RRE35 RRE37 I2C reserved.
須
須須 o u t pu t RRE21 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% L Chip power down
4.7K_0402_5% HDMI@ @ @ @ @ @
layout，走走走走,VIA 最最一最 HDMI@
DDPB_DATA
2
2
DDPB_CLK
2
PS8407A_CFG
Close to JHDMI1 PS8407A_EQ
PS8407A_ISET
HDMI_DET
D3
1 1 10 9
HDMI_DET
is PS8407A_PRE
PS8407A_DDCBUF
B HDMIDAT_R 2 2 8 HDMIDAT_R +5VS +5VS_HDMI_F +5VS_HDMI B

9
1
1
D5
HDMICLK_R 4 4 7 7 HDMICLK_R RRE27 RRE28 RRE29 RRE30 RRE33 2 F1
4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 1 1 2
+5VS_HDMI 5 5 6 6 +5VS_HDMI By Pass Mode @ HDMI@ @ @ @
3
RB491D_SOT23-3 0.5A_8V_KMC3S050RY
2
3 3 @ HDMI@
kn
8 LP2301ALT1G_SOT23-3
1 3 Q22
S
AZ1045-04F_DFN2510P10E-10-9
HDMI@
EMC_NS@ 1
C34
G
2
.1U_0402_10V6-K
4
3
D6 L2 [46] SUSP 2 HDMI@
HDMI_CLK-_D HDMI_CLK-_CON
te
HDMI_CLK-_CON HDMI_CLK-_CON 1 2 R10023 820_0402_5%

1 1 10 9 1 2 RP1
HDMI_CLK-_CON1 2 HDMI_CLK+_CON
HDMI_CLK+_CON 2 2 9 8 HDMI_CLK+_CON HDMI_CLK+_D HDMI_CLK+_CON 2.2K_0404_4P2R_5%
1
2
4 3 R10023 colay with C26,C27 pin1
4 3 HDMI@
HDMI_TX0-_CON 4 4 7 7 HDMI_TX0-_CON 820_0402_5% JHDMI1
EXC24CH900U_4P R10024 HDMI_HPD_CON 19
HDMI_TX0-_CON 1 2 HDMI_TX0+_CON HP_DET
HDMI_TX0+_CON 5 5 6 6 HDMI_TX0+_CON 18
L3 17 +5V
HDMI_TX0-_D 1 2 HDMI_TX0-_CON HDMI_DAT_CON DDC/CEC_GND
3 3 1 2 R10023 colay with C28,C29 pin1 16
HDMI_CLK_CON 15 SDA
w.
R10025 820_0402_5% 14 SCL

8 HDMI_TX0+_D HDMI_TX0+_CON
4 3 HDMI_TX1-_CON 1 2 HDMI_TX1+_CON 13 Utility 20
4 3 CEC GND1
HDMI_CLK-_D R43 2 @ 1 0_0402_5% HDMI_CLK-_CON 12
EXC24CH900U_4P 11 CK- 21
AZ1045-04F_DFN2510P10E-10-9 For EMC R10023 colay with C30,C31 pin1 CK_shield GND2
HDMI_CLK+_D R44 2 @ 1 0_0402_5% HDMI_CLK+_CON 10
EMC_NS@ L4 HDMI_TX0-_D HDMI_TX0-_CON CK+
HDMI_TX1-_D HDMI_TX1-_CON 820_0402_5% R45 2 @ 1 0_0402_5% 9 22
1 2 R10026 8 D0- GND3
1 2 HDMI_TX2-_CON 1 HDMI_TX2+_CON D0_shield
2 HDMI_TX0+_D R46 2 @ 1 0_0402_5% HDMI_TX0+_CON 7 23
D7 HDMI_TX1-_D R47 2 @ 1 0_0402_5% HDMI_TX1-_CON 6 D0+ GND4
HDMI_TX1+_D 4 3 HDMI_TX1+_CON D1-
HDMI_TX1-_CON 1 1 HDMI_TX1-_CON R10023 colay with C32,C33 pin1 5
10 9
ww
4 3 D1_shield
HDMI_TX1+_D R48 2 @ 1 0_0402_5% HDMI_TX1+_CON 4
A EXC24CH900U_4P D1+ A
HDMI_TX1+_CON 2 2 8 HDMI_TX1+_CON HDMI_TX2-_D R49 2 @ 1 0_0402_5% HDMI_TX2-_CON 3
9 D2-
2
HDMI_TX2-_CON HDMI_TX2-_CON L5 20150721 HDMI_TX2+_D R50 2 @ 1 0_0402_5% HDMI_TX2+_CON 1 D2_shield
4 4 7 7 HDMI_TX2-_D HDMI_TX2-_CON
1 2 D2+
HDMI_TX2+_CON HDMI_TX2+_CON
1 2 1. Add R10023,R10024,R10025,R10026
5 5 6 6 for HDMI EA test
HDMI_TX2+_D HDMI_TX2+_CON LOTES_AHDM0006-P008A
4 3
3 3 4 3
EXC24CH900U_4P ME@
8 20150731
For EMC 1. Remove C26~C33 for DFB request Security Classification LC Future Center Secret Data Title
For EMC
AZ1045-04F_DFN2510P10E-10-9
EMC_NS@
Issued Date 2015/02/26 Deciphered Date 2016/02/26 HDMI_CONN
C
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
JTAGX R591 1 2 0_0402_5% XDP_TCK

[16] JTAGX
[18] SPI_WP#
PCH_TMS R593 1 2 0_0402_5% XDP_TMS
TABLE : CPU ITP DEBUG REPORT [16] PCH_TMS
1
PCH_TDI R594 1 2 0_0402_5% XDP_TDI R597
[16] PCH_TDI
1K_0402_1%
Individual DCI 2.0 CPU_TRST# R595 1 2 0_0402_5% XDP_TRST#
No use Port w/o connector [22] CPU_TRST#
@
2
PCH_TDO R596 1 2 0_0402_5% XDP_TDO
[16] PCH_TDO
m
D D
R591 NO ASM NO ASM ASM PCH_PRDY# R657 1 2 0_0402_5% XDP_PRDY#
[22] PCH_PRDY# Reference Intel document 546884 SKL PHG
co
R593 NO ASM NO ASM ASM PCH_PREQ# R658 1 2 0_0402_5% XDP_PREQ#
[22] PCH_PREQ#
R594 NO ASM NO ASM ASM
a.
+1.0VALW
R102 NO ASM ASM NO ASM
2
R597 NO ASM ASM NO ASM R93
51_0402_1%
si
R9907 NO ASM ASM ASM @
JXDP1 NO ASM ASM NO ASM
1
C70 NO ASM ASM NO ASM
ne
PCH_TDI R9913 1 @ 2 0_0402_5% TDI
R9909 NO ASM ASM ASM PCH_TDO R9915 1 @ 2 0_0402_5% TDO
C R9910 NO ASM ASM ASM VCCST +3VALW +1.0VALW
C
R9916 NO ASM ASM ASM

R99 NO ASM ASM ASM
do
R9912 NO ASM ASM ASM 2 @
C70
2
0.1U_0402_25V6
R9907 @ 1
R9930 NO ASM ASM ASM 51_0402_1% 1K_0402_5%
R9935
in
1
1
R9932 NO ASM ASM ASM R9908 1 @ 2 0_0402_5% JXDP1
[16] PCH_TCK R9909 1 @ 2 0_0402_5% 26
R9933 NO ASM ASM ASM [6] XDP_TCK 25 26 28
PCH_TMS R9911 1 @ 2 0_0402_5% 24 25 GND_2 27
R9910 1 @ 2 0_0402_5% 23 24 GND_1
[6] XDP_TMS R9912 1 @ 2 0_0402_5% 22 23
TDI
[6] XDP_TDI R9934 1 @ 2 0_0402_5% 21 22
i-
[6] XDP_TRST# R9916 1 @ 2 0_0402_5% 20 21
LOGIC [6] XDP_TDO TDO
19 20
18 19
TABLE : PCH ITP DEBUG REPORT [16] SYS_RESET# R99 1 @ 2 1K_0402_5% 17 18
[18,27,37,40,44,45] PLT_RST# R9917 1 @ 2 1K_0402_5% 16 17
[16,44] PCH_PWROK 15 16
No use Individual DCI 2.0 14 15
Port w/o connector R9930 1 @ 2 0_0402_5% 13 14
[16,44] SYS_PWROK 12 13
is EC_RSMRST# R9748 1 @ 2 1K_0402_5%
11
10
12
11
B
R93 NO ASM ASM NO ASM [16,44] EC_RSMRST# 9 10
B
R9931 1 @ 2 0_0402_5% 8 9
JXDP1 NO ASM ASM NO ASM [6] CFG3 7 8
6 7
R9917 NO ASM ASM NO ASM 5 6
4 5
kn
3 4
R9932 1 @ 2 0_0402_5% 2 3
R9908 NO ASM ASM NO ASM [6] XDP_PRDY# R9933 1 @ 2 0_0402_5% 1 2
[6] XDP_PREQ# 1
R9911 NO ASM ASM NO ASM MOLEX_52435-2671
1
ME@
R9913 NO ASM ASM NO ASM R9749
1K_0402_1%
te
2
LOGIC
G01Tw
P
P==m
_
BD r
1iE
8s
_b
Nll
Oeet
_
R
E
B NrI
ONoeT
Oo
T Ro
+3VS
abyu
R o
ee
bb
oo
oo
tta
mm
oo.
dd
eeT
.(h
(P
DC
eH
fwf
a u
ui
lln
t) l c
TABLE : Functional Strap

w.
* “ ”
n r
a
do
in
s
a
bi
ls
eu
ts
hf
eu
Tl
C
O
GPP_B18/GSPI0_MOSI (No Reboot) R563 “ ”

ih
en
s
sn
ei
mn
bP
tD
f.
e
t
u
r
e
)
i
s
t
i
e
e
n
g
/
X
P
HIGH Enable "No Reboot" Mode ASM

1
LOW Disable "No Reboot" Mode (Default ) NO ASM LOGIC R563

1K_0402_5% Place near PCH
@
ww
A A
2
GPP_B18_NO_REBOOT
GPP_B18_NO_REBOOT [20]

Issued Date 2015/02/26 Deciphered Date 2016/02/26 XDP
Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
+3VALW TO +3VALW_LAN
+3VALW_LAN rising t i me ( 10 %~90 %):
+3VALW +3VALW_LAN
0.5msˉ s pecˉ 10 0m
s +3VALW_LAN +LAN_VDDREG
Need short
JL1 1 2 @ width : 40 mils 1 2
1 2
R28 0_0603_5%
JUMP_43X79
m
D D
1
+3VALW
.1U_0402_10V6-K
.1U_0402_10V6-K
LP2301ALT1G_SOT23-3 CL2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1 1 1 1 .1U_0402_10V6-K
D
3 1 @
.1U_0402_10V6-K
.01U_0402_16V7-K
Q14 CL4 CL5 CL6 CL7
co
1
2 CD@
RL2 1 1
100K_0402_5% CL8 CL9 @ 2 @ 2 2 2
G
2
@
2
2 2
RL3 1 @ 2 @ @
[20] LAN_PWR_ON#
47K_0402_5%
a.
Close to Pin11 Close to Pin32 Close to Pin11 Close to Pin32
+3VALW_LAN +3VS
+3VALW_LAN
2
RL4
G
2
si
10K_0402_5% QL1
RL5 @
10K_0402_5%
1
@ LAN_CLKREQ#_R 1 3 @
LAN_CLKREQ# [17]
S
1
2N7002KW_SOT323-3
RL7 1 @ 2 0_0402_5% PCIE_WAKE#_R
[16,40,44] PCIE_WAKE# 2 0_0402_5%
[40,44] LAN_WAKE# RL6 1
33 RL18 1 2 0_0402_5%
ne
C +3VALW_LAN 32 GND 16 CLK_PCIE_LAN# C
1 2 RSET 31 AVDD33_2 REFCLK_N 15 CLK_PCIE_LAN CLK_PCIE_LAN# [17]
RL8
+LAN_VDD10 30 RSET REFCLK_P 14 PCIE_PTX_C_DRX_N4 CLK_PCIE_LAN [17]
2.49K_0402_1%
LAN_XTALO 29 AVDD10 HSIN 13 PCIE_PTX_C_DRX_P4 PCIE_PTX_C_DRX_N4 [19]
LAN_XTALI CKXTAL2 HSIP LAN_CLKREQ#_R PCIE_PTX_C_DRX_P4 [19]
28 12
+3VS TL3 @ 1 27 CKXTAL1 CLKREQB 11 +3VALW_LAN
LAN_PWR_ON# RL121 @ 2 LAN_DISABLE# 26 LED0 AVDD33_1 10 LAN_MDI3-
LED1/GPO MDIN3 LAN_MDI3+ LAN_MDI3- [38]
0_0402_5% TL4 @ 1 25 9
do
LED2 MDIP3 LAN_MDI3+ [38]
1
+LAN_REGOUT 24 8 +LAN_VDD10
RL9 +LAN_VDDREG 23 REGOUT AVDD10_2 7 LAN_MDI2-
+LAN_VDD10 22 VDDREG MDIN2 6 LAN_MDI2+ LAN_MDI2- [38]
1K_0402_1%
PCIE_WAKE#_R 21 DVDD10 MDIP2 5 LAN_MDI1- LAN_MDI2+ [38]
LANW AKEB MDIN1 LAN_MDI1+ LAN_MDI1- [38]
ISOLATE# 20 4
2
PLT_RST# 19 ISOLATEB MDIP1 3 +LAN_VDD10 LAN_MDI1+ [38]

[18,27,36,40,44,45] PLT_RST# PCIE_PRX_C_DTX_N4 18 PERSTB AVDD10_1 LAN_MDI0-
[19] PCIE_PRX_DTX_N4 CL10 1 2 .1U_0402_10V6-K 2
LAN_PWR_ON# PCIE_PRX_C_DTX_P4 17 HSON MDIN0 LAN_MDI0+ LAN_MDI0- [38]
ISOLATE# RL10 1 @ 2
[19] PCIE_PRX_DTX_P4 CL11 1 2 .1U_0402_10V6-K 1
HSOP MDIP0 LAN_MDI0+ [38]
in
0_0402_5% CL10 close to Pin18
1
RL11 CL11 close to Pin17

15K_0402_5%
2
RTL8111H-CG_QFN32_4X4 UL1
i-
B is For RTL8111H-CG (LDO mode) B
LAN_XTALI
+LAN_VDD10
YL1 LAN_XTALO
1 4
OSC1 GND2 +LAN_REGOUT RL13 1 2 0_0603_5%
kn
2 3
GND1 OSC2
1 1 1 1 1 1 1
1 1 @
CL22 CL16 CL17 CL18 CL19 CL20 CL21
CL12 25MHZ_10PF_7V25000014 CL13 .1U_0402_10V6-K .1U_0402_10V6-K .1U_0402_10V6-K .1U_0402_10V6-K .1U_0402_10V6-K .1U_0402_10V6-K 1U_0402_10V6K
12P_0402_50V8-J 12P_0402_50V8-J 2 2 CD@ 2 2 2 2 2
2 2
te
Close to Pin3, 8, 22, 30 LAYOUT NEED CHECK Close to Pin22(Reserved)

Layout Note: LL1 must be
within 200mil to Pin24,
CL15,CL16 must be within
200mil to LL1
+LAN_REGOUT: Width =60mil
w.
A A

ww
Issued Date 2015/02/26 Deciphered Date 2016/02/26 LAN_RTL8111GUL/RTL8106EUL

Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
DL1/DL2
1'S PN:SC300003M00
替更替替 TL1 GIGA@
24 1 MCT
MCT1 TCT1
m
D D
LAN_MDI0+ 23 2 LAN_MDO0+
AZ3033-04F_DFN2525P10E10 [37] LAN_MDI0+ MX1+ TD1+
LAN_MDI2+ 7 1 LAN_MDI3+ LAN_MDI0- 22 3 LAN_MDO0-
co
I/O3 I/O1 [37] LAN_MDI0- MX1- TD1-
1
6 8 21 4 MCT RL17
NC3 NC4 MCT2 TCT2 75_0603_5%
1
5 11 LAN_MDI1+ 20 5 LAN_MDO1+
+3VALW_LAN VDD GND [37] LAN_MDI1+ MX2+ TD2+
4 DL3
1
2
NC2 10 LAN_MDI1- 19 6 LAN_MDO1- PDT5061_DO-214AA
NC5 [37] LAN_MDI1- MX2- TD2-
2
a.
LAN_MDI2- NC1 LAN_MDI3-
2
9 3 18 7 MCT
I/O4 I/O2 MCT3 TCT3
2
DL1 @ LAN_MDI2+ 17 8 LAN_MDO2+
[37] LAN_MDI2+ MX3+ TD3+
LAN_MDI2- 16 9 LAN_MDO2-
[37] LAN_MDI2- MX3- TD3-
15 10 MCT
si
MCT4 TCT4
1 1
@ LAN_MDI3+ 14 11 LAN_MDO3+ CL25
AZ3033-04F_DFN2525P10E10 [37] LAN_MDI3+ MX4+ TD4+ CL32 1000P_1206_2KV7-K
LAN_MDI1+ 7 1 LAN_MDI0+ LAN_MDI3- 13 12 LAN_MDO3- 0.022U_0603_50V7K @
I/O3 I/O1 1 [37] LAN_MDI3- MX4- TD4- 2 2
6 8 CL24
C NC3 NC4 C
10P_0402_50V8J GST5009 LF
ne
5 11 2
+3VALW_LAN VDD GND
4
NC2 10
2 NC5
LAN_MDI1- 9 NC1 3 LAN_MDI0-
I/O4 I/O2 CHASSIS1_GND
DL2
do
Place Close to TL1 更 JRJ 1 CONN
in
ME@
JRJ1
i-
12
B Follow A+A GND_4
11
B
GND_3
10
RL14 1 2 0_0603_5% LAN_MDO0+ 1 GND_2
PR1+ 9
RL15 1 2 0_0603_5%
is LAN_MDO0- 2
PR1-
GND_1
RL16 1 2 0_0603_5% LAN_MDO1+ 3

PR2+
LAN_MDO2+ 4
PR3+
CHASSIS1_GND
LAN_MDO2- 5
kn
CHASSIS1_GND PR3-
Reserve for EMI go rural solution LAN_MDO1- 6
PR2-
LAN_MDO3+ 7
PR4+
LAN_MDO3- 8
PR4-
te
ALLTO_C10202-108H9-L
A A
w.

Issued Date 2015/02/26 Deciphered Date 2016/02/26 LAN_Transformer
BY511/BY710
ww
5 4 3 2 1
5 4 3 2 1
REMOTE+/-_R, REMOTE1+/-, REMOTE2+/-:

Trace width/space:10/10 mil
m
Trace length:<8"
D D
co
REMOTE1+
Near GPU&VRAM
1
1
C
+3VS +3VS C45 2 Q15
3300P_0402_50V7-K B MMBT3904W H_SOT323-3
@2 E
3
REMOTE1-
a.
Fintek thermal sensor
placed near DIMM
2
+3VS
U1
R881
4.7K_0402_5%
R882
4.7K_0402_5% REMOTE2+
Near CPU core
si
@ @ 1
1
C
1
1 10 EC_SMB_CK2 C46 2 Q16
VCC SCL EC_SMB_CK2 [16,27,35,44] 3300P_0402_50V7-K B MMBT3904W H_SOT323-3
REMOTE1+ 2 9 EC_SMB_DA2 @2 E
1
3
DP1 SDA EC_SMB_DA2 [16,27,35,44] REMOTE2-
C47 REMOTE1- 3 8 THEM_ALERT# R9952 1 2 0_0402_5%
.1U_0402_10V6-K DN1 ALERT# SMB1_ALERT# [16]
ne
2 THERM_L @
CD@ REMOTE2+ 4 7
DP2 THERM#
REMOTE2- 5 6
C DN2 GND C
F75303M_MSOP10
do
in
i-
FAN Conn
is
B B
Address 1001_101xb
+5VS
JFAN1
R52 1 2 0_0603_5% +5VS_FAN1 1
kn
2 1
[44] EC_FAN1_SPEED 2
1 1 [44] EC_FAN1_PW M 3
C50 4 3
C49 .1U_0402_10V6-K 5 4
10U_0805_10V6K @ 6 G1
2 2 G2
HIGHS_W S32040-S0471-HF
te
ME@
+5VS
JFAN2
R75 1 2 0_0603_5% +5VS_FAN2 1
2 1
[44] EC_FAN2_SPEED 2
1 1 3
w.
[44] EC_FAN2_PW M 3
C60 4
C81 .1U_0402_10V6-K 5 4
10U_0805_10V6K @ 6 G1
2 2 G2
HIGHS_W S32040-S0471-HF
ME@
ww
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 Thermal sensor/FAN CONN
Custom
BY511/BY710 0.3
5 4 3 2 1
A B C D E
Mini-Express Card(WLAN/WiMAX) +3VS_WLAN
+3VS
JWLAN2
+3VS Need short +3VS_WLAN 1 2

J3 @ 3 GND1 3.3VAUX1 4
1 2 [19] USB20_P10 5 USB_D+ 3.3VAUX2 6 1 @ T1
1 2 [19] USB20_N10 USB_D- LED#1
49.9K_0402_1%
49.9K_0402_1%
7 8
1
JUMP_43X79 9 GND2 PCM_CLK 10
11 SDIO_CLK PCM_SYNC 12
R9993
R9992
13 SDIO_CMD PCM_IN 14
+3VALW LP2301ALT1G_SOT23-3 15 SDIO_DAT0 PCM_OUT 16 1 @ T2
17 SDIO_DAT1 LED#2 18
2
SDIO_DAT2 GND11
D
Q164 3 1 AOAC@ 19 20
m
SDIO_DAT3 UART_WAKE PCH_UART2_RXD
.01U_0402_16V7-K
21 22
1 SDIO_WAKE UART_RX PCH_UART2_RXD [20,48] 1
1 1 1 23
C916 C915 C914 SDIO_RESET
G
2
.1U_0402_10V6-K @ .1U_0402_10V6-K
co
@ AOAC@
2 2 2 KEY E
1 AOAC@ 2
R2077 25 PIN24~PIN31 NC PIN 24
[44] AOAC_ON# 27 26
1
100K_0402_5% C913 29 28
.1U_0402_10V6-K 31 30
AOAC@
2 33 32 PCH_UART2_TXD
GND3 UART_TX PCH_UART2_TXD [20,48]
35 34
[19] PCIE_PTX_C_DRX_P3 PETP0 UART_CTS
37 36
[19] PCIE_PTX_C_DRX_N3 PETN0 UART_RTS EC_TX_RSVD EC_TX
a.
39 38 R2075 1 @ 2 0_0402_5%
41 GND4 RSRVD10 40 EC_RX_RSVD R2067 1 @ 2 0_0402_5% EC_RX
WLAN [19] PCIE_PRX_DTX_P3 PERP0 RSRVD11
43 42
[19] PCIE_PRX_DTX_N3 45 PERN0 RSRVD9 44
47 GND5 COEX3 46 BT_OFF# R77 1 2 0_0402_5%
[17] CLK_PCIE_WLAN 49 REFCLKP0 COEX2 48 EC_RX [44]
[17] CLK_PCIE_WLAN# REFCLKN0 COEX1 SUSCLK_R
51 50 R2076 1 2 0_0402_5%
WLAN_CLKREQ_Q# GND6 SUSCLK PLT_RST# SUSCLK [16]
53 52
55 CLKEQ0# PERSTO# 54 BT_OFF# PLT_RST# [18,27,36,37,44,45]
R2070 1 2 1K_0402_5%
[16,37,44] PCIE_WAKE# PEWAKE0# RSRVD/W_DISABLE#2 WLAN_OFF# PCH_BT_OFF# [20]
57 56 R2066 1 2 0_0402_5%
PCH_WLAN_OFF# [20]
si
R2071 1 @ 2 0_0402_5% GND7 W_DISABLE#1
[37,44] LAN_WAKE#
59 58 SMB_DATA_S3_R R2068 1 @ 2 0_0402_5%
61 RSRVD/PETP1 I2C_DATA 60 SMB_CLK_S3_R SMB_DATA_S3 [12,13,16,45]
R2069 1 @ 2 0_0402_5%
+3VS RSRVD/PETN1 I2C_CLK SMB_CLK_S3 [12,13,16,45]
63 62
+3VS_WLAN 65 GND8 ALERT 64 EC_TX_R R2074 1 2 0_0402_5%
RSRVD/PERP1 RSRVD6 EC_TX [44]
67 66
69 RERVD/PERN1 RSRVD7 68 +3VS_WLAN
2
71 GND9 RSRVD8 70
RSRVD1 RSRVD12
2
R2072 73 72
G
ne
1
Q165 75 RSRVD2 3.3VAUX3 74
10K_0402_5% GND10 3.3VAUX4
AOAC@ R2073
77 76 100K_0402_5%
1
AOAC@ 3 1 WLAN_CLKREQ_Q# GND15 GND14

[17] WLAN_CLKREQ#
S
2 2
2
2N7002KW_SOT323-3
LCN_DAN05-67406-0102
ME@
R80 1 2 0_0402_5%
do
If support AOAC, NC R80;
if not support AOAC, stuff R80.
+3.3V_NGFF
ME@
NGFF
in
M.2 SSD(SATA/PCIE) 1
3
JSSD1
GND_1 3.3V_1
2
4
1A(MAX 60mA) PCIE_PRX_DTX_N12 5 GND_2 3.3V_2 6
1 2 PCIE_PRX_DTX_P12 PERN3 N/C_2 2
+3VS +3.3V_NGFF 7 8
9 PERP3 N/C_3 10 C8411
R94 0_0603_5% GND_3 DAS/DSS#/LED1#
PCIE_PTX_DRX_N12_C 11 12 .1U_0402_10V6-K
C8410
22U_0603_6.3V6-M
1 1 1 PCIE_PTX_DRX_P12_C 13 PETN3 3.3V_3 14 1

C8412
4.7U_0402_6.3V6M
CD@
PETP3 3.3V_4
i-
15 16
C8401 PCIE_PRX_DTX_N11 17 GND_4 3.3V_5 18 +3.3V_NGFF
.1U_0402_10V6-K PCIE_PRX_DTX_P11 19 PERN2 3.3V_6 20
2 2 2 PERP2 N/C_4
21 22
CD@ PCIE_PTX_DRX_N11_C 23 GND_5 N/C_5 24
PETN2 N/C_6
2
PCIE_PTX_DRX_P11_C 25 26
27 PETP2 N/C_7 28 R95
PCIE_PRX_DTX_N10 29 GND_6 N/C_8 30 10K_0402_5%
PCIE_PRX_DTX_P10 31 PERN1 N/C_9 32 @
33 PERP1 N/C_10 34
1
GND_7 N/C_11
PCIE_PTX_DRX_N10_C
PCIE_PTX_DRX_P10_C
35
37
39
PETN1
PETP1
is N/C_12
DEVSLP
36
38
40
DEVSLP0
3 PCIE_SATA_PRX_DTX_P9 41 GND_8 N/C_13 42 3
PCIE_SATA_PRX_DTX_N9 43 PERN0/SATA_B+ N/C_14 44
PERP0/SATA_B- N/C_15
2
45 46
PCIE_SATA_PTX_DRX_N9_C 47 GND_9 N/C_16 48 R97
PCIE_SATA_PTX_DRX_P9_C 49 PETN0/SATA-A- N/C_17 50 PLT_RST#
PETP0/SATA-A+ PERST# SSD_CLKREQ# 10K_0402_5%
51 52
CLK_PCIE_SSD# 53 GND_10 CLKREQ# 54 1 @ SSD_CLKREQ# [17]
kn
[17] CLK_PCIE_SSD# REFCLKN PEWAKE#
1
CLK_PCIE_SSD 55 56
[17] CLK_PCIE_SSD 57 REFCLKP N/C_18 58 TP76
GND_11 N/C_19 +3.3V_NGFF
59 NC NC 60
R X ㄛT X捼 61
63
NC
NC
NC
NC
62
64
1
65 NC NC 66
67 68 R274
SSD_DET 69 N/C_1 SUSCLK 70 10K_0402_5%
71 PEDET 3.3V_7 72
te
73 GND_12 3.3V_8 74 +3.3V_NGFF
2
75 GND_13 3.3V_9
GND_14 1
77 76 C8400 SSD_DET R9999 1 2 0_0402_5% SSD_DET#
PEG1 PEG2 SSD_DET# [14]
.1U_0402_10V6-K
2
CD@
ARGOS_NASM0-S6701-TSH4 PEDET (PE_DTCT)
1
R9940
SATA Device GND
10K_0402_5% PCIe Device Open
w.
PCIE_SATA_PRX_DTX_N9 0612 @
PCIE_SATA_PRX_DTX_P9 PCIE_SATA_PRX_DTX_N9 [14]
PCIE_SATA_PRX_DTX_P9 [14] NEW symbol SSD_DET#
2
PCIE_SATA_PTX_DRX_N9_C 0.22U_0402_10V6K 1 2 CC39 PCIE_SATA_PTX_DRX_N9
PCIE_SATA_PTX_DRX_P9_C PCIE_SATA_PTX_DRX_P9 PCIE_SATA_PTX_DRX_N9 [14]
0.22U_0402_10V6K 1 2 CC165
PCIE_SATA_PTX_DRX_P9 [14] 0 - SATA
PCIE_PRX_DTX_N10
PCIE_PRX_DTX_N10 [14]
1 - PCIE
PCIE_PRX_DTX_P10
PCIE_PTX_DRX_N10_C PCIE_PTX_DRX_N10 PCIE_PRX_DTX_P10 [14]
0.22U_0402_10V6K 1 2 CC166
PCIE_PTX_DRX_P10_C PCIE_PTX_DRX_P10 PCIE_PTX_DRX_N10 [14]
0.22U_0402_10V6K 1 2 CC167
PCIE_PTX_DRX_P10 [14]
ww
4
PCIE_PRX_DTX_N11 4
PCIE_PRX_DTX_P11 PCIE_PRX_DTX_N11 [14] 1 2 DEVSLP0_R
DEVSLP0 R96 @
PCIE_PTX_DRX_N11_C PCIE_PTX_DRX_N11 PCIE_PRX_DTX_P11 [14] DEVSLP0_R [15]
0.22U_0402_10V6K 1 2 CC168 0_0402_5%
0.22U_0402_10V6K 1 2 CC169
PCIE_PRX_DTX_N12
PCIE_PRX_DTX_P12 PCIE_PRX_DTX_N12 [14] Ac coupling-Cap place near NGFF CONN within 500mil
PCIE_PTX_DRX_N12_C PCIE_PTX_DRX_N12 PCIE_PRX_DTX_P12 [14]
0.22U_0402_10V6K 1 2 CC170
0.22U_0402_10V6K 1 2 CC171
Issued Date 2015/02/26 Deciphered Date 2016/02/26 NGFF WLAN

Custom
BY511/BY710 0.3

A B C D E
A B C D E
[15] USB30_TX_P2
+USB_VCCA
[15] USB30_TX_N2
C55 100U_1206_6.3V6M
LEFT SIDE USB3.0 PORT X2 [15] USB30_RX_P2
1 2
@
+USB_VCCA [15] USB30_RX_N2

U2 C56 1 2
+5VALW @ 1U_0603_25V6M
1 8
GND VOUT3 C57 1 2
2 7 @ 470P_0402_50V7K
VIN1 VOUT2
@ C58 1 2 1U_0402_16V6K 3 6
VIN2 VOUT1 JUSB1
USB_ON# 4 5 USB_OC1# USB30_TX_P1_BC79 1 2 .1U_0402_10V6-K USB30_TX_C_P2 R74 1 @ 2 0_0402_5% USB30_TX_R_P2 9
m
[44] USB_ON# EN/EN FLAG USB_OC1# [19] StdA_SSTX+
1
1 USB30_TX_N1_B C80 1 2 .1U_0402_10V6-K USB30_TX_C_N2 R76 1 @ 2 0_0402_5% USB30_TX_R_N2 8 VBUS 1
1 USB20_P2 USB20_P2_R StdA_SSTX-
AP2820CMMTR-G1_MSOP8 C61 R64 1 @ 2 0_0402_5% 3
[19] USB20_P2 D+
1000P_0402_50V7K 7 +3VS
USB20_N2 USB20_N2_R GND_DRAIN
co
Low Active 2A @ R65 1 @ 2 0_0402_5% 2 10
2 [19] USB20_N2 USB30_RX_P1_B USB30_RX_R_P2 D- GND_1
R79 1 @ 2 0_0402_5% 6 11
4 StdA_SSRX+ GND_2 12
USB30_RX_N1_B R78 1 @ 2 0_0402_5% USB30_RX_R_N2 5 GND_5 GND_3 13
StdA_SSRX- GND_4
1
ALLTO_C107MC-F0939-L R9954 R9955
ME@ 4.7K_0402_5% 4.7K_0402_5%
2
USB20_P2_R @ @
a.
D24 EMC_NS@
USB30_RX_R_N2 9 10 USB30_RX_R_N2 +USB_VCCA
1 1
EXC24CH900U_4P USB20_N2_R TEST_0
USB30_RX_P1_B 4 3 USB30_RX_R_P2 USB30_RX_R_P2 8 9 2 USB30_RX_R_P2 TEST_1
4 3 2
AZ5425-01F_DFN1006P2E2
AZ5425-01F_DFN1006P2E2
AZ5425-01F_DFN1006P2E2
1
1
USB30_TX_R_N2 7 7 4 USB30_TX_R_N2 D9 D10 D11
4
USB30_RX_N1_B 1 2 USB30_RX_R_N2
1
1 2 USB30_TX_R_P2 6 5 USB30_TX_R_P2
6 5
L15 +3VS
EMC@ 3 3
si
EXC24CH900U_4P
2
8
USB30_TX_C_P2 4 3 USB30_TX_R_P2 EMC_NS@ EMC_NS@ EMC_NS@
@ 4.7K_0402_5%
2
4 3 AZ1045-04F_DFN2510P10E-10-9 AA_EQ10 R9956 2 1
AA_DE00 R9957 @ 4.7K_0402_5%
2 1
USB30_TX_C_N2 1 2 USB30_TX_R_N2 AA_EQ00 R9958 2 U31@ 1 4.7K_0402_5%
1 2 AA_DE10 R9959 @ 4.7K_0402_5%
2 1
L16
EMC@ USB20_P1_R
BB_EQ10 R9960 @ 4.7K_0402_5%
L8 D12 EMC_NS@ 2 1 4.7K_0402_5%
ne
USB20_N2 1 2 USB20_N2_R USB30_RX_R_N1 9 USB30_RX_R_N1 USB20_N1_R BB_DE00 R9961 @
1 2
10 1 1 2
U31@
1
4.7K_0402_5%
BB_EQ00 R9962 2 1 4.7K_0402_5%
USB30_RX_R_P1 8 @
2 USB30_RX_R_P1 BB_DE10 R9963 2 1
AZ5425-01F_DFN1006P2E2
AZ5425-01F_DFN1006P2E2
9 2
1
USB20_P2 4 3 USB20_P2_R D13 D14
4 3 USB30_TX_R_N1 7 4 USB30_TX_R_N1
2 7 4 2
1
AA_EQ11 R9964 @ 4.7K_0402_5%
EXC24CH900U_4P 2 1
USB30_TX_R_P1 6 @ 4.7K_0402_5%
EMC@ 6 5 5 USB30_TX_R_P1 AA_DE01 R9965 2 1 4.7K_0402_5%
AA_EQ01 R9966 U31@
2 1
AA_DE11 R9967 @ 4.7K_0402_5%
3 3 2 1
do
8 EMC_NS@ EMC_NS@
@ 4.7K_0402_5%
2
BB_EQ11 R9968 2 1 4.7K_0402_5%
BB_DE01 R9969 @
AZ1045-04F_DFN2510P10E-10-9 2 1
BB_EQ01 R9970 2 U31@ 1 4.7K_0402_5%
BB_DE11 R9971 @ 4.7K_0402_5%
2 1
+USB_VCCA
EXC24CH900U_4P
USB30_RX_P1_A USB30_RX_R_P1 For EMC
4 3
4 3
IC side
[15] USB30_TX_P1
in
USB30_RX_N1_A 1 2 USB30_RX_R_N1 C59 1 2 220U_B2_6.3VM_R35M USB30_TX_P1 R100031 NO3D@ 2 0_0402_5% USB3P0_TXP_R1 R100061 NO3D@ 2 0_0402_5% USB30_TX_P1_A
+
1 2 [15] USB30_TX_N1
L9 [15] USB30_RX_P1 USB30_TX_N1 R100041 NO3D@ 2 0_0402_5% USB3P0_TXN_R1 R100051 NO3D@ 2 0_0402_5% USB30_TX_N1_A
EMC@ C62 1 2
[15] USB30_RX_N1 @ 1U_0603_25V6M USB30_RX_P1 R21 1 NO3D@ 2 0_0402_5% USB3P0_RXP_C_R1R100071 NO3D@ 2 0_0402_5% USB30_RX_P1_A
EXC24CH900U_4P
USB30_TX_C_P1 4 3 USB30_TX_R_P1 C63 1 2 USB30_RX_N1 R25 1 NO3D@ 2 0_0402_5% USB3P0_RXN_C_R1 R26 1 NO3D@ 2 0_0402_5% USB30_RX_N1_A
4 3 @ 470P_0402_50V7K
USB30_TX_C_N1 USB30_TX_R_N1
i-
1 2
1 2 JUSB2
L10 USB30_TX_P1_A C64 1 2 .1U_0402_10V6-K USB30_TX_C_P1 R68 1 @ 2 0_0402_5% USB30_TX_R_P1 9 IC side
1 StdA_SSTX+
EMC@
L11 USB30_TX_N1_A C65 1 2 .1U_0402_10V6-K USB30_TX_C_N1 R69 1 @ 2 0_0402_5% USB30_TX_R_N1 8 VBUS USB30_TX_P2 1
R10008 2 0_0402_5%
NO3D@ USB3P0_TXP_R2 1
R10013 2 0_0402_5%
NO3D@ USB30_TX_P1_B
USB20_N1 1 2 USB20_N1_R USB20_P1 R70 1 @ 2 0_0402_5% USB20_P1_R 3 StdA_SSTX-
1 2 [19] USB20_P1 7 D+ USB30_TX_N2 1 2 0_0402_5% USB3P0_TXN_R2 1 2 0_0402_5% USB30_TX_N1_B
R10010 NO3D@ R10012 NO3D@
USB20_N1 R71 1 @ 2 0_0402_5% USB20_N1_R 2 GND_DRAIN 10
USB20_P1 USB20_P1_R [19] USB20_N1 USB30_RX_P1_A USB30_RX_R_P1 D- GND_1 USB30_RX_P2 USB3P0_RXP_C_R2 R10015 USB30_RX_P1_B
4 3 R72 1 @ 2 0_0402_5% 6 11 1
R10009 2 0_0402_5%
NO3D@ 1 2 0_0402_5%
NO3D@
4 3 4 StdA_SSRX+ GND_2 12
GND_5 GND_3
EXC24CH900U_4P
EMC@
USB30_RX_N1_A
is R73 1 @ 2 0_0402_5% USB30_RX_R_N1 5
StdA_SSRX-
ALLTO_C107MC-F0939-L
GND_4
13 USB30_RX_N2 1
R10011 2 0_0402_5%
NO3D@ USB3P0_RXN_C_R2 R10014
1 2 0_0402_5%
NO3D@ USB30_RX_N1_B
3 3
ME@
For EMC
USB3.0 Repeator Port 2

+3VS
kn
U111 U31@
1
13 VDD1
VDD2
AA_EQ11 15 4 BB_EQ11
AA_DE01 16 A_EQ1_SDA_CTL B_EQ1_I2C_ADDR1 3 BB_DE01
AA_EQ01 17 A_DE0_SCL_CTL B_DE0_I2C_ADDR0 2 BB_EQ01
te
AA_DE11 18 A_EQ0_NC B_EQ0_NC 6 BB_DE11

U31@ A_DE1_NC B_DE1_NC
USB30_TX_P1 C9179 1 2 0.1U_0402_16V7-K USB3_TX1+_REIN 19 12 R9946 1 U31@
USB3_TX1+_REOUT 2 0_0402_5% USB30_TX_P1_A
USB30_TX_N1 C9180 1 2 0.1U_0402_16V7-K USB3_TX1-_REIN 20 A_INp A_OUTp 11 USB3_TX1-_REOUT 1 2 USB30_TX_N1_A
+3VS
USB3.0 Repeator Port 1 U31@
A_INn A_OUTn
R9945 U31@ 0_0402_5%
U31@
USB30_RX_P1_A R9707 1 U31@ 2 0_0402_5% USB3_RX1+_REIN 9 22 USB3_RX1+_REOUT C9183 1 2 0.1U_0402_16V7-K USB30_RX_P1
USB30_RX_N1_A 1 2 USB3_RX1-_REIN 8 B_INp B_OUTp 23 USB3_RX1-_REOUT C9184 1 2 0.1U_0402_16V7-K USB30_RX_N1
0_0402_5% B_INn B_OUTn
U110 U31@ R9708 U31@
1 U31@
w.
13 VDD1 1 5
VDD2 R9706 1 2 4.99K_0402_1% TP75 7 PD# 10
TEST_1 14 REXT GND1 21
AA_EQ10 BB_EQ10 24 TEST GND2 25
15 4 U31@
AA_DE00 A_EQ1_SDA_CTL B_EQ1_I2C_ADDR1 BB_DE00 I2C_EN GPAD
16 3
AA_EQ00 17 A_DE0_SCL_CTL B_DE0_I2C_ADDR0 2 BB_EQ00 PS8713BTQFN24GTR2A_TQFN24_4X4
AA_DE10 18 A_EQ0_NC B_EQ0_NC 6 BB_DE10
U31@ A_DE1_NC B_DE1_NC
USB30_TX_P2 C9175 1 2 0.1U_0402_16V7-K USB3_TX2+_REIN 19 12 USB3_TX2+_REOUT R9943 1 U31@ 2 0_0402_5% USB30_TX_P1_B
USB30_TX_N2 C9176 1 2 0.1U_0402_16V7-K USB3_TX2-_REIN 20 A_INp A_OUTp 11 USB3_TX2-_REOUT 1 2 USB30_TX_N1_B
ww
A_INn A_OUTn 0_0402_5%

4 R9944 U31@ 4
U31@ U31@
USB30_RX_P1_B R9704 1 U31@ 2 0_0402_5% USB3_RX2+_REIN 9 22 USB3_RX2+_REOUT C9181 1 2 0.1U_0402_16V7-K USB30_RX_P2
USB30_RX_N1_B 1 2 USB3_RX2-_REIN 8 B_INp B_OUTp 23 USB3_RX2-_REOUT C9182 1 2 0.1U_0402_16V7-K USB30_RX_N2
0_0402_5% B_INn B_OUTn
R9705 U31@
U31@
1 5
R9703 1 2 4.99K_0402_1% TP74 7 PD# 10
TEST_0 14 REXT GND1 21
24 TEST GND2 25
U31@
I2C_EN GPAD
PS8713BTQFN24GTR2A_TQFN24_4X4
Issued Date 2015/02/26 Deciphered Date 2016/02/26 USB2.0/USB3.0 PORT (LEFT)
C
BY511/BY710 0.3

A B C D E
A B C D E F G H
SATA HDD Conn.
ME@
m
1 1
JHDD1
+5VS
1
1
co
SATA_PTX_DRX_P2 C66 1 2 .01U_0402_16V7-K SATA_PTX_C_DRX_P2 2 11
[14] SATA_PTX_DRX_P2 SATA_PTX_DRX_N2 SATA_PTX_C_DRX_N2 2 GND1
[14] SATA_PTX_DRX_N2 C67 1 2 .01U_0402_16V7-K 3
4 3
1 1 1 1 1 SATA_PRX_DTX_N2 C68 1 2 .01U_0402_16V7-K SATA_PRX_C_DTX_N2 5 4 12
C74 C75 C76 C77 C78 [14] SATA_PRX_DTX_N2 SATA_PRX_DTX_P2 SATA_PRX_C_DTX_P2 5 GND2
C69 1 2 .01U_0402_16V7-K 6
1000P_0402_50V7K .1U_0402_10V6-K 1U_0402_10V6K 10U_0805_10V6K 10U_0805_10V6K [14] SATA_PRX_DTX_P2 6
7
@ @ @ 7
2 2 2 2 2 1 2 8
+5VS 8
@ 9
a.
0_0805_5% R10017 9
10
10
20150730 HRS_TF31-10S-0P5SH-800
For EMC 1. Change R10017 from 0603 to 0805
si
ne
2 2
do
in
i-
3 3
is
kn
te
w.
4 4
ww
Issued Date 2015/02/26 Deciphered Date 2016/02/26 HDD/ODD CONN

Custom
BY511/BY710 0.3

A B C D E F G H
5 4 3 2 1
R9726 1 2 0_0402_5% 2 DVDD-IO R9751 1 2 0_0402_5% AVDD1

+3VS DVDD-IO +5VS AVDD1
C146
PW NODIFY 按 Plat fo r m HAD Li n 電
k C9196 2 1 4.7U_0603_6.3V6K
0.1U_0402_16V7-K
1
C149 2 1 0.1U_0402_16V7-K
R9731 1 2 0_0402_5% DVDD DVDD
C145 1 2 0.1U_0402_16V7-K RL21 1 2 0_0402_5% AVDD2

+3VS AVDD2
C10008 1 2 1U_0402_10V6K
PW NODIFY
C9197 2 1 1U_0402_10V6K
D D
m
0.1U_0402_16V7-K 2 1 C147
+5VS
LINE1-VREFO-R
0.1U_0402_16V7-K 2 1 C148
co
PVDD
C10009 2 1 10U_0402_6.3V6-M DVDD-IO AVDD1 DA3
BAT54AW T1G_SOT323-3
2
@ DVDD AVDD2
C9195 2 1 10U_0402_6.3V6-M R9753 R9752
0_0402_5% 0_0402_5%
U114 @ @
41
46
26
40
1
9
R9750 1 2 0_0402_5% PVDD PVDD
1
PVDD1
PVDD2
AVDD1
AVDD2
DVDD-IO
DVDD
2
LINE1_L 22 43 SPK_L-
LINE1_R 21 LINE1-L(PORT-C-L) SPK-OUT-L- 42 SPK_L+
1
LINE1-R(PORT-C-R) SPK-OUT-L+
a.
24 45 SPK_R+ 1U_0402_10V6K 2 1 C9193 LINE1_R
RA37 RA38
23 LINE2-L(PORT-E-L) SPK-OUT-R+ 44 SPK_R- 4.7K_0402_5% 4.7K_0402_5%
LINE2-R(PORT-E-R) SPK-OUT-R- 1U_0402_10V6K 2 1 C9194 LINE1_L
DMIC_CLK
2
A_RING2_CONN 17 32 A_HP_OUTL_R
[45] A_RING2_CONN A_SLEEVE 18 MIC2-L(PORT-F-L)/RING HPOUT-L(PORT-I-L) 33 A_HP_OUTR_R A_HP_OUTL_R [45]
1 [45] A_SLEEVE MIC2-R(PORT-F-R)/SLEEVE HPOUT-R(PORT-I-R) A_HP_OUTR_R [45]
10P_0402_50V8J
EMC_NS@
CH269
PCH_HDA_SYNC
RH763 1 2 2.2K_0402_5% 31 10
MIC2_VREF LINE1-VREFO-L SYNC PCH_HDA_BIT_CLK PCH_HDA_SYNC [16]
RH764 1 2 2.2K_0402_5% LINE1-VREFO-R 30 6 R9730 1 2 22_0402_5%
LINE1-VREFO-R BCLK C9201 1 2 22P_0402_50V8-J PCH_HDA_BIT_CLK [16]
2
5 PCH_HDA_SDOUT
DMIC_DATA SDATA-OUT PCH_HDA_SDIN0_R RC112 2 PCH_HDA_SDIN0 PCH_HDA_SDOUT [16]
2 8 1 33_0402_5%
RC181 2 [34,45] DMIC_DATA
1 33_0402_5% DMIC_CLK_R 3 GPIO0/DMIC-DATA SDATA-IN PCH_HDA_SDIN0 [16]
[34,45] DMIC_CLK GPIO1/DMIC-CLK 48
SPDIF-OUT/GPIO2 CODEC_W F_MUTE# [43]
si
R102 1 2 1K_0402_5% 47
[44] EC_MUTE#
1 2 10K_0402_5% PCH_HDA_RST#
11 PDB
RESETB
ALC3248 MONO-OUT
16
MONO-OUT [43]
R9727
[16] PCH_HDA_RST# 29 MIC2_VREF
R107 1 2 1K_0402_5%C150 2 1 0.1U_0402_16V7-K 12 MIC2-VREFO
[43] PC_BEEP PCBEEP
+3VS R9728 1 2 100K_0402_5% 13 7 C9202 1 2 10U_0603_6.3V6M

R9729 1 2 200K_0402_5% 14 HP/LINE1_JD(JD1) LDO3-CAP 39 C9203 1 2 10U_0603_6.3V6M
[45] HPOUT_JD MIC2/LINE2_JD(JD2) LDO2-CAP 27 1 2 10U_0603_6.3V6M
C9204
LDO1-CAP
NET NAME NODIFY 1 2 2.2U_0603_6.3V6K 37 1 2 100K_0402_1%
C9198 R9732
35 CBP
C CBN C
36 28 C9205 1 2 4.7U_0402_6.3V6M
+3VS CPVDD VREF
ne
C9199 1 2 4.7U_0402_6.3V6M
R9985 1 2 0_0402_5% 20 15
+3VALW VD33_STB SPDIFO/FRONT_JD(JD3)/GPIO3
@ 34 C9999 1 2 2.2U_0603_6.3V6K
C9200 1 2 10U_0603_6.3V6M 19 CPVEE
R9996 1 2 0_0402_5% MIC_CAP
+3VL
4
49 DC_DET 25
Thermal_PAD AVSS1 38
AVSS2 JW F1
SPKWF+_CONN 1
SPKWF+
SPKWF-_CONN 2 1
SPKWF-
ALC3248-CG_MQFN48_6X6 3 2
4 G1
G2
1000P_0603_50V7-K
1000P_0603_50V7-K
1 1 HIGHS_WS32020-S0471-HF
do
1
W F@ W F@
C9191
C9192
R9724 R9723 ME@
10_0603_5% 10_0603_5%
W F@ 2 W F@2
2
1 1
W F@ W F@
C9190 C9189
330P_0402_50V7K 330P_0402_50V7K
2 2
in
JSPK1
SPK_R+ SPK_R+_CONN
L17 1 EMC@ 2 BLM18PG221SN1D_2P 1
SPK_R- SPK_R-_CONN 1
SPK_L-
L19 1 EMC@ 2 BLM18PG221SN1D_2P SPK_L-_CONN 3 2 20150729
SPK_L+ SPK_L+_CONN 3 1. Add R10027 for WF_EN
5 4
6 G1 +3VS B+_WF
G2
i-
R9711
HIGHS_W S32040-S0471-HF R100271 2
470P_0402_50V7K
470P_0402_50V7K
470P_0402_50V7K
470P_0402_50V7K
[43] CODEC_W F_MUTE# 2 1

1 1 1 1 ME@ 0_0402_5% B+
B B
CA31
CA32
CA33
CA34
W F@
1
W F_EN 0_0805_5%
1 1
0.1U_0402_25V6
R907 1 2
10U_0805_25V6K
2 2 2 2 [44] EC_W F_MUTE# W F@ @
0_0402_5%
2
R9710 C9 C10 W F@
W F@
@ 10_0603_5% R9709
2 2
1K_0402_5%
2
1 2 R9997 W F@
[43] CODEC_WF_MUTE#
0_0402_5% @
1
B+ B+_W F
EMC@ EMC@ EMC@ EMC@ W F@
AO3401A_SOT23-3 U113
1 2 R101 @ W F_MUTE# 1 28 20150514_Change C9,C52 from 16V to 25V
[44] EC_WF_MUTE#
is S
SD PVCCL1
D
2A 80 mil Q177 3 1 2A 80 mil 1K_0402_5% 2 27 for capacitor derating.
WF_GNDA 3 FAULT PVCCL2 26 W F@
4 LINP BSPL 25 C43 1 2 0.47U_0603_25V6-K
LINN OUTPL
G
GAIN0 5 24
2
GAIN1 6 GAIN0 PGND1 23 SPKWF+
R909 1 2 1 2 C54 W F@ AVCC 7 GAIN1 OUTNL 22
B+
100K_0402_5% 1 WF_GNDA 1U_0402_25V6-K 8 AVCC BSNL 21
C1958
0.1U_0402_25V6
1 2 C128 W F@ 9 AGND BSNR 20 SPKWF-
1
10 GVDD OUTNR 19 W F@
20150716 1U_0402_25V6-K
R908
100K_0402_5%
PC-BEEP 2 1. Change C140,C141 to SE076333KK0 WF_GNDA 1 2 R112 W F@ 1 2 R110 W F@

11
12
PLIMIT
RINN
RINP
PGND2
OUTPR
BSPR
18
17
C51 1 2 0.47U_0603_25V6-K
20K_0402_1% 62K_0402_1% 13 16
PBTL 14 NC PVCCR1 15
2
RA10 CA35 C139 W F@ PBTL PVCCR2 B+_WF

1 2
GND
DA1 2 1 RB751V-40_SOD323-2 1 2 PC_BEEP_C 1 2 PC_BEEP
BEEP#
1
kn
1U_0402_25V6-K 1 1
0.1U_0402_25V6
[44] BEEP# PC_BEEP [43]
10U_0805_25V6K
D Q178
PCH_BEEP W F_EN 2
1
DA2 2 1 RB751V-40_SOD323-2 33K_0402_5% WF_GNDA R9976 1 2 W F@ 1 2 C140 W F@ TPA3113D2PWPR_HTSSOP28 C52 C53 W F@

W F@
29
[16] PCH_BEEP 0.1U_0402_10V7K G 2N7002KW_SOT323-3
RA11 17.4K_0402_1% 0.033U_0402_16V7-K
10K_0402_5% 1 2 2
C1960 S
R100001 2 0_0402_5% 1 2 R9975 1 2 C141 W F@
3
.1U_0402_10V6-K [43] MONO-OUT

30K_0402_1% 0.033U_0402_16V7-K
2
@ W F@
2
2 1
1
R9973
41.2K_0402_1%
C142
680P_0402_50V7K
C9207 AVCC 1 2 PBTL
22P_0402_50V8-J R9998
1@ 2
te
100K_0402_5%
WF@
@
STUFF for power consumption test
2
W F_MUTE#
2015/07/06 ADD GAIN1 GAIN0 GAIN Ri(Ohm)
2
0 0 20dB 60k
EMC@ +5VS R10001
R9716 1 2 0_0402_5% @ 10K_0402_5%
1 2 10K_0402_5% 0 1 26dB 30k
R9719 GAIN0 WF_GNDA
A EMC@ @ A
1
1 2 0_0402_5% 1 0 32dB 15k
R9717 @
R9720 1 2 10K_0402_5% GAIN1
1 1 36dB 9k
EMC@
R9718 1 2 0_0402_5% W F@
R9721 1 2 10K_0402_5%
w.
W F@
R9722 1 2 10K_0402_5%
WF_GNDA
WF_GNDA
Issued Date 2015/02/26 Deciphered Date 2016/02/26 Codec_CX20752

ww
D
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
For EMI
For ESD CLK_PCI_EC
PLT_RST# RE2 1 @ 2 10_0402_5% RE1 1 2 0_0603_5% +3VL
1 1
CE1 CE2 RE3 1 2 0_0603_5%

+3VALW_R
220P_0402_50V7K
+VFSPI 10P_0402_50V8J
2
Close EC @
+3VALW
2 @
EMC_NS@ +3VALW_R +3VALW_R +3VALW_EC
CE3
RE75 1 20_0402_5% 1 2 VCOREVCC
LE1 1 2 HCB1608KF-181T20
+3VS MIRROR@ .1U_0402_10V6-K +3VALW_R All capacitors close to EC
RE97 1 20_0402_5% +VFSPI 1 1
CE4
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
.1U_0402_10V6-K
NOMIRROR@ .1U_0402_10V6-K CE5
1 1 1 1 1 1
+3VS +3VALW_EC CE6 CE7 CE8 CE9 CE10 CE11 1000P_0402_50V7K
m
LE2 1 2 HCB1608KF-181T202 EC_AGND 2
D D
@ @
2 2 2 2 2 2
RE6 1 2 0_0402_5% EC_AGND
co
CD@
+3VS
minimum trace width 12 mil
121
127
114
Change RE6 to 0ohm jump
12
11
26
50
92
74
3
UE1
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VCC
VFSPI
AVCC
VBAT
VCORE
EC_FAN2_SPEED RE66 1 2 10K_0402_5%
EC_FAN2_PWM RE65 1 @ 2 10K_0402_5%
a.
EC_FAN1_SPEED RE10 1 2 10K_0402_5%
[24] WRST#
4 24
+3VALW_R [15] KBRST# 5 KBRST#/GPB6 PWM0/GPA0 25 PWR_LED1# [45] EC_FAN1_PWM
SERIRQ RE11 1 @ 2 10K_0402_5%
[15,45] SERIRQ LPC_FRAME# SERIRQ/GPM6 PWM1/GPA1 BATT_CHG_LED# [45]
6 28
[15,45] LPC_FRAME# 7 LFRAME#/GPM5 PWM2/GPA2 29 BATT_LOW_LED# [45] LPC_FRAME# 1 2 10K_0402_5%
RE7
[15,45] LPC_AD3 LAD3/GPM3 PWM3/GPA3 EC_FAN2_PWM LED_KB_PWM [45]
DE1 1 2 @ 8 PWM 30
[15,45] LPC_AD2 LAD2/GPM2 PWM4/SMCLK5/GPA4 EC_FAN1_PWM EC_FAN2_PWM [39]
9 31 ENBKL RE9 1 @ 2 100K_0402_5%
[15,45] LPC_AD1 10 LAD1/GPM1 PWM5/SMDAT5/GPA5 32 EC_FAN1_PWM [39]
RB751V-40_SOD323-2 [15,45] LPC_AD0 CLK_PCI_EC LAD0/GPM0 PWM6/SSCK/GPA6 BEEP# [43]
13 LPC 34 VCCIO_PG [62]
[15] CLK_PCI_EC
si
RE8 1 2 100K_0402_5% WRST# 14 LPCCLK/GPM4 PWM7/RIG1#/GPA7 120
PM_SLP_SUS# WRST# TMRI0/GPC4 CHG_MOD1 [45] +3VS
15 124 SUSP#
[16] PM_SLP_SUS# EC_RX ECSMI#/GPD4 TMRI1/GPC6 SUSP# [46,55,62]
1 16
[40] EC_RX EC_TX 17 SIN0/PWUREQ#/BBO/SMCLK2ALT/GPC7 66
[40] EC_TX SOUT0/LPCPD#/GPE6 ADC0/GPI0 NTC_V [52]
2
CE12 PLT_RST# 22 67
[18,27,36,37,40,45]
1U_0402_6.3V6K PLT_RST# LPCRST#/GPD2 ADC1/SMINT0/GPI1 BATT_TEMP TURBO_V [52]
23 68 RE51
2 [14] EC_SCI# ECSCI#/GPD3 ADC2/SMINT1/GPI2 BATT_TEMP [52,53]
126 ADC 69 0_0402_5%
[46] PCH_CMOSP GA20/GPB5 ADC3/SMINT2/GPI3 BATT_I [53]
70
IT8371E-128/DX ADC4/SMINT3/GPI4 71
ENBKL [34]
ADP_I [52,53]
1
ADC5/DCD1#/GPI5 72
ne
ADAPTER_ID [51,53]
[45] KSI[0..7]
KSI[0..7] KSI0 58
LQFP128 ADC6/DSR1#/GPI6
ADC7/CTS1#/GPI7
73
CHG_MOD2 [45] TP_CLK RE12 2 1 4.7K_0402_5%
KSI1 59 KSI0/STB# 78
KSO[0..17] 60 KSI1/AFD# DAC2/TACH0B/SMINT6/GPJ2 79 CPUCORE_PWRGD [6,56] TP_DATA 2 1 4.7K_0402_5%
KSI2 RE13
[45] KSO[0..17] KSI2/INIT# DAC3/TACH1B/SMINT7/GPJ3 H_PROCHOT#_EC MAINPWON [52,54]
C KSI3 61 DAC 80 RE62 1 2 0_0402_5% C
62 KSI3/SLIN# DAC4/DCD0#/GPJ4 81 EC_RTCRST#_ON PROCHOT# [52]
KSI4
KSI5 63 KSI4 DAC5/RIG0#/GPJ5
+3VALW_R KSI6 64 KSI5 85 +5VALW
65 KSI6 PS2CLK0/TMB0/CEC/GPF0 86 CHG_MOD3 [45]
KSI7
KSI7 PS2DAT0/TMB1/GPF1 PBTN_OUT# [16]
KSO0 36 87
do
2.2K_0404_4P2R_5% EC_SMB_CK1 1 37 KSO0/PD0 SMCLK0/SMINT8/GPF2 88 SUSACK# [16] USB_ON#
PAD @ KSO1 Int. K/B PS2 SMDAT0/SMINT9/GPF3 RE15 1 2 100K_0402_5%
EC_SMB_CK1 EC_SMB_DA1 IT1 KSO1/PD1 TP_CLK PCH_PWR_EN [46] USB_CHG_EN
1 4 PAD 1 @ KSO2 38 Matrix 89 RE64 1 2 100K_0402_5%
EC_SMB_DA1 IT2 KSO2/PD2 PS2CLK2/SMINT10/GPF4 TP_DATA TP_CLK [45]
2 3 PAD 1 @ KSO3 39 90 @
1 IT3 40 KSO3/PD3 PS2DAT2/SMINT11/GPF5 TP_DATA
1 [45] 2
PAD @ KSO4 RE100
RPE2 IT4 KSO4/PD4 VGA_GATE# TP_LOCK_LED# [45]
PAD 1 @ KSO5 41 EXTERNAL SERIAL FLASH 96 0_0402_5% +3VALW_R
IT5 42 KSO5/PD5 GPH3/ID3/YM 97 VGA_GATE# [20]
KSO6
KSO6/PD6 GPH4/ID4/YP CPUCORE_ON [56]
KSO7 43 98
KSO7/PD7 GPH5/ID5/DM ME_FLASH [16]
KSO8 44 99
+3VS 1 45 KSO8/ACK# GPH6/ID6/DP SYS_PWROK [16,36]
KSI7 PAD @ KSO9 SUSP# RE18 1 @ 2 100K_0402_5%
IT6 KSO9/BUSY EC_SPI_CS0#
KSI6 PAD 1 @ KSO10 46 101
in
1 IT7 51 KSO10/PE FSCE#/GPG3 102 EC_SPI_SI
RPE3 WRST# PAD @ KSO11 SUSP# RE19 1 2 100K_0402_5%
EC_SMB_CK2 IT8 KSO11/ERR# FMOSI/GPG4 EC_SPI_SO
1 4 KSO12 52 SPI Flash ROM 103
2 3 EC_SMB_DA2 KSO13 53 KSO12/SLCT FMISO/GPG5 105 EC_SPI_CLK SYSON RE21 1 2 100K_0402_5%
KSO14 54 KSO13 FSCK/GPG7
For factory EC flash KSO14
2.2K_0404_4P2R_5% KSO15 55
KSO16 56 KSO15 108 ACIN#
KSO17 57 KSO16/SMOSI/GPC3 AC_IN#/GPB0 109 LID_SW#
KSO17/SMISO/GPC5 UART LID_SW#/GPB1 LID_SW# [45]
SYSON
Mount RE30 Reserve for VGA_AC_DET
i-
[45] ON/OFF ON/OFF 110 82
EC_ON PWRSW/GPB3 EGAD/GPE1 2 0_0402_5% EC_MUTE# [43]
@ RE96 2 1 0_0402_5% 111 83 RE92 1
EC_SMB_CK1 XLP_OUT/GPB4 EGCS#/GPE2 EC_ON [54,62,66]
115 84
[52,53] EC_SMB_CK1 EC_SMB_DA1 SMCLK1/GPC1 EGCLK/GPE3 ADAPTER_ID_ON# [53] RE30 1 2 0_0402_5% VGA_AC_DET EMC Request
116 VGA_AC_DET [27] 1
[52,53] EC_SMB_DA1 2 33_0402_5%PECI_EC SMDAT1/GPC2
[6,14] EC_PECI RE24 1 117 SM Bus 77 PM_SLP_S4# [16]
118 SMCLK2/PECI/GPF6 SMINT5/GPJ1 100 GPG2 CE13
[16] DPWROK_EC EC_SMB_CK2 94 SMDAT2/PECIRQT#/GPF7 SSCE0#/GPG2 106
GPIO .1U_0402_10V6-K
[16,27,35,39] EC_SMB_CK2 EC_SMB_DA2 CRX1/SIN1/SMCLK3/GPH1/ID1 SSCE1#/GPG0 AOAC_ON# [40] 2 EMC_NS@
95 104 SUSWARN# [16]
+3VL [16,27,35,39] EC_SMB_DA2 CTX1/SOUT1/SMDAT3/GPH2/ID2 DSR0#/GPG6 107 NOVO# [45]
BTN#/GPG1 119 BKOFF#
CRX0/GPC0 BKOFF# [34]
LAN_WAKE#
112
125 VSTBY0
is CTX0/TMA0/GPB2
RI1#/GPD0
123
18
21
PCH_PWROK
PM_SLP_S3#
[16,36]
[16]
B [37,40,44] LAN_WAKE# GPE4 WAKE UP RI2#/GPD1 EC_WF_MUTE# [43] B
76 SYSON Clear CMOS issue
TACH2/SMINT4/GPJ0 48 EC_FAN2_SPEED SYSON [46]
TACH1A/TMA1/GPD7 EC_FAN1_SPEED EC_FAN2_SPEED [39]
47 EC_FAN1_SPEED [39]
USB_ON# 33 TACH0A/GPD6 19
[41] USB_ON# USB_CHG_EN GINT/CTS0#/GPD5 L80HLAT/BAO/SMCLK4/GPE0 CAPS_LED# [45]
35 GPIO 20
[45] USB_CHG_EN RTS1#/GPE5 L80LLAT/SMDAT4/GPE7 NUM_LED# [45] PCH_SRTCRST# [16]
93
[16,36] EC_RSMRST# 1 2 RE98 @ CLKRUN#/GPH0/ID0
kn
+3VL 10K_0402_5%
1
RE29 1 2 0_0402_5% 2 QE4 D
[16,37,40] PCIE_WAKE# CK32KE/GPJ7 EC_RTCRST#_ON
128 Clock 2
[16] AC_PRESENT CK32K/GPJ6 G
Change RE30 to 0ohm jump
1
S 2N7002KW_SOT323-3
3
RE99 @
RE95 1 2 10K_0402_5% EC_ON RE34 1 2 0_0402_5% 100K_0402_5%
[53] VR_HOT# H_PROCHOT# [6,52,56]
AVSS
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
MIRROR@ @
te
2
1
RE36 1 @ 2 10K_0402_5% BKOFF# QE1 D 1
H_PROCHOT#_EC 2 CE14
PCH_RTCRST# [16]
1
27
49
91
113
122
75
2 1 LID_SW# G 47P_0402_50V8J
RE38 100K_0402_5% IT8371E-128-DX_LQFP128_14X14 @
1
2N7002KW_SOT323-3 S 2 QE3 D
3
EC_RTCRST#_ON 2
RE40 1 2 10K_0402_5% BKOFF# G
EC_AGND +3VL
S 2N7002KW_SOT323-3
3
1
@
w.
PECI_EC 1 2 CE15 RE50
1
47P_0402_50V8J 100K_0402_5%
EMC_NS@ RE42 @
100K_0402_5%
Unmount QE3,QE4,RE99,RE50 by
2
BATT_TEMP 1 2 CE16
100P_0402_50V8J Intel request
2
EMC_NS@ +3VS ACIN# RE94 1 2 0_0402_5%
+3VALW_R ACIN# 1 2 CE17 +3VALW_R
1
ww
100P_0402_50V8J 1 D QE2
A EMC_NS@ CE19 2 A
.1U_0402_10V6-K ACIN [53]
NOVO# G
1
GPG2 RE44 2 1 10K_0402_5% EC_SPI_CS0# RE45 2 1 0_0402_5% SPI_CS0# ON/OFF 1 2 CE18
MIRROR@ SPI_CS0#_R [18] 1U_0402_6.3V6K 2 2N7002KW_SOT323-3 S RE5
3
10K_0402_5%
.01U_0402_16V7-K
GPG2 RE46 2 1 10K_0402_5% EMC_NS@

EC_SPI_SI RE47 2 SPI_SI @
1 0_0402_5%
C48
NOMIRROR@
SPI_SI_R0 [18]
2
when mirror, GPG2 pull high 1
LAN_WAKE#
EC_SPI_SO RE48 2 0_0402_5% SPI_SO
when no mirror, GPG2 pull low 1
SPI_SO_R0 [18]
LAN_WAKE# [37,40,44]
@2 Title
EC_SPI_CLK RE49
2 1 0_0402_5% SPI_CLK Security Classification LC Future Center Secret Data
SPI_CLK_PCH_0 [18]
Issued Date 2015/02/26 Deciphered Date 2016/02/26 ITE8371LQFP
C
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
D35 D36
AZ5425-01F_DFN1006P2E2 AZ5425-01F_DFN1006P2E2
ON/OFF switch +3VL +3VALW +3VL
+3VS 1 2 EMC@ +3VS 1 2 EMC@
K/B Connector 1 2 1 2
2
D23 D37
R82 R83 AZ5425-01F_DFN1006P2E2 AZ5425-01F_DFN1006P2E2
No function field 100K_0402_5% 100K_0402_5%
1
@ 2 0_0402_5% KSI[0..7] 1 2 EMC@ 1 2 EMC@
R899 1 R9948 KSI[0..7] [44] 1 2 1 2
R885 R90 R9743 R9744
1
@ 100K_0402_5% KSO[0..17] 300_0402_5% 300_0402_5% 300_0402_5% 300_0402_5%
D15 JKB1
KSO[0..17] [44] JKB2
NOVO# 2 NUM_LED# NUM_LED#
[44] NOVO# 30 31 30 31
2
NOVO_BTN# [20] NUM_LED# PW R_NUM_LED 30 GND1 PWR_NUM_LED 30 GND1
1 29 32 29 32
CAPS_LED# 28 29 GND2 CAPS_LED# 28 29 GND2
[20] CAPS_LED# PW R_CAPS_LED 28 PWR_CAPS_LED 28
ON/OFF 1 2 R85 3 27 27
KSO17 26 27 KSO17 26 27
0_0402_5% 26 26 LED_KB_C
BAT54CW _SOT323-3 KSO16 25 KSO16 25
@ KSO15 24 25 KSO15 24 25
@ KSO10 23 24 KSO10 23 24
23 23 Q1211
J5 1 2 +3VL +3VALW KSO11 22 KSO11 22
KSO14 21 22 KSO14 21 22 D
KSO13 20 21 KSO13 20 21 2
SHORT PADS [44] LED_KB_PW M
20 20 G
2
KSO12 19 KSO12 19
KSO3 18 19 KSO3 18 19 S
D J6 1 2 D
2
R111 R114 18 18
100K_0402_5% 100K_0402_5% KSO6 17 KSO6 17 3
m
KSO8 16 17 KSO8 16 17 R116
SHORT PADS 16 16 PJA138K_SOT23-3
KSO7 15 KSO7 15 100K_0402_5%
15 15
1
KSO4 14 KSO4 14
@ KSO2 13 14 KSO2 13 14
1
ON/OFFBTN# R119 1 2 0_0402_5% ON/OFF 13 13
ON/OFF [44] KSI0 12 KSI0 12
LED1 R142 390_0402_5% 12 12
[44] PW R_LED1#
PW R_LED1#
15" 1 2 1 2
+3VALW
KSO1
KSO5
11
10 11
10
KSO1
KSO5
11
10 11
10
co
B1931TX--05P-000314_W HITELED2 KSI3 9 KSI3 9
R9746 1 390_0402_5% 20150716 KSI2 8 9 KSI2 8 9
17" 1
B1931TX--05P-000314_W HITE
2 2
+3VALW 1. Change R142 and R9746 KSO0 7 8
7
KSO0 7 8
7
from 100 to 390 ohm KSI5 6 KSI5 6
15" 17" KSI4
KSO9
5
4
6
5
KSI4
KSO9
5
4
6
5
ON/OFFBTN# ON/OFFBTN# 4 4
KSI6 3 KSI6 3
KSI7 2 3 KSI7 2 3
2 2
1
KSI1 1 KSI1 1
1 1
1
D2
1
AZ5215-01F_DFN1006P2E2 17" ACES_50504-3041-001
1
HIGHS_FC1AF301-1201H
1
ME@
EMC_NS@ 15" ME@ +5VS
1
3
+5VS
2
2
SW 5 D1 EMC_NS@
a.
2
T4BJB16_4P SW 6 JKBL1 JKBL2
2
1 2 1 1 2 1
AZ5215-01F_DFN1006P2E2 T4BJB16_4P 1
2 1 2
R897
0.1U_0402_10V6K
R9947 0_0603_5% 2
0.1U_0402_10V6K
0_0603_5% 2 3
C912
C905
2 3 2 LED_KB_C 3
LED_KB_C
2
4 3 4
4 4
2
@ 5 @ 5
1 GND1 1 6 GND1
6 GND2
GND2
HIGHS_FC1AF041-1201H ACES_88514-00401-071
ME@ ME@
si
+3VS
USB charger +3VS

2
R10019
LED USB I/O Connector
0_0402_5%
+3VS
TP_PWR Right Side USB2.0 Port X 1 (USB/B)
JLED
1
2 0_0402_5% TP_PWR JUSB

1 R141 1 +USB_VCCB
PW R_LED1# 1 1
2 9 1
C [44] PW R_LED1# BATT_LOW_LED# 2 GND1 @ 2 C
3 R67 1 2 0_0402_5% 2
.1U_0402_10V6-K
[44] BATT_LOW _LED# BATT_CHG_LED# 3 3
4 1 +5VALW [18,27,36,37,40,44] PLT_RST# 3
[44] BATT_CHG_LED# SATA_LED# 4 4
5 10
2.2A 4
ne
[14] SATA_LED# TP_LOCK_LED# 5 GND2 5
6 L14 [17] CLK_PCIE_CR# 5
[20] TP_LOCK_LED# 6 USB20_P0_R USB20_P0_CONN 6
7 2 1 [17] CLK_PCIE_CR 6
7 2 @ 2 1 7
C114
+3VALW R9949 1 2 0_0402_5% 8
2 1 0.1U_0402_16V7-K U3 8 7
8 C197
R9950 1 2 0_0402_5% 1 12 [17] CR_CLKREQ# 9 8
+5VALW USB20_N0_R 3 4 USB20_N0_CONN
@ IN OUT 10 USB20_P0_R 10 9
USB20_P0 USB20_N0_R 3 4 [19] PCIE_PTX_C_DRX_N2
ACES_51571-0080N-AT1 3 DP_IN 11 11 10
[19] USB20_P0 USB20_N0 DP_OUT DM_IN EXC24CH900U_4P [19] PCIE_PTX_C_DRX_P2 11
ME@ 2 14 12
[19] USB20_N0 DM_OUT GND 13 12
+USB_VCCB [19] PCIE_PRX_DTX_N2 13
@ 14
STATUS#_U R66 1 2 0_0402_5% [19] PCIE_PRX_DTX_P2 14
TP/B Connector STATUS#
9
ILIM_SEL
15
16 15
4 17 16
13 ILIM_SEL 18 17
[19] USB_OC2# FAULT# 18
5 48.7K_0402_1% TI@ 19
do
JTP1 [44] USB_CHG_EN EN 15 ILIM_LO 19
R2048 1 2 20
TP_CLK 1 CHG_MOD1 6 ILIM_LO 16 ILIM_HI 20
[12,13,16,40] SMB_DATA_S3 1 [44] CHG_MOD1 R2047 1 2 21
TP_DATA 2 CHG_MOD2 7 CLT1 ILIM_HI 22 21
[12,13,16,40] SMB_CLK_S3 2 [44] CHG_MOD2 CHG_MOD3 USB20_P0_CONN
3 CLT2 22
TP_DATA 4 3 [44] CHG_MOD3
8
CLT3 GND_Pad
17 22.6K_0402_1% pin number 6 7 8 4 USB20_N0_CONN
23
23
3
[44] TP_DATA TP_CLK 4 24

5 25 24
DT1 [44] TP_CLK TP_PWR 6 5 25
6 7
TPS2546RTER_QFN16_4X4 pin name CTL1 CTL2 CTL3 ILM_SEL 26
26
G1 27
@ 1 @ 1 8 A_RING2_CONN 28 27
100P_0402_50V8J
100P_0402_50V8J
G2 [43,45] A_RING2_CONN 28
29
29
S0 CDP A_HP_OUTL_R
30
30
2 2
ME@ 1 1 1 1 [43] A_HP_OUTL_R A_HP_OUTR_R
31
31
C115
C116
Charge port [43] A_HP_OUTR_R HPOUT_JD

32
32
+5VALW 33
CVILU_CF31061D0R4-10-NH_6P Pin5 Enable [43] HPOUT_JD A_SLEEVE 33
S3 DCP 34
in
EMC_NS@ AZC199-02S.R7G_SOT23-3 TI@ H for all 0 1 1 0/1 [43,45] A_SLEEVE A_SLEEVE 35 34
ILIM_SEL [43,45] A_SLEEVE A_SLEEVE 35
1
R2064 2 1 36
For EMC 10K_0402_5%
[43,45] A_SLEEVE
37 36 41
37 GND1
STATUS#_U S4/S5 DCP NOVO_BTN#
38
38 GND2
42
R2051 1 2 100K_0402_5% 0 0 1 0/1 39
39
@ 40
40
USB_CHG_EN
S0 SDP1 0/1
2 1 Normal port 1 1 0 HRS_FH52E-40S-0P5SH_40P-T
R2052 10K_0402_5%
Pin5 Enable
@ H for S0/S3 ME@
ILIM_SEL GNDA
R2065 2 1 L for S4/S5 S3 SDP1 0 0/1
10K_0402_5% 1 0
i-
S4/S5 Disable 0 0 0 0/1
B B
SDP2 (No Discharge from/to CDP)

SDP1(Discharge from/to any charging state including CDP) 3D Camera
+3VS_MIC
+3VS
No function field J3D
1A
TPM
is LID Hall Sensor
USB30_TX_N6
USB30_TX_P6
USB30_RX_N6
@
@
R9739 1
R9740 1
2 0_0402_5%
2 0_0402_5%
USB30_TX_N6_R
USB30_TX_P6_R
USB30_RX_N6_R
1
3
5
7
1
3
5
7
2
4
6
8
2
4
6
8
3D_DM_DATA_MIC
0_0402_5% 2
0_0603_5% 2
1 R9737 3D@
1 R9734 3D@
3D_FR
DMIC_CLK [34,43]
DMIC_DATA [34,43]
+5VS_CMOS
R9741 1 2 0_0402_5% 9 10
USB30_RX_P6 USB30_RX_P6_R 9 10 +5VS_3D 3D_FR [20]
R9742 1 2 0_0402_5% 11 12 2 1 1A
13 11 12 14 0_0603_5% R9953 3D@
1 13 14
2
C3 15 16 1 2 2
+3VS 100P_0402_50V8J GND1 GND2
.1U_0402_10V6-K
.1U_0402_10V6-K
33P_0402_50V8J
2 EMC@ R9972
U4
C10016
C10017
C10018
+3VS_TPM HIGHS_WS22141-C1431-HF 1 1 100K_0402_1%
2
1 1 @
ME@
1
GND
EMC@
1 2
EMC@
1A 1A(50mA MAX) LID_SW #
R227 0_0603_5% C1 3
3D@
kn
1 1 1 0.01UF_0402_25V7-K OUTPUT LID_SW # [34,44]
TPM@ EMC@ 2
C176 C177 C178
.1U_0402_10V6-K .1U_0402_10V6-K .1U_0402_10V6-K 1 2 +VCC_LID 2
+3VL VCC
2 2 2 R1 0_0402_5%
TPM@ TPM@ TPM@ C10018 close to J3D
AH9247NTR-G1_SOT23-3
20150727_Add C10018
by EMC suggestion
2W
te
0.4A
+3VS_TPM For RF solution. EXC24CH900U_4P
+5VS +5VS_CMOS USB30_TX_N6 USB30_TX_N6_R
For 3D CCD RF_NS@ RF_NS@ [15] USB30_TX_N6
3
3 4
4
UTPM1 U115 3D@
+5VS_CMOS CRF9 CRF10 USB30_TX_P6 USB30_TX_P6_R
1 24 5 1 2 1
NC_1 VDD3 IN OUT [15] USB30_TX_P6 2 1
2 10
3 NC_2 VDD1 +3VS_TPM 2 L21
NC_3 1 GND
7 28 R626 1 TPM@ 2 10K_0402_5% From PCH
PP LPCPD# @ 4 3 2 1
4.7U_0603_6.3V6K
2200P_0402_50V7-K
A 27 C10006 A
47P_0402_50V8J
SERIRQ SERIRQ [15,44] 1U_0402_6.3VA-K EN OC EXC24CH900U_4P
6 26 R9978 1 1 1
NC_4 LAD0 LPC_AD0 [15,44] 2 @ USB30_RX_N6 USB30_RX_N6_R
9 23 0_0402_5% 3 4
NC_7 LAD1 22 LPC_AD1 [15,44] G524B1T11U_SOT23-5 @ C10007 [15] USB30_RX_N6 3 4
4 LFRAME# 20 LPC_FRAME# [15,44]
GND_1 LAD2 LPC_AD2 [15,44] 2 2 2 USB30_RX_P6 USB30_RX_P6_R
11 17 2 1
GND_2 LAD3 LPC_AD3 [15,44] [15] USB30_RX_P6 2 1
w.
18
GND_3 25 PCH_CMOS_ON L22
5 GND_4 21 PCH_CMOS_ON [20] @
NC_5 LCLK CLK_PCI_TPM [15]
8 19
NC_6 VDD2
1
12 15
13 NC_8 CLK_RUN#
NC_9 PLT_RST# R2
14 16 R127 1 2 0_0402_5% 100K_0402_5%
NC_10 LRESET#
TPM@ @
2
Z32H320TC_TSSOP28
TPM@ Security Classification LC Future Center Secret Data Title
Issued Date 2015/02/26 Deciphered Date 2016/02/26 KBD/PWR/IO/LED/TP Conn.

ww
D
BY511/BY710 0.3

5 4 3 2 1
A B C D E
+5VALW to +5VS
+5VLP +5VALW
+5VALW
No function field
3VS_CT2
1
1
1000P_0402_50V7K
R161 R157 +0.6VS
C121 +5VS 1 100K_0402_5% @ 100K_0402_5%
C125
@
1U_0402_16V6K U56
1
2 1 14 1
2
2 VIN1_1 VOUT1_2 13 C216 R159
Change net to SUSP# for PWR sequence 2
m
VIN1_2 VOUT1_1 .1U_0402_10V6-K SUSP 47_0603_5%
5VS_CT1 [35] SUSP
1 SUSP# R263 1 2 0_0402_5% 3 12 CD@ @ 1
EN1 SS1 2
2
4 11
BIAS GND
co 6
3
R264 1 2 0_0402_5% 5 10 3VS_CT2 +3VS Q6A D D Q6B
+3VALW EN2 SS2 SUSP# 2 5 SUSP
6 9 5VS_CT1 G G
1 VIN2_1 VOUT2_2
1000P_0402_50V7K
7 8 1
C123 VIN2_2 VOUT2_1 C215 2N7002KDWH_SOT363-6 S S 2N7002KDWH_SOT363-6
1 1
4
C124
@
0.01UF_0402_25V7-K 15 .1U_0402_10V6-K
2 C122 GPAD CD@
@
1U_0402_10V6K APL3523AQBI-TRG_TDFN14_2X3 2
a.
2 2
si
LP2301ALT1G
Rds=110mohm @
VGS=4.5V,ID=2.8A
VGS(th)=1V Max
Need short
ne
+5VALW +3VALW +3VALW_PCH
J7
2 1 2 2
1 2 +1.0VALW Need short VCCST
1
JUMP_43X79 120mA
R155 J8 @
100K_0402_5% 1 2
do
1 2
@
2
LP2301ALT1G_SOT23-3
PCH_PWR_EN#_R R158 1 JUMP_43X79
@ 2 100K_0402_5% PCH_PWR_EN#
D
Q29 3 1
Q173 RDS(on)<85m,Id=4A
AO3402_SOT-23-3
1
Q30 D 1 1
PCH_PWR_EN C129 C130
G
2
2
[44] PCH_PWR_EN .1U_0402_10V6-K 0.01U_0402_25V7K 1 3
G @ D S
@
in
@
2 2
@ S 2N7002KW_SOT323-3
G
1 1
3
1
C10002 C10000
PCH_PWR_EN#_R .1U_0402_10V6-K 0.01U_0402_25V7K
2
R162 @ @
1 2 2
100K_0402_5%
@ R163 1 2 0_0402_5% C131
[44] PCH_CMOSP
2
.1U_0402_10V6-K
@
i-
1 2
1
R87 R99361 2 0_0402_5% C10001
100K_0402_5% [44,55,63] SYSON
.1U_0402_10V6-K
@
1
2
2
R9937
100K_0402_5%
is
2
3 3
+1.0VALW Need short VCCSTG

kn
J9 @ 120mA
1 2
1 2
+1.2V Need short +1.2VS
+3VALW
JUMP_43X79
J10 @ 120mA
1 2 Q174 RDS(on)<85m,Id=4A
+3VALW 1 2
AO3402_SOT-23-3
te
1
JUMP_43X79
Q176 1 3
R9988 D S
AO3402_SOT-23-3
100K_0402_5%
RDS(on)<85m,Id=4A 1 1
G
@ C10005 C10003
1
2
1 3 .1U_0402_10V6-K
D S 0.01U_0402_25V7K
2
@ @
R9991 2 2
G
100K_0402_5%
w.
1 1
@ C10012 C10011
2
.1U_0402_10V6-K 1 2
0.01U_0402_25V7K [44,55,62] SUSP#
@ @ R9938
2 2 Change net to SUSP# for PWR sequence 100K_0402_5% 1
1 2 C10004
[44,55,63] SYSON .1U_0402_10V6-K
R9995
100K_0402_5% 1 @
C10014 2
@
1 .1U_0402_10V6-K
ww
4 R99891 2 0_0402_5% C10013 4

[44,55,62] SUSP# @
.1U_0402_10V6-K 2
@
1
2
R9990
100K_0402_5%

2
Issued Date 2015/02/26 Deciphered Date 2016/02/26 DC V TO VS INTERFACE

Custom
BY511/BY710 0.3
A B C D E
5 4 3 2 1
B2 A2
m
D
+3VLP PCH_PWR_EN# 2 D
Q25,+3V_PCH
V
V
AC A1
co
MODE VIN
V V
A2 A4 B5
3 +3V_PCH
V
PU301 PU904
V
B+
+3VALW
BATT BATT V 1 V
a.
DPWROK_EC
MODE
V V V
B1
4
PCH_RSMRST#
EC 14
PM_DRAM_PWRGD
5 PBTN_OUT#
V
si
EC_ON PM_SLP_S3# PCH 15
PM_SLP_S4# H_CPUPWRGD CPU
V V
A3 B4 PM_SLP_S5#
PM_SLP_SUS# 6
V
CPU_PLTRST# 16
ne
12
PCH_PWROK
V V
C C
B3 13
SYS_PWROK
V
ON/OFF
do
V
NOVO
NVDD_PWR_EN
in
(DIS)
Vb
+VGA_CORE
V
11 VR_REDY SYSON 7 +1.35V
PU801
PU501
V
DGPU_PWROK
DGPU_PWR_EN
i-
10 Va (DIS)
V
PU901 VR_ON +1.5VS_VGA
V
Q31
V
PU601
V
+CPU_CORE
+5VS
is
B B
V
Q32 +1.05VSP_VGA
V
SUSP#,SUSP 9 +3VS PU702
V
VGA
kn
V
PU602
+1.5VS +3VS_VGA
V
Q27
V
PU502
te
+0.675V
8
SUS_VCCP PU701
V
w.
+1.05VS
ww
A A

Issued Date 2015/02/26 Deciphered Date 2016/02/26 Power sequence Block
Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
m
D D
co
a.
si
ne
C C
do
in
i-
B
is B
kn
te
w.
A A
ww
Issued Date 2015/02/26 Deciphered Date 2016/02/26 Virtual symbol

Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
H4 H5 H6 H7 H8 H9
H1 H2 H3 HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
HOLEA HOLEA HOLEA
1
1
1
1
1
1
m
D D
PAD_CT9P0D5P0 PAD_CT9P0D5P0 PAD_C6P0D6P0N PAD_ShapeT8p0x9p5B5P0D2P3 PAD_CT7P0D4P0 PAD_CT7P0D4P0
PAD_CT6P0B5P0D2P3 PAD_CT6P0B5P0D2P3 PAD_ShapeT9P0X11P0B5P0D2P3
co
20150723_Change foot print to pad_ct5p0b6p0d3p2
by ME suggestion
H13 H25
H11 H12
Follow layout
H10 HOLEA
HOLEA HOLEA HOLEA
HOLEA
a.
1
1
1
1
1
PAD_C4P0D4P0N PAD_C4P0D4P0N
PAD_ShapeT10p5x9p0B5p0D2p3 PAD_CT7P0D4P0 pad_ct5p0b6p0d3p2
SH1 ME@ SH5 ME@
si
1 1
H14 H15 H16 H17 1 1
H26
HOLEA HOLEA HOLEA HOLEA
HOLEA
SPRING_FINGER_6.2X1.64 SPRING_FINGER_6.2X1.64
1
1
1 SH2 SH6
1
C C
ME@ ME@
ne
CHASSIS1_GND PAD_C5P0D2P3 1 1
PAD_CB5P0D2P3 PAD_CT5P0B8P0D3P3 PAD_CT4P0B5P0D2P3 1 1
PAD_ShapeT10p15x7p64D4p6
SPRING_FINGER_6.2X1.64 SPRING_FINGER_6.2X1.64
do
H18 H20 SH3
HOLEA ME@
HOLEA
FD1 FD2 FD3 FD4 FD5 FD6 1
1
1
1
in
SPRING_FINGER_6.2X1.64
PAD_CT6P0D2P6 PAD_CT6P0D2P6
SH4 ME@
1
1
i-
H21 H22 H24
H19 HOLEA
HOLEA HOLEA SPRING_FINGER_6.2X1.64
HOLEA
B B
1
1
1
1
+VGA_CORE +3VS +5VALW +3VALW

PAD_CT9P0D5P0
PAD_O2P9X2P3D2P9X2P3N PAD_O2P9X2P3D2P9X2P3N
is
PAD_O2P9X2P3D2P9X2P3N
1 1
1 1 C137 C138
C135 C136 .1U_0402_10V6-K .1U_0402_10V6-K
H23 .1U_0402_10V6-K .1U_0402_10V6-K 2 2
kn
EMC_NS@ EMC_NS@
HOLEA EMC_NS@ EMC_NS@
2 2
1
te
Pad_C2p3D2p3N
For EMC
A A
w.

Issued Date 2015/02/26 Deciphered Date 2016/02/26 Hole
BY511/BY710
ww
5 4 3 2 1
5 4 3 2 1
B+ +5VLP/ 100mA
Silergy
Silergy
m
D D
SYX198CQNC +5VALW/7A SY8868QMC
Adaptor Converter QFN10_2X2 +2.5VS/1A
co
EC_ON EN PGOOD
FOR SYSTEM Switch Mode
FOR VDDR
SUSP# EN PGOOD
+3VLP/ 100mA
Silergy
SYX198BQNC
a.
Converter +3VALW/ 7A
EC_ON EN
FOR SYSTEM ANPEC
RT8068AZQW
Switch Mode +1.05VS_VGA/2.5A
RT +1.2V/6A
FOR VGA
si
RT8231AGQW
+0.6VS/1.5A SUSP# EN PGOOD
SYSON S5 Switch Mode
SUSP# S3 FOR DDR PGOOD
ne
Silergy
C C
TI SYX198CQNC +1.0VALW/ 8A
BQ24780SRUYR Converter
EN PGOOD
Battery Charger EC_ON FOR PCH
do
Switch Mode
Silergy
SYX198DQNC +1.35VS_VGA/ 8A
Converter
FBVDDQ_PWR_EN EN PGOOD
FOR VGA
in
SMBus
Silergy
SYX198DQNC VCCIO/ 5.5A
Converter
i-
SUSP# EN FOR CPU PGOOD
Onsemi VCC_CORE/56A/68A
B B
NCP81205MNTXG
is VCCGT/39A/55A
Switch Mode VCCSA/10A

VR_ON
EN FOR CPU Core PGOOD VGATE
PGOOD_NB
kn
Battery Interisl
Li-ion NCP81172MNTWG VGA_CORE/51.1A/87A
4S1P/41WH Switch Mode

FOR GPU VDDC
te
w.
A A
ww
Issued Date 2015/02/26 Deciphered Date 2016/02/26 Power Diagram

Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
D
PL5 EMC@
HCB2012KF-121T50_0805
VIN D
m
1 2
PF1
12A_24V_F1206HB12V024T/M PL6 EMC@
co
JDCIN1 HCB2012KF-121T50_0805
1 APDIN 1 2 APDIN1 1 2
1 2
2 3
3
EMC@
EMC@
EMC@
EMC@
4
1000P_0402_50V7K
1000P_0402_50V7K
100P_0402_50V8J
100P_0402_50V8J
4 5
5
1
CVILU_CI2105P2HR1-NH
a.
ADAPTER_ID [44,53]
ME@
2
PC1
PC2
PC3
PC4
si
+3VL
C C
ne 1
PR830 VCCRTC
need change to 1.5K_0603_1%
75K_0603_1%
PR1 PD1
2
1 2 2 1
do
1
PR831 0_0603_5% RB751V-40_SOD323-2
47K_0402_1%
2
in
1U_0402_10V6K
2
PC5
RTC_VCC
@
PD2 1
JRTC1
i-
1 1 PR2 2 BAT_D 2 1
1 2
B B
2 3 1K_0603_5%
G1 4 RB751V-40_SOD323-2
G2
HIGHS_WS32020-S0471-HF
ME@
is
kn
te
A A
w.

Issued Date 2015/02/26 Deciphered Date 2016/02/26 DCIN / RTC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
BY511/BY710 0.3
ww
5 4 3 2 1
5 4 3 2 1
PL2 EMC@
JBATT2 VMB2 HCB2012KF-121T50_0805 For KB930 --> Keep PU1 circuit
1 PF2 VMB 1 2 PH201 under CPU botten side : (Vth = 0.825V)
1 2 15A_24V_F1206HB15V024T/M PL3
2
EMC@ CPU thermal protection at 92+-3 degree C
3 HCB2012KF-121T50_0805
3 4 1 2 1 2 For KB9012 (Red square) --> Remove PU201 circuit, but keep PR206
4 5 EC_SMCA PL4 EMC@
BATT+ Recovery at 56 +-3 degree C PH201, PR205,PR211,PQ201,PR208,PR212
5 6 EC_SMDA HCB2012KF-121T50_0805
6 7 1 2
7 8
1
8 9
9
m
10 PC6 EMC@ PC7 EMC@
D
10 11 1000P_0402_50V7K 0.01U_0402_25V7K D
+5VLP
2
11 12
12 13
GND1
1
+3VALW
co
14
100_0402_1%
GND2 15 [44,53] ADP_I
PR4
1
2
GND3 16 PC8
100_0402_1%
1
GND4
PR3
0.1U_0603_25V7-M PR5
@ 4.42K_0402_1% PR6 PR7
1
@ 13.7K_0402_1% 21.5K_0402_1%
ME@ 2
+3VS @ @
1
SUYIN_125022HB012M200ZL EC_SMB_CK1 [44,53] PU1
2
PD3 EMC_NS@ 1 8 NTC_V_1
a.
AZC199-02S.R7G_SOT23-3 VCC TMSNS1
2
2 7 OTP_N_002 2 1
EC_SMB_DA1 [44,53] GND RHYST1
1
PR8 3 6 Turbo_V_1 PR9
[6,44,56] H_PROCHOT# 100K_0402_1% OT1 TMSNS2 10K_0402_1%
PR10 @ 4 5 ADP_OCP_2 1 2 PRT1
@
1
1 2 @ OT2 RHYST2
+3VALW
2
D
0_0402_5%
100K_0402_1% G718TM1U_SOT23-8 PR11 100K_0402_1%_TSM0B104F4251RZ
10K_0402_1%
2
2ADP_OCP_1
PR12
PR13
PQ1 57.6K_0402_1% PR14
si
OTP_N_003
2N7002KW_SOT323-3 G @ 0_0402_5%
PR15
BATT_TEMP_IN 1 2 S
BATT_TEMP [44,53] A/D
1
10K_0402_5% @ @
@ PR16
1 2
MAINPWON [44,54]
0_0402_5%
ne
Turbo_V
NTC_V
[44]
[44]
PR17
1 2
[44] PROCHOT#
0_0402_5% @
C C
do
in
i-
is
B B
kn
te
w.
ww
A A
Issued Date 2015/02/26 Deciphered Date 2016/02/26 BATTERY CONN/OTP

Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
VIN PQ101 PQ102

P3
AON6426_DFN8-5 AON6414AL_DFN8-5
P2 PR102
1 1 PJ101 @ 0.01_1206_1%
2 2 JUMP_43X118
5 3 3 5 1 2 1 4
1 2 B+
2 3
m
4
10U_0805_25V6K
10U_0805_25V6K
1
2
D D
1
PC102
PC103
PC104
PC101 PR101 0.022U_0402_25V7K
1
4.7_0603_5%
co
2
470P_0402_50V7K
5
EMC@
EMC@
0.1U_0402_25V6
2
PQ103
PC105
AON6414AL_DFN8-5
1 2
PQ104
2N7002KW_SOT323-3 BQ24780_BATDRV 4
1
S
D
3 1
a.
PC107 PC106
1
@ 1U_0603_25V6K 0.1U_0402_25V6
3
2
1
2
PR103
G
2
499K_0402_1% PC108
2 1 2 1 0.01U_0402_25V7K
1
2
1M_0402_5% 1M_0402_5%
PR104 PR105 VIN BATT+
@ @
RB751V-40_SOD323-2
si
2
2
RB751V-40_SOD323-2
PD103
PD102
B+
2200P_0402_25V7-K
VIN
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
1
2
PC128
PC110
EMC@ PC109
4.02K_0603_1%
4.02K_0603_1%
ACN
ACP
PR107
PR108
PC111
ne
2
1
2
1
EMC@
PR111 BQ24780_VDD
2
1
PR110 10_1206_5%
64.9K_0603_1% 432K_0603_1%
ACN
ACP
C 1 2 PC112 PQ106 C
1
PR112 2 1 28 24 1 2 AON7408L_DFN8-5
2
1U_0603_25V6K VCC REGN 2.2U_0603_10V6-K PC113 4
2 1 6
PC114 ACDET PR113 PC115
0.1U_0402_25V6 25 BST_CHG1 2 2 1
do
BTST 2.2_0603_5% PR114
3
2
1
0.047U_0603_16V7K 4.7UH_PCMB063T-4R7MS_5.5A_20% 0.01_1206_1%
PR135 10K_0402_5% 3 26 DH_CHG PL101
CMSRC HIDRV
2 @ 1 1 2 CHG 1 4 BATT+
4
PR115 100K_0402_5% ACDRV 2 3
2
2 @ 1 27 LX_CHG
2200P_0402_25V7-K
BQ24780_VDD PHASE PR116 EMC@
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
0.1U_0402_25V6
2
1
PR117 1 2 0_0402_5% 5 4.7_0603_5%
PC116
PC117
PC131
EMC@ PC129
[44] ACIN ACOK
in
PC130
PR118
1 2 0_0402_5% 11
1 1
2
[44,52] EC_SMB_DA1 SDA PU102 23 DL_CHG 4
LODRV
EMC@
PR1191 2 0_0402_5% 12 22
BQ24780SRUYR PC118 EMC@
[44,52] EC_SMB_CK1 SCL GND 1000P_0402_50V9-J
2
PQ107
3
2
1
PR120 1 2 0_0402_5% 7 29 AON7408L_DFN8-5
0.1U_0402_25V6
0.1U_0402_25V6
[44,52] ADP_I IADP PAD
1
PR121 1 2 0_0402_5% 8 18 BQ24780_BATDRV
PC119
PC120
[44] BATT_I IDCHG BATDRV
i-
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
PR122 1 2 0_0402_5% 9
[56] PSYS
2
PMON 17 2 1
PR123 2 @ 1 BATSRC PR134 10_0603_5%
+3VALW
10K_0402_1% 20 2 1 SRP
10 SRP PR124 10_0603_5%
[44] VR_HOT#
1
PROCHOT#
2
13 PC123
CMPIN
0.1U_0402_25V6
BATPRES#
2
TB_STAT#
14
PC121
PC122
PC124
1
CMPOUT
is 2
21
ILIM
SRN
19
PR125
2 1
10_0603_5%
SRN
B B
PR126
16
15
0_0402_5%
+3VALW VIN
1
PR182
1 2 1 2
+3VALW BATT_TEMP [44,52]
kn
PR127
143K_0402_1% 32.4K_0402_1%
1
1
PR131
1
PR129 PC125 100K_0402_1%

750_0603_1% PR130 0.1U_0402_25V6
2
1M_0402_5%
2
2
IchargeLIM=7A
2
te
@
IDischargeLIM=10A
2
D PQ108A
PR132 2 ADAPTER_ID_ON#_G
0_0402_5% G
S 2N7002KDWH_SOT363-6
w.
1
ADAPTER_ID [44,51]
1
D
680P_0402_50V7K
5 ADAPTER_ID_ON# [44]
1
PR133 G
1M_0402_5%
1
0.1U_0402_25V6
S PQ108B
PC126
4
1
PD104 2N7002KDWH_SOT363-6
PC127
@
ww
AZ5123-01F.R7GR_DFN1006P2X2 @
A A
2
@
2
Issued Date 2015/02/26 Deciphered Date 2016/02/26 CHARGER

Custom
BY511/BY710 0.3
5 4 3 2 1
5 4 3 2 1
+3VALW
TDC :7A
OCP :9A
PU201
B+ SYX198BQNC_QFN10_3X3
Tolerance: +/-5%
@ PJ201
2 1
1.5A +3V_VIN 7 2 +3V_PWRGD
2 1 EN2 PG PR209 PC203
1
0_0603_5% 0.1U_0603_25V7-M +3VALW
m
EMC@ PC230
PC201
PC202
PC231
1M_0402_5%
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_25V7-K
2
1
JUMP_43X79 8 6 +3VBS1 2 1 2
PR201
D IN BS D
PL201 @ PJ202
8A
2
+3VALW_P
EMC@
9 10 +3VLX 1 2 2 1
2
GND LX 2 1
co
2.2UH_PCMB063T-2R2MS_8A_20%
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
0.1U_0402_25V6
2200P_0402_25V7-K
1
1
1 4 +3VALW_P JUMP_43X79
2
EN1 OUT
PC204
PC205
PC206
PC207
PC232
PC233
100mA +3VLP PR203
2
+3/5VALW_EN +3VALW_FB 3 5 4.7_0603_5%
FB LDO
EMC_NS@
EMC@
EMC@
4.7U_0603_6.3V6K
1 1
1
PC209
1
a.
PC210
2
@ PC208 PR204 1000P_0402_50V9-J
2
0.1U_0402_25V6 1M_0402_5% EMC_NS@
2
@
2
PC211 PR205
1 2 1 2
si
0.01U_0402_25V7K 1K_0402_1%
+3VL
+3VLP change 470P to 10nf for soft start time 2ms
PJ204
2 1
2 1
PR202
0_0402_5% JUMP_43X39
ne
EC_ON 1 2 +3/5VALW_EN
[44,62,66] EC_ON @
PD202 @
C RB751V-40_SOD323-2 C
1 2
[44,52] MAINPWON
do
+3VALW
2
PR206
100K_0402_5% +5VALW
PR207 @ TDC :7A
1
+3V_PWRGD 1 2
in
ALW_PWRGD [63,65] OCP :9A
PU202 0_0402_5% @
B+ SYX198CQNC_QFN10_3X3
Tolerance: +/-5%
PJ205 PR208
2 1
2.5A +5V_VIN 8 2 +5V_PWRGD 1 2
2 1 IN PG PR214 PC215
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_25V7-K
2
0_0603_5% 0.1U_0603_25V7-M 0_0402_5% @ +5VALW

PC213
PC214
JUMP_43X79 9 6 +5VBS1 2 1 2
EMC@ PC229
EMC@ PC212
GND BS
1
i-
@ PC216 PL202 PJ206
1 2+5VVCC 5 10 +5VLX 1 2 +5VALW_P 2 1
VCC LX PR210 2 1
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1U_0603_25V6M 0_0402_5% 2.2UH_PCMB063T-2R2MS_8A_20%
0.1U_0402_25V6
2200P_0402_25V7-K
2
2
1 4 1 2+5VALW_P JUMP_43X79
EN OUT PR211
PC217
PC218
PC219
PC220
PC225
PC226
PC227
PC228
100mA +5VLP 4.7_0603_5% @
1
+5VFB 3 7 EMC_NS@
+3/5VALW_EN FB LDO
1 1
EMC@
EMC@
4.7U_0603_6.3V6K
1
is PC223
PC222
1000P_0402_50V9-J
1M_0402_5%
2
1
B B
EMC_NS@
1
PR212
@ PC221
0.1U_0402_25V6
2
kn
PC224 PR213
1 2 1 2
1200P_0402_50V7-K 1K_0402_1%
change to 1000pf for usb switch on siv

te
change to 1200pf for ee noise on sit

w.
ww
A A
Issued Date 2015/02/26 Deciphered Date 2016/02/26 PWR_3VALW/5VALW

C
BY511/BY710 0.3

5 4 3 2 1
A B C D
PJ302
2 1
2 1
@ JUMP_43X118
PJ303 +1.2V
+1.2VP 2 1
2 1
@ JUMP_43X118
PJ304
2 1
+0.6VSP 2 1 +0.6VS
m
@ JUMP_43X39
1 1
co
+1.2VP
PJ301
B+
1
2 1 B+_1.2V
2 1 PC302
@ JUMP_43X79 10U_0603_6.3V6M
2200P_0402_25V
68P_0402_50V8J
47P_0402_50V8-J
0.1U_0402_25V6
+0.6VSP
2
10U_0805_25V6-K
10U_0805_25V6-K
1
a.
TDC: 1.5A
RF_NS@ PC301
PC303
PC304
PC305
PC307
PR302
PC306
100K_0402_1%
2 1
+3VALW
2
2
2
162K_0402_1%
1
RF@
EMC@
EMC@
PR303
+0.6VSP
PR304
@ 100K_0402_1%
+0.6VSP
1 2
+1.2VP
si
10U_0603_6.3V6M
0.1U_0402_6.3V7-K
2
1
PC308
PC309
5
14
11
13
19
20
2
+1.2V PQ301
PGND
VID
CS
VLDOIN
VTT
TDC :6A AON7408L PR301
PAD
21
ne
2.2_0603_5%
OCP : 8A 4 1 2 1 2 18
BOOT VTTGND
1
Tolerance: +/-5% PC310
2
0.22U_0603_25V7K DH_1.2V 17
UGATE VTTSNS
2 +0.6VSP 2
1
2
3
PL301
1UH_PCMB063T-1R0MS_12A_20% PU301 3 VTTREF_0.6V
1 2 LX_1.2V 16 GND
RT8231AGQW
do
+1.2VP PHASE
VTTREF_0.6V
4
VTTREF PR306
5
DL_1.2V
2200P_0402_25V7-K
15 5.1_0603_5%
470P_0402_50V7K
LGATE
1
2
PC311
12 2 1
0.1U_0402_25V6
1 1 VDD +5VALW
1
PGOOD
EMC@ PC312
@ PC314
PR307 PQ302
330U_2.5V_M
1
+
PC315
7.87K_0402_1% PR305 AON7534 5 1 PC316
TON
4.7_0603_5% VDDQ 0.033U_0402_16V7K
FB
S5
S3
in
2
2
EMC@
EMC_NS@ 4 PC317
2
2 1
2 1U_0402_10VA-K
10
2
PC318
2 TON_1.2V
1
1
2
3
S5_1.2V
S3_1.2V
680P_0402_50V7K PR309
1
EMC_NS@ 100K_0402_1%
PR308 1 2 +3VALW
i-
10K_0402_1%
887K_0402_1%
SM_PG_CTRL [6]
2
PR310
1 2
FB_1.2V
PR311
0_0402_5%
1
B+_1.2V
SUSP# [44,46]
is 1 2
1 2 @ PR312
3
[46] SYSON 0_0402_5%
3
1
PR313
0_0402_5% @ PC319
2
0.1U_0402_6.3V7-K
2
1
kn
@ PR314 @ PC320
0.1U_0402_6.3V7-K
2
47K_0402_5%
te
w.
ww
4 4
Issued Date 2015/02/26 Deciphered Date 2016/02/26 PWR-1.2V/+0.6VS

Custom
BY511/BY710 0.3

A B C D
A B C D
PJ704 EMC@ EMC@ 1.35VGS_B+

2 1 2A
B+ 2 1
@ JUMP_43X79
2200P_0402_25V7-K
10U_0805_25V6-K
10U_0805_25V6-K
0.1U_0402_25V6
1
1
PC743
PC729
PC730
PC744
2
m
1 1
PR729 PC728
PU703 0_0603_5% 0.1U_0603_25V7-M
1 10 BST_1.35VGS 1 2 2 1 PL703
co
PR727 VIN BST 0.68UH_PCMB063T-R68MS_16A_20%
100K_0402_1% 9 LX_1.35VGS 1 2
1 2 16 SW +1.35VGSP
4.7_0603_5%
NB685GQ-Z_QFN16_3X3
PR739 EN1 PR735 PC740
2
EN_1.35VGS 15 1.35VGS_FB
EMC_NS@
330U_B2_2.5VM_R9M
PR730
2 1 13 1M_0402_5% 220P_0402_50V7K
2200P_0402_25V7-K
[29] VDDQPWROK EN2 FB 1
2 1 2 1
22U_0805_6.3V6-M
22U_0805_6.3V6-M
22U_0805_6.3V6-M
0.1U_0402_25V6
1 1 1
1
PC833
+
0_0402_5%
PC732
PC733
PC734
PC736
PC737
PR732 2 1100K_0402_5% 1.35VGSPGD 12 6 +1.35VGSP @
+3VS PG VDDQ
a.
10_0402_1%
1
2
1
1.35VGS_3V33 2 2 2 2
PR737
1 2
499_0402_1%
680P_0402_50V7K
+3VALW 3V3
1
NB685_VTT
EMC_NS@
PR731 4.7_0402_5% PC739 5
VTT
1
PC735
PR740
1U_0402_6.3V6K
4
2
AGND 8 EMC@ EMC@
2
2 VTTS
2
1.35VGS_GND PGND 7 @
1U_0402_6.3V6K
VTTREF
1NB685_REF
si
1 2 2 1
1
VDDQ_SENSE [28]
PC745
Mode 14 11
MODE OTW# PR734 PR738
41.2K_0402_1% 0_0402_5%
2
2
1U_0402_6.3V6K
1 2 EN_1.35VGS PR733 @
[26] FBVDDQ_PWR_EN
1
0_0402_5%
10K_0402_1%
PC738
1M_0402_5%
PR736
0.1U_0402_10V6-K
2
2
PR726
ne
+3VS_AON 33K_0402_1%
1
1
PR728
PC727
2
2
1.35VGS_GND
2
2
PR832 1.35VGS_GND 2
1
10K_0402_5%
@ 1.35VGS_GND
do
1 2 PJ706
[27] VDDQ_OTW# 2 1
0_0402_5% 2 1
PR833 @ JUMP_43X79
PJ705
2 1
+1.35VGSP +1.35VS_VGA
in
2 1
@ JUMP_43X79
22U_0603_6.3V6-M
1
@
PC731
PJ505 2
i-
1 2
JUMPER
@
1.35VGS_GND
is
3 3
kn
te
w.
ww
4 4
Issued Date 2015/02/26 Deciphered Date 2016/02/26 1.35VS/+0.675VS

Custom
BY511/BY710 0.3

A B C D
5 4 3 2 1
PC401
2200P_0402_25V7-K
1 2 100K_0402_1%_TSM0B104F4251RZ
PR402 PR404 PR405
PRT402
0_0402_5% 14.3K_0402_1% 7.5K_0402_1%
1 2 1 2 VSN_1PH 1 2 1 2 1 2
[10] VSSSA_SENSE SW_1PH [59]
PR403 VCCST
1
PC402 1.21K_0402_1% PC404 PR406 PR409 PR410
1
1000P_0402_50V7K 1 2
2
100_0402_1%
10_0402_1%
45.3_0402_1%
PC403
2
PR408 0.022U_0402_25V7K
m
0.1U_0402_25V6
+3VS
2
D 2.37K_0402_1% PR487 D
1 2 1 2 VSP_1PH 1 2 0_0402_5% @
[10] VCCSA_SENSE 2 1 PR413
1
1
CPUCORE_PWRGD [6,44]
330P_0402_50V7K
PR407 PC405 @ 49.9_0402_1%
1
81205_SCLK
PC407
0_0402_5% 2 1 2200P_0402_25V7-K 1 2
co
2
PR412 SVID_CLK [6]
[59] CSN_1PH PWM1_1PH/ICCMAX1 [59]
PC406 PC408 1000P_0402_50V7K 47.5K_0402_1% PR414 PR415
2
1000P_0402_50V7K 1 2 81205_ALERT 2 1
10K_0402_1%
2
0_0402_5% -SVID_ALERT [6]
1 2
1
PR416 PR421 81205_SDIO 1 2
18.2K_0402_1% 34.8K_0402_1% PR417 SVID_DATA [6]
1 2 10_0402_1%
PR422 1 2 1 2 2 1
0_0402_5% 81205_SCLK CPUCORE_ON [44]
VSP_3PH_A PR419 81205_ALERT
a.
1 2 PC409 PR420
[9] VCCCORE_SENSE 1.5K_0402_1% 81205_SDIO
8200P_0402_50V7-K 0_0402_5%
1 2
2
PC411 PC410 PR424
1000P_0402_50V7K 15P_0402_50V 0_0402_5%
PR426 VSN_1PH 1 2
1
910_0402_1% VCCGT_SENSE [9]
1 2 1 2 VSN_3PH_A
[9] VSSCORE_SENSE
1
VSP_1PH PC412
PR425 1000P_0402_50V7K
si
0_0402_5% 1 2
2
PR428
PC413 1.21K_0402_1%
2200P_0402_25V7-K 1 2 1 2
VSSGT_SENSE [9]
PC414 PR429
PC416 1 2 0_0402_5%
53
52
51
50
49
48
47
46
45
44
43
42
41
40
PC415 PR431 470P_0402_50V7K
15P_0402_50V8J 49.9_0402_1% 2200P_0402_25V7-K
VR_RDY
SCLK
ALERT#
SDIO
PAD
VSP_1PH
VSN_1PH
COMP_1PH
ILIM_1PH
CSN_1PH
CSP_1PH
IMON_1PH
PWM_1PH/ICCMAX_1PH
EN
1 2 1 2 1 2 PR433
ne
22.6K_0402_1% PR437
PR472 PR434 1 2 PR435 22.6K_0402_1% PR436 PC418 PC419
4.02K_0402_1% 1K_0402_1% 100_0402_1% 1 2 49.9_0402_1% 470P_0402_50V7K 15P_0402_50V8J
C 1 2 1 2 1 2 PC420 VSP_3PH_A 1 39 1 2 1 2 1 2 1 2 C
470P_0402_50V7K VSN_3PH_A 2 VSP_3PH_A VR_HOT# 38 H_PROCHOT# [6,44,52] PC422
PC417 1 2 3 VSN_3PH_A VSP_3PH_B 37 470P_0402_50V7K 1 2 1 2 1 2
3300P_0402_50V7K DIFFOUT_3PH_A 4 IMON_3PH_A VSN_3PH_B 36 1 2
FB_3PH_A 5 DIFFOUT_3PH_A IMON_3PH_B 35 DIFFOUT_3PH_B PR438 PR439 PC421
COMP_3PH_A 6 FB_3PH_A DIFFOUT_3PH_B 34 FB_3PH_B 1K_0402_1% 3.74K_0402_1% 3300P_0402_50V7K
1 2 PR440 ILIM_3PH_A 7 COMP_3PH_A PU401 FB_3PH_B 33 COMP_3PH_B
CSCOMP_3PH_A ILIM_3PH_A COMP_3PH_B ILIM_3PH_B 1
do
13.7K_0402_1% 8 NCP81205MNTXG_QFN52_6X6 32 2 PR441
PR442 CSSUM_3PH_A 9 CSCOMP_3PH_A ILIM_3PH_B 31 16.2K_0402_1% CSCOMP_3PH_B
CSSUM_3PH_A CSCOMP_3PH_B
2
75K_0402_1% 10 30 CSSUM_3PH_B
PWM1_3PH_A/ICCMAX_3PH_A
PWM1_3PH_B/ICCMAX_3PH_B
CSREF_3PH_A CSSUM_3PH_B
1
1
CSP1_3PH_A 11 29
820P_0402_50V7-K
CSP2_3PH_A 12 CSP1_3PH_A CSREF_3PH_B 28 CSP1_3PH_B

220P_0402_50V9-G
820P_0402_50V7-K
PRT401 PR443 PRT403
PWM3_3PH_B/ROSC_3PH
PWM2_3PH_B/ROSC_1PH
CSP2_3PH_A CSP1_3PH_B
1
75K_0402_1%
220K_0402_5%_ERTJ0EV224J 13 27 220K_0402_5%_ERTJ0EV224J
220P_0402_50V9-G
1
1
PC577
PC426
PWM3_3PH_A/VBOOT
PC423
TTSENSE_1PH/PSYS
1
PWM2_3PH_A/ADDR
1
PC425
PC428
0.1U_0402_25V6
2
2
1
TTSENSE_3PH_A
TTSENSE_3PH_B
PR444 100K_0402_1%
2
1 2 @ B+ PC427
2
[56,57] SW1_3PH_A
2
2
CSP3_3PH_B
0.1U_0402_25V6 1 2
in
2
PR448 100K_0402_1% PR446 SW1_3PH_B [56,58]
1 2 PR445 165K_0402_1% PR447
[56,57] SW2_3PH_A
DRON
VRMP
165K_0402_1% 66.5K_0402_1%
VCC
PR449 100K_0402_1% PR451 @
1
1
1 2 1K_0402_1% 1 2
[56,57] SW3_3PH_A SW2_3PH_B [56,58]
14
15
16
17
18
19
20
21
22
23
24
25
26
PC429 PR450
1
0.1U_0402_25V6 PR452 0_0402_5% 66.5K_0402_1%
PC430 2 1 TSENSE_3PH_A CSP3_3PH_B 2 1
0.01U_0402_25V +5VALW
i-
PR820 10_0402_1% 1 2 PC431 PSYS [53]
1 2 0.1U_0402_25V6 PR458 PR478 10_0402_1%
[57] CSN1_3PH_A TSENSE_3PH_B 2 1 1 2
11.8K_0402_1%
PR821 10_0402_1% 2 1 1 2 CSN1_3PH_B [58]
[57] CSN2_3PH_A
1 2 CSREF_3PH_A +5VALW 1 2
CSREF_3PH_B
PR481 10_0402_1%
PR453 1 2
PR822 10_0402_1% 2.2_0603_1% PR455 CSN2_3PH_B [58]
2
1 2
53.6K_0402_1%
42.2K_0402_1%
[57] CSN3_3PH_A
1
PWM1_3PH_B/ICCMAX3B [58]
PR457
PC432
3.92K_0402_1%
1
2
1U_0402_10V6-K
is
PR475
B B
PR461
PR459 PR460 PWM2_3PH_B/DOSC1 [58] 2.15K_0402_1%
2
97.6K_0402_1% 97.6K_0402_1% CSP1_3PH_B 1 2
[57,58,59] DRON SW1_3PH_B [56,58]
1
[57] PWM1_3PH_A/ICCMAX3A
1
PC434
0.1U_0402_25V6
2
[57] PWM2_3PH_A/ADDR
PR456 CSREF_3PH_B
2.15K_0402_1% PR463
kn
1 2 CSP1_3PH_A 2.15K_0402_1%
[56,57] SW1_3PH_A [57] PWM3_3PH_A/VBOOT CSP2_3PH_B 1 2
2
SW2_3PH_B [56,58]
1
1
PR465
PC433 24.9K_0402_1% PC436
0.1U_0402_25V6 0.1U_0402_25V6
2
2
CSREF_3PH_A
1
PR462 CSREF_3PH_B
2.15K_0402_1%
1 2 CSP2_3PH_A
[56,57] SW2_3PH_A TSENSE_3PH_A TSENSE_3PH_B
te
1
PC435
2
1
0.1U_0402_25V6
2
PR466 PR469
CSREF_3PH_A
0_0402_5% 0_0402_5%
PR464
2.15K_0402_1%
1
2
1 2 CSP3_3PH_A
[56,57] SW3_3PH_A
1
1
w.
PC437 PR468 PR467

0.1U_0402_25V6 PRT404 61.9K_0402_1% PRT405 61.9K_0402_1%
2
220K_0402_5%_ERTJ0EV224J 220K_0402_5%_ERTJ0EV224J
CSREF_3PH_A
2
2
A A
ww
Issued Date 2015/02/26 Deciphered Date 2016/02/26 DC/DC VCCCPUCORE(NCP81205)

Custom 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. BY511/BY710
5 4 3 2 1
5 4 3 2 1
PL407 EMC@
EMC@ EMC@ HCB2012KF-121T50_0805
1 2
B+
PC438 PC439 PC440 PC441 PC442 PC443 1 1 1
68U_25V_M
68U_25V_M
68U_25V_M
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_25V7-K
0.1U_0402_25V6
+ + +
PC578
PC579
PC580
2
2
2 2 2
m
D 2.2_0603_1% D
5
PR470
2 1
AON6372_DFN
2
co
PC444
PQ401
0.22U_0603_25V7-K
HG_A1 4
1
PU402
NCP81151MNTBG_DFN8_2X2
1 8 PL401
BST DRVH 0.15UH_PCME064T-R15MS0R667_36A_20%
3
2
1
2 7 SW_A1 1 2
[56] PWM1_3PH_A/ICCMAX3A PWM SW VCCCPUCORE
2
3 6 @ @
a.
EN GND 1 1 1 1
[56,57] DRON PR471 PR496 PC445 PC446 PC447 PC448
4 5 4.7_0805_5% 0_0402_5% + + + +
AON6764_DFN
+5VALW VCC DRVL
FLAG
2 1
330U_D2_2VM_R9M
330U_D2_2VM_R9M
330U_D2_2VM_R9M
330U_D2_2VM_R9M
CSN1_3PH_A [56]
PQ402
1 1
1
PC450 LG_A1 4 PR497 2 2 2 2
1U_0402_10V EMC@ 0_0402_5%
9
PC449 2 1
2
1000P_0402_50V7K SW1_3PH_A [56]
2
EMC@
si
3
2
1
PL408 EMC@
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
HCB2012KF-121T50_0805 2 2 2 2 2 2 2 2 2 2
1 2
PC457
PC458
PC459
PC460
PC461
PC462
PC463
PC464
PC465
PC466
B+
ne
PC451 PC452 PC453 PC454 PC455 PC456
1
1 1 1 1 1 1 1 1 1 1
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_25V7-K
0.1U_0402_25V6
C C
2
5
PR473
2.2_0603_1%
do
2 1 EMC@ EMC@
AON6372_DFN
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2
PQ403
PC467 2 2 2 2 2 2 2 2 2 2
0.22U_0603_25V7-K 4
PC468
PC469
PC470
PC471
PC472
PC473
PC474
PC475
PC476
PC477
1
PU403 HG_A2
NCP81151MNTBG_DFN8_2X2 1 1 1 1 1 1 1 1 1 1
1 8 PL402
3
2
1
2 7 SW_A2 1 2
in
[56] PWM2_3PH_A/ADDR PWM SW
2
3 6
[56,57] DRON EN GND PR474 PR498
4 5 4.7_0805_5% 0_0402_5%
AON6764_DFN
+5VALW VCC DRVL
FLAG
2 1
CSN2_3PH_A [56]
PQ404
1
1
PC478 LG_A2 4 PR499

1U_0402_10V EMC@ 0_0402_5%
9
1
2 1
2
i-
PC479 SW2_3PH_A [56]
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1000P_0402_50V7K 2 2 2 2 2 2 2 2 2 2
3
2
1
PC480
PC481
PC482
PC483
PC484
PC485
PC486
PC487
PC488
PC489
EMC@
1 1 1 1 1 1 1 1 1 1
PL409 EMC@
B
is HCB2012KF-121T50_0805
1 2
B+
@ @ @ @ @ @ @ @ @ @
B
PC490 PC491 PC492 PC493 PC494 PC495

1
1
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_25V7-K
0.1U_0402_25V6
2
2
kn
PR476
5
2.2_0603_1%
2 1 EMC@ EMC@
AON6372_DFN
2
PC496
PQ405
0.22U_0603_25V7-K
HG_A3 4
1
PU404
te
1 8 PL403
3
2
1
2 7 SW_A3 1 2
[56] PWM3_3PH_A/VBOOT PWM SW
5
3 6
EN GND
2
[56,57] DRON PR500

4 5 PR477 0_0402_5%
AON6764_DFN
+5VALW VCC DRVL

FLAG
4.7_0805_5% 2 1
CSN3_3PH_A [56]
PQ406
1
LG_A3
w.
PC497 4 PR501
1
1U_0402_10V 0_0402_5%
9
EMC@ 2 1
2
SW3_3PH_A [56]
PC498
3
2
1
1000P_0402_50V7K
2
EMC@
A A
ww
Issued Date 2015/02/26 Deciphered Date 2016/02/26 PWR-VCC_CORE

Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
PL410 EMC@
EMC@ EMC@ HCB2012KF-121T50_0805
1 2
B+
PC499 PC500 PC501 PC502 PC503 PC504
m
D D
1
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_25V7-K
0.1U_0402_25V6
2
co
PR479
5
2.2_0603_1%
2 1
AON6372_DFN
2
PC505
PQ407
0.22U_0603_25V7-K
HG_B1 4
1
PU405
a.
1 8 PL404
3
2
1
2 7 SW_B1 1 2
[56] PWM1_3PH_B/ICCMAX3B PWM SW VCCGFXCORE
2
3 6 1 1 1 @ 1
[56,58] DRON EN GND PR480 PR502 PC507 PC508 PC509 PC506
4 5 4.7_0805_5% 0_0402_5% + + + +
AON6764_DFN
+5VALW VCC DRVL
FLAG
2 1
si
330U_D2_2VM_R9M
330U_D2_2VM_R9M
330U_D2_2VM_R9M
330U_D2_2VM_R9M
CSN1_3PH_B [56]
PQ408
1 1
1
PC510 LG_B1 4 2 2 2 2
1U_0402_10V EMC@ PR503
9
PC511 0_0402_5%
2
1000P_0402_50V7K 2 1
2
EMC@ SW1_3PH_B [56]
3
2
1
ne
C C
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2 2 2 2 2 2 2 2 2 2
PC512
PC513
PC514
PC515
PC516
PC517
PC518
PC519
PC520
PC521
1 1 1 1 1 1 1 1 1 1
do
PL411 EMC@
HCB2012KF-121T50_0805
1 2
B+
PC522 PC523 PC524 PC525 PC526 PC527
1
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_25V7-K
0.1U_0402_25V6
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2
2
2 2 2 2 2 2 2 2 2 2
PC528
PC529
PC530
PC531
PC532
PC533
PC534
PC535
PC536
PC537
in
PR482
5
2.2_0603_1% 1 1 1 1 1 1 1 1 1 1
2 1 EMC@ EMC@
AON6372_DFN
2
PC538
PQ409
0.22U_0603_25V7-K
HG_B2 4
1
PU406
i-
1 8 PL405
3
2
1
2 7 SW_B2 1 2
B [56] PWM2_3PH_B/DOSC1 PWM SW B
5
3 6 2
[56,58] DRON EN GND PR483 PR504
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
4 5 4.7_0805_5% 0_0402_5% 2 2 2 2 2 2 2 2 2 2
AON6764_DFN
+5VALW VCC DRVL

FLAG
2 1
PC539
PC540
PC541
PC542
PC543
PC544
PC545
PC546
PC547
PC548
CSN2_3PH_B [56]
is PQ410
1
1
PC549 LG_B2 4
1U_0402_10V EMC@ PR505 1 1 1 1 1 1 1 1 1 1
9
0_0402_5%
2
PC550 2 1
1000P_0402_50V7K SW2_3PH_B [56] @ @ @ @ @ @ @ @ @ @
3
2
1
EMC@
kn
te
A A
w.

ww
Issued Date 2015/02/26 Deciphered Date 2016/02/26 PWR-VCCGT

Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
m
D D
PL412 EMC@
EMC@ EMC@ HCB2012KF-121T50_0805
co
1 2
B+
PC551 PC552 PC555 PC556
1
2200P_0402_25V7-K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2
a.
PR485
5
2.2_0603_1%
2 1
PQ411
1
PC557 AON7408L
si
0.22U_0603_25V7K
PU407 HG_1PH4
2
1 8 PL406
BST DRVH 0.47UH_PCMB063T-R47MS_18A_20%
3
2
1
C LX_1PH C
2 7 1 2
ne
[56] PWM1_1PH/ICCMAX1 PWM SW VCCSA
2
3 6
[56] DRON EN GND
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
PR486
4 5
FLAG
PQ412 4.7_0805_5% 2 2 2 2 2 2 2 2
+5VALW VCC DRVL
PC558
PC559
PC560
PC561
PC562
PC563
PC564
PC565
AON7534 PR506
EMC@ 0_0402_5%
1 1
1
PC568 LG_1PH 4 2 1
do
9
1U_0402_10V CSN_1PH [56] 1 1 1 1 1 1 1 1

PC567
2
1000P_0402_50V7K PR507
2
EMC@ 0_0402_5%
3
2
1
2 1
SW_1PH [56]
in
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2 2 2 2 2 2 2
PC566
PC569
PC570
PC571
PC572
PC573
PC574
i-
1 1 1 1 1 1 1
B B
@ @ @
is
kn
te
A A
w.

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PWR-VCCSA
BY511/BY710
ww
5 4 3 2 1
5 4 3 2 1
m
D D
co
PL601 EMC@
HCB2012KF-121T50_0805
1 2
PL602 EMC@ B+
EMC@ EMC@ HCB2012KF-121T50_0805
1 2
2200P_0402_25V7-K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
PR604
1
a.
10K_0402_5%
5
2 1
PC602
PC603
PC604
PC605
PC606
PC607
PC608
PC609
[27,29,65] EN_VGA
2
PD601
AON6372_DFN
AON6372_DFN
RB751V-40_SOD323-2
PQ601
PQ602
1 2
UGATE1_VGA 4 4
PC601
2
.1U_0402_10V6-K
PR606 PC610
2.2_0603_5% 0.22U_0603_25V7K
si
+3VS_AON
3
2
1
3
2
1
@ PC611 1 2 1 2
0.1U_0402_10V6-K EDP-Continuous:51.1A
2 1 PL603
EDP-Peak:87A
2
0.22UH_PCMB104T-R22MS0R825_35A_20%
BOOT1_VGA
PR607 @ PHASE1_VGA 1 2
10K_0402_1% 1 2 +VGA_CORE
[27] PWMVID
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
330U_D2_2VM_R9M
330U_D2_2VM_R9M
330U_D2_2VM_R9M
1 1 1
PR608 2 2 2
1
2
1 2 PSI_VGA + + +
PC612
PC613
PC614
PC645
PC646
PC647
0_0402_5%
AON6764_DFN
AON6764_DFN
[27] GPU_PSI
PR612 PR610
ne
PQ603
PQ604
PR609 20K_0402_1% 4.7_0603_5%
2
0_0402_5% VREF 1 2 LGATE1_VGA 4 4 1 1 1 2 2 2

EMC_NS@
C PR613 C
1
20K_0402_1%
PR611 @ 1 2 1 2
1
VID_VGA
PSI_VGA
10K_0402_1%
VIDBUF
1
3
2
1
3
2
1
PC618 @ PR614 PC619
1
2200P_0402_50V7K 35.7K_0402_1% 1000P_0402_50V9-J VGA_CORE Output Capacitor:
2
PR615 EMC_NS@
2K_0402_5%
2 x 330uF SP(9mohm) +3 x 22uF(0603)
do
PR616 PR617
1
0_0402_5% 18K_0402_1%
2
1 2 1 2
HG1
BST1
VIDBUF
VID
PSI
EN
PC621
2200P_0402_50V7K
PR618 PC620 1 2 REFIN 7 24 PC622
100_0402_1% 0.01U_0402_25V7K REFIN PH1 4.7U_0603_6.3V6K PL604 EMC@
1 2 1 2 VREF 8 PU601 23 1 2 HCB2012KF-121T50_0805
PR619 VREF LG1 1 2
PR620 1 2 FS 9 NCP81172MNTWG_QFN24_4X4 22 PR621 PL605 EMC@ B+
FS PGND
in
0_0402_5% 0_0402_5% EMC@ EMC@ HCB2012KF-121T50_0805
1 2 43K_0402_1% FBRTN 10 21 PVCC_VGA 1 2 1 2
[24] VGA_VSS_SENSE FBRTN PVCC +5VALW
2200P_0402_25V7-K
PC624 PR622 FB_VGA 11 20
VR Remote Sense - Tie to GPU sense points
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
FB LG2
1
47P_0402_50V8-J 51_0402_1% PC625 10P_0402_50V8J

PC623 @ 1 2FB1_VGA 1 2 1 2 COMP_VGA 12 19
TALERT#
COMP PH2
1
1000P_0402_25V7-K
PGOOD
2
TSNS
PC627
PC628
PC629
PC630
PC631
PC632
PC633
PC634
BST2
GND
VCC
HG2
1 2 2 1 1 2FB2_VGA
1 2
[24] VGA_VCC_SENSE
2
5
5
i-
PR623 PR624 PC626 PR625 PR627 PC635
25
13
14
15
16
17
18
0_0402_5% 10K_0402_1% 100P_0402_50V8J 82K_0402_1% 2.2_0603_5% 0.22U_0603_25V7K
1 2 BOOT2_VGA 1 2 1 2
AON6372_DFN
AON6372_DFN
+VGA_CORE T ALERT_VGA
TSNS_VGA
PG_VGA
VCC_VGA
PQ605
PQ606
PR626
100_0402_1% UGATE2_VGA 4 4
PR628
5.9K_0402_1% PR629
VREF 2 1 0_0402_5%
1 2
100K_0402_1%_TSM0B104F4251RZ
GPU_PWRGD [26]
3
2
1
3
2
1
B B
.1U_0402_10V6-K
is
2
1
PRT601
1 2
@ PC636
PL606
PR630
+5VALW 0.22UH_PCMB104T-R22MS0R825_35A_20%
PHASE2_VGA 1 2
2_0603_5% +VGA_CORE
2
1
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
330U_D2_2VM_R9M
330U_D2_2VM_R9M
330U_D2_2VM_R9M
1 1 1
@
PC640 2 2 2
2
1U_0402_6.3V6K + + +
PC637
PC638
PC639
PC648
PC661
PC662
AON6764_DFN
AON6764_DFN
2
PR631
PQ608
PQ609
4.7_0603_5%
kn
LGATE2_VGA 4 4 1 1 1 2 2 2
EMC_NS@
1
1
PR632 @
3
2
1
3
2
1
10K_0402_1% PC644
2 1 1000P_0402_50V9-J
+3VALW
2
EMC_NS@
VGA_CORE Output Capacitor:
2 x 330uF SP(9mohm) +3 x 22uF(0603)
te
w.
A A
ww
Issued Date 2015/02/26 Deciphered Date 2016/02/26 PWR-VGA_CORE(NCP81174)

Custom
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
m
D D
co
a.
si
ne
C C
do
in
i-
is
B B
kn
te
w.
ww
A A
Issued Date 2015/02/26 Deciphered Date 2016/02/26 P61_PWR-VGA_CORE

C
BY511/BY710 0.3

5 4 3 2 1
5 4 3 2 1
For EE PWR Sequence

1 2
[44,46] SUSP#
m
D D
1K_0402_1%
PR829
1 2
co
[44,54] EC_ON
1K_0402_1%
2
PR702
1
2
@
PC701 @ PR704
0.1U_0402_10V6-K 1M_0402_5%
@ PR703
2
VCCIO
a.
100K_0402_1%
1
1
FSW=800KHz
2
PJ701
1
EMC@ EMC@
8 1 PR705 PC702
TDC:5.5A
B+ 2 1 IN EN
OCP:8A
2200P_0402_25V7-K
10U_0805_25V6-K
10U_0805_25V6-K
0.1U_0402_25V6
0_0603_5% 0.1U_0603_25V7K
@ JUMP_43X79 6 BS_VCCIO 1 2 1 2 PL701
si
BS
1
1
PC703
PC741
PC704
1UH_PCMB063T-1R0MS_12A_20%
SW_VCCIO
@
PC742
9 10 1 2
GND LX VCCIO_P
2
2 FB_VCCIO
2200P_0402_25V7-K
330P_0402_50V8J
PU701 FB 4
+3VALW
22U_0805_6.3V6-M
22U_0805_6.3V6-M
22U_0805_6.3V6-M
22U_0805_6.3V6-M
0.1U_0402_25V6
3 1 1 1 1
ILMT
1
7
C BYP +3VALW C
1
PC705
PC706
PC707
PC708
PC709
PC710
PC711
PR706
ne
PR707 SYX198DQNC 4.7_0603_5%
2
@ 0_0402_5% 2 2 2 2 2
EMC_NS@
2
PG
1
1 2 5
1 1
LDO PR708
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
PR709 10_0402_1%
1
2 1 PC712 EMC@ EMC@
2
PC713
PC714
680P_0402_50V7K
do
2
2
100K_0402_5% EMC_NS@ PR710
2
1K_0402_1%
1
PR711 PR712 PR713
1
0_0402_5% 36.5K_0402_1% 0_0402_5%
1 2 2 1
VCC_IO_SEN [10]
in
For EE PWR Sequence
2
1
PR714
62K_0402_1%
PR828 PR715
0_0402_5% 0_0402_5%
2
2 1 2 1
[44] VCCIO_PG VSS_IO_SEN [10]
i-
1
B PR716 B
10_0402_1%
2
is
kn
PJ702
2 1
VCCIO_P 2 1 VCCIO
@ JUMP_43X79
te
A A
w.

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PWR-VCCIO
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
BY511/BY710 0.3
ww
5 4 3 2 1
5 4 3 2 1
m
D D
co
+3VS
a.
1
si
PR717 +2.5V
100K_0402_1%
TDC: 1 A
SY8032ABC_SOT23-6
2
PL702
1UH_PH041H-1R0MS_3.8A_20%
C 4 3 +2.5V_LX 1 2 C
+5VALW +2.5V_P
ne
IN LX
1
5 2
PG GND
2200P_0402_50V7K
2200P_0402_50V7K
22U_0805_6.3V6-M
22U_0805_6.3V6-M
22U_0805_6.3V6-M
22U_0805_6.3V6-M
0.1U_0402_25V6
0.1U_0402_10V6-K
1 1 PR719 1 1
1
1
PC717
PC718
PC720
PC721
6 1 4.7_0603_5%
FB EN
1
PC715
PC716
PC722
PC723
PC719
EMC_NS@
1
PU702 68P_0402_50V8J
2
1 2
2
2 2 2 2
do
2
PR720
PC725 36.5K_0402_1%
EMC@ 680P_0402_50V7-K
EMC@
2
EMC_NS@
EMC@ EMC@
PR721 @
in
0_0402_5%
1 2
[54,65] ALW_PWRGD
1
PR723 PR722
0_0402_5% 11.5K_0402_1%
1 2 EN_+2.5V
[46] SYSON
i-
2
2
B For EE PWR Sequence B

1
PR724
1M_0402_5% PC726
0.1U_0402_10V6-K
2
1
is
PJ703
2 1
+2.5V_P 2 1 +2.5V
JUMP_43X39
@
kn
te
A A
w.

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PWR+2.5V
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
BY511/BY710 0.3
ww
5 4 3 2 1
A B C D
1 1
m
+3VS
co
1
PR802
100K_0402_1%
+1.05VS_VGA
2
PR801
a.
TDC: 2.5A
1 2
[29] VDDAPWROK
PL801
0_0402_5%
4
PJ16 1UH_PH041H-1R0MS_3.8A_20%
2 1 VIN_+1.05VSP 10 1 1.05VGA_LX 1 2
+5VALW +1.05VS_VGAP
PG
2 1 PVIN2 LX1
si
10U_0603_10V6-K
10U_0603_10V6-K
@ JUMP_43X79 9 2
PVIN1 LX2
EMC_NS@
1
1
PC803
PC804
8 3 PR803
SVIN1 LX3
22P_0402_25V8-J
4.7_0603_5%
PU801 PR804
2
2200P_0402_50V7K
PC805
22U_0805_6.3V6-M
22U_0805_6.3V6-M
0.1U_0402_25V6
RT8068AZQW 7.5K_0402_1% 1 1
1
PC806
PC807
2 2
5 6
GND
EN FB
ne
PC808
PC809
NC
EMC_NS@
2
PC811
2
PR805 @ 680P_0402_50V7-K 2 2
11
1
0_0402_5%
1 2
[54,63] ALW_PWRGD
PR807
1
do
39K_0402_1%
1 2 EN_1.05VGA PR806 EMC@ EMC@
[29,60] EN_VGA 10K_0402_1%
2
2
in
PJ801
1
PR808 PC812 2 1
1M_0402_5% 0.1U_0402_10V6-K +1.05VS_VGAP 2 1 +1.05VS_VGA
@ JUMP_43X79
2
20141211 For EE net name

1
i-
3 3
is
kn
te
4 4
w.

Issued Date 2015/02/26 Deciphered Date 2016/02/26 PWR-+1.05ALW
ww
B
BY511/BY710 0.3

A B C D
A B C D
m
1 1
co
a.
PR810
100K_0402_5%
1 2 1.0VS_EN
[44,54] EC_ON
For EE PWR Sequence
1M_0402_5%
1
PR811
si
PC813
0.1U_0402_10V6-K
2
+1.0VALW
TDC:8A
OCP:12A
ne
2 PJ802 2
2 1 B+_1.0VS 8 1 PR812 PC814

B+ 2 1 IN EN 0_0603_5% 0.1U_0603_25V7K
JUMP_43X79 EMC@ EMC@ 6 1 2 1 2 PL802
BS
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
1UH_PCMB063T-1R0MS_12A_20%
1
1
1.0VS_LX
PC817
9 10 1 2
@ GND LX +1.0VALWP
PC816
PC815
PC832
PU802 FB 4
2
2200P_0402_25V7-K
3
do
ILMT 7 +3VALW For EE PWR Sequence
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
0.1U_0402_25V6
PR813 @
BYP
1
4.7_0603_5%
PC818
PC819
PC820
PC821
PC822
PC823
PC824
PC825
SYX198DQNC EMC_NS@
2
330P_0402_50V8J
@ PR814
1 SNUB_1.0VS 1
2
0_0402_5% PG 5 1.0VS_LDO
LDO
1
1.0VS_LIMT
PC826
1 2
+3VALW
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
in
2
2
1
PC827
PC828
EMC@ EMC@
PR815 PR816
2
0_0402_5% 90.9K_0402_1%
2
@ PC829
1K_0402_1%
PR817 680P_0402_50V7K
1
2
PR818
100K_0402_5% EMC_NS@
PJ803 @
1
i-
1
1.0VS_FB 2 1
+1.0VALWP 2 1 +1.0VALW
For EE PWR SequenceJUMP_43X118
+3VALW
3 3
1
PR819
is 133K_0402_1%
2
kn
te
w.
4 4
ww

Issued Date 2015/02/26 Deciphered Date 2016/02/26 +1.0VS
Custom
BY511/BY710 0.3

A B C D

Lenovo Ideapad Y700

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Lenovo Ideapad Y700

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A B C D E

Intel Skylake H-Processor with DDR4 + NV N16P-GX GPU

Security Classification LC Future Center Secret Data Title

Date: Friday, July 31, 2015 Sheet 1 of 66

Intel CPU Dual Channel DDR4-SO-DIMM X2

eDP Conn eDP x4 Lane DMI *4

USB2.0 1x USB Left with charge

HD Audio Page 3~13

Codec SPK Conn.

Int. MIC Conn. HP&Mic Combo Conn. MIC Board

Security Classification LC Future Center Secret Data Title

Issued Date 2015/02/26 Deciphered Date 2016/02/26 Block Diagram

Date: Friday, July 31, 2015 Sheet 2 of 66

Voltage Rails ( O --> Means ON , X --> Means OFF )

S3 RANKA@ For VRAM RankA part

WLAN Thermal PCH TP M4GX8@ Micron 256Mx16 VRAM x8pcs sku

EC_SMB_DA2 +3VS +3VGS X +3VS +3VS +3VALW_PCH

EC SM Bus1 address EC SM Bus2 address PCH SM Bus address

Security Classification LC Future Center Secret Data Title

Date: Friday, July 31, 2015 Sheet 3 of 66

Security Classification LC Future Center Secret Data Title

2015/02/26 Deciphered Date

Date: Friday, July 31, 2015 Sheet 4 of 66

UC1C SKYLAKE_HALO CAD Note:

[19] DMI_CRX_PTX_N3 DMI_RXN[3] DMI_TXN[3] DMI_CTX_PRX_N3 [19]

Security Classification LC Future Center Secret Data Title

Date: Friday, July 31, 2015 Sheet 5 of 66

Change RC28,RC29,RC15,RC13,RC16,RC17 to R-Short

BH31 BT19 CFG15@ PAD 1

DDR_PG_CTRL BT13 BN22 @ PAD 1

EC_PECI BT34 BR28

C TC100 1 E1 RSVD_TP_1 RSVD_TP_7 BL33 1 TC90 C

A37 RSVD_32 BT17

@ RSVD_42 NCTF_6 VCCIO

10K_0402_5% 10K_0402_5% SKYLAKE-H-CPU_BGA1440

Change RC22 to 0ohm jump after SDV phase

1K_0402_1% RC56 RC53 RC54 RC52 RC51 RC55

Security Classification LC Future Center Secret Data Title

Date: Friday, July 31, 2015 Sheet 6 of 66

SKYLAKE_HALO UC1A SKYLAKE_HALO UC1B

DDRA_DQS#[0..7] [12] DDR CHANNEL B

DDR_VREF_CA : Connected to VREF_CA on DIMM CH-A

SM_RCOMP0 RC5 1 2 121_0402_1%

Max trace length= 500 mil

Security Classification LC Future Center Secret Data Title

Issued Date 2015/02/26 Deciphered Date 2016/02/26 CPU (3/7) DDRVI

Date: Friday, July 31, 2015 Sheet 7 of 66

HDMI_TX2+ K36 BGA1440 D29 CPU_EDP_TX0+

Security Classification LC Future Center Secret Data Title

Date: Friday, July 31, 2015 Sheet 8 of 66

Security Classification LC Future Center Secret Data Title

Date: Friday, July 31, 2015 Sheet 9 of 66

VCCSA +1.2V VCCSA

G21 G11 1 PAD @ BM16 VCCOPC_SENSE

H17 H30 VCCSTG BM22

CRB place to CPU

RC150 1 2 VCCSA_SENSE_R RC152 1 VSSIO_SENSE_R

Security Classification LC Future Center Secret Data Title

Date: Friday, July 31, 2015 Sheet 10 of 66

Security Classification LC Future Center Secret Data Title

Date: Friday, July 31, 2015 Sheet 11 of 66

+3VS +3VS +3VS

RD23 RD25 RD27