4GBF0632

4GBF0632
Medium Voltage IGBT Inverter

TMdrive-MVe2
Function Manual
01 - 11 Series
Rev. S
Jun. 2018
TOSHIBA MITSUBISHI-ELECTRIC
INDUSTRIAL SYSTEMS CORPORATION
© TOSHIBA MITSUBISHI-ELECTRIC
INDUSTRIAL SYSTEMS Corporation ,
2014 - 2018, All Rights Reserved.
TM_F50000B
4GBF0632
Contents
1 Application Equipment and Usage Notes ............................................................................................................................... 6
1.1 Introduction ............................................................................................................................................................ 6
1.2 Reading this Manual .............................................................................................................................................. 7
2 Description of Equipment Protection and Fault Signals .......................................................................................................... 9
2.1 Protection ............................................................................................................................................................ 18
2.1.1 Cell inverter failure ...................................................................................................................................... 18
2.1.2 Current-related protection ........................................................................................................................... 21
2.1.3 Voltage protection ....................................................................................................................................... 28
2.1.4 Main circuit and control power supply protection ......................................................................................... 29
2.1.5 Operation-related protection ........................................................................................................................ 34
2.1.6 Control circuit-related protection.................................................................................................................. 38
2.2 Protection for Inverter .......................................................................................................................................... 45
2.2.1 Motor speed protection................................................................................................................................ 45
2.2.2 Motor/break related protection .................................................................................................................... 47
2.2.3 Motor control related protection ................................................................................................................... 49
2.3 Synchronize Transfer and Capture ...................................................................................................................... 51
2.4 Protection for Converter....................................................................................................................................... 52
2.4.1 Pre-charge-related protection ...................................................................................................................... 52
2.4.2 Ground detection-related protection ............................................................................................................ 53
2.4.3 Power supply related protection .................................................................................................................. 54
2.5 Protection for SM Control .................................................................................................................................... 56
2.6 Motor protection ................................................................................................................................................... 59
2.7 Transformer protection ........................................................................................................................................ 70
2.8 Others .................................................................................................................................................................. 74
3 Parameter Explanation ......................................................................................................................................................... 76
3.1 Ratings and Information Settings ......................................................................................................................... 76
3.1.1 System settings ........................................................................................................................................... 76
3.1.2 Drive ratings ................................................................................................................................................ 78
3.1.3 Motor ratings ............................................................................................................................................... 80
3.1.4 Drive information ......................................................................................................................................... 82
3.2 Interface I/F.......................................................................................................................................................... 84
3.2.1 Digital /Serial input ...................................................................................................................................... 84
3.2.1.1. General purpose digital input assignment ........................................................................................... 85
3.2.1.2. DI_EX1, SERSEQDATA1 (DI_DATA1)............................................................................................... 90
3.2.1.3. DI_EX2, DI_DATA2 ............................................................................................................................ 92
3.2.1.6. DI_EX5, SERSEQDATA5, DI_DATA5 ................................................................................................ 97
3.2.1.7. DI_EX6, SERSEQDATA6, DI_DATA6 ................................................................................................ 98
3.2.1.8. DI_EX7, CMDWORD1, DI_DATA_CMD1 (DI_DATA1) ...................................................................... 99
3.2.1.9. DI_EX9, DI_DATA9 .......................................................................................................................... 101
3.2.1.10. DI_EX10, DI_DATA10 .............................................................................................................. 102
3.2.1.11. DI_EX11, DI_DATA11 .............................................................................................................. 103
3.2.2 Internal digital input ................................................................................................................................... 104
3.2.2.1. DI_IN3, DINT_DATA3 ....................................................................................................................... 104
3.2.2.2. DI_INT_GIF, DINT_DATA_GIF ......................................................................................................... 105
3.2.3 Digital output ............................................................................................................................................. 106
3.2.3.1. General purpose digital output .......................................................................................................... 106
3.2.4 Analog input .............................................................................................................................................. 109
3.2.4.1. General analog input......................................................................................................................... 109
3.2.4.2. Internal analog input ......................................................................................................................... 112
3.2.5 Analog output ............................................................................................................................................ 115
3.2.5.1. General analog output ...................................................................................................................... 115
3.2.5.2. Measurement analog output ............................................................................................................. 118
3.2.5.3. Note of analog outputs ...................................................................................................................... 120
3.2.6 Serial communication ................................................................................................................................ 121
3.2.6.1. Transmission protocol types ............................................................................................................. 122
3.2.6.2. Sequence input ................................................................................................................................. 124
3.2.6.3. Sequence output ............................................................................................................................... 125
3.2.6.4. Optional sequence input/output ........................................................................................................ 128
3.2.6.5. Connection status of motor breakers ................................................................................................ 129
3.2.7 Serial input / output signals ....................................................................................................................... 130
3.2.7.1 Serial input signals ............................................................................................................................ 130
3.2.7.2 Serial output signals.......................................................................................................................... 132
3.2.8 Transmission parameters .......................................................................................................................... 133
Rev.S
1
4GBF0632
3.2.8.1 Common transmission parameters ................................................................................................... 133
3.2.8.2 Common transmission parameters ................................................................................................... 143
3.2.8.3 EGD .................................................................................................................................................. 145
3.2.8.4 Transmission between drives ........................................................................................................... 147
3.2.8.5 DeviceNet ......................................................................................................................................... 148
3.2.9 Speed sesor .............................................................................................................................................. 152
3.2.9.1 Pulse Generator - PLG ..................................................................................................................... 152
3.2.9.2 Resolver............................................................................................................................................ 156
3.2.9.3 Speed pulse signal output (single end type) ..................................................................................... 161
3.2.10 Temperature detection .............................................................................................................................. 162
3.2.10.1 Motor temperature detection .................................................................................................... 162
3.2.10.2 Input transformer temperature detection .................................................................................. 165
3.2.10.3 Cell inverter overheat detection ................................................................................................ 165
3.2.11 Precharge .................................................................................................................................................. 166
3.3 Protection .......................................................................................................................................................... 168
3.3.1. General protection ..................................................................................................................................... 168
3.3.1.1. Current limit ...................................................................................................................................... 169
3.3.1.2. DC bus voltage ................................................................................................................................. 173
3.3.1.3. Speed protection ............................................................................................................................... 175
3.3.1.4. Motor brake ....................................................................................................................................... 176
3.3.1.5. Grounding detection.......................................................................................................................... 177
3.3.1.6. Output voltage error detection .......................................................................................................... 178
3.3.1.7. Reactor overheat .............................................................................................................................. 179
3.3.1.8. Phase loss detection ......................................................................................................................... 179
3.3.1.9. Miscellaneous ................................................................................................................................... 180
3.3.2. Traceback ................................................................................................................................................. 182
3.4 Sequence .......................................................................................................................................................... 187
3.4.1. Fault sequence .......................................................................................................................................... 187
3.4.1.1. BLF (Field critical fault) ..................................................................................................................... 188
3.4.1.2. BLR (Electric critical fault mask) ....................................................................................................... 189
3.4.1.3. UVA (Electrical ready condition) ....................................................................................................... 203
3.4.1.4. UV (Electrical condition).................................................................................................................... 207
3.4.1.5. READY (Operation ready complete) ................................................................................................. 209
3.4.1.6. HFD (Critical fault) ............................................................................................................................ 211
3.4.1.7. SIL (Starting interlock) ...................................................................................................................... 213
3.4.1.8. STPRQ (Stop request) ...................................................................................................................... 215
3.4.1.9. LFD (Minor fault) ............................................................................................................................... 217
3.4.2. Operational sequence ............................................................................................................................... 219
3.4.3. Brake sequence ........................................................................................................................................ 220
3.5 Inverter Basic Functions .................................................................................................................................... 221
3.5.1. Speed reference ........................................................................................................................................ 222
3.5.1.1. Speed rate ........................................................................................................................................ 223
3.5.1.2. Speed limit ........................................................................................................................................ 232
3.5.1.3. Drooping ........................................................................................................................................... 234
3.5.2. Speed control ............................................................................................................................................ 236
3.5.2.1. Setting common to speed control...................................................................................................... 236
3.5.2.2. ASPR ................................................................................................................................................ 237
3.5.2.3. ASR .................................................................................................................................................. 239
3.5.3. Torque reference and current reference.................................................................................................... 242
3.5.3.1. Speed control and tension control..................................................................................................... 242
3.5.3.2. IQ limit............................................................................................................................................... 243
3.5.3.3. Slip frequency ................................................................................................................................... 247
3.5.4. Current control........................................................................................................................................... 249
3.5.4.1. D-Q axis current control .................................................................................................................... 249
3.5.5. Voltage reference ...................................................................................................................................... 254
3.6 Inverter Optional Function ................................................................................................................................. 255
3.6.1. Field weakening ........................................................................................................................................ 255
3.6.2. Torque control ........................................................................................................................................... 257
3.6.3. Motor parameter group and Speed control gain selection ......................................................................... 261
3.6.4. Simulator Following Control (SFC) ............................................................................................................ 265
3.6.5. Sensorless vector control .......................................................................................................................... 267
3.6.5.1. Cautions............................................................................................................................................ 267
3.6.5.2. Switching Sensorless vector control and Vector control with speed sensor...................................... 277
3.6.5.3. Multiple motor parallel operation ....................................................................................................... 278
3.6.6. Volts/Hertz control ..................................................................................................................................... 281
3.6.6.1. Volts/Hertz pattern selection ............................................................................................................. 283
3.6.6.2. Start-up adjustment........................................................................................................................... 285
3.6.6.3. Standard V/f voltage boost at low speed........................................................................................... 286
3.6.6.4. Advanced V/f voltage boost .............................................................................................................. 287
3.6.6.5. Stability compensation ...................................................................................................................... 289
Rev.S
2
4GBF0632
3.6.6.6. Flying restart ..................................................................................................................................... 291
3.6.6.7. Stall compensation............................................................................................................................ 292
3.6.6.8. Voltage regulator and adjustment ..................................................................................................... 293
3.6.6.9. Over voltage protection ..................................................................................................................... 294
3.6.6.10. Momentary voltage drop ride-through ...................................................................................... 296
3.6.6.11. Slip compensation .................................................................................................................... 297
3.6.6.12. Current limit .............................................................................................................................. 298
3.6.7. Synchronous motor (SM) control ............................................................................................................... 299
3.6.7.1. Exciter interface ................................................................................................................................ 300
3.6.7.2. Control overview ............................................................................................................................... 301
3.6.7.3. Exciter current control ....................................................................................................................... 303
3.6.7.4. Initial position detection..................................................................................................................... 305
3.6.7.5. IQ constant starting ........................................................................................................................... 307
3.6.7.6. Voltage PLL ...................................................................................................................................... 309
3.6.7.7. Voltage control while Voltage PLL .................................................................................................... 310
3.6.7.8. Protection for Synchronous Motor control ......................................................................................... 314
3.6.7.9. Power factor adjustment ................................................................................................................... 315
3.6.7.10. Synchronous transfer and capture ........................................................................................... 315
3.6.7.11. Synchronous Motor control with Position sensor ...................................................................... 316
3.6.7.12. Initial rotor position adjustment ................................................................................................. 318
3.6.7.13. Cautions for Permanent Magnet Synchronous Motor(PMSM) Control ..................................... 319
3.6.7.14. Current angle setting of PMSM ................................................................................................ 320
3.6.7.15. Weak field control for PMSM .................................................................................................... 321
3.6.7.16. PMSM control with PLG ........................................................................................................... 322
3.6.8. JOG operation ........................................................................................................................................... 323
3.6.8.1. Standard JOG speed ........................................................................................................................ 323
3.6.8.2. Optional JOG speed ......................................................................................................................... 325
3.6.9. Flying restart.............................................................................................................................................. 326
3.6.10. Emergency operation ................................................................................................................................ 329
3.6.10.1. Emergency operation mode ..................................................................................................... 329
3.6.10.2. E-HOLD mode .......................................................................................................................... 329
3.6.11. Shared motion ........................................................................................................................................... 330
3.6.12. RMFC control ............................................................................................................................................ 335
3.6.13. Distributed control ..................................................................................................................................... 337
3.6.14. General purpose function .......................................................................................................................... 341
3.6.14.1. Analog speed reference lost (SP_LOST) ................................................................................. 342
3.6.14.2. Speed reach detection (SP_RCH, FLG_SP_RCH=1) .............................................................. 345
3.6.14.3. Speed following detection (SP_RCH, FLG_SP_RCH=0) ......................................................... 347
3.6.14.4. Low speed detection (SP_LOW) .............................................................................................. 348
3.6.14.5. Motor stall detection (ROT_F) .................................................................................................. 349
3.6.14.6. Motor reverse rotation detection (REV_ROT_F) ...................................................................... 352
3.6.14.7. Speed detection error (SP_ERR, SP_ERR2) ........................................................................... 353
3.6.14.8. Automatic sensor-less mode change in Differential PG error ................................................... 356
3.6.14.9. Analog speed input dead-band................................................................................................. 357
3.6.14.10. Overload auto speed reduction (Soft stall) ............................................................................... 358
3.6.14.11. Current de-rating at high temperature (CS_DERATE) ............................................................. 360
3.6.14.12. Energy saving drive .................................................................................................................. 361
3.6.14.13. Low load detection (UL, UL_A)................................................................................................. 363
3.6.14.14. Start command type and selection (EXT0/1, START0/1, STOP0/1, DIR0/1, SEL_DI) ............. 365
3.6.14.15. Frequency Jump....................................................................................................................... 368
3.6.14.16. Torque release/reduction rate (Torque helper option) .............................................................. 370
3.6.14.17. Spare sequence assignment (FUNC_SPA).............................................................................. 371
3.6.14.18. Simple programmable logic (FUNC1~4)................................................................................... 372
3.6.14.19. Option data substitution processing(FUNC_GET, FUNC_PUT) ............................................... 374
3.6.14.20. Interface extension of DI/O, AI/O for PLC................................................................................. 375
3.6.14.21. Speed reference process (PID) control (OP_PR) ..................................................................... 376
3.6.14.22. Auto retry (RTRY) ..................................................................................................................... 378
3.6.14.23. Output open inverter operation test mode ................................................................................ 380
3.6.14.24. Fans control.............................................................................................................................. 381
3.6.14.25. EC fans speed control .............................................................................................................. 383
3.6.14.26. Event counter (EVENT) ............................................................................................................ 386
3.6.14.27. Time synchronization by using digital or serial communication input ....................................... 387
3.6.15. Restart after instantaneous power failure .................................................................................................. 388
3.6.16. Utility voltage phase lock loop (PLL) ......................................................................................................... 391
3.6.17. Synchronous transfer and capture ............................................................................................................ 393
3.6.17.1. System settings for SyncXFR and SyncCPT ............................................................................ 394
3.6.17.2. System interface....................................................................................................................... 397
3.6.17.3. Utility current interface .............................................................................................................. 399
3.6.17.4. Synchronous transfer (XFR) ..................................................................................................... 400
3.6.17.5. Capture to the drive (CPT) ....................................................................................................... 405
Rev.S
3
4GBF0632
3.6.18. Other functions .......................................................................................................................................... 408
3.6.18.1. Voltage saturation compensation (VSC)................................................................................... 408
3.6.18.2. Variable current limiter control (CLC) ....................................................................................... 410
3.6.18.3. ASPR torque forcing ................................................................................................................. 411
3.6.18.4. Torque compensation ............................................................................................................... 412
3.6.18.5. Dynamo .................................................................................................................................... 415
3.6.18.6. Voltage minor control ............................................................................................................... 417
3.6.18.7. Motor current balancing control (IBC) ....................................................................................... 418
3.6.18.8. Simulation mode....................................................................................................................... 419
3.6.18.9. Others....................................................................................................................................... 422
3.7 Converter Basic Function .................................................................................................................................. 424
3.7.1. DC Bus Voltage reference ......................................................................................................................... 424
3.7.2. DC Bus Voltage control ............................................................................................................................. 425
3.7.3. Converter Current control .......................................................................................................................... 429
3.7.4. Converter Current overload/ over current protection ................................................................................. 430
3.7.5. Converter voltage phase lock loop gain .................................................................................................... 432
3.7.6. Converter PLL error detection ................................................................................................................... 433
3.7.7. Restart (Retry) function when detecting input voltage disturbance ........................................................... 437
3.8 Converter Optional Function .............................................................................................................................. 439
3.8.1. Reactive current/ voltage control (RCV Control)........................................................................................ 439
3.8.2. Voltage saturation compensation (VSC) ................................................................................................... 446
3.8.3. Other converter function ............................................................................................................................ 447
3.9 Motor protection function ................................................................................................................................... 449
3.9.1. Motor protection detection ......................................................................................................................... 452
3.9.2. Motor protection operation command ........................................................................................................ 457
3.9.2.1. Motor cooling fan operation command .............................................................................................. 457
3.9.2.2. Space heater on command ............................................................................................................... 462
3.9.2.3. Oil lubrication operation command.................................................................................................... 465
3.9.3. Motor protection sequence ........................................................................................................................ 469
3.10 External Transformer protection function ........................................................................................................... 483
3.10.1. External Transformer protection detection ................................................................................................ 483
3.10.2. External Transformer protection sequence ............................................................................................... 484
3.11 Other Function ................................................................................................................................................... 486
3.11.1. Enhanced keypad (KPAD) setting ............................................................................................................. 486
3.11.2. IP address setting...................................................................................................................................... 489
3.11.3. Spare parameters for future use................................................................................................................ 490
3.11.4. Adjustment for time ................................................................................................................................... 491
3.11.5. Others ....................................................................................................................................................... 492
4 Appendix............................................................................................................................................................................. 498
4.1 Typical Variable List........................................................................................................................................... 498
4.2 Group Data Constitution/Parameter Default Values of Enhanced Keypad ........................................................ 500
4.3 List of Set Values Added in Firmware of Each Version...................................................................................... 513
4.4 Symbol Index ..................................................................................................................................................... 515
Rev.S
4
4GBF0632
Rev.S
5
4GBF0632
1 Application Equipment and Usage Notes

This handling manual description applies to the medium voltage IGBT inverter equipment known as the TMdrive-MVe2 series.
1.1 Introduction
This document has been compiled as the function manipulation manual by combining the formerly called “Trouble handling
manual” and the formerly called “Parameter setting manual.”
This document can be roughly divided into Chapter 1, describing precautions on use of the product and how to read this document,
Chapter 2, describing the meanings of fault signals, and Chapter 3, describing the parameters. Chapter 3 comprises the sections
dedicated to rating and information setting, I/F with outside, protective functions, sequence, inverter functions, converter functions
etc.
Warning!
Improper setting can cause damage to the product quality or cause breakage of the unit.
Read this manual and the instruction manual thoroughly before changing the setting
values of the unit.
If you have any questions, please contact the department concerned of Toshiba.
DeviceNetTM is a registered trademark of ODVA (Open DeviceNet Vendor Association).

PROFIBUS is a standard of DIN19245 (German Industrial Standard) and EN50170 (European Standard).
TC-net I/O and TOSLINE are registered trademarks of TOSHIBA Corporation.
GOT is registered trademarks of Mitsubishi Electric Corporation.
Usage Notes
There are some safety precautions the user must follow when using this equipment. Those safety precautions are
indicated in the form of product safety signs and labels that are attached to the equipment. Among others, we urge the
user to note that this equipment includes high-voltage circuits. When using this equipment, be sure to read the instruction
manual beforehand to prevent electric shock and burn and to keep the soundness of the equipment. In addition, when
handling or operating this equipment, be sure to observe the contents described on the product safety signs and labels.
Product safety signs and labels are important items that contribute to protecting the personnel from operation mistake. If
a label falls off, please purchase a new one from us and attach it onto the equipment.
To prevent electric shock accidents
Inside the equipment, there are 400 Vac or higher, 600 Vdc or higher, 200 Vac or 220 Vac high-voltage circuits,
which are very dangerous. Never detach the electric shock prevention cover, except when you perform
maintenance or inspection.
Never touch the inside of the equipment with your wet hand.
While power is being supplied or the motor is operating, do not touch the inside of the motor.
Rev.S
6
4GBF0632
1.2 Reading this Manual
How to Read [2. Failure Signal Explanation]

Content (cause):
They are the content of failure and the cause of presumed.
Action:
It is the action for restoring failure.
Systems:
The system configurations of equipment which detects a failure signal are shown.
Not used It is a failure signal not used at present.
Parameters:
They are the parameters relevant to a failure detection.
Refer to "chapter 3. Parameter Explanation" about the details of a parameter.
Rev.S
7
4GBF0632
How to Read [3.Parameter Explanation]
Parameter Name:
The parameter name description may have Capitalized letters to describe the naming convention. I.E. OCA is from OverCurrent
Ac.
Standard value:
This is the setting that is normally used for most applications. These settings generally disable any special or optional functions.
Which functions are enabled must be determined by the application. It is not recommended that any special functions are
enabled unless they are needed. These settings may need adjustment for the specific application. The ( ) value is example of a
setting in the case of function enable.
Limit:
This is the settable range.
Note:
Initialize Parameters that become effective with a power supply initialize.
Automatic setting Parameters that have an automatic setting function with other parameters.
V/f Parameters used only for V/f control.
Not used Parameters not used at present.
[Related parameters]
These are the parameters needed to be set at the same time or required for an automatic setting, etc.
The following prefixes of symbols are used in this manual.
ACR_ Automatic Current Regulator Current regulation
ASPR_ Automatic SPeed Regulator Speed regulation
ASR_ Automatic Speed Regulator Speed regulation 2
AVR_ Automatic Voltage Regulator Voltage regulation of converter
CAP_ CAPture buffer Capture buffer
CP_ Constant Protection Protection setting
CPT_ CaPTure Utility synchronization capture
CR_ Constant Reference Control reference
CS_ Constant System System rating
DNET_ DeviceNET Parameter for DeviceNet
DT_ DisTributed master function Distributed master function
EGD_ Ethernet Global Data Parameter for EGD
FLG_ FLaG Control mode flag
FLT_ FiLTer Filter constant
FUNC_ FUNCtion Simple programmable logic
INF_ INFormation Tool information
IPLL_ Inverter PLL Motor induction voltage PLL
LMT_ LiMiT Control limit
LVL_ LeVeL Detection level
MA_ Motor Adjustment Motor adjustment parameter
MI_ Motor adjustment of Induction motor Motor adjustment parameter (IM)
MP_ Motor Protection Motor and transformer protections
MS_ Motor adjustment of Synchronous motor Motor adjustment parameter (SM)
MSK_ MaSK Sequence mask
OP_ OPtion Option control
PM_ Permanent Magnet synchronous motor PMSM control
SIM_ SIMulation mode Simulation mode
SL_ Sensor-Less control Speed sensor-less control
TCNET_ TC-NET i/o Parameter for TC-net I/O
TIME_ TIME Sequence delay time
TL_ TosLine-s20 Parameter for transmission
TOOL_ TOOL Parameter for tool Ethernet communication
TRB_ TRace Back Trace back
VF_ V/F control Volts/ Hertz control
XFR_ transFeR Utility synchronization transfer
The symbol that “_" adheres to the symbol end shows negative-true logic (The signal is true by 0). For instance, “OCA_" is to
mean the overcurrent detection in value 0.
Rev.S
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4GBF0632
2 Description of Equipment Protection and Fault Signals

The figure below shows the protection schematic diagram of the TMdrive-MVe2.
The equipment is protected not only by current and voltage signals but also by protection detection in the control circuit.
BP_CTT
Converter panel
AC Input panel
U1 OCA CL_T
V1 OL_A CL_TA
B_HLTY
W1 UL_T CURU
BR_F
UL_A CURW
ACL SOFT_STL M_FN
U2 M_FN_T
V2 M
W2 SS
ACSW_F
AC_P_T OSS M_OH
U3 RDET ACSW_T
OSS_FO M_OH_A
ACSW_C
V3 VDET SP_ERR MTMP_S
NO_LOAD
W3 SP_ERR2
External condition Transformer SP_SIL
Exciter
IL STCMD SP_LOST
UVS SWILON SP_LST_A
UVA_EX DS_T REV_ROT_F
P_SW N_IM QSTOP_FAULT
UPS_ERR
PRE_CTT OH_TR C_FN_T C_OCA CURU_CNV VFBK_F BLF FLC_TA
PRE_CTT_F OH_TR_A C_FN OVP CURV_CNV VFBK_F_A FOC FSTOP
C_FN_B OVN CURW_CNV GR_A FOC_S FL_READY
OH OL5_B GR_T FL_FAULT VPLL_ERR
GPSF OL20_B LF OV_S
LINK_F OL_A_B FCL_T
FUSE OL_T_B
CELL_F OL_TA_B
CELL_UV UVD
Fig. 2.a TMdrive-MVe2 Protection System Diagram
This document expresses boards used in this equipment by their pet name.
Pet name Contents Type

CTR General main control board ARND-4044C/T
GIF Gate signal distribution board ARND-4186A/B/R/S
XIO Input- output interface board ARND-4045B
XIOA Input- output interface expanse board ARND-4187A
KPAD Sophisticated keypad ARND-4047A
GOT Multiple languages keypad GT1155-QSBD, GT1455-QTBD, GS2107-WTBD
GPIF Interface board for multiple languages keypad ARND-4037B
RDET Voltage dividing resistance board ARND-3139A/B/F
EXR Voltage dividing resistance expanse board ARND-4005A
VDET Output voltage detection board ARND-4189A/B
CCD-G Cell inveter gate output board ARND-4199A
CCD-C Cell inveter control board ARND-4195A
Rev.S
9
4GBF0632
The drive’s single control firmware accepts IM control and SM control for TMdrive-MVe2 firmware. The drive also accepts a
single configuration, a twin configuration, a vector control with speed sensor configuration and a sensorless vector control
configuration by changing the setting parameters. Because the fault signals used for each system are different, each fault signal
can be performed, as used or not used, with a parameter mask setting.
The schematic diagram of fault signal mask process is shown in Fig 2b. The mask process of the fault signal is perfomed after
the mask parameter is processed to a temporary variable. The masking process is necessary because some fault signals are
needed to mask or to remove the mask automatically, such as the system or the operation mode (ex. emergency drive E_DRIVE).
Mask setting (Temporary variable) (Ex.): MSK_BLR1_TT etc.
Fault input 15 Fault output 15

Bit 15 1
Bit 14 0
Fault input 0 Fault output 0

Bit 0 0
Parameter For a fault needed to mask or to remove mask automatically, 0

Process or 1 is set to a temporary variable automatically.
Otherwise the value of the parameter is copied.
Mask setting (Parameter)
Bit 15 1
Bit 14 0 “1” is set to a bit corresponding to signal to use.
“0” is set to a bit corresponding to signal not to use.
The mask setting (parameter) and mask setting (temporary

variable) are shown as “MSK” and as “MSKt” respectively on the
Bit 0 0 (Ex.): MSK_BLR1 etc. bit configuration of the support tool.
Fig. 2.b Schematic diagram of fault signal mask process
Table 2.1 shows the main protective functions of the TMdrive-MVe2.
*1 and *2 in the tables represent the following notes.

*1) Detection
Hardware: Items were all IGBTs are directly turned off by hardware.
Software: Items were the detection of an error via the software occurred and the detection of an error activates a
protection linked operation.
*2) Items with a “X” mark and “(X)” mark are selectable items with the parameter settings.
The standard setting is the “X” mark side. To set to the “(X)” mark side, consider the setting carefully from a viewpoint of the
system.
*3) The character “x” shows U, V, W-phase, and the “n” shows cell’s number of columns 1-6.
Rev.S
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4GBF0632
Table 2.1(a) Main Protective Functions
Linked operations *2
Detection *1 Critical fault
Medium Light
Item Abbreviation fault fault Related parameter
Coast Dec Stop
H/W S/W Alarm
stop stop request
Cell converter over current xn_C_OCA *3 X X CP_OCA_CNV
Cell over voltage P side xn_OVP *3 X X CP_OV
Cell over voltage N side xn_OVN *3 X X CP_OV
Cell over heat xn_OH *3 X X CP_CELL_OH
Cell gate power supply failure xn_GPSF *3 X X
Cell serial communication link failure xn_LINK_F *3 X X
Cell fuse blown xn_FUSE *3 X X
Cell failure xn_CELL_F *3 X X CP_UV
Cell under voltage (H/W gate block) CELL_UV X X
AC overcurrent OCA X X CP_OCA
Over current AC B bank OCA_B X X CP_OCA
Inverter critical overcurrent H_OCA X X TIME_H_OCA_DET
Conveter critical overcurrent H_C_OCA X X TIME_H_OCA_DET
DC overvoltage retry failure OV_RTRY_F X X TIME_OV_RTRY
Master CPU failure CPU_M X X
Slave CPU A failure CPU_A X X
GIF board clockdown GIF_CLKDWN X X
SRAM code checksum error CODE_ERR X X (X) TIME_CODE_ERR
GIF FPGA2 watchdog error FPGA2_WD X X
GIF FPGA CRC error FPGA_CRC_ERR X X
Field current over FOC X X
Field current over (soft detection) FOC_S X X MS_CP_FOC
Exciter failure FL_FAULT X X
MS_CP_LF
MS_VPLL_SP
Field lost LF X X
MS_FLBST_VPLL
MS_FLG_FCF_E
MS_FLDCL
Field current limit timer FCL_T X X
MS_TINE_FCL
MS_FLDCL
Field current limit timer alarm FCL_TA X X
MS_TINE_FCL
Exciter stopped FSTOP X X
Exciter ready condition FL_READY X X
Inverter output voltage PLL error VPLL_ERR X X MS_CP_VPLL_ERR
Over voltage (soft detection) OV_S X X MS_CP_OV
Current failure of U-phase CURU X X CP_CURCHK
Current failure of W-phase CURW X X CP_CURCHK
Current failure of U-phase B bank CURU_B X X CP_CURCHK
Current failure of W-phase B bank CURW_B X X CP_CURCHK
CP_CURCHK_CNV
Current failure of U-phase converter CURU_CNV X X
TIME_CURCHK_CNV
CP_CURCHK_CNV
Current failure of V-phase converter CURV_CNV X X
TIME_CURCHK_CNV
CP_CURCHK_CNV
Current failure of W-phase converter CURW_CNV X X
TIME_CURCHK_CNV
CP_CUR_DIFF
Current U-phase differential detection CURU_DIFF X X
TIME_CUR_DIFF
CP_CUR_DIFF
Current V-phase differential detection CURV_DIFF X X
TIME_CUR_DIFF
CP_CUR_DIFF
Current W-phase differential detection CURW_DIFF X X
TIME_CUR_DIFF
Overspeed OSS X X CP_OSP
CS_MOTOR_FREQ
Output frequency exceeded OSS_FO X X
CP_OSS_FO
CP_SP_ERR
Speed detection error SP_ERR X X SL_SP_ERR
FLT_SP_ERR
FLG_DIFF_PG
Speed detection error 2 SP_ERR2 X X
TIME_SP_ERR2
Rev.S
11
4GBF0632
Table2.1(b) Main Protective Functions
Medium Light
Coast Dec Stop
H/W S/W Alarm
stop stop request
Zero speed starting interlock SP_SIL MA_ZERO_SP
Driving signal starting interlock STCMD
Speed reference lost SP_LOST X X (X) CP_SP_LOST
Speed reference lost alarm SP_LST_A X (X) CP_SP_LOST
CP_ROT_F_DIFF
Motor rotate failure ROT_F X CP_ROT_F_EN
TIME_ROT_F
Reverse rotate failure REV_ROT_F X CP_REV_ROT
Spare 1 timer SPA1_T X TIME_SPA1
Spare 2 timer SPA2_T X X TIME_SPA2
Spare 1 SPA1 X X X
Spare 2 SPA2 X X X
Spare 3 SPA3 X X
Spare 4 SPA4 X X
Control power source failure CPSF X X CP_PSF
Main power source failure MPSF X X CP_UVA
+15V or -15V of voltage error PN15_F X X
CP_REC_F
Rectifier failure REC_F X X
TIME_REC_F
Uninterruptible power supply unit error UPS_ERR X FLG_UPS_USE
AC input circuit breaker open AC_P_T X TIME_AC_P
Main power source failure UV_MPSF X CP_UVA
AC main voltage drop start inter lock UVA_SIL CP_UVA_SIL
No AC voltage input NO_VAC X X CP_UVA
Overload (5 minutes) RMS OL5 X X CP_RMS_5
Overload (20 minutes) RMS OL20 X X CP_RMS_20
Equipment overload alarm OL_A X (X) CP_RMS_A
Current limit timer CL_T X X TIME_CL
Current limit timer alarm CL_TA X (X) TIME_CL
Converter overload (5 minutes) RMS OL5_B X X CP_RMS_CNV5
Converter overload (20 minutes) RMS OL20_B X X CP_RMS_CNV20
CP_RMS_CNV5A
Converter overload alarm OL_A_B X
CP_RMS_CNV20A
Converter Current limit timer CL_T_B X X
Converter current limit timer alarm CL_TA_B X
CR_SOFT_STALL
Automatic speed reduce operating in
SOFT_STL X FLG_SOFT_STALL
overload
CP_RMS_C_INV
Equipment ventilating fan stopped timer C_FN_T X X TIME_CFAN
Equipment ventilating fan stopped C_FN X (X)
Equipment ventilating redundancy fan
C_FN_B X (X)
stopped timer
Motor cooling fan stopped M_FN X (X)
Motor cooling fan stopped timer M_FN_T X X (X) TIME_MFAN
CP_GDV
Ground detection timer GR_T X X (X) TIME_GR
FLT_GDV
CP_GDV_A
Ground detection alarm GR_A X (X)
FLT_GDV
DC voltage drop UVD X X CP_UV, CP_UV_SIL
DC voltage drop starting interlock UV_SIL CP_UV_SIL
System configuration error SYS_ERR X X
Set parameter check error PARA_ERR X X
External interlock IL X
External equipment electrical condition
UVA_EX X
ready condition
External safety switch UVS X X FLG_UVS2_USE
Panel interlock switch on P_SW X X
Door open timer DS_T_ X X TIME_DS
AC contactor fault ACSW_F X X
AC contactor opened timer ACSW_T X TIME_CTT
Rev.S
12
4GBF0632
Table2.1(c) Main Protective Functions
Medium Light
Coast Dec Stop
H/W S/W Alarm
stop stop request
Output side open NO_LOAD X X
Transmission failure 1 – Own station
TL_F1 X X (X)
failure
Transmission failure 2 – Initialization
TL_F2 X X (X)
failure
Transmission failure 3 – Transmission TIME_TL_F
TL_F3 X X (X)
failure TIME_HB_DOWN
Transmission failure 4 – Drive-to-drive
TL_F4 X X (X) TINE_TL_F
failure
LVL_XFR_DLTQ
Transfer failure XFR_FAIL X X LVL_XFR_DLTV
TIME_XFR_F
Transfer incomplete XFR_INCMP X
ByPass contactor closed BP_CTT X
LVL_IPLL_DLTQ
Capture failure CPT_FAIL X
TIME_CPT_FAIL
MP critical fault MP_FAULT X X
MP start interlock MP_SIL MP_S_IL X X
MP ready interlock MP_R_IL X
AC circuit breaker trip BLA X X
CP_UL_H, CP_UL_L
Low current detection timer UL_T X X
CP_UL_SP, TIME_UL
CP_UL_H, CP_UL_L
Low current detection alarm UL_A X X
CP_UL_SP, TIME_UL
Motor overheat M_OH X X (X) (X) CP_MOTOR_OH
Motor overheat alarm M_OH_A X X (X) CP_MOTOR_OH
Motor temperature detector fault MTMP_S X X (X)
Overheat transformer OH_TR X X CP_OH_TR
Input transformer high temperature alarm OH_TR_A X X (X) CP_OH_TR_A
ACL overheat timer OH_ACL_T X X TIME_ACL
ACL overheat OH_ACL X X (X)
Cell overheat alarm CELL_OH_A X X CP_CELL_OH_A
Break healthy detection B_HLTY X X
Electromagnetic brake energizing circuit
BR_F X X TIME_BR
fault
Quick stop operated QSTOP_FAULT X X
General analog input signal lost fault AIN_FAULT X X (X)
PLD error PLD_ERR X X
Number of IM motors error N_IM X X CP_N_IM_LL
Software interlock on SWILON X
System change in progress CHG_START X
Automatic sensorless mode change SL_CHG X FLG_SP_ERR_SL
Pulse Generator Z pulse undetection Z_PLS_A X X MS_FLG_ZPLS
UVS1 answer UVS1_ANS X
UVS2 answer UVS2_ANS X
Input voltage phase loss detection VAC_PH_LOSS X X CP_VAC_PH_LOSS
CP_VINV_PH_LOSS
Output Current phase loss detection VINV_PH_LOSS X X
TIME_VINV_PH_LOSS
Input voltage phase rotate failure VAC_ROT_F X X
CP_VFBK_F
Voltage Feedback failure VFBK_F X X CP_VFBKF_L_LIM
FLT_VFBK_F
CP_VFBK_F_A
Voltage feedback failure alarm VFBK_F_A X X CP_VFBKF_L_LIM
FLT_VFBK_F
Cell setting error CELL_SET_ERR X X
Closing interlock C_IL X X
Critical fault FAULT X X
External electrical ready condition UV_READY X X
Pre-charge contactor failure PRE_CTT_F X X
Pre-charge contactor opened PRE_CTT X X
Fault reset limit LMT_FRST X FLG_LMT_FRST
RTRY_INTVL
In retry operation RTRY X X RTRY_F_EN
RTRY_MAX
Rev.S
13
4GBF0632
The three digits code that appears after “Fl-” on the standard operation panel is indicated in Table 2.2 -
Table 2.5.
Table 2.2 List of Fault Codes 1

No. Symbol No. Symbol No. Symbol No. Symbol
・BLF1 ・BLR3 ・BLR6 ・ BLR9
0 N.U. 48 REC_F_ 96 PN15_F_ 144 U5_C_OCA_
1 N.U. 49 NO_VAC_ 97 CPSF_ 145 U5_OVP_
2 N.U. 50 OSS_ 98 GR_T_ 146 U5_OVN_
3 N.U. 51 OSS_FO_ 99 MPSF_ 147 U5_OH_
4 N.U. 52 OV_RTRY_F_ 100 N.U. 148 U5_GPSF_
5 N.U. 53 N.U. 101 N.U. 149 U5_LINK_F_
6 FL_FAULT_ 54 SP_ERR_ 102 N.U. 150 U5_FUSE_
7 LF_ 55 SP_ERR2_ 103 N.U. 151 U5_CELL_F_
8 FCL_T_ 56 N.U. 104 N.U. 152 U6_C_OCA_
9 FSTOP_ 57 N.U. 105 N.U. 153 U6_OVP_
10 N.U. 58 N.U. 106 N.U. 154 U6_OVN_
11 CPU_A_ 59 N.U. 107 N.U. 155 U6_OH_
12 CPU_M_ 60 N.U. 108 OCA_ 156 U6_GPSF_
13 OV_S_ 61 N.U. 109 OCA_B_ 157 U6_LINK_F_
14 FOC_ 62 N.U. 110 N.U. 158 U6_FUSE_
15 FOC_S_ 63 XFR_FAIL_ 111 N.U. 159 U6_CELL_F_
・BLR1 ・BLR4 ・BLR7 ・ BLR10
16 N.U. 64 N.U. 112 U1_C_OCA_ 160 V1_C_OCA_
17 N.U. 65 N.U. 113 U1_OVP_ 161 V1_OVP_
18 GIF_CLKDWN_ 66 N.U. 114 U1_OVN_ 162 V1_OVN_
19 FPGA2_WD_ 67 N.U. 115 U1_OH_ 163 V1_OH_
20 FPGA3_WD_ 68 N.U. 116 U1_GPSF_ 164 V1_GPSF_
21 FPGA4_WD_ 69 N.U. 117 U1_LINK_F_ 165 V1_LINK_F_
22 FPGA_CRC_ERR_ 70 N.U. 118 U1_FUSE_ 166 V1_FUSE_
23 N.U. 71 N.U. 119 U1_CELL_F_ 167 V1_CELL_F_
24 N.U. 72 N.U. 120 U2_C_OCA_ 168 V2_C_OCA_
25 N.U. 73 N.U. 121 U2_OVP_ 169 V2_OVP_
26 CURU_ 74 N.U. 122 U2_OVN_ 170 V2_OVN_
27 CURW_ 75 N.U. 123 U2_OH_ 171 V2_OH_
28 CPU_A_ 76 N.U. 124 U2_GPSF_ 172 V2_GPSF_
29 CPU_M_ 77 N.U. 125 U2_LINK_F_ 173 V2_LINK_F_
30 N.U. 78 N.U. 126 U2_FUSE_ 174 V2_FUSE_
31 BLF_ 79 N.U. 127 U2_CELL_F_ 175 V2_CELL_F_
・BLR2 ・BLR5 ・ BLR8 ・BLR11
32 N.U. 80 PLD_ERR_ 128 U3_C_OCA_ 176 V3_C_OCA_
33 N.U. 81 N.U. 129 U3_OVP_ 177 V3_OVP_
34 N.U. 82 N.U. 130 U3_OVN_ 178 V3_OVN_
35 N.U. 83 DS_T_ 131 U3_OH_ 179 V3_OH_
36 N.U. 84 N.U. 132 U3_GPSF_ 180 V3_GPSF_
37 N.U. 85 CURU_DIFF_ 133 U3_LINK_F_ 181 V3_LINK_F_
38 N.U. 86 CURV_DIFF_ 134 U3_FUSE_ 182 V3_FUSE_
39 CURU_CNV_ 87 CURW_DIFF_ 135 U3_CELL_F_ 183 V3_CELL_F_
40 CURV_CNV_ 88 SPA4_T 136 U4_C_OCA_ 184 V4_C_OCA_
41 CURW_CNV_ 89 SPA3_T 137 U4_OVP_ 185 V4_OVP_
42 CURU_B_ 90 SPA2_T 138 U4_OVN_ 186 V4_OVN_
43 CURW_B_ 91 SPA1_T 139 U4_OH_ 187 V4_OH_
44 H_OCA_ 92 SPA4 140 U4_GPSF_ 188 V4_GPSF_
45 H_C_OCA_ 93 SPA3 141 U4_LINK_F_ 189 V4_LINK_F_
46 OH_TR_ 94 SPA2 142 U4_FUSE_ 190 V4_FUSE_
47 LMT_FRST_ 95 SPA1 143 U4_CELL_F_ 191 V4_CELL_F_
Rev.S
14
4GBF0632

・BLR12 ・BLR15 ・UVA3 ・UV2
192 V5_C_OCA_ 240 W5_C_OCA_ 288 N.U. 336 AIN_FAULT_
193 V5_OVP_ 241 W5_OVP_ 289 N.U. 337 SP_LOST_
194 V5_OVN_ 242 W5_OVN_ 290 N.U. 338 TL_F3_
195 V5_OH_ 243 W5_OH_ 291 N.U. 339 TL_F4_
196 V5_GPSF_ 244 W5_GPSF_ 292 OH_ACL_T_ 340 N.U.
197 V5_LINK_F_ 245 W5_LINK_F_ 293 N.U. 341 N.U.
198 V5_FUSE_ 246 W5_FUSE_ 294 SYS_ERR_ 342 M_OH_
199 V5_CELL_F_ 247 W5_CELL_F_ 295 PARA_ERR_ 343 B_HLTY
200 V6_C_OCA_ 248 W6_C_OCA_ 296 CELL_SET_ERR_ 344 UVS1_ANS_
201 V6_OVP_ 249 W6_OVP_ 297 NO_LOAD_ 345 UVS2_ANS_
202 V6_OVN_ 250 W6_OVN_ 298 GR_T_ 346 PRE_CTT_
203 V6_OH_ 251 W6_OH_ 299 N.U. 347 CODE_ERR_
204 V6_GPSF_ 252 W6_GPSF_ 300 BLA_ 348 MP_FAULT_
205 V6_LINK_F_ 253 W6_LINK_F_ 301 N.U. 349 SPA1
206 V6_FUSE_ 254 W6_FUSE_ 302 VFBK_F_ 350 SPA2
207 V6_CELL_F_ 255 W6_CELL_F_ 303 UPS_ERR_ 351 FAULT_
・BLR13 ・UVA1 ・UVA4 ・SIL1
208 W1_C_OCA_ 256 LF_ 304 ROT_F_ 352 SPA1
209 W1_OVP_ 257 UVD_ 305 OH_TR_ 353 SPA2
210 W1_OVN_ 258 OL5_ 306 TL_F1_ 354 BP_CTT_
211 W1_OH_ 259 OL20_ 307 TL_F2_ 355 VAC_ROT_F_
212 W1_GPSF_ 260 UL_T_ 308 REV_ROT_F_ 356 UVA_SIL_
213 W1_LINK_F_ 261 FCL_T_ 309 VPLL_ERR_ 357 N.U.
214 W1_FUSE_ 262 CL_T_ 310 N.U. 358 UV_SIL_
215 W1_CELL_F_ 263 C_FN_T_ 311 N_IM_ 359 ACSW_C_
216 W2_C_OCA_ 264 FSTOP_ 312 SPA4_T 360 N.U.
217 W2_OVP_ 265 OV_S_ 313 SPA3_T 361 N.U.
218 W2_OVN_ 266 CELL_PR_ 314 SPA2_T 362 N.U.
219 W2_OH_ 267 AC_P_T_ 315 SPA1_T 363 N.U.
220 W2_GPSF_ 268 N.U. 316 SPA4 364 N.U.
221 W2_LINK_F_ 269 N.U. 317 SPA3 365 M_FN_
222 W2_FUSE_ 270 N.U. 318 SPA2 366 SP_SIL_
223 W2_CELL_F_ 271 BLR_ 319 SPA1 367 STCMD_
・BLR14 ・UVA2 ・UV1 ・SIL2
224 W3_C_OCA_ 272 N.U. 320 UVS 368 SER_IUA_
225 W3_OVP_ 273 N.U. 321 IL_ 369 SER_IVA_
226 W3_OVN_ 274 OL5_B_ 322 P_SW_ 370 SER_IWA_
227 W3_OH_ 275 OL20_B_ 323 QSTOP_FAULT_ 371 N.U.
228 W3_GPSF_ 276 N.U. 324 CELL_UV 372 SER_IUB_
229 W3_LINK_F_ 277 N.U. 325 BP_CTT_ 373 SER_IVB_
230 W3_FUSE_ 278 CL_T_B_ 326 UV_MPSF_ 374 SER_IWB_
231 W3_CELL_F_ 279 N.U. 327 ACSW_F_ 375 N.U.
232 W4_C_OCA_ 280 N.U. 328 SWILON_ 376 SER_C1A_
233 W4_OVP_ 281 N.U. 329 CPLL_ERR_ 377 SER_C2A_
234 W4_OVN_ 282 N.U. 330 U.N. 378 SER_C3A_
235 W4_OH_ 283 N.U. 331 U.N. 379 N.U.
236 W4_GPSF_ 284 VINV_PH_LOSS_ 332 MP_S_IL 380 SER_C1B_
237 W4_LINK_F_ 285 N.U. 333 UVA_EX 381 SER_C2B_
238 W4_FUSE_ 286 VAC_ROT_F_ 334 UVA 382 SER_C3B_
239 W4_CELL_F_ 287 VAC_PH_LOSS_ 335 C_IL 383 N.U.
Rev.S
15
4GBF0632

MP_SIL1 READY1 HFD1 MP_HFD2
384 MP_BE_TM1_OL_ 432 TL_F1_ 480 DEGD_F2_ 528 MP_SW_TMX_OL_
385 MP_BE_TM2_OL_ 433 TL_F2_ 481 DEGD_F3_ 529 MP_BV_1X_OL_
386 MP_BE_TM3_OL_ 434 TL_F3_ 482 P_SW_ 530 MP_BV_1Y_OL_
387 MP_BE_TMX_OL_ 435 TL_F4_ 483 QSTOP_FAULT_ 531 MP_BV_1Z_OL_
388 MP_CW_TM1_OL_ 436 DEGD_F2_ 484 N.U. 532 MP_BV_2X_OL_
389 MP_CW_TM2_OL_ 437 DEGD_F3_ 485 N.U. 533 MP_BV_2Y_OL_
390 MP_CW_TMX_OL_ 438 N.U. 486 N.U. 534 MP_BV_2Z_OL_
391 MP_IAR_TM1_OL_ 439 N.U. 487 ACSW_F_ 535 MP_BV_3X_OL_
392 MP_IAR_TM2_OL_ 440 N.U. 488 N.U. 536 MP_BV_3Y_OL_
393 MP_IAR_TMX_OL_ 441 N.U. 489 N.U. 537 MP_BV_3Z_OL_
394 MP_OAR_TM1_OL_ 442 ACSW_T_ 490 N.U. 538 MP_BV_X1_OL_
395 MP_OAR_TM2_OL_ 443 N.U. 491 N.U. 539 MP_BV_X2_OL_
396 MP_OAR_TMX_OL_ 444 N.U. 492 N.U. 540 MP_BV_X3_OL_
397 MP_SW_TM1_OL_ 445 FL_READY 493 UVA_EX 541 MP_CWF1_LL_
398 MP_SW_TM2_OL_ 446 MP_R_IL 494 UVA 542 MP_CWF2_LL_
399 MP_SW_TM3_OL_ 447 UV_READY 495 N.U. 543 MP_CWFS_LL_
MP_SIL2 READY2 HFD2 MP_HFD3
400 MP_SW_TMX_OL_ 448 N.U. 496 AIN_FAULT_ 544 MP_BE_TM_H1_
401 MP_BV_1X_OL_ 449 SP_LOST_ 497 SP_LOST_ 545 MP_BE_TM_H2_
402 MP_BV_1Y_OL_ 450 N.U. 498 TL_F3_ 546 MP_BE_TM_H3_
403 MP_BV_1Z_OL_ 451 N.U. 499 TL_F4_ 547 MP_CF1_MR
404 MP_BV_2X_OL_ 452 M_FN_T_ 500 M_FN_T_ 548 MP_CF2_MR
405 MP_BV_2Y_OL_ 453 BR_F_ 501 BR_F_ 549 MP_CWF_L1_
406 MP_BV_2Z_OL_ 454 N.U. 502 M_OH_ 550 MP_OLU_HFD_
407 MP_BV_3X_OL_ 455 CHG_START_ 503 B_HLTY 551 MP_OLU_HPL_N
408 MP_BV_3Y_OL_ 456 N.U. 504 TL_F1_ 552 MP_OLU_LPL_N
409 MP_BV_3Z_OL_ 457 N.U. 505 TL_F2_ 553 MP_SW_TM_H_
410 MP_BV_X1_OL_ 458 N.U. 506 PRE_CTT_ 554 MP_WLK1_
411 MP_BV_X2_OL_ 459 N.U. 507 CODE_ERR_ 555 N.U.
412 MP_BV_X3_OL_ 460 N.U. 508 N.U. 556 N.U.
413 MP_CWF1_LL_ 461 SPA1 509 SPA1 557 N.U.
414 MP_CWF2_LL_ 462 SPA2 510 SPA2 558 N.U.
415 MP_CWFS_LL_ 463 N.U. 511 GR_T_ 559 N.U.
MP_SIL3 MP_RIL1 MP_HFD1 MP_HFD4
416 MP_BE_TM_H1_ 464 MP_CF1_MRA 512 MP_BE_TM1_OL_ 560 MP_OL_TM_TR_
417 MP_BE_TM_H2_ 465 MP_CF2_MRA 513 MP_BE_TM2_OL_ 561 MP_WD_TM_TR_
418 MP_BE_TM_H3_ 466 MP_OLU_HFDA_ 514 MP_BE_TM3_OL_ 562 MP_OL_LVL_TR_
419 MP_CWF_L1_ 467 MP_OLU_HPL_NA 515 MP_BE_TMX_OL_ 563 MP_PRD_TR_
420 MP_SW_TM_H_ 468 MP_OLU_LPL_NA 516 MP_CW_TM1_OL_ 564 MP_BH_RL_TR_
421 MP_WLK1_ 469 N.U. 517 MP_CW_TM2_OL_ 565 MP_GP_RL_TR_
422 N.U. 470 N.U. 518 MP_CW_TMX_OL_ 566 MP_OL_TM_OL_
423 N.U. 471 N.U. 519 MP_IAR_TM1_OL_ 567 MP_WD_TM_OL_
424 N.U. 472 N.U. 520 MP_IAR_TM2_OL_ 568 N.U.
425 N.U. 473 N.U. 521 MP_IAR_TMX_OL_ 569 N.U.
426 N.U. 474 N.U. 522 MP_OAR_TM1_OL_ 570 N.U.
427 N.U. 475 N.U. 523 MP_OAR_TM2_OL_ 571 N.U.
428 N.U. 476 N.U. 524 MP_OAR_TMX_OL_ 572 N.U.
429 N.U. 477 N.U. 525 MP_SW_TM1_OL_ 573 N.U.
430 N.U. 478 N.U. 526 MP_SW_TM2_OL_ 574 N.U.
431 N.U. 479 N.U. 527 MP_SW_TM3_OL_ 575 N.U.
Rev.S
16
4GBF0632

STPRQ1 LFD2 MP_LFD3 MP_LFD6
576 CELL_OH_A_ 624 SP_LST_A_ 672 MP_CF1_MRA 720 MP_BR17_CL
577 C_FN_ 625 TL_F1_ 673 MP_CF2_MRA 721 MP_BR18_CL
578 N.U. 626 TL_F2_ 674 MP_CF1_MCC_F_ 722 MP_BR19_CL
579 C_FN_B_ 627 TL_F3_ 675 MP_CF2_MCC_F_ 723 MP_BR20_CL
580 OH_ACL_ 628 OH_TR_A_ 676 MP_CWF_L1A_ 724 MP_BR21_CL
581 MTMP_S_ 629 XFR_INCMP_ 677 MP_CW_TM_H1_ 725 MP_BR22_CL
582 M_OH_ 630 CPT_FAIL_ 678 MP_OLU_LFD_ 726 MP_BR23_CL
583 M_OH_A_ 631 CODE_ERR_ 679 MP_OLU_HFDA_ 727 MP_BR24_CL
584 OL_A_ 632 OL_A_ 680 MP_SPH_ON_A_ 728 MP_BR25_CL
585 CL_TA_ 633 CL_TA_ 681 MP_SPH_MCC_F_ 729 MP_BR26_CL
586 GR_A_ 634 SPA4_T 682 MP_WLK1A_ 730 MP_BR27_CL
587 PRE_CTT_F_ 635 SPA3_T 683 N.U. 731 MP_BR28_CL
588 N.U. 636 SPA2_T 684 N.U. 732 MP_BR29_CL
589 M_FN_ 637 SPA4 685 N.U. 733 MP_BR30_CL
590 N.U. 638 SPA3 686 N.U. 734 MP_BR31_CL
591 SPA1 639 SPA2 687 N.U. 735 MP_BR32_CL
STPRQ2 MP_LFD1 MP_LFD4 MP_LFD7
592 SP_LST_A_ 640 MP_BE_TM1_OLA_ 688 MP_OL_TM_A_ 736 MP_BR33_CL
593 UL_A_ 641 MP_BE_TM2_OLA_ 689 MP_OL_TM_TR_ 737 MP_BR34_CL
594 Z_PLS_A_ 642 MP_BE_TM3_OLA_ 690 MP_WD_TM_A_ 738 MP_BR35_CL
595 VFBK_F_A_ 643 MP_BE_TMX_OLA_ 691 MP_WD_TM_TR_ 739 MP_BR36_CL
596 OH_TR_A_ 644 MP_CW_TM1_OLA_ 692 MP_OL_LVL_A_ 740 MP_BR37_CL
597 FCL_TA_ 645 MP_CW_TM2_OLA_ 693 MP_OL_LVL_TR_ 741 MP_BR38_CL
598 N.U. 646 MP_CW_TMX_OLA_ 694 MP_PRD_A_ 742 MP_BR39_CL
599 N.U. 647 MP_IAR_TM1_OLA_ 695 MP_PRD_TR_ 743 MP_BR40_CL
600 OL_A_B_ 648 MP_IAR_TM2_OLA_ 696 MP_BH_RL_A_ 744 MP_BR41_CL
601 CL_TA_B_ 649 MP_IAR_TMX_OLA_ 697 MP_BH_RL_TR_ 745 MP_BR42_CL
602 N.U. 650 MP_OAR_TM1_OLA_ 698 MP_GP_RL_TR_ 746 MP_BR43_CL
603 N.U. 651 MP_OAR_TM2_OLA_ 699 MP_OL_TM_OLA_ 747 MP_BR44_CL
604 N.U. 652 MP_OAR_TMX_OLA_ 700 MP_WD_TM_OLA_ 748 MP_BR45_CL
605 N.U. 653 MP_SW_TM1_OLA_ 701 N.U. 749 MP_BR46_CL
LFD1 MP_LFD2 MP_LFD5 MP_LFD8
608 AIN_FAULT_ 656 MP_SW_TMX_OLA_ 704 MP_BR01_CL 752 MP_BR49_CL
609 C_FN_ 657 MP_BV_1X_OLA_ 705 MP_BR02_CL 753 MP_BR50_CL
610 SOFT_STL_ 658 MP_BV_1Y_OLA_ 706 MP_BR03_CL 754 MP_BR51_CL
611 C_FN_B_ 659 MP_BV_1Z_OLA_ 707 MP_BR04_CL 755 MP_BR52_CL
612 OH_ACL_ 660 MP_BV_2X_OLA_ 708 MP_BR05_CL 756 MP_BR53_CL
613 MTMP_S_ 661 MP_BV_2Y_OLA_ 709 MP_BR06_CL 757 MP_BR54_CL
614 M_OH_ 662 MP_BV_2Z_OLA_ 710 MP_BR07_CL 758 MP_BR55_CL
615 M_OH_A_ 663 MP_BV_3X_OLA_ 711 MP_BR08_CL 759 MP_BR56_CL
616 SL_CHG_ 664 MP_BV_3Y_OLA_ 712 MP_BR09_CL 760 MP_BR57_CL
617 SPA1 665 MP_BV_3Z_OLA_ 713 MP_BR10_CL 761 MP_BR58_CL
618 GR_A_ 666 MP_BV_X1_OLA_ 714 MP_BR11_CL 762 MP_BR59_CL
619 PRE_CTT_F_ 667 MP_BV_X2_OLA_ 715 MP_BR12_CL 763 MP_BR60_CL
620 RTRY_ 668 MP_BV_X3_OLA_ 716 MP_BR13_CL 764 MP_BR61_CL
621 M_FN_ 669 MP_CWF1_LLA_ 717 MP_BR14_CL 765 MP_BR62_CL
622 GR_T_ 670 MP_CWF2_LLA_ 718 MP_BR15_CL 766 MP_BR63_CL
623 STPRQ 671 MP_CWFS_LLA_ 719 MP_BR16_CL 767 MP_BR64_CL
Rev.S
17
4GBF0632
2.1 Protection
2.1.1 Cell inverter failure
xn_C_OCA (x=U, V, W, n=1~6)
x-phase n th cell converter over current (x=U, V, W, n=1~6)
x-phase n th Converter Over Current
Content (cause):
The AC over current detection circuit (hardware) of converter activated. The drive turns off BLR signal and stops
Action:
Check the main AC cable because ground fault may have occurred on the output cable.
Check the main circuit devices because a DC short-circuit may have occurred.
Check the input power disturbance.
Check whether there is any current hunching during operation.
It may be the converter HCT failure (CURU_CNV, CURV_CNV, CURW_CNV). If xn_C_OCA detects with these failures
simultaneously, check the corresponded cell’s connection or some problems of the HCT.
th th
Note: Available in firmware 03A or later (4 to 6 groups)
Parameters: CP_OCA_CNV, CP_CURCHK_CNV, TIME_CURCHK_CNV,
MSK_BLR7~15, MSK_BLR2 (CURU_CNV, CURV_CNV, CURW_CNV)
xn_OVP (x=U, V, W, n=1~6)

x-phase n th cell over voltage P side (x=U, V, W, n=1~6)
x-phase n th Over Voltage P side
Content (cause):
The P side over voltage detection of the cell activated. The drive turns off BLR signal and stops.
Action:
Check whether a more sudden deceleration operation than normal was not made.
th th
Parameters: CP_OV, MSK_BLR7~15
xn_OVN (x=U, V, W, n=1~6)

x-phase n th cell over voltage N side (x=U, V, W, n=1~6)
x-phase n th Over Voltage N side
Content (cause):
The N side over voltage detection of the cell activated. The drive turns off BLR signal and stops.
Action:
Check whether a more sudden deceleration operation than normal was not made.
th th
Parameters: CP_OV, MSK_BLR7~15
Rev.S
18
4GBF0632
xn_OH (x=U, V, W, n=1~6)

x-phase n th cell over heat (x=U, V, W n=1~6)
x-phase n th cell Over Heat
Content (cause):
An overheat condition of the cell is detected. The drive turns off BLR signal and stops.
Action:
Check the operation of ventilating fan, the filter for clogging and temperature of the electric room.
th th
Parameters: MSK_BLR7~15, CP_CELL_OH
xn_GPSF (x=U, V, W, n=1~6)

x-phase n th call gate power supply failure (x=U, V, W, n=1~6)
x-phase n th Gate Power Source Failure
Content (cause):
The gate power supply failure detection circuit (hardware) of the cell activated. The drive turns off BLR signal and stops.
Action:
Replace the cell inverter.
The DC/DC converter in the cell control board (CCD) may be erroneous, or the fuse may have blown.
th th
Parameters: MSK_BLR7~15
xn_LINK_F (x=U, V, W, n=1~6)

x-phase n th cell serial communication link failure (x=U, V, W, n=1~6)
x-phase n th LINK Failure
Content (cause):
Serial communication link failure was detected. It has a possibility that the communication data became abnormality due to the
influence of noise.The drive turns off BLR signal and stops.
Action:
Check any damage to the optical cable.
Check each connection of the GIF board, the CCD-C board, the OIF boards, and the optical cable.
th th
xn_FUSE (x=U, V, W, n=1~6)

x-phase n th cell fuse blown (x=U, V, W, n=1~6)
x-phase n th FUSE blown
Content (cause):
The fuse blowning detection circuit (hardware) of the cell activated. The drive turns off BLR signal and stops.
Action:
Replace the cell inverter.
th th
Not used (No interface to fuses)
Rev.S
19
4GBF0632
xn_CELL_F (x=U, V, W, n=1~6)

x-phase n th cell failure (x=U, V, W, n=1~6)
x-phase n th CELL Failure
Content (cause):
This is a failure to judge caused cell inverters for following several failures.
(1) When being simultaneously detected UVD, the xn_CELL_F of cell inverter which has UVD's cause is detected. (UVD: DC
voltage drops to less than the level CP_UV in operation). The CELL_F is not simultaneously detected with UVD before gating
converters.
(2) When blocking gate signal by hardware, CELL_UV condition is not completed. In that case, it is able to judge caused cell
inverters. If one CELL_F is detected the corresponded cell inverter has some problems probably. If several CELL_F failures
are detected on same phase and/ or same group, the corresponded optical cable has some problems for example bad
connection.
(3) In the case of no dc voltage feedback at receiving main power, it is detected rectifier failure (REC_F), in that case, CELL_F is
judged problematic cell inverters. The cell inverter’s rectifier circuit or CCD boards are suspected. (available in firmware 04B
or later)
(4) If (1) (2) (3) are not applicable, it has possibility of the CRC (Cyclic Redundancy Check) error for the CCD boards in
corresponded cell inverters. Because this failure is detected without serial communication error in many cases, the failures
(SER_Ixy_, SER_Cny_, x = U, V, W, n = 1 – 3, y = A, B) in start interlock 2 (SIL2) are not simultaneously detected on historical
FI.
Action:
Check the connection of optical cables of detected cell inverters. If optical cables connections are not abnormal, exchange the cell
inverter.
If CRC error of CCD board is removed from the cause of this failure, set FLG_CCD_CRC_ERR_MSK = 1.
th th
Available in firmware 04B or later for judging REC_F
Parameters: MSK_BLR7~15, FLG_CCD_CRC_ERR_MSK, CP_UV
Rev.S
20
4GBF0632
2.1.2 Current-related protection

(1) AC over-current
When the output current exceeds the setting value, overcurrent is detected and an instantaneous gate-block occurs.
OCA, OCA_B
AC overcurrent, AC overcurrent B bank
OverCurrent Ac, OverCurrent Ac B bank
Content (cause):
The AC over current detection circuit (hardware) activated. The drive turns off BLR signal and stops
In case of the twin configuration, OCA indicates the occurrence of an over-current in the A bank and so does OCA_B in the B
bank.
Action:
Check to see there is no disconnection of a speed sensor.
Check the main AC cable because a ground fault may have occurred on the output cable.
Check the main circuit devices because a DC short-circuit may have occurred.
Check the DC power supply because a DC voltage may have been dropped.
Parameters: MSK_BLR6, CP_OCA
H_OCA
Inverter AC critical overcurrent
inverter Heavy OverCurrent Ac
Content (cause):
The AC overcurrent detection circuit (OCA, OCA_B) activated and it stoped gate signal by hardware, but the current was
continuous for a length of time. It has possibility that overcurrent occurred associated with breaking devices.
In the case of detecting this fault, fault reset function is limited.
Action:
Check soundness of the devices without turning on the power again.
It has possibility that critical fault occurred associated with breaking devices. Please send us TRACE BACK data.
The fault can be reset by holding down a reset button on front panel or external one.
Note: Available in firmware 05B or later
Parameters: MSK_BLR2, CP_OCA, TIME_H_OCA_DET
H_C_OCA
Converter AC critical overcurrent
converter Heavy OverCurrent Ac
Content (cause):
The AC overcurrent detection circuit (xn_C_OCA) activated and it stoped gate signal by hardware, but the current was continuous
for a length of time. It has possibility that overcurrent occurred associated with breaking devices.
It detected converter over current in main voltage disturbance, reset the fault automatically but UV condition was not established.
In the case of detecting this fault, fault reset function is limited.
Action:
Check soundness of the devices without turning on the power again. Identify caused cell inverter by individual converter
overcurrent detection (xn_C_OCA).
It has possibility that critical fault occurred associated with breaking devices. Please send us TRACE BACK data.
The fault can be reset by holding down a reset button on front panel or external one.
Parameters: MSK_BLR2, CP_OCA_CNV, TIME_H_OCA_DET
Rev.S
21
4GBF0632
(2) Overload detection

A 5-minute and 20-minute RMS computation of the output current (I1_F), converter current (I1_F_B) is performed and when
the predetermined value is exceeded, an Overload alarm or protection is activated.
5-minute RMS setting and 20-minute RMS settings are provided.
Type of Overload protection Inverter setting Converter setting

5-minute RMS protection CP_RMS_5 CP_RMS_CNV5
20-minute RMS protection CP_RMS_20 CP_RMS_CNV20
5-minute RMS alarm CP_RMS_A5 CP_RMS_CNV5A
20-minute RMS alarm CP_RMS_A20 CP_RMS_CNV20A
<Example> The equipment allows the following operation pattern as Fig. 2.1.1. Therefore, the setting value is 5-minute RMS
when the overload rated current (for example, 110%) continues for one minute after a 100% continuous operation.
110%
100%
4 minutes 1 minute
Fig 2.1.1 Allowable Overload Operation Pattern
1 × 4 + 1.1 × 1
CP_RMS_5 = = 1.02078 = . %
5
1 × 19 + 1.1 × 1
CP_RMS_20 = = 1.0052 = . %
20
OL_A
Equipment overload alarm
OverLoad Alarm
Content (cause):
The RMS AC current has exceeded the set value for 5 minutes. The drive outputs an ALARM and also outputs a stop request
(STPRQ) to the upper level PLC.
Action:
Check the load situation.
The mask below setting below can define whether this protection is used or not used.
MSK_STPRQ1.OL_A_ = 1 (used), 0 (not used)
Parameters: MSK_STPRQ1, CP_RMS_A, CP_RMS_A20
OL5
Overload (5 minutes) RMS
OverLoad 5 minutes
Content (cause):
The RMS AC current has exceeded the set value for 5 minutes. The drive turns off the UVA signal and stops.
Action:
The mask setting below can define whether this protection is used or not used.
MSK_UVA1.OL5_ = 1 (used), 0 (not used)
Parameters: MSK_UVA1, CP_RMS_5
Rev.S
22
4GBF0632
OL20
Overload (20 minutes) RMS
OverLoad 20 minutes
Content (cause):
The RMS output current has exceeded the set value for 20 minutes. The drive turns off the UVA signal and stops.
Action:
MSK_UVA1.OL20_ = 1 (used), 0 (not used)
Parameters: MSK_UVA1, CP_RMS_20
OL_A_B
Converter overload alarm
OverLoad Alarm B
Content (cause):
The RMS converter current has exceeded the set value for 5 minutes or 20 minutes. The drive outputs an ALARM and also
outputs a stop request (STPRQ) to the upper level PLC.
Action:
The mask below setting below can define whether this protection is used or not used.
MSK_STPRQ2.OL_A_B_ = 1 (used), 0 (not used)
Parameters: MSK_STPRQ2, CP_RMS_CNV5A, CP_RMS_CNV20A
OL5_B
Converter overload (5 minutes) RMS
OverLoad 5 minutes B
Content (cause):
The RMS converter current has exceeded the set value for 5 minutes. The drive turns off the UVA signal and stops.
Action:
MSK_UVA2.OL5_B_ = 1 (used), 0 (not used)
Parameters: MSK_UVA2, CP_RMS_CNV5
OL20_B
Converter overload (20 minutes) RMS
OverLoad 20 minutes B
Content (cause):
The RMS converter current has exceeded the set value for 20 minutes. The drive turns off the UVA signal and stops.
Action:
MSK_UVA2.OL20_B_ = 1 (used), 0 (not used)
Parameters: MSK_UVA2, CP_RMS_CNV20
Rev.S
23
4GBF0632
(3) Current limit timer

When the current limit is reached for the predetermined time period, CL_T (CL_T_B) is detected and the operation is stopped
to protect the equipment and machinery. The value to be compared with the threshold is a result of an integral calculation using
the internal time counter. The counter will start on the following condition.
The current feedback I1_F > LMT_I1 – 5% (The converter current feedback I1_F_B > LMT_I1_CNV – 5%)
The standard setting value is CL = 60.0 (s). When LMT_I1 (LMT_I1_CNV) is 105% or less, do not use this function.
This function provides an alarm. A current limit alarm (CL_TA, CL_TA_B) is detected at TIME_CL x 80%.
Current Feedback(I1_F)
LMT_I1 5%
LMT_I1-5%
0
Counter TIME_CL x 80% -> CL_T_A_ detection
CL_T_ detection
TIME_CL
0 Time
Fig 2.1.2 Allowable Overload Operation Pattern
CL_T
Current limit timer
Current Limit Timer
Content (cause):
The detection of operation above a current limit has continued for the time set with the timer, TIME_CL.
The value to be compared with the threshold is a result of an integral calculation using the internal time counter. The counter will
start on the following condition; The Current Feedback I1_F > LMT_I1 – 5%
After this value reaches to the timer value TIME_CL, the equipment turns off the UVA signal and stops an operation.
Action:
Check the operation status and load status.
Check whether there is a contributing factor to cause an overload on the machine side such as a machine locked.
Check the output kW of the drive.
MSK_UVA1.CL_T_ = 1 (used), 0 (not used)
Parameters: MSK_UVA1, TIME_CL
CL_TA
Current limit timer alarm
Current Limit Timer Alarm
Content (cause):
An operation under the current limited condition continued for up to 80% of the time set with the current limit timer TIME_CL_A.
(The value to be compared with the threshold is a result of integral calculation using the internal time counter. The counter will start
on the following condition; The Current Feedback I1_F > LMT_I1 – 5%)
Stop request (STPRQ) is output.
If the operation continues, “CL_T” activates and the breaker trips.
Action:
Check the operation status.
Check whether there is any error causing a stall on the machine side.
MSK_STPRQ1.CL_TA_ = 1 (used), 0 (not used)
Parameters: MSK_STPRQ1, TIME_CL
Rev.S
24
4GBF0632
CL_T_B
Converter current limit timer
Current Limit Timer
Content (cause):
The detection of operation above a current limit has continued for the time set with the timer. The value to be compared with the
threshold is a result of an integral calculation using the internal time counter. The counter will start on the following condition; The
Converter Current Feedback I1_F_B > LMT_I1_CNV – 5% after this value reaches to the timer value TIME_CL.
The equipment turns off the UVA signal and stops an operation.
Action:
Check whether there is a contributing factor to cause an overload on the machine side.
MSK_UVA2.CL_T_B_ = 1 (used), 0 (not used)
Parameters: MSK_UVA2, TIME_CL
CL_TA_B
Converter current limit timer alarm
Current Limit Timer Alarm B
Content (cause):
An operation under the current limited condition continued for up to 80% of the time set with the current limit timer.
(The value to be compared with the threshold is a result of integral calculation using the internal time counter. The counter will start
on the following condition; The Converter Current Feedback I1_F_B > LMT_I1_CNV – 5%)
Stop request (STPRQ) is output.
If the operation continues, “CL_T_B” activates and the breaker trips.
Action:
MSK_STPRQ2.CL_TA_B_ = 1 (used), 0 (not used)
Parameters: MSK_STPRQ2, TIME_CL
(4) Low load current detection

If load current is low, low load current detection (UL_A, UL_T) is detected.
UL_A
Low load current detection Alarm
Under Load detection alarm
Content (cause):
The load current is below the protection level. The drive indicates an alarm.
Action:
Check the load condition.
Parameters: CP_UL_SP, CP_UL_H, CP_UL_L, TIME_UL, MSK_LFD2
UL_T
Low load current detection Timer
Under Load detection timer
Content (cause):
The load current is below the protection level. The drive turns off the UVA signal and stops.
Action:
Check the load condition. After the check, the drive needs a fault reset.
Parameters: MSK_UVA1, CP_UL_SP, CP_UL_H, CP_UL_L, TIME_UL
Rev.S
25
4GBF0632
(5) HCT healthy check

If current detection HCT is bad condition or does not connect, serious failure occurs because of not
detecting current. Therefore, current failure is detected each phase as HCT healthy check.
CURU_CNV, CURV_CNV, CURW_CNV

Current failure of U-phase converter, Current failure of V-phase converter, Current failure of W-phase
CURrent failure of U-phase CoNVerter, CURrent failure of V-phase CoNVerter, CURrent failure of W-phase CoNVerter,
Content (cause):
When the converters start operation the drive checks HCTs operation of each cell. The converter current of each cell could not be
detected,
Turns off BLR signal and stops.
Action:
xn_C_OCA (x=UVW, n=1~6) of cells that has the cause is detected secondarily. Check these failures simultaneously and identify
the abnormal HCTs. Check the HCT conection and other problems.
MSK_BLR2.CURU_CNV_＝1 (used), 0 (not used)
MSK_BLR2.CURV_CNV_＝1 (used), 0 (not used)
MSK_BLR2.CURW_CNV_＝1 (used), 0 (not used)
Parameters: MSK_BLR2, CP_CURCHK_CNV, TIME_CURCHK_CNV
CURU, CURU_B
Current failure of U-phase, Current failure of U-phase B bank
CURrent failure of U-phase, CURrent failure of U-phase B bank
Content (cause):
The U-phase current could not be detected.
The drive turns off the BLR signal and stops.
When in the twin configuration, CURU indicates the presence of a U phase current failure in the A bank and CURU_B indicates
such a presence in the B bank.
Action:
Check the wiring of the U-phase current detector and the wiring of the main circuit.
Check the wiring of the cables connected to the CTR board.
MSK_BLR1.CURU_ = 1 (used), 0 (not used)
MSK_BLR2.CURU_B_ = 1 (used), 0 (not used)
Parameters: MSK_BLR1, (MSK_BLR2), CP_CURCHK
CURW, CURW_B
Current failure of W-phase, Current failure of W-phase B bank
CURrent failure of W-phase, CURrent failure of W-phase B bank
Content (cause):
The U-phase current could not be detected.
The drive turns off BLR signal and stops.
Action:
Check the wiring of the W-phase current of bank B and the wiring of the main circuit.
Check the wiring of the cables connected to the CTR board.
MSK_BLR1.CURW_ = 1 (used), 0 (not used)
MSK_BLR2.CURW_B_ = 1 (used), 0 (not used)
Parameters: MSK_BLR1, (MSK_BLR2), CP_CURCHK
Rev.S
26
4GBF0632
(6) Difference current detection

In the case of twin bunks topology by leactor connection, difference current is detected by comparing each phases current.
CURU_DIFF, CURV_DIFF, CURW_DIFF

Current U-phase differential detection, Current V-phase differential detection, Current W-phase differential detection
CURrent U-phase DIFFerential detection, CURrent V-phase DIFFerential detection, CURrent W-phase DIFFerential detection
Content (cause):
The current unbalance between bank A and bank B. Turns off BLR signal and stops.
Action:
Check the wiring of the current detector and wiring of the main circuit.
Systems: Twin drive
Parameters: CP_CUR_DIFF, TIME_CUR_DIFF, LVL_CRDIF_DET, MSK_BLR5
Rev.S
27
4GBF0632
2.1.3 Voltage protection

(1) DC undervoltage
Activated when the DC voltage supply in all cell inverters drop below the level CP_UV_SIL (UV_SIL), CP_UV_SIL (UVD). The
detection uses the minimum DC voltage in all cell inverters. When converter is not under operation, DC voltage is over
CP_UV_SIL level and serial communication of cell inverters, UVD is masked and not detected. When converter is under
operation and DC voltage is under CP_UV level, UVD and xn_CELL_F (x = U, V and W, n = 1 - 6) are simultaneously detected
and drive stops with BLR output. UVD is masked under ride-through operation.
UVD
DC voltage drop
Under Voltage of Dc
Content (cause):
Power supply voltage drop was detected in the DC main circuit while the drive was running. The drive turns off the UVA signal and
stops.
Action:
Check the cell inverter fuses.
MSK_UVA1.UVD_ = 1 (used), 0 (not used)
Parameters: MSK_UVA1, CP_UV, CP_UV_SIL
UV_SIL
DC voltage drop starting interlock
Under Voltage Start InterLock
Content (cause):
The DC voltage is equal to or less than the level and the drive is not allowed to start. The startup interlock condition cannot be
cleared.
Action:
Check the cell inverter fuses.
MSK_SIL1.UV_SIL_ = 1 (used), 0 (not used)
Note: Not used
Parameters: MSK_SIL1, CP_UV_SIL
(2) DC overvoltage
If DC voltage of cell inverter is over CP_OV level, xn_OVP, xn_OVN (x = U, V and W, n = 1 - 6) are detected and drive stops with
BLR output. When the DC overvoltage is detected under disturbed input power and drive activates retry function, drive resets
automatically and restarts. At this time, when drive cannot restart even if it can reset DC overvoltage fault because of of electrical
condition failure, detects DC overvoltage retry failure (OV_RTRY_F).
OV_RTRY_F
DC overvoltage retry failure
dc OverVoltage Retry Failure
Content (cause):
DC overvoltage is detected and reset automatically by retry function but drive cannot restart because of electrical condition failure.
Action:
Check the trace back data and investigate which condition is failure.
For example, continuous input under voltage, Non-charged DC voltage after overvoltage, serial communication failure in cell
inverter and so on.
MSK_BLR3.OV_RTRY_F_ = 1 (used), 0 (not used)
Parameters: MSK_BLR3, TIME_OV_RTRY, TIME_DISTB_RTRY, LVL_VAC_DISTB
Rev.S
28
4GBF0632
2.1.4 Main circuit and control power supply protection
(1) Control power supply failure

The Control power supply failure is activated when the control power supply drops below the control power loss detection level
CP_PSF.
The higher the setting level, the shorter the time it takes to detect the control power loss.
In the standard setting, PSF = 140.0 (V) is set, when the restart at power failure (optional) is not provided and 160.0 V is set
when the restart at power failure (optional) is provided.
The relation of the control power supply voltage and the delay time of the loss detection when the control power supply is lost
is shown in the figure below.Power Supply Failure Detection Time [msec]
120
CP_PSF=160
100 CP_PSF=140
80
60
40
20
0
0 20 40 60 80 100 12 140 160 180
Control Power Source Voltage [V]
Fig 2.1.3 Control power lost detection time
CPSF
Control power source failure
Control Power Source Failure
Content (cause):
The control power supply voltage has dropped. The drive turns off the BLR signal and stops
Action:
Check the voltage of the control power supply.
Check whether an instantaneous interruption accident, etc. occurred.
Parameters: MSK_BLR6, CP_PSF
Rev.S
29
4GBF0632
(2) Output contactor open

When using the output contactor (option), if the output contactor that should be on, but is off, an ACSW error is detected.
ACSW_C
AC contactor closed
AC SWitch is Closing
Content (cause):
The contactor on the load side is closed although it is not turned on.
Action:
Check the contactor at the point of contact and for conductance through the contactor.
Parameters: MSK_SIL1
ACSW_F
AC contactor fault
AC SWitch Failure
Content (cause):
The contactor on the load side was open during operation. The drive turns off the UV signal and stops.
Action:
Check the contactor on the load side for any abnormality (the point of contact and the conductance).
Systems: Inverter
Parameters: MSK_UV1, MSK_HFD1, TIME_CTT, TIME_FOFF
ACSW_T
AC contactor opened
AC SWitch opened Timer
Content (cause):
The contactor on the load side is open. The READY signal is not turned on. When the contactor closes from opened status, there
is on delay timer (TIME_CTT).
Action:
It is “standard” for the contactor on the load side to be turned on with the establishment of a UV signal.
If this signal is detected, check the contactor (the point of contact and the conductance), even if the UV signal is turned on.
Systems: Inverter
Parameters: MSK_READY1, TIME_CTT
Rev.S
30
4GBF0632
(3) Others
AIN_FAULT
General analog input signal lost fault
General Analog INput signal lost FAULT
Content (cause):
Current signal fell lower than 4mA when using the 4-20mA current type general analog input. The UV signal is not turned on.
Action:
Check the condition of signal cable and the signal source.
The signal lost detection is not available when using the voltage type general analog input. Thus, set 0 to the mask setting.
MSK_UV2.AIN_FAULT_ = 1 (used), 0 (not used)
MSK_HFD2.AIN_FAULT_ = 1 (used), 0 (not used)
MSK_LFD1.AIN_FAULT_ = 1 (used), 0 (not used)
Parameters: MSK_UV2, MSK_HFD2, MSK_LFD1
UPS_ERR
Uninterruptible power supply unit error
Uninterruptible Power Supply unit ERRor
Content (cause):
The control power supply failure detected, in an optional system, that the uninterruptible power supply unit (UPS), supplying the
control power, failed. Turns off the UVA signal.
Action:
Check the UPS operating situation and the control power supply cables.
MSK_UVA3.UPS_ERR_ = 1 (used), 0 (not used)
Parameters: MSK_UVA3, FLG_UPS_USE
C_FN
Equipment ventilating fan stopped
Cooling FaN
Content (cause):
An equipment ventilating fan error has been detected. This detection is made by contactors status for the fans.
If the operation continues, “C_FN_T” is detected and turns off the UVA signal.
Action:
Check the fan contactors status and the thermal relays.
Check the rotation condition of the fan. (Abnormal sound, obstruction of foreign matter, burning of the fan bearing, etc.)
Check the fan motor.
Parameters: MSK_STPRQ1, MSK_LFD1
C_FN_B
Equipment ventilating redundancy fan stopped timer
Cooling FaN_B
Content (cause):
A redundant equipment ventilating fan error has been detected. This detection is made by contactors status for the fans.
If the operation continues, “C_FN_T” is detected and turns off the UVA signal.
Action:
Rev.S
31
4GBF0632
C_FN_T
Equipment ventilating fan stopped timer
Cooling FaN Timer
Content (cause):
Abnormal status of the equipment ventilating fan continued for the length of time set with the timer TIME_CFAN.
The drive turns off the UVA signal and stops.
This detection is made by contactors status for the fans.
Action:
Parameters: MSK_UVA1, TIME_CFAN
VAC_PH_LOSS
Input voltage phase loss detection
Voltage AC PHase LOSS
Content (cause):
Input AC voltage phase loss has been detected. The drive turns off the UVA signal and stop.
Action:
Check whether the power-supply voltages are balanced.
Parameters: MSK_UVA2, CP_VAC_PH_LOSS
VINV_PH_LOSS
Output Current phase loss detection
Voltage INVerter PHase LOSS
Content (cause):
An Output AC current phase loss has been detected. The drive turns off the UVA signal and stops.
Action:
Check whether the load current is balanced.
Check the current detector for any abnormality.
Parameters: MSK_UVA2, CP_VINV_PH_LOSS, TIME_VINV_PH_LOSS
VAC_ROT_F
Input voltage phase rotate failure
Voltage AC phase ROTate Failure
Content (cause):
Incorrect input AC voltage phase rotation has been detected. The drive turns off the UVA signal and stops. It is a start inter lock
(SIL1) standardly.
Action:
Check the power-supply voltages and phasing.
In the case of reverse phase, converter can not control with propriety. Reconnect the input voltage to normal phase.
Note: Available in firmware 04A or later (MSK_SIL1)
Parameters: MSK_UVA2, MSK_SIL1
Rev.S
32
4GBF0632
CELL_UV
Cell inverters under voltage (H/W gate block)
CELL Under Volatage
Content (cause):
The cell inverters are not under voltage (UV) condition.
The hardware gate block signal of the cells is input. In the case of this status, it becomes B_CELL_UV = 0.
Action:
When the control power is only on, the condition is not right because the cell inverters do not communicate yet.
After turning on the main power source, if the condition is not right it is considered the following.
(1) During operation of hardware gate block

When the external safety switch (UVS) or the panel interlock switch (P_SW) are on, the condition is not right because of
hardware gate block.
(2) Actual cell inverters topology and cell numbers setting are different.
If it is detected at inputting the control power, it has possibility that the value of cell number (CELL_NUM) does not match the
cell number of the equipment. If this value (CELL_NUM) is not correct, check parameters (CS_EQUIP_VOLT, SYSREM) are
correct setting.
(3) Cell inverters communication is not healthy.

It is possible that the cell inverters communication is not healthy. Serial communication error (SER_***_) in starting interlock
2 (SIL2) are simultaneously detected.
If the serial communication error occur it is also detected xn_LINK_F or xn_CELL_F (x=U,V and W, n=1~6) after the serial
communication healty once.
(4) PWB board’s jumper setting is not correct.

For this inverter series, the UVS2 signal is input from GIF board. If the UVS2 is not used, check the jumper setting that JP1
(UVS2_USE) is N.U. (Not used) on the GIF board. In addition, the XIO board should be set correct setting to not use UVS2.
(5) Hardware gate block wire broken

It has possible that the hardware gate block wire (optical cable) is broken and become hardware gate block status. If the
optical cable is not good connection, it may show the (3) status that serial communication is not healthy. On the other hand,
if the hardware gate block line is only disconnected by slotting extraneous material into the connector of the optical cable, it
is detected CELL_UV as first fault.
This protection does not set as “not used” except operating special mode for example simulated driving. Set the mask setting to
“used”.
MSK_UV1.CELL_UV = 1 (used)
Parameters: MSK_UV1, MSK_SIL2, CS_EQUIP_VOLT, SYSTEM
CELL_PR
Cell inverters preparation
CELL inverters PReparation
Content (cause):
It shows preparation of cell inverters condition for non precharge circuit model when main circuit power comes. The converter can
not start by UVA signal off.
Action:
Wait completed ready of the cell inverters. In case of type-G cell inverters used model, after accessing main power, it has
possibility to pass over several dozen seconds to ready.
Note: Available in firmware 09A or later
Parameters: MSK_UVA1, LVL_VDC_CCDRDY
Rev.S
33
4GBF0632
2.1.5 Operation-related protection

(1) External safely switch
The External safety switch is a hardware interlock signal used to stop operation of the equipment. This is connected electrically
with an external safety switch, etc. When the signal is turned off, the gate signal is blocked with a hardware logic circuit, without
microprocessor control.
The UVS circuit of this equipment configures the UVS1 (system 1) and the UVS2 (system 2) signals. Use of only UVS1, or use
of both UVS1 and UVS2, can be selected. When using both the UVS1 and the UVS2 signals, the equipment cannot operate
unless both are turned on.
UVS
External safety switch
Under Voltage Safety interlock
Content (cause):
The “operation interlock switch input”, from outside the master cubicle, is off. The drive turns off the UV signal and stops.
Action:
Check the condition on the master cubicle side.
Parameters: MSK_UV1
UVS1_ANS, UVS2_ANS
UVS1 answer, UVS2 answer
UVS1 ANSwer, UVS2 ANSwer
Content (cause):
Because UVS signal has been interrupted, the gate output interlock circuit is activated.
UVS1_ANS corresponds to the UVS signal (System 1), and UVS2_ANS corresponds to the UVS signal (System 2).
Action:
Automatically recovers after UVS signal of the corresponding system is input.
Replace the I/O XIO board and the CTR, GIF board when the UVS1_ANS or the UVS2_ANS occurs despite normal input of the
UVS signal.
Returning an answer of UVS2 (UVS2_ANS) needs main power input status. Check input of the main power.
When not using the UVS signal (System 2), masking the UVS2_ANS signal by setting the MSK_UV2 signal.
In this equipment, set always "N.U. (not used)" for the UVS2 jumper (JP4) on XIO board, regardless of the use conditions of UVS2
on GIF board. Do not change the jumper settings from the status of shipment.
See the term of FLG_UVS2_USE for the detail jumper setting of the PWB.
MSK_UV2.UVS1_ANS_ = 1 (used), 0 (not used)
MSK_UV2.UVS2_ANS_ = 1 (used), 0 (not used)
Parameters: MSK_UV2, FLG_UVS2_USE
(2) External equipment electrical ready condition

The UVA signal of the other drive equipment via the drive-to-drive transmission can be used as an operation interlock of this
drive equipment. When the UVA signal of the other drive equipment is used, allocate SSEQ_OUT1 of the other drive equipment
to an output address of the drive-to-drive transmission, and also allocate DT_DRV_SEQ of this drive equipment to the
corresponding input address.
UVA_EX
External equipment electrical condition ready condition
Under Voltage Auxiliary EXternal interlock
Content (cause):
UVA_EX is an external electrical condition signal. The drive turns off the off the UV signal and stops
Action:
Refer to the primary cause of the UVA off, of the inverter, of the opposite station.
MSK_UV1.UVA_EX = 1 (used), 0 (not used)
MSK_HFD1.UVA_EX = 1 (used), 0 (not used)
Parameters: MSK_UV1, MSK_HFD1
Rev.S
34
4GBF0632
(3) External interlock

This is an operation interlock signal from the external devices. This signal is a hardware or serial transmission signal.
IL
External interlock
InterLock
Content (cause):
An external interlock signal has been lost.
The drive turns off the UV signal and stops
Action:
Check the condition of the external signal.
MSK_UV1.IL_ = 1 (used), 0 (not used)
Parameters: MSK_UV1
(4) Panel interlock switch

This is an interlock switch on the panel. With this switch, operation can be stopped from the panel. Please be aware that the
voltage is still impressed from the converter etc. to the main circuit even after this switch is turned on.
P_SW
Panel interlock switch on
Panel SWitch
Content (cause):
The interlock switch on the cubicle is in “Operation prohibited” (lamp lit) status.
The drive turns off the UV signal and stops
Action:
Press the P_SW switch to turn the interlock switch to the “Operation permitted” (lamp unlit) status.
The mask setting below can define whether FAULT output is used or not used in turning on the switch.
MSK_HFD1.P_SW_ = 1 (used), 0 (not used)
The interlock switch is available regardless of the MSK_UV1.P_SW_ setting.
Rev.S
35
4GBF0632
(5) Others
C_IL
Closing interlock
Closing InterLock
Content (cause):
A secondary display caused by the UV starting interlock being off.
If this signal is not established, the UV signal cannot be turned on.
Action:
Refer to the display for the primary cause of the starting interlock (SIL) or to find the cause for the UV starting interlock being off.
Parameters: MSK_UV1
CHG_START
System change in progress
system CHanGing START
Content (cause):
CHG_START shows that the motor changeover control is in progress.
While the changeover control is in progress, the READY signal is turned off and operation is disabled.
Under normal conditions, after the changeover operation is completed, the system will automatically return to the previous status.
Action:
Check the wiring of the motor changeover circuit (2S and 3S signals).
MSK_READY2.CHG_START_ = 1 (used), 0 (not used)
Parameters: MSK_READY2, FLG_CHGSYS
STCMD
Driving signal starting interlock
STart CoMmanD
Content (cause):
The start command is entered before the UV signal is established.
The starting interlock condition is not satisfied.
Action:
Turn off the driving signal on the master side.
MSK_SIL1. STCMD = 1 (used), 0 (not used)
SWILON
Software interlock on
SoftWare InterLock ON
Content (cause):
The interlock switch of the EOI using a support tool is operating. The drive turns off the UV signal.
Action:
Perform mask because this is usually not used.
MSK_UV1.SWILON_ = 1 (used), 0 (not used)
Parameters: MSK_UV1
Rev.S
36
4GBF0632
RTRY
In retry operation
RETRY operation
Content (cause):
The drive operation is in retry mode due to some fault set in the RTRY_MSK signal.
The drive will retry after the interval time for the attempt times out.
When the drive successfully runs for 5 minutes, the start command turns off or the fault resets, the RTRY alarm will turn off.
Action:
Wait until the drive restarts.
Turn the start command off or use the fault reset to clear the retry operation.
Parameters: MSK_LFD2, RTRY_INTVL, RTRY_F_EN, RTRY_MSK, RTRY_MAX
LMT_FRST
Equipment fault reset limit
LiMiT Fault Reset
Content (cause):
The drive fault counter is full and if another fault occurs, it will replace the oldest traceback. The drive is attempting to warn the
customer, to prevent accidental loss of the oldest traceback data stored in memory.
The drive turns off the BLR signal.
This fault is also detected with detecting critical inverter/ converter current (H_OCA, H_C_OCA).
Action:
Please get traceback files and a parameter file using drive maintenance tool (TMdrive Navigator) or traceback picking tool (Trace
Save) and send us them.
The fault reset counter is reset when the fault reset switch or the EXRST digital input are pushed or set respectively for 5 seconds.
(Either one can reset the fault reset limit)
The mask setting below will define whether the BLR output is used or not used in turning on the switch.
MSK_BLR2.LMT_FRST_ = 1 (used), 0 (not used)
The fault reset switch is available regardless of the MSK_BLR2.LMT_FRST_ setting.
Parameters: MSK_BLR2, FLG_LMT_FRST
Rev.S
37
4GBF0632
2.1.6 Control circuit-related protection
(1) CPU error

When the firmware program does not operate correctly due to an error of the microprocessor that performs the control
operation, the watchdog is detected.
A CPU error in the circuit board is detected by the hardware to protect CPU.
CPU_M
Master CPU failure
CPU Master failure
Content (cause):
The watchdog failure has occurred in the main CPU of the CTR board.
The drive turns off the BLR signal and stops
This error may also occur when the 5 V power supply is abnormal.
Action:
For restarting the CPU, carry out a power supply re-initialization (by turning off the control power supply and turning it on again).
If recovery is not possible, even with the power supply re-initializing or this error occurs repeatedly, replace the CTR board.
This protection cannot be set as “not used”. Set the mask setting to “used”.
MSK_BLF1.CPU_M = 1 (used), MSK_BLR1.CPU_M_ = 1 (used)
Parameters: MSK_BLF1, MSK_BLR1
CPU_A
Slave CPU A failure
CPU slave A failure
Content (cause):
The watchdog failure has occurred in the slave CPU-A of the CTR board.
The drive turns off the BLR signal and stops
This error may also occur when the 5 V power supply is abnormal.
Action:
For restarting the CPU, carry out a power supply re-initialization (by turning off the control power supply and turning it on again).
If recovery is not possible even with the power supply re-initializing or this error occurs repeatedly, replace the CTR board.
MSK_BLF1.CPU_A_ = 1 (used), MSK_BLR1.CPU_A_ = 1 (used)
Parameters: MSK_BLF1, MSK_BLR1
(2) System setting error

System setting error detects the system setting errors. For example, when a parameter for other drive type equipment is loaded
into TMdrive-MVe2, a system error will be detected by the drive.
SYS_ERR
System configuration error
SYStem ERRor
Content (cause):
A system configuration setting error has been detected. The drive turns off the UVA signal.
The DIP switch (SW1) of the CTR board are not correct.
Action:
Check whether the adjustment record data of other drive type is loaded or not. Check whether, such as by mistake, the output
voltage type (4kV, 2kV) is set incorrectly.
Check whether the DIP switch (SW1) of the CTR board are setting off (0, 0, 0, 0).
MSK_UVA3.SYS_ERR_ = 1 (used)
Parameters: MSK_UVA3, SYSTEM
Rev.S
38
4GBF0632
(5) FPGA errors

It is detected clock down, watchdog error and CRC error regarding to FPGAs.
GIF_CLKDWN
GIF board clockdown
GIF board CLocKDowN
Content (cause):
A stop of the clock on the GIF board was detected. The drive turns off the BLR signal and stops.
Action:
Replace the GIF board.
MSK_BLR1.GIF_CLKDWN = 1 (used), 0 (not used)
Parameters: MSK_BLR1
FPGA2_WD
GIF FPGA2 watchdog error
GIF FPGA2 WatchDog error
Content (cause):
A watchdog error on the GIF board FPGA2 occurred. The drive turns off the BLR signal and stops.
Action:
Carry out a power supply re-initialization (by turning off the control power supply and turning it on again) to confirm the failure.
MSK_BLR1.FPGA2_WD = 1 (used), 0 (not used)
FPGA3_WD
Content (cause):
Action:
FPGA4_WD
Content (cause):
Action:
FPGA_CRC_ERR
GIF FPGA CRC error
GIF FPGA CRC Error
Content (cause):
An error of the FPGA on the GIF board was detected. The drive turns off the BLR signal and stops.
Action:
MSK_BLR1.FPGA_CRC_ERR = 1 (used), 0 (not used)
Rev.S
39
4GBF0632
(4) Transmission error

An error is detected in the main unit transmission and the transmission between drives.
TL_F1
Transmission failure 1 – Own station failure
Transmission Line Failure 1
Content (cause):
The watchdog failure has occurred in the CPU of the transmission board.
Depending on the sequence mask setting, this signal interlocks the UVA signal or the READY signal.
Action:
Replace the transmission board.
Parameters: MSK_UVA4, MSK_READY1, MSK_HFD2
TL_F2
Transmission failure 2 – Initialization failure
Content (cause):
An error has occurred when the equipment was initialized.
Depending on the sequence mask setting, this signal interlocks on the UVA signal or READY signal.
Action:
Parameters: MSK_UVA4, MSK_READY1, MSK_HFD2
TL_F3
Transmission failure 3 – Transmission failure
Content (cause):
A serial transmission error in the master station, or the current station itself has gone off-line.
An error has occurred on the transmission cable during operation.
Action:
Check the transmission board on the master station.
Check the optical fiber cable. If using the Ethernet Global Data (EGD) check the Ethernet cable.
Also check the situation of the other inverters connected to the same master station.
Parameters: MSK_UV2, MSK_READY1, MSK_HFD2
TL_F4
Transmission failure 4 – Drive-to-drive failure
Content (cause):
An error of data transmission between drives. This is detected when the other party is not online.
Action:
Check the error massage of inverter on the other party.
Check the optical fiber cable. If using the Ethernet Global Data (EGD) secondary exchange, check the Ethernet cable.
Parameters: MSK_UV2, MSK_READY1, MSK_HFD2
Rev.S
40
4GBF0632
DEGD_F2
DEGD transmission failure 2 – Initialization failure
Dynamic EGD transmission line Failure 2
Content (cause):
This protection is not used.
Note: Not used
Parameters: COMM_TYPE, MSK_READY1, MSK_HFD1
DEGD_F3
DEGD transmission failure 3 – Transmission failure
Dynamic EGD transmission line Failure 3
Content (cause):
This protection is not used.
Note: Not used
Parameters: COMM_TYPE, MSK_READY1, MSK_HFD1
Rev.S
41
4GBF0632
(5) Serial communication error

This equipment uses serial communication between control boards in the control panel and other control boards in cell inverters
through optical cables. SER_IxA_, SER_IxB_, SER_CnA_, SER_CnB_ (x = U,V,W, n = 1 - 3) are each serial communication
errors which are condition starting interlock (SIL2). Even if any one of serial communication loop is not healthy, CELL_UV status is
not complete, gate blocking is not released.
Even if optical cables are misconnected, optical loop are formed, and every serial communications become healthy status as the
case may be. However, CELL_SET_ERR (Cell inverters connection error) is detected, and UVA signal turns off.
In the status that CELL_UV is complete, if datas of serial communication mismatch, xn_LINK_F (x = U,V,W, n = 1 -6) are detected,
and BLR_ signal turns off. In addition, if CELL_UV turns off with disconnecting of serial communication (H/W gate block),
xn_CELL_F (x = U,V,W, n = 1 - 6) of caused cell inverters are detected, and BLR_ signal turns off.
SER_IUA, SER_IVA, SER_IWA

Serial communication error inverter loop U-phase A, V-phase A and W-phase A
SERial communication error Inverter loop U-phase A
SERial communication error Inverter loop V-phase A
SERial communication error Inverter loop W-phase A
SER_IUB, SER_IVB, SER_IWB

Serial communication error inverter loop U-phase B, V-phase B and W-phase B
SERial communication error Inverter loop U-phase B
SERial communication error Inverter loop V-phase B
SERial communication error Inverter loop W-phase B
SER_C1A, SER_C2A, SER_C3A

Serial communication error converter loop1st A, 2nd A and 3rd A
SERial communication error Converter loop 1st A
SERial communication error Converter loop 2nd A
SERial communication error Converter loop 3rd A
SER_C1B, SER_C2B, SER_C3B

Serial communication error converter loop1st B, 2nd B and 3rd B
SERial communication error Converter loop 1st B
SERial communication error Converter loop 2nd B
SERial communication error Converter loop 3rd B
Content (cause):
The corresponded serial communication loop’s errors are detected. When there are the unhealthy loops, starting interlock is not
completed. Even if any one of the loops is not healthy (Healthy: B_CCD_HLTY = 1), CELL_UV is not completed, and the
equipment does not become Ready status.
Action:
Check the corresponded optical cables and optical linkers, and their connection.
The relation of the failure and the corresponded loops is different depending on the equipment’s topology.
Rev.S
42
4GBF0632
C1A
CELL_NUM = 1 U1
IUA
V1
IVA
IWA W1 C2A
CELL_NUM = 2 U1 U2
IUA
V1 V2
IVA
W1 W2
IWA C3A
U1 U2 U3
CELL_NUM = 3 IUA
V1 V2 V3
IVA
W1 W2 W3
IWA C1B C2B
CELL_NUM = 4 U1 U2 U3 U4
IUA IUB
V1 V2 V3 V4
IVA IVB
W1 W2 W3 W4
IWA IWB
CELL_NUM = 5 U1 U2 U3 U4 U5
IUA
V1 V2 V3 V4 V5
IVA
W1 W2 W3 W4 W5
IWA C3B
CELL_NUM = 6 U1 U2 U3 U4 U5 U6
IUA IUB
V1 V2 V3 V4 V5 V6
IVA IVB
W1 W2 W3 W4 W5 W6
IWA IWB
CELL_SET_ERR
Cell setting error
CELL SETting ERRor
Content (cause):
An error of the cell setting was detected.
Action:
Check whether the optical cable connected correctly. Check whether the number of steps cell (CELL_NUM) is equal to the
number of steps actual cell for the equipment. If CELL_NUM is not correct, set CS_EQUIP_VOLT and SYSTEM correctly.
Parameters: MSK_UVA3, CS_EQUIP_VOLT, SYSTEM
Rev.S
43
4GBF0632
(6) Others
PN15_F
+15V or -15V of voltage error
P or N 15V Fault
Content (cause):
A voltage error of +15V or -15V has been detected. The drive turns off the BLR signal and stops.
Action:
Check the control power unit. Replace the CTR board when no error is found in the power supply.
Parameter: MSK_BLR6
PLD_ERR
PLD error
PLD ERRor
Content (cause):
The PLD (Programmable Logic Device) error of the CTR board has been detected.
Turns off BLR signal and stops.
Action:
PLD_ERR may be detected when the jumper “Use UVS2” (JP4) on the XIO board is set as “USE”
In this equipment, set always "N.U. (not used)" for the UVS2 jumper (JP4) on XIO board, regardless of the use conditions of UVS2
on GIF board. Do not change the jumper settings from the status of shipment.
In all other situations, replace the CTR board.
PARA_ERR
Set parameter check error
PARAmeter check ERRor
Content (cause):
This is a checksum error of parameter setting value. The drive turns off the UVA signal.
Action:
Carry out a power supply re-initialization (by turning off the control power supply and turning it on again) to confirm the error.
Reload the adjustment record data.
MSK_UVA3.PARA_ERR_ = 1 (used)
Parameters: MSK_UVA3
CODE_ERR
SRAM code checksum error
sram CODE checksum ERRor
Content (cause):
A check sum error of SRAM, that is for CPU (PP7A) code memory, has been detected. Turns off UVA signal and stops, or
indicates alarm(LFD) without stop.
Action:
It may be a failure of SRAM. Replace the CTR board.
Note: Not used
Parameters: MSK_LFD2, MSK_UV2, TIME_CODE_ERR
Rev.S
44
4GBF0632
2.2 Protection for Inverter
2.2.1 Motor speed protection.

(1) Overspeed
An overspeed is detected when the motor speed exceeds the preset speed. An overspeed can be detected even in
sensor-less vector control or V/f control. When V/f control is used, the output frequency instead of the motor speed is used for
the overspeed detection.
The standard setting is CP_OSP = 115.0%.
OSS
Overspeed
OverSpeed Software
Content (cause):
An overspeed of the motor has been detected. Turns off BLR signal and stops.
Action:
Confirm there is no disconnection of a speed sensor.
Check the amount of overshoot of the speed control.
Check whether there is any influence of the machine connected, material, etc.
Parameters: MSK_BLR3, CP_OSP
(2) Overfrequency
Excessive output frequency is detected when the output frequency exceeds the setting value.
As the standard setting, the frequency [Hz] corresponding to 115% of the maximum frequency is set with CP_OSS_FO.
OSS_FO
Output frequency exceeded
OverSpeed Software FO (FO: frequency)
Content (cause):
Excessive output frequency has been detected. The drive turns off the BLR signal and stops.
Action:
Check the amount of overshoot of the speed control.
Check whether there is any influence of the machine connected, material, etc.
MSK_BLR3.OSS_FO_ = 1 (used), 0 (not used)
Parameters: MSK_BLR3, CS_MOTOR_FREQ, CP_OSS_FO
(3) Cell overheat protection

There are two protections for cell inverters overheat. The protection symbols xn_OH (x = U, V, W / n = 1 - 6) are off signal of
BLR by each cell inverters temperature, and the CELL_OH_A is alarm signal by maximum temperature in all of the ones. The
standard level of inverter trip is 75 degC and the alarm level is 70 degC.
CELL_OH_A
Cell overheat alarm
Cell OverHeat Alarm
Content (cause):
The maximum temperature of cell inverters is over the alarm level. The drive outputs stop request signal (STPRQ).
When the fin temperature does not increase, the cause is estimated disconnecting of the sensor.
Action:
Check the cooling fans operation.
Check the filters condition in the front panel.
Check the fin temperature of the cell inverters by using maintenance tool or the display.
MSK_STPRQ1.CELL_OH_A_ = 1 (used), 0 (not used)
Nore: Available in firmware 03A or later
Parameters: MSK_STPRQ, CP_CELL_OH_A
Rev.S
45
4GBF0632
(4) Speed detection error

Speed detection error is activated when a speed detection error (speed sensor disconnection, etc.) is detected.
When a resolver is used as the speed sensor, SP_ERR is detected if a variation of the speed feedback per 1msec exceeds
CP_SP_ERR for 3mses.
When sensor-less vector control is used, the speed estimation compensation WOCD exceeds SL_CP_SP_ERR for time
defined by SL_TIME_SP_ERR.
When a differential PLG is used as the speed sensor, SP_ERR2 will occur if the level status of a differential signal of the PLG
is not correct for 10ms or more. (ex, when A is H level, A - is L level)
When a single-end PLG is used as the speed sensor, SP_ERR2 will occur if the speed feedback is less than 0.2% and the
torque reference is limited by the torque limit for time defined by TIME_SP_ERR2. In this case, this protection is not used
because it is indistinguishable from the motor being locked by a high load torque.
SP_ERR
Speed detection error
SPeed sensor ERRor
Content (cause):
A speed feedback error has been detected. Turns off BLR signal and stops.
Action:
Check whether rolling material, etc. is caught inside the equipment.
Check the wiring of the speed sensor (resolver) for any abnormality.
In sensor-less, check whether the sensor-less speed presumption parameters are set up correctly.
If it is detected after flying restart, check that FSEEK_ID_RATE is equivalent to MI_T2.
MSK_BLR3.SP_ERR_ = 1 (used), 0 (not used)
Parameters: MSK_BLR3, CP_SP_ERR, SL_CP_SP_ERR, SL_TIME_SP_ERR, FSEEK_ID_RATE
SP_ERR2
Speed detection error 2
SPeed sensor ERRor 2
Content (cause):
A speed feedback error has been detected. For single-ended encoders, this fault prevents operation near the torque limit while
speed reference & feedback have opposite polarities. For differential encoders, this fault code evaluates the integrity of the
hardware feedback signals. When detected, SP_ERR2 turns off the BLR signal and stops the drive.
Action:
Check the wiring and the coupling of the speed sensor(PG) for any abnormality.
Check that XIO jumpers (SW4, SW5 & SW6) correctly select the source of the power provided to the encoder.
MSK_BLR3.SP_ERR2_ = 1 (used), 0 (not used)
Parameters: MSK_BLR3, FLG_DIFF_PG
SP_SIL
Zero speed starting interlock
SPeed Start InterLock
Content (cause):
Because the motor is running, a startup interlock condition cannot be made.
Action:
Check whether the motor has stopped. Attempt to operate the equipment again.
Starting the motor while it is still running is required, mask the SP_SIL signal.
MSK_SIL1.SP_SIL_ = 1 (used), 0 (not used)
Parameters: MSK_SIL1, MA_ZERO_SP
Rev.S
46
4GBF0632
2.2.2 Motor/break related protection

(1) Motor overheat
When a temperature sensor is provided (optional) for the motor, temperature is detected to protect the motor.
The standard setting is CP_MOTOR_OH = 155 C.
An M_OH_A alarm is activated at 10 C lower (fixed) than the CP_MOTOR_OH setting value.
M_OH
Motor overheat
Motor OverHeat
Content (cause):
The motor temperature detection circuit has detected an overheat.
Action:
Check the cooling situation of the motor.
MSK_UV2.M_OH_ = 1 (used), 0 (not used) MSK_HFD2.M_OH_ = 1 (used), 0 (not used)
MSK_STPRQ1.M_OH_ = 1 (used), 0 (not used) MSK_LFD1.M_OH_ = 1 (used), 0 (not used)
Parameters: MSK_UV2, MSK_HFD2, MSK_STPRQ1, MSK_LFD1, CP_MOTOR_OH
M_OH_A
Motor overheat alarm
Motor OverHeat Alarm
Content (cause):
An overheat alarm is detected by the motor temperature detection circuit.
If the temperature rises further, "M_OH" is activated.
Action:
Check the cooling situation of the motor.
The mask below setting can define whether this protection is used or not used.
MSK_STPRQ1.M_OH_A_ = 1 (used), 0 (not used) MSK_LFD1.M_OH_A_ = 1 (used), 0 (not used)
(2) Motor temperature detector fault

When the temperature of the motor temperature sensor described above exceeds 200 C (fixed value), a sensor fault is
assumed and MTMP_S is detected.
MTMP_S
Motor temperature detector fault
Motor TeMPerature Stop request
Content (cause):
An error is found in the motor temperature detector.
Action:
Check the motor temperature and motor temperature detector.
MSK_STPRQ1.MTMP_S_ = 1 (used), 0 (not used) MSK_LFD1.MTMP_S_ = 1 (used), 0 (not used)
Rev.S
47
4GBF0632
(3) Motor cooling fan stop

If the motor cooling fan circuit is located outside, the operation signal of the cooling fan circuit is connected to the inverter. This
enables the motor cooling fan interlock to be set.
It is also possible to output an alarm with an M_FN signal and stop the equipment when an M_FN_T signal is activated, after an
elapse of the time specified by the TIME_MFAN timer.
The standard setting is TIME_MFAN = 0.0 (s).
M_FN
Motor cooling fan stopped
Motor FaN
Content (cause):
The motor cooling fan stopped. If the operation continues, “M_FN_T” will activate.
Action:
Start the motor cooling fan.
MSK_SIL1.M_FN_ = 1 (used), 0 (not used)
MSK_STPRQ1.M_FN_ = 1 (used), 0 (not used) MSK_LFD1.M_FN_ = 1 (used), 0 (not used)
Parameters: MSK_SIL1, MSK_STPRQ1, MSK_LFD1
M_FN_T
Motor cooling fan stopped timer
Motor FaN Timer
Content (cause):
The condition of the motor cooling fan being stopped has continued for the length of time set with the TIME_MFAN timer.
The drive turns off the READY signal and stops.
Action:
Start the motor cooling fan.
MSK_READY2.M_FN_T_ = 1 (used), 0 (not used) MSK_HFD2.M_FN_T_ = 1 (used), 0 (not used)
Parameters: MSK_READY2, MSK_HFD2, TIME_MFAN
(4) Electromagnetic brake energizing circuit fault

When an electromagnetic brake is provided optionally, brake-related fault is detected.
BR_F
Electromagnetic brake energizing circuit fault
BRake Failure
Content (cause):
A brake operation circuit fault.
BR_F indicates a situation in which no answerback (operation confirmation signal) is returned although brake releasing command
"BR" is output. Turns off READY signal and stops.
Action:
In the case of a built-in type brake, the contactor of the energizing circuit may be failing. Check the contactor.
In the case of an air brake, the micro switch of the air valve may be failing.
Check the operation of the electromagnetic valve and micro switch.
When using an electromagnetic brake, an error (current drop) may be detected in the energizing unit.
Check whether the LED "LF" of the energizing unit is on. If it is off, check the input voltage and output current.
Parameters: MSK_READY2, MSK_HFD2, TIME_BR
B_HLTY
Break healthy detection
Break HeaLThY detection
Content (cause):
The brake healthy signal.
Action:
Check the brake circuit.
Rev.S
48
4GBF0632
2.2.3 Motor control related protection

(1) Output open
NO_LOAD is detected when the output open state is detected.
NO_LOAD
Output side open
output NO LOAD detection
Content (cause):
An open load has been detected. The drive turns off the UVA signal and stops.
The NO_LOAD signal is generated when the feedback current becomes one eighth or less of the excitation current.
The load circuit may be left open.
Action:
Chack the load circuit. After that, check the IGBT main circuit, gate circuit or the current detection circuit.
MSK_UVA3.NO_LOAD_ = 1 (used), 0 (not used)
(2) Others
SP_LOST
Speed reference lost
SPeed reference LOST
Content (cause):
SP_LOST detects the speed reference lost.
Depending on the mask setting, SP_LOST becomes one of the following during operation.
(1) SP_LOST turns off the UV signal and performs a free-run stop(coast to stop).
(2) SP_LOST turns off the HFD signal and performs a free-run stop(coast to stop).
(3) SP_LOST turns off the READY signal and performs a slowdown stop(deceleration to stop).
Action:
Check the connection and level of the speed reference signal.
Parameter: MSK_UV2, MSK_HFD2, MSK_READY2, CP_SP_LOST
SP_LST_A
Speed reference lost alarm
SPeed reference LoST Alarm
Content (cause):
Detects the speed reference lost.
Action:
Check the connection and level of the speed reference signal.
If detection of this signal is not required, mask the signal.
Parameter: MSK_STPRQ2, MSK_LFD2
SL_CHG
Automatic sensorless mode change
automatic SensorLess mode CHanGe
Content (cause):
The automatic sensor-less switch function (option), is a function used to change the drive into sensor-less operation automatically
and to continue running, if a PLG sensor disconnection is detected, in the inverter, that controls the speed by differential PLG.
SL_CHG is output after the control mode is changed to sensor-less.
The commissioning of the sensor-less speed estimation in addition to the vector control with speed sensor, is required for the
SL_CHG function.
Action:
Check the speed sensor and then cycle the control power supply.
Turn off the automatic sensor-less mode change function to trip the equipment after the failure of the speed sensor is detected.
Parameters: MSK_LFD1, FLG_SP_ERR_SL
Rev.S
49
4GBF0632
N_IM
Number of IM motors error
Number of Induction Motors failure
Content (cause):
In a multiple sensor-less units driving system, the number of motors driven became the number equal to or less than the low limit
level. The drive turns off the UVA signal and stops.
Action:
Check the MCCB installed in each motor.
Check the detection circuit to count the number of motor units.
Systems: Multiple sensors-less units driving system
Parameters: MSK_UVA4, CP_N_IM_LL
SOFT_STL
Automatic speed reduce operating in overload
SOFT STaLl
Content (cause):
The operation is in soft stall mode due to an overload or high temperature.
(Soft stall mode decelerates the moor speed to protect the equipment against overload)
Action:
Check the load condition.
Check the load and whether circumference temperature is not over 40 degrees C when using current de-rating at high
temperature function.
To turn off automatic speed reduce function, set FLG_SOFT_STALL = 0.
Parameters: MSK_LFD1, CR_SOFT_STALL, FLG_SOFT_STALL
REV_ROT_F
Reverse rotate failure
REVerse ROTate Failure
Content (cause):
REV_ROT_F detected the motor was rotating in the opposite direction to the speed reference.
Action:
Check the wiring of the motor.
Check the wiring and the coupling of the speed sensor for any abnormality.
Parameters: MSK_UVA4, CP_REV_ROT
ROT_F
Motor rotate failure
motor ROTate Failure
Content (cause):
The motor stall has been detected.
Action:
Check the wiring and the coupling of the speed sensor for any abnormality.
Parameters: MSK_UVA4, CP_ROT_F_DIFF, CP_ROT_F_EN, TIME_ROT_F, PM_Z_DET_TIME
Rev.S
50
4GBF0632
2.3 Synchronize Transfer and Capture

CPT_FAIL
Capture failure
CaPTure FAIL
Content (cause):
Utility synchronization capture failed. The drive turns off the UVA signal and stops，or the drive turns off the LFD signal and
indicates an ALARM.
Action:
Check that the line voltage detection circuit of the inverter output is connected correctly.
Check the value of the parameter “LVL_IPLL_DLTQ” of the phase synchronization criteria.
Check the utility power supply voltage for distortion or frequency variations.
Parameters: MSK_LFD2, LVL_IPLL_DLTQ
XFR_INCMP
Transfer incomplete
transFeR INCoMPlete
Content (cause):
The utility synchronization transfer did not complete or it became the condition the AC contactor staying open for 1sec.
Action:
Check the signal of the AC contactor.
Parameters: MSK_LFD2
XFR_FAIL
Transfer failure
transFeR Fail
Content (cause):
The drive was unable to synchronize with the utility during the synchronous transfer sequence.
Action:
Check that the power supply voltage detection circuit is connected correctly.
Check the value of the parameter “LVL_XFR_DLTQ” of the phase synchronization criteria.
Check for any factor that causes excessive speed ripples on the load side.
Parameters: MSK_BLR3, LVL_XFR_DLTQ
BP_CTT
Bypass contactor closed
ByPass CTT closed
Content (cause):
The contactor connected in parallel with the output of the inverter has closed.
Action:
Check whether the change signal of utility line and inverter is not utility.
The bypass contactor may be failing. Check the contactor.
Parameters: MSK_UV1, MSK_SIL1
Rev.S
51
4GBF0632
2.4 Protection for Converter
2.4.1 Pre-charge-related protection

The cell inverters have large capacity capacitors in the DC main circuit. If the input main voltage MCCB turns on directry in the
state that the capacitor is discharged, it is possible to destroy equipment with larege current. Therefore it is necessary to charge
with the capacitor first using input reactor (ACL) depends on equipment frame size. This charging of the capacitors is called
pre-charge.
PRE_CTT
Pre-charge contactor opened
PRE-charge CTT opened
Content (cause):
The contactor of the pre-charge circuit is open. This protection does not detect because answer signal of precharge contactor is
hold when detecting power source failure.
Turns off the UV or HFD signal and stops
Action:
Check the precharge contactor status.
This protection cannot be set as “not used”. Set the mask setting to “used”. The parameter of SGN_DI_GIF.B8 (PRE_CTT_ANS)
must be set to 1 in the case of the model that precharge circuit is not used.
MSK_UV2.PRE_CTT_ = 1 (used)
Parameters: MSK_UV2, MSK_HFD2, SGN_DI_GIF
PRE_CTT_F
Pre-charge contactor failure
PRE-charge CTT Failure
Content (cause):
The discrepancy between precharge contactor’s command and answer was detected.
Action:
Check the precharge contactor status, and the command and answer signal connecting.
REC_F
Rectifier failure
RECtifier Failure
Content (cause):
This protection is detected rectifier failure when turning on the input AC breaker. This failure shows diode rectifier failure before
switching gate for the PWM converter mode. In addition, xn_CELL_F (x=U, V and W, n=1 - 6) are simultaneously detected to
judge which cell inverters have problem.
(1) AC voltage is not detected nonetheless it takes definite period of time after turning on the input AC breaker. (Protection of
input ACL for precharge circuit). In this case, all of xn_CELL_F of the used cell inverters are simultaneously detected.
(2) There are cell inverters which the DC voltage is not detected nonetheless AC voltage is detected after turning on the input
AC breaker. (Diode rectifiers failure)
The DC voltage feedbacks are detected after initialize time for FPGAs of the CCD boards (TIME_REC_F). In this case, it
seems either diode rectifiers itself and CCD boards’ failure. In this case, the xn_CELL_F of cell inverters which have problem
are simultaneously detected.
Action:
Identify cell inverters which have problems. It can be judged the failure mode (1) or (2) by the pattern of the xn_CELL_F detected.
In the case of the cause (1), check the connection of AC input. In addition, check the input transformer winding wire because it is
possible that the winding wires are short.
In the case of the cause (2), it is possible that either diode rectifiers itself and the CCD boards have some problems. Exchange the
cell inverters which detect simultaneously CELL_F.
Parameters: MSK_BLR3, MSK_BLR7 – 15, MSK_SIL2, CP_REC_F, TIME_REC_F
Rev.S
52
4GBF0632
2.4.2 Ground detection-related protection

(1) Grounding detection
An error is detected when the zero-phase voltage from output voltage feedback exceed a preset value.
GR_A
Ground detection alarm
GRound detection Alarm
Content (cause):
GR_A detects when the ground current increases above the ground detection alarm level.
Action:
Check whether the main circuit cable etc. has Insulated degradation.
Parameters: MSK_LFD1, MSK_STPRQ1, CP_GDV_A, FLT_GDV
(2) Grounding detection timer

The common use is that an alarm is output with a GR signal and the equipment is stopped when a GR_T signal is activated,
after an elapse of the time specified by the TIME_GR timer.
The standard setting is TIME_GR = 0.1(s).
GR_T
Ground detection timer
GRound detection Timer
Content (cause):
A ground fault has been detected.
A ground fault has been detected. The drive turns off BLR signal and stops.
Action:
Check the load, the output cables and the inverter main circuit for ground faults.
Parameters: MSK_UVA3, MSK_HFD2, MSK_LFD1, TIME_GR, CP_GDV, FLT_GDV
(3) Output voltage feedback failure

The output voltage feedback failure has two types detection which are alarm level and trip level. When these failures are
detected, grounding detections are masked automatically.
VFBK_F
Output voltage feedback failure
Output Voltage FeedBacK Failure
Content (cause):
A failure of the output Voltage of the inverter has detected. Turns off UVA signal and stops.
Action:
Check the output voltage feedback gain (CNT_GS_VVU, VWU, VVW).
Check the output voltage detector for any abnormality.
Parameters: CP_VFBK_F, MSK_UVA3
VFBK_F_A
Output voltage feedback failure alarm
Output Voltage FeedBacK Failure Alarm
Content (cause):
A failure of the output Voltage of the inverter has detected.
Action:
Check the output voltage feedback gain (CNT_GS_VVU, VWU, VVW).
Check the output voltage detector for any abnormality.
Parameters: CP_VFBK_F_A, MSK_STPRQ2
Rev.S
53
4GBF0632
2.4.3 Power supply related protection

AC_P_T
AC input circuit breaker open
AC MCCB open
Content (cause):
The input AC circuit breaker (AC_MCCB) is open. The drive turns off the UVA signal and stops. When the AC input circuit breaker
closes from opened status, there is on delay timer (TIME_AC_P).
Action:
If no interface from the auxiliary contact of the input AC circuit breaker is provided for this signal, mask AC_MCCB.
Check the wiring of the answerback auxiliary contact of the input AC circuit breaker.
Check the input AC circuit breaker for any abnormality.
Parameters: MSK_UVA1, TIME_AC_P
UVA_SIL
Under AC voltage starting interlock
Under Voltage Ac Starting InterLock
Content (cause):
The starting interlock conditions are not completed because of the main input voltage is under level CP_UVA_SIL.
Action:
Check whether the operation procedure is correct or not.
Check the input AC circuit breaker for any abnormality.
Check the setting value of rated AC voltage.
Check the PT for detecting input AC voltage, and the setting value.
Parameters: MSK_SIL1, CP_UVA_SIL, TIME_UVA_SIL, CS_AC_VOLT, CS_PT_RATIO
MPSF
Main power source failure
Main Power Source Failure
Content (cause):
An AC main power supply loss has been detected during operation. Or, a voltage disturbance such as the PLL malfunction of the
converter continued for a long time to the motor stop. The drive turns off the BLR signal and stops.
Action:
Check the wiring of the main circuit, the input voltage detector and the fuse.
Parameters: MSK_BLR6, CP_UVA, TIME_MVD, CP_PSFRCV_TIME
UV_MPSF
Main power source failure
Under Voltage Main Power Source Failure
Content (cause):
An AC main power supply loss has been detected.
Action:
Check the wiring of the main circuit, the input voltage detector and the fuse.
Parameters: MSK_UV1, CP_UVA, TIME_MVD
NO_VAC
No AC voltage input
No Volgate AC input
Content (cause):
Nonetheless input circit breaker ON answer come back, input AC voltage does not increase enough. BLR signal turns off and stop.
If it has the JK-switch option for the UL-CSA model, this protection is not used.
Action:
Check AC voltage input connection.
Check upper level circuit breaker.
Check the input transformer wire short circuit or not.
Parameters: MSK_BLR3, CP_UVA
Rev.S
54
4GBF0632
CPLL_ERR
PLL Error of Converter
Converter PLL ERRor
Content (cause):
When the converter is under operation, input voltage PLL error is detected.
The drive turns off the UV signal and stops.
Action:
Check the condition of input voltage.
MSK_UV1.CPLL_ERR_ = 1 (used), 0 (not used)
Note:
Available in firmware 10A or later
Parameters: MSK_UV1
OH_ACL
ACL overheat
OverHeat ACL
Content (cause):
An ACL overheat has been detected. If the operation continues, “OH_ACL_T” will operate.
Action:
Check the operation situation for an overload condition.
Check the cooling situation and the temperature relay of the ACL.
MSK_STPRQ1.OH_ACL_ = 1 (used), 0 (not used) MSK_LFD1.OH_ACL_ = 1 (used), 0 (not used)
OH_ACL_T
ACL overheat timer
OverHeat ACL Timer
Content (cause):
The ACL overheat condition continued for the length of time set with the TIME_ACL timer.
Action:
Check the operation situation for an overload condition
Check the cooling situation and the temperature relay of the ACL.
The below mask setting can define whether this protection is used or not used.
MSK_UVA3.OH_ACL_T_ = 1 (used), 0 (not used)
Parameters: MSK_UVA3, TIME_ACL
BLA
AC circuit breaker trip
BLocking signal - Auxiliary
Content (cause):
An external BLA off signal (AC circuit breaker off) was detected. The drive turns off the UVA signal and then stops.
The BLA signal is sent to the general purpose DI (DI_EX2.Bit9).
Action:
Check the external BLA signal.
Rev.S
55
4GBF0632
2.5 Protection for SM Control
BLF
Field critical fault
Electrical major fault of field circuit
Content (cause):
This is a secondary display caused by the BLF condition being off.
Action:
Refer to the display for the primary cause of the BLF being off.
FCL_T
Field current limit timer
Field Current Limit Timer
Content (cause):
The operation with a field current limit has continued for the length of time set with the MS_TIME_FLDCL timer.
The drive turns off the BLF or the UVA signal and stops.
Action:
Check the parameter MS_FLDCL of the detection level and parameter MS_TIME_FLDCL of the detection timer.
Check the condition on the exciter.
Check the operation status of the equipment.
Parameters: MSK_BLF1, MSK_UVA1, MS_FLDCL, MS_TIME_FLDCL
Note:
FCL_T is enabled when the field current is used.
FCL_TA
Field current limit timer alarm
Field Current Limit Timer Alarm
Content (cause):
An operation under the field current limited condition continued for up to 80% of the time set with the field current limit timer
MS_TIME_FLDCL_A.
The stop request STPRQ has been output.
If the operation continues, “FCL_T” activates and the breaker trips.
Action:
Check the parameter MS_FLDCL of the detection level and parameter MS_TIME_FLDCL of detection timer.
Check the condition on the exciter.
Parameters: MSK_STPRQ2, MS_FLDCL, MS_TIME_FLDCL
Note:
This is valid when field current is used.
FL_READY
Exciter ready condition
FieLd READY
Content (cause):
The ready status of the exciter has failed. The drive turns off the READY signal.
Action:
Check the drive interface to the exciter and the condition of the exciter.
Parameters: MSK_READY1
Note:
FL_READY is enabled when B_FL_READY for the exciter is used.
Rev.S
56
4GBF0632
FL_FAULT
Exciter failure
Field FAULT
Content (cause):
The Exciter detected the failure of the exciter.
The drive turns off the BLF signal and stops.
Action:
Check the drive interface with the exciter and the condition of the exciter.
Parameters: MSK_BLF1
Note:
FL_FAULT is enabled when B_FL_FAULT for the exciter is used.
FOC
Field current over
Field OverCurrent
Content (cause):
Exciter detected the over current detection.
Turns off BLF signal and stops.
Action:
Parameters: MSK_BLF1
Note:
FOC is enabled when B_FOC for the exciter is used.
FOC_S
Field current over (soft detection)
Field OverCurrent Soft detection
Content (cause):
It has been detected that a field current feedback is greater than the over current protection level MS_CP_FOC.
The drive turns off the BLF signal and stops.
Action:
Check the detection level of parameter MS_CP_FOC.
Parameters: MSK_BLF1, MS_CP_FOC
Note:
FOC_S is enabled when the exciter field current is used.
FSTOP
Exciter stopped
Field STOPped
Content (cause):
FSTOP is the condition were the exciter run and stop status differs from the field command B_FL_CMD.
The drive turns off the BLF or the UVA signal and stops.
Action:
Parameters: MSK_BLF1, MSK_UVA1
Note:
This is valid when B_FL_RNTD by exciter is used.
Rev.S
57
4GBF0632
LF
Field lost
Lost Field
Content (cause):
A field current feedback loss has been detected while using the field current feedback.
A voltage error is exceeding the protection level MS_CP_LF during voltage control, when not using the field current feedback.
The drive turns off the BLF signal or the UVA signal and stops.
Action:
Check the parameters, for example, the detection level.
Check the operation status, because LF is the detection from the voltage when not using the field current feedback.
Parameters: MSK_BLF1, MSK_UVA1, MS_CP_LF, MS_VPLL_SP, MS_FLBST_VPLL, MS_FLG_FCF_E
OV_S
Over voltage (soft detection)
Over Voltage Soft detection
Content (cause):
The drive has detected, that an inverter output voltage is greater than the over voltage protection level MS_CP_OV.
The drive turns off the BLF signal or the UVA signal and stops.
Action:
Check the operation status, because the OV_S signal is the detection from the voltage reference that is estimating the speed and
the flux reference.
Parameters: MSK_BLF1, MSK_UVA1, MS_CP_OV
VPLL_ERR
Inverter output voltage PLL error
Voltage Phase Lock Loop ERRor
Content (cause):
Excessive phase error of the IPLL has been detected.
Action:
Check the parameter MS_CP_VPLL_ERR detection level.
Check the operation status and the load status.
Parameters: MSK_UVA4, MS_CP_VPLL_ERR
Note:
This is enabled when the VPLL control and the voltage are exceeding parameter LVL_VF_LOW.
Z_PLS_A
Pulse Generator Z pulse undetection
pulse generator Z PuLSe undetection Alarm
Content (cause):
In SM PLG vector control with Z pulse use setting, the drive cannot detect first Z pulse after turn on the control power
even the motor is rotating. The drive outputs the ALARM signal.
If using differential PLG, the drive detect Z_PLS_A when lost Z pulse under operation also.
Action:
Check the power source and signal lines of PLG.
If not use Z pulse correction, set MS_FLG_ZPLS 0.
Parameters: MSK_STPRQ2, MS_FLG_ZPLS
Note:
Available in firmware 10A or later.
Rev.S
58
4GBF0632
2.6 Motor protection

MP_BE_TM1_OL - MP_BE_TM3_OL
Bearing temperature 1 - 3 over level
BEaring TeMperature 1 - 3 Over Level
Content (cause):
An excessive rise in the bearing temperature 1 - 3 signal was detected. The drive outputs the MP_FAULT signal and quick stops.
Action:
Check for the cause of the bearing temperature rise.
Parameters: MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1, MP_BE_TM_LV, TIME_MPBET_QS
MP_BE_TMX_OL
Maximum of bearing temperatures over level
BEaring TeMperature maX Over Level
Content (cause):
An excessive rise in the maximum of the bearing temperature 1 - 3 signal was detected. The drive outputs the MP_FAULT signal
and quick stops.
Action:
Parameters: MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1, MP_BE_TM_LV, TIME_MPBET_QS
MP_CW_TM1_OL, MP_CW_TM2_OL
Cooling water temperature 1, 2 over level
Cooling Water TeMperature 1, 2 Over Level
Content (cause):
An excessive rise in the cooling water temperature 1 or 2 signal was detected. The drive outputs the MP_FAULT signal and quick
stops.
Action:
Check for the cause of the cooling water temperature rise.
Parameters: MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1, MP_CW_TM_LV, TIME_MPCWT_QS
MP_CW_TMX_OL
Maximum of cooling water temperatures over level
Cooling Water TeMperature maX Over Level
Content (cause):
An excessive rise in the maximum of the cooling water temperature 1 or 2 signal was detected. The drive outputs the MP_FAULT
signal and emergency stops.
Action:
Check the cause of cooling water temperature rising.
Parameters: MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1, MP_CW_TM_LV, TIME_MPCWT_QS
MP_IAR_TM1_OL, MP_IAR_TM2_OL
Inlet air temperature 1, 2 over level
Inlet AiR TeMperature 1, 2 Over Level
Content (cause):
An excessive rise in the inlet air temperature 1 or 2 signal was detected. The drive outputs the MP_FAULT signal and quick stops.
Action:
Check for the cause of the inlet air temperature rise.
Parameters: MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1, MP_IAR_TM_LV, TIME_MPIART_QS
MP_IAR_TMX_OL
Maximum of inlet air temperatures over level
Inlet AiR TeMperature maX Over Level
Content (cause):
An excessive rise in the maximum of the inlet air temperature 1or 2 signal was detected. The drive outputs the MP_FAULT signal
and quick stops.
Action:
Parameters: MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1, MP_IAR_TM_LV, TIME_MPIART_QS
Rev.S
59
4GBF0632
MP_OAR_TM1_OL, MP_OAR_TM2_OL
Outlet air temperature 1, 2 over level
Outlet AiR TeMperature 1, 2 Over Level
Content (cause):
An excessive rise in the outlet air temperature 1 or 2 signal was detected. The drive outputs the MP_FAULT signal and quick
stops.
Action:
Check for the cause of the outlet air temperature rise.
Parameters: MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1, MP_OAR_TM_LV, TIME_MPOART_QS
MP_OAR_TMX_OL
Maximum of outlet air temperatures over level
Outlet AiR TeMperature maX Over Level
Content (cause):
An excessive rise in the maximum of the outlet air temperature 1 or 2 signal was detected. The drive outputs the MP_FAULT
signal and quick stops.
Action:
Parameters: MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1, MP_OAR_TM_LV, TIME_MPOART_QS
MP_SW_TM1_OL - MP_SW_TM3_OL
Stator winding temperature 1 - 3 over level
Stator Winding TeMperature 1 - 3 Over Level
Content (cause):
An excessive rise in the stator winding temperature 1 - 3 signal was detected. The drive outputs the MP_FAULT signal and quick
stops.
Action:
Check for the cause of the stator winding temperature rise.
Parameters: MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1, MP_SW_TM_LV, TIME_MPSWT_QS
MP_SW_TMX_OL
Maximum of stator winding temperatures over level
Stator Winding TeMperature maX Over Level
Content (cause):
An excessive rise in the maximum of the stator winding temperature 1 - 3 signal was detected. The drive outputs the MP_FAULT
Action:
Parameters: MSK_MP_HFD2, MSK_MP_QSTOP2, MP_FLG_LR2, MP_SW_TM_LV, TIME_MPSWT_QS
MP_BV_1X_OL, MP_BV_1Y_OL, MP_BV_1Z_OL

Bearing vibration 1-X, 1-Y, 1-Z over level
Bearing Vibration 1-X, 1-Y, 1-Z Over Level
Content (cause):
An excessive rise in the bearing vibrations 1-X, 1-Y or 1-Z signal was detected. The drive outputs the MP_FAULT signal and quick
stops.
Action:
Check for the cause of the bearing vibration increase.
Parameters: MSK_MP_HFD2, MSK_MP_QSTOP2, MP_FLG_LR2, MP_BV_X_LV, MP_BV_Y_LV, MP_BV_Z_LV,
TIME_MPBV_QS
Rev.S
60
4GBF0632
MP_BV_X1_OL
Maximum of bearing vibration 1 over level
Bearing Vibration maX 1 Over Level
Content (cause):
An excessive rise in the maximum of the bearing vibrations 1-X, 1-Y or 1-Z signal was detected. The drive outputs the MP_FAULT
Action:
Check for the cause of the bearing vibration rise.
TIME_MPBV_QS

Content (cause):
stops.
Action:
TIME_MPBV_QS
MP_BV_X2_OL
Content (cause):
Action:
TIME_MPBV_QS

Content (cause):
stops.
Action:
TIME_MPBV_QS
MP_BV_X3_OL
Content (cause):
Action:
TIME_MPBV_QS
Rev.S
61
4GBF0632
MP_CWF1_LL, MP_CWF2_LL
Cooling water flow 1, 2 low level
Cooling Water Flow 1, 2 Low Level
Content (cause):
The decrease of the cooling water flow 1 or 2 signal was detected. The drive outputs the MP_FAULT signal and quick stops.
Action:
Check for the cause of the cooling water flow decrease.
Parameters: MSK_MP_HFD2, MSK_MP_QSTOP2, MP_FLG_LR2, MP_CWF_LV, TIME_MPCW_QS
MP_CWFS_LL
Sum of cooling water flows low level
Cooling Water Flow Sum Low Level
Content (cause):
The decrease of the sum, of the cooling water flow 1 or 2 signal was detected. The drive outputs the MP_FAULT signal and quick
stops.
Action:
Parameters: MSK_MP_HFD2, MSK_MP_QSTOP2, MP_FLG_LR2, MP_CWF_LV, TIME_MPCW_QS
MP_BE_TM_H1 - MP_BE_TM_H3
Bearing temperature high 1 - 3
BEaring TeMperature High 1 - 3
Content (cause):
The bearing temperature high 1 - 3 signal, from the digital inputs, was detected. The drive outputs the MP_FAULT signal and
quick stops.
Action:
Parameters: MSK_MP_HFD3, MSK_MP_QSTOP3, MP_FLG_LR3, TIME_MPBET_QS
MP_CF1_MR, MP_CF2_MR
Cooling fan 1, 2 motor running
Cooling Fan 1, 2 Motor Running
Content (cause):
The turning off of the cooling fan 1 or 2 motor run signal, using the digital inputs, was detected. The drive outputs the MP_FAULT
Action:
Check for the cause of the cooling fan motor stop.
Parameters: MSK_MP_HFD3, MSK_MP_QSTOP3, MP_FLG_LR3, TIME_MPCFMR_QS
MP_CWF_L1
Cooling water flow low 1
Cooling Water Flow Low 1
Content (cause):
The cooling water flow low 1 signal from the digital input was detected.
Action:
Parameters: MSK_MP_HFD3, MSK_MP_SIL3
MP_OLU_HFD
Oil lubrication unit heavy fault
Oil Lubrication Unit Heavy Fault Detection
Content (cause):
The oil lubrication unit heavy fault signal from the digital input was detected. The drive outputs the MP_FAULT signal and quick
stops.
Action:
Check the oil lubrication unit.
Parameters: MSK_MP_HFD3, MSK_MP_QSTOP3, MP_FLG_LR3, TIME_MPOLHF_QS
Rev.S
62
4GBF0632
MP_OLU_HPL_N
Oil lubrication unit high pressure line normal
Oil Lubrication Unit High Pressure Line Normal
Content (cause):
The oil lubrication unit high pressure line normal signal from the digital input was detected. The drive outputs the MP_FAULT
Action:
Parameters: MSK_MP_HFD3, MSK_MP_QSTOP3, MP_FLG_LR3, TIME_MPOLHP_QS
MP_OLU_LPL_N
Oil lubrication unit low pressure line normal
Oil Lubrication Unit Low Pressure Line Normal
Content (cause):
The oil lubrication unit low pressure line normal signal from the digital input was detected. The drive outputs the MP_FAULT signal
and quick stops.
Action:
Parameters: MSK_MP_HFD3, MSK_MP_QSTOP3, MP_FLG_LR3, TIME_MPOLLP_QS
MP_OLU_HPL_NA
Oil lubrication unit high pressure line normal alarm
Oil Lubrication Unit High Pressure Line Normal Alarm
Content (cause):
The oil lubrication unit high pressure line normal alarm signal from the digital input was detected. The drive outputs the
MP_OLU_HPL_NA signal.
Action:
Parameters: MSK_MP_RIL1, MP_FLG_LR3, TIME_MPOLHP_QS
MP_OLU_LPL_NA
Oil lubrication unit low pressure line normal alarm
Oil Lubrication Unit Low Pressure Line Normal Alarm
Content (cause):
The oil lubrication unit low pressure line normal alarm signal from the digital input is detected. The drive outputs the
MP_OLU_LPL_NA signal.
Action:
Parameters: MSK_MP_RIL1, MP_FLG_LR3, TIME_MPOLLP_QS
MP_SW_TM_H
Stator winding temperature high
Stator Winding TeMperature High
Content (cause):
The stator winding temperature high signal from the digital input was detected.
Action:
MP_WLK1
Water leakage 1
Water LeaKage 1
Content (cause):
The water leakage 1 signal from the digital input was detected.
Action:
Check for the cause of the water leak.
Rev.S
63
4GBF0632
MP_BE_TM1_OLA - MP_BE_TM3_OLA
Bearing temperature 1 - 3 over level alarm
BEaring TeMperature 1 - 3 Over Level Alarm
Content (cause):
An excessive rise in the bearing temperature 1 - 3 signal was detected. The drive outputs the alarm signal.
Action:
Check for the cause of the bearing the temperature rise.
Parameters: MSK_MP_LFD1, MP_BE_TM_LVA
MP_BE_TMX_OLA
Maximum of bearing temperatures over level alarm
BEaring TeMperature maX Over Level Alarm
Content (cause):
An excessive rise in the maximum of the bearing temperature 1 - 3 signal was detected. The drive outputs the alarm signal.
Action:
Check for the cause of the bearing the temperature rise.
Parameters: MSK_MP_LFD1, MP_BE_TM_LVA
MP_CW_TM1_OLA, MP_CW_TM2_OLA
Cooling water temperature 1, 2 over level alarm
Cooling Water TeMperature 1, 2 Over Level Alarm
Content (cause):
An excessive rise in the cooling water temperature 1 or 2 signal was detected. The drive outputs the alarm signal.
Action:
Parameters: MSK_MP_LFD1, MP_CW_TM_LVA
MP_CW_TMX_OLA
Maximum of cooling water temperatures over level alarm
Cooling Water TeMperature maX Over Level Alarm
Content (cause):
An excessive rise in the maximum of the cooling water temperature 1 or 2 signal was detected. The drive outputs the alarm signal.
Action:
Check the cause of cooling water temperature rising.
Parameters: MSK_MP_LFD1, MP_CW_TM_LVA
MP_IAR_TM1_OLA, MP_IAR_TM2_OLA
Inlet air temperature 1, 2 over level alarm
Inlet AiR TeMperature 1, 2 Over Level Alarm
Content (cause):
An excessive rise in the of inlet air temperature 1 or 2 signal was detected. The drive outputs the alarm signal.
Action:
Parameters: MSK_MP_LFD1, MP_IAR_TM_LVA
MP_IAR_TMX_OLA
Maximum of inlet air temperatures over level alarm
Inlet AiR TeMperature 1, 2 Over Level Alarm
Content (cause):
An excessive rise in the of maximum of inlet air temperature 1 or 2 signal was detected. The drive outputs the alarm signal.
Action:
Parameters: MSK_MP_LFD1, MP_IAR_TM_LVA
Rev.S
64
4GBF0632
MP_OAR_TM1_OLA, MP_OAR_TM2_OLA
Outlet air temperature 1, 2 over level alarm
Outlet AiR TeMperature 1, 2 Over Level Alarm
Content (cause):
An excessive rise in the of outlet air temperature 1 or 2 signal was detected. The drive outputs the alarm signal.
Action:
Parameters: MSK_MP_LFD1, MP_OAR_TM_LVA
MP_OAR_TMX_OLA
Maximum of outlet air temperatures over level alarm
Outlet AiR TeMperature 1, 2 Over Level Alarm
Content (cause):
An excessive rise in the maximum of outlet air temperature 1 or 2 signal was detected. The drive outputs the alarm signal.
Action:
Parameters: MSK_MP_LFD1, MP_OAR_TM_LVA
MP_SW_TM1_OLA - MP_SW_TM3_OLA
Stator winding temperature 1 - 3 over level alarm
Stator Winding TeMperature 1 - 3 Over Level Alarm
Content (cause):
An excessive rise in the stator winding temperature 1 - 3 signal was detected. The drive outputs the alarm signal.
Action:
Parameters: MSK_MP_LFD1, MP_SW_TM_LVA
MP_SW_TMX_OLA
Maximum of stator winding temperatures over level alarm
Stator Winding TeMperature maX Over Level Alarm
Content (cause):
An excessive rise in the maximum of stator winding temperature 1 - 3 signal was detected. The drive outputs the alarm signal.
Action:
Parameters: MSK_MP_LFD2, MP_SW_TM_LVA
MP_BV_1X_OLA, MP_BV_1Y_OLA, MP_BV_1Z_OLA

Bearing vibration 1-X, 1-Y, 1-Z over level alarm
Bearing Vibration 1-X, 1-Y, 1-Z Over Level Alarm
Content (cause):
An excessive rise in the bearing vibrations 1-X, 1-Y or 1-Z signal was detected. The drive outputs the alarm signal.
Action:
Parameters: MSK_MP_LFD2, MP_BV_X_LVA, MP_BV_Y_LVA, MP_BV_Z_LVA
MP_BV_X1_OLA
Maximum of bearing vibration 1 over level alarm
Bearing Vibration maX 1 Over Level Alarm
Content (cause):
An excessive rise in the maximum of bearing vibrations 1-X, 1-Y or 1-Z signal was detected. The drive outputs the alarm signal.
Action:
Rev.S
65
4GBF0632

Content (cause):
Action:
MP_BV_X2_OLA
Content (cause):
Action:

Content (cause):
Action:
MP_BV_X3_OLA
Content (cause):
Action:
MP_CWF1_LLA, MP_CWF2_LLA
Cooling water flow 1, 2 low level alarm
Cooling Water Flow 1, 2 Low Level Alarm
Content (cause):
A decrease of cooling water flow 1 or 2 signal was detected. The drive outputs the alarm signal.
Action:
Parameters: MSK_MP_LFD2, MP_CWF_LVA
Rev.S
66
4GBF0632
MP_CWFS_LLA
Sum of cooling water flows low level alarm
Cooling Water Flow Sum Low Level Alarm
Content (cause):
A decrease of sum of cooling water flows 1 or 2 signal was detected. The drive outputs the alarm signal.
Action:
Parameters: MSK_MP_LFD2, MP_CWF_LVA
MP_CF1_MRA, MP_CF2_MRA
Cooling fan 1, 2 motor running alarm
Cooling Fan 1, 2 Motor Running Alarm
Content (cause):
The turning off of the cooling fan 1 or 2 motor run signal, from the digital inputs, was detected. The drive outputs the alarm signal.
Action:
Check for the cause of the cooling fan motor stop.
Parameters: MSK_MP_LFD3
MP_CF1_MCC_F, MP_CF2_MCC_F
Cooling fan 1, 2 MCC fault
Cooling Fan 1, 2 MCC Fault
Content (cause):
The cooling fan 1 or 2 MCC fault signal from the digital inputs was detected. The drive outputs the alarm signal.
Action:
Check for the cause of the Cooling fan MCC fault.
MP_CWF_L1A
Cooling wator flow low 1 alarm
Cooling Water Flow Low 1 Alarm
Content (cause):
The cooling water flow low alarm 1 signal from the digital input was detected. The drive outputs the alarm signal.
Action:
MP_CW_TM_H1
Cooling water temperature high 1
Cooling Water TeMperature High 1
Content (cause):
The cooling water temperature high 1 signal from the digital input was detected. The drive outputs the alarm signal.
Action:
MP_OLU_LFD
Oil lubrication unit light fault
Oil Lubrication Unit Light Fault Detection
Content (cause):
The oil lubrication unit light fault signal from the digital input was detected. The drive outputs the alarm signal.
Action:
Rev.S
67
4GBF0632
MP_OLU_HFDA
Oil lubrication unit heavy fault alarm
Oil Lubrication Unit Heavy Fault Detection Alarm
Content (cause):
The oil lubrication unit heavy fault signal from the digital input was detected. The drive outputs the alarm signal.
Action:
MP_SPH_ON_A
Space heater on alarm
SPace Heater ON Alarm
Content (cause):
The space heater on signal from the digital input, during the FLDR on, was detected. The drive outputs the alarm signal.
Action:
Check the space heater.
Parameters: MSK_MP_LFD3, TIME_MPSPH_A
MP_SPH_MCC_F
Space heater MCC fault
SPace Heater MCC Fault
Content (cause):
The space heater MCC fault signal from the digital input was detected. The drive outputs the alarm signal.
Action:
Check the space heater.
MP_WLK1A
Water leakage 1 alarm
Water Leakage 1 Alarm
Content (cause):
The Water leakage 1 signal from the digital input was detected. The drive outputs the alarm signal.
Action:
Check for the cause of the water leakage.
MP_BR01_CL - MP_BR64_CL
Motor breaker 01 - 64 closed
motor BReaker 01 - 64 CLosed
Content (cause):
The turning off of the Motor breaker 01 - 64 closed signal from the digital inputs was detected. The drive outputs the alarm signal.
Action:
Check the opening and closing of the motor beakers.
Parameters: MSK_MP_LFD5 - MSK_MP_LFD8
Rev.S
68
4GBF0632
MP_S_IL
MP start interlock
Motor Protection Start InterLock
Content (cause):
A secondary display caused by a Motor Protection (MP) start interlock being off.
If this signal is not established, the UV signal cannot be turned on.
Action:
Refer to the display for the primary cause for the MP start interlock (MP_SIL) being off.
Parameters: MSK_UV1
MP_R_IL
MP ready interlock
Motor Protection Ready InterLock
Content (cause):
A secondary display caused by a Motor Protection (MP) ready interlock being off.
If this signal is not established, the READY signal cannot be turned on.
Action:
Refer to the display for the primary cause for the MP ready interlock (MP_RIL) being off.
Rev.S
69
4GBF0632
2.7 Transformer protection
OH_TR_A
Input transformer high temperature alarm
OverHeat TRansformer Alarm
Content (cause):
The overheat alarm of the input transformer panel tripped.
Action:
Check the operation of the cooling fan of the input transformer panel.
Check for clogging of the filter.
Check the temperature of the electric room.
Parameters: MSK_STPRQ2, CP_OH_TR_A, FLG_MTMP_SEL
OH_TR
Overheat transformer
OverHeat TRansformer
Content (cause):
An overheat condition of the transformer has occurred.
Action:
If there is no sign of an overload, check the operation of the ventilation fan, check the filter for any clogging and check the
temperature of the electric room.
Parameters: MSK_BLR2, MSK_UVA4, CP_OH_TR, FLG_MTMP_SEL
MP_OL_TM_TR
Oil temperature trip
OiL TeMperature TRip
Content (cause):
The oil temperature trip signal from the digital input was detected. The drive outputs the MP_FAULT signal and stops.
Action:
Check for the cause of the oil temperature rise.
Parameters: MSK_MP_HFD4
MP_WD_TM_TR
Winding temperature trip
WinDing TeMperature TRip
Content (cause):
The winding temperature trip signal from the digital input was detected. The drive outputs the MP_FAULT signal and stops.
Action:
Check for the cause of the winding temperature rise.
MP_OL_LVL_TR
Oil level trip
OiL LeVeL TRip
Content (cause):
The oil level trip signal from the digital input was detected. The drive outputs the MP_FAULT signal and stops.
Action:
Check the oil level.
Rev.S
70
4GBF0632
MP_PRD_TR
Pressure relief device trip
Pressure Relief Device TRip
Content (cause):
The pressure relief device trip signal from the digital input was detected. The drive outputs the MP_FAULT signal and stops.
Action:
Check the pressure relief device.
MP_BH_RL_TR
Buchholz relay trip
BuchHolz ReLay TRip
Content (cause):
The Buchholz relay trip signal from the digital input was detected. The drive outputs the MP_FAULT signal and stops.
Action:
Check the buchholz relay.
MP_GP_RL_TR
Sudden gas pressure relay trip
sudden Gas Pressure ReLay TRip
Content (cause):
A sudden gas pressure relay trip signal from the digital input was detected. The drive outputs the MP_FAULT signal and stops.
Action:
Check the sudden gas pressure trip relay.
MP_OL_TM_OL
Oil temperature over level
OiL TeMperature Over Level
Content (cause):
An excessive rise in the oil temperature was detected. The drive outputs the MP_FAULT signal and stops.
Action:
Parameters: MSK_MP_HFD4, MP_OL_TM_LV
MP_WD_TM_OL
Winding temperature over level
WinDing TeMperature Over Level
Content (cause):
An excessive rise in the winding temperature was detected. The drive outputs the MP_FAULT signal and stops.
Action:
Parameters: MSK_MP_HFD4, MP_WD_TM_LV
MP_OL_TM_A
Oil temperature alarm
OiL TeMperature Alarm
Content (cause):
The Oil temperature alarm signal from the digital input was detected. The drive outputs the ALARM signal.
Action:
Rev.S
71
4GBF0632
MP_WD_TM_A
Winding temperature alarm
WinDing TeMperature Alarm
Content (cause):
A winding temperature alarm signal from the digital input was detected. The drive outputs the ALARM signal.
Action:
MP_OL_LVL_A
Oil level alarm
OiL LeVeL Alarm
Content (cause):
The Oil level alarm signal from the digital input was detected. The drive outputs the ALARM signal.
Action:
Check the oil level.
MP_PRD_A
Pressure relief device alarm
Pressure Relief Device Alarm
Content (cause):
A pressure relief device alarm signal from the digital input was detected. The drive outputs the ALARM signal.
Action:
Check the pressure relief device.
MP_BH_RL_A
Buchholz relay alarm
BuchHolz ReLay Alarm
Content (cause):
The Buchholz relay alarm signal from the digital input was detected. The drive outputs the ALARM signal.
Action:
Check the buchholz relay.
MP_OL_TM_OLA
Oil temperature over level alarm
OiL TeMperature Over Level Alarm
Content (cause):
An excessive rise in the oil temperature was detected. The drive outputs the ALARM signal.
Action:
Parameters: MSK_MP_LFD4, MP_OL_TM_LVA
MP_WD_TM_OLA
Winding temperature over level alarm
WinDing TeMperature Over Level Alarm
Content (cause):
An excessive rise in the winding temperature was detected. The drive outputs the ALARM signal.
Action:
Parameters: MSK_MP_LFD4, MP_WD_TM_LVA
Rev.S
72
4GBF0632
MP_FAULT
MP critical fault
Motor Protection critical FAULT
Content (cause):
A Motor Protection heavy fault (MP_FAULT) signal was output. The drive turns off the UV signal and stops.
Action:
Perform a fault reset after the main factor of the fault is removed.
When the MP_HFD is detected, the MP_FAULT signal is output. The MP_FAULT signal is kept until the fault reset is performed.
When detecting a heavy fault of the transformer protection, set using the mask setting below.
MSK_UV2.MP_FAULT_ = 1 (used)
Parameters: MSK_UV2
Rev.S
73
4GBF0632
2.8 Others
SPA1, SPA2, SPA3, SPA4

Spare 1 - 4
SPAre 1 - 4
Content (cause):
A spare signal (spare 1 - 4) has been detected.
SPA1 is input via a general purpose DI (DI_EX1.Bit12) or the transmission (SERSEQDATA1.Bit12). SPA2, SPA3 and SPA4 are
input via a general purpose DI (DI_EX2.Bit10, DI_EX2.Bit11, DI_EX2.Bit12) respectively.
Action:
Check the spare signal and mask data.
Parameters: MSK_BLR5, MSK_UVA4, MSK_UV2 (SPA1,2), MSK_READY2 (SPA1,2), MSK_HFD2 (SPA1,2), MSK_SIL1
(SPA1), MSK_STPRQ1 (SPA1), MSK_LFD1 (SPA1), MSK_LFD2(SPA2,3,4)
SPA1_T, SPA2_T, SPA3_T, SPA4_T

Spare 1 timer - spare 4 timer
SPAre 1 Timer - SPAre 4 Timer
Content (cause):
A spare signal (spare 1 - 4) error continued for the length of time set with the timer TIME_SPAn(were n = 1-4).
Action:
Check the spare signal and mask data.
Parameters: MSK_BLR5, MSK_UVA4, MSK_LFD2 (SPA2,3,4), TIME_SPA1, TIME_SPA2, TIME_SPA3, TIME_SPA4
QSTOP_FAULT
Quick stop operated
Quick STOP FAULT
Content (cause):
A quick stop operation has been done while the motor was running. After the quick stop, the UV signal is turned off.
Action:
Release QSTOP command.
When the UV starting interlock is used, the interlock is not released before the EXT command turns off.
In case drive restarts automatically, after the QSTOP command release has occurred, set the QSTOP_FAULT to not be used.
N. U.
Not used
Not Used
Action:
Mask the signal.
Systems: Not use
Parameters: MSK_BLF1-3, MSK_BLR1-6, MSK_UVA1-4, MSK_UV1, 2, MSK_SIL1, 2, MSK_READY1, 2, MSK_HFD1, 2,
MSK_STPRQ1, 2, MSK_LFD2,
DS_T
Door open timer
Door Switch open Timer
Content (cause):
A door switch open condition continued for the length of time set with the timer TIME_DS.
Action:
Close the front door. Check to make sure the door micro switch, on the upper side of the door, is not damaged.
Parameters: MSK_BLR5, TIME_DS
Rev.S
74
4GBF0632
UVA
Electrical condition ready condition
Under Voltage Auxiliary
Content (cause):
A secondary display of the sequence processing.
Action:
Refer to the primary cause of the UVA off signal.
UV_READY
External electrical ready condition
Under Voltage READY
Content (cause):
UV_READY is the secondary display of sequence processing. The drive turns off the READY signal.
Action:
Refer to the primary cause of the UV off signal.
STPRQ
Intermediate fault (stop request)
SToP ReQuest
Content (cause):
STPRQ is the secondary display of the line stop request sequence processing. The drive turns off the LFD signal.
Action:
See the primary cause of the STPRQ signal off status.
Parameters: MSK_LFD1
BLR
Electrical critical fault
BLocking Relay
Content (cause):
BLR is a secondary display caused by the BLR condition being off.
Action:
Refer to the display for the primary cause of the BLR being off.
FAULT
Critical fault
critical FAULT
Content (cause):
Heavy fault (FAULT) signal is output. Turns off UV signal and stops.
Action:
Perform the fault reset after the main cause of the fault is removed.
When the automatic recovery fault, such as the UVA condition has occurred in the running equipment, the FAULT signal is output.
The FAULT signal is kept until the fault reset is performed. Thus the equipment can run with the FAULT output after the fault has
recovered automatically.
Perform a mask unless the application prohibits such an operation.
Parameters: MSK_UV2
Rev.S
75
4GBF0632
3 Parameter Explanation
3.1 Ratings and Information Settings
Sets the system or unit rate and others.
3.1.1 System settings
SYSTEM
Drive system configuration
Data type: 16-bit integer
Standard value: 0100 H (6600V class standard drive, V/f control)
Limit:
Note: Initialize
Sets the drive system configuration. Each mode of sensor-less speed control, V/f control, twin configuration and SM control, may
be selected by setting 1 to its corresponding bit shown below:
BIT Abbreviation Content

F N.U. Not used
E N.U. Not used
D SL Set 1 to enable speed sensorless control.
C N.U. Not used
B N.U. Not used
A L_JOINT Set 1 when balancing reactor twin configuration.
9 N.U. Not used
8 VF Set 1 when V/f function is used.
7 SM Set 1 when Synchronous Motor is used.
6 N.U. Not used
5 N.U. Not used
4 N.U. Not used
3 N.U. Not used
2 N.U. Not used
1 PM Set 1 when drive PMSM.
Set SYSTEM.Bit7 SM 1 also.
0 N.U. Not used
Dip switch (SW1) of main control board (CTR) shoud be set OFF setting (0.0.0.0), regardless of SYSTEM setting. If this dip swith
setting is not correct, it detects SYS_ERR.
SW1 DIP SW (SW1) settings

1 2 3 4 SYSTEM 1 2 3 4
ON(1) This equipment (TMdrive-MVe2) 0 0 0 0
OFF(0) 0: OFF, 1: ON
DIP SW (SW1) on main control board
Rev.S
76
4GBF0632
CS_F_PWM
PWM carrier frequency
Standard value: 4800 Hz
Limit: 4800 Hz
Note: Initialize
Sets the PWM carrier frequency. It cannot be changed other values than standard value.
DEAD_T_CMP
Dead time compensation value
Standard value: 197
Limit: 0 ~ 16383
Sets the dead time compensation value.16384 count corresponds to 100% (PWM carrier width).
The deadtime compensation value which compensates the output voltage decreasedue to the deadline of IGBTs
switching. Sets the standard value in the cell inverters one stage. The setting value as the each cell inverter stage and
frame size are automatically calculated by the software.
Rev.S
77
4GBF0632
3.1.2 Drive ratings
CS_EQUIP_VOLT
Drive rating voltage
Data type: Floating-point number
Standard value: 6600 V
Limit: 0 - 15000 V
Set the rated voltage of the drive.
[Related parameters] CS_DC_VOLT
CS_EQUIP_CURR
Drive rating current
Standard value: Automatic calculation
Limit: 0.1 - 100000 A
Note: Initialize
Set the rated AC current [Arms] of the drive.
[Related parameters] CS_MOTOR_CURR
CS_EQUIP_KVA
Drive rating apparent power
Standard value: 800 kVA (EQUIP_KVA_T is calculated automatically)
Limit: 0 - 10000000 (EQUIP_KVA_T is calculated automatically)
This setting is used for display on homepage of drive maintenance tool (TMdN).
Drive calculates its kVA rating as CS_EQUIP_KVA automatically from CS_EQUIP_VOLT and CS_EQUIP_CURR.
[Related parameters] CS_EQUIP_VOLT, CS_EQUIP_CURR
CS_DC_VOLT
Rated DC voltage
Limit: 0 - 10000 V
Set the rated DC voltage. This rated is common setting regardless of the equipment capability and cell inverters frame
size. Do not adjust this setting. The term “DC voltage” here is voltage of both PC and NC.
CS_HCT_CURR
HCT rated current
Standard value: 250 A
Limit: 0 - 30000 A
Note: Initialize
Sets the HCT rated current (current when HCT outputs 10 V). CS_HCT_CURR = [(10V)/( R Fbk resistor)] x (1/HCT Ratio)]
Example: 124A drive (CS_EQUIP_CURR = 124A), 50 resistor, 100mA/200A HCT

[(10V)/(50 )] x (200A/100mA) = [(10)/(50)] x (200/0.1) = 400A
CS_AC_VOLT
Input rated voltage
Limit: 0 - 35000 V
Sets the rated input voltage. If the rated input voltage and rated input transformer primary voltage are different, set
OP_XFMR_VOLT to the rated input transformer primary voltage.
[Related parameters] OP_XFMR_VOLT
Rev.S
78
4GBF0632
CS_AC2_VOLT
Input transformer secondarily rated voltage
Standard value: 894 V (80 - 400 Frame)
983 V (600 Frame)
Limit: 0 – 1500 V
Set the input transformer secondarily rated voltage.
OP_XFMR_VOLT
Option input transformer primary rated voltage
Standard value: 0.0 V
Limit: 0 – 35000 V
Set the input transformer primary rated voltage in the case of different input voltage (CS_VC_VOLT).
CS_PT_RATIO
PT voltage ratio setting
Standard value: 60
Limit: 0 - 1000
Sets the PT voltage ratio, which is used for input voltage detection.
Pri. (V) Sec. (V) CS_PT_RATIO Standard model

3300 110 30 3K****
4160 120 35 4K****
6600 110 60 6K****
(North American model:120) (North American model:55)
11000 110 100 11K****
CS_CNV_CURR
Converter reted current
Standard value: 99.4 A
Limit: 0 - 100000 A
Note: Initialize
Set the converter rated current. Set the converter of each cell inverters based on transformer capacity.
CS_HCT_CNV
HCT rated current for active front end
Limit: 0 - 30000 A
Note: Initialize
Sets the HCT rated current for active front end (current when HCT outputs 10 V).
CS_FRAME_SIZE
Equipment frame size
Standard value: 100 frame
Limit: 80, 100, 150, 200, 250, 300, 400, 600, 800 frame
Note: Initialize
Set the equipment frame size in the unit of frame.
Rev.S
79
4GBF0632
3.1.3 Motor ratings
CS_MOTOR_VOLT
Motor rated voltage
Limit: 0 - 30000 V
Set the rated voltage at the motor top speed.
CS_MOTOR_CURR
Motor rated current
Limit: 0.1 - 100000 A
Sets the motor rated current.
If field weakening is used, sets the motor current at the base speed.
If the motor current is bigger than equipment current (CS_EQUIP_CURR), sets the same current as CS_EQUIP_CURR.
[Related parameters] CS_EQUIP_CURR
CS_MOTOR_FREQ
Motor rated frequency
Standard value: 50 Hz
Limit: 0.0 - 599.0 Hz
Sets the motor rated frequency, which is equivalent to the motor top frequency.
Use this parameter when over-speeding the motor above 60Hz. Do not use the LMT_SP_F parameter to perform
over-speed because the output voltage will also increase and may damage the motor.
CS_MOTOR_POLE
Number of motor poles
Standard value: 4 poles
Limit: 0 - 100 poles
Note: Initialize, Over 18 poles available in firmware 10A or later when using resolver
Set the number of motor poles.
CS_MOTOR_RPM
Motor rated speed
-1
Standard value: 1500.0 min
-1
Limit: -25000.0 - 25000.0 min
Note: Initialize
Sets the motor rated speed (revolutions per minute).
CS_MTR_F_BASE
Motor rated base frequency
Standard value: 0.0 Hz
Limit: 0 - 1000 Hz
Set the motor frequency at the base speed. This setting is only used for auto-tuning, so this does not affect motor control.
When auto-tuning, if this setting is 0 Hz, CS_MOTOR_FREQ x CS_SP_BASE is used as base frequency.
Rev.S
80
4GBF0632
CS_MTR_V_BASE
Motor rated base voltage
Standard value: 0V
Limit: 0 - 30000 V
Set the motor voltage at the base speed. This setting is only used for auto-tuning, so this does not affect motor control.
When auto-tuning, if this setting is 0 V, CS_MOTOR_VOLT is used as base voltage.
CS_SP_BASE
Base speed
Standard value: 125.0 % (80.0 %)
Limit: 8.0 - 125.0% (1.0 = 100%)
Sets the base speed
When field weakening is not used, set 125.0%.
CS_XOVER_VOLT
Motor operation max voltage setting
Standard value: 0
Limit: 0 - 30000 V
Set the rated frequency at the motor base speed. When using maximum limit of motor voltage, it sets up. Set 0 when it is not used.
In the case of the characteristic that the speed-voltage characteristic of the motor operates on fixed voltage at the period more
than base speed, there is effect.
MA_MOTOR_KW
Motor rated output
Standard value: 500.0 kW
Limit: 0.0 - 1000000 kW
Sets the motor rated output.
CS_KS_FAI
Rated flux value
Standard value: 100.0%
Limit: 20.0 - 100.0% (1.0 = 100%)
Note: Initialize
Sets the rated flux value
FLG_WVU
Inverter phase order reverse flag
Standard value: 0
Limit: 0, 1
Note: Initialize
This is the phase rotation correction flag for use when the motor rotates CCW viewed from anti-load-side when the inverter output
phase order is U, V, and W (ABC).
Set FLG_WVU = 1 only when the inverter outputs U, V, and W are connected to the motor terminals in the phase order of W, V,
and U (CBA).
[Related parameters] CS_MOTOR_RPM
Rev.S
81
4GBF0632
3.1.4 Drive information
INF_DBREV
Database revision
Standard value: 0
Limit: 0-9
Set the revision number of database.
INF_JOBNO1, INF_JOBNO2
Job number, item number
Data type: String
Standard value:
Limit:
Toshiba’s job number and items number constituting the order number are set.
Please do not change this setting.
INF_M_TYPE
Type code
Data type: String
Standard value: Automatic setting
Limit:
Note: Automatic setting
The type code of database is automatically set.
INF_MEMO
Memo
Data type: String
Standard value:
Limit:
Set comments.
This setting is used by the tool.
INF_PANEL
Panel name
Data type: String
Standard value:
Limit:
Set the panel name.
If the panel name is intermingled full-size characters (2-byte characters) and half-size characters (1-byte characters), do
not make the number of half-size characters odd, as shown in (Example) below.
The panel name display of the support tool may become unusual. The support tool may need to be disabled to connect to
the drive.
(Example)
OOOaaaOOO (No), aOOOOaa (No), aOOOOa (OK) (O: 2-byte character, a: 1-byte character)
INF_SOFTVER
Software version
Data type: String
Limit:
Software version is automatically recorded.
Rev.S
82
4GBF0632
INF_TAG
Tag
Data type: String
Standard value:
Limit:
INF_TEMPLATE_NO
Setting value template number
Standard value:
Limit: 0 - 41
Set the template of setting value.
INF_TIME_DAY,
INF_TIME_HOUR,
INF_TIME_MIN,
INF_TIME_MONTH,
INF_TIME_SEC,
INF_TIME_YEAR
Parameter setting storage time
Limit:
The time when parameter setting value was stored in EEPROM is automatically recorded.
Please do not change these setting.
INF_TITLE
Parameter setting storage title
Data type: String
Standard value:
Limit:
The title used when the parameter setting was stored in EEPROM is recorded.
Rev.S
83
4GBF0632
3.2 Interface I/F

Configures I/F-related parameters such as a digital IO, analog IO, serial communication, speed detection, hardware interlock,
failure detection, etc.
3.2.1 Digital /Serial input
These are the general digital input and serial communication input.
Each general digital input can be assigned to bit signals defined by DI_EX1 - 7 and DI_EX9 - 11 sequences, respectively. See
Table below for the customer command input sequence.
The serial communication inputs are 16 bit Word variables such as SERSEQDATA1.
Internal digital inputs and general purpose digital inputs have parameters, which allow the sign of each bit to be inversed or
masked during the input process.
Serial Variable after sign

Sign inversion
Type Input Mask parameter communication inversion, mask or other
parameter
data and mask process
General DI_EX1 SGN_DI1 MSK_DI1 SERSEQDATA1 DI_DATA1
Purpose (MSK_DI_EMG) MSK_SERESQ1 (FLG_DI_DATA1_SEL=0)
DI_EX2 SGN_DI2 － N/A － N/A DI_DATA2
DI_EX3 SGN_DI_EX3 MSK_DI3 SERSEQDATA2 DI_DATA1
(MSK_DI3_EMG) MSK_SERESQ2 (FLG_DI_DATA1_SEL=1)
DI_EX4 SGN_DI_EX4 MSK_DI4 SERSEQDATA4 DI_DATA1
(MSK_DI4_EMG) MSK_SERESQ4 (FLG_DI_DATA1_SEL=2)
DI_EX5 SGN_DI_EX5 MSK_DI_EX5 SERSEQDATA5 DI_DATA5
MSK_SERESQ5
DI_EX6 SGN_DI_EX6 MSK_DI_EX6 SERSEQDATA6 DI_DATA6
MSK_SERESQ6
DI_EX7 SGN_DI_EX7 MSK_DI7 CMDWORD1 DI_DATA_CMD1
(MSK_DI7_EMG) MSK_CMD1 DI_DATA1
(FLG_DI_DATA1_SEL=3
DI_EX9 SGN_DI_EX9 － N/A － N/A MP_DI_DATA1
Internal DI_IN3 SGN_DINT3 － N/A － N/A DINT_DATA3
DI_INT_GIF SGN_DI_GIF － N/A － N/A DINT_DATA_GIF
Digital Input A
DI_EXn X
s O
Mask = 0; NU Both 1, then active
s
Sign R O A
: i
: : R N
Output
Mask N D
g Sign = 1; Invert
n
m 16 bit data Serial data
e O
n R
Mask N
t
Rev.S
84
4GBF0632
3.2.1.1. General purpose digital input assignment

A total of 7 (UVS1, UVS2, DI1 - DI4, DI11) photo-coupler input buffers (PC) are provided as external hardware signal inputs.
Selectable DI signals are assigned to DI_EX1 - 7, 9 - 11 bits shown on the following pages.
DIn_AS (n: 1 to 11) = Specifies the bit name that starts “BIEXn_”
Safety switch signals “UVS” 1 is not programmable and assigned to UVS1.

In this equipment, UVS1 signal is input from XIO board and UVS2 signal is input from GIF board. Sets always "N.U. (not used)"
for the UVS2 jumper (JP4) on XIO board, regardless of the use conditions of UVS2 on GIF board. In addition, PWB select jumpers
(JP2, 3) on the XIO board always should be set “XIO” side. In the case of using UVS2, sets “USE” for the UVS2 jumper (JP1) on
GIF board. Do not change the jumper settings from the status of shipment.
Table 3.2.1 Jumper and switch setting regarding UVS

XIO board (ARND-4045) setting
Abbreviation Purpose Setting
JP2 UVS1_SEL Set “XIO” invariably for this drive.
JP3 UVS2_SEL Set “XIO” invariably, regardless of the use or non-use of UVS2.
JP4 UVS2_USE Set “N.U.” invariably, regardless of the use or non-use of UVS2.
SW1 UVS1 PS_SEL Select “OUTSIDE” or “INSIDE” for UVS1 power source.
SW2 UVS2 PS_SEL Select “OUTSIDE” or “INSIDE” for DI11 power source (Not UVS2).
GIF board (ARND-4186) setting

JP1 UVS2_USE Select “USE” or “N.U.” depending on the status of use of UVS2.
Select “EN” or “DIS” depending on using optical interface board
JP2 UVS2_FBKB_EN
(OIF-B) in the case of using UVS2. (EN means using OIF-B.)
Table 3.2.2 DIEX_DATA Bit Assignment
BIT Bit Signal Assignment Input circuit

F PRE_CTT Fixed GIF
(Internal use) PC input
E BP_CTT
D AC_P
C ACSW
B DI10 DI10_AS Available when option unit
PC input
A DI9 DI9_AS
9 DI8 DI8_AS
8 DI7 DI7_AS
7 DI6 DI6_AS
6 DI5 DI5_AS
5 DI4 DI4_AS XIO
PC input, internal 24V
4 DI3 DI3_AS
3 DI2 DI2_AS XIO
PC input
2 DI1 DI1_AS
Internal 24V or external voltage
1 DI11 DI11_AS supply is selected by SW1, 2, or 3
0 UVS1 Fixed
Rev.S
85
4GBF0632
DI1_AS - DI11_AS
Digital input data assignment
Data type: Symbol (32-bit integer)
Standard value: DI1_AS: BIEX_EXT0
Other: B_DUST
Limit:
Set bit name directly to be input signal 11ch (DI1 -DI11). The bit name for the general purpose bit input starts “BIEXn_”.
For example,
(1) Assign DI channel 1 to EXT0 in DI_EX1 --- DI1_AS = BIEX1_EXT0
(2) Assign DI channel 5 to ASD in DI_EX6 --- DI5_AS = BIEX6_ASD
BIT DI_EX1 DI_EX2 DI_EX3 DI_EX4 DI_EX5

F IL_ N.U. QSTOP N.U. JOG3
E UVS N.U. UVS N.U. JOG2
D EXT0 N.U. EXT0 FLD JOG1
C SPA1 SPA4 CM_BUF1 B JOG0
B BRTST SPA3 CM_BUF2 SC_PPI EX_LMT_I1
A ST SPA2 ST 2S EX_LMT_TR
9 F BLA_ F 3S SP_IP
8 R M_FN_ R R_TEN SP_DN
7 3S OH_ACL_EX_ 3S ST SEL_DI
6 2S E_DRIVE 2S LB DIR0
5 B HOLD N.U. N.U. DIR1
4 FLD QSTOP FLD BC_ START0
3 BC_ F_LMT_ LATCH_PG_POS N.U. START1
2 SPA0 R_LMT_ SPA0 UVS STOP0
1 EXRST B_HLTY EXRST EXT0 STOP1
0 R_TEN BA R_TEN EXRST EXT1
BIT DI_EX6 DI_EX7 DI_EX9 DI_EX10 DI_EX10

F N.U. N.U. MP_BE_TM_H1_ MP_BR01_CL MP_OL_TMP_A_
E N.U. N.U. MP_BE_TM_H2_ MP_BR02_CL MP_OL_TM_TR_
D PR_ST N.U. MP_BE_TM_H3_ MP_BR03_CL MP_WD_TM_A_
C RATE_CHG F MP_CF1_MR MP_BR04_CL MP_WD_TM_TR_
B FL_FOC R MP_CF2_MR MP_BR05_CL MP_OL_LVL_A_
A FL_READY N.U. MP_CF1_MCC_F_ MP_BR06_CL MP_OL_LVL_TR_
9 FL_RNTD R_TEN MP_CF2_MCC_F_ MP_BR07_CL MP_PRD_A
8 FL_FAULT N.U. MP_CWF_L1_ MP_BR08_CL MP_PRD_TR_
7 CHG_2S EXRST MP_CW_TM_H1_ MP_BR09_CL MP_BH_RL_A_
6 SEL_MRH 3S MP_OLU_LFD_ MP_BR10_CL MP_BH_RL_TR_
5 ASD 2S MP_OLU_HFD_ MP_WLK1_ MP_GP_RL_TR_
4 IM_NUM_B1 B MP_OLU_HPL_N MP_CF_IL_ N.U.
3 IM_NUM_B0 EXT0 MP_OLU_LPL_N MP_SPH_IL_ N.U.
2 XFR_CHK QSTOP MP_SPH_ON MP_OL_P_IL_ N.U.
1 CPT IL MP_SPH_MCC_F_ N.U. N.U.
0 XFR UVS MP_SW_TM_H_ N.U. N.U.
Rev.S
86
4GBF0632
There are several input assignments only for hardware, which have no serial bit input assignment.
For example, motor selection is only from hardware input since motor group number (MOT_G_NO), is available for the serial
communication input.
Bit symbol
BIEXH_MOT_G0
BIEXH_MOT_G1
TIME_DI1_ON – TIME_DI11_ON, TIME_DI1_OFF – TIME_DI11_OFF

Digital input on & off timer
Standard value: 0.00 s
Limit: 0.00 - 3600.0 s
Sets the on & off delay time of the digital input.
TIME_DI_TRNS
Digital input transition timer multiple input selection function
Limit: 0.00 - 60.0 s
Sets the delay time of digital input transitions for multiple selections. Sets a time delay similar to a debouncing circuit. For
example, two bit status is changed from (0, 0) to (1, 1), it can have (0, 1) or (1, 0) in the transition. This timer eliminates the
multiple DI inputs transition time by having a delay to wait and allow the bit status to stabilize.
Input (0, 0) (1, 1)
Output (0, 0) (1, 1)
TIME_DI_TRNS
[Related parameters] Optional JOG speed selection, motor group selection, motor number selection
FLG_DI_DATA1_SEL
DI_DATA1 input data selection flag
Standard value: 0
Limit: 0-3
Changes the data as follows:
To enter data to DI_DATA1:

0 = A logical AND operation is applied between DI_EX1 and SERSEQDATA1, but a logical OR operation is applied to
BIT(1)EXRST.
BIT(1)EXRST.
BIT(0)EXRST.
3 = A logical AND operation is applied between DI_EX7 and CMDWORD1, but a logical OR operation is applied to
BIT(7)EXRST.
[Related parameters] MSK_DI1, MSK_SERSEQ1
Rev.S
87
4GBF0632
The DI_EX1, DI_EX3, DI_EX4, and DI_EX7 signals such as "EXT", overlap. This sets up FLG_DI_DATA1_SEL, the signal from
which the overlapped signals are input. The signals not overlapped are not based on the value of FLG_DI_DATA1_SEL. Please
see the DI_EX1 - DI_EX4, and DI_EX7 description on the following page for the overlapped signals.
In addition, the setting of FLG_DI_DATA1_SEL is also related to the transmission sequence inputs SERSEQDATA1,
SERSEQDATA2, SERSEQDATA4, and CMDWORD1.
Sequence outputs SSEQ_OUT1, SSEQ_OUT2, SSEQ_OUT4, STSWORD1, and STSWORD2 do not depend on the value of
FLG_DI_DATA1_SEL.
Table 3.2.3 Relation between FLG_DI_DATA1_SEL and input sequence

Overlapped signals from Overlapped signals from
FLG_DI_DATA1_SEL
(DI/O input sequence) (Transmission input sequence)
0 DI_EX1 SERSEQDATA1
3 DI_EX7 CMDWORD1
DI swquences are show below. DI_EX1 - DI_EX7 are related the drive control and protection is processed by 1ms and
10ms tasks. DI_EX9 - DI_EX11 are related to the motor and transformer protections and are processed by a 100ms task.
SERSEQDATA1, 2, 4~6, SER_DATA_MSK

1ms task, 10ms task CMDWORD1 SER_DATA2_MSK
SERSEQn_MSK (n ; 4~6)
DI_DATA1
CMD1_MSK
Mask bit (1: use)
Select DI data
MSK_SERSEQDATA1, 2, 4~6
FLG_DI_DATA_SEL
CMDW ORD1 A
DI_EXn_MSK DI_DATA5, 6
(n ; 1, 3~7)
DI
DI_EX1~7 DI_EXn_SGN
Mask bit (1: use)
(n ; 1, 3~7)
MSK_DI1,3,4,7 Drive
Filter Reverse bit
DI_IN1 MSK_DI_EX5,6 control
(1: reverse)
Bit assignment
SGN_DI1, 2
DI1_AS~DI10_AS
SGN_DI_EX3~7
DI_DATA2
100ms task
DI_EX9~11 MP_DI_DATA1~3
Reverse bit
Bit assignment MP_LFD
(1: reverse)
DI1_AS~DI10_AS MP_HFD
SGN_DI_EX9~11
Fig 3.2.1 DI sequence
Rev.S
88
4GBF0632
FLG_UVS2_USE
Flag used with UVS2
Standard value: 0
Limit: 0, 1
This equipment can be input two UVS signals (external safety switch). The UVS1 signal is input by XIO board and the
UVS2 signal is input by GIF board. The UVS2 signal is inevitably used with UVS1, not only UVS2. When both UVS1 and
The UVS2 input of GIF board (CN41) is dry contact. It needs the input interfaces by DC24V from external power.UVS2 are
on status, it can be operation.
Set to ”1” when specifying the UVS input to No.2 system. Take the following notice for using UVS2.
(1) Protection sequence mask setting

Set MSK_UV2 for using UVS2_ANS. MSK_UV2.UVS2_ANS_ = 1 (Use)
An answer of UVS1 can be returned on the status of control power input because the the UVS1 is signal between XIO board
and CTR board. On the other hand, for UVS2 the answer can be returned on the status that all of the cell inverter is enable on
the main power input, because it reteurns answer back by optical roop between the cell inverters.
(2) Input interface

The UVS2 input of GIF board (CN41) is dry contact. It needs to interface the input by DC24V from external power.
(3) Jumper and switch setting of PWBs

Set the following jumper and switch setting correctly for each specification. In this equipment, set always "N.U. (not used)" for
the UVS2 jumper (JP4) on XIO board, regardless of the use conditions of UVS2 on GIF board.
XIO board (ARND-4045) setting

JP3 UVS2_SEL Set “XIO” invariably, regardless of the use or non-use of UVS2.
JP4 UVS2_USE Set “N.U.” invariably, regardless of the use or non-use of UVS2.
SW2 UVS2 PS_SEL Select “OUTSIDE” or “INSIDE” for DI11 power source (Not UVS2).
GIF board (ARND-4186) setting

JP1 UVS2_USE Select “USE” or “N.U.” depending on the status of use of UVS2.
Select “EN” in case of using of UVS2 on twin bank. Select “DIS” on
JP2 UVS2_FBKB_EN single bank, regardless of the use or non-use of optical interface
board B (OIF-B).
[Rated parameters] MSK_UV2
Rev.S
89
4GBF0632
3.2.1.2. DI_EX1, SERSEQDATA1 (DI_DATA1)

SGN_DI1
Digital input data 1 sign inversion
Standard value: 8000H
Limit:
MSK_DI1
DI relay input mask 1
Standard value: FFFF H
Limit:
MSK_DI_EMG
Emergency DI relay input mask
Standard value: 0000 H (FFFF H)
Limit:
MSK_SERSEQ1
Transmission serial sequence input mask 1
Standard value: 0002 H
Limit:
These are the sign and mask settings for the DI_EX1 input and mask settings for SERSEQDAT1.
Signals are assigned to each bit. Set sign = 1 to invert the output. Set mask = 1 to bits whose signals are used and set 0
to bits which will not be used. Emergency masking is valid when DI_DATA2 bit 6 =1 or E_DRIVE = 1.
Logical AND operation is applied between DI_EX1 and SERSEQDATA1, but a logical OR operation is applied to EXRST.
Thus, MSK_DI1 bit 1 or EXRST and MSK_SERSEQ1 bit 1 or EXRST are always limited to 1.
Standard settings are shown below.

Condition Standard value
DI_EX1 SERSEQDATA1 MSK_DI1 MSK_SERSEQ1
N.U. Used 0002(H) FFFF(H)
Used N.U. FFFF(H) 0002(H)
Used Used FFFF(H) FFFF(H)
N.U. N.U. FFFF(H) 0002(H)
[Related parameters] FLG_DI_DATA1_SEL
Rev.S
90
4GBF0632
Table 3.2.4 DI_EX1 and SERSEQDATA1 (Bit Assignment)

F IL_ External interlock 1: Operation permitted
Off while running; causes a deceleration stop.
E UVS External safety switch 1: Operation permitted, contactor closed
Off while running; causes a deceleration stop.
D EXT0 Startup command 1: Startup command
Off while running; can be changed to either a coast stop
or a deceleration stop
C SPA1 Spare 1 1: Normal
B BRTST Brake test 1: Brake release (open)
A ST Torque control selection 1: Tension control, 0: speed control
9 F Forward inching operation 1: Forward jog run command (EXT should be off.)
command
8 R Reverse inching operation 1: Reverse jog run command (EXT should be off.)
command
7 3S 3-speed reference command 1: 3-speed reference (3S, 2S) = (0, 0):
command 1-speed reference
6 2S 2-speed reference command 1: 2-speed reference command
command
5 B Brake command 1: Brake release command
4 FLD Field excitation command 1: Field excitation command (when EXT is off)
3 BC_ Brake close command 0: Brake close
2 SPA0 Spare 0
1 EXRST External reset 1: Reset request
0 R_TEN Reverse rotation command 1: Reverse winding, 0: Forward winding (Torque direction
when torque is controlled)
Rev.S
91
4GBF0632
3.2.1.3. DI_EX2, DI_DATA2
SGN_DI2
Standard value: 000C H
Limit:
This is the sign setting for DI_EX2 input.
Signals are assigned to each bit. Set sign 1 to invert the output.
Table 3.2.5 DI_EX2 and DI_DATA2 (Bit Assignment)

F N.U. Not used
E N.U. Not used
D N.U. Not used
C SPA4 Spare 4
B SPA3 Spare 3
A SPA2 Spare 2
9 BLA_ AC Circuit breaker
8 M_FN_ Motor fan stopped
7 OH_ACL_ ACL overheating
6 E_DRIVE Emergency hard I/O operation For external signal input
5 HOLD Emergency speed hold
4 QSTOP Emergency stop
3 F_LMT_ Forward limit
2 R_LMT_ Reverse limit
1 B_HLTY Brake normal (healthy)
0 BA Brake answer
Rev.S
92
4GBF0632
SGN_DI_EX3
Limit:
MSK_DI3
Limit:
MSK_DI3_EMG
Emergency DI_EX3 relay input mask
Limit:
MSK_SERSEQ2
Limit:
These are the sign and mask settings for DI_EX3 input and mask settings for SERSEQDAT2.
Signals are assigned to each bit. Set sign 1 to invert the output. Set mask 1 to bits whose signals are used and set 0 to
bits not used. Emergency masking is valid when DI_DATA2 bit 6 =1 or E_DRIVE = 1.

Rev.S
93
4GBF0632

F QSTOP Emergency stop command 1: Emergency stop command
E UVS External safety switch 1: Operation permitted
D EXT0 Startup command 1: Startup command
C CM_BUF1 Command buffer bit 1
B CM_BUF2 Command buffer bit 2
A ST Torque control selection 1: Tension control, 0: speed control
9 F Forward inching operation command 1: Forward inching command
8 R Reverse inching operation command 1: Reverse inching command
5 N.U. Not used
4 FLD Field excitation command 1: Field excitation command
3 LATCH_PG_POS PG counter latch command Latch at rising and falling edges of this
signal.
2 SPA0 Spare 0
0 R_TEN Reverse rotation command 1: Reverse winding, 0: Forward winding
Rev.S
94
4GBF0632
SGN_DI_EX4
Limit:
MSK_DI4
Limit:
MSK_DI4_EMG
Limit:
MSK_SERSEQ4
Limit:
bits not used. Emergency masking is valid when DI_DATA2 bit 6 or E_DRIVE = 1.

[Related parameters] FLG_DI_DATA1_SEL, MSK_SERSEQ4
Rev.S
95
4GBF0632

F N.U. Not used
E N.U. Not used
D FLD Excitation command Excitation command when 1
C B Brake command Brake release command when 1
B SC_PPI Speed control P/PI switching P control when 1, PI control when 0
A 2S 2-speed reference command 2-speed reference command when 1
9 3S 3-speed reference command 3-speed reference command when 1
8 R_TEN Reverse command Reverse wind when 1, forward wind when 0
7 ST Torque control selection Tension control when 1, speed control when
0
6 LB Load balance between stands Load balance control when 1
5 N.U. Not used
4 BC_ Brake close command 0: brake close
3 N.U. Not used
2 UVS External safety switch Operation enabled when 1
1 EXT0 Start command Start command when 1
0 EXRST External reset Reset request when 1
Rev.S
96
4GBF0632
3.2.1.6. DI_EX5, SERSEQDATA5, DI_DATA5
SGN_DI_EX5
Standard value: 0000H
Limit:
MSK_DI_EX5
Limit:
MSK_SERSEQ5
Standard value: 0000 H (When serial communication is not used)
Limit:
bits not used. Logical AND operation is applied between DI_EX5 and SERSEQDATA5, that makes DI_DATA5.
Table 3.2.8 DI_EX5, SERSEQDATA5, and DI_DATA5 (Bit Assignments)

F JOG3 Jog speed reference selection bit 3
E JOG2 Jog speed reference selection bit 2
D JOG1 Jog speed reference selection bit 1
C JOG0 Jog speed reference selection bit 0
B EX_LMT_I1 Motor primary current limit selection 0: Internal; 1: External
A EX_LMT_TR Torque limit selection 0: Internal; 1: External
9 SP_UP Speed up Speed up while on
8 SP_DN Speed down Slow down while on
7 SEL_DI Operation (Local/Remote) system selection 0: Local; 1: Remote
6 DIR0 Motor rotation direction command (Local) 0: Forward; 1: Reverse
5 DIR1 Motor rotation direction command (Remote) 0: Forward; 1: Reverse
4 START0 Start button (Local) One shot to start (SEL=0)
3 START1 Start button (Remote) One shot to start (SEL=1)
2 STOP0 Stop button (Local) One shot to stop (SEL=0)
1 STOP1 Stop button (Remote) One shot to stop (SEL=1)
0 EXT1 Startup command (Remote) 1: Startup command (SEL=1)
Rev.S
97
4GBF0632
3.2.1.7. DI_EX6, SERSEQDATA6, DI_DATA6
SGN_DI_EX6
Limit:
MSK_DI_EX6
Standard value: FDFF H
Limit:
MSK_SERSEQ6
Standard value: 0000 H (When serial communication is not used)
Limit:
bits not used. Logical AND operation is applied between DI_EX6 and SERSEQDATA6, that makes DI_DATA6.
Table 3.2.9 DI_EX6, SERSEQDATA6, and DI_DATA6 (Bit Assignments)

F N.U. Not used
E N.U. Not used
D PR_ST PID control start
C RATE_CHG Optional rate selection
B FL_FOC Field over current
A FL_READY Field ready
9 FL_RNTD Filed running 1: Field exciter RUN I/F used
8 FL_FAULT Field critical fault
7 CHG_2S EEPROM bank selection
6 SEL_MRH MRH Enable
5 ASD Variable speed drive operation command
4 IM_NUM_B1 Motor unit count switch bit 1
3 IM_NUM_B0 Motor unit count switch bit 0
2 XFR_CHK Synchronization tester input 1 Synch check relay input is used
1 CPT Capture command
0 XFR Transfer command
Rev.S
98
4GBF0632
3.2.1.8. DI_EX7, CMDWORD1, DI_DATA_CMD1 (DI_DATA1)
SGN_DI_EX7
Limit:
MSK_DI7
Limit:
MSK_DI7_EMG
Limit:
MSK_CMD1
Transmission command word mask 1
Limit:
These are the sign and mask setting for DI_EX7 input and mask setting for CMDWORD1.
bits not used. Emergency masking is valid when DI_DATA2 bit 6 or E_DRIVE = 1.
Logical AND operation is applied between DI_EX7 and CMDWORD1, but a logical OR operation is applied to EXRST.
Thus, MSK_DI7 bit 7 and EXRST and MSK_CMD1 bit 7 or EXRST are always limited to 1.

DI_EX7 CMDWORK1 MSK_DI7 MSK_CMD1
N.U. N.U. 0080(H) 0080(H)
Rev.S
99
4GBF0632
Table 3.2.10 DI_EX7 (Digital Input Allocation)

F N.U. Not used
E N.U. Not used
D N.U. Not used
C F Forward jog run command 1: Forward inching command
B R Reverse jog run command 1: Reverse inching command
A PLC PLC Control 1:PLC Control (Always set to 1)
9 R_TEN Reverse winding command 1: Reverse winding, 0: Forward winding
8 N.U. Not used
4 B Brake command 1: Brake release command
3 EXT Startup command 1: Startup command
2 QSTOP Emergency stop 1: Emergency stop command
1 IL External interlock 0: Operation permitted
0 UVS External safety switch 1: Operation permitted
Rev.S
100
4GBF0632
3.2.1.9. DI_EX9, DI_DATA9
SGN_DI_EX9
Limit:
Table 3.2.11 DI_EX9 and DI_DATA9 (Bit Assignements)

F MP_BE_TM_H1_ BearingTempHigh1 0:Tmperature High
E MP_BE_TM_H2_ BearingTempHigh2 0:Temperature High
D MP_BE_TM_H3_ BearingTempHigh3 0:Temperature High
C MP_CF1_MR CoolingFan1MotorRun 1:Running
B MP_CF2_MR CoolingFan2MotorRun 1:Running
A MP_CF1_MCC_F_ CoolingFan1MCC Fault 0:Fault
9 MP_CF2_MCC_F_ CoolingFan2MCC Fault 0:Fault
8 MP_CWF_L1_ CoolingWaterFlowLow1 0:Flow Low
7 MP_CW_TM_H1_ CoolingWaterTempHi1 0:Temperature High
6 MP_OLU_LFD_ OilLubricationUniLFD 0:Alarm
5 MP_OLU_HFD_ OilLubricationUniHFD 0:Fault
4 MP_OLU_HPL_N OilLubUHiPressLineN 1:Normal
3 MP_OLU_LPL_N OilLubULowPressLineN 1:Normal
2 MP_SPH_ON SpaceHeater On 1:On
1 MP_SPH_MCC_F_ SpaceHeaterMCC Fault 0:Fault
0 MP_SW_TM_H_ StatorWindTempHigh 0:Temperature High
Rev.S
101
4GBF0632
3.2.1.10. DI_EX10, DI_DATA10
SGN_DI_EX10
Limit:

F MP_BR01_CL MotorBreaker01Closed 1:Closed
E MP_BR02_CL MotorBreaker02Closed 1:Closed
D MP_BR03_CL MotorBreaker03Closed 1:Closed
C MP_BR04_CL MotorBreaker04Closed 1:Closed
B MP_BR05_CL MotorBreaker05Closed 1:Closed
A MP_BR06_CL MotorBreaker06Closed 1:Closed
9 MP_BR07_CL MotorBreaker07Closed 1:Closed
5 MP_WLK1_ WaterLeakage1 0:Leakage
4 MP_CF_IL_ CoolingFan I/L SW 0:Interlocked
3 MP_SPH_IL_ SpaceHeater I/L SW 0:Interlocked
2 MP_OL_P_IL_ OilLubPump I/L SW 0:Interlocked
1 N.U. Not used
0 N.U. Not used
Rev.S
102
4GBF0632
3.2.1.11. DI_EX11, DI_DATA11
SGN_DI_EX11
Limit:

F MP_OL_TM_A_ OilTemperatureAlarm 0:Alarm
E MP_OL_TM_TR_ OilTemperatureTrip 0:Trip
D MP_WD_TM_A_ WindingTempAlarm 0:Alarm
C MP_WD_TM_TR_ WindingTempTrip 0:Trip
B MP_OL_LVL_A_ OilLevelAlarm 0:Alarm
A MP_OL_LVL_TR_ OilLevelTrip 0:Trip
9 MP_PRD_A_ PressReliefDevAlarm 0:Alarm
8 MP_PRD_TR_ PressReliefDevTrip 0:Trip
7 MP_BH_RL_A_ BuchholzRelayAlarm 0:Alarm
6 MP_BH_RL_TR_ BuchholzRelayTrip 0:Trip
5 MP_GP_RL_TR_ SuddenGasPressRyTrip 0:Trip
4 N.U. Not used
3 N.U. Not used
2 N.U. Not used
1 N.U. Not used
0 N.U. Not used
Rev.S
103
4GBF0632
3.2.2 Internal digital input
3.2.2.1. DI_IN3, DINT_DATA3

SGN_DINT3
Internal Digital input data 3 sign inversion
Limit:
This is the sign setting for DI_IN3 input.
Signals are assigned to each bit. Set sign 1 to invert the output. Do not adjust this setting.
Table 3.21 DI_IN3 and DINT_DATA3 (Bit Assignment)

F P7A_CLKDWN_ PP7 clockdown
E P7A_WD_ PP7 watchdog
D GIF_CLKDWN_ GIF board clockdown
C N.U. Not used
B N.U. Not used
A N.U. Not used
9 P_SW_ Panel IL switch on
8 FRSTSW_ Fault Reset switch on
7 UTL_OC_ Utility over current
6 OCA_B_ AC over current B bank
5 OCA_ AC over current
4 FPGA_CRC_ERR_ GIF board FPGA CRC error
3 UVS1_ANS_ UVS1 answer
2 TACH_F_Z_ PLG Z-ph Failure
1 TACH_F_B_ PLG B-ph Failure
0 TACH_F_A_ PLG A-ph Failure
Rev.S
104
4GBF0632
3.2.2.2. DI_INT_GIF, DINT_DATA_GIF

SGN_DI_GIF
GIF board internal digital input data sign inversion
Limit:
This is the sign setting for internal digital input data of GIF board.
図 3.214 DI_INT_GIF, DINT_DATA_GIF (Bit Assignment)

F ACP_T_ Input side AC MCCB 1:close
E ACSW_ Output side AC contactor 1:close
D BP_CTT Bypass contactor 1:close
C DI_C_FN_ Cooling fan 1:run
B DI_C_FN_B_ Redundant cooling fan 1:run
A DI_CPT_ Capture
9 DS Door open 1:open
8 Set to 1 in the case of no-precharge
PRE_CTT_ANS Pre-charge contactor answer
contactor model.
7 DI_OH_TR Input transformer overheat
6 DI_OH_TR_A Input transformer overheat alarm
5 DI_SPA1 Internal digital input spare 1 (Note 1)
4 CFN_SEL Cooling fan change
3 DI_XFR Transfer
2 N.U. Not used
1 N.U. Not used
0 N.U. Not used
(Note 1)
This is an internal digital input spare bit. The DI_SPA1 is not connected to specified sequences. Therefore, it can be applied to
spare sequence assign function (1 ms task) or simple logic function (100 ms task).
For example, if the DI_SPA1 is assigned SPA1 on protection sequence, set as below.
FUNC_SPA1_AS = B_DI_SPA1
Rev.S
105
4GBF0632
3.2.3 Digital output
3.2.3.1. General purpose digital output

Any bit sequence signal in the drive can be output from the IO board. Enter the bit name into DOn_AS to output the bit ON/OFF
status.
SGN_DOEX can invert the bit output.
Table 3.2.13 Setting of general digital output
Channel Output address setting

number Power supply Description
(Bit is fixed to 0)
DO1 DO1_AS Internal power I/O board XIO (ARND-4045)
supply or external
DO2 DO2_AS
power supply
DO3 DO3_AS
DO4 DO4_AS
DO5 DO5_AS I/O board XIOA (ARND-4187)
DO6 DO6_AS
DO7 DO7_AS
DO8 DO8_AS
DO9 DO9_AS
DO10 DO10_AS
DO11 DO11_AS
DO12 DO12_AS
DOn_AS (n=1~12)
General digital output address
Standard value: below
Limit:
Set bit name for general digital output.
(Standard)
Parameter Adress
DO1_AS B_DUST
DO2_AS B_DUST
DO3_AS B_DUST
DO4_AS B_DUST
DO5_AS B_BLR
DO6_ AS B_FAULT
DO7_ AS B_RNTD_DO
DO8_ AS B_READY_DO
DO9_ AS B_ALARM
DO10_AS B_DUST
DO11_AS B_DUST
DO12_AS B_DUST
Rev.S
106
4GBF0632
SGN_DOEX , SGN_DOEX2
Digital output data sign inversion, Digital output 2 data sign inversion
Limit:
Specify the sign inversion of digital output data DOEX_DATA and DOEX2_DATA.
When you set 1 to the corresponding bit, its signal will be inverted.
The digital output data are variable DOEX_DATA and DOEX2_DATA. These variable's sign are reversed to DOEX_OUT
and DOEX2_OUT by SGN_DOEX and SGN_DOEX2.
[Related parameters] DO1_AS – DO12_AS
SGN_DOEX
BIT Symbol Function
F ASD_EN Variable speed enable
E FL_CMD Excitation command
D PRE_CTT_OFF Precharge contactor off command
C CFA_CMD Cooling fans command
B DO12 General purpose DO 12
A DO11 General purpose DO 11
9 DO10 General purpose DO 10
SGN_DOEX2
BIT Symbol Function
F N.U. Not used
E N.U. Not used
D N.U. Not used
C N.U. Not used
B PRE_CTT_CMD Precharge contactor command
A CFB_CMD Redundancy cooling fans command
9 SYNC Synchronous transfer and capture complete
8 N.U. Not used
7 N.U. Not used
6 N.U. Not used
5 N.U. Not used
4 N.U. Not used
3 N.U. Not used
2 N.U. Not used
1 N.U. Not used
0 ACSW_CMD Output contactor (ACSW) command
Rev.S
107
4GBF0632
The general digital output can be assigned to arbitrary bit signals on control block diagram. The following table shows a part of bit
signals.
Signal name Contents

B_SP_LOW Low speed detection 1: Detection
B_SP_LST_A_ Speed reference lost alarm 0: Alarm
B_SP_LOST_ Speed reference lost 0: Detection
B_SOFT_STL_ Decelerating in overload 0: Decelerating
B_ROT_F_ Motor stall detection 0: Detection
B_REV_ROT_F_ Motor opposite direction turning 0: Detection
B_VINV_PH_LOSS_ Output voltage phase loss 0: Detection
B_VAC_PH_LOSS_ Input voltage phase loss 0: Detection
B_SP_RCHn Speed reach N (N = 1 - 3) 1: Detection
B_SP_RCHn_TDON Speed reach N on delay (N = 1 - 3) 1: Detection
B_SP_RCHn_TDOFF Speed reach N off delay (N = 1 - 3) 1: Detection
B_FL_CMD Exciter running command 1: Running command
B_CL_TA_ Current limit alarm 0: Alarm
B_OL_A_ Over load alarm 0: Alarm
B_UL_A_ Low load alarm 0: Alarm
B_MVD Momentary voltage drop ride-through 1: Ride-through
B_UVA_SIL_ Input voltage drop starting inter lock 0: Detection
B_UVA_DET Input voltage drop deteciton 1: Detection
B_MPSF_ Main power source failere 0: Detection
B_AC_P_T_ AC input VCB answer 1: On (Colse)
B_UV_DO UV signal for digital output 1: UV condition
B_READY_DO READY signal for digital output 1: READY condition
B_RNTD_DO RNTD signal for digital output 1: Running
Rev.S
108
4GBF0632
3.2.4 Analog input

The drive has two types of analog inputs, general-purpose analog inputs and internal analog inputs.
The general-purpose analog inputs can be configured to any variable in the drive through assignment of AINn_AS (n = 1, 2).
Internal analog inputs are fixed to a certain application by the drive firmware (ex. Utility voltage/current feedback).
3.2.4.1. General analog input

As a general-purpose analog input, the standard I/O circuit board (XIO: ARND-4045) has one general-purpose analog input
(AIN1). An option unit has an additional input (AIN2).
Each analog input signal is converted to the digital value through a 12-bit A/D converter. An exception is AIN1. AIN1 has several
input type options and digital values which are calculated differently based on the input type (AIN1_TYPE).
The +/-10 V input is converted to count -2047 to 2047, and then data is calculated by gain (AINn_GS) and offset (AINn_OS)
processing by software and then stored in the assigned variable (AINn_AS, n = 1, 2).
The figure below shows the input circuit. The jumper setting for AIN1 input type is “voltage” as factory default. If the input type
is 4-20mA signal, then the jumper position needs to be changed. For noisy environments, differential input is recommended.
XIO, ARND-4045
+/-10V JP1B AIN1_TYPE=0

Input 20V
TB2-1 AIN1_TYPE=1 AIN1 Gain + Data destination
10V
TB2-2 AIN1_GS AIN1_AS
4-20mA JP1A AIN1_TYPE=2 +
Input 4-20mA
Offset
AIN1_OS
Option unit
10V Voltage input only

TB2-19 AIN2 Gain + Data destination
TB2-20 AIN2_GS AIN2_AS
+
Offset
AIN2_OS
Fig 3.2.2 Analog Input circuit
Rev.S
109
4GBF0632
[Setting examples]
<Example 1> A Case that speed reference is input from AIN1 in analog signal.
Set 0 to 100% (0 to 1.0) speed reference signal at 0 to +10 V so that it is stored in SP_REF1.
Use a personal computer (maintenance tool) for the setting.
The input characteristic is shown in the figure below.
AIN1_TYPE = 1
AIN1_OS = 0
AIN1_AS = SP_REF1
AIN1_GS = (1.0 / 10 V) x 10 V
= 1.0
Fig 3.2.3 Input Characteristic Examples
AIN1_AS, AIN2_AS, AIN3_AS

General analog input data storing address
Standard value: AIN1_AS = SP_REF_AIN0
AIN2_AS = DUST
AIN3_AS = DUST
Limit: Must reference a floating point signal
Specify the target signal name for general analog inputs. Only floating-point signals are supported (ex. external speed reference
is SP_REF1, etc.). If an unsupported signal is referenced, the AINn_AS pointer will automatically be changed to DUST (invalid
data setting address). Set to DUST if the general analog input is not used.
Rev.S
110
4GBF0632
AIN1_GS, AIN2_GS, AIN3_GS

General analog input gain
Standard value: AIN1_GS = 1
AIN2_GS = 0
AIN3_GS = 0
Limit: -100000 - 100000
Specify the gain for processing the input analog value.
AIN1_OS, AIN2_OS, AIN3_OS

General analog input offset
Standard value: 0
Limit:
Specify the offset for processing the input analog value.
AIN1_TYPE
General analog input (input 1 type)
Standard value: 1
Limit: 0-2
AIN1_TYPE identifies the input form and voltage range of the general analog input. All voltage inputs are processed as differential
signals, with single-ended inputs which are referenced to the local analog common. If the differential input varies between +/- 10V,
set the type to 1 (10V). If the differential input varies between +/- 20V, set the type to 0 (20V). If the input form is using a 4 - 20mA
current input, set the type to 2 (4 - 20mA).
Setting 0: 20V
When TB2-1 is input +10V and TB2-2 is input -10V, then 20V is impressed between terminals and is assumed to have a +1.0pu
input.
When TB2-1 is input -10V and TB2-2 is input +10V, then -20V is impressed between terminals and is assumed to have a -1.0pu
input.
Setting 1: 10V
TB2-2 is fixed to 0V.
When TB2-1 is input +10V, then 10V is impressed between terminals and is assumed to have a +1.0pu input.
When TB2-1 is input -10V, then -10V is impressed between terminals and is assumed to have a -1.0pu input.
Setting 2: 4-20mA
When 4mA is input between terminals, it is assumed 0 input.
When 20mA is input between terminals, it is assumed +1.0 input.
FLT_AIN1, FLT_AIN2, FLT_AIN3

Analog input filter
Standard value: 0.0 rad/s
Limit: 0.0 - 1024.0 rad/s
Set the filters for analog input AIN1 – AIN2. If the filter is not needed, set to 0.
FLG_AIN_CUR
General analog input correction flag
Data type: 16 bit integer
Standard value: 1
Limit: 0, 1
Set 1 when use current input in general analog input.(AIN1_TYPE = 2)
Parameters: AIN1_TYPE
Rev.S
111
4GBF0632
3.2.4.2. Internal analog input

Assignment of the internal analog input is fixed as shown below.
AD_GS0 - AD_GS5, AD_GS14, AD_GS20, AD_GS21, AD_GS23, AD_GS25 - AD_GS28, AD_GS30 -

AD_GS32
Analog feedback gain
Standard value: 0.0
Limit: -1000 - 100000
The relationship between setting of AD_GSn and gain to be applied is shown below.
(Application again) = (AD_GSn + 1000) / 1000
AD_OS0 - AD_OS5, AD_OS14, AD_OS20, AD_OS21, AD_OS23, AD_OS25 - AD_OS28, AD_OS30 -

AD_OS32
Analog feedback offset
Standard value: 0.0
Limit: -32767 - 32767
Sets the gain and offset for analog feedback.
# Symbol Content Gain Offset

0 IU_F U-phase current feedback, A bank (IU_F_INV_A) AD_GS0 AD_OS0
1 IW_F W-phase current feedback, A bank (IW_F_INV_A) AD_GS1 AD_OS1
2 IU_F U-phase current feedback, B bank (IU_F_INV_B) AD_GS2 AD_OS2
3 IW_F W-phase current feedback, B bank (IW_F_INV_B) AD_GS3 AD_OS3
4 VR_F R-S input voltage feedback AD_GS4 AD_OS4
5 VT_F S-T input voltage feedback AD_GS5 AD_OS5
14 P3_F 3.3 V power supply voltage feedback AD_GS14 AD_OS14
20 M_TMP_PT Motor temperature (Pt1000 used) MTMP_PT_RMAX, AD_OS20
MTMP_PT_RMIN
21 M_TMP_RTD Motor temperature (Pt100(RTD unit) used) MTMP_RTD _MAX, AD_OS21
MTMP_RTD_MIN
23 PWB_TMP Main control board temperature AD_GS23 AD_OS23
25 CPS Control power supply AD_GS25 AD_OS25
26 CPS_FAULT Control power supply to measure power failure time AD_GS26 AD_OS26
27 IUTL_R_F R-phase utility current feedback AD_GS27 AD_OS27
28 IUTL_T_F T-phase utility current feedback AD_GS28 AD_OS28
30 VAC_RS_F R-S voltage feedback (Note 1) AD_GS30 AD_OS30
31 VAC_ST_F S-T voltage feedback (Note 1) AD_GS31 AD_OS31
32 PN15_F P15-N15 voltage AD_GS32 AD_OS32
(Note 1) They need interface when a drive transfers to another utility from drive connected one for synchronous transfer
specification. In addition, they need interface to detect utility reactive power for Var control by using RCV control. Set
FLG_XFR_UTL_SEL to 1 to their function. (Utility reactive power detection is not available now.)
Rev.S
112
4GBF0632
MTMP_OS
Motor temperature offset
Standard value: 0.00 C
Limit: -1000 - 1000 C
Sets the motor temperature offset.
AD_GS_ICNV
Converter current feedback gain
Standard value: 0.0
Limit: -1000 - 100000
The relationship of the settings of AD_GS_x and the gain to be applied, are shown below.
(Application gain) = (AD_GS_x + 1000) / 1000
AD_OS_ICNV
Converter current feedback offset
Standard value: 0
Limit: -100000000 - 100000000
Sets the gain and offset for the converter current feedback. Offset obtained by adding this setting is sent to the FPGA.
Then, it is applied to the offset of the converter current feedback for all cells.
AD_OS_IUC, AD_OS_IVC, AD_OS_IWC

Converter current feedback average offset
Standard value: 0.0
Limit: -1000 - 1000%
Sets the gain and offset for the converter current feedback. These setting set the offset to each phase with respect to the
average value of the converter current feedback for each cell.
AD_GS_VDC
DC voltage feedback gain A bank
Standard value: 0.0
Limit: -1000 - 100000
Set DC voltage feedback gain if drive has singl bank. Also, set A bank DC voltage feedback gain if drive has twin banks.
The relationship of the settings of AD_GS_x and gain to be applied, are shown below.
(Application again) = (AD_GS_x + 1000) / 1000
[Related parameters] AD_GS_VDC_B, AD_OS_VDC
AD_GS_VDC_B
DC voltage feedback gain B bank
Standard value: 0.0
Limit: -1000 – 100000
Note: Available firmware 08A or later
Set B bank DC voltage feedback gain if drive has twin banks.
The relationship of the settings of AD_GS_x and gain to be applied, are shown below.
(Application again) = (AD_GS_x + 1000) / 1000
[Related parameters] AD_GS_VDC, AD_OS_VDC
Rev.S
113
4GBF0632
AD_OS_VDC
DC voltage feedback offset
Standard value: 0.0 %
Limit: -300.0 – 300.0 %
Sets the DC voltage feedback offset.
It cannot be applied to DC voltage of each cell respectively. This offset is applied to the DC voltage feedback average (VDC_F),
maximum DC voltage feedback (VDC_MAX) and minimum DC voltage feedback (VDC_MIN) for all of cells.
[Related parameters] AD_GS_VDC, AD_GS_VDC_B
FLT_VDC_F
DC voltage feedback filter
Limit: 0.0 - 1024.0 rad/s
Set 0 when the filter is not used.
CNT_GS_V1
Output voltage feedback gain
Standard value: 0
Limit: -1000 - 32767
Sets the output voltage feedback gain.
The relationship between the gain setting and the gain actually used is as follows.
(Applied gain) = (Gain setting + 1000) / 1000
CNT_OS_VU1, CNT_OS_VV1, CNT_OS_VW1

U, V, and W phase output voltage feedback offset
Limit: -327.67 - 327.67% (1.0/100%)
Sets the output voltage feedback offset for each phase, respectively.
Symbol Content Gain Offset

IU_F_B U-phase converter current feedback AD_OS_IUC
IV_F_B V-phase converter current feedback AD_ICNV AD_OS_IVC
IU_F_B W-phase converter current feedback AD_OS_IWC
VDC_F DC voltage feedback average
AD_GS_VDC
VDC_MAX DC voltage feedback maximum AD_OS_VDC
AD_GS_VDC_B
VDC_MIN DC voltage feedback minimum
VU_FBK U-phase bank 1 output voltage feedback CNT_OS_VU1
VV_FBK V-phase bank 1 output voltage feedback CNT_GS_V1 CNT_OS_VV1
VW_FBK W-phase bank 1 output voltage feedback CNT_OS_VW1
Rev.S
114
4GBF0632
3.2.5 Analog output
3.2.5.1. General analog output

For the general analog output, this equipment has normally four channels (AOUT4 - 7) on IO interface boards (XIOA:
ARND-4187). In addition, it can have two channels (AOUT1, 2) by using option units (OPTS: ARND-4051) or interface modules
(IFM) as optional extras.
Output data can be selected as shown in Table 3.2.15 by setting codes (AOUT1_CODE - AOUT7_CODE).
<Example 1> Speed feedback is output from AOUT4 as an 8 V signal at 100%-speed.

Current feedback is output from AOUT5 as a 3 V signal at 100%-current.
AOUT4_CODE: Set 2, then SP_F signal will be output with the specified gain.
AOUT5_CODE: Set 8, then I1_F signal will be output with the specified gain.
Option
CTR D/A (AOP)
Option unit AOUT1
AOUT1 (OPTS) (AON)
AOUT1_CODE I/F module (IFM) (AO2P)
AOUT2
AOUT2 (AO2N)
AOUT2_CODE Standard
(AO4P)
AOUT4
AOUT4 (AO4N)
XIOA ・
AOUT4_CODE ・ AOUT4~7
・ (ARND-4187) ・
・・
AOUT4~7 ・ (AO7P)
・ AOUT7
AOUT7 (AO7N)
AOUT7_CODE
Fig 3.2.4 General-purpose Analog Output Configuration
Table 3.2.15 Analog Output Code
Code Data name D/A gain D/A output Description

Separate Set output data name, gain and offset
0 Option
setting separately for AOUT1 to 7.
1 SP_R 1.2500 8 V/100% Speed reference (after rate)
Speed feedback
2 SP_F 1.2500 8 V/100%
Motor primary frequency (V/f control)
3 T_R 3.3333 3 V/100% Torque reference
4 IQ_R 3.3333 3 V/100% Torque current reference
5 IQ_F 3.3333 3 V/100% Torque current feedback
6 FL_R 1.2500 8 V/100% Magnetic flux reference
7 I1_R 1.2500 8 V/100% D axis current reference
8 I1_F 3.3333 3 V/100% Primary current feedback
9 FREQ 1.2500 8 V/100% Frequency
Rev.S
115
4GBF0632
For the output signals not listed in the table above, select 0 as the code number, set the data name, D/A gain and offset in
accordance with the channel. See below.
AOUTn_CODE: Set 0
AOUTn_OP_AS: Data name
AOUTn_OP_GS: D/A conversion gain
AOUTn_OP_OS: Offset n: 1 to 7
Gain setting is the count for 10 V output.
<Example> SP_F (speed feedback) is output as 10 V signal at 100%-speed.
SP_F (speed feedback) is internally weighted 100% with 1.0 count.
To output 1.0 count as 10V, set the gain to 1.0.
Analog output settings can be changed anytime but be careful when you change the setting because if the output is used outside
when it is changed, it may cause disturbances.
AOUT1_CODE, AOUT2_CODE, AOUT3_CODE, AOUT4_CODE, AOUT5_CODE, AOUT6_CODE,

AOUT7_CODE
General D/A output code
Standard value: 0
Limit: 0-9
Select general analog output (6 channels) data by code.
The correspondence between data and codes is shown in Table 3.2.15.
AOUT1_OP_AS, AOUT2_OP_AS, AOUT3_OP_AS, AOUT4_OP_AS, AOUT5_OP_AS,

AOUT6_OP_AS, AOUT7_OP_AS
General analog output option address
Standard value: AOUT4_OP_AS = I1_F_DSP
AOUT5_OP_AS = SP_F_DSP
Other: DUST
Limit:
AOUT1_OP_GS, AOUT2_OP_GS, AOUT3_OP_GS, AOUT4_OP_GS, AOUT5_OP_GS,

AOUT6_OP_GS AOUT7_OP_GS
General analog output option gain
Standard value: AOUT4_OP_GS = 1.25
AOUT5_OP_GS = 1
Other: 0
8 8
Limit: -10 - 10
AOUT1_OP_OS, AOUT2_OP_OS, AOUT3_OP_OS, AOUT4_OP_OS, AOUT5_OP_OS,

AOUT6_OP_OS AOUT7_OP_OS
General analog output option offset
Standard value: 0
8 8
Limit: -10 - 10
Specify the address, gain, and offset of general analog output (6 channels).
[Related parameters] Valid when AOUT1_CODE = 0, AOUT2_CODE = 0, AOUT3_CODE = 0, AOUT4_CODE = 0,
AOUT5_CODE = 0, AOUT6_CODE = 0, AOUT7_CODE = 0 respectively.
Rev.S
116
4GBF0632
FLT_AOUT4, FLT_AOUT5, FLT_AOUT6, FLT_AOUT7

General analog output filter
Limit: 0.0 - 1024.0 rad/s
Set the filters for analog input AOUT4 - AOUT7. If the filter is not needed, set to 0.
DA_LMT_OFF
D/A output limit disabling flag
Limit:
Disables the output limit of general analog output 6 channels and general the 5 D/A channels. Lower 11 bits correspond to
channels symbols as shown below. The corresponding output limit of channels can be disabled by setting 1 to each bit.
Bit Corresponding D/A channels

12 - 15 Not used
11 General AOUT7
10 General AOUT6
9 General AOUT5
8 General AOUT4
7 General D/A 1ch
6 General D/A 2ch
5 General D/A 3ch
4 General D/A 4ch
3 General D/A 5ch
2 Option AOUT1
1 Option AOUT2
0 Option AOUT3
Rev.S
117
4GBF0632
3.2.5.2. Measurement analog output

Five channels, D/A1 to D/A5, are also available for analog outputs. The configuration is shown below. Output data, gain and
offset can be set.
D/A1 D/A2 D/A3 D/A4 D/A5

Data output DA1_AS DA2_AS DA3_AS DA4_AS DA5_AS
Gain DA1_GS DA2_GS DA3_GS DA4_GS DA5_GS
Offset DA1_OS DA2_OS DA3_OS DA4_OS DA5_OS
D/A1 D/A2 D/A3 D/A4 D/A5

0V
Fig 3.2.5 Measurement Analog Output Configuration
The setting value of the gain sets the count value when 10 V output.
[Setting examples]
<Example 1> Speed feedback (SP_F) is output from D/A1.
The settings are made so that SP_F in a range of 0 to 125% (0 to 1.25) is output at 0 to 10 V. These settings are made
using the personal computer (maintenance tool).
DA1_AS = SP_F
DA1_GS = 1.25 (125%)
DA1_OS = 0 (0%)
<Example 2> Torque reference (T_R) is output from D/A2.
The settings are made so that T_R in a range of 50 to 125% (0.5 to 1.25) is output at 0 to 10 V.
OA2_AS = T_R
OA2_GS = (1.25 0.5) = 0.75 (75%)
DA2_OS = 0.5 (50%)
Analog output settings can be changed anytime but be careful when you change the setting because if the output is used
outside when it is changed, it may cause disturbances.
DA1_AS - DA5_AS
Measuring analog output address
Standard value: DUST
Limit:
DA1_GS - DA5_GS
Measuring analog output gain
Standard value: 0
8 8
Limit: -10 - 10
Rev.S
118
4GBF0632
DA1_OS - DA5_OS
Measuring analog output offset
Standard value: 0
8 8
Limit: -10 - 10
Sets the address, gain and offset of the measured analog output (5 channels).
DA _ ASn value DA _ OSn
DA output 10
DA _ GSn
n=1-5
DA output [V]
[Related parameters] DA_LMT_OFF
Rev.S
119
4GBF0632
3.2.5.3. Note of analog outputs

General analog outputs and measurement analog outputs generate undefined voltage levels (which may become +10V or -10V)
during the time immediately after control power is turned on and before the control microprocessor finishes the initialization.
When instruments, which cannot accept the undefined voltage input, such as a meter with a peak-hold gauge, are interfaced to
the analog outputs, the disconnection method is performed by relays to avoid applying such voltages, are required.
The figure below shows the recommended circuit.
P24
This equipment
B_INZ_MSK30M RY
or
B_READY　etc. Digital
outputs
Z24
Output
data Analog External
outputs instruments
If the external instruments Meter with
cannot accept open circuit peak-hold
B_INZ_MSK30M is a flag which of inputs, connect between gauge, etc.
becomes 1 after initialization is NC contact of a relay and
finished and 30msec passes. common level line.
Fig 3.2.6 Countermeasure example of indeterminately output at initialization
Rev.S
120
4GBF0632
3.2.6 Serial communication

In addition to P-I/O, this drive equipment also supports serial data transmission using a transmission unit. The drive can
be set up to use P-I/O, the serial transmission, or both. The serial data transmission unit provides an interface with
upstream programmable controllers (PLC units).
The serial data transmission unit provides two types of transmission: scan transmission and message transmission,
although it can be used for scan transmission only depending on the system specifications or transmission type.
In this document, when drive receives data from external equipment, such as a PLC, is considered as "reception" or an "input",
and when it transmits to external equipment is considered as "transmission" or an "output".
(1) Scan transmission

This system transmits data at specified intervals (scan time). This system is used to input and output the speed and
sequence signals between the drive and the upstream controller (PLC).
(2) Message transmission
This system transmits data between specified stations at irregular time. It is useful for transmitting a lot of data, such as
trace-back data if a fault occurs. This transmission corresponds to TOSLINE-S20 transmission and ISBus transmission.
In TOSLINE-S20 transmission, it is an option by system specification.
(3) Transmission between drives
It is one kind of scan transmission, but it happens between two drives directly.
This transmission supports TOSLINE-S20 transmission and TC-net I/O transmission. The typical operation examples
are as below.
a) Master/slave
If one machine is driven by two units (two motors), one is defined as master and the other as slave.
Master: Speed control
Slave: Torque control (Torque reference is input from the master.)
b) Load balance
This operation is used so that two drives are balanced. According to the signals from both drive loads, the speed of the
heavier loaded drive will be reduced.
(4) Transmission unit

The unit of transmission data is called ”word”. 1 word is 16 bits.
The input/output sequence data will be in the first word of the scan data with some communication protocol (it might be in the
second data). For the data memory assignment, refer to SCAN_RCV01_AS - SCAN_RCV10_AS, SCAN_WR01_AS -
SCAN_WR10_AS described below. If the assigned data is the floating point data, the scaling gains, SCAN_RCV01_GS -
SCAN_RCV10_GS and SCAN_WR01_GS - SCAN_WR25_GS are required. The sequence data inputs, SERSEQDATA1, 2, 4
includes heart beat bit (HB) with the approximately-same bit configuration.
The parameter setting indicates where the scan data is in the scan memory and how many words are available. It also depends
on the transmission protocol. Please refer to SCAN_R_ADRS, SCAN_R_SIZE, SCAN_W_ADRS, SCAN_W_SIZE.
Rev.S
121
4GBF0632
3.2.6.1. Transmission protocol types

Depending on the scan transmission speed and the number of stations, two types of transmission systems are available as shown
in Table 3.2.16 through Table 3.2.21. An optimal transmission type suitable for the user’s application is selected.
For more detail of each transmission, please refer to the ”Drive Equipment PLC Transmission Instruction Manual” (6F3A4885).
Table 3.2.16 Overview of TOSLINE-S20

Item TOSLINE-S20 standard version TOSLINE-S20 high speed version
Maximum number of PLC station: 1 unit PLC station: 1 unit
stations Drive station: 63 units Drive station: 4 units
(ASC is used.)
Scan memory words Maximum 1024 words Maximum 128 words
16 words send and receive/unit 16 words send and receive/unit
Transmission speed of 64 stations 16 words 4 drive units 16 words
scan transmission Interval: 57.3 ms Interval: 2 ms
8 stations 16 words 2 drive units 16 words
Interval: 10.2 ms Interval: 1 ms
Frame size of message 544 bytes 74 bytes
transmission
Table 3.2.17 Overview of TC-net I/O

Item TC-net I/O TC-net I/O
electricity optical
Maximum number of Master or drive station: 12 units Master or drive station: 254 units
stations
Scan memory words 8 or 10 words receive and 10 words send 8 or 10 words receive and 10 words send
/unit /unit
Transmission speed of High speed: about 1ms (auto setting) High speed: about 1ms (auto setting)
scan transmission Middle speed: none Middle speed: 10ms (free setting)
Frame size of message 2048 bytes 2048 bytes
transmission
Table 3.2.18 Overview of ISBus

Item ISBus
Maximum number of stations Master or drive station: 32 units
Scan memory words 10 words send and receive/unit
Transmission speed of scan transmission Maximum 5Mbps
Frame size of message transmission 128 bytes
Table 3.2.19 Overview of DeviceNet

Item DeviceNet
Scan memory words 4 words send and receive /unit,
4 words send and 10 words receive /unit
Transmission speed of scan transmission 125 kbps, 256 kbps, 500 kbps
Frame size of message transmission Not supported
Rev.S
122
4GBF0632
Table 3.2.20 Overview of PROFIBUS

Item PROFIBUS Cable type A
Maximum number of stations Master or drive station: 32 units (with repeater)
Master or drive station: 99 units (without repeater)
Scan memory words 6 words send and receive /unit
or 10 words send and receive /unit
Transmission speed of scan transmission 9.6 kbps - 12 Mbps (Set by Master side)
Table 3.2.21 Overview of MELPLAC

Item MELPLAC
Scan memory words 8 words send and receive /unit
Transmission speed of scan transmission 1 Mbps
Rev.S
123
4GBF0632
3.2.6.2. Sequence input
Set SERSEQDATA1, SERSEQDATA2, SERSEQDATA4, SERSEQDATA5, SERSEQDATA6 or CMDWORD1 as

receiving data for the transmission input word, of the sequence data.
In general, a value of 1 indicates either the normal or the operating state, and 0 indicates either an error or stopped.
Table 3.2.221 Serial communication related symbols
Serial Variable after sign

Digital
communication Mask parameter Digital Input Mask inversion, mask or other
Input and sign
input process
DI_EX1 MSK_DI1 DI_DATA1
SERSEQDATA1 MSK_SERESQ1
SGN_DI1 (MSK_DI_EMG) (FLG_DI_DATA1_SEL=0)
DI_EX2
－ N/A － N/A － N/A DI_DATA2
SGN_DI2
SGN_DI_EX3 (MSK_DI3_EMG) (FLG_DI_DATA1_SEL=1)
SGN_DI_EX4 (MSK_DI4_EMG) (FLG_DI_DATA1_SEL=2)
DI_EX5
SERSEQDATA5 MSK_SERESQ5 MSK_DI_EX5 DI_DATA5
SGN_DI_EX5
DI_EX6
SERSEQDATA6 MSK_SERESQ6 MSK_DI_EX6 DI_DATA6
SGN_DI_EX6
DI_DATA_CMD1
DI_EX7 MSK_DI7
CMDWORD1 MSK_CMD1 DI_DATA1
SGN_DI_EX7 (MSK_DI7_EMG)
(FLG_DI_DATA1_SEL=0)
Table 3.2.231 Sequence data input bit configuration
SERSEQ SERSEQ SERSEQ SERSEQ SERSEQ

BIT CMDWORD1
DATA1 DATA2 DATA4 DATA5 DATA6
F IL_ QSTOP N.U. N.U. JOG_B3 N.U.
E UVS UVS N.U. N.U. JOG_B2 N.U.
D EXT0 EXT0 FLD N.U. JOG_B1 PR_ST
C SPA1 CM_BUF1 B F JOG_B0 RATE_CHG
B BRTST CM_BUF2 SC_PPI R EX_LMT_I1 FL_FOC
A ST ST 2S N.U EX_LMT_TR FL_READY
9 F F 3S R_TEN SP_UP FL_RNTD
8 R R R_TEN N.U SP_DN FL_FAULT
7 3S 3S ST EXRST SEL_DI CHG_2S
6 2S 2S LB 3S DIR0 SEL_MRH
5 B N.U. N.U. 2S DIR1 ASD
4 FLD FLD BC_ B START0 IM_NUM_B1
3 BC_ LATCH_PG_POS N.U. EXT0 START1 IM_NUM_B0
2 HB HB UVS QSTOP STOP0 XFR_CHK
1 EXRST EXRST EXT0 IL STOP1 CPT
0 R_TEN R_TEN EXRST UVS EXT1 XFR
Rev.S
124
4GBF0632
3.2.6.3. Sequence output
Set SSEQ_OUT1, SSEQ_OUT2, SSEQ_OUT3, SSEQ_OUT4, STSWORD1 or STSWORD2 for the transmission output
word of the sequence data. Table 3.2.24 -
Table 2.1 show the bit signals of each sequence output.

Generally, ”1” indicates correct or operating state while ”0” indicates error or stop state.
Table 3.2.24 SSEQ_OUT1 (Sequence data output bit configuration)

Bit Signal name Contents
F N.U. Not used
E BLR Electrical critical fault 1: Electrical critical fault
D UVA Electrical condition ready condition 1: Condition met
C UV Electrical condition 1: Condition met
B READY Operation ready 1: Operation ready
A C_L Current limit 1: Current limiting
9 RNTD Running 1: Running
8 FLDR Field energized 1: Field energized (currently running)
7 FD Forwarding 1: Forward detection
6 RD Reversing 1: Reverse detection
5 FAULT Critical fault 1: Critical fault
4 ALARM Slight fault 1: Slight fault
3 C_FN Cooling fan OK 1: Cooling fan OK
2 CUT Discontinuation detecting 1: Discontinuation detected
1 SP_LMT Speed limit 1: Speed limiting
0 HB Heart beat (transmission healthy) Periodic rectangular wave signals

F BLR Electrical critical fault 1: Electrical critical fault
E UVA Electrical condition ready condition 1: Condition met
D SP_LMT Speed limit 1: Speed limiting
C SSEQ_OUT_BIT0 Optional bit 0
B READY Operation ready 1: Operation ready
A C_L Current limit 1: Current limiting
8 FLDR_TD_ON Field energized 1: Field energized (currently running)
after time delay
7 FD Forwarding 1: Forward detection
6 RD Reversing 1: Reverse detection
5 FAULT Critical fault 1: Critical fault
4 ALARM Slight fault 1: Slight fault
3 SSEQ_OUT_BIT3 Optional bit 3
0 HB Heart beat (transmission healthy) Periodic rectangular wave signals
Rev.S
125
4GBF0632

F READY Operation ready 1: Operation ready
E UV Electrical condition 1: Condition met
D RNTD Running 1: Running
C SSEQ_OUT_BIT0 Optional bit 0
B BLR Electrical critical fault 1: Electrical critical fault
A ASD_EN ASD Enable
9 SYNC Xfr./CPT. Complete External CTT command
8 SRDY Synch start ready 1: Ready
6 BYPSW_CMD Bypass SW Close Command 1: One short close
3 BYPSW_TRIP Bypass SW Open Command 1: One shot open
2 ACSW_CMD ACSW Command 1: Close command
1 CPT_EN Capture Enable 1: While capturing
0 XFR_EN Transfer Enable 1: While transferring

F HB Heart beat (transmission healthy) Periodic rectangular wave signals
E FAULT Critical fault 1: Critical fault
D ALARM Slight fault 1: Slight fault
C R_LMT Reverse limit 1: Reverse limit
B CUT Discontinuation detecting 1: Discontinuation detected
A READY Operation ready 1: Operation ready
9 F_LMT Forward limit 1: Forward limit
8 UV Electrical condition 1: Condition met
7 FLDR Field energized 1: Field energized (current running)
6 QSTOP Emergency stop 1: Emergency stop
5 BA Brake answer 1: Brake open
4 STALL Low frequency overload 1: Low frequency overload (Not used)
2 C_L Current limit 1: Current limiting
1 OL_A Overload alarm 1: Overload alarm
0 SP_LMT Speed limit 1: Speed limiting
Rev.S
126
4GBF0632
Table 3.2.28 STSWORD1 (Sequence data output bit configuration)

F N.U. Not used
E N.U. Not used
D MP_FAULT MP Critical Fault 1: Motor and transformer protection critical fault
SP_SIL_MSK Flying Restart Active 1: Enable to switch-On the inverter with the motor
C
rotating (for grinding drives)
B LOCAL Local Control Active 1: Enhanced keypad local operation mode
A SP Not Zero Speed 1: Not Zero Speed
9 PLC_R PLC Control Active 1: PLC Control Active
8 SP_ERR_T_ No Speed Detection Error 1: No error
7 ALARM Minor Fault 1: Minor Fault
6 P_SW Panel I/L Switch Off 1: Interlock off
5 QSTOP_ Not Emergency Stop 1: Not Emergency stop
4 UV Elect Condition Met 1: Condition met
3 FAULT Critical Fault 1: Critical fault
2 FLDR Excitation On 1: Field energized (current running)
1 UVS Ext Safe Switch 1: Operation permitted, contactor closed
0 READY Operation Ready 1: Operation ready
Table 3.2.29 STSWORD2 (Sequence data output bit configuration)

F MP_TRANS_ Trans Alarm / Fault 1:Alarm / Fault
E OV DC Over Voltage 1:Over Voltage
D MP_AR_A Motor Cooling Air Alarm 1:Alarm
C MP_CW_A Motor Cooling Water Alarm 1:Alarm
B MP_TM_OLA Motor Over Temperature Alarm 1:Over Temperature Alarm
A MP_TM_OL Motor Over Temperature Fault 1:Over Temperature
9 BA Brake Answerback 1:Brake open
8 BR_F Motor Brake Fault 1:Fault
7 MP_CF_A Motor Fan Alarm 1:Alarm
6 N.U. Not used
5 C_FN Vent Fan Stopped 1:Ventilation fan stopped
4 MAIN_SW_ Main Disconnect Open 1:Open / Fault
3 CUT Plate Cut 1:Plate Cut
2 QSTOP_R Emergency Stop Active 1:Emergency Stop Active
1 MP_BR Motor Breakers 1:Open
0 MP_R_IL Ready Interlock 1:Interlock
Rev.S
127
4GBF0632
3.2.6.4. Optional sequence input/output
Table 3.2.30 shows the optional sequence input, and Table 3.2.31 shows the optional sequence output.
Table 3.2.30 DT_RD _SEQ (Optional sequence input) Bit Configuration

15 N.U. Not used
14 N.U. Not used
13 N.U. Not used
12 N.U. Not used
11 N.U. Not used
10 N.U. Not used
9 N.U. Not used
8 N.U. Not used
7 N.U. Not used
6 N.U. Not used
5 DT_RD_OSC Operation command This equipment not use
4 DT_RD_AQRON VAR control command This equipment not use
3 DT_RD_IMPCL Impact compensation current This equipment not use
2 DT_RD_IMPIL Impact compensation 1: Impact compensation active
1 DT_RD_M_S Master / Slave This equipment not use
0 DT_RD_LB Load balance 1: Load balance compensation active
Table 3.2.31 DT_WR_SEQ (Optional sequence output) Bit Configuration

15 N.U. Not used
14 R_LIMIT_ Reversing limit 0: Limit detection
13 F_LIMIT_ Forwarding limit 0: Limit detection
12 N.U. Not used
11 N.U. Not used
10 N.U. Not used
9 BA Brake answer 1: Release detection
8 STALL Low frequency overload 1: Low frequency overload (Not used)
7 M_OH Motor overheat 1: Motor overheat
6 N.U. Not used
5 N.U. Not used
4 STPRQ Intermediate fault (stop request) 1: Intermediate fault
3 CSCUT_ Crop shear 0: Shear detected
2 LR Load relay 1: Load ON
1 OL_A Overload alarm 1: Overload alarm
0 TRQ_LMT Torque limit 1: Limit detection
Rev.S
128
4GBF0632
3.2.6.5. Connection status of motor breakers
Table 3.2.32 shows the connection status of motor breakers.

Table 3.2.32 MP_LFD5_INP (Connection status of motor breakers) Bit Configuration

Rev.S
129
4GBF0632
3.2.7 Serial input / output signals
3.2.7.1 Serial input signals

Signals that can be input through serial transmission are shown below:
Table 3.2.33 Interface Data Examples (Input)

Execution
Symbols Meanings Weight, Sample Note
time [ms]
SERSEQDATA1 Serial sequence command 1 (16-bit integer) Selected when FLG_DI_DATA1_SEL=0 1
SERSEQDATA5 Serial sequence command 5 (16-bit integer) 1
SERSEQDATA6 Serial sequence command 6 (16-bit integer) 1
CMDWORD1 Serial sequence command 1 (16-bit integer) Selected when FLG_DI_DATA1_SEL=3 1
1.0/100% DIR command is required for +/- speed operation
SP_REF_AIN0 Unipolar Speed reference 0 1
(floating-point number) Selected when SEL_DI = 0
1.0/100% DIR command is required for +/- speed operation
SP_REF_AIN1 Unipolar Speed reference 1 1
(floating-point number) Selected when SEL_DI = 1
1.0/100%
SP_REF1 Bipolar Speed reference 1 Minimum speed (LMT_SP_MIN) is not available 1
(floating-point number)
1.0/100%
SP_REF2 Bipolar Speed reference 2 Minimum speed (LMT_SP_MIN) is not available 1
1.0/100%
SP_REFA1 Auxiliary speed reference 1 Minimum speed (LMT_SP_MIN) is not available 1
1.0/100%
TENS_R_A Auxiliary tension (torque) reference 1
1.0/100%
TENS_R1 Tension (torque) reference 1 1
1.0/100%
TENS_R2 Tension (torque) reference 2 Multiplied by EXT_TRQ_GAIN 1
Motor parameter group selection command.
MOT_G_NO This is valid only when $FLG_MOT_G = 1 for 0 - 3(16-bit integer) Motor group can be changed only while not 1
communication input. running.
When 4 sets of speed control gain selection is
Speed control gain selection command. used, following parameters are changed.
0-3
ASPR_G_NO This is valid only when $FLG_MOT_G = 4 for ASPR_P, ASPR_W1, ASPR_A, ASPR_AT, 1
(16-bit integer)
communication input. SFC_P, SFC_A, SFC_D, SFC_J, FLT_SP,
FLT_T_R, RMFC_P
Continuous change of speed control gain.
When the speed control gain correction setting is 1.0/gain 1
ASPR_GAIN_EXT Adjustment gain for ASPR_P, SFC_J. 10
changed, this value is changed to newly set value (floating-point number)
with rate.
Load sharing ratio 1.0/gain 1
EXT_TENS_GAIN 1000cnt/ gain 1 in $FLG_EXT_T_GAIN=1 1
Torque division ratio against the master is set. (floating-point number)
1.0/100%
EXT_TRQ External torque reference 1
1.0/100%
EXT_TRQ_GAIN External torque reference gain Gain for EXT_TRQ 1
1.0/100%
ID_S_T Converter reactive current reference Initial value: $ID_S 1
1.0/100%
IQ_LMT_EXT External current limitation value (torque limit) 1
1.0/100%
IQ_LMT_EXT_INV External regenerative current limit value 1
1.0/100%
KS_FAI_T Rated flux reference Initial value: $CS_KS_FAI 1
1.0/100%
LMT_TRQ_INV_T4 Regenerative torque limit Initial value: $LMT_TRQ_INV 1
1.0/100%
LMT_TRQ_T4 Torque limit Initial value: $LMT_TRQ 1
1.0/100% Used in simulation mode
SIM_LD_TRQ_T Simulation mode load torque 1
(floating-point number) Initial value: $SIM_LD_TRQ
1.0/100%
SIM_SP1 Simulation mode speed Used in simulation mode 1
1.0/100%
TCMP_EXT External torque compensation input Used in torque compensation 1
1.0/100% Used when PLC changes transmission period of
TIME_RATE_T Automatic speed rate adjustment transmission period 10
(floating-point number) automatic rate adjustment.
1.0/100% Torque reference for current-limit control (CLC) is
AREF2 External current reference 1
(floating-point number) inputted. CLC is active in speed control with ST=1.
1.0/100%
ASPR_FORCE_T4 ASPR torque forcing $ASPR_SP_FORCE set initial value. 1
104.8576 x Time for which
motor achieve at top
ASR_J0_T Inertia setting of speed control 2 $ASR_J0 set initial value 1
speed with rated torque.
Drooping online gain 1.0/100%
DROOP_GAIN_T 1
Value in $CR_DROOP_GAIN is set as initial value. (floating-point number)
Rev.S
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4GBF0632
Execution
Symbols Meanings Weight, Sample Note
time [ms]
Drive-to-drive transmission sequence command
DT_DRV_SEQ This is used for receiving serial sequence output 0 - 3 (16-bit integer) Serial sequence output of other drive 1
(SSEQ_OUT1) of other drive.
Acceleration / Deceleration torque calculation inertia 1.0/gain 1
DT_GD2_RAT Gain for inertia moment setting $DT_GD2. 1
moment gain (floating-point number)
1.0/100%
DT_IMP_REF Impact dropping compensation reference Initial value: $DT_IMP_R_INZ 1
1.0/gain 1
DT_LB_GAIN Load balance reference gain Gain for DT_LB_T_EX 1
1.0/100%
DT_LB_T_EX Load balance reference 1
1.0/100%
DT_LB_T_TEST Load balance test For tuning load balance control, usually not used. 1
Rev.S
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4GBF0632
3.2.7.2 Serial output signals

Signals that can be output through serial transmission are shown below:
Table 3.2.34 Interface Data Examples (Output)
Data name 100%-count Functions

SP_F_OUT 1.0 (floating-point number) Speed feedback for control use
SP_F_DSP 1.0 (floating-point number) Speed feedback for monitoring
T_R_OUT 1.0 (floating-point number) Torque reference for control use
I1_F_DSP 1.0 (floating-point number) Motor primary current feedback for monitoring
ID_F 1.0 (floating-point number) Excitation current feedback
IQ_F 1.0 (floating-point number) Torque current feedback
SSEQ_OUT1 Bit signal (16-bit integer) Serial sequence output
STSWORD1 Bit signal (16-bit integer) Serial sequence output
STSWORD2 Bit signal (16-bit integer) Serial sequence output
DT_WR_SEQ Bit signal (16-bit integer) Serial sequence output
MP_LFD5_INP Bit signal (16-bit integer) Connection status of motor breakers
OLCHK_REC 1.0 (floating-point number)
5 minutes
I2
OL20CHK_REC 1.0 (floating-point number)
20 minutes
I2
DT_LB_CMP_EX 1.0 (floating-point number) When 2-unit (upper/lower) load balance control master is set, the speed correction is
output to the slave drive.
LD_TRQ_OUT 1.0 (floating-point number) Output is possible when the acceleration/deceleration torque calculation is executed.
Load torque (including mechanical loss)
DT_ACC_TRQ 1.0 (floating-point number) Output is possible when the acceleration/deceleration torque calculation is executed.
Acceleration (deceleration) torque
DT_DNDT Output is possible when the acceleration/deceleration torque calculation is executed.
Acceleration (deceleration) [0.1 min-1/s] (floating-point number)
DT_MT_POS Motor position (valid only when resolver 1x is used.)
32768 to 32767/revolution (16-bit integer)
DT_MT_CNT The count value (16-bit integer) per revolution may vary depending on the value set in
$DT_PG_PPR.
FI_CODE01 - 10 -1 to 32767 (16-bit integer) First fault display code #1 - #10
When fault occurred, the fault codes are stored in order of fault occurrences from first to
tenth. Below -1 are invalid data.
PR_CODE01 - 10 -1 to 32767 (16-bit integer) Preparation display code #1 - #10
When ready condition isn't met, the fault codes are stored in order of code number from
first to tenth. Below -1 are invalid data.
Table 3.2.35 Detected temperatures
Data name 1degC Functions
FIN_TMP_xn 1.0 (floating-point number) Cell inverter heatsink temperature (x = U, V & W n = 1 - 6) (Note 1)
FIN_TMP_FBK 1.0 (floating-point number) Cell inverter heatsink temperature average value (Note 1)
FIN_TMP_MAX 1.0 (floating-point number) Cell inverter heatsink temperature maximum value (Note 1)
FIN_TMP_MIN 1.0 (floating-point number) Cell inverter heatsink temperature minimum value (Note 1)
M_TMP_FLT 1.0 (floating-point number) Motor temperature
TR_TMP_FLT 1.0 (floating-point number) Input transformer cubicle temperature
PWB_TMP_FLT 1.0 (floating-point number) CTR board temperature
Difference between input transformer cubicle and CTR board temperature

TR_TMP_RISE 1.0 (floating-point number)
(TR_TMP_FLT - PWB_TMP_FLT)
(Note 1) Cell inverter heatsink temperatures (symbol of FIN_TMP_xx) are only showed collect value under the serial communication healty
(B_CCD_HLTY = 1). In addition, unused cell inverter temperatures are showed 0 degC.
Rev.S
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3.2.8 Transmission parameters

The followings are transmission parameters including common and specific setting by type.
3.2.8.1 Common transmission parameters
COMM_TYPE
Transmission selection
Limit:
Note: Initialize
Selects the type of transmission.
Signals are assigned to each bit. Set 1 to bits whose signals are used and set 0 to bits whose signals are not used.

F N.U. Not used
E EGD EGD board (ARND-4025)
D FAST S-NET board (ARND-8110) (High-speed version), DeviceNet board (ARND-8127),
S-NET board (ARND-8213) (High-speed version)
C LONG EGD CTR board (ARND-4044C) (32 bits)
B N.U. Not used
A TL20_8110 S-NET board (ARND-8110) (Standard version), MELPLAC board (ARND-8228),
PROFIBUS board (ARND-8225A), CC-Link board (ARND-8225B), Modbus-RTU board
(ARND-8225C)，ControlNet board (ARND-8225F)
9 DNET DeviceNet board (ARND-8127)
8 TCNET_B TC-net I/O F board (ARND-4027B)
7 N.U. Not used
6 ISBUS ISBus board (ARND-8204)
5 TL20_8213 S-NET board (ARND-8213)
4 TCNET TC-net I/O F board (ARND-4027A)
3 N.U. Not used
2 N.U. Not used
1 N.U. Not used
0 N.U. Not used
Rev.S
133
4GBF0632
(Setting Example)
COMM_TYPE Content
4000 H EGD board (ARND-4025)
0400 H S-NET board (ARND-8110) (Standard version), MELPLAC board (ARND-8228),
PROFIBUS board (ARND-8225A) CC-Link board (ARND-8225B), Modbus-RTU board
(ARND-8225C), ControlNet board (ARND-8225F)
2400 H S-NET board (ARND-8110) (High-speed version)
2200 H DeviceNet board (ARND-8127)
1000 H EGD CTR board (ARND-4044C) (32 bits)
0040 H ISBus board (ARND-8204)
0020 H S-NET board (ARND-8213) (Standard version)
2020 H S-NET board (ARND-8213) (High-speed version)
0010 H TC-net I/O F board (ARND-4027A)
0100 H TC-net I/O F board (ARND-4027B) (16 bits)
0000 H Transmission not used, EGD CTR board (ARND-4044) (16 bits)
FLG_HB_DOWN
Heartbeat down selection
Standard value: 0
Limit: 0-3
This parameter can change the detection of transmission failure 3 (transmission failure) with the heartbeat, as follows.
Setting Explanation
0 Heartbeat is not used for transmission fault 3 detection.
1 Heartbeat is used for transmission fault 3 detection. General purpose command bits CM_BUF1 and
CM_BUF2 are not latched when transmission fault 3 is detected.
CM_BUF2 are latched as 0 when transmission fault 3 is detected.
CM_BUF2 are latched as 1 when transmission fault 3 is detected.
[Related parameters] MSK_UV2, MSK_READY1, MSK_HFD2, TIME_HB_DOWN
TIME_HB_DOWN
Heartbeat down timer
Limit: 0.00 - 300.0 s
Sets the delay time to detect the transmission fault or PLC station failure when the heartbeat input by transmission does
not change.
[Related parameters] Valid when FLG_HB_DOWN = 1. MSK_UV2, MSK_READY1, MSK_HFD2
TIME_PWB_SYNC
PWB time synchronization timer
Standard value: 0 hour
Limit: 0 - 30000 hour
Sets the time interval, which overwrites network time or receives 1 time stamp at drive time, when using a TCNET_B
board or an EGD CTR board. Set 0 to not perform time synchronization.
[Related parameters] COMM_TYPE
TIME_TL_F
Transmission failure detection timer
Limit: 0.00 - 319.99 s
Sets the waiting time for detection of transmission initialization failure (TL_F2), transmission failure (TL_F3), and
drive-to-drive transmission failure (TL_F4). A count corresponds to 0.01 seconds. 500ms is the standard time applied
when TIME_TL_F = 0. If TIME_TL_F is not 0, the waiting time is equal to the TIME_TL_F value.
Rev.S
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SCAN_R_ADRS
Scan transmission receive data top address
Standard value: See table below
Limit: 0 - 1023
Note: Initialize
Specifies, by word, the top address of the dual port RAM in which scanned transmission received data is stored. The
adjustment value is determined for each station according to the transmission memory map. Set as follows according to
the transmission type.
Transmission type SCAN_R_ADRS setting Remarks
(No transmission) 0
TOSLINE-S20 (Standard transmission) 0 - 1023
TOSLINE-S20 (Fast type transmission) 0 - 127
ISBus 16 Fixed
DeviceNet 32 Fixed
PROFIBUS 32 Fixed
Modbus RTU 32 Fixed
MELPLAC 32 Fixed
EGD 32 Fixed
TC-net I/O 32 Fixed
CC-Link 32 Fixed
ControlNet 32 Fixed
SCAN_R_SIZE
Scan transmission receive data size
Limit: 0 - 10
Note: Initialize
Sets the size, to read the number of words following the “scanned transmission receive top address”.The adjustment
value is determined for each station according to the transmission memory map. Set as follows according to the
transmission type.
Transmission type setting Remarks
(No transmission) 0
TOSLINE-S20 (Drive-to-drive transmission applied) 1-6
TOSLINE-S20 (Drive-to-drive transmission not applied) 1 - 10
ISBus 10 Fixed
DeviceNet 4 Fixed
PROFIBUS 6 Fixed
Modbus RTU 10 Fixed
MELPLAC 8 Fixed
EGD 10 Fixed
TC-net I/O (Drive-to-drive transmission applied) 1-6 To receive 8 words, 2 remainder words are set
by drive-to-drive transmission parameters.
TC-net I/O (Drive-to-drive transmission not applied) 1-8
CC-Link 9 Fixed
ControlNet 10 Fixed
Rev.S
135
4GBF0632
SCAN_RCV01_AS - SCAN_RCV10_AS
Scan transmission receive data transfer destination
Limit:
Sets the “destination in” symbol to transfer data received through “the scanned transmission”. The receivable number of
data is set by SCAN_R_SIZE. The data of channels 1 to 6 is received from the main trunk line and the data of channels 7
to 10 are received from other drive units. See table on following page. Set as follows according to the transmission type.
This setting cannot be changed when units are operated.
Transmission type Parameters Settings Remarks

(No transmission) SCAN_RCV01_AS ~ DUST
SCAN_RCV10_AS
TOSLINE-S20 SCAN_RCV01_AS SERSEQDATA1, Select one of these according to serial
SERSEQDATA2, sequence to be used.
SERSEQDATA4
SCAN_RCV02_AS ~ Arbitrary symbols to transfer
SCAN_RCV06_AS data (DUST for no use)
SCAN_RCV07_AS ~ Arbitrary symbols to transfer For drive-to-drive transmission.
ISBus SCAN_RCV01_AS SERSEQDATA2
DeviceNet SCAN_RCV01_AS SP_REF1
(4W/4W mode) SCAN_RCV02_AS SERSEQDATA1
SCAN_RCV03_AS TENS_R1
SCAN_RCV04_AS Arbitrary symbols to transfer
data (DUST for no use)
SCAN_RCV05_AS ~ DUST Do not use.
SCAN_RCV10_AS
DeviceNet SCAN_RCV01_AS SERSEQDATA1
(4W/10W mode) SCAN_RCV02_AS ~ Arbitrary symbols to transfer
SCAN_RCV10_AS
PROFIBUS SCAN_RCV01_AS Arbitrary symbols to transfer In mode 4(TL_SELF_NO=4)
SERSEQDATA1 In mode 5(TL_SELF_NO=5)
SCAN_RCV10_AS
Modbus RTU SCAN_RCV01_AS ~ Arbitrary symbols to transfer
MELPLAC SCAN_RCV01_AS SERSEQDATA4
SCAN_RCV09_AS, DUST Do not use.
SCAN_RCV10_AS
EGD SCAN_RCV01_AS ~ Arbitrary symbols to transfer
TC-net I/O SCAN_RCV01_AS ~ Arbitrary symbols to transfer
SCAN_RCV09_AS, Arbitrary symbols to transfer For drive-to-drive transmission.
CC-Link
ControlNet
[Related parameters]COMM_TYPE, SCAN_R_SIZE
Rev.S
136
4GBF0632
SCAN_RCV01_GS - SCAN_RCV10_GS
Received data gain in scan transmission
Standard value: 0.0
Limit: -32767 - 32767
The conversion formula, to set the conversion gain of “received data” in the “scanned transmission”, is as follows:
Storage location of received data = Received data / SCAN_RCVn_GS (n = 1 - 10)
For example, if a speed reference is received with a weight of 25000 counts/100% and stored in SP_REF1 (1.0/100%),
then SCAN_RCVn_GS is set to 25000.
No conversion is made when 0 is set. (The same value as the received data is stored.) This setting cannot be changed
when units are operated.
When “received data” is stored in a 16-bit integer variable, the “received data” is directly stored regardless of the gain
setting.
SCAN_W_ADRS
Scan transmission send data top address
Limit: 0 - 1023
Note: Initialize
Specifies, by word, the top address of the dual port RAM in which “scanned transmission sent data” is stored.
The adjustment value is determined for each station according to the transmission memory map.
Set as follows according to the transmission type.
Transmission type SCAN_W_ADRS setting Remarks

(No transmission) 0
TOSLINE-S20 (Standard transmission) 0 - 1023
TOSLINE-S20 (Fast type transmission) 0 - 127
ISBus 0 Fixed
DeviceNet 0 Fixed
PROFIBUS 0 Fixed
Modbus RTU 0 Fixed
MELPLAC 0 Fixed
EGD board 0 Fixed
TC-net I/O 0 Fixed
CC-Link 0 Fixed
Control Net 0 Fixed
Rev.S
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SCAN_W_SIZE
Scan transmission sending data size
Limit: 0 - 25
Note: Initialize
Sets the size to write the number of words following the “scanned transmission sent top address”.
The adjustment value is determined for each station according to the transmission memory map.
Set as follows according to the transmission type.
Transmission type SCAN_W_SIZE setting Remarks

(No transmission) 0
TOSLINE-S20 1 - 10
ISBus 10 Fixed
DeviceNet (4W/4W mode) 5 Fixed
DeviceNet (4W/10W mode) 10 Fixed
PROFIBUS (6W/6W mode) 6 Fixed
PROFIBUS (10W/10W mode) 10 Fixed
Modbus RTU 1 - 25
MELPLAC 8 Fixed
EGD 10 Fixed
TC-net I/O (ARND-4026A, 4027A) 1-8
TC-net I/O (ARND-4026B, 4027B) 1 - 19
Modbus board 1 - 25
CC-Link 9 Fixed
ControlNet 10 Fixed
SCAN_WR01_AS - SCAN_WR25_AS
Scan transmission sending data
Limit:
Sets the symbol of data to be sent by “scanned transmission”. The quantity of data which can be transmitted is set by
SCAN_W_SIZE. Please see the following page.
Set as follows according to the transmission type:
32 bit intenger data setting is available in firmware 10A or later. The drive convert 32 bit data to 16 bit data and transmit it.
Set gains without overflow.
Rev.S
138
4GBF0632
Transmission type Parameters Settings Remarks

(No transmission) SCAN_WR01_AS - DUST
SCAN_WR19_AS
TOSLINE-S20 SCAN_WR01_AS SSEQ_OUT1, Select one of these according
SSEQ_OUT2, to serial sequence to be used.
SSEQ_OUT4
SCAN_WR02_AS - Arbitrary symbols to transfer
SCAN_WR10_AS data (DUST for no use)
SCAN_WR11_AS - DUST Do not use
SCAN_WR19_AS
ISBus SCAN_WR01_AS SSEQ_OUT2
SCAN_WR19_AS
DeviceNet SCAN_WR01_AS SP_F_OUT
(4W/4W mode) SCAN_WR02_AS SSEQ_OUT1
SCAN_WR03_AS DUST
SCAN_WR04_AS Arbitrary symbols to transfer
SCAN_WR05_AS T_R_OUT
SCAN_WR19_AS
DeviceNet SCAN_WR01_AS SSEQ_OUT1
(4W/10W mode) SCAN_WR02_AS - Arbitrary symbols to transfer
SCAN_WR19_AS
PROFIBUS SCAN_WR01_AS Arbitrary symbols to transfer In mode 4 (TL_SELF_NO=4)
SSEQ_OUT1 In mode 5 (TL_SELF_NO=5)
SCAN_WR19_AS
Modbus RTU SCAN_WR01_AS - Arbitrary symbols to transfer
MELPLAC SCAN_WR01_AS SSEQ_OUT4
SCAN_WR09_AS, DUST Do not use
SCAN_WR19_AS
EGD SCAN_WR01_AS - Arbitrary symbols to transfer
SCAN_WR19_AS
TC-net I/O SCAN_WR01_AS - Arbitrary symbols to transfer
(ARND-4026A, 4027A) SCAN_WR08_AS data (DUST for no use)
SCAN_WR09_AS, DUST Do not use
SCAN_WR19_AS
TC-net I/O SCAN_WR01_AS - Arbitrary symbols to transfer
(ARND-4026B, 4027B) SCAN_WR19_AS data (DUST for no use)
CC-Link SCAN_WR01_AS - Arbitrary symbols to transfer
ControlNet SCAN_WR01_AS - Arbitrary symbols to transfer
[Related parameters] COMM_TYPE, SCAN_W_SIZE
Rev.S
139
4GBF0632
SCAN_WR01_GS - SCAN_WR25_GS
Transmitted data gain in scan transmission
Standard value: 0.0
Limit: -32767 - 32767
The conversion formula, to set the conversion gain of transmitted data in “scanned transmission”, is as follows:
Transmitted data = Source of transmitted data × SCAN_WRn_GS (n = 1 - 25)
For example, if the speed feedback of SP_F (1.0/100%) is transmitted with a weight of 25000 counts/100%, SCAN_WRn_GS is
set to 25000. No conversion is made when 0 is set (the same value of data is sent).
When data, in a 16-bit integer variable, is sent, the data is directly sent regardless of the gain setting.
TL_CYC_TIME
Transmission cycle target time
Standard value: 21
Limit: 3 - 31
Note: Initialize
TOSLINE-S20 standard version: Select the desired value from the table below.
The time is the actually set target cycle time.
Setting Time [ms] Setting Time [ms] Setting Time [ms] Setting Time [ms]
3 3.07 9 9.22 15 15.4 26 41.0
4 4.10 10 10.2 21 20.5 27 45.1
5 5.12 11 11.3 22 24.6 28 49.2
6 6.14 12 12.3 23 28.7 29 49.2
7 7.17 13 13.3 24 32.8 30 57.3
8 8.19 14 14.3 25 36.9 31 61.4
TOSLINE-20 high-speed version, ISBus, DeviceNet, PROFIBUS, Modbus RTU, MELPLAC, EGD and TC-net I/O,
CC-Link, ControlNet: 21 (20.5 ms) fixed
Rev.S
140
4GBF0632
TL_PC_NO
Transmission line master station number
Standard value: 0
Limit: 0 - 64
Note: Initialize
Sets the station number, of the master transmission station. Set as follows according to the transmission type.
Transmission type TL_PC_NO setting Remarks

(No transmission) 0
TOSLINE-S20 1 - 64
ISBus 1 Fixed
DeviceNet 1 Fixed
PROFIBUS 1 Fixed
Modbus RTU 0 Not used
MELPLAC 0 Not used
EGD 0 Not used
TC-net I/O 0 Not used
CC-Link 0 Not used
ControlNet 0 Not used
TL_SELF_NO
Transmission line own station number.
Standard value: 0
Limit: 0 - 32767
Note: Initialize
Sets the station number of its own transmission station. Set as follows according to the transmission type.
Transmission type TL_SELF_NO setting Remarks
(No transmission) 0
TOSLINE-S20 1 - 64
(Standard transmission)
TOSLINE-S20 1-5
(Fast type transmission)
ISBus 1 - 31 Own station node number
DeviceNet 2 Fixed
PROFIBUS 4 6W/6W through mode
5 Sequence bit transmission mode
Modbus RTU 0 Not used
MELPLAC 0 - 127 Consecutive numbers which begin from 0,
i.e. 0,1,2...
EGD 0 Not used
TC-net I/O 0 Not used
CC-Link 0 Not used
ControlNet 0 Not used
Rev.S
141
4GBF0632
PRDATA_B0_AS - PRDATA_B15_AS
PROG_DATA bit input data address
Standard value: B_DUST
Limit:
Used to set a bit signal assigned to a bit 0 through 15 in the programmable word PROG_DATA.
SSEQ_OUT_B0_AS - SSEQ_OUT_B3_AS
Sequence output option bit input data address
Standard value: SSEQ_OUT_B0_AS: B_FLDR
SSEQ_OUT_B1_AS: B_FAULT
SSEQ_OUT_B2_AS: B_ALARM
SSEQ_OUT_B3_AS: B_MVD
Limit:
Used to set a bit signal assigned to an arbitrary bit of SSEQ_OUT_BIT0 through 3 in the sequence output SSEQ_OUT2.
FLG_SSEQ_RNTD
RNTD output signal select flag
Standard value: 0
Limit: 0, 1
Selects RNTD output of serial sequence output SSEQ_OUT1, 2 and 4.
Set 1 to output RNTD=1 even if the absolute external speed reference is lower than 1.5% in sensorless mode. If
FLG_SSEQ_RNTD=0, the output of RNTD is 0 when the absolute external speed reference is lower than 1.5% in sensorless
mode.
FLG_FAULT
Transmission fault automatic reset disabled
Standard value: 0
Limit: 0, 1
Set 1 to disable the operation, until the reset signal is received, after a transmission fault has occurred and even if the transmission
fault has been corrected.
When FLG_FAULT = 0, TL_F3 (transmission failure) and TL_F4 (transmission between drives failure) are the only detected
issues preventing operation, automatically reset after the transmission fault has been corrected.
[Related parameters] MSK_UV2, MSK_READY1, MSK_HFD2
Rev.S
142
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3.2.8.2 Common transmission parameters

TCNET_COM_IDX
Common reference block index
Data type: 16 bit integer
Standard value: 0
Limit: 0 - 20
Note: Initialization, Not used
Used to set an index for reference, to the inside of a common reference block, which is transmitted from a master station.
It is effective when FLG_DSCAN is set to 1.
[Related item]COMM_TYPE, TL_OP1_DT - TL_OP4_DT, TL_OP1_ST - TL_OP4_ST, SCAN_RCV07_AS - SCAN_RCV10_AS,
FLG_DSCAN
TCNET_DRV1_ND, TCNET_DRV2_ND
Drive-to-drive transmission drive node number
Standard value: 0
Limit: 0 - 255
Note: Initialize
Sets the node number (2 channels) of transmission, for the drive, when using the drive-to-drive transmission mode. Set 0 not
to use.
These parameters are valid when TC-net I/O E or F is used (COMM_TYPE=0010H).
Please use DNET_PRC_GAIN and DNET_PRC_GAIN2 instead of these parameters when substituting parameters for DeviceNet
(COMM_TYPE=0200H).
[Related parameters] COMM_TYPE, FLG_DSCAN
TCNET_HHLT_TM
High speed healthy check time
Standard value: 0 ms
Limit: 0 - 128 ms
Note: Initialize
Sets the timer of high speed healthy check timeout.
This parameter is valid when TC-net I/O E or F is used (COMM_TYPE=0010H).
Please use DNET_SP_SCALE, instead of this parameter, when substituting parameters for DeviceNet (COMM_TYPE=0200H).
[Related parameters] COMM_TYPE, TCNET_MHLT_TM
TCNET_MHLT_TM
Middle speed healthy check time
Limit: 0 - 30000 ms
Note: Initialize
Sets the timer for the “middle speed healthy check” timeout.
This parameter is valid when TC-net I/O F is used (COMM_TYPE=0010H).
Please use DNET_PRC_SCALE, instead of this parameter, when substituting parameters for DeviceNet (COMM_TYPE=0200H).
[Related parameters] COMM_TYPE, TCNET_HHLT_TM
Rev.S
143
4GBF0632
TCNET_MSCAN_TM
Middle speed scan time
Limit: 0 - 128 ms
Note: Initialize
Sets the update cycle of “middle speed” scan. When its own node is a slave, (TCNET_SYNC_ND=0) and the high speed
scan are used, set to 0.
Please use DNET_TR_SCALE instead of this parameter when substituting parameters for DeviceNet (COMM_TYPE=0200H).
[Related parameters] COMM_TYPE, TCNET_SYNC_ND
TCNET_OE_ND
OE loop node number
Standard value: 0
Limit: 0 - 255
Note: Initialize
Sets the “node number” of the O/E loop, which exists in higher rank. Set 0 to not use.
This parameter is valid when TC-net I/O E is used (COMM_TYPE=0010H).
Please use DNET_SERIAL_NO instead of this parameter when substituting parameters for DeviceNet (COMM_TYPE=0200H).
TCNET_SYNC_ND
Synchronize node selection
Standard value: 0
Limit: 0, 1
Note: Initialize
Own node becomes a slave by 0 and a master by 1.
Please use DNET_OPTION instead of this parameter when substituting parameters for DeviceNet (COMM_TYPE=0200H).
Rev.S
144
4GBF0632
3.2.8.3 EGD
EGD_CEID1
Primary consumed page exchange ID
Standard value: 0000 H (0001 H)
Limit: 0000 - 3FFF H
Sets the exchange ID of the primary received exchange (received from PLC).
This parameter is valid when EGD is used (EGD_RATE = not 0).
[Related parameters] EGD_CPID1, EGD_DEST, EGD_RATE, TIME_TL_F
EGD_CGRP1, EGD_CGRP2
Group number of the primary consumed exchange, Group number of the secondary consumed exchange
Standard value: 0
Limit: 0 - 32
Note: Initialize
(EGD_CGRP1)
Sets the group number (group of multicast) of the primary consumed exchange (received from PLC). The value of 0 indicates the
primary consumed exchange is not a group exchange, but a unicast or broadcast exchange.
[Related parameters] EGD_CEID1, EGD_CPID1, EGD_DEST, EGD_RATE, TIME_TL_F
(EGD_CGRP2)
Sets the group number (group of multicast) of the secondary consumed exchange (received from other drive). The value of 0
indicates the primary consumed exchange is not a group exchange, but a unicast or broadcast exchange.
This parameter is valid when EGD secondary consumed exchange is used (EGD_RPID2 = not 0).
[Related parameters] EGD_DEST, EGD_RATE, EGD_RPID2, TIME_TL_F
EGD_CPID1
ID of the remote producer for the primary consumed exchange
Limit: 00000001 - FFFFFFFE H
Sets the producer ID of the primary received exchange (received from PLC).
[Related parameters] EGD_CEID1, EGD_DEST, EGD_RATE, TIME_TL_F
EGD_DEST
Produced exchange destination
Limit:
Sets the destination IP address in the range of 00000021 - FFFFFFFF H.
EGD_DEST Exchange type and destination
00000000 H Broadcast exchange. Destination IP address is (IP address (TOOL_IP1 - 4) OR (NOT subnet
mask (TOOL_SUBNET_MSK 1 - 4))).
00000001 - Multicast exchange. Destination IP address is 224.0.7.1 - 32 according to the group number.
00000020 H
00000021 - Unicast exchange. The destination IP address is according to the contents of the parameter.
FFFFFFFF H Example: C0A80001 becomes 192.168.0.1
[Related parameters] EGD_CEID1, EGD_CPID1, EGD_RATE, TIME_TL_F
Rev.S
145
4GBF0632
EGD_GATEWAY
EGD board gateway
Limit:
Note: Initialize
Sets the gateway for Ethernet transmission of the EGD board.
[Related parameters] COMM_TYPE, EGD_IP, EGD_SUBNET_MSK
EGD_IP
EGD board IP address
Limit:
Note: Initialize
Sets the self IP address for Ethernet transmission of the EGD board.
[Related parameters] COMM_TYPE, EGD_GATEWAY, EGD_SUBNET_MSK
EGD_RATE
Produced page exchange rate
Limit: 0 - 32000 ms
Note: Initialize
Sets the rate of the produced exchange. When the EGD board is not used, the rate will be a multiple of 4 ms with a
minimum of 4 ms. When the EGD board is used, the rate will be a multiple of 1 ms with a minimum of 1 ms.
The actual rate is input into variable EGD_RATE_T.
Set 0 when EGD is not used.
If a transmission board except EGD board is used, then the EGD board is not used. Therefore, if COMM_TYPE is not
(0000H, 1000H, or 4000H) then the EGD board parameters are disabled.
[Related parameters] COMM_TYPE, EGD_CEID1, EGD_CPID1, EGD_DEST
EGD_RPID2
IP address of the remote producer of the secondary exchange
Limit: 00000000 - FFFFFFFE H
Note: Initialize
Sets the producer ID of the secondary exchange (received from other drive).
The value of zero indicates that no secondary exchange, is consumed and the primary exchange occupies all 10 words of
the received data for the scan receive address SCAN_RCV01_AS - SCAN_RCV10_AS. When the secondary exchange
is used, the first 8 words of the receive data, are taken from the first 8 words of the primary exchange. The last 2 words of
the receive data are taken from the last two words of the secondary exchange.
This parameter is valid when the EGD is used (EGD_RATE = not 0).
[Related parameters] EGD_DEST, EGD_RATE, SCAN_RCV01_AS - SCAN_RCV10_AS, TIME_TL_F
EGD_SUBNET_MSK
EGD board subnet mask
Standard value: 00000000 (FFFFFF00) H
Limit:
Note: Initialize
Sets the subnet mask for Ethernet transmission of the EGD board.
[Related parameters] COMM_TYPE, EGD_GATEWAY, EGD_IP
Rev.S
146
4GBF0632
3.2.8.4 Transmission between drives

FLG_DSCAN
Drive-to-drive transmission
Standard value: 0
Limit: 0, 1
Note: Initialize
To transmit data between drives, set to 1.
When using the drive-to-drive transmission, except for TOSLINE-S20 and TC-net I/O transmission, set to 0 because the
drive-to-drive transmission is not supported.
When using the EGD board, set to 0.
[Related parameters] COMM_TYPE, TL_OP1_DT - TL_OP4_DT, TL_OP1_ST - TL_OP4_ST, SCAN_RCV7_AS -
SCAN_RCV10_AS
TL_OP1_DT - TL_OP4_DT
Drive-to-drive transmission memory map address
Standard value: 0
Limit: 0 - 1023
Note: Initialize
Sets the addresses (4 channels) of the transmission memory map, to obtain data, when using the drive-to-drive
transmission mode.
Unless this setting and the transmitting station (TL_OP1_ST - TL_OP4_ST) are set, the drive-to-drive transmission
function will not work. In addition, the transfer destination setting is made with SCAN_RCV07_AS - SCAN_RCV10_AS.
The Drive-to-drive transmission is available with TOSINE-S20 and TC-net I/O only. Set to 0 when using the drive-to-drive
transmission except when using the TOSLINE-S20 and TC-net I/O.
The drive-to-drive transmission of TC-net I/O is two channels. TC_OP1_DT and TC_OP2_DT are used for the PLC
transmission, and TC_OP3_DT and TC_OP4_DT are used for the drive-to-drive transmission. When receiving 8 words in
the PLC transmission, set TL_OP1_DT=38 and TC_OP2_DT=39. When receiving transmission data 0-7, of the drive
node number 1 (TCNET_DRV1_ND), in the drive-to-drive transmission, set 48 - 55 to TL_OP3_DT and TC_OP4_DT.
When receiving transmission data 0-7 of the drive node number 2 (TCNET_DRV2_ND), set 56 - 63 to TL_OP3_DT and
TC_OP4_DT.
[Related parameters] COMM_TYPE, TL_OP1_DT - TL_OP4_DT, SCAN_RCV07_AS - SCAN_RCV10_AS, FLG_DSCAN
TL_OP1_ST - TL_OP4_ST
Drive-to-drive transmission sending station
Standard value: 0
Limit: 0 - 64
Note: Initialize
Sets the station number (4 channels) to obtain data when using the drive-to-drive transmission mode.
Unless this setting and the memory map address (TL_OP1_DT - TL_OP4_DT) are set, inter-drive transmission function will not
work. In addition, the transfer destination setting is made with SCAN_RCV07_AS - SCAN_RCV10_AS.
Drive-to-drive transmission is available only with TOSLINE-S20 and TC-net I/O. Set 0 in case of using the transmission
except TOSLINE-S20 and TC-net I/O.
The drive-to-drive transmission of TC-net I/O is two channels. TC_OP1_ST and TC_OP2_ST are used for the PLC
transmission, and TC_OP3_ST and TC_OP4_ST are used for the drive-to-drive transmission. Set 2 to the channel used,
and set 0 to the channel not used.
[Related parameters] COMM_TYPE, TL_OP1_DT - TL_OP4_DT, SCAN_RCV07_AS - SCAN_RCV10_AS, FLG_DSCAN
Rev.S
147
4GBF0632
3.2.8.5 DeviceNet
CS_CURR_SCALE
DeviceNet Transmission current scale
Standard value: 10
Limit:
Note: Initialize
Sets the DeviceNet transmission current scale.
Scale 2 CS _ CURR _ SCALE
(Standard value)
In case of 500 kVA
Ratedcurrentpeakvalue 656 2 928 210
Because this setting is the rated current peak value [A], set to 10.
CS_VOLT_SCALE
DeviceNet transmission voltage scale
Standard value: 0 (13)
Limit:
Note: Initialize
Sets the transmission voltage scale.
Scale 2 CS _ VOLT _ SCALE
13
When the rated voltage is 6600 V, set to 13 because of 6600 < 2 .
DNET_BAUD
DeviceNet transmission baud rate
Standard value: 0
Limit: 0-2
Note: Initialize
Set as follows:
DNET_BAUD Transmission baud rate [kbps]
0 125
1 250
2 500
DNET_CODE
DeviceNet transmission code setting
Standard value: 0
Limit: 0-2
Note: Initialize, Not used
Rev.S
148
4GBF0632
DNET_M_MACID, DNET_MACID
DeviceNet Transmission master MAC ID, DeviceNet Transmission MAC ID
Standard value: 0
Limit: 0 - 63
Note: Initialize
(DNET_M_MACID)
Sets DeviceNet Transmission master MAC ID. This is fixed to 0.
(DNET_MACID)
Sets the DeviceNet transmission MAC ID.
DNET_OPTION
DeviceNet Transmission option setting
Limit: 0, 1
Note: Initialize
Set 0 to disable the operation until the reset signal is received after a transmission fault has occurred, in DeviceNet, and even if the
transmission fault has been corrected.
DNET_PRC_GAIN, DNET_PRC_GAIN2
DeviceNet Transmission process input gain (DNET_PRC_GAIN), DeviceNet Transmission process output gain
(DNET_PRC_GAIN2)
Limit:
Note: Initialize
Set the transmission process input gain and transmission process output gain.
In 4W/4W mode, the transmission data is converted by the equations below
DNET _ PRC _ GAIN
Transmission receiving data 30000 PROCESS _ REF 30000
Scale
Scale
PROCESS _ OUT 32000 Transmission sending data 32000
DNET _ PRC _ GAIN2
Scale 2 DNET _ PRC _ SCALE
PROCESS_REF: Process Input
PROCESS_OUT: Process Output
In 4W/10W mode, set 1 because these configurations are not used.

[Related parameters] COMM_TYPE, DNET_PRC_SCALE
Rev.S
149
4GBF0632
DNET_PRC_SCALE
DeviceNet Transmission process scale
Standard value: 0
Limit:
Note: Initialize
Sets the transmission process scale.
Scale 2 DNET _ PRC _ SCALE
In 4W/4W mode, this scale should be set so that the process output and input data are within the range of -32768 - 32767.
In 4W/10W mode, set 0 because process scale cannot be used.
DNET_RD_AS
DeviceNet Transmission monitor address setting
Standard value: 0
Limit:
Note: Initialize, Not used
DNET_SERIAL_NO
DeviceNet Transmission serial number
Standard value: 0
Limit: 0 - 32767
Note: Initialize
Sets the transmission serial number of the DeviceNet PWB(Power Board).
DNET_SP_SCALE
DeviceNet Transmission speed scale
Limit: -128 - 127
Note: Initialize
-1
Sets the scale of the transmission speed [min ].
In 4W/4W mode, transmission data are converted by the equations below. This scale should be set so that the transmission data
-1
are in the range of limit. Transmission output data are values of SP_F converted to [min ] and scaled (×scale) by this parameter
value.
Transmission gain
SP _ REF1 30000 Transmission input data 30000
Scale
Scale
Transmission output data 32000 SP _ F 32000
Transmission gain
25000 10
Transmission gain
CS _ MOTOR _ RPM
Scale 2 DNET _ SP _ SCALE
-1
CS_MOTOR_RPM: Motor rated speed [min ]
SP_F: Speed feedback [25000/100%]
SP_REF1: Speed reference [25000/100%]
In 4W/10W mode, set 0 because this configuration is not used.

Rev.S
150
4GBF0632
DNET_TR_SCALE
DeviceNet Transmission torque scale
Limit: -128 - 127
Note: Initialize
Sets the scale of the transmission torque[N･m].
In 4W/4W mode, transmission data converted by the equations below. Set the scale so that transmission data to be in the range of
limit. Transmission output data are values of T_R converted to [N･m] and scaled (×scale) by this parameter value.
Transmission gain
TENS _ R1 30000 Transmission input data 30000
Scale
Scale
Transmission output data 32000 T_R 32000
Transmission gain
4 CS _ MOTOR _ RPM CS _ SP _ BASE
Transmission gain
974 MA _ MOTOR _ KW 9.8
Scale 2 DNET _ TR _ SCALE
-1
CS_MOTOR_RPM: Motor rated speed [min ]
CS_SP_BASE: Base speed [1000/100%]
MA_MOTOR_KW: Motor rated output [kW]
T_R: Torque reference [4000/100%]
TENS_R1: Tension control torque reference [4000/100%]
In 4W/10W mode, set 0 because this configuration is not used.

Rev.S
151
4GBF0632
3.2.9 Speed sesor

A Pulse Generator (PLG) or a resolver can be selected for speed feedback. Speed control with a Tachogenerator (TG)
is not provided because its performance is inferior to the PLG’s performance.
3.2.9.1 Pulse Generator - PLG

A signal is detected from a 2-phase PLG attached to the motor and converted to a speed.
Detection is basically performed according to the pulse number measurement system. This system converts a signal to a
speed based on the fact that the pulse number input, in a period (1ms), is proportional to the speed.
Since, in this system, the pulse signals from the PLG do not change at an extremely low speed, or 0 speed, stable speed
detection is not possible. Use a resolver when it is necessary to operate the equipment for such a purpose (passing 0
speed in reverse operation has no problem).
Pulse signal Count 1.0/100%
PGA-F Speed detection SP_F

Speed detection
Pulse count measurement
Rotation direction detection

0 detection
CS_RES_TYPE = 1
PGB-F CS_RES_PGFLT (factory setting)
CS_PGOUT = 0
CS_PGCNT = 256 (PG pulse count)
Fig 3.2.7 PLG Speed Detection
There are three PLG types, differential type, single-end (totem pole) type, and single-end (open collector) type. The connection
way, the jumper setting of XIO board, and the parameter settings for each PLG are different.
Differential type Single-end type

Totem pole type Open collector type
SW4-6: SW4-6: SW4-6:

OUTSIDE OUTSIDE INSIDE
PLG XIO board PLG XIO board PLG XIO board

Vcc Vcc Logic H Vcc Vcc Vcc Vcc
ARND-4045 ARND-4045 ARND-4045
@upper Tr ON
TB2-15 Vcc TB2-15 TB2-15 Vcc
TB2-16 TB2-16 TB2-16
Logic H Logic H
@A=Vcc @Tr ON PC
A PGIA1 A PGIA1 A PGIA1
TB2-17(*1) TB2-17(*1) TB2-17(*1)
PC PC
A~ PGIA2 GND PGIA2 GND PGIA2
TB2-18(*2) TB2-18(*2) TB2-18(*2)
(The same connection for B-ph, Z-ph) (The same connection for B-ph, Z-ph) (The same connection for B-ph, Z-ph)
Parameter: FLG_DIFF_PG=1 Parameter: FLG_DIFF_PG=0 Parameter: FLG_DIFF_PG=0
FLG_SNGPG_TYPE=0 FLG_SNGPG_TYPE=1 FLG_SNGPG_TYPE=0
(*1): TB2-19, TB2-21 for B-ph, Z-ph respectively.

(*2): TB2-20, TB2-22 for B-ph, Z-ph respectively.
Fig 3.2.8 Connection for each PLG type
Rev.S
152
4GBF0632
Example of connection (Differential motion type)

Select the number of PLG output pulses [P/rev] so the PLG output pulse frequency, at the maximum speed, satisfies the
following formula. Care should be made not to go beyond the range of the PLG, because the drive control will fail to recognize the
pulses.
-1
3.3[kHz] (Motor rated speed [min ] / 60) × Number of PLG pulses [P/rev] 100.0[kHz]
When the PLG type is used as the speed sensor, the number of PLG output pulses can select any of the same value with the
number of pulses of the speed sensor, and divided values of 1/2, 1/4, 1/8, 1/16 of the setting of [FLG_PGOUT_PPR].
+15V +5V PGZ PGA PGB

Jumper
0V
setting
XIO
TB2-32
TB2-15
TB2-16
TB2-22
TB2-21
TB2-18
TB2-17
TB2-20
TB2-19
(ARND-4045)
+15V 0V
or +5V PLG
Fig 3.2.9 PLG interface
For wiring with PLG, use the following cable.

2
Cable specification: Twist pair, 1.25mm , 4 pairs, with an integrated shield of copper tape.
2
(Ex.: KMPEV-S(Cu) (4P-1.25mm ) Showa Densen Co., or equivalent product)
2
Outside Japan, cable of 1.25mm is not available, and shielded products other than copper tape are marketed, thus the following
specification is recommended.
2
Cable specification (IEC): Twist pair, 1. 5mm , 4 pairs, with an integrated shield of copper or aluminum tape.
Rev.S
153
4GBF0632
CS_PGCNT
PLG input pulse count
Standard value: 64 P/rev
Limit: 64 - 100000 P/rev
Sets the input pulse count per revolution of PLG pulse input.
When the PLG pulse input is to be speed feedback, assume CS_PGOUT = 0.
Select a pulse count so that the maximum frequency will be 10 kHz or less.
Setting of CS_PGCNT is ignored in using no PLG.
PLG for this drive should be under 8192 P/rev. And its pulse number need not to be exponentiation of 2.
[Related parameters] CS_PGOUT
FLG_DIFF_PG
Differential PLG open-circuit detection changeover flag
Standard value: 0 (to use single-ended PLG, resolver or sensorless)
1 (to use differential PLG for general applications)
3 (to use differential PLG for application in connection with safety, such as crane hoist)
Limit: 0-4
Note: Initialize
Changes PLG type (Differential type / Single-end type) for using PLG as speed detector.
Also changes the mode of PLG open-circuit detection.
When single-end PLG is used, select output type (open collector / totem pole) of single-end PLG by parameter
FLG_SNGPG_TYPE.
Setting PLG type Condition
Speed feedback failure caused by open-circuit etc. is detected by software.
0 Single-end PLG open-circuit detection by hardware (TACH_F) is not used.
Select this setting to use single-ended PLG, resolver or sensorless.
PLG open-circuit detection by hardware (TACH_F) is used.
1 Differential Speed feedback failure detection by software is not used.
Speed feedback value is latched during detecting TACH_F.
Speed feedback failure detection by software is not used.
2 Differential
Speed feedback value is not latched during detecting TACH_F.
(This setting not recommended, use 1)
3 Differential And speed feedback failure detection by software is also used.
Speed feedback value is latched during detecting TACH_F.
And speed feedback failure detection by software is also used.
4 Differential
Speed feedback value is not latched during detecting TACH_F.
(This setting not recommended, use 3)
FLT_QPG
QPG filter
Limit: 0.0 - 1024.0 rad/s
Sets the filter time constant applied to the PLG pulse counter. When not using the pulse counter, set to 0.0rad/s.
FLG_SNGPG_TYPE
Single end PLG type flag
Standard value: 0
Limit: 0-1
Note: Initialize
Sets the applied single end PLG type. When not using the single end PLG, set to 0.
0: Open collector type
1: Totem pole type
Rev.S
154
4GBF0632
FLG_PGOUT_PPR
Reducing the number of PLG output pulses on using PLG
Standard value: 0
Limit: 0-4
Note: Available firmware 05D or later
When the PLG is used, “the number of entering PLG pulses” / “the number of generating PLG pulses” is set.
Ratio of the number of input PLG pulses to the

FLG_PGOUT_PPR
number of output PLG pulses
0 1:1
1 2:1
2 4:1
3 8:1
4 16:1
[Related parameters] CS_PGOUT
PG_POS_SFT
PG_POS dividing ratio
Standard value: 0
Limit: 0-4
Sets the tie dividing ratio of the PLG counter PG_POS. For a dividing ratio of 1 / 11, PG_POS varies by 1 count at every change
in the PLG pulse.
PG_POS_SFT Dividing ratio of PG_POS

0 1/1
1 1/2
2 1/4
3 1/8
4 1/16
Rev.S
155
4GBF0632
3.2.9.2 Resolver
A resolver is a sensor that detects the rotating angle (position) of the motor. This resolver converts changes in position
into speed signals at periodic intervals.
Two types of resolvers are available, 1x type and 4x type.
(1) 1x type
This type of resolver detects one electrical rotation as the motor performs one revolution. This resolver is used for relatively
high-speed motors.
(2) 4x type
In this resolver, the number of resolver phases is increased. This resolver detects one electrical rotation as the motor
-1
performs a quarter(1/4) turn. This resolver is used for low-speed motors (300 min or less).
SP_F
Oscillation Position detection circuit d/dt
circuit
0 detection
1 kHz
Detection circuit Frequency VCO

difference
detection circuit
Excitation
circuit 1 kHz
A B C D E F G H
S1 S3 S2 S4 R1 R3 R2 R
Resolver TS2118N24E10, 4 X type
Fig 3.2.10 Resolver Speed Detection
4x type 1x type
300 1500 2250 min-1
Fig 3.2.11 Selection standard of 1x and 4x
Rev.S
156
4GBF0632
When the high-performance vector control (option) is specified, a resolver is connected to this equipment. An optimal type is
selected depending on the rated motor RPM from those shown in Table 3.2.36. (Either 1 kHz excitation or 4 kHz excitation)
Table 3.2.36 Resolver Types

Rated RPM
-1
Type -1 300 min or more and
300 min or less -1
2000 min or less
(4x)
Manufacture: TAMAGAWA (1x)
SEIKI CO., LTD Wiring Wiring
Model Model
Fig 3.2.12 Fig 3.2.12
Flange type TS2118N24E10N a TS2118N21E10N b
Stationary type c TS2113N21E10N d
TS2113N24E10NL
L
Pancake type TS2025N304E10 e TS2025N301E10 E
TS2025N374E10 f TS2025N371E10 f
The cable and wiring of the resolver may vary depending on the type of the resolver. For typical wiring, see Fig 3.2.12. Always
use the cables specified in Table 3.2.37. If recognized wire by IEC is used, apply a cable the same as the wire shown on Table
3.2.37, for example, Multi stranded conductor copper core, PE insulated, PCC sheathed, copper tape wrapped shielded, twisted
2
pair cable (4pairs x 1.5mm ).
Additionally, the wiring is particularly vulnerable to noise. Always pay special attention so that the cables are separated
sufficiently from the main circuit and wire bundling duct. The motor rotating direction and speed feedback polarity can be set using
the parameters of the equipment. Therefore, never change the feedback polarity by changing the resolver wiring.
Table 3.2.37 Specified Cables for Resolver
Manufacturer Specification No. Cable specifications

Showa Densen 2
WS82-1066 KMPEV-CU 4 P × 2 mm
Fujikura 2
II-35122 (TPK88-1001) IPEV-S (Cu) 4 P × 2 mm
Furukawa Denko 2
HT-880320 (TPK88-2001) KPEV-S (Cu) 4 P × 2 mm
Mitsubishi Denko 2
BST-89112 SPEV (Cu) 4 P × 2 mm
Hitachi Densen 2
SP20-23768A KPEV-S (Cu) 4 P × 2 mm
Sumitomo Denko 2
No. 3-23968 JKEV-S 4 P × 2 mm
Nishinihon Densen 2
DK-89144 JKPEV-SCT 4 P × 2 mm
Table 3.2.38 shows the relationship between the equipment parameter setting and rotating direction.
Table 3.2.38 Rotating Direction Settings

Rotating direction when the power is supplied to R CW CCW*1
-> S-> T of the motor in that order (for reference)
FLG_WVU 0 1
Rotating direction when the CW CCW CW CCW
positive speed reference is applied
Polarity of CS_MOTOR_RPM + - + -
*1) Counter Clock Wise (CCW) rotation can be obtained by supplying power in the order of R->S->T with
wiring connection between equipment and motor in reverse but do not use this way to avoid confusion.
CW (Clockwise): Clockwise viewed from the opposite side of motor load
CCW (Counter-clockwise): Counter-clockwise viewed from the opposite side of motor load
When the directional setting is changed, make sure to initialize the system (turn on and then off the MCCB “CONTROL”) to make
the new setting effective.
Rev.S
157
4GBF0632
ARND-4045B ARND-4045B
Exsin EXcos Sin cos Exsin EXcos Sin cos
TB2-32
TB2-30
TB2-29
TB2-28
TB2-27
TB2-24
TB2-23
TB2-26
TB2-25
TB2-32
TB2-30
TB2-29
TB2-27
TB2-28
TB2-23
TB2-24
TB2-26
TB2-25
Resolver Resolver
Relay Relay
Terminal Bl Wh Ye Wh Gr Wh Re Wh Terminal Bl Wh Ye Wh Gr Wh Re Wh
B D F H B D F H
A C E G A C E G
S1 S3 S2 S4 R1 R3 R2 R4 S1 S3 S4 S2 R1 R3 R4 R2
Resolver TS2118N24E10 4x type Resolver TS2118N21E10 1x type
a)TS2118 series (flange type) 4x b)TS2118 series (flange type) 1x

TB2-32
TB2-30
TB2-29
TB2-28
TB2-27
TB2-24
TB2-23
TB2-26
TB2-25
TB2-32
TB2-30
TB2-29
TB2-28
TB2-27
TB2-24
TB2-23
TB2-26
TB2-25
2 4 6 8 2 4 6 8
1 3 5 7 1 3 5 7
c)TS2113 series (stationary type) 4x d)TS2113 series (stationary type) 1x

TB2-32
TB2-30
TB2-29
TB2-28
TB2-27
TB2-24
TB2-23
TB2-26
TB2-25
TB2-32
TB2-29
TB2-30
TB2-28
TB2-27
TB2-23
TB2-24
TB2-26
TB2-25
B D F H B G J D
A C E G A F H C

TS2025N301E10 1x type TS2025N371E10 1x type
e)TS2025N30X series (pan-cake type) f)TS2025N37X series (pan-cake type)
Fig 3.2.12 Type and Wiring of Resolvers
Rev.S
158
4GBF0632
CS_PGOUT
PLG output pulse count
Standard value: 0 P/rev
Limit: 0 - 4096
Sets the output pulse count per revolution of the PLG pulse output.
This parameter combines the resolver selection flag. When the resolver is used as a speed sensor, even if the PLG pulse
output is not used, set the values to other than 0.
To use the PLG, set zero.
When the resolver for speed measurement is not used in sensorless control, set to zero too.
When CS _ PG _ OUT 0 , the speed feedback from the resolver is converted to the PLG pulse before being
externally output.
When CS_PGOUT=0, the pulse of the same frequency as the PLG input pulse can be output, and also 1/2, 1/4, 1/8 and
1/16 times frequency of PLG input pulse. Frequency division ratio can be set by FLG_PGOUT_PPR.
Both the resolver and the PLG cannot be used at the same time.
CS_PGOUT Output Pulse [P/rev]

CS_RES_TYPE (The number of resolver poles)
4 1
4096 4096 64
2048 2048 64
1024 1024 1024
512 512 512
256 256 256
128 256 128
64 256 64
0 PG or speed sensor-less
(Do not use the value for resolver use)
Other than above 256 64
[Related parameters] CS_PGCNT
CS_RES_DGFLT
R/D conversion position detection signal filter time constant
Standard value: 1000 µs
Limit: 125 - 16000 µs
Note: Initialize
Sets the digital filter time constant of the position detection signal by R/D conversion.
CS_RES_DGFLT Filter time constant [µs]

16000 16000
8000 8000
4000 4000
2000 2000
1000 1000
500 500
250 250
125 125
Other than above 125
Rev.S
159
4GBF0632
CS_RES_TYPE
Number of resolver poles
Standard value: 1
Limit: 0-4
Note: Initialize
Sets the number of poles of the resolver.
1 = 1x resolver
4 = 4x resolver
Others = 4x resolver
When the PLG is used as a speed sensor or sensorless mode is used, set to 1.
When using the (4x) resolver, please do not use resolver off-center clear P1 and P2 phase adjust gains.
When CS_RES_TYPE = 4, Set OP_RDCMP_G1 = 0
OP_RDCMP_G2 = 0
FLG_RES_EX4
4kHz excitation resolver selection flag
Standard value: 0
Limit: 0, 1
Note: Initialize
When using a 4kHz excitation resolver, set to 1.
OP_RCMODE1, OP_RCMODE2
Resolver eccentricity elimination P1 frequency coefficient, Resolver eccentricity elimination P2 frequency coefficient
Standard value: 0
Limit: 0-8
Sets how many times higher than the frequency of speed feedback signal to delete ripples.
1 count corresponds to one-fold.
OP_RDCMP_G1, OP_RDCMP_G2
Resolver off-center clear G1 phase adjust gain, Resolver off-center clear G2 phase adjust gain
Standard value: 0
Limit: -32767 - 32767
(OP_RDCMP_G1)
Sets the gain to clear the off-center of the same frequency component as the speed.
This gain is effective when using (1x) resolver. Please do not use this gain when using the (4x) resolver.
When CS_RES_TYPE = 4, set OP_RDCMP_G1 = 0.
[Related parameters] OP_RDCMP_P1, OP_RDCMP_G2, OP_RDCMP_P2
(OP_RDCMP_G2)
Sets the gain to clear the off-center of the frequency component twice the speed.
This gain is effective when using the (1x) resolver. Please do not use this gain when using the (4x) resolver.
When CS_RES_TYPE = 4, set OP_RDCMP_G2 = 0.
[Related parameters] OP_RDCMP_P1, OP_RDCMP_G1, OP_RDCMP_P2
OP_RDCMP_P1, OP_RDCMP_P2
Resolver off-center clear P1 phase adjustment, Resolver off-center clear P2 phase adjustment
Standard value: 0.0 deg
Limit: -359.9 - 359.9 deg
(OP_RDCMP_P1)
Phase adjustment setting to clear the off-center of the same frequency component as the speed.
[Related parameters] OP_RDCMP_G1, OP_RDCMP_G2, OP_RDCMP_P2
(OP_RDCMP_P2)
Phase adjustment setting to clear the off-center of the frequency component twice the speed.
[Related parameters] OP_RDCMP_P1, OP_RDCMP_G1, OP_RDCMP_G2
Rev.S
160
4GBF0632
3.2.9.3 Speed pulse signal output (single end type)

When the resolver or PLG is used, the speed signal can be output as a pulse signal. (These pulse signals cannot be output in
the sensorless vector control) The figure below shows the PLG pulse output circuit.
The power for the pulses is supplied from an external power supply. Prepare this external power supply with a range of 12 V to
24 V.
The PLG pulse output consists of two phases, PGA and PGB. When the motor rotates in the normal direction, the pulse has
90 -advance phase. The pulse signals (power supply level supplied from outside) are insulated from the control power supply in
the equipment through a photo-coupler.
The pulse output count per motor revolution can be set as follows:
At this time, make the settings so that the pulse count at 100% speed does not exceed 100 kHz. If it exceeds 100 kHz, this may
cause the pulses not to be transmitted.
(1) 1x type resolver is used.

CS_RES_TYPE = 1
CS_PGOUT: Any of 64, 128, 256, 512, and 1024 is set.
-1
<Example> when the 100%-speed is 1800 min .
CS_PGOUT is determined so that (1800/60) x CS_PGOUT 100000 is satisfied.
CS_PGOUT 100000/ (1800/60) = 3333
Therefore, CS_PGOUT = 1024.
(2) 4x type resolver is used.
CS_RES_TYPE = 4
CS_PGOUT: Any of 256, 512, 1024, 2048, and 4096 is set.
-1
<Example> When the 100%-speed is 400 min .
CS_PGOUT is determined so that (400/60) x CS_PGOUT 100000 is satisfied.
CS_PGOUT 100000/ (400/60) = 15000
Therefore, CS_PGOUT = 4096.
(3) When PLG is used.
CS_RES_TYPE = 1 (Always set this value to ”1”.)
CS_PGOUT = 0 (Always set this value to ”0”.)
The number of output pulses can be generated by dividing the number of input pluses through the setting of
FLG_PGOUT_PPR.
If the above setting is changed, always initialize the equipment (turn off the control power supply MCCB ”CONTROL”,
and turn it on again) to make the newly set data valid.
PGA PGB PGZ
XIO
TB2-7
TB2-8
TB2-9
TB2-10
TB2-11
TB2-12
TB2-13
TB2-14
(ARND-4045)
+12V~24V 0V
PLG
Fig 3.2.13 Speed Pulse Signal Output Circuit
Rev.S
161
4GBF0632
3.2.10 Temperature detection
3.2.10.1 Motor temperature detection

Motor temperature detection responds to a platinum temperature sensor or RTD unit type. The selection of temperature detection
type is given by the set value FLG_MTMP_SE.
The input transformer and the motor temperature detection of the using Pt1000 can not be used at the same time. In the case of
this drive, the temperature detection using the Pt1000 is used for the input transformer. For this reason, the Pt100 with RTD unit
is used normally for motor temperature detection. (FLG_MTMP_SEL = 1)
(1) Platinum temperature sensor (ST-3A type, 1 k ): Pt1000

The figure below shows the motor temperature detection circuit. The motor temperature is detected by the platinum
temperature sensor (platinum resistor) installed inside the motor. The voltage signal sent from the platinum
temperature sensor, which is read through the external terminal circuit board, is converted into a digital value by the
special A/D converter. This digital value is used to protect the motor from being overheated, compensate variations
in secondary resistance of the motor (R2 compensation: optional) caused by temperature change, and provide the
motor temperature data to external units (through the optical transmission).
When an RTD unit is not used, the resistance of the platinum temperature sensor is approximately 1 k .
(2) RTD unit: Pt100

If a platinum resistor sensor (100 ) is used as temperature sensor, it is absolutely necessary to mount a RTD unit (optional).
Since the working voltage range of the motor temperature detection circuit is 0 to 5V, the temperature detection range of the
RTD unit must be set so that the assumed temperature range is included in the working voltage range.
XIO Board CTR Board

ST-3A Temp. sensor, ARND-4045 ARND-4044
about 1k TB2-5
TB2-6
Temp. sensor 100 A/D

TB1-15
TB1-16 RTD Unit
Fig 3.2.14 Motor Temperature Detection Circuit
MTMP_PT_RMAX, MTMP_PT_RMIN
200 C PT resistance (MTMP_PT_RMAX), 0 C PT resistance (MTMP_PT_RMIN)
Standard value: (MTMP_PT_RMAX) 1688
(MTMP_PT_RMIN) 1000
Limit: (MTMP_PT_RMAX) 0 - 10000
(MTMP_PT_RMIN) 0 - MTMP_PT_RMAX
Sets the PT resistance value for temperature detection at 200 C and 0 C, respectively.
This is valid when FLG_MTMP_SEL is 0 (PT mode).
[Related parameters] FLG_MTMP_SEL, MTMP_RTD_MAX, MTMP_RTD_MIN
MTMP_RTD_MAX, MTMP_RTD_MIN
RTD unit 5V output temperature (MTMP_RTD_MAX), RTD unit 0V output temperature (MTMP_RTD_MIN)
Standard value: (MTMP_RTD_MAX) 200.00 C
(MTMP_RTD_MIN) 0.00 C
Limit: -1000 – 1000 C
Sets the motor temperature when the RTD unit outputs 5 V and 0 V, respectively.
Valid when FLG_MTMP_SEL = 1 (RTD mode).
[Related parameters] FLG_MTMP_SEL, MTMP_PT_RMAX, MTMP_PT_RMIN
Rev.S
162
4GBF0632
FLG_MTMP_SEL
Motor temperature detection method selection flag
Standard value: 1
Limit: 0, 1
When using Pt as motor temperature detection method, set to 0 and when using RTD, set to 1.
When 2 is set to FLG_MTMP_SEL, the value of the symbol set to MTMP_AS is sent to M_TMP.
It is standardly set to 1. The setting is for the temperature detection of an input transformer instead of temperature detection of a
motor by using Pt1000.
The RTD is available for detecting the transformer temperature by the setting. (Available firmware 04B or later)
Motor Transformer
FLG_MTMP_SEL Note
temperature temperature
0 Pt1000 RTD Available firmware 04B or later
Standard setting
1 RTD Pt1000 Motor : Option
Transformer : Standard
MTMP_AS
2 RTD Available firmware 04B or later
(Address setting)
Fig 3.2.15 Motor Temperature Selection
Rev.S
163
4GBF0632
MTMP_AS
Motor temperature address
Limit:
Sets the symbol of the value input to M_TMP when FLG_MTMP_SEL is 2.
P24
TB1-32
TB1-17
Z24 General analog input 1

Temp. sensor 100Ω +24V 0V TB2-1 AIN1_F
RTD Unit A/D

TB2-2
Option unit XIO Board CTR Board

ARND-4045 ARND-4044
Fig 3.2.16 Motor Temperature Detection Circuit by RTD unit

(Setting method)
When inputting general analog input 1 (AIN1_F) to M_TMP, sets as follows.
FLG_MTMP_SEL=2
MTMP_AS=AIN1_F
AIN1_GS=T10V-T0V
AIN1_OS=T0V
T10V: The temperature [deg C] when a RTD unit outputs 10 V
When the maximum output voltage of a RTD unit is 5 V, the temperature of 10 V is calculated by conversion.
(ex.) When 5 V is output at 100 deg C, T10V = (5 V / 100 deg C) x 10 V = 200 deg C
T0V: The temperature [deg C] when a RTD unit outputs 0 V
Rev.S
164
4GBF0632
3.2.10.2 Input transformer temperature detection

There are overheating detections by the thermostat detection and the temperature detection using the Pt1000 for the overheating
protection of the input transformer. The overheating protection for the input transformer using the temperature detection uses the
increased temperature. Set the trip level and alarm level of the increased temperature. If this detection is used, set the
FLG_MTMP_SEL = 1. For this reason, the input transformer and the motor temperature detection of the using Pt1000 can not be
used at the same time. If the temperature detection of both the motor and the input transformer is required, it needs to change the
method of temperature detection. Set the detection method by the FLG_MTMP_SEL setting. If it needs to read the temperature
and use for protection using RTD, apply the firmware 04B or later.
CP_OH_TR
Input transformer increased temperature trip level
Standard value: 50.0 degC (50.0 – 70.0 degC: Depends on equipment capacity)
Limit: -1000.0 – 1000.0 degC
Sets protection temperature of input transformer increased temperature.
Do not change this setting at the time of shipping because of depending on equipment capacity.
[Related parameters] MSK_BLR2, MSK_UVA4, CP_OH_TR_A, FLG_MTMP_SEL
CP_OH_TR_A
Input transformer increased temperature alarm level
Standard value: 40.0 degC (40.0 – 60.0 degC: Depends on equipment capacity)
Limit: -1000.0 – 1000.0 degC
Sets alarm temperature of input transformer increased temperature.
Do not change this setting at the time of shipping because of depending on equipment capacity.
[Related parameters] MSK_LFD2, CP_OH_TR, FLG_MTMP_SEL
TRTMP_OS
Input transformer temperature offset
Standard value: 0.0 degC
Limit: -1000.0 – 1000.0 degC
Sets temperature offset of input transformer overheat.
[Related parameters] CP_OH_TR, CP_OH_TR_A, FLG_MTMP_SEL
3.2.10.3 Cell inverter overheat detection

CP_CELL_OH
Cell inverter overheat protection temperature
Standard value: 75.0 degC (Other than 6K600G)
85.0 degC (6K600G)
Limit: -1000.0 – 1000.0 degC
Sets protection temperature of cell inverter overheat.
[Related parameters] MSK_BLR7, MSK_BLR8, MSK_BLR9, MSK_BLR10, MSK_BLR11, MSK_BLR12, MSK_BLR13,
MSK_BLR14, MSK_BLR15
CP_CELL_OH_A
Cell inverter overheat alarm temperature
Standard value: 70.0 degC (Other than 6K600G)
80.0 degC (6K600G)
Limit: -1000.0 – 1000.0 degC
Sets alarm temperature of cell inverter overheat by maximum fin temperature in the all of the inverters.
[Related parameters] MSK_STPRQ1, CELL_OH_A
Rev.S
165
4GBF0632
3.2.11 Precharge
When using precharge circuit, set type of precharge contactor.
FLG_PRE_CTT_TYPE
Precharge contactor type select
Standard value: 0
Limit: 0-2
Sets type of contactor for precharge circuit of ACL method. If it is used one digital output for status signal of contactor, set to 1. If
it is used two digital signals as ON/ OFF signal, set to 2. If precharge circuit is not used, set to 0.
value Precharge Purpose

0 Not used －
1 Used Software latch (one status signal)
2 Used No software latch (ON/ OFF signal)
(a) In the case of operating a contactor of normal excitation type:

Output one signal latched by the software (B_PRECTT_CMD) from the digital output.
(FLG_PRE_CTT_TYPE = 1)
(b) In the case of operating a contactor of mecanical latched type:

Output one signal latched by the software (B_PRECTT_CMD) from the digital output.
The signal connected to external relay circuits to make A and B-contacts, then their contacts are connected to input command
and trip circuit respectively.
(FLG_PRE_CTT_TYPE = 1)
(c) In the case of operating a contactor of mecanical latched type:

Output a input command signal (B_PRECTT_CMD) and a trip signal (B_PRECTT_OFF) from the signal output, and connect
to their circuits respectively.
B_AC_P_ 0.5s Input AC MCCB On
B_RNTD_ Stop Running Stop

＆
TM1(0.5s) Aapprox. 2.7s
B_UVD_ VDC_MIN > CP_UV
＆
No Ans
B_PRE_CTT_ANS_ Ans
B_PRE_CTT_CMD
@FLG_PRE_CTT_TYPE=2
One shot
B_PRE_CTT_OFF
B_PRE_CTT_CMD Latch Reset

@FLG_PRE_CTT_TYPE=1
Rev.S
166
4GBF0632
LVL_UVA_PRECHG
Re-pre-charge main voltage level at power interruption
Limit: 0.0 – 100.0 %
Set main AC voltage level of turning off pre-charge contactor at main power interruption. This function is available by model of
pre-charged circuit with ACL. This parameter can be set less than CP_UVA. If it is se to 0, it does not turn off a pre-charged
contactor at power interruption.
[Related parameters] CP_UVA
Rev.S
167
4GBF0632
3.3 Protection
Setting parameters for the protection
3.3.1. General protection
Function Page
Current limit 169
DC bus voltage 173
Speed protection 175
Motor, brake 176
Grounding detection 177
Output voltage error detection 178
Reactor overheat 179
Phase loss detection 179
Miscellaneous 180
Rev.S
168
4GBF0632
3.3.1.1. Current limit

Setting the parameters of protection relating to current.
LMT_I1
Primary current limit
Limit: 0.1 - 400.0% (1.0/100%)
Sets the limit value of the motor current, the drive controls motor current, for vector control. In case of V/f control, this setting is
only used for CL_T (current limit timer) protection.
LMT_I1_EX
External primary current limit
Limit: 0.1 - 400.0% (1.0/100%)
When bit11 of the digital input (DI_EX5) is 1, this setting is enabled as the motor primary current limit.
When it is 0, LMT_I1 is enabled as the motor primary current limit.
LMT_I1_LOWF
Low frequency primary current limit
Limit: 0.0 - 400.0 % (1.0/100%)
Note: Vector control
LMT_I1_LOWF_H, LMT_I1_LOWF_L
Low frequency primary current limit frequency high limit, Low frequency primary current limit frequency low limit
Standard value: LMT_I1_LOWF_H: 0.4 Hz
LMT_I1_LOWF_L: 0.2 Hz
Limit: 0.0 - 60.0 Hz
Sets the motor current limit for low frequency output.
When the low frequency primary current limit is not used, set LMT_I1_LOWF_H = LMT_I1_LOWF_L = 0.
[Related parameters] LMT_I1
Current Limit
LMT_I1
LMT_I1_LOWF
Speed
0
LMT_I1_LOWF_L LMT_I1_LOWF_H
LMT_I1_STF
Short time free of low frequency current limit, free current level
Limit: 0.0 - LMT_I1 (1.0/100%)
Sets the free current level, which is free of the torque current limit, for a short time, in low frequency.
[Related parameters] LMT_I1_LOWF, RMS_STF_LVL, TIME_LOWF_OFF, TIME_STF_INT, TIME_STF_ON
Rev.S
169
4GBF0632
RMS_STF_LVL
Short time free of low frequency current limit, short time RMS
Standard value: 0.0
Limit: 0 - 400.0 % (1.0/100%)
Sets the threshold level of 4 seconds RMS, for the “short time free of low frequency current limit”.
If the “short time free” interval period is not passed after the inverter operation stops, and also 4 seconds RMS level is lower than
the threshold, the “short time free of low frequency current limit” can be performed.
[Related parameters] LMT_I1_LOWF, LMT_I1_STF, TIME_LOWF_OFF, TIME_STF_INT, TIME_STF_ON
TIME_CL
Current limiting timer
Limit: 0.00 - 300.0 s
Sets the delay time to detect the current limit (CL_T).
Current limiting alarm (CL_TA) is detected at a time calculated by TIME_CL 80%.
[Related parameters] MSK_UVA1, MSK_STPRQ1, CL_T
TIME_LOWF_OFF
Low frequency current limit off timer
Limit: 0.000 - 2.000 s
Sets the “current limit free delay time in low frequency” current limit.
[Related parameters] LMT_I1_LOWF, LMT_I1_STF, RMS_STF_LVL, TIME_STF_INT, TIME_STF_ON
TIME_STF_INT
Short time free of low frequency current limit, interval time
Limit: 0.00 - 1200.0 s
Sets the interval time of the “short time free of low frequency current limit”.
When the “short time free function” is not used, set to 0.
[Related parameters] LMT_I1_LOWF, LMT_I1_STF, RMS_STF_LVL, TIME_LOWF_OFF, TIME_STF_ON
TIME_STF_ON
Short time free of low frequency current limit, ON time
Limit: 0.00 - 2.00 s
Sets the free time of the “short time free of low frequency current limit”.
When the “short time free” is not used, set to 0.
[Related parameters] LMT_I1_LOWF, LMT_I1_STF, RMS_STF_LVL, TIME_LOWF_OFF, TIME_STF_INT
TIME_STF2
Low frequency current limit restraint timer
Limit: 0.00 - 30.00 s
Sets the delay time of starting low frequency current limit.
[Related parameters] LMT_I1_LOWF
Rev.S
170
4GBF0632
CP_RMS_20
20-minute RMS overload detection
Standard value: (See the chart below)
Limit: 0.0 - 300.0 % (1.0/100%)
Sets the RMS value for 20 minutes.
2
OL
1.0 2 20 60 T T
100
20 min RMS
20 60
OL: Overload [%]
T: Time [s]
In the case of overload 110 % - 60 sec, 20 miniuts RMS is 1.0052, ie CP_RMS_20 = 100.52 %
Set LMT_I1 + 1% if the drive is used as 100% overload specification.
[Related parameters] MSK_UVA1, OL20
CP_RMS_5
5-minute RMS overload response
Limit: 0.0 - 300.0 % (1.0/100%)
Sets the RMS value for 5 minutes.
2
OL
1.0 2 5 60 T T
100
5 min RMS
5 60
OL: Overload [%]
T: Time [s]
In the case of overload 110 % - 60 sec, 5 miniuts RMS is 1.042, ie CP_RMS_20 = 104.2 %
[Related parameters] MSK_UVA1, OL5
CP_RMS_A, CP_RMS_A20
5-minute overload alarm setting, 20-minute overload alarm detection
Limit: 0.0 - 300.0 % (1.0/100%)
Sets the 5-minute RMS alarm setting and the 20-minute RMS alarm setting each.
Logical sum of 5-minute RMS alarm and 20-minute RMS alarm becomes the overload alarm (OL_A).
[Related parameters] MSK_STPRQ1, OL_A
TIME_CL 60 sec
OL(%) 110 115 125 150 175 200 225 250
CP_RMS_5(%) 102.08 103.17 105.48 111.80 118.85 126.49 134.63 143.18
CP_RMS_20(%) 100.52 100.80 101.40 103.08 105.03 107.24 109.69 112.36
CP_RMS_A(%) 100.04 101.11 103.37 109.57 116.47 123.96 131.94 140.31
CP_RMS_A20(%) 100.02 100.30 100.89 102.56 104.50 106.70 109.14 111.80
Rev.S
171
4GBF0632
CP_OCA
AC overcurrent detection level
Limit: 0.0 - 400.0 % (1.0/100%)
Note: Initialize
Sets the AC overcurrent (OCA) detection level using the rating of the equipment.
When CS_EQUIP_CURR = 124.0 A and CP_OCA = 150%, AC overcurrent is detected at
124 .0[ Arms ] 150 % 2 263 .0[ Apeak ] .
[Related parameters] CS_EQUIP_CURR, OCA, OCA_B
CP_CURCHK
Abnormal current detection applied voltage level
Standard value: 4096
Limit: -16384 - 16384 (16384/ percent modulation is 1)
Sets the applied voltage level to detect abnormal current.
16384 count corresponds to 100% (percent modulation is 1) of PWM carrier amplitude.
[Related parameters] MSK_BLR1, 2, CURU, CURW, CURU_B, CURW_B
CP_CUR_DIFF
Current differential detection level
Limit: 0.0 - 100.0 %
Sets the current differential level to detect the current differential between bank A and bank B.
[Related parameters] MSK_BLR5, TIME_CUR_DIFF
TIME_CUR_DIFF
Current differential detection timer
Limit: 0.0 - 32.0 s
Sets the on delay time for current differential detection.
[Related parameters] MSK_BLR5, CP_CUR_DIFF
LVL_CRDIF_DET
Current differential detection mask level
Limit: 0.0 - 800.0 %
Set the level of the motor current that current differential detection effective.
[Related parameters] CP_CUR_DIFF, MSK_BLR5, TIME_CUR_DIFF
TIME_H_OCA_DET
Current differential detection mask level
Limit: 0.000 – 0.050 s
Set the detecting delay timer of inverter and converter critical overcurrent. When inverter or converter overcurrent (OCA, OCA_B,
xn_C_OCA) is detected and blocks gate signal by hardware, if the current does not descend less than 5 % from the detecting to
this setting time, critical overcurrent is detected.
[Related parameters] H_OCA, H_C_OCA
Rev.S
172
4GBF0632
3.3.1.2. DC bus voltage

Setting the parameters related to the DC bus voltage-related protection.
CP_OV
DC overvoltage detection level
Standard value: 116.0 % (250Fr, 300 Fr, 400 Fr, 600Fr) : Default value
120.0 % (150Fr, 200 Fr)
127.0 % (80Fr, 100 Fr)
Limit: 0.0 - 150.0 % (1.0/100%)
Note: Initialize
Sets the DC overvoltage detection level. This setting value depends on frame size of cell inverters.
[Related parameters] CS_DC_VOLT, xn_OVP, xn_OVN (x = U, V, W, n = 1~6)
LMT_VDC_CL_H, LMT_VDC_CL_H2, LMT_VDC_CL_L, LMT_VDC_CL_L2

DC voltage torque limit H level (LMT_VDC_CL_H)
DC voltage torque limit H level 2 (LMT_VDC_CL_H2)
DC voltage torque limit L level (LMT_VDC_CL_L)
DC voltage torque limit L level 2 (LMT_VDC_CL_L2)
Standard value: (LMT_VDC_CL_H) 0.0 %
(LMT_VDC_CL_H2) 150.0 %
(LMT_VDC_CL_L) 0.0 %
(LMT_VDC_CL_L2) 150.0 %
Limit: (LMT_VDC_CL_H) 0.00 - 100.0 % (1.0/100%)
(LMT_VDC_CL_H2) 0.00 - 150.0 % (1.0/100%)
(LMT_VDC_CL_L) 0.00 - 100.0 % (1.0/100%)
(LMT_VDC_CL_L2) 0.00 - 150.0 % (1.0/100%)
When not using this function, set as follows.
LMT_VDC_CL_H = 0.00 %
LMT_VDC_CL_H2 = 150.00 %
LMT_VDC_CL_L = 0.00 %
LMT_VDC_CL_L2 = 150.00 %
[Related parameters] AD_GS10
Torque limit of motoring side Torque limit of re-generation side
VDC_F
0
L H 100% H2 L2
H: LMT_VDC_CL_H
H2 : LMT_VDC_CL_H2
L: LMT_VDC_CL_L
L2 : LMT_VDC_CL_L2
Rev.S
173
4GBF0632
CP_UV
DC under voltage detection level
Standard value: 69.0 % (Type-E cell inverters)
60.0 % (Type-G cell inverters)
Limit: 0.0 - 100.0 % (1.0/100%)
Set the DC under voltage detection level. The protection is detected when minimum DC voltage (VDC_MIN) in P/ N
voltage in used cell inverters fall below this level.
This level is related to DC voltage detection UVD (UVA signal), and CELL_F (BLR signal). The CELL_F is detected with
UVD in the operation.
[Related parameters] CS_DC_VOLT, UVD, xn_CELL_F (x = U, V, W, n = 1~6)
CP_UV_SIL
DC under voltage detection start Interlock level
Limit: 0.0 - 125.0 % (1.0/100%)
Set the DC under voltage detection start interlock level. This parameter is not used standardly for this drive.
When PWM converter does not run, and minimum DC voltage is larger than this setting value, and CCD boards are healty status
(B_CCD_HLTY = 1), UV_SIL is 1, UVD protection in UVA condition is masked in that case.
[Related parameters] CS_DC_VOLT, UV_SIL, UVD
CP_UV_SIL_L
Contactor open start Interlock DC voltage level
Limit: 0.0 - 125.0 % (1.0/100%)
Note: Not used
This parameter is not used.
CP_REC_F
Rectifier failure detection DC voltage level
Limit: 0.0 - 150.0 % (1.0/100%)
Set DC voltage level for detecting rectifier failure (REC_F).
[Rated paramreters] REC_F, TIME_REC_F
TIME_REC_F
Rectifier failure detection timer
Standard value: 3.0 s (Type-E cell inverters)
6.0 s (Type-G cell inverters)
Limit: 0.0 - 300.0 s
Set timer for detecting rectifier failure (REC_F).
[Rated paramreters] REC_F, CP_REC_F
Rev.S
174
4GBF0632
3.3.1.3. Speed protection

Setting the parameters relating to motor speed protection.
CP_OSP
Overspeed detection level
Limit: 0.0 - 130.0 % (1.0/100%)
Sets the overspeed (OSS) detection level.
When in torque control with the speed limiting function, this level should be set rather high by considering the addition of
the speed limit bias from the master customer control.
[Related parameters] MSK_BLR3, OSS
CP_OSS_FO
Output frequency over level
Standard value: 57.5 Hz
Limit: 0 - 500 Hz
Sets the output frequency over (OSS_FO) level.
The following value is set as standard:
CP _ OSP
CP _ OSS _ FO CS _ MOTOR _ FREQ
100
CP_OSS_FO [Hz]
CS_MOTOR_FREQ [x 0.1 Hz]
CP_OSP [%]
[Related parameters] MSK_BLR3, OSS_FO
MA_ZERO_SP
Zero speed detection level
Limit: 0.0 - 125.0 % (1.0/100%)
Zero speed is detected when |Speed feedback [%]| ≦ MA_ZERO_SP [%] (SP = 0).
Rev.S
175
4GBF0632
3.3.1.4. Motor brake

Setting the parameters for protection of motor, brake.
MA_BR_CURR
Brake release current
Limit: 0.0 - 400.0 % (1.0/100%)
Sets the brake release current
The brake control signal (BR_DATA(1)B01) operates when IQ _ F MA _ BR _ CURR
[Related parameters] MSK_BR
MA_BR_SPEED
Full brake close start speed
Limit: 0.0 - 130.0 % (1.0/100%)
Sets the full brake close start speed
Brake is closed when the full brake close command is issued and the motor speed is less than MA_BR_SPEED.
In the brake sequence, when SPBR_ condition is not used and UV condition is used, set MA_BR_SPEED to 125%.
[Related parameters] MSK_BR
TIME_BR
Brake timer
Limit: 0.00 - 300.0 s
Sets the delay time to detect the brake open instruction timer (BR_T).
[Related parameters] MSK_BR, BR_T
Rev.S
176
4GBF0632
3.3.1.5. Grounding detection

Setting the parameters relating to protection of grounding.
CP_GDV
Ground fault detection level
Standard value: (20.0 %)
Limit: 0.0 - 171.5 %
Sets the ground fault detection (GR) level.
Ground fault detection is detected when CP_GDV [%] ≦ zero phase voltage [%].
[Related parameters] CP_GDV_A, FLT_GDV
CP_GDV_A
Ground fault alarm level
Limit: 0.0 - 171.5 %
Sets the ground fault alarm (GR_A) level.
Ground fault alarm is detected when CP_GDV_A [%] ≦ zero phase voltage [%].
[Related parameters] CP_GDV, FLT_GDV
FLT_GDV
Zero phase voltage filter
Standard value: (10.0 rad/s)
Limit: 0.0 - 1024.0 rad/s
Sets the time constant of the zero phase voltage filter for ground fault detection. When filter is not used, set 0.
[Related parameters] CP_GDV, CP_GDV_A
TIME_GR
Grounding detection timer
Limit: 0.00 - 300.0 s
Sets the delay time to detect the converter grounding detection timer (GR_T).
[Related parameters] MSK_UVA3, MSK_HFD2, MSK_LFD1
Rev.S
177
4GBF0632
3.3.1.6. Output voltage error detection

Setting the parameters relating to output voltage error detection.
CP_VFBK_F
Output voltage error detection gain
Limit: 0.0 - 3300.0 %
Sets the output voltage error detection gain.
Trip level in case output voltage is rating voltage is set.
Trip level per output voltage is determined based on the relation to CP_VFBK_F, CP_VFBKF_L_LIM and output voltage.
[Related parameters] CP_VFBK_F_A, CP_VFBKF_L_LIM, FLT_VFBK_F
CP_VFBK_F_A
Output voltage error alarm gain
Limit: 0.0 – 3300.0 %
Sets the output voltage error alarm gain.
Alarm level in case output voltage is rating voltage is set.
Alarm level per output voltage is determined based on the relation to CP_VFBK_F, CP_VFBKF_L_LIM and output voltage.
[Related parameters] CP_VFBK_F, CP_VFBKF_L_LIM, FLT_VFBK_F
CP_VFBKF_L_LIM
Output voltage error lower limit
Limit: 0.0 - 150.0 %
Sets the lower limit of output voltage error.
Output voltage error detection level is determined according to the diagram below.
Output voltage error detection is detected when voltage deviation between reference of line voltage and feedback of line voltage is
bigger than output voltage error detection level.
[Related parameters] CP_VFBK_F, CP_VFBK_F_A, FLT_VFBK_F
detection lebel (%) Output voltage

error detection
level
CP_VFBK_F
Output voltage
error alarm level
CP_VFBK_F_A
| V | (%)
CP_VFBK_L_LIM 100
FLT_VFBK_F
Output voltage error filter
Standard value: (5.0 rad/s)
Limit: 0.0 – 1024.0 rad/s
Set the time constant of the output voltage error filter for output voltage error detection. When filter is not used, set 0.
[Related parameters] CP_VFBK_F, CP_VFBK_F_A, CP_VFBKF_L_LIM
Rev.S
178
4GBF0632
3.3.1.7. Reactor overheat

Setting the parameters relating to protection of the reactor.
TIME_ACL
ACL overheat timer
Standard value: (0.00 s)
Limit: 0.00 - 300.0 s
Sets the delay time to detect an ACL overheat (OH_ACL).
[Related parameters] MSK_STPRQ1, MSK_LFD1, OH_ACL_T
3.3.1.8. Phase loss detection

Setting the parameters relating to phase loss detection.
CP_VAC_PH_LOSS
Input open phase detection unbalance level
Limit: 0.0 - 400.0 %
Sets the unbalance level for open phase detection of the input voltage.
The average value of the three phases of the input voltage is taken as 100% and multiplied by CP_VAC_PH_LOSS, and
a phase that is lower than that value is regarded as an open phase.
(Example: If the average of three phase inputs are 90% and the set value is 80%, any phase below 72% is regarded as an
open phase.)
Set the appropriate mask of UVA2 disabled if input open phase detection is not used.
[Related parameters] MSK_UVA2, VAC_PH_LOSS
CP_VINV_PH_LOSS
Output open phase detection unbalance level
Limit: 0.0 - 400.0 %
Sets the unbalance level for the open phase detection of output current.
The average value, of the three phases, of the output current, is taken as 100% and multiplied by CP_VINV_PH_LOSS,
and a phase that is lower than the value is regarded as an open phase.
[Related parameters] MSK_UVA1, MSK_UVA2, VINV_PH_LOSS, TIME_VINV_PH_LOSS
TIME_VINV_PH_LOSS
Output open phase detection timer
Limit: 0.0 - 300.0 s
Sets the timer for the open phase detection of output current.
[Related parameters] MSK_UVA1, MSK_UVA2, VINV_PH_LOSS, CP_VINV_PH_LOSS
Rev.S
179
4GBF0632
3.3.1.9. Miscellaneous
Other protection setting.
TIME_MFAN
Motor cooling fan timer
Standard value: (0.00 s)
Limit: 0.00 - 300.0 s
Sets the delay time to detect the motor cooling fan stop timer (M_FN_T).
[Related parameters] MSK_READY2, MSK_HFD2, M_FN_T
TIME_CTT
Output AC contactor timer
Standard value: 1.00 s (w/ ACSW)
0.10 s (w/o ACSW)
Limit: 0.00 - 300.0 s
Sets the on delay time for the recovering ACSW_T after the AC contactor is closed.
It is also used for the setting the delay time from the moment it establishes UV to the moment it establishes READY at the
“restart after power failure”. When the “restart after power failure” is issued, it needs to set the same value to the all
equipment.
When AC contactor (ACSW) is used, set 1.00sec because a waiting time from contactor close to motor speed detection is
necessary.
[Related parameters] TIME_FON, TIME_CEMFOFF, MSK_READY1, FLG_RESTART, ACSW_T
FLG_EXRST
Remote reset request change flag
Standard value: 1
Limit: 0, 1
Sets the reset range when the remote reset signal (EXRST) is entered.
0 = Resets all fault signals (same as the reset operation on the panel).
1 = Resets the overload, master station transmission errors, current limits etc.
FLG_LMT_FRST
Fault reset limit
Standard value: 5
Limit: 0 - 20
Sets the reset limit of times the remote reset signal (EXRST) or the front panel reset signal (FRSTSW) may be entered. If
FLG_LMT_FRST is enabled, it will attempt to prevent erasure of the trace back data after the reset limit is reached. To RESET the
reset limit, either the remote reset signal (EXRST) or the front panel reset (FRSTSW) signal must be pressed for 5 seconds.
0 = Disabled.
A value entered into FLG_LMT_FRST will set a reset limit attempting to keep the trace back data from being overwritten.
Automatic fault resets during automatic retry are not counted.
[Related parameters] MSK_BLR2
FLG_TL_F_QSTOP
Quick stop in occurring transmission fault flag
Standard value: 0
Limit: 0, 1
Sets 1 to make the motor speed reduce at a quick stop rate when a transmission fault (TL_F1-TL_F4) is occuring. In this case,
TL_F1 and TL_F2 in the UVA sequence and TL_F3 and TL_F4 in UV sequence should not be used, and TL_F1 - TL_F4 in
READY sequence is used.
[Related parameters] MSK_UVA4, MSK_UV2, MSK_READY1
Rev.S
180
4GBF0632
TIME_AIN_FAULT
General analog input fault timer
Limit: 0.00 - 300.0 s
Sets the delay time to detect the fault (AIN_FAULT) when using a “current type general analog input”.
[Related parameters] MSK_UV2, MSK_HFD2, MSK_LFD1, AIN1_TYPE, AIN_FAULT
TIME_DS
Door switch timer
Limit: 0.00 - 300.0 s
Sets the delay time to detect the door open (DS) condition.
[Related parameters] MSK_BLR5, DS_T
CP_MOTOR_OH
Motor overheat detection level
Standard value: 155.0 °C
Limit: 0.0 - 200.0°C
Sets the motor overheat (M_OH) detection level.
[Related parameters] MSK_UV2, MSK_HFD2, MSK_STPRQ1, MSK_LFD1, M_OH
TIME_CODE_ERR
SRAM code checksum error detection delay time
Standard value: 600 s
Limit: 0 - 30000 s
In the checksum monitoring function of the SRAM program code areas which the microcomputer for control (PP7A) and main CPU
execute, the detection delay time of the abnormalities in checksums is set.
The microprocessor for control (PP7A) updates the checksum in about 4.8 min period, and main CPU updates in about 3.7 min
period.
In 600 s (10 min) setup, it detects the error when the abnormalities of PP7A or main CPU occurred continuously twice or more.
[Related parameters] MSK_LFD2, MSK_UV2, MSK_HFD2
Symbols Description Data type Unit

CODE_ERR_SADR_M SRAM address of SH code error 32-bit integer H
CODE_ERR_FDAT_M FLASH data of SH code error 16-bit integer H
CODE_ERR_SDAT_M SRAM data of SH code error 16-bit integer H
CODE_ERR_PADR_A PRAM address of PP7A code error 16-bit integer H
CODE_ERR_FDAT_A FLASH data of PP7A code error 16-bit integer H
CODE_ERR_PDAT_A PRAM data of PP7A code error 16-bit integer H
FLG_CCD_CRC_ERR_MSK
CCD boards CRC error mask
Standard value: 1
Limit: 0, 1
If CRC error of CCD board is removed from the cause of xn_CELL_F (x=U, V, W, n=1~6), set FLG_CCD_CRC_ERR_MSK = 1
[Related parameters] MSK_BLR7, MSK_BLR8, MSK_BLR9, MSK_BLR10, MSK_BLR11, MSK_BLR12, MSK_BLR13,
MSK_BLR14, MSK_BLR15
Rev.S
181
4GBF0632
3.3.2. Traceback
The drive unit features a traceback function that saves the status of the drive before and after fault occurrence. Traceback data
is useful for failure cause analysis. The inverter and converter can save traceback data for up to 8 fault occurrences, respectively.
The recorded traceback data can be displayed and saved using the maintenance tool.
When a fault occurs in this equipment, the CTR board time is copied to the occurrence time of the traceback. If power is turned
off without adjusting time, the traceback occurrence time becomes inaccurate. If you adjust time before turning power off even
after the fault occurred, the traceback occurrence time is revised automatically. About adjustment for time, please refer to Chapter
3 Adjustment for time for details.
Each traceback data consists of high-speed traceback 36 channels, standard traceback 38 channels, and long traceback 16
channels, and sequence trace.
Table 3.3.1 lists the characteristics of high-speed, standard, and long traceback data. Fig 3.3.1 shows the data collection time
for each traceback data.
Table 3.3.1 Characteristics of Traceback Data
Quantity of No. of
Type Sampling cycle Signals to be saved
Sampling channels
256 items 416µs 36ch P7A_IU_F P7A_ED_FBK VW_FBK_B
P7A_IW_F P7A_EQ_FBK IU_CNV
VU_FBK P7A_ED_R IV_CNV
VV_FBK P7A_EQ_R IW_CNV
VW_FBK P7A_MAIN_VAC_F P7A_ID_FBK_B
High-speed VU_REF P7A_IV_F P7A_IQ_FBK_B
traceback VV_REF P7A_VR_F P7A_ED_FBK_B
VW_REF P7A_VT_F P7A_EQ_FBK_B
P7A_ID_FBK P7A_IU_F_B P7A_MAIN_VAC_F_B
P7A_IQ_FBK P7A_IW_F_B P7A_IV_F_B
ID_REF VU_FBK_B QO
IQ_REF VV_FBK_B QO_B
Standard 512 items 1ms 38ch Set by TRB01_OP_AS - TRB38_OP_AS
traceback
1024 items Set by 16ch Set by TRB_L01_OP_AS - TRB_L16_OP_AS
Long
TRB_TIME_LONG
traceback (standard: 50ms)
Sequence traceback records the change of fault sequence for up to 5s after the change of the first occurred fault sequence.
Fault occurrence point

(traceback trigger)
Sequence trace
5s
High-speed traceback 106.5 ms
12.5 ms
Standard traceback 512 ms
Long traceback TRB_FAULT_TM

(1024×TRB_TIME_LONG ms)
TRB_L_FAULT_TM
time
0
Fig 3.3.1 Traceback Data Collection Time
Rev.S
182
4GBF0632
If a failure is detected, a traceback trigger will occur and the traceback extraction will be performed. The generating conditions of
the traceback trigger are as follows. The generating conditions of the traceback trigger can be changed by setting parameter
TRB_TRIG_MOD.
TRB_TRIG_MOD FLG_SYNC_TRB Condition of traceback trigger

0 BLR failure detection READY Off during operation
0 HFD failure detection (FLDR=1) (including
Syncronus transfer
1 MP_HFD failure detection READY Off by UVS Off)
and capture action
0 BLR failure detection READY Off during operation
1 HFD failure detection (FLDR=1) (excluding Syncronus transfer
1 MP_HFD failure detection READY Off by UVS Off) and capture action
Set TRB_TRIG_MOD = 1 to disable extraction of the traceback in applications that perform operation stops using the “UVS Off”
signal frequently.
TRB_TRIG_MOD
Trace-back trigger mode
Standard value: 0
Limit: 0, 1
Set to 1 when the safety switch (UVS) is on, while the system is in operation and the trace-back is not used to collect data.
When the safety stop switch (UVS) is used frequently to stop operation of the equipment, set to 1.
TRB_TIME_FAST
High-speed trace-back time
Limit: 416 µs
A sampling period for the high-speed trace-back will be automatically set.
TRB_TIME_LONG
Log trace-back time
Limit: 10 - 10000 ms
Sets the sampling period for the long trace-back.
The setting may be adjusted in 10ms units. Fractions will be discarded.
TRB_TIME_STD
Standard trace-back time
Limit:
Sampling period of (976 µs) for the standard trace-back will be automatically set.
Rev.S
183
4GBF0632
TRB_FAULT_TM
Sampling time after triggered reference traceback trigger
Limit: 0 - 62 ms (for the case of CS_F_PWM=2048Hz)
Specifies the sampling time after triggering the reference traceback.
The sampling time of the high speed traceback trigger is also linked to this setting.
The upper limit is 1 / (2×CS_F_PWM) × 256 (rounded to the nearest integer).
TRB_L_FAULT_TM
Sampling time after long traceback trigger
Limit: 0 - (TRB_TIME_LONG × 1024) ms
Specifies the sampling time after the long traceback trigger.
Rev.S
184
4GBF0632
TRB01_OP_AS - TRB38_OP_AS
Standard trace-back option address
Limit:
Sets the symbol of the data (38 channels) to be obtained by the standard trace-back.
(Standard value)
シンボル
Address Vector control Sensor less Volts/ Hertz control Field Winding PMSM control
vector control SM control
TRB01_OP_AS SP_R
TRB02_OP_AS SP_F
TRB03_OP_AS MAIN_VAC_F
TRB04_OP_AS E1_R
TRB05_OP_AS VI_POWER
TRB06_OP_AS I1_F
TRB07_OP_AS ID_F
TRB08_OP_AS IQ_F
TRB09_OP_AS ED_R
TRB10_OP_AS EQ_R
TRB11_OP_AS FL_R
TRB12_OP_AS VAC_PRO
TRB13_OP_AS CPS_FLT
TRB14_OP_AS GDV_FLT
TRB15_OP_AS VDC_F
TRB16_OP_AS VDC_MON_UP
TRB17_OP_AS VDC_MON_UN
TRB18_OP_AS VDC_MON_VP
TRB19_OP_AS VDC_MON_VN
TRB20_OP_AS VDC_MON_WP
TRB21_OP_AS VDC_MON_WN
TRB22_OP_AS VDC_MAX
TRB23_OP_AS SP_REF
TRB24_OP_AS DRIVE_STS
TRB25_OP_AS T_R F_P VL_ADJ T_R
TRB26_OP_AS ASPROUT_FLT FREQ_DFDT VF_FCMP FC_REF ASPROUT_FLT
TRB27_OP_AS T_R_RMFC WOCD VF_DVCMP FC_FBK M_TMP_FLT
TRB28_OP_AS G_VSC_FLX ASPROUT_FLT VF_STLCMP ASPROUT_FLT G_VSC_FLX
TRB29_OP_AS XFR_DLTQ_ERR ID_R1F VF_WS FL_ERR ID_R1F
TRB30_OP_AS VAC_RS_F
TRB31_OP_AS VAC_ST_F
TRB32_OP_AS VU_FBK
TRB33_OP_AS IU_F
TRB34_OP_AS IU_F_B
TRB35_OP_AS SEQ_DATA01
TRB36_OP_AS DINT_DATA_GIF
TRB37_OP_AS DIEX_DATA
TRB38_OP_AS SSEQ_OUT3
Rev.S
185
4GBF0632
TRB_L01_OP_AS - TRB_L16_OP_AS
Long traceback option address
Standard value: following table
Limit:
Setting the symbols of the data (16 channels) sampled by long traceback.
(Standard value)
Symbols
Address Vector control Sensor less Volts/ Hertz control Field Winding PMSM control
vector control SM control
TRB_L01_OP_AS SP_R
TRB_L02_OP_AS SP_F
TRB_L03_OP_AS MAIN_VAC_F
TRB_L04_OP_AS E1_R FC_REF E1_R
TRB_L05_OP_AS VI_POWER
TRB_L06_OP_AS I1_F
TRB_L07_OP_AS ID_F IQ_R IQ_R
TRB_L08_OP_AS IQ_F
TRB_L09_OP_AS VAC_PRO
TRB_L10_OP_AS VDC_F
TRB_L11_OP_AS T_R F_P VL_ADJ T_R
TRB_L12_OP_AS PWB_TMP_FLT
TRB_L13_OP_AS PWB_TMP_TRB
TRB_L14_OP_AS SP_REF
TRB_L15_OP_AS DIEX_DATA
TRB_L16_OP_AS SSEQ_OUT3
Rev.S
186
4GBF0632
3.4 Sequence
Setting of the parameters related to defect sequence, operation sequence, and brake sequence.
3.4.1. Fault sequence

Schematic drawing of the fault sequence is shown below. Each fault can be masked by the MSK_xxx setting.
Each word will have several predefined bits that may be masked by the MSK_xxx setting.
When a bit is set to “USE”, it is defined as NOT MASKED (Masking = 0) and refers to allowing continued usage or operation
regardless of the status or condition of the bit. This will allow the sequence to continue. If a fault event occurs were this bit was
meant to trigger a capture of a trace back, the trace back will NOT be generated because the equipment will not observe the bit go
active low. In essence, when setting these bits to “USE”(not masked), the sequence is allowed to continue regardless of the input
status to these bits.
If passing input to output, set Mask = 1. If not detecting input or “USE”, then set Mask = 0.
A schematic of the sequence is depicted below.
Field critical fault Electric critical fault Electric preparative Electric condition Operation ready Start interlock
condition
BLF1 BLR1 UVA1 UV1 READY1 SIL1

Fault Fault ~ 15 ~4 ~2 ~2 ~2
input output
RST RST
Ex. BLF1:
Input BLF1_INP
Mask MSK_BLF1_TT
Output BLF1_OUT
A A A A A A
BLF_ BLR_ UVA UV SIL
READY
OR
C_IL
Intermediate
Slight fault Critical fault
fault
STPRQ1 LFD1 HFD1

~2 ~2 ~2
A
N
RNTD
A A A
N
STPRQ_ LFD_ HFD_
Rev.S
187
4GBF0632
3.4.1.1. BLF (Field critical fault)

MSK_BLF1
Field critical fault mask 1
Limit:
These are the mask settings for field fault 1.
Signals are assigned to each bit. Set 1 to bits whose signals are used and set 0 to bits not used.
BIT Abbreviation Content Default

F N.U. Not used 0
E N.U. Not used 0
D N.U. Not used 0
C N.U. Not used 0
B N.U. Not used 0
A N.U. Not used 0
9 FL_FAULT_ Exciter failure 0
8 LF_ Field lost 0
7 FCL_T_ Field current limit timer 0
6 FSTOP_ Exciter stopped 0
5 N.U. Not used 0
4 CPU_A_ Slave CPU A failure 0
3 CPU_M_ Master CPU failure 0
2 OV_S_ Over voltage (soft detection) 0
1 FOC_ Field current over 0
0 FOC_S_ Field current over (soft detection) 1
Rev.S
188
4GBF0632
3.4.1.2. BLR (Electric critical fault mask)

MSK_BLR1
Electric critical fault mask 1
Standard value: 3C3D H
Limit:
These are the mask settings for electric critical fault 1.
BIT Abbreviation Content Defaut

F N.U. Not used 0
E N.U. Not used 0
D GIF_CLKDWN_ GIF board clockdown 1
C FPGA2_WD_ GIF FPGA2 watchdog error 1
B FPGA3_WD_ GIF FPGA3 watchdog error 1
A FPGA4_WD_ GIF FPGA4 watchdog error 1
9 FPGA_CRC_ERR_ GIF FPGA CRC error 0
8 N.U. Not used 0
7 N.U. Not used 0
6 N.U. Not used 0
5 CURU_ Current failure of U-phase 1
4 CURW_ Current failure of W-phase 1
3 CPU_A_ Slave CPU A failure 1
2 CPU_M_ Master CPU failure 1
1 N.U. Not used 0
0 BLF_ Field critical fault 1
Rev.S
189
4GBF0632
MSK_BLR2
Standard value: 003F H
Limit:

F N.U. Not used 0
E N.U. Not used 0
D N.U. Not used 0
C N.U. Not used 0
B N.U. Not used 0
A N.U. Not used 0
9 N.U. Not used 0
8 CURU_CNV_ Current failure of U-phase converter 0
7 CURV_CNV_ Current failure of V-phase converter 0
6 CURW_CNV_ Current failure of W-phase converter 0
5 CURU_B_ Current failure of U-phase B bank 1
4 CURW_B_ Current failure of W-phase B bank 1
3 H_OCA_ Inverter critical overcurrent (*1) 1
2 H_C_OCA_ Converter critical overcurrent (*2) 1
1 OH_TR_ Overheat transformer 1
0 LMT_FRST_ Fault reset limit 1
(*1): Bit.3 H_OCA_ is available in firmware 05B or later.

(*2): Bit.2 H_C_OCA_ is available in firmware 05B or later.
Rev.S
190
4GBF0632
MSK_BLR3
Standard value: FB00 H
Limit:
When using single-end type PLG, PLG feedback, a broken cable detection will cause a malfunction for some applications,
so usually a set SP_ERR2 is not used. But, if safety is concerned, a set SP_ERR2 is used.

F REC_F_ Rectifier failure 1
E NO_VAC_ No AC voltagae input (*1) 1
D OSS_ Overspeed 1
C OSS_FO_ Over frequency exceeded 1
B OV_RTRY_F_ DC overvoltage retry failure (*2) 1
A N.U. Not used 0
9 SP_ERR_ Speed detection error 1
8 SP_ERR2_ Speed detection error 2 1
7 N.U. Not used 0
6 N.U. Not used 0
5 N.U. Not used 0
4 N.U. Not used 0
3 N.U. Not used 0
2 N.U. Not used 0
1 N.U. Not used 0
0 XFR_FAIL Transfer failure 0
(*1): Bit.E NO_VAC_ is available in firmware 04B or later.

(*2): Bit.B OV_RTRY_F_ is available in firmware 08B or later.
MSK_BLR4
Limit:
Rev.S
191
4GBF0632
MSK_BLR5
Limit:

F PLD_ERR_ PLD error 1
E N.U. Not used 0
D N.U. Not used 0
C DS_T_ Door open timer 0
B N.U. Not used 0
A CURU_DIFF_ Current U-phase differential detection 0
9 CURV_DIFF_ Current V-phase differential detection 0
8 CURW_DIFF_ Current W-phase differential detection 0
7 SPA4_T Spare 4 timer 0
3 SPA4 Spare 4 0
2 SPA3 Spare 3 0
1 SPA2 Spare 2 0
0 SPA1 Spare 1 0
Rev.S
192
4GBF0632
MSK_BLR6
Standard value: F00C H
Limit:

F PN15_F_ +15V or -15V of voltage error 1
E CPSF_ Control power source failure 1
D GR_T_ Ground detection timer 1
C MPSF_ Main power source failure 1
B N.U. Not used 0
A N.U. Not used 0
9 N.U. Not used 0
8 N.U. Not used 0
7 N.U. Not used 0
6 N.U. Not used 0
5 N.U. Not used 0
4 N.U. Not used 0
3 OCA_ AC overcurrent 1
2 OCA_B_ Overcurrent AC B bank 1
1 N.U. Not used 0
0 N.U. Not used 0
Rev.S
193
4GBF0632
MSK_BLR7
Standard value: F9F9 H
Limit:
Regardless of the setting value, the faults for the unused cells are masked automatically by the software.

F U1_C_OCA_ U-phase 1st cell converter over current 1
E U1_OVP_ U-phase 1st cell over voltage P side 1
D U1_OVN_ U-phase 1st cell over voltage N side 1
C U1_OH_ U-phase 1st cell over heat 1
B U1_GPSF_ U-phase 1st cell gate power supply failure 1
A U1_LINK_F_ U-phase 1st cell serial communication link failure 0
9 U1_FUSE_ U-phase 1st cell fuse blown 0
8 U1_CELL_F_ U-phase 1st cell failure 1
7 U2_C_OCA_ U-phase 2nd cell converter over current 1
6 U2_OVP_ U-phase 2nd cell over voltage P side 1
5 U2_OVN_ U-phase 2nd cell over voltage N side 1
4 U2_OH_ U-phase 2nd cell over heat 1
3 U2_GPSF_ U-phase 2nd cell gate power supply failure 1
2 U2_LINK_F_ U-phase 2nd cell serial communication link failure 0
1 U2_FUSE_ U-phase 2nd cell fuse blown 0
0 U2_CELL_F_ U-phase 2nd cell failure 1
Rev.S
194
4GBF0632
MSK_BLR8
Standard value: F9FD9 H
Limit:

F U3_C_OCA_ U-phase 3rd cell converter over current 1
E U3_OVP_ U-phase 3rd cell over voltage P side 1
D U3_OVN_ U-phase 3rd cell over voltage N side 1
C U3_OH_ U-phase 3rd cell over heat 1
B U3_GPSF_ U-phase 3rd cell gate power supply failure 1
A U3_LINK_F_ U-phase 3rd cell serial communication link failure 0
9 U3_FUSE_ U-phase 3rd cell fuse blown 0
8 U3_CELL_F_ U-phase 3rd cell failure 1
7 U4_C_OCA_ U-phase 4st cell converter over current 1
6 U4_OVP_ U-phase 4st cell over voltage P side 1
5 U4_OVN_ U-phase 4st cell over voltage N side 1
4 U4_OH_ U-phase 4st cell over heat 1
3 U4_GPSF_ U-phase 4st cell gate power supply failure 1
2 U4_LINK_F_ U-phase 4st cell serial communication link failure 0
Rev.S
195
4GBF0632
MSK_BLR9
Limit:

F U5_C_OCA_ U-phase 5st cell converter over current 1
E U5_OVP_ U-phase 5st cell over voltage P side 1
D U5_OVN_ U-phase 5st cell over voltage N side 1
C U5_OH_ U-phase 5st cell over heat 1
B U5_GPSF_ U-phase 5st cell gate power supply failure 1
A U5_LINK_F_ U-phase 5st cell serial communication link failure 0
7 U6_C_OCA_ U-phase 6st cell converter over current 1
6 U6_OVP_ U-phase 6st cell over voltage P side 1
5 U6_OVN_ U-phase 6st cell over voltage N side 1
4 U6_OH_ U-phase 6st cell over heat 1
3 U6_GPSF_ U-phase 6st cell gate power supply failure 1
2 U6_LINK_F_ U-phase 6st cell serial communication link failure 0
Rev.S
196
4GBF0632
MSK_BLR10
Limit:

F V1_C_OCA_ V-phase 1st cell converter over current 1
E V1_OVP_ V-phase 1st cell over voltage P side 1
D V1_OVN_ V-phase 1st cell over voltage N side 1
C V1_OH_ V-phase 1st cell over heat 1
B V1_GPSF_ V-phase 1st cell gate power supply failure 1
A V1_LINK_F_ V-phase 1st cell serial communication link failure 0
9 V1_FUSE_ V-phase 1st cell fuse blown 0
8 V1_CELL_F_ V-phase 1st cell failure 1
7 V2_C_OCA_ V-phase 2nd cell converter over current 1
6 V2_OVP_ V-phase 2nd cell over voltage P side 1
5 V2_OVN_ V-phase 2nd cell over voltage N side 1
4 V2_OH_ V-phase 2nd cell over heat 1
3 V2_GPSF_ V-phase 2nd cell gate power supply failure 1
2 V2_LINK_F_ V-phase 2nd cell serial communication link failure 0
1 V2_FUSE_ V-phase 2nd cell fuse blown 0
0 V2_CELL_F_ V-phase 2nd cell failure 1
Rev.S
197
4GBF0632
MSK_BLR11
Limit:

F V3_C_OCA_ V-phase 3rd cell converter over current 1
E V3_OVP_ V-phase 3rd cell over voltage P side 1
D V3_OVN_ V-phase 3rd cell over voltage N side 1
C V3_OH_ V-phase 3rd cell over heat 1
B V3_GPSF_ V-phase 3rd cell gate power supply failure 1
A V3_LINK_F_ V-phase 3rd cell serial communication link failure 0
9 V3_FUSE_ V-phase 3rd cell fuse blown 0
8 V3_CELL_F_ V-phase 3rd cell failure 1
7 V4_C_OCA_ V-phase 4st cell converter over current 1
6 V4_OVP_ V-phase 4st cell over voltage P side 1
5 V4_OVN_ V-phase 4st cell over voltage N side 1
4 V4_OH_ V-phase 4st cell over heat 1
3 V4_GPSF_ V-phase 4st cell gate power supply failure 1
2 V4_LINK_F_ V-phase 4st cell serial communication link failure 0
Rev.S
198
4GBF0632
MSK_BLR12
Limit:

F V5_C_OCA_ V-phase 5st cell converter over current 1
E V5_OVP_ V-phase 5st cell over voltage P side 1
D V5_OVN_ V-phase 5st cell over voltage N side 1
C V5_OH_ V-phase 5st cell over heat 1
B V5_GPSF_ V-phase 5st cell gate power supply failure 1
A V5_LINK_F_ V-phase 5st cell serial communication link failure 0
7 V6_C_OCA_ V-phase 6st cell converter over current 1
6 V6_OVP_ V-phase 6st cell over voltage P side 1
5 V6_OVN_ V-phase 6st cell over voltage N side 1
4 V6_OH_ V-phase 6st cell over heat 1
3 V6_GPSF_ V-phase 6st cell gate power supply failure 1
2 V6_LINK_F_ V-phase 6st cell serial communication link failure 0
Rev.S
199
4GBF0632
MSK_BLR13
Limit:

F W1_C_OCA_ W-phase 1st cell converter over current 1
E W1_OVP_ W-phase 1st cell over voltage P side 1
D W1_OVN_ W-phase 1st cell over voltage N side 1
C W1_OH_ W-phase 1st cell over heat 1
B W1_GPSF_ W-phase 1st cell gate power supply failure 1
A W1_LINK_F_ W-phase 1st cell serial communication link failure 0
9 W1_FUSE_ W-phase 1st cell fuse blown 0
8 W1_CELL_F_ W-phase 1st cell failure 1
7 W2_C_OCA_ W-phase 2nd cell converter over current 1
6 W2_OVP_ W-phase 2nd cell over voltage P side 1
5 W2_OVN_ W-phase 2nd cell over voltage N side 1
4 W2_OH_ W-phase 2nd cell over heat 1
3 W2_GPSF_ W-phase 2nd cell gate power supply failure 1
2 W2_LINK_F_ W-phase 2nd cell serial communication link failure 0
1 W2_FUSE_ W-phase 2nd cell fuse blown 0
0 W2_CELL_F_ W-phase 2nd cell failure 1
Rev.S
200
4GBF0632
MSK_BLR14
Limit:

F W3_C_OCA_ W-phase 3rd cell converter over current 1
E W3_OVP_ W-phase 3rd cell over voltage P side 1
D W3_OVN_ W-phase 3rd cell over voltage N side 1
C W3_OH_ W-phase 3rd cell over heat 1
B W3_GPSF_ W-phase 3rd cell gate power supply failure 1
A W3_LINK_F_ W-phase 3rd cell serial communication link failure 0
9 W3_FUSE_ W-phase 3rd cell fuse blown 0
8 W3_CELL_F_ W-phase 3rd cell failure 1
7 W4_C_OCA_ W-phase 4st cell converter over current 1
6 W4_OVP_ W-phase 4st cell over voltage P side 1
5 W4_OVN_ W-phase 4st cell over voltage N side 1
4 W4_OH_ W-phase 4st cell over heat 1
3 W4_GPSF_ W-phase 4st cell gate power supply failure 1
2 W4_LINK_F_ W-phase 4st cell serial communication link failure 0
Rev.S
201
4GBF0632
MSK_BLR15
Limit:

F W5_C_OCA_ W-phase 5st cell converter over current 1
E W5_OVP_ W-phase 5st cell over voltage P side 1
D W5_OVN_ W-phase 5st cell over voltage N side 1
C W5_OH_ W-phase 5st cell over heat 1
B W5_GPSF_ W-phase 5st cell gate power supply failure 1
A W5_LINK_F_ W-phase 5st cell serial communication link failure 0
7 W6_C_OCA_ W-phase 6st cell converter over current 1
6 W6_OVP_ W-phase 6st cell over voltage P side 1
5 W6_OVN_ W-phase 6st cell over voltage N side 1
4 W6_OH_ W-phase 6st cell over heat 1
3 W6_GPSF_ W-phase 6st cell gate power supply failure 1
2 W6_LINK_F_ W-phase 6st cell serial communication link failure 0
Rev.S
202
4GBF0632
3.4.1.3. UVA (Electrical ready condition)

MSK_UVA1
Electrical ready condition mask 1
Standard value: F771 H
Limit:
These are the mask settings for electrical ready condition 1.

F LF_ Field lost 1
E UVD_ DC voltage drop 1
D OL5_ Overload (5 minutes) RMS 1
C OL20_ Overload (20 minutes) RMS 1
B UL_T Low current limit timer 0
A FCL_T_ Field current limit timer 1
9 CL_T_ Current limit timer (*1) 1
8 C_FN_T_ Equipment ventilating fan stopped timer 1
7 FSTOP_ Exciter stop 0
6 OV_S_ Over voltage (soft detection) 1
5 CELL_PR_ Cell inverters preparation (*2) 1
4 AC_P_T_ AC input circuit breaker open 1
3 N.U. Not used 0
2 N.U. Not used 0
1 N.U. Not used 0
0 BLR_ Electrical critical fault 1
(*1): When the current limit level (LMT_I1) is lower than the continuous rated current + 5%, set mask CL_T_.
(*2): Bit5 CELL_PR_ is available firmware 09A or later.
Rev.S
203
4GBF0632
MSK_UVA2
Limit:

F N.U. Not used 0
E N.U. Not used 0
D OL5_B_ Converter overload (5 minutes) RMS 1
C OL20_B_ Converter overload (20 minutes) RMS 1
B N.U. Not used 0
A N.U. Not used 0
9 CL_T_B_ Converter current limit timer 1
8 N.U. Not used 0
7 N.U. Not used 0
6 N.U. Not used 0
5 N.U. Not used 0
4 N.U. Not used 0
3 VINV_PH_LOSS_ Output current phase lost detection 1
2 N.U. Not used 0
1 VAC_ROT_F_ Input voltage phase rotate failure 0
0 VAC_PH_LOSS_ Input voltage phase lost detection 0
Rev.S
204
4GBF0632
MSK_UVA3
Standard value: 03C3 H
Limit:

F N.U. Not used 0
E N.U. Not used 0
D N.U. Not used 0
C N.U. Not used 0
B OH_ACL_T_ ACL overheat timer 0
A N.U. Not used 0
9 SYS_ERR_ System configuration error 1
8 PARA_ERR_ Set parameter check error 1
7 CELL_SET_ERR_ Cell setting error 1
6 NO_LOAD_ Output side open 1
5 GR_T_ Ground detection timer 0
4 N.U. Not used 0
3 BLA_ AC circuit breaker trip 0
2 N.U. Not used 0
1 VFBK_F_ Voltage feedback failure 1
0 UPS_ERR_ Uninterruptible power supply unit error 1
Rev.S
205
4GBF0632
MSK_UVA4
Standard value: 8D00 H
Limit:

F ROT_F_ Motor rotate failure 1
E OH_TR_ Overheat transformer 1
D TL_F1_ Transmission failure 1 – Own station 0
C TL_F2_ Transmission failure 2 – Initialization failure 0
B REV_ROT_F_ Reverse rotate failure 1
A VPLL_ERR_ Inverter output voltage PLL error 1
9 N.U. Not used 0
8 N_IM_ Number of IM error 1
3 SPA4 Spare 4 0
2 SPA3 Spare 3 0
1 SPA2 Spare 2 0
0 SPA1 Spare 1 0
Rev.S
206
4GBF0632
3.4.1.4. UV (Electrical condition)

MSK_UV1
Electrical condition mask 1
Standard value: EB4B H
Limit:
These are the mask settings for electrical condition 1.

F UVS External safety switch 1
E IL_ External interlock 1
D P_SW_ Panel interlock switch on 1
C QSTOP_FAULT_ Quick stop operated 0
B CELL_UV Cell under voltage (H/W gate block) 1
A BP_CTT_ Bypass contactor closed 0
9 UV_MPSF_ Electrical condition 1
8 ACSW_F_ AC contactor fault 1
7 SWILON_ Software interlock on 0
6 CPLL_ERR_ Converter PLL Error (*1) 1
5 N.U. Not used 0
4 N.U. Not used 0
3 MP_S_IL MP start interlock 1
2 UVA_EX External equipment electrical ready condition 0
1 UVA Electrical ready condition 1
0 C_IL Closing interlock 1
(*1) CPLL_ERR_ is available in firmware 10A or later.
Rev.S
207
4GBF0632
MSK_UV2
Electrical condition mask 2
Standard value: 00A9 H
Limit:
These are the mask settings for electrical condition 2.

F AIN_FAULT_ General analog input signal lost fault 0
E SP_LOST Speed reference lost 0
D TL_F3_ Transmission failure 3 – Transmission failure 0
C TL_F4_ Transmission failure 4 – Drive-to-drive 0
B N.U. Not used 0
A N.U. Not used 0
9 M_OH_ Motor overheat 0
8 B_HLTY Brake healthy detection 0
7 UVS1_ANS_ UVS1 answer 1
6 UVS2_ANS_ UVS2 answer 0
5 PRE_CTT Pre-charge contactor opened 1
4 CODE_ERR_ SRAM code checksum error 0
3 MP_FAULT_ MP critical fault 1
2 SPA1 Spare 1 0
1 SPA2 Spare 2 0
0 FAULT_ Critical fault 1
Rev.S
208
4GBF0632
3.4.1.5. READY (Operation ready complete)

MSK_READY1
Operation ready complete mask 1
Standard value: F023 H
Limit:
These are the mask settings for operation ready 1.

F TL_F1_ Transmission failure 1 – Own station 1
E TL_F2_ Transmission failure 2 – Initialization failure 1
C TL_F4_ Transmission failure 4 – Drive-to-drive 1
B DEGD_F2_ DEGD transmission error 2 – Initialization error (*1) 0
A DEGD_F3_ DEGD transmission error 3 – Transmission error (*1) 0
9 N.U. Not used 0
8 N.U. Not used 0
7 N.U. Not used 0
6 N.U. Not used 0
5 ACSW_T_ AC contactor opened timer 1
4 N.U. Not used 0
3 N.U. Not used 0
2 FL_READY Exciter ready condition 0
1 MP_R_IL MP ready interlock 1
0 UV_READY Ezternal electrical ready condition 1
(*1) Not used.
Rev.S
209
4GBF0632
MSK_READY2
Operation ready mask 2
Limit:
These are the mask settings for operation ready 2.

F N.U. Not used 0
E SP_LOST_ Speed reference lost 0
D N.U. Not used 0
C N.U. Not used 0
B M_FN_T_ Motor cooling fan stopped timer 0
A BR_F_ Electromagnetic brake energizing circuit fault 0
9 N.U. Not used 0
8 CHG_START_ System change in progress (*1) 1
7 N.U. Not used 0
6 N.U. Not used 0
5 N.U. Not used 0
4 N.U. Not used 0
3 N.U. Not used 0
2 SPA1 Spare 1 0
1 SPA2 Spare 2 0
0 N.U. Not used 0
(*1) CHG_START_ is used when the shared motion function is used. See parameter FLG_CHGSYS.
Rev.S
210
4GBF0632
3.4.1.6. HFD (Critical fault)

MSK_HFD1
Critical fault processing mask 1
Limit:
These are the mask settings for critical fault processing 1.
When using each signal, of the critical failure processing 1, set the signals in the UVA sequences or UV sequences to
"use" (not masked) in the mask setup. If each signal of the critical fault processing 1 is made to "use" (not masked), it
becomes a “continue operation with FAULT” setup, and trace back data is not obtained in the event of a failure.

F DEGD_F2_ DEGD transmission error 2 – Initialization error (*1) 0
E DEGD_F3_ DEGD transmission error 3 – Transmission error (*1) 0
D P_SW_ Panel interlock switch on 0
C QSTOP_FAULT_ Quick stop operated 0
B N.U. Not used 0
A N.U. Not used 0
9 N.U. Not used 0
8 ACSW_F_ AC contactor fault 1
7 N.U. Not used 0
6 N.U. Not used 0
5 N.U. Not used 0
4 N.U. Not used 0
3 N.U. Not used 0
2 UVA_EX External equipment electrical ready condition 0
1 UVA Electrical ready condition 1
0 N.U. Not used 0
(*1) Not used.
Rev.S
211
4GBF0632
MSK_HFD2
Critical fault processing mask 2
Limit:
These are the mask settings for critical fault processing 2.
When you use each signal of the critical failure processing 2, set the signals in the UVA sequences or UV sequences to
"use"(not masked) in the mask setup. If only each signal of the critical failure processing 2 is made to "use" (not masked),
it becomes a “continue operation with FAULT” setup, and trace back data is not obtained in the event of a failure.

F AIN_FAULT_ General analog input signal lost fault (*1) 0
E SP_LOST Speed reference lost 0
C TL_F4_ Transmission failure 4 - Drive-to-drive failure 0
B M_FN_T_ Motor cooling fan stop timer 0
A BR_F_ Electromagnetic brake excitation circuit fault 0
8 B_HLTY Brake healthy detection 0
7 TL_F1_ Transmission failure 1 – Own station failure (*2) 0
6 TL_F2_ Transmission failure 2 – Initialization failure (*2) 0
5 PRE_CTT Pre-charge contactor opened 1
3 N.U. Not used 0
2 SPA1 Spare 1 0
1 SPA2 Spare 2 0
(*1) AIN_FAULT_ is available when general analog input is 4-20mA current input type.
(*2) When TL_F1_, TL_F2 in READY1 sequence are used, also use TL_F1, TL_F2 in HFD2 sequence.
Rev.S
212
4GBF0632
3.4.1.7. SIL (Starting interlock)

MSK_SIL1
Starting interlock mask 1
Limit:
These are the mask settings for starting interlock 1.

F SPA1 Spare1 0
E SPA2 Spare2 0
D BP_CTT_ Bypass CTT closed 0
C VAC_ROT_F Input voltage phase rotate failure (*1) 1
B UVA_SIL_ AC main voltage drop 1
A N.U. Not used 0
9 UV_SIL_ DC voltage drop starting interlock 0
8 ACSW_C_ AC contactor closed 0
7 N.U. Not used 0
6 N.U. Not used 0
5 N.U. Not used 0
4 N.U. Not used 0
3 N.U. Not used 0
2 M_FN_ Motor cooling fan stopped 0
1 SP_SIL_ Zero speed starting interlock 0
0 STCMD_ Driving signal starting interlock 1
(*1): Bit.C VAC_ROT_F_ is available in firmware 04A or later.
Rev.S
213
4GBF0632
MSK_SIL2
Starting interlock mask 2
Standard value: EEEE H
Limit:
Note: Serial communication errors are available firmware 04B or later.
These are the mask settings for starting interlock 2.

F SER_IUA_ Serial communication error inverter loop U-phase A 1
E SER_IVA_ Serial communication error inverter loop V-phase A 1
D SER_IWA_ Serial communication error inverter loop W-phase A 1
C N.U. Not used 0
B SER_IUB_ Serial communication error inverter loop U-phase B 1
A SER_IVB_ Serial communication error inverter loop V-phase B 1
9 SER_IWB_ Serial communication error inverter loop W-phase B 1
8 N.U. Not used 0
7 SER_C1A_ Serial communication error converter loop 1st A 1
6 SER_C2A_ Serial communication error converter loop 2nd A 1
5 SER_C3A_ Serial communication error converter loop 3rd A 1
4 N.U. Not used 0
3 SER_C1B_ Serial communication error converter loop 1st B 1
2 SER_C2B_ Serial communication error converter loop 2nd B 1
1 SER_C3B_ Serial communication error converter loop 3rd B 1
0 N.U. Not used 0
Rev.S
214
4GBF0632
3.4.1.8. STPRQ (Stop request)

MSK_STPRQ1
Intermediate fault (stop request) mask 1
Limit:
These are the mask settings for intermediate fault (stop request) 1.

F CELL_OH_A Cell overheat alarm (*1) 1
E C_FN_ Equipment ventilating fan stopped 0
D N.U. Not used 0
C C_FN_B_ Equipment ventilating redundancy fan stop timer 0
B OH_ACL_ ACL overheat 0
A MTMP_S_ Motor temperature detector fault 0
8 M_OH_A_ Motor overheat alarm 0
7 OL_A_ Equipment overload alarm 1
6 CL_TA_ Current limit timer alarm (*2) 1
5 GR_A_ Ground detection alarm 0
4 PRE_CTT_F_ Pre-charge contactor failure 0
3 N.U. Not used 0
1 N.U. Not used 0
0 SPA1 Spare 1 0
(*1): Bit.F CELL_OH_A_ is available in firmware 03A or later.

(*2): When the current limit level (LMT_I1) is lower than the continuous rated current + 5%, set mask CL_T_.
Rev.S
215
4GBF0632
MSK_STPRQ2
Intermediate fault (stop request) mask 2
Limit:
Intermediate fault (stop request) 2 mask setting
Symbols are allotted to the respective bits. Set 1 for use bit, and 0 for not-use bit.

F SP_LST_A_ Speed reference lost alarm 0
E UL_A_ Low current detection alarm 0
D Z_PLS_A_ PG Z Pulse undetected(*1) 0
C VFBK_F_A_ Voltage feedback failure alarm 1
B OH_TR_A_ Input transformer high temperature alarm 1
A FCL_TA_ Field current limit timer alarm 0
9 N.U. Not used 0
8 N.U. Not used 0
7 OL_A_B_ Converter overload alarm 1
6 CL_TA_B_ Converter current limit timer alarm 1
5 N.U. Not used 0
4 N.U. Not used 0
3 N.U. Not used 0
2 N.U. Not used 0
1 N.U. Not used 0
0 N.U. Not used 0
(*1)BitD. Z_PLS_A_ is available in firmware 10A or later.
Rev.S
216
4GBF0632
3.4.1.9. LFD (Minor fault)

MSK_LFD1
Minor fault processing mask 1
Standard value: E0A1 H
Limit:
These are the masks setting for minor fault processing 1.

F AIN_FAULT_ General analog input signal lost fault 1
E C_FN_ Equipment ventilating fan stopped 1
D SOFT_STL_ Automatic speed reduce operating in overload (*1) 1
C C_FN_B_ Equipment ventilating fan stopped timer 0
B OH_ACL_ ACL overheat 0
A MTMP_S_ Motor temperature detector fault 0
8 M_OH_A_ Motor overheat alarm 0
7 SL_CHG_ Automatic sensorless mode change (*2) 1
6 SPA1 Spare 1 0
5 GR_A_ Ground detection alarm 1
4 PRE_CTT_F_ Pre-charge contactor failure 0
3 RTRY_ In retry operation 0
0 STPRQ_ Intermediate fault (stop request) 1
(*1) Used to reduce speed automatically to prevent overload trip. See parameter FLG_SOFT_STALL.
(*2) Used to maintain operation with automatic change to sensorless mode if a disconnection of the differential PLG is detected.
See parameter FLG_SP_ERR_SL.
Rev.S
217
4GBF0632
MSK_LFD2
Minor fault processing mask 2
Limit:
Minor fault processing mask 2 mask settings
Symbols are allotted to the respective bits. Set 1 for use bit, and 0 for not-use bit.

F SP_LST_A_ Speed reference lost alarm 0
E TL_F1_ Transmission failure 1 – Own station failure 0
D TL_F2_ Transmission failure 2 – Initialization failure 0
C TL_F3_ Transmission failure 3 – Transmission failure 0
B OH_TR_A_ Input transformer high temperature alarm 0
A XFR_INCMP_ Transfer incomplete 1
9 CPT_FAIL_ Capture failure 1
7 OL_A_ Equipment overload alarm 0
6 CL_TA_ Current limit timer alarm (*1) 0
2 SPA4 Spare 4 0
1 SPA3 Spare 3 0
0 SPA2 Spare 2 0
(*1): When the current limit level (LMT_I1) is lower than the continuous rated current + 5%, mask CL_TA.
Rev.S
218
4GBF0632
3.4.2. Operational sequence

Setting the parameters relating to the operational sequence.
TIME_FOFF
Excitation off delay timer
Standard value: 0.00 s (0.20 s)
Limit: 0.00 - 300.0 s
Sets the delay time to detect the field excitation off condition.
Set 0 to TIME_FOFF when MA_ZERO_SP is 125% in sensorless operation and V/f control.
TIME_FON
Excitation delay timer
Limit: 0.00 - 300.0 s
Sets the delay time to detect the field excitation on condition.
This is a timer, to set delay time, from the received instructions EXT, F and R, which actually outputs a torque reference,
to securely establish the motor magnetic field. After receiving an EXT, F or R instruction, this timer will delay starting, to
build a magnetic field in the motor.
When it is necessary to adjust startup timing, set to 0.5 s.
[Related parameters] TIME_CTT, TIME_CEMFOFF
TIME_RNTD
RNTD timer
Limit: 0.00 - 300.0 s
Sets the delay time to detect the motor run (RNTD) off condition. A time delay for RNTD (in operation status) after the drive has
stopped from either a deceleration or a coast to stop (the motor may still be coasting dependent on the setting of MA_ZERO_SP).
[Related parameters] MA_ZERO_SP
TIME_STCMD
STCMD ON delay timer
Limit: 0.00 - 30.0 s
Setting the delay time from turning the start command (EXT) on to the start of the power supply.
FLG_FLD_ERR
Motor burnout prevention disabled
Standard value: 0
Limit: 0, 1
Set to 1 to disable the motor burnout prevention (FLDERR) when not turning off the field excitation, while the motor is stopped.
TIME_AC_P
Input breaker delay time timer
Limit: 0.00 - 300.0 s
Set delay time from input breaker’s auxiliary contact operation to main contact operation.
Rev.S
219
4GBF0632
3.4.3. Brake sequence

Setting the parameters relating to brake sequence.
MSK_BR
Brake command mask
Standard value: See the standard value table below.
Limit:
These are the mask settings for brake command.
F PIC Not used
E TEST_BR Not used
D OPEN_BR Not used
C BR_F_2S Not used
B BA_ Not used
A BR_F1 Not used
9 BR03 Not used
8 MVD Ride Through(*1)
7 BA Brake answerback
6 BR_T Brake open instruction timer
5 BR Brake
4 SPBR_ Full brake close starting speed detection
3 UV Electrical condition satisfied
2 BC_ Brake close instruction
1 BR01 Brake control signal 1
0 BR02 Brake control signal 2
(*1)MVD is available in firmware 10A or later

Standard value table
Brake Type Standard Setting of Note
MSK_BR
Open Condition Close Condition
UV=1 UV=0 0078h Brake open command when UV established.

MA_BR_SPEED=125% BA is not used. After brake open command is output and
TIME_BR is passed, speed control is started.
Brake close command when UV is turned off.
B=1 SP=0 & B=0 & 00E1h

Start command = 0
UV=1 UV=0 00F8h Brake open command when UV established.

MA_BR_SPEED=125% Both of BA and BR_T are used for starting speed control.
Brake close command when UV is turned off.
B=1 (BC_=1) BC_=0 (B=0) 00E5h Open by B, Close by BC_
|IQ_F| >MA_BR_CURR SP=0 0023h FLG_RATE_READY=1 -> Speed rate start by EXTR=1 ->
IQ_R generated
UV=1 UV=0 or 00F8h

ABSSF MA_BR_SPEED
|IQ_F| >MA_BR_CURR UV=0 & 003Bh

ABSSF MA_BR_SPEED
EXTR=1 UV=0 or (EXTR=0 & SP=0) 00F9h Brake close speed can be set by
MA_ZERO_SP
BC_=1 BC_=0 00E4h
Brake not used 0000h

• SP=0 is equivalent to (EXTR=0 & Speed feedback<MA_ZERO_SP).
[Related parameters] MA_BR_CURR, MA_BR_SPEED
Rev.S
220
4GBF0632
3.5 Inverter Basic Functions

The control block diagram is given in the following.
Speed Speed Torque D-Q axis D-Q axis Voltage PWM

reference control reference current current reference control
Sec. 3.5.1 Sec. 3.5.3 limit reference control Sec. 3.5.6 Sec. 3.5.6
Sec. 3.5.4 Sec. 3.5.4 Sec. 3.5.5
SFC Tension Id,Iq current

Sec. control detection
3.6.10 Sec. 3.5.4
Speed detection
Sec. 3.5.2
Fig 3.5.1 (A) Control block diagram (Vector control)
Speed V/f Voltage PWM

reference reference reference control
Sec. 3.5.1 Sec. 3.6.5 Sec. 3.5.6 Sec. 3.5.6
Id,Iq current
detection
Fig 3.5.1(B) Control block diagram (V/f control)
Rev.S
221
4GBF0632
3.5.1. Speed reference
Several external speed references (1.0/100%) can be from the serial communication or analog input. The rate and limit
processes are performed to output the internal speed reference (SP_R). The speed reference signal, SP_R, is positive
for forward rotation and negative for reverse rotation.
Drooping (option)
Torque Reference DROOP_R
DROOP_GAIN_T
Initial value: CR_DROOP_GAIN FLT_DROOP
B_EXT=1 Speed reference input

(option) FTC_SP_R
+ +
Jogging (option)
JOG_R B_EXTR=1
Impact compensation
(option) DT_IMP_T
+ +
Load Balance (option)
DT_LB_CMP_IN
<RATE><LIMIT>
1.0/100% + +
Serial SP_REF1 + + +
communication
+ +
SP_R
or SP_REF2 + + CR_RATE_ACC 3.5.3
SP_R_MEM CR_RATE_DEC
Analog data + (E_HOLD CR_RATE_QSTOP SP_TEST22
SP_REFA1 + (option))
Bi-Directional + SP_TEST29 LMT_SP_F

Reference SP_REFA2_D LMT_SP_R
(+/-) X +
+
SP_REFA2_G
B_SEL_DI=1 B_MRH_SEL=1 0: Forward

LMT_SP_MIN 1: Reverse
SP_REF_AIN0
Uni-Directional
Reference
(+ only) SP_REF_AIN1
Minimum Limit -1
B_SP_UP CR_RATE_MRH
B_SP_DN
B_DIR0
B_DIR1
B_EXT0 B_EXT
B_EXT1
Fig 3.5.2 Speed Reference
Rev.S
222
4GBF0632
3.5.1.1. Speed rate

The following parameters relate to the acceleration/deceleration rate.
CR_RATE_ACC
Acceleration rate for acceleration/deceleration along polygonal line
Limit: 0.00 - 3600 s
Sets the internal rate corresponding to the speed reference signal for 0 to 100% acceleration time.
Sets 60.00 s to accelerate 0 to 100% in 60 seconds.
[Related parameters] FLG_TIME_RATE
CR_RATE_ACC2 - CR_RATE_ACC6
Acceleration rate for acceleration/deceleration along polygonal line
Limit: 0.00 - 3600 s
Sets the acceleration rate used in acceleration/deceleration along polygonal line. The acceleration rate is the time corresponding
to the acceleration from 0 to 100% speed.
[Related parameters] CR_RATE_CHG2 - CR_RATE_CHG6
CR_RATE_CHG2 - CR_RATE_ CHG6

Frequency for switching rate for acceleration along polygonal line
Limit: 0.0 - 125.0 % (1.0/100%)
The points where the acceleration rate change along the CR_RATE polygonal line.
When the acceleration along polygonal line is not used, set 0 for all values.
The smallest number of CR_RATE_CHGn will have the lowest frequency change location, the frequencies will increase in
ascending order with the next CR_RATE_CHGn+1 having a higher frequency than the one before it. (These may be anything as
long as the drive/load can control the change.) When the switching point is only one or two, set the beginning from smaller number,
and set 0 to the rest of the values.
[Related parameters] CR_RATE_ACC2 - CR_RATE_ACC6, CR_RATE_DEC2 - CR_RATE_DEC6
Rev.S
223
4GBF0632
CR_RATE_DEC
Deceleration rate
Limit: 0.00 - 3600 s
Sets the internal deceleration rate corresponding to the speed reference time for 100 - 0% deceleration to occur.
For example setting, CR_RATE_DEC = 60.00s will allow a decelerate rate from 100 - 0% in 60 seconds.
[Related parameters] FLG_TIME_RATE
CR_RATE_DEC2 - CR_RATE_ DEC6

Deceleration rate for acceleration/deceleration along polygonal line
Limit: 0.0 - 3600 s
Sets the deceleration rate where the acceleration/deceleration change along polygonal line will occur.
CR_DEC_CHG2 - CR_DEC_CHG6
Deceleration rate change speed
Limit: 0.0 – 125.0 % (1.0/100%)
Sets to the freaquency of the speed of deceleration rate change point.
When the speed of deceleration rate change is not used, sets to 0.
Set a lower frequency on the smaller number of CR_DEC_CHGn and have the higher speed changes on the higher frequencies.
(These may be anything as long as the drive/load can control the change.)
When the switching point is only one or two, set beginning from smaller number, and set 0 to the residual values.
Motor Speed(%) Motor Speed(%)
SP_REF SP_REF
CR_RATE_ACC6 CR_RATE_DEC6
CR_RATE_CHG6
CR_DEC_CHG6
CR_RATE_ACC5
CR_RATE_CHG5 CR_RATE_DEC5
CR_RATE_ACC4
CR_DEC_CHG5
CR_RATE_CHG4
CR_RATE_DEC4
CR_RATE_ACC3
CR_DEC_CHG4
CR_RATE_DEC3
CR_RATE_CHG3
CR_RATE_ACC2 CR_DEC_CHG3 CR_RATE_DEC2
CR_RATE_CHG2 CR_DEC_CHG2
CR_RATE_ACC CR_RATE_DEC
Time(s) Time(s)
Rev.S
224
4GBF0632
FLG_CURV_RATE
Curve rate enable flag for square curve torque application
Limit:
Set each bit to 1 when the square curve rate is enabled.
In the case of a square torque load application, set B_ACC1_C_EN=1, CR_RATE_CHG2=100%, a maximum acceleration rate
for starting (CR_RATE_ACC) and a capable acceleration rate at the top speed (CR_RATE_ACC2).
The acceleration and deceleration time are below.
_ _ 2
ln × _ _ × _ _ 2
_ _
t = [ ]
_ _ 2 _ _
_ _
ln × _ _ × _ _ 2
_ _ 2
t = [ ]
_ _ _ _ 2
Speed Speed
CR_RATE_ACC CR_RATE_DEC2
CR_RATE_ACC2
CR_RATE_CHG2 CR_DEC_CHG2
(100%) (100%)
CR_RATE_DEC
0% 0%
Time Time
Square curve acceleration Square curve deceleration
B_ACC1_C_EN=1 B_DEC1_C_EN=1
In the case of a large starting torque application, a slower rate may be necessary when starting.
Speed
CR_RATE_ACC2
CR_RATE_CHG3 CR_RATE_ACC3
(100%)
CR_RATE_CHG2 CR_RATE_ACC
(5~10%)
0%
Time
B_ACC1_C_EN=1 B_ACC2_C_EN=1
Rev.S
225
4GBF0632

F N.U. Not used
E N.U. Not used
D N.U. Not used
C B_DEC5_C_EN Square curve enable between DEC5 – DEC6
B B_DEC4_C_EN Square curve enable between DEC4 – DEC5
A B_DEC3_C_EN Square curve enable between DEC3 – DEC4
9 B_DEC2_C_EN Square curve enable between DEC2 – DEC3
8 B_DEC1_C_EN Square curve enable between DEC1 – DEC2
7 N.U. Not used
6 N.U. Not used
5 N.U. Not used
4 B_ACC5_C_EN Square curve enable between ACC5 – ACC6
For Example: B_ACC1_C_EN=1

Between 0%~CR_RATE_CHG2, the acceleration rate is changing from CR_RATE_ACC to CR_RATE_ACC2 at
CR_RATE_CHG2.
Rate Rate
Continuous rate change Step change
CR_RATE_ACC2 CR_RATE_ACC2
CR_RATE_ACC CR_RATE_ACC
0% Speed 0% Speed
CR_RATE_CHG2 CR_RATE_CHG2
Speed Speed CR_RATE_ACC

CR_RATE_ACC CR_RATE_ACC2
CR_RATE_ACC2
CR_RATE_CHG2 CR_RATE_CHG2
0% Time 0% Time
(a) ACC1_C_EN=1 (b) ACC1_C_EN=0
Rev.S
226
4GBF0632
OP_RATE_ACC, OP_RATE_DEC
Optional Acceleration/Deceleration rate
Limit: 0.0 - 3600.0 s
Set the optional internal rate corresponding to the speed reference signal for 0 - 100%
Set to 120.0 s to accelerate/decelerate 0 - 100% in 120 seconds.
This optional rate is available when a digital input DI_EX6.Bit12:RATE_CHG = 1 is used.
Normal rate (DI_EX6.B12:RATE_CHG=0)
Speed
Time
Option rate (DI_EX6.B12:RATE_CHG=1)
FLG_RATE_READY
Speed rate calculation flag
Standard value: 0
Limit: 0, 1
Set to 1 when the condition for executing the speed rate calculation is “READY on” or “RNFLG on”.
Set to 0 when the condition should be (RNFLG on).
In this case, for example, when BA = 0 (brake close).
FLG_TIME_RATE
Automatic rate adjust flag
Standard value: 0
Limit: 0, 1
Set to 1 when the automatic acc/dec rate adjustment function is used.
The automatic acc/dec rate adjustment time is set by TIME_RATE.
[Related parameters] TIME_RATE
TIME_RATE
Automatic speed rate adjusting time
Limit: 0.000 - 30.0 s
Sets the renewal time interval of speed reference (SP_REF1 or SP_REF2) from the data transmission.
When a change of SP_REF1 or SP_REF2 is detected, the speed reference change rate is calculated by the following
calculation LMT_RATE = ( SP_REF12) / TIME_RATE. In order to use this function, the step change, of speed reference,
from the PLC, is automatically corrected and changed to a linear form.
[Related parameters] Valid when FLG_TIME_RATE = 1.
Rev.S
227
4GBF0632
TIME_ST
Speed rate start waiting timer
Standard value: 1.000 s (V/f control), 0.000 s (Vector control)
Limit: 0.000 - 300.0 s
Sets the delay time for the starting speed to catch up to the speed reference after the inverter start.
This function is effective for a motor acceleration starting delay in V/f control when using LMT_SP_L.
[Related parameters] LMT_SP_L
CR_RATE_QSTOP
Quick stop rate
Limit: 0.00 - 3600 s
Sets the internal rate change of the speed reference signal. This is the deceleration time for a quick stop from 100 to 0%
is set and may be different from CR_RATE_DEC.
To decelerate 100 to 0% in 60 seconds, set to 60.00s.
[Related parameters] FLG_TIME_RATE, FLG_RATE_QSTOP
FLG_DT_LMT
Motor-stopped torque variation limit selection
Standard value: 0
Limit: 0-3
Select the speed rate when stopping with the startup signal (EXTR) off.
0, 1 = Stop with the decelerating speed of the deceleration rate CR_RATE_DEC
2, 3 = Stop with the decelerating speed of the quick stop rate CR_RATE_QSTOP
QS_PGAIN
Emergency stop speed control proportional gain
Standard value: 0
Limit: 0 - 100000
Sets the proportional gain of the speed control used to execute an emergency stop. When any value other than 0 is set to
QS_PGAIN, as soon as an emergency stop command (QSTOP) is received, the speed control changes from PI
(Proportional Integral) control to P (proportional) control. When QS_PGAIN is 0, the speed control does not change at the
time of an emergency stop, and a conventional emergency stop function starts.
TIME_QSTOP
Quick stop timer
Limit: 0.00 - 300.0 s
Sets the off-delay time of the quick stop signal.
TIME_QSTOP_FAULT
QSTOP_FAULT delay timer
Standard value: 0.0s
Limit: 0.00 - 300.0 s
Notes: Available in firmware 11A or later
Sets the delay time of QSTOP_FAULT which occurs after quick stop is applied.
[Related parameters] MSK_UV1, QSTOP_FAULT
Rev.S
228
4GBF0632
CR_STYP_EN
S-rate end adjustment
Limit: 0.0 - 3600 s
Sets the S-rate adjustment for the end of the acceleration/deceleration.
Set to 0 if S-acceleration/deceleration is not used.
The value indicates the time to accelerate from 0% to 100% in uniform acceleration. The S-time is determined based on the
relation to the acceleration/deceleration rate.
If FLG_STYP_BMPLS=1 and the speed reference change, in steps, to the reverse direction during S-end operation (interval T3 in
the figure below), an overshoot up to 10% toward acceleration may occur.
(Operation) When the acceleration from 0 to 100% is performed with the acceleration rate (CR_RATE_ACC) =
T1 and the S-rate adjustment (CR_STYP_EN) = T2, the operation is as follows
Motor speed
T2×T2
100% S-part acceleration time (T3)= ─────
2×T1
SP
T2×T2
S-part acceleration (SP)= ─────×100
4×T1×T1
T2×T2
Acceleration time (T4)=T1+ ─────
4×T1
(Operation example)
・CR_STYP_EN=CR_RATE_ACC×2
S-start speed: 0%, Acceleration time: 2 times CR_RATE_ACC
・CR_STYP_EN=CR_RATE_ACC
0
T1 (CR_RATE_ACC) Time [t] S-start speed: 75%, Acceleration time: 3/2 times CR_RATE_ACC
T2 (CR_STYP_EN)
（Setting example）
T3
To set SP (%) of S-acceleration for CR_RATE_ACC=T1(s), set
T4 CR_STYP_EN=2×T1×√SP
[Related parameters] CR_RATE_ACC, CR_RATE_DEC, CR_STYP_ST, FLG_STYP_BMPLS
Rev.S
229
4GBF0632
CR_STYP_ST
S-rate start adjustment
Limit: 0.0 - 3600 s
Sets the S-rate adjustment for the acceleration/deceleration start side.
Set it to 0 if S-acceleration/deceleration is not used.
The value indicates the time to accelerate from 0% to 100% in uniform acceleration. The S-time is determined based on the
relation to the acceleration/deceleration rate.
(Operation) When the acceleration from 0 to 100% is performed with the acceleration rate (CR_RATE_ACC) =
T1 and the S-rate adjustment (CR_STYP_EN) = T2, the operation is as follows
Motor speed T2×T2

S-part acceleration time (T3)= ─────
2×T1
100%
T2×T2
S-part acceleration (SP)= ─────×100
4×T1×T1
T2×T2
Acceleration time (T4)=T1+─────
4×T1
(Operation example)
・CR_STYP_ST=CR_RATE_ACC×2
SP S-start speed: 0%, Acceleration time: 2 times CR_RATE_ACC
・CR_STYP_ST=CR_RATE_ACC
0 Time[t] S-start speed: 75%, Acceleration time: 3/2 times CR_RATE_ACC
T1(CR_RATE_ACC)
T2(CR_STYP_EN) (Setting example)
T3 To set SP (%) of S-acceleration for CR_RATE_ACC=T1(s),
set CR_STYP_ST=2×T1×√SP
T4
(Remark) If the S-rate adjustment (CR_STYP_ST) in the end side is also set, the acceleration time is as follows.
Motor speed T4
T1 and T2 same as above.
100% T2xx×T2xx
S-part acceleration time (T3xx)=───────
SPen 2×T1
T2xx×T2xx
T1 (CR_RATE_ACC) S-part acceleration (SPxx)=──────×100
4×T1×T1
T2st×T2st
T2st (CR_STYPE_ST) T2en (CR_STYP_EN) Acceleration time (T4)=T1+─────
4×T1
T2en×T2en
+─────
4×T1
SPst (Note) If the step amount is small, or the
S-adjustment is large and S-regions overlap, the
0 S-regions become smaller according to the rate.
T3st T3en Time[t]
[Related parameters] CR_RATE_ACC, CR_RATE_DEC, CR_STYP_EN, FLG_STYP_BMPLS
Rev.S
230
4GBF0632
FLG_STYP_BMPLS
Bump-less in S-rate ending
Standard value: 0
Limit: 0, 1
Set to 1 if using bump-less in S-rate ending when the speed reference is changed while the S-rate ending is in operation.
This setting may have overshoot. If this setting is 0, it will not have overshoot, but it may have some torque bump.
[Related parameters] CR_STYP_EN
FLT_SP_R
Speed reference filter
Limit: 0.0 - 1024.0 rad/s
Turn this filter on for the speed reference after Speed Jump, Sync-XFR, Synchronous Motor or Sensor-less Vector control is used
as the speed rate. Set to 0 when the filter is not used.
When this filter is used, the speed reference shows a characteristic similar to the S curve.
Rev.S
231
4GBF0632
3.5.1.2. Speed limit

Setting the parameters relating to speed limit.
LMT_SP_F, LMT_SP_R
Forward speed limit (LMT_SP_F), Reverse speed limit (LMT_SP_R)
Standard value: (LMT_SP_F) 100.0 %
(LMT_SP_R) -100.0 %
Limit: (LMT_SP_F) 0.0 - 125.0 % (1.0/100%)
(LMT_SP_R) -125.0 - 0.0% (1.0/100%)
Sets the forward or reverse speed limit of the motor, respectively.
Set LMT_SP_F = 0.0% when only using reverse rotation. Forward rotation is disabled.
Set LMT_SP_R = 0.0% when only using forward rotation. Reverse rotation is disabled.
Do not set LMT_SP_F, LMT_SP_R above 100% to increase speed/ frequency. Doing so will also increase the output
voltage and possibly damage the motor instead use CS_MOTOR_FREQ to allow overspeed of the motor.
LMT_SP_L
Minimum operation speed
Standard value 1.0 %
Limit: 0.0 - 20.0 % (1.0/100%)
Sets the lower limit of the speed reference in operation. This is mainly used for sensor-less motor operation.
Do not set a larger value than MA_ZERO_SP. If LMT_SP_L is larger than MA_ZERO_SP, the operation cannot be stopped with
EXT Off.
SP_R [%]
UL
L1
0 Input speed reference [%]

L2
UL : LMT_SP_F
LL : LMT_SP_R
LL
L1 : LMT_SP_L
L2 : -LMT_SP_L
Rev.S
232
4GBF0632
LMT_SP_MIN
Minimum forward speed reference limit
Standard value 5.0 %
Limit: -125.0 - 125.0 %
Sets the speed reference “minimum forward speed limit”. Do not run the drive at zero speed. Set to a positive value. If a negative
value is set, the limit becomes invalid. Set to -125% if not in use the limit for example needing polarity operation. B_DIR0 and
B_DIR1 in DI_DATA6 (DI_EX5 or SSEQDATA6) needs to be 1 for reversing rotation.
B_EXT=1
Jogging (option)
JOG_R
1.0/100%
Serial SP_REF1 +
communication + SP_REF
or SP_REF2 +
Analog input +
SP_REFA1 +
Bi-Directional +
Reference SP_REFA2_D
(+/-) X +
+
SP_REFA2_G Output
B_SEL_DI=1 0: Forward
1: Reverse
SP_REF_AIN0
Uni-Directional
Reference
(+ only) SP_REF_AIN1
LMT_SP_MIN -1
Input
B_DIR0
B_DIR1
Rev.S
233
4GBF0632
3.5.1.3. Drooping
This optional function is used when transferring or running one load with multiple drive units. In such applications, when the
speed of one motor is increased, a large load is applied to this motor and the load applied to other motors is decreased. On the
contrary, if the speed of one motor is decreased, the load applied to other motors is increased.
This drooping function decreases the speed reference in proportion to the load if the torque reference (load) increases. If the
drooping function is used in a system consisting of multiple drive units, the speed of the motor, on which a large load is applied, is
decreased to balance the load across all motors.
This drooping function is useful to make the load balanced, but may cause the speed control accuracy to decrease. Therefore,
always pay special attention to the gain when using this function. To improve the speed control accuracy, the drooping gain is
changed from the PLC. At this time, the gain is input from DROOP_GAIN_T.
The drooping gain can be changed by a speed function as shown in the figure, under CR_SP_DROOP_H,
CR_SP_DROOP_Lbelow.
CR_DROOP_BAND
Drooping dead band
Limit: 0.0 - 100.0 % (1.0/100%)
Sets the drooping dead band for the torque reference (SFC_T_R) .
[Related parameters] CR_DROOP_GAIN, CR_SP_DROOP_H, CR_SP_DROOP_L
CR_DROOP_GAIN
Drooping gain
Limit: 0.0 - 32.0 % (1.0/100%)
Note: Initialize
Setting the drooping gain. This setting is only applied at initialization, (applied to temporary variable DROOP_GAIN_T).
When the drooping gain is changed during operation, the value is changed using DROOP_GAIN_T.
The DROOP_GAIN_T can be renewed by PLC via serial transmission.
[Related parameters] CR_DROOP_BAND, CR_SP_DROOP_H, CR_SP_DROOP_L
CR_SP_DROOP_H, CR_SP_DROOP_L
Drooping cancellation speed H level, Drooping cancellation speed L level
Limit: (CR_SP_DROOP_H) 0.0 - 125.0 % (1.0/100%)
(CR_SP_DROOP_L) 0.0 - CR_SP_DROOP_H (1.0/100%)
Set these gains when drooping off at low speed.
These parameters are mainly used with sensor-less control.
[Related parameters] CR_DROOP_GAIN, CR_DROOP_BAND
DROOP_GAIN_TT
Gain
CR_DROOP_GAIN
[%]
| Speed |
0
CR_SP_DROOP_L CR_SP_DROOP_H
[%] [%]
Rev.S
234
4GBF0632
FLG_LD_DROOP
Drooping speed reference changeover flag
Standard value: 3 (for using RMFC control), 0 (for not using RMFC control)
Limit: 0-3
Selects the torque to generate the drooping speed reference. See the table below for available options.
FLG_LD_DROOP The torque to generate the drooping speed reference

0 SFC_T_R Torque reference obtained by SFC control
(Torque reference obtained by speed regulator if
SFC control is not used)
1 DT_LD_TRQ Load torque obtained by elimination of acceleration
/ deceleration torque
2 TCMP_DROOP Torque reference obtained by elimination of torque
compensation
3 RMFC_LD_TRQ Load torque obtained by RMFC control
FLT_DROOP
Drooping speed filter
Limit: 0.0 - 1024.0 rad/s
Set to 0 when the filter is not used.
Rev.S
235
4GBF0632
3.5.2. Speed control

ASPR or ASR can be selected for speed control. The selection of speed control is set by FLG_ASR.
ASPR is configured by the PI control with the anti-over shoot control. ASR performs speed control almost equal to ASPR by
individually setting the proportion gains, of the speed reference and the speed feedback.
Unless otherwise stated, ASPR is used.
3.5.2.1. Setting common to speed control

FLG_ASR
Speed regulation 2 selection
Standard value: 0
Limit: 0, 1
Switching the use speed control.
When ASPR is used, set to 0. When ASR is used, set to 1.
FLG_RNTD_FER
Pre-excitation zero speed control flag
Standard value: 0
Limit: 0, 1
To enable this function, to control the speed reference at 0%, while pre-excitation is taking place, set to 1.
The motor may revolve slightly in a “vector control with speed sensor” application that is under constant excitation and has
no mechanical brake. Set to 1 in such an application.
FLT_SP
Speed filter
Limit: 0.0 - 1024.0 rad/s
Sets the filter time constant of speed feedback. When the filter is not used, set to 0.
When using simple SFC, set to 0.
FLT_T_R
Torque filter
Limit: 0.0 - 1024.0 rad/s
[Related parameters] ASPR_P, ASPR_W1, ASPR_A, ASPR_AT
Rev.S
236
4GBF0632
3.5.2.2. ASPR
The figure below shows the speed control 1 (ASPR) block diagram.
The speed reference signal SP_R and the speed feedback are input with the count/weight of 1.0/100% and the deviation
between these two is subjected to proportional/integral operations and then output. After this signal is subjected to speed
filtering and the torque limit is processed, its torque reference SFC_T_R is output with count/weight of 1.0/100%.
Control response is performed with the following parameter settings.
ASPR_A: (Anti-overshoot gain) Setting this parameter to a large value can reduce excessive overshoot.
ASPR_AT: (Anti-overshoot time constant) Adjust this parameter to reduce overshoot.
2
ASPR_P: (Proportional gain) This parameter is set by the GD and target response.
ASPR_W1: (Response target) This parameter sets the target response with 0.01 rad/s unit.
2 2
Note, if GD of the machine is extremely large compared to GD of the motor, or if there is axial resonance, the control
response may not be increased.
<Integration>
1.0/100% 1.0/100%
Speed <Proportion> <Filter> <Torque limit>

SFC_T_R
reference + +
Section 3.5.1
SP_R - - - -
FLT_T_R Limit calculation To Section
Section 3.5.4.2 3.5.4.1
Speed detection
Section 3.5.2
SP_F
<Anti-over>
<Speed control> Motor group
ASPR_A: Anti-overshoot gain (Speed control gain)
ASPR_AT: Anti-overshoot gain time constant switching
(Option)
ASPR_P: Proportional gain
Switching of a
ASPR_W1: Response target
maximum of 4 stages
FLG_MOT_G
<Anti-overshoot>
SFC (option)
Simulator
<ACR> <Inertia> <Proportion>
<Differentiation> <Limit> SFC_DATA
To Section
5.4.4
FLT_SFC: ACR simulator OP_SFC_P: Proportion
OP_SFC_J: Inertia OP_SFC_D: Differentiation
OP_SFC_A: Anti-overshoot
LMT_SFC_D: Differentiation limit
Fig 3.5.3 Speed Control (ASPR)
Rev.S
237
4GBF0632
ASPR_A
ASPR anti-overshoot gain
Limit: 0 - 100000
ASPR_AT
ASPR anti-overshoot ω AT gain
Limit: 0.00 - 1000.0 rad/s
ASPR_P
ASPR proportional gain
Standard value: 100
Limit: 0 - 100000
ASPR_W1
ASPR response gain
Limit: 0.00 - 1000.0 rad/s
Sets the ASPR (Automatic Speed Regulator) gain.
2 2
ASPR_P is calculated with the following formula: GD [kg·m ] of the motor with machinery is included. Motor power is P [kW]. The
target response is ωc [rad/s];
ASPR_ P 40.96 c Tacc
2 2
GD Nb Nt
Tacc 10 3 [sec]
365 P Nb
-1 -1
Nb: Base speed [min ], Nt: Top speed [min ]
When RMFC control is used, set zero to ASPR_A and ASPR_AT.
[Related parameters] You may choose to make it valid or invalid with FLG_MOT_G (parameter), ASPR_G (variable) and
ASPR_G_NO (variable). This is valid when FLG_ASR = 0.
FLT_PPIEO
P control switching discharge filter
Limit: 0.0 - 1024.0 rad/s
This parameter sets the discharge time constant, of the speed control integration term, for switching from PI Control to P Control,
in speed control ASPR mode.
[Related parameters] MSK_DI4, SP_PPI_PLGP
SP_PPI_PLG
Speed control PI/P change speed
Limit: 0.0 - 125.0% (1.0/100%)
Sets the speed which changes the speed control from PI control to P control. P control is applied when the absolute value of
speed feedback is lower than this parameter value(SP_PPI_PG).
PI/P change can also be performed by SC_PPI (bit 11) of DI_EX4 or SERSEQDATA4. Set SP_PPI_PLG=0 to prioritize SC_PPI.
Rev.S
238
4GBF0632
3.5.2.3. ASR
The figure below shows the speed control 2 (ASR) block diagram.
The speed control circuit receives the speed reference signal SP_R and the speed feedback signals at the weight rate of
1.0/100% and the deviation output of these two proportional calculations. The integral calculation result, of the deviation
of these two signals, is output. After these signals are subjected to speed filtering and torque limit processing, the torque
reference SFC_T_R is output with 1.0/100% weighting. This control operation works when FLG_ASR=1 is set. The
control response is made with the following parameter settings:
ASR_P_CMD: Speed reference proportional gain

ASR_P_FBK: Speed feedback proportional gain
ASR_I: Integral gain Target response x 0.5 is normally set.
ASR_ERR_MAX: Error dead-band max. value These are used when the speed control error deadband detection
ASR_ERR_MIN: Error dead-band min. value is used to select the tension control & the speed control 2 (ASR) in
the torque control mode.
ASR_W0: Speed control response gain Target response x 2 is normally set.
ASR_J0: Speed control inertia gain
2 2
When the machine’s GD is much larger than the motor’s GD or if shaft resonance occurs, the control response may not
be increased to a higher level.
ASR_J0
Transmission
1.0/100% ASR_W0 x ASR_J0_T
Speed
<Proportional> 1.0/100%
reference + <Filter> <Torque limit>
3.5.1 T_R
+ +
SP_R - X
<Proportional> + + 3.5.4.1
FLT_T_R Limit
calculation
3.5.4.2
<Integration>
Speed - +
detection
3.5.2
SP_F
<Speed control 2>
ASR_P_CMD : Speed reference proportional gain
<Filter>
ASR_P_FBK: Speed feed back proportional gain
ASR_I: Speed control integral gain
ASR_ERR_MAX: Speed control error deadband max value
ASR_ERR_MIN: Speed control error deadband min value
FLT_SP_MODL
<Friction loss>
OP_TCMP_LOS
OP_TCMP_LOS_DB <Windage loss>
+ +
+
OP_LOSFUNCm_SP FLG_TCMP
OP_LOSFUNCn_TRQ
(m=0 to 4, n=1 to 4)
d/dt OP_TCMP_J_G
<Torque compensation>
Fig 3.5.4 Speed Control (ASR)
Rev.S
239
4GBF0632
ASR_ERR_MAX, ASR_ERR_MIN
ASR error dead band maximum, ASR error dead band minimum
Standard value: (ASR_ERR_MAX) 5.0 %
(ASR_ERR_MIN) -5.0 %
Limit: (ASR_ERR_MAX) 0.0 - 125.0 % (1.0/100%)
(ASR_ERR_MIN) -125.0 - 0.0% (1.0/100%)
In torque control, these settings are used when tension control and ASR (Speed Regulation 2) is changed with speed
control error dead band detection.
The dead band operates with tension control selection (ST = 1).
If the speed control error is inside of the dead band, switch to tension control. If outside of the dead band and the material is cut
with tension control, the motor is accelerated. When the error is outside of the dead band, the switch to ASR will occur
automatically.
When using this function, the torque control with speed limit function (switching by comparing torque references) is invalid.
Please don't input the bias speed reference added to the line speed.
Set to 0 to not use.
[Related parameters] Valid when FLG_ASR = 1 and FLG_TENSEL = 1
ASR_I
ASR integral gain
Limit: 0.00 - 1000.0 rad/s
Sets the integral gain of ASR (Speed Regulation 2)
Usually, set to the target response x 0.5.
(Standard value)
Target response 10 rad/s
ASR_ I 10.00 0.5 5.00
[Related parameters] Valid when FLG_ASR = 1
ASR_J0
ASR inertia gain
Standard value: 105
Limit: 0 - 1000000
Note: Initialize
Sets the inertia gain which is used in ASR (Speed Regulation 2) and torque feed forward compensation.
When FLG_ASR_J0 = 0 ASR_J0 = Tacc × 10.8576
When FLG_ASR_J0 = 1 ASR_J0 = Tacc × 13.1072
Tacc: Acceleration time [s] from zero to rated speed (top speed) with rated torque
(Standard value)
When FLG_ASR_J0 = 0, Tacc = 1 s
ASR_J0 = 1 × 104.8576 = 105
[Related parameters] This is valid when FLG_ASR = 1 or FLG_TCMP = 1. FLG_ASR_J0
ASR_P_CMD, ASR_P_FBK
ASR speed reference proportional gain, ASR speed feedback proportional gain
Standard value: ASR_P_CMD: 8192.0
ASR_P_FBK: 16384.0
Limit: 0 - 32768.0 (16384/gain1)
Sets the proportional gain of ASR (Speed Regulation 2). 16384 counts are equivalent to a gain of 1.
Usually, set the speed reference proportional gain to a gain of 0.5 and speed feedback proportional gain to a gain of 1.0.
(Standard value)
ASR_P_CMD = 0.5 speed reference ASR_P_FBK = 1.0 ×SR_P_FBK = 1.0
Rev.S
240
4GBF0632
ASR_W0
ASR response gain
Limit: 0.00 - 1000.0 rad/s
Sets the response gain of ASR (Speed regulation 2)
Usually, set to target response x 2.
(Standard value)
Target response 10 rad/s
ASR_W0 = 10.00 × SR_W0 = 10
FLG_ASR_J0
Speed regulation 2 inertia gain scale selection
Standard value: 0
Limit: 0, 1
Sets the scale of the inertia gain (ASR_J0), which is used in ASR (Speed regulation 2) and torque feed forward
compensation.
Case of FLG_ASR_J0 = 0: ASR_J0 = Tacc × 104.8576
Case of FLG_ASR_J0 = 1: ASR_J0 = Tacc × 13.1072
Tacc: Acceleration time [s] from zero to rated speed with rated torque
[Related parameters] Valid when FLG_ASR = 1 or FLG_TCMP = 1. ASR_J0
Rev.S
241
4GBF0632
3.5.3. Torque reference and current reference

Signal SFC_T_R is equivalent to the torque reference, which is the speed control result and is input to calculate the torque
limit and process di/dt in order to calculate the final torque reference signal T_R.
3.5.3.1. Speed control and tension control

If the optional tension control is used, the TRQ_REF signal obtained from the calculation results in the speed control
compared with the external input tension reference TENS_R signal, to find the torque reference. In this optional control,
the operation is made based on TENS_R, used as torque reference, during normal operation and the speed control circuit
functioning as a speed limit. (Operation is made based on the external torque reference in winding machines. However, if
materials are broken, operation is changed to the speed control operation.)
1.0/100%
IMPACT_TEST25
Output of torque
reference speed
control 1.0/100%
Section 3.5.3 + TRQ_REF
SFC_T_R <Torque limit> <di/dt>
+ T_R
Torque reference To
A Section
input Min Limit calculation LMT_DIDT_P 3.5.5
EXT_TRQ B Section 3.5.4.2
(option) LMT_DIDT_N
1.0/100% TENS_R
A Tension control
Tension reference + + Max selection
B
TENS_R1 sequence
(option) + +
A CUT detection
Tension auxiliary A>=B
reference input B If control, of the output CUT output
TENS_R_A speed control signal,
continues for 60 ms or SSEQOUT1 Bit 2
(option)
A longer, this status is
determined as an
Tension reference input A<=B
with gain B asCUT detection.
TENS_R2
(option)
X
EXT_TENS_GAIN
Reverse coiling option

command
DI1_INP
R_TEN
Fig 3.5.5 Torque Reference
Rev.S
242
4GBF0632
3.5.3.2. IQ limit
The IQ limit has a standard flat characteristic, but as shown in the figure below, it can also be set according to the speed
and operating conditions.
(1) Standard setting

The IQ limit has the following settings and a flat characteristic.
The graph in the figure shows this characteristic.
LMT_IQ_BAS: Set 110%, etc. according to OL specification.
LMT_IQ_TOP: Set the same value as the value above.
LMT_IQ_INV: Set the same value as the value above.
LMT_SP_BASE: Set 125%. (Taper is not used)
(2) Speed rate
At a speed set by LMT_SP_BASE or lower, the IQ limit is LMT_IQ_BAS. It is a value on a straight line between point
(LMT_SP_BASE, LMT_IQ_BAS) and point (100% speed, LMT_IQ_TOP) at a higher speed. The setting is performed in
0.1% units.
It is also possible to set the IQ limit during regenerative operation.
LMT_IQ_BAS: Set the IQ limit at a speed specified by LMT_SP_BASE or lower.
LMT_IQ_TOP: Set the IQ limit at 100% speed.
LMT_IQ_INV: Set the IQ limit during regenerative operation.
LMT_SP_BASE: Set less than 100%.
Speed feedback IQ limit calculation IQ limit Section

LMT_IQ_BAS IQMAX4 3.5.5
LMT_IQ_TOP IQ limit
LMT_IQ_INV
LMT_SP_BASE
Reverse rotation IQ limit Forward rotation

Regenerating Motoring
LMT_IQ_BAS
LMT_IQ_TOP
LMT_IQ_INV
100%
Speed
LMT_SP_BASE
Section
3.5.4
Magnetic X Torque
flux reference
Reverse rotation Forward rotation
FL_R limit
Motoring Regenerating LMT_TRQ
Fig 3.5.6 IQ Limit
Rev.S
243
4GBF0632
LMT_IQ_TOP
Top speed torque current limit
Limit: 0.0 - 400.0 % (1.0/100%)
Sets the top speed Q axis current limit.
LMT_IQ_TOP = 110.0% is recommended for a 110% overload specification. The maximum setting is
CS_EQUIP_CURR
CS_MOTOR_CURR × 100 % .
LMT_IQ_BAS
Base speed torque current limit
Limit: 0.0 - 400.0 %(1.0/100%)
Sets the Q axis current limit at base speed.
LMT_IQ_BAS = 110.0% is recommended for a 110% overload specification. The maximum setting is
CS_EQUIP_CURR
CS_MOTOR_CURR × 100 % .
LMT_SP_BASE
IQ limit taper base speed
Limit: 0.0 - 130.0% (1.0/100 %)
Set to 125.0 % when a taper is not used.
LMT_IQ_EXTOFF
Stopping torque limit
Limit: 0.0 - 400.0 %(1.0/100%)
Sets the stopping torque limit
[Related parameters] Valid when FLG_IQ_EXTOFF = 1 or FLG_IQ_EXTROFF = 1.
FLG_IQ_EXTOFF
EXT-off torque limit changeover flag
Standard value: 0
Limit: 0, 1
When using LMT_IQ_EXTOFF as the torque limit while DI input EXT is off, set to 1.
If both this parameter and FLG_IQ_EXTROFF are set to 1, LMT_IQ_EXTOFF is used as the torque limit while either EXT or EXTR
is off.
FLG_IQ_EXTROFF
EXTR-off torque limit changeover flag
Standard value: 0
Limit: 0, 1
Set to 1 when using LMT_IQ_EXTOFF as the torque limit while EXTR is off.
If both this parameter and FLG_IQ_EXTOFF are set to 1, LMT_IQ_EXTOFF is used as the torque limit while either EXT or EXTR
is off.
Rev.S
244
4GBF0632
LMT_IQ_INV
Regenerative torque current limit
Standard value: 110 %
Limit: 0.0 - 400.0 (1.0/100%)
CS_EQUIP_CURR
Used to suppress the regenerative power. The maximum setting is CS_MOTOR_CURR × 80 % .
LMT_SP_INV
Regenerative IQ limit operation start speed
Limit: 0.0 - 125.0 % (1.0/100%)
Sets the operating speed when lowering the IQ limit at regeneration time. Set to 5% when LMT_IQ_INV is used, and to
125% when not in use.
LMT_IQ_INV is used when IQ is regenerative at ABS_SP_F_OUT ≧ LMT_SP_INV. In addition, LMT_IQ_BAS is used
when IQ is regenerative at ABS_SP_F_OUT ≦ LMT_SP_INV. Low frequency current control may not be effective if it is
set to 5% or less.
LMT_TRQ
Torque limit
Limit: 0.0 - 400.0 % (1.0/100%)
Note: Initialize
Sets the motoring torque limit.
LMT_TRQ_INV
Regenerative torque limit
Limit: 0.0 - 400.0 % (1.0/100%)
Note: Initialize
Sets the regenerative torque limit.
LMT_TRQ_EX
External torque limit
Limit: 0.0 - 400.0 % (1.0/100%)
When bit10 of the digital input (DI_EX5) is 1, this setting is enabled as the torque limit.
When it is 0, LMT_TRQ is enabled as the torque limit.
LMT_TRQ_INV_EX
Regenerative torque limit
Limit: 0.0 - 400.0 % (1.0/100%)
When bit10 of the digital input (DI_EX5) is 1, this setting is enabled as the re-generation torque limit.
When it is 0, LMT_TRQ_INV is enabled as the re-generation torque limit.
Rev.S
245
4GBF0632
LMT_DIDT_N, LMT_DIDT_P
di/dt upper limit N (reverse rotation), di/dt upper limit P (forward rotation)
Standard value: 2.0 %/ms
Limit: 0.0 - 100.0 %/ms (1.0/(100%/ms))
Sets the maximum current change per ms at regeneration time.
If the parameter is set to 0.0%/ms, a 100.0%/ms setting will be automatically applied.
(LMT_DIDT_N) When the speed is positive, this gain limits the deceleration rate of torque. When the speed is negative, this gain
limits the acceleration rate of torque.
(LMT_DIDT_P) When the speed is positive, this gain limits the acceleration rate of torque. When the speed is negative, this gain
limits the deceleration rate of torque.
Speed feedback
Time
0
Torque limit LMT_DIDT_N
Time
LMT_DIDT_P
Rev.S
246
4GBF0632
3.5.3.3. Slip frequency

This section describes parameters associated with the slip frequency.
MI_R2_CMP
Motor secondary resistance compensation gain
Standard value: 0
Limit: 0 - 100000
Sets the motor’s secondary resistance compensation gain.
MI_R2C_G
R2 compensation gain
Standard value: 0
Limit: 0 - 100000
Sets the gain for R2 compensation gain to compensate motor secondary time constant according to the motor
temperature detected by the Pt temperature sensor.
Set as follows according to the motor coil.
MI_R2C_G Content
4337 Coil winding material: Copper
4428 Coil winding material: Aluminum
0 Disables this compensation.
MI_T2
Motor secondary time constant
Limit: 0.000 - 10.000 s
Sets the secondary time constant for the motor.
MI_T2_BIAS
Secondary time constant compensation bias
Standard value: 0
Limit: -1249 - 1249
Sets the bias value for the secondary time constant compensation at regeneration time.
This bias suppresses E1_R of any speed control with field weakening until regeneration time.
Sets the compensation of secondary time constant as 1000 cnt/ sec at base speed.
Motor secondary
time constant
MI_T2
MI_T2_BIAS
MI_T2 _
1000
|speed|
Base speed
Rev.S
247
4GBF0632
MI_T75_BIAS
R2 compensation 75°C bias
Standard value: 75.00°C
Limit: 0.00 - 300.0°C
Sets the R2 compensation bias at 75°C.
MI_DCMP_G
D-axis compensation gain
Standard value: 0
Limit: -100000 - 100000
This gain is used when the vector axis deviates (ED_R 0 at static status) in the high speed area.
For an inverter which outputs over 200Hz frequency, set to 20000.
FLG_T2_CMP_BAS
Secondary time constant compensation circuit voltage reference flag
Standard value: 0
Limit: 0, 1
Notes: Available in firmware 11A or later
Switch the $MI_FBK_G adjustment method when weakening magnetic flux control is available.
0: E2Q = base speed (%) at base speed (as before 10A soft)
1: E2Q = 100% at base speed (as with no weakening magnetic flux control)
Rev.S
248
4GBF0632
3.5.4. Current control

Drive uses the triangle-wave comparison pulse width modulation (PWM). This section describes the current control using the
triangle-wave comparison PWM.
3.5.4.1. D-Q axis current control
In D-Q axis current control, current (I1) is separated into the flux current (Id) component and its orthogonal torque current
(Iq) component. They are controlled separately. Magnetic flux is calculated according to the speed. Speed control is made
to flow the flux current (Id) in proportion to the required magnetic flux. When load torque is added, only the torque current
in proportion to the required torque is increased. This vector diagram is shown in the figure below.
Torque Torque
current current
Iq Iq I1
I1
Flux current Flux current
Id Id
Fig 3.5.7 Current Vector of Vector Control

This method is used to control current the D-Q coordinates orthogonal to the magnetic flux direction shown in the figure
above. Both the reference and the feedback values can be handled as DC values. This achieves high performance
control irrespective of output frequencies.
(1) IQ control.
The torque reference, which is the result of the aforementioned speed control, is input and divided by the magnetic flux to
obtain an IQ reference. This IQ reference and IQ feedback signal are input and proportional integral operations are carried
out on them. An induction voltage compensation and L compensation are added to this result to obtain an EQ reference.
(2) ID control.
A magnetic flux reference is obtained according to the speed reference. An ID reference corresponding to this magnetic flux
is obtained. A proportional integral operation is carried out on these ID reference and ID feedback signals. The L
compensation is added to this result to obtain an ED reference.
The block diagram of the D-Q axis current control is shown in Fig 3.5.8.
Rev.S
249
4GBF0632
Induction voltage compensation

Flux
Reference ACR_E2
FL_R
Frequency F0
<Integral>
1.0/100% <IQ Limit> Modulation

rate
Torque
<Proportional>
Reference IQ_R EQ_R
+ + + + +
3.5.3 + + +
T_R - - - + 3.5.6
LMT_E
Limit R ated Current
Calc. Adjustment L Compensation
3.5.4.2 CS_MOTOR_CUR R
SFC CS_EQU IP_CURR
SFC_DATA
(option) ID_REF
3.6.10 IQ_FBK
<Anti-overshoot>
Frequency
<Current Control> F0
ACR_A: Anti-overshoot ACR_WL
ACR_P: P gain
ACR_W1: Response
IQ_R EF
<Integral>
<Proportional>
ED_R
ID_R
+ + + + + -
MI_ID_BASE
- - 3.5.6
ID_R Rated C urrent

Adjustment
ID_FU NC CS_MOTOR_CUR R
CS_EQU IP_CURR Modulation
FL_R rate
MA_FLUXFUNC ID_FBK
00 - 20
Fig 3.5.8 D-Q Axis Current Control
Rev.S
250
4GBF0632
ACR_A
ACR anti-overshoot gain
Standard value: 0
Limit: 0 - 32767
Sets the ACR (Automatic Current Regulator) anti-overshoot gain.
ACR_P
ACR proportional gain
Limit: 0 - 32767
Sets the ACR (Automatic Current Regulator) proportional gain.
ACR_PI_MUL
ACR multiplication gain
Standard value: 0
Limit: 0-3
ACR_PI_MUL
Sets the power of the ACR (Automatic Current Regulator) proportional gain. ACR_P is powered by 2 .
ACR_W1
ACR response gain
Standard value: 120 rad/s
Limit: 0 - 2000.0 rad/s
Sets the ACR (Automatic Current Regulator) response gain.
ACR _ P ACR _ W1
ACR _ I _ T
F _ ACR
ACR_I_T integral gain
ACR_P proportional gain
ACR_W1 response gain [rad/s]
F_ACR current control frequency [Hz]
ACR_AB_RT
Inverter ACR bank-to-bank ratio setting
Standard value: 0 % (50.0 %)
Limit: 0.0 – 100 %
Note: Not used
For 2-winding motor with twin ACR configuration, sets the B bank ACR usage percentage.
If 0.0% is set, the ratio will be set to A:B=100%:0%. The B bank reference is completely from the A bank ACR; if 10% is set, the
ratio will be set to A:B=90%:10%, if 100% is set, the ratio will be set to A:B=0%:100%, and the B bank reference is independent
from the A bank ACR.
Rev.S
251
4GBF0632
ACR_E2
ACR E2 compensation gain
Limit: 0 - 100000
Sets the ACR (Automatic Current Regulator) E2 compensation gain.
(Setting Example)
ACR _ E 2 1
CS _ SP _ BASE [%] 10000 CS _ MOTOR _ FREQ [Hz ] 64 EQCMP _ E 2
1024 4096
EQCMP _ E 2 CS _ DC _ VOLT [ V ] 3
CS _ MOTOR _ VOLT [ V ]
16384 2 2
CS _ MOTOR _ VOLT [ V ] 2 1024 4096
ACR _ E 2 16384 2
CS _ DC _ VOLT [ V ] 3 CS _ SP _ BASE [%] 10000 CS _ MOTOR _ FREQ [Hz ] 64
In the case of a Field-weakening ratio of 1:5, with a TOP frequency 50 Hz, a DC voltage 680V rating and a Motor rated
voltage of 460V,
460 2 1024 4096
ACR _ E2 16384 2 11861
680 3 1
10000 50 64
5
In the case of a Fixed magnetic field (other conditions are the same), ACR_E2 = 2372.
Set ACR_E2=0 for an oscillatory load. For example, the hoisting machine of a crane.
Set ACR_E2=0 in the case of synchronous capture specifications.
ACR_WL
ACR ω Li compensation gain
Standard value: 0 (Other than PMSM)
4000 (PMSM)
Limit: 0 - 100000
Sets the ACR (Automatic Current Regulator) ω Li compensating gain.
FLG_E2CMP
Secondary voltage compensation exclusion
Standard value: 0
Limit: 0, 1
Set to 1 to exclude adding the secondary voltage compensation value (E2CMP) to the q axis voltage compensation value
(EQCMP).
[Related parameters] ACR_E2
FLT_FLX_ACR
ACR_E2 compensation magnetic flux filter
Limit: 0.0 - 1024.0 rad/s
Sets the time constant of the magnetic flux filter for ACR_E2 compensation. When the filter is not used, set to 0.
LMT_E
Voltage limit
Limit: 0.0 - 140.0 % (100.0%/percent modulation 1)
Sets the voltage reference limit at the output of the current control.
100% assumes 100% of the PWM carrier amplitude (percent modulation 1).
Rev.S
252
4GBF0632
FLT_VI_POWER
VI_POWER filter
Limit: 0.0 - 1024.0 rad/s
Sets the output power filter. The filter output is stored to VI_POWER_FLT.
Rev.S
253
4GBF0632
3.5.5. Voltage reference

A three-phase voltage reference is established from the Q and D axes voltage references.
(1) Voltage reference

EQ_R and ED_R, the results of current control, are input. Then, , the information of magnetic flux, is input and a 3-phase
voltage reference is obtained. Since, in this case, an interval is provided between ON and OFF of the IGBTs, a dead time
compensation is inserted. Furthermore, another compensation is inserted when the output voltage of a specific phase is
saturated to output the voltage reference for the PWM control.
(2) PWM control
The PWM control section outputs gate pulse signals based on the voltage reference of each phase.
(3) Gate board
The gate board insulates gate signals generated by the PWM section and amplifies them to drive the IGBTs.
Gate Pulse
Q-axis Voltage 3 Phase Voltage Reference VU_REF PWM Control Gate IGBT
Reference
EQ_R Q U Board
X D cos Q sin( )
3.5.5
Y D sin Q cos( )
A-axis Voltage VV_REF
Reference U X
ED_R D V
3.5.5 X 3
W Y
Flux Position 2 2 WV_REF
QOCMP
V U W W
Dead Time Compensation Maximum Voltage

DEAD_T_CMP_T Compensation
(variable)
Fig 3.5.9 Voltage Reference
(4) Dead time compensation

In the figure above, the IGBTU and IGBTX are inserted in series between the " " and "-" sides of the DC power supply.
If both the IGBTU and IGBTX are on at the same time, the DC power supply is shorted, causing an overcurrent to
flow in the IGBTU and IGBTX, which may destroy the main circuit. Moreover, the IGBT has a naturally quick on-state
operation, while its off-state operation is relatively slow. When carrying out ON-and-OFF control of the IGBT, after
turning off one side for a while, another side is turned on. This wait time is called dead time.
Providing this dead time prevents DC short-circuits. However, this control prevents the desired voltage from being output in
the control circuit. This is why the dead time compensation is provided.
Rev.S
254
4GBF0632
3.6 Inverter Optional Function

This section describes optional functions and their associated parameters for the inverter.
3.6.1. Field weakening

Operation shown in Fig 3.6.1 a) to make the magnetic flux constant is used for general operation method of the induction
motor. In the drive, operation is performed with the magnetic flux and ID_REF made constant. At this time, the induced
voltage is calculated by multiplying the speed by the magnetic flux. The voltage is then increased in proportion to the
speed.
When in auto field weakening control and operating at a higher speed, the induced voltage is controlled at a constant level
based on the magnetic flux reference in inverse proportion to the speed feedback, after the voltage has reached the rated
operating voltage.
If the speed exceeds the starting speed of the field weakening control, the induced voltage becomes constant and the motor
output shows the constant output characteristics. (Fig 3.6.1 b))
V, f V, f
V
f
V,f
Speed Speed
Magnetic flux Magnetic flux
Speed Speed
a) Constant magnetic flux b) Field weakening control
Fig 3.6.1 Field Weakening Control Characteristics
FLG_SP_BASE2
Field 2-step weakening selection
Standard value: 0
Limit: 0, 1
When weakening the magnetic field in two steps, set to 1. A changeover instruction is entered by SPA1.
FLT_FLX
Flux filter
Limit: 0.0 - 1024.0 rad/s
When sensor-less flying restart, based on speed search, is used, set to 100.0 rad/s.
FLT_FWEAK_SPF
Flux weakening input speed feedback filter
Limit: 0.0 - 1024.0 rad/s
Set the filter for speed feedback used with the flux weakening input. When filter is not used, sets 0.
Rev.S
255
4GBF0632
MA_V_RATE
Field weakening area voltage taper
Limit: -125.0 - 125.0 % (1.0/100%)
Set to 20.0% when the difference in voltage between at the base speed and rated speed is 20%.
[Related parameters] MA_FLUX_FUNC00 - 20, CS_SP_BASE
MI_ID_BASE
Motor excitation current
Standard value: 20.0 % (Other than PMSM)
0.0 % (PMSM)
Limit: 0.0 - 100.0 % (1.0/100%)
Sets the excitation current for the motor.
OP_LF_FAI_HF, OP_LF_FAI_LF
Low frequency field weakening start frequency H, Low frequency field weakening reset frequency L
Standard value: 0
Limit: 0 - 100 Hz
Used when the excitation current is large. Used for torque control by the torque current, by weakening the flux current,
when at low frequency.
In the frequency area under OP_ LF _ FAI_ LF ABS_ FO OP_ LF _ FAI_ HF , the low frequency field
becomes weak.
OP_LF_KS_FAI
Low frequency field weakening flux reference
Limit: 0.0 - 100.0 % (1.0/100%)
Used when the excitation current is large. Used for torque control by the torque current, by weakening the flux current,
when at low frequency.
OP_SP_BASE2
Field weakening by 2 steps base speed
Limit: 0.0 - 125.0 % (1.0/100%)
Sets the field weakening base speed, for changing the CS_SP_BASE setting in 0.1% units.
Field weakening by 2 steps is valid, when FLG_SP_BASE2 = 1.
When field weakening is not used, set FLG_SP_BASE2 = 0.
MA_FLUXFUNC00 - MA_FLUXFUNC20
Flux saturation function
Standard value: 0.0% - 100.0%, incremented by 5.00%
Limit: 0.0 - 100.0 % (1.0/100%)
Sets the flux saturation (21 points) carve.
Sets the value in 5.0% between 0.0% and 100.0% when there is no saturation.
When field weakening is performed, adjust MA_FLUXFUNC so that the motor voltage (E1_R_V) will be uniform for the
entire speed range above the base speed.
The speed for the flux saturation function n is as the following equation.
CS _ SP _ BASE 100
Speed
n 5
Speed [%]
CS_SP_BASE [%]
n = 0 - 20
[Related parameters] MA_V_RATE, CS_SP_BASE
Rev.S
256
4GBF0632
3.6.2. Torque control

In winding machines, the winding materials are controlled at a specified tension. Therefore, the host PLC calculates the
torque (reference) to be output from the motor. Additionally, the drive unit outputs a torque corresponding to this torque
reference. Furthermore, operation is made with speed control when the winding is completed or winding of the next
materials is started.
On the other hand, if operation based on the torque reference sent from the host PLC continues in case of a fault, such as
material breakage, overspeed may result. In such case, the control is automatically changed to the speed control. (Torque
control with speed limiting function)
When using this torque control, set FLG_TENSEL to “1”.
The following describes how to use the torque control for operation with normal rotation and positive torque.
Normal rotation and

positive torque
a) Winding (tension control and normal winding) b) After winding (speed control)
Reverse rotation and negative torque
c) Winding (reverse winding)
Fig 3.6.2 Tension Control

(1) Speed control
To operate with speed control, the speed reference corresponding to the line speed is input in the same manner as
described for normal operation.
When the EXT sequence signal is turned on and the ST sequence signal is turned off, the speed control is started.
(2) Torque control (with speed limit function)
As the operation preparation complete (READY) and operation command (EXT) signals are on, the torque control
selection (ST) signal is turned on. After that, the TRQ_REF signal is compared with the external torque reference
TENS_R1 signal. External torque reference TENS_R1, whichever is smaller, is detected by the logic that picks up
the minimum value, and then used as the torque reference T_R signal.
When performing the torque control with the speed limit function, the speed reference signal, which is approximately
5% higher than the line speed, is input from the host PLC. As a result, a speed reference 5% higher than the actual
speed is input and the TRQ_REF single showing the speed control calculation result is saturated by the positive
torque limit value. The external torque reference is then used for control.
(If operation is made with the external torque reference, the motor is actually operated at a speed equivalent to the
line speed. As the speed reference is increased 5%, the speed deviation always becomes positive, causing the
speed control calculation result to increase to the limit value.)
Rev.S
257
4GBF0632
1.0/100%
Speed controlling IMPACT_TEST25
Output of torque
reference
speed control 1.0/100%
section 3.5.3 + TRQ_REF
<Torque limit> <di/dt>
+ T_R
Torque reference A
input Min Limit LMT_DIDT_P
EXT_TRQ(option) B calculation LMT_DIDT_N
section 3.5.4
1.0/100%
A Tension control
Tension reference + + TENS_R Max selection sequence
TENS_R1 (option) B Torque controlling
+ +
A CUT detection
Tension auxiliary A>B
reference input B If control, of the CUT output
TENS_R_A output speed control SSEQ_OUT1 Bit 2
(option) signal, continues for
60 ms or longer, this
Tension reference input status is determined
with gain 1 as an asCUT
TENS_R2 X detection.
10000
(option)
EX_TENS_GAIN
Reverse coiling option

command
DI1_INP
R_TEN
Fig 3.6.3 Torque Control

(3) Speed limit operation
If operation continues with the external torque reference, even though materials are broken in the torque control, the
motor is accelerated. If the speed is accelerated to a level 5% or more than the line speed, the saturation status of
the speed control is cancelled. The TRQ_REF value becomes small and this signal is then used for control. That is,
the control is changed to the speed control.
(4) Cut detection
This detects that the operation is changed to the speed limit operation. When the control with the speed control
output signal (speed control) continues for 60 ms or longer, the cut signal is output. However, this cut signal is used
for the host PLC. Even though this signal is detected, the control state on the drive unit is not changed.
Rev.S
258
4GBF0632
(5) Reverse winding option

There are two winding directions, normal winding and reverse winding, as shown in Fig 3.6.4 a) and c). A desired
winding direction is selected using the normal winding/reverse winding switch (R_TEN).
R_TEN: 0 = Normal winding
1 = Reverse winding
The TRQ_REF signal with polarity is compared with the external torque reference TENS_R1 signal with polarity.
The logic detects the maximum value. The larger external torque reference TENS_R1 is used as the torque
reference T_R.
Table 3.6.4 shows the polarity of each control amount.
Table 3.6.1 List of Polarities in Torque Control
External
Speed Tension
Coiling direction speed Speed bias Operation mode
feedback reference
reference
Normal winding Reverse deceleration
Payoff reel (Normal re-winding) - + - +
Reverse winding Normal deceleration

(Reverse re-winding) + - + -
Tension reel Normal winding + + + + Normal acceleration

Reverse winding - - - - Reverse acceleration
Payoff reel Tension reel Tension reel Payoff reel

Normal winding (normal re-winding) Normal winding Normal winding Normal winding (normal re-winding)
Reverse deceleration operation Normal acceleration operation Normal acceleration operation Reverse deceleration operation
a) Normal operation b) Reverse operation
Payoff reel Tension reel

Reverse winding (reverse re-winding) Normal winding
Normal deceleration operation Reverse acceleration operation
c) Reverse winding operation
Fig 3.6.4 Normal and Reverse Winding Operations
Rev.S
259
4GBF0632
FLG_TENSEL
Torque control selection flag
Standard value: 0
Limit: -2 - 2
Selects the control shown as below table.
FLG_TENSEL Function
Torque control is performed.
2 When QSTOP is input under torque control, the control mode switches to
speed control, and motor is stopped urgently.
Torque control is performed.
When QSTOP is input under torque control, the speed reference
1
decreases and when speed control output is lower than torque reference,
the control mode switches to speed control and motor is stopped urgently.
0 Speed control is performed.
Control of mechanical coupled motors is performed.
When QSTOP is input under mechanically coupled motor control, an
-1 emergency motor stop is not performed.
When EXT is turned off in this control, the drive is still running while the
motor is spinning.
Control of mechanical coupled motors is performed.
When QSTOP is input under mechanically coupled motor control, the
-2 control mode switches to speed control, and motor is stopped urgently.
When EXT is turned off in this control, the drive stops the operation and
the motor becomes free-running.
FLG_TENS_CUT
Tension control cut detection select flag
Standard value: 0
Limit: 0-1
Note: Not used
To execute cut detection as soon as the speed feedback (SP_F) is larger than the speed reference (SP_R) in tension
control mode, set this parameter to 1. When this parameter is set to 0, cut detection will depend on the largest external
torque.
Rev.S
260
4GBF0632
3.6.3. Motor parameter group and Speed control gain selection

Four sets of motor parameter groups may be set and selected.
2 2
The speed control response is determined relative to load GD . Therefore, as load GD fluctuates a great deal (such as in a winder
2
application), the speed response changes (as GD increases with the same gain, the response slows down).
This equipment is provided with a function to keep the operation stable by using different speed control gains.
a) Motor parameter group and Speed control gain selection
In this mode, the equipment is operated by switching four sets of motor parameter and speed control gains which
were preset with an external signal.
FLG_MOT_G=1; When selected with serial communication (MOT_G_NO).
FLG_MOT_G=3; When selected with Digital input combination (BIEXH_MOT_G0 and G1).
In these modes, group cannot be changed while running.
It is necessary to stop converter to change the group in firmware 09B or older. Turn off UV signal.
b) Continuous ASPR gain
This function changes the gain continuously with an external signal.
FLG_MOT_G: Set 2 for continuous switching of speed control gain.
ASPR_GAIN_EXT: Externally changed speed control gain. Gain 1(100%) with 100.
FLG_RMFC_G_ADJ: Set 1 when the gain is applied to RMFC control gains.
ASPR_GAIN_EXT is limited to a value between 1.0 and 1000. In other words, the gain control function operates in a
2
direction in which the gain is increased. This function is used by presetting a gain when GD is at a minimum and
adjusting the gain externally so that it is increases with respect to the preset gain.
Moreover, the continuous gain can be available for RMFC control gains (proportional: RMFC_P, inertia: RMFC_JM).
c) Only Speed control gain selection
In this mode, only speed control gains are selected.
FLG_MOT_G=4; When selected with serial communication (ASPR_G_NO).
FLG_MOT_G=5; When selected with Digital input combination (BIEXH_MOT_G0 and G1).
In these modes, group can be changed while running.
Rev.S
261
4GBF0632
FLG_MOT_G
ASPR gain, motor parameter group selection
Standard value: 0
Limit: 0-5
Sets ASPR/Motor group selection method.
FLG_MOT_G Content ASPR Motor Selected by

0 ASPR gain, and motor parameter are fixed to GROUP0 X X X
Selects ASPR gain and motor parameter from GROUP 0 - MOT_G_NO
1 O O
3 with serial communication. (Serial Comm)
Speed control gains are continuously changeable. See
2 O X X
the Item of LMT_ASPRG.
Selects ASPR gain and motor parameter from GROUP 0 - BIEXH_MOT_G0
3 O O
3 with Digital input combination. BIEXH_MOT_G1
Selects ASPR gain from GROUP 0 - 3 with serial ASPR_G_NO
4 O X
communication. Motor group is fixed to GROUP0 (Serial Comm)
Selects ASPR gain from GROUP 0 - 3 with Digital inputs BIEXH_MOT_G0
5 O X
combination. Motor group is fixed to GROUP0 BIEXH_MOT_G1
ASR speed control gains are not included. For changing speed control gains, ASPR needs to be used (FLG_ASR=0).
[Related parameters] LMT_ASPRG
(a) ASPR group

GROUP0 GROUP1 GROUP2 GROUP3
ASPR_A OP_ASPR_A_1 OP_ASPR_A_2 OP_ASPR_A_3
ASPR_AT OP_ASPR_AT_1 OP_ASPR_AT_2 OP_ASPR_AT_3
ASPR_P OP_ASPR_P_1 OP_ASPR_P_2 OP_ASPR_P_3
ASPR_W1 OP_ASPR_W1_1 OP_ASPR_W1_2 OP_ASPR_W1_3
OP_SFC_A OP_SFC_A_1 OP_SFC_A_2 OP_SFC_A_3
OP_SFC_D OP_SFC_D_1 OP_SFC_D_2 OP_SFC_D_3
OP_SFC_J OP_SFC_J_1 OP_SFC_J_2 OP_SFC_J_3
OP_SFC_P OP_SFC_P_1 OP_SFC_P_2 OP_SFC_P_3
FLT_SFC OP_FLT_SFC_1 OP_FLT_SFC_2 OP_FLT_SFC_3
FLT_SP OP_FLT_SP_1 OP_FLT_SP_2 OP_FLT_SP_3
FLT_SPSFCD OP_FLT_SPSFCD_1 OP_FLT_SPSFCD_2 OP_FLT_SPSFCD_3
FLT_T_R OP_FLT_T_R_1 OP_FLT_T_R_2 OP_FLT_T_R_3
RMFC_P OP_RMFC_P_1 OP_RMFC_P_2 OP_RMFC_P_3
RMFC_W1 OP_RMFC_W1_1 OP_RMFC_W1_2 OP_RMFC_W1_3
VF_FCMP_A OP_FCMP_A_1 OP_FCMP_A_2 OP_FCMP_A_3
VF_FCMP_AT OP_FCMP_AT_1 OP_FCMP_AT_2 OP_FCMP_AT_3
VF_DVCMP_A OP_DVCMP_A_1 OP_DVCMP_A_2 OP_DVCMP_A_3
VF_DVCMP_AT OP_DVCMP_AT_1 OP_DVCMP_AT_2 OP_DVCMP_AT_3
Rev.S
262
4GBF0632
(b) Motor group

ACR_P OP_ACR_P_1 OP_ACR_P_2 OP_ACR_P_3
ACR_W1 OP_ACR_W1_1 OP_ACR_W1_2 OP_ACR_W1_3
MI_G_E2 OP_MI_G_E2_1 OP_MI_G_E2_2 OP_MI_G_E2_3
MI_ID_BASE OP_ID_BASE_1 OP_ID_BASE_2 OP_ID_BASE_3
MI_T2 OP_MI_T2_1 OP_MI_T2_2 OP_MI_T2_3
MI_FBK_G OP_MI_FBK_G_1 OP_MI_FBK_G_2 OP_MI_FBK_G_3
MI_L_CMP OP_MI_L_CMP_1 OP_MI_L_CMP_2 OP_MI_L_CMP_3
MI_R1_SET OP_MI_R1_SET_1 OP_MI_R1_SET_2 OP_MI_R1_SET_3
MI_R1_SET_LF OP_MI_R1_LF_1 OP_MI_R1_LF_2 OP_MI_R1_LF_3
SL_I_DB OP_SL_I_DB_1 OP_SL_I_DB_2 OP_SL_I_DB_3
CS_MOTOR_FREQ OP_MOT_FREQ_1 OP_MOT_FREQ_2 OP_MOT_FREQ_3
CS_MOTOR_VOLT OP_MOT_VOLT_1 OP_MOT_VOLT_2 OP_MOT_VOLT_3
MA_MOTOR_KW OP_MOT_KW_1 OP_MOT_KW_2 OP_MOT_KW_3
CS_MOTOR_POLE OP_MOT_POLE_1 OP_MOT_POLE_2 OP_MOT_POLE_3
CS_MOTOR_CURR OP_MOT_CURR_1 OP_MOT_CURR_2 OP_MOT_CURR_3
CS_MOTOR_RPM OP_MOT_RPM_1 OP_MOT_RPM_2 OP_MOT_RPM_3
(c) Motor group (SM control)

MS_TIME_FC MS_OP_TIME_FC_1 MS_OP_TIME_FC_2 MS_OP_TIME_FC_3
MS_START_IQ MS_OP_START_IQ_1 MS_OP_START_IQ_2 MS_OP_START_IQ_3
MS_KF1 MS_OP_KF1_1 MS_OP_KF1_2 MS_OP_KF1_3
MS_KF2 MS_OP_KF2_1 MS_OP_KF2_2 MS_OP_KF2_3
MS_VL_I MS_OP_VL_I_1 MS_OP_VL_I_2 MS_OP_VL_I_3
MS_VL_P MS_OP_VL_P_1 MS_OP_VL_P_2 MS_OP_VL_P_3
MS_VL_A MS_OP_VL_A_1 MS_OP_VL_A_2 MS_OP_VL_A_3
MS_VL_AT MS_OP_VL_AT_1 MS_OP_VL_AT_2 MS_OP_VL_AT_3
(d) Motor group (ACC/DEC rate)

CR_RATE_ACC CR_RATE_ACC2 CR_RATE_ACC3 CR_RATE_ACC4
CR_RATE_DEC CR_RATE_DEC2 CR_RATE_DEC3 CR_RATE_DEC4
* Only when FLG_MOT_G = 1 or 3, rate group change is enabled.

* CR_RATE_ACC5/6 and CR_RATE_DEC5/6 are common for all groups.
Rev.S
263
4GBF0632
LMT_ASPRG
Continuous switching ASPR gain limit
Standard value: 100 %
Limit: 100.0 - 100000 % (1.0/100%)
Sets the limit for ASPR_GAIN_EXT, which is the scale factor of the ASPR gain, when the ASPR gain continuous
switching mode (FLG_MOT_G = 2) is selected.
100 counts are equivalent to a scale factor of 1, and 1000 counts are equivalent to a scale factor of 10.
[Related parameters] Valid when FLG_MOT_G = 2
FLG_RMFC_G_ADJ
Continuous switching RMFC gain flag
Standard value: 0
Limit: 0-1
Sets to 1 when the ASPR gain continuous switching mode (FLG_MOT_G = 2) is selected. ASPR_GAIN_EXT, which the
scale factor of the ASPR gain, is applied for RMFC gains (RMFC_P, RMFC_JM).
RMFC_P is multiplied by ASPR_GAIN_EXT. Also, RMFC_JM is multiplied by 1/ASPR_GAIN_EXT.
[Related parameters] RMFC_P, RMFC_JM
Rev.S
264
4GBF0632
3.6.4. Simulator Following Control (SFC)

When the machine axes resonate, the simulator following control (SFC) function is available.
a) Simulator
With SFC, a speed control output signal is input and an acceleration torque signal (simulation) is obtained with the
ACR simulator. This signal is input to the inertia simulator to obtain an estimated speed signal.
ACR simulator: First order lag operation
Inertia simulator: Integral operation
b) Deviation
Calculates the deviation between the above estimated speed signal and actual speed signal.
c) Proportion
The above deviation signal is subjected to gain operation processing and added to the speed control result. This
proportional output is effective for the improvement of recovery response to an impact load generated by biting of
rolling material.
Under normal speed control, the speed control output becomes a (load torque acceleration torque) reference.
Adding SFC control makes the load torque signal an output from the SFC proportional term, while the speed control
output becomes equivalent to the acceleration/deceleration torque reference. Because of this, the acceleration
torque signal is obtained by the ACR simulator as shown in a) above.
d) Differentiation
The above deviation signal is differentiated and added to the torque reference.
This signal is effective for vibration control.
When the SFC function is not used, set each gain, of SFC, to 0.
Four gains are available for each SFC control gain. These gains can be selected with the speed control gain switching
function.
OP_SFC_A
SFC anti-overshoot gain
Standard value: 0
Limit: 0 - 100000
OP_SFC_D
SFC differential gain
Standard value: 0
Limit: 0 - 100000
OP_SFC_J
SFC inertia moment
Standard value: 0
Limit: 0 - 100000
OP_SFC_P
SFC proportional gain
Standard value: 0
Limit: 0 - 100000
Sets the SFC gain.
FLG_SFC_D_SEL
SFC derivative compensation disabling flag
Standard value: 0
Limit: 0, 1
To disable SFC derivative compensation at the time of tension control, set to 1.
Rev.S
265
4GBF0632
FLT_SFC
SFC torque filter
Limit: 0.0 - 1024.0 rad/s
Set to 0 when the filter is not used
FLT_SPSFCD
SFC derivative compensation speed filter
Limit: 0.0 - 1024.0 rad/s
This filter setting is used for speed detection, which becomes the simple SFC’s input.
Set to 0 when the simple SFC is used.
LMT_SFC_D
SFC differential limit
Limit: 0.0 - 400.0 % (1.0/100%)
Sets the limit of SFC_DATA
Rev.S
266
4GBF0632
3.6.5. Sensorless vector control

This sensorless vector control performs the vector control of the induction motor without the use of the speed sensor. This
sensorless vector control provides the simple control feature of the V/f control and the high performance of the vector
control. The following describes the features of the sensor-less vector control.
(1) Sensor installation and wiring construction are not required.
(2) This control is applicable to motors, in which the sensor cannot be installed, such as two-axis motors or super high-speed
motors, and other motors, which require special sensors, such as explosion-proof motors.
(3) This vector control technology is used for parallel drive of multiple motors, which is difficult to control by conventional vector
control.
(4) This sensorless vector control provides excellent stability and large starting torque when compared to V/f control.
(5) The torque can be limited, ensuring stable rapid acceleration and deceleration.
3.6.5.1. Cautions
The following cautions must be observed when using sensor-less vector control.
(1) PLG pulse signals obtained using the vector control with sensor cannot be obtained with sensor-less vector control.
(2) The speed feedback signal obtained by operations of sensor-less vector control shows the specified accuracy only when the
inverter is supplying current to the motor. Therefore, if the motor is coasting to a stop or when it is running by outside force,
the speed feedback signal does not show correct values.
(3) Do not use the inverter in an application where the inverter is starting a motor in the direction opposite to a running motor.
(4) When the motor is replaced, readjustment is required (except when the replaced motor is the same type and form as before.)
(5) When field weakening control is used, rapid acceleration/deceleration such as current limit acceleration/deceleration is not
allowed.
When sensor-less vector control is used to drive multiple motors in parallel, be careful with the following as well as what
was explained above.
(6) A twin drive inverter cannot balance the current between banks and thus it cannot be used in a system to drive multiple
motors in parallel. (For example, it is not possible to drive 20 motors with 10 motors on each bank.)
(7) Motors running in parallel must have the same rating. The loading devices, of the motors, must have the same moment of
2 2
inertia (GD ). If different rated motors are included or the load condition changes continuously (GD is different), parallel
operation is not possible.
(8) When motors are running at a constant speed of less than 10% and the loading devices of the motors are unbalanced,
motors with no load or light load receive over excitation and thus require overheat measures.
(9) Stopping torque (torque required for motor + 50%) must be secured. (For example, when load torque of 200% is required,
the motor must have 250% or more torque output capability.)
(10) The terminal voltage of the motor must be determined so that the maximum voltage at overload with cable drop will remain
within the inverter’s output rated voltage.
(11) Variation in the number of motors while running can be up to 50% at one time.
(12) When connecting an additional motor to the running inverter, design the sequence so that a motor is added only when the
inverter output voltage and operating speed are at approximately 30% or less. In this case, the number of units that may be
connected to the inverter at the same time is one unit or within 10% of the total number of motors.
(13) The minimum speed is 1.8 Hz. A continuous constant speed operation or jog run at a speed less than 1.8Hz cannot be
made.
(14) APC (position control) has limitations on how to stop the motor. For example, with a speed of 5% or less, a coast stop or DC
braking (DB) is possible but may not be applied in an application where a targeted stopped position accuracy cannot be
obtained unless the speed is controlled and reduced to 5% or less.
Rev.S
267
4GBF0632
FLG_SL_ID_SET
Sensorless voltage control selection
Standard value: 0
Limit: 0, 1
When executing voltage control with multiple units, set to 1.
FLG_SL_MON_SP_N
Sensorless monitor speed setting
Standard value: 0
Limit: 1-3
When reversing the sign of measuring speed, set to 1.
Value Purpose
0 Not changed the sign of measuring speed
1 Reversing the sign of measuring speed
2 To use only one phase PLG (no B-Phase)
3 To use TG (tachogenerator)
FLG_SL_SP_EST
Sensorless speed estimation signal selection flag
Standard value: 1
Limit: 0-2
Used when selecting signal for sensor-less speed estimation.
Value Purpose
0 To use ED_REF and EQ_REF
1 To use ED_FBK0 and EQ_FBK0
2 To use ED_REF0 and EQ_REF0
MI_FBK_G
Voltage detection gain
Limit: 0 - 100000
Set the voltage detection gain.
A standard value is calculated by the following equation for both of field weakening control and non-field weakening.
(Standard value)
3 Voltage Rank 2 CS _ DC _ VOLT
MI _ FBK _ G 4096
2 2000 CS _ MOTOR _ VOLT
<Example>
In the case of Rated DC voltage 775V, Motor rated voltage 6600V, 6000V series,
3 6000 2 775
MI _ FBK _ G 4096 3534
2 2000 6600
Rev.S
268
4GBF0632
MI_G_E2
E2 compensation gain
Standard value: With speed sensor: 0
Without speed sensor: 420
Limit: 0 - 100000
Sets the induced voltage (E2) compensation gain for sensor-less control.
Adjust so that WOCD will be 0% when at 100% speed.
MI_G_E2_R2
E2 detection gain
Standard value: 600
Limit: -100000 - 100000
Sets the gain to operate E2_FBK from E2Q under voltage control. Please adjust this value so that ID_R1F becomes
nearly zero under multiple motor operation.
SL_AVR_I
Sensorless voltage control proportional gain
Limit: 0 - 100000
Sets the voltage control proportional gain for sensor-less multiple motor driving.
[Related parameters] Valid when FLG_SL_ID_SET = 1.
SL_AVR_P
Sensorless voltage control proportional gain
Limit: 0 - 100000
Sets the voltage control proportional gain for sensor-less multiple motor driving.
SL_DE2_BIAS
Sensorless voltage control dead band
Limit: -400.0 - 400.0% (1.0/100%)
Sets the voltage control dead band for sensor-less multiple motor driving.
SL_DE2_G
Sensorless voltage deviation correction ratio
Limit: -100000 - 100000
Sets the voltage deviation correction ratio for sensor-less multiple motor driving.
32767 count makes Gain = 0.5.
[Related parameters] Valid when FLG_SL_ID_SET = 1. SL_DE2_BIAS, SL_FLT_DE2
SL_DE2_G_LMT
Sensorless voltage deviation correction ratio limit
Limit: 0 - 30000
Sets the limit of the voltage deviation gain calculated by multiplying the voltage deviation correction ratio (SL_DE2_G).
[Related parameters] FLG_SL_ID_SET, SL_DE2_BIAS, SL_DE2_G, SL_FLT_DE2
Rev.S
269
4GBF0632
SL_DFDT_GAIN
Low speed frequency limit control gain
Limit: 0.0 - 10.0 % (1.0/100%)
SL_DFDT_SP_H, SL_DFDT_SP_H2, SL_DFDT_SP_L, SL_DFDT_SP_L2

Low speed frequency limit control sp_H (SL_DFDT_SP_H)
Low speed frequency limit control sp_H2 (SL_DFDT_SP_H2)
Low speed frequency limit control sp_L (SL_DFDT_SP_L)
Low speed frequency limit control sp_L2 (SL_DFDT_SP_L2)
Parameter Standard value Limit

(1.0/100%) (1.0/100%)
SL_DFDT_SP_H 4.0 % 0.0 - SL_DFDT_SP_L2
SL_DFDT_SP_H2 15.0 % 0.0 - 125.0%
SL_DFDT_SP_L 1.0 % 0.0 - SL_DFDT_SP_H
SL_DFDT_SP_L2 8.0 % 0.0 - SL_DFDT_SP_H2
Sets the automatic output frequency limit control corresponding to the value of re-generating loads in sensor-less operation, at low
speed.
This control is effective in an application which operates with high re-generation loads at low speed.
This control outputs the frequency correction gain according to the diagram below. The product of this output gain and torque
reference corrects speed reference. For example, in case of standard settings, when torque reference has been -50% at 5%
speed, speed reference will be increased by 2% to 7%. In case of motoring loads, the frequency correction gain will be 0.
Do not use this control when using the drooping off function with CR_SP_DROOP_H and CR_SP_DROOP_L at the low speed
area. Set SL_DFDT_GAIN = 0 to disable this control.
[Related parameters] CR_SP_DROOP_H, CR_SP_DROOP_L
Frequency correction gain
GAIN
ABSSF
(absolute value of
speed feedback)
0
L H L2 H2
H: SL_DFDT_SP_H
H2 : SL_DFDT_SP_H2
L: SL_DFDT_SP_L
L2 : SL_DFDT_SP_L2
GAIN : SL_DFDT_GAIN
Rev.S
270
4GBF0632
SL_DFDTLMT
Sensorless df/dt limit normal value
Limit: 0.0 - 300.0 % (1.0/100%)
Sets the normal value of the changed ratio limit of the estimated frequency.
SL_E2_OS
Sensorless voltage reference offset
Limit: -400.0 - 400.0 % (1.0/100%)
Sets the voltage reference offset for voltage control.
The setting of 0.00 - 3.00% should be used as a guide.
SL_E2D_A
Sensorless E2D incompleted differential gain
Limit: 0 - 100000
Sets the incomplete differential gain of the d-axis secondary voltage E2D.
SL_E2D_AT
Sensorless E2D incompleted differential time constant
Standard value: 0.0 rad/s (5.0 rad/s)
Limit: 0.0 - 1000.0 rad/s
Sets the incomplete differential time constant of the d-axis secondary voltage E2D.
SL_E2LMT_BASE, SL_E2LMT_GS, SL_E2LMT_OS

Sensorless maximum current field strengthening limit BAS (SL_E2LMT_BASE)
Sensorless maximum current field strengthening limit GS (SL_E2LMT_GS)
Sensorless maximum current field strengthening limit OS (SL_E2LMT_OS)

(1.0/100%) (1.0/100%)
SL_E2LMT_BASE 0.0 % -400.0 - 400.0%
SL_E2LMT_GS 0.0 -100000 - 100000%
SL_E2LMT_OS 0.0 % -400.0 - 400.0%
Setting of the correctional limit calculation for field strengthening (SL_G_E2RC_T) during sensor-less multiple motor driving.
SL_LMT_E2_T
Limit
SL_E2LMT_BASE
(%) -SL_E2LMT_GS/2048
(Gain)
0
SL_E2LMT_OS | E2_REF |
(%) (%)
Rev.S
271
4GBF0632
SL_E2RC_BASE, SL_E2RC_GS, SL_E2RC_OS

Sensorless maximum current field strengthening gain BAS (SL_E2RC_BASE)
Sensorless maximum current field strengthening gain GS (SL_E2RC_GS)
Sensorless maximum current field strengthening gain OS (SL_E2RC_OS)

(1.0/100%) (1.0/100%)
SL_E2RC_BASE 0.0 % -400.0 - 400.0 %
SL_E2RC_GS 0.0 -100000 – 100000 %
SL_E2RC_OS 0.0 % -400.0 - 400.0 %
Setting of the correctional gain calculation for field strengthening (SL_G_E2RC_T) during sensor-less multiple motor driving.
SL_G_E2RC_T
Gain
SL_E2RC_BASE
(%) -SL_E2RC_GS/2048
(Gain)
0
SL_E2RC_OS | E2_REF |
(%) (%)
SL_FLT_DE2
Sensorless voltage deviation filter
Limit: 0.0 - 256.0 rad/s
Sets the voltage deviation filter for sensor-less multiple motors control.
SL_FLT_E2Q
Sensorless secondary q axis voltage filter
Limit: 0.0 - 1024.0 rad/s
SL_FLT_EDQFBK
Sensorless speed estimation voltage feedback filter
Limit: 0 - 1000 rad/s
Filter setting for voltage signal used in sensor-less speed estimation.
SL_FLT_FS_R
Sensorless slipping frequency correction filter
Limit: 0.0 - 256.0 rad/s
Filter setting against torque current reference in order to calculate slipping frequency correction level from torque current
reference.
Rev.S
272
4GBF0632
SL_FLT_IQF
Sensorless torque current filter
Limit: 0.0 - 1024.0 rad/s
Sets the sensor-less torque current filter time constant to use compensation for d-axis difference of the sensor-less speed
estimated.
SL_FLT_MON_SP
Sensorless monitor speed filter
Limit: 0.0 - 1024.0 rad/s
Sets the filter time constant of sensor-less monitor speed.
When the inverter has a speed detector for monitoring, set to the same value as FLT_SP.
SL_FLT_WOCD
Sensorless WOCD filter
Limits: 0.0 - 1024.0 rad/s
Sets the WOCD filter for sensor-less speed estimation.
SL_FS_R_CMP_G
Sensorless slipping frequency correction gain
Standard value: 0
Limit: 0 - 100000
This gain setting is for slipping frequency correction from the torque current reference.
SL_I_DB
Sensorless DB mode excitation current setting
Limit: 0.0 - 100.0 % (1.0/100%)
Sets the DC brake (DB) current while not operating.
When standard case, set the same value of MI_ID_BASE.
SL_ID_FORCE_LF
Sensorless low speed excitation forcing
Limit: 0.0 - 100.0 % (1.0/100%)
Sets the excitation forcing current for securing the start toque.
SL_IM_D_TH
Sensorless maximum current dead band
Limit: 0.0 - 100.0 % (1.0/100%)
This sets the dead band of the maximum current detection gain during sensor-less multiple motor driving.
SL_KCW_BASE
Sensorless speed estimated correction base speed
Limit: 0.0 - 100.0 % (1.0/100%)
Sets the gain of the speed estimate correction circuit.
Set to 0.00% when speed is not weakened in the high-speed area.
Rev.S
273
4GBF0632
SL_KCW_I
Sensorless speed estimated correction integral gain
Limit: 0 - 100000
SL_KCW_I2
Sensorless speed estimated correction integral gain 2
Without speed sensor: 0 (250)
Limit: 0 - 100000
Sets the gain, of the speed estimate correction circuit, using the output of an incomplete differential, of sensor-less E2D.
This is available when SL_E2D_A is used.
[Related parameters] SL_E2D_A, SL_E2D_AT
SL_KCW_P
Sensorless speed estimated correction proportional gain
Limit: 0 - 100000
SL_LMT_IQMAX_I
IQ limit of sensorless instantaneous power loss compensation initialization
Limit: 0.0 - 400.0% (1.0/100%)
This is the setting of initial value for torque current limit value during sensor-less restart after instantaneous power loss.
SL_LMT_WOC_L
Sensorless output frequency lower limit
Standard value: With speed sensor: 0.0 %
Without speed sensor: 0.5 %
Limit: 0.0 - 20.0 % (1.0/100%)
The lower limit setting of the sensor-less output frequency.
[Related parameters] LMT_SP_L, TIME_LMT_WOC
SL_SP_CHK_LVL
Sensorless speed reference interlock level
Limit: 0.0 - 125.0 % (1.0/100%)
Sets the maximum level of external speed reference, which is used for start interlock, in sensor-less operation.
When 0 is set, 1.5% is applied for the level.
[Related parameters] FLG_SL_SP_CHK
SL_SP_RESTART
Sensorless slipping restart speed reference
Limit: 0.0 - 125.0 % (1.0/100%)
Sets the speed reference used in the speed search of a sensor-less slipping restart. Set to 100% when using sensor-less
flying restart (FLG_RESTART=1).
[Related parameters] FLG_RESTART
Rev.S
274
4GBF0632
SL_WOCD_DISCH
Sensorless WOCD discharge frequency
Limit: 0.0 - 100.0 % (1.0/100%)
In sensor-less speed estimation, WOCD will be discharged if the estimation frequency FREQ_DFDT is at or below this setting.
TIME_LMT_WOC
Release time setting of sensorless polarity reversal limit
Standard value: With speed sensor: 0.000 s
Without speed sensor: 2.000 s
Limit: 0.000 - 300 s
When the sensor-less output frequency limit (SL_LMT_WOC_L) is used, this setting is used to release the frequency limit
when the speed polarity(direction) changes.
[Related parameters] SL_LMT_WOC_L
FLG_SL_DB
Sensorless DB mode
Standard value: 0
Limit: 0, 1
When using DC break (DB), set to 1.
Set to 1 as standard in the sensor-less vector control mode.
FLG_SL_SP_CHK
Sensorless start interlock change
Standard value: 0
Limit: 0, 1
To disable sensor-less start interlock (absolute of speed reference is less than 1.5%), set to 1.
MI_KCT
Torque angle correction gain
Limit: -100000 - 100000
This is used to set the correction gain, to suppress vibration, which occurs when deceleration starts from a high speed.
MI_L_CMP
Reactance compensation gain
Limit: 0 - 100000
Sets the reactance compensation gain.
When in sensor-less operation under the condition of SL_KCW_I, P = 0 with 16% speed reference, adjust MI_L_CMP to
make E2D = 0.
MI_R1_SET
Primary resistance compensation gain
Limit: 0 - 100000
Rev.S
275
4GBF0632
MI_R1_SET_FREQ
Primary resistance compensation changeover frequency
Standard value: With speed sensor: 0.0Hz
Without speed sensor: 0.5Hz
Limit: 0 - 1000Hz
MI_R1_SET_LF
Resistance compensation low-speed area gain
Limit: 0 - 100000
Sets the primary resistance compensation.
Compensates for the voltage drop caused by the motor’s primary resistance and cable’s resistance.
When MI_R1_SET increases, the motor may not be started due to the difference in speed estimate values at startup.
Therefore, at low-speed area (MI_R1_SET_FREQ or less), the setting will be changed to MI_R1_SET_LF.
When in sensor-less operation under the condition of SL_KCW_P, I = 0 and in the DC operation mode, adjust MI_R1_SET_LF to
make E2D = 0.
SL_FLT_IDF
Sensor-less flux current filter
Limit: 0.0 - 1024.0 rad/s
Sets the sensor-less flux current filter time constant to use compensation for d axis difference of sensor-less speed
estimated.
Rev.S
276
4GBF0632
3.6.5.2. Switching Sensorless vector control and Vector control with speed sensor
It is possible to switch sensor less vector control and vector control with speed sensor seamless depending on speed reference.
As an application example, in the case of needing rated torque on the extremal low speed area, it is possible to switch to vector
control with speed sensor on the area. In addition, in the case of having very long sensor cable and unsuitable detected speed in
high speed area, it is also possible to do.
For example, if switched speed (SL_SS_EN_SP) is set to 5 % and switched speed band (SL_SS_EN_BAND) is set to 3 %, and
speed reference (SP_R) is less than 5 %, the detected speed by speed sensor is used speed correction. In the band 3%; that
means speed reference 2 % to 5 % area, both estimated speed by sensor less vector control and detected speed by vector control
with speed sensor are shared and used the control. The share ratio changes in taper in the band width. And in the 2 % speed area,
it is switched to vector control with speed sensor and not used sensor less vector control. The detected speed is SL_MON_SP on
sensor less vector control mode. Therefore the detected speed also used for control for this function. It can be filtered by
SL_FLT_MON_SP but it has also FLT_SP on the latter part. In addition, it is possible to invert the detected speed sign setting by
SL_MON_SP_N.
If this function is used, the system setting (SYSTEM) is set to SL (sensor less vector control).
SL_SS_EN_SP
Sensor less vector control – vector control with speed sensor switching speed
Limit: 0.0 - 125.0 % (1.0/ 100%)
Set to speed switching sensorless vector control and vector control with speed sensor.
[Rated parameters] SL_SS_EN_BAND, FLG_SL_MON_SP_N, SL_FLT_MON_SP
SL_SS_EN_BAND
Sensor less estimate speed correction by sensor detected speed band width
Limit: 0.0 - 125.0 % (1.0/ 100%)
Set to speed switching sensorless vector control and vector control with speed sensor.
[Rated parameters] SL_SS_EN_SP, FLG_SL_MON_SP_N, SL_FLT_MON_SP
Sharing rate of estimate speed feedback

G_SP_FBK0_SL
100%
SP_R [%]
0
Sharing rate of detection speed feedback
G_SL_MON_SP
100%
SP_R [%]
0
SL_SS_EN_BAND
SL_SS_EN_SP SL_SS_EN_SP
Rev.S
277
4GBF0632
3.6.5.3. Multiple motor parallel operation

Multiple motor drive is available with sensor-less vector control or Volts/Hertz control. There are several options to tell how many
motors are connected to the drive.
(1) Upstream controller (PLC) sends IM_NUMBER (%) by either serial communication or analog input.
(2) Drive can have 4 combination of the motor number which may be selected with digital input status IM_NUM_B1 and B0 in
DI_DATA6 (DI_EX5 or SERSEQDATA6).
(3) Motor breaker answer can be sent through MP_LFD5~8, and drive can detect how many motors are connected from the
MSK_MP_LFD5~8 setting.
FLG_IMNUM_SEL
1: Auto detection
Number of motors
Analog input or IM_NUMBER [%]
DI data (1: connect) Serial Commnication
MP_LFD5_INP~
MP_LFD8_INP Connection status Sensorless
(1: connect) Number of motors (DI det) number of motors
Number of
Calculates the motors MP_IM_NUMBER [%] N_IM_LMT [%]
A A A/B X
Mask (1: use) number of bits which are
5%
MSK_MP_LFD5~8 which are on. connected DI_DATA6.B4, B3
(IM_NUM_B1, IM_NUM_B0)
(0,0)
100%
Calculates the Number of OP_IM_NUM1 (0,1)
B
number of bits whole OP_IM_NUM2 (1,0)
which are on. motors
OP_IM_NUM3 (1,1)
Fig 3.6.5 Number of motors detection by DI for sensorless
FLG_SL_IM_N_DET
Parallel motor detection enable flag
Standard value: 0
Limit: 0, 1
When multiple motor operation is used and the detection of the number of motors is required, set to 1.
[Related parameters] OP_IM_NUM_1, OP_IM_NUM_2, OP_IM_NUM_3, SL_FLT_N
FLG_IMNUM_SEL
IM_NUMBER selection
Standard value: 0
Limit: 0, 1
When the auxiliary points of contact of the motor breakers are input to DI, the number of motors are detected by DI data for
sensor-less multiple motor control. When FLG_IMNUM_SEL is set to 1, the number of motors detected by DI is used for
sensor-less multiple motor control. Set 1 to a pertinent bit to mask MSK_MP_LFD5 - 8 at the DI detection.
[Related parameters] MSK_LFD5 - MSK_LFD8
Rev.S
278
4GBF0632
OP_IM_NUM_1~3
Multiple unit drive operation gain
Limit: 0.0 - 100.0 % (1.0/100%)
Set the unit count reduction ratio when multiple motors with the same rating are switched in the speed sensor-less mode.
Set the unit count reduction ratio by entering the selection signal via the DI_EX6 bit IM_NUM_B1, B0.
Decreasing the unit count of motors during operation is possible; however, increasing the unit count of the motors is
prohibited. Set the unit count reduction ratio to 30% or above for better resolution of motor current feedback.
IM_NUM_B1 IM_NUM_B0 Selection for motor number (%)

0 0 100%
0 1 OP_IM_NUM_1
1 0 OP_IM_NUM_2
1 1 OP_IM_NUM_3
[Related parameters] Effective at FLG_SL_IM_N_DET = 1. MSK_DI_EX6, SGN_DI_EX6
SL_FLT_N
Sensorless multiple motor number filter
Limit: 0.0 - 256.0 rad/s
Sets the filter for detecting the number of motors when using sensor-less multiple motor driving.
The number of motors (IM_NUMBER) come from the transmission or the general analog input and is scaled by 10000 counts /
100%. IM_NUMBER is preset 10000 when the motor stops
CP_N_IM_LL
Sensorless lower limit setting for motor number
Limit: 0.0 - 300.0 % (1.0/100%)
Sets the lower limit of motor number when using sensor-less control.
Set to 1 MSK_UVA4(8)N_IM_, when the motor number becomes lower than this setting. The equipment should stop with the
number of the induction motor that failed (N_IM).
(Example)
When the number of induction motors is 8, the equipment operates at 3 or more and stops with the number of induction motor
failure (N_IM) at less 3. The setting value is 25.01% ≦ CP_N_IM_LL ≦ 37.49% according to the following equations. Select the
middle value for keeping away from the detection error. In this case, CP_N_IM_LL = 31.25%.
3
100 % 37.50 %
8
2
100 % 25.00 %
8
[Related parameters] MSK_UVA4
FLG_MAXC_USE
MAXC board use flag
Standard value: 0
Limit: 0, 1
Set to 1 when MAXC board (ARND-0324) is used.
When the inverter is stopped, the detection result of the number of motors becomes 100% (10000 counts) because the MAXC
board cannot detect the number of motors while the inverter has no output current.
Rev.S
279
4GBF0632
SL_FLT_AIO
Sensorless maximum current filter
Limit: 0.0 - 256.0 rad/s
Sets the sensor-less maximum current filter when in sensor-less mode driving multiple motors.
FLG_SL_IM_AVE
Sensorless motor average current selection
Standard value: 0
Limit: 0, 1
When the average motor current with multiple units should be removed from the excitation current, set to 1.
Rev.S
280
4GBF0632
3.6.6. Volts/Hertz control

Volts/Hertz (V/f) control does not use a speed regulator, a current regulator, or speed feedback. It will output voltage in
proportion to the speed/frequency reference.
Fig 3.6.6 shows the block diagram of V/f reference control.
(1) Frequency reference (F_P):

The frequency reference is determined by the speed reference signal(SP_R) and the slip frequency.
The frequency is compensated by the change of the Q axis current for stability control.
(2) Q axis voltage reference (EQ_R):

The Q axis voltage reference is proportional to the frequency reference and flux reference.
This voltage is compensated by the Q axis current for the auto torque boost.
V/f rate can be changed by a selected V/f pattern.
The Q axis voltage is compensated by the change of the D axis current for the stability control.
(3) D axis voltage reference (ED_R):

The D axis voltage can cover the torque that is not enough when starting or running at low speed. (Standard V/f)
This voltage is determined by the Q axis current. (Advanced V/f)
Stall VF_STL_P
prevention VF_STL_W1 Voltage
ID_F
control VF_LMT_STL stabilization
VF_FLT_STL control
VF_STLCMP VF_STLPOINT VF_DVCMP Modulation

VF_DVCMP_A
ratio
Speed - VF_DVCMP_AT
+ + + + -
reference F_P + V/f + EQ_R
SP_R + pattern
CS_VF_MODE
+ +
CS_VF_CURVE
CS_FP1 ~ 5
Frequency Flux reference
IQ_F CS_VP1 ~ 5
stabilization FL_R
control VF_FCMP
CS_KS_FAI
VF_FCMP_A
CS_SP_BASE
VF_FCMP_AT FLT_FLX Overcurrent
VF_CP_ILIM
control
VF_WS VF_TRQBST VF_FLT_ILIM
Slip
frequency
(Advanced V/f) Modulation
VF_WSCMP_EN ratio
CS_MOTOR_RPM Automatic
CS_MOTOR_POLE torque ED_R
CS_MOTOR_FREQ boost +
+
MI_ID_BASE
MI_R1_SET +
MI_L_CMP
VF_TRQBST_GAIN
VF_SP_TRQBST
(Standard V/f)
Start torque
boost
VF_LSP_VBST
VF_LSP_VBSTSP
Fig 3.6.6 Volts/Hertz control block
V/f control has two control techniques.
(1) Standard V/f

In the low-speed region, voltage boost is working to stabilize the V/f control.
(2) Advanced V/f

The voltage drop of the primary side impedance is compensated by using the automatic torque boost which is created by the
primary resistance and primary reactance of the motor.The automatic torque boost is necessary to improve the motor torque,
especially when in a high load application at low speed.(e.g. constant load torque)
Rev.S
281
4GBF0632
Function Page
Volts/Hertz pattern selection 283
Start-up adjustment 285
Standard V/f voltage boost at low speed 286
Advanced V/f voltage boost 287
Stability compensation 289
Flying restart 291
Stall compensation 292
Voltage regulator and adjustment 293
OV protection 294
Momentary voltage drop ride-through 296
Slip compensation 297
Current limit 298
Rev.S
282
4GBF0632
3.6.6.1. Volts/Hertz pattern selection

CS_VF_MODE
V/f control mode selection
Standard value: 0
Limit: 0-2
Note: V/f control
Set V/f control mode as shown in below table.
[Related parameters] VF_CURVE_GAIN, CR_FP1~5, CR_VP1~5
CS_VF_MODE Control Mode Explanation
0 V/f constant mode This mode maintains the ratio of voltage and frequency constant.
This mode has the ratio of voltage and frequency expressed with a
1 V/f square function mode square function.
VF_CURVE GAIN sets the gain of square function.
This mode has the ratio of voltage and frequency expressed with
2 V/f 5 points mode polygonal lines defined by 5 points. The 5 points are set with
CR_FP1 - CR_FP5 and CR_VP1 - CR_VP5.
VF_CURVE_GAIN
V/f control square function curve gain
Limit: 0.0 - 100.0 % (1.0/gain 100%)
Note: V/f control
Sets the square function gain when the square function mode is selected from the V/f control mode. The Ratio of voltage
and frequency is shown on the graph below, including the setting of the square function gain. This is available when
CS_VF_MODE = 1.
[Related parameters] CS_VF_MODE
Voltage V/f ratio
100% 100%
VF_CURVE_GAIN
0 100% 0 100%
Frequency Frequency
Voltage corresponding to frequency is given by following formula:
100% - VF_CURVE_GAIN
Volt[%] = Freq[%]×( 100% ×Freq[%] + VF_CURVE_GAIN)
Rev.S
283
4GBF0632
CR_FP1 - CR_FP5
V/f 5 points frequency
Standard value: (CR_FP1): 20.0%
(CR_FP2): 40.0%
(CR_FP3): 60.0%
(CR_FP4): 80.0%
(CR_FP5): 100.0%
Limit: 0.0 - 125.0% (1.0/100%)
Note: V/f control
CR_VP1 - CR_VP5
V/f 5 points voltage
Standard value: (CR_VP1): 4.0%
(CR_VP2): 16.0%
(CR_VP3): 36.0%
(CR_VP4): 64.0%
(CR_VP5): 100.0%
Limit: 0.0 - 125.0% (1.0/100%)
Note: V/f control
Use these parameters when using an arbitrary relation between the voltage and frequency in V/f control. The values between the
set points are supplemented with the line.
This is available when CS_VF_MODE = 2.
[Related parameters] CS_VF_MODE
Voltage
100%
CR_VP5
CR_VP4
CR_VP3
CR_VP2
CR_VP1
CR_FP1 CR_FP3 CR_FP5 Frequency
CR_FP2 CR_FP4 Base

frequency
Rev.S
284
4GBF0632
3.6.6.2. Start-up adjustment

Some applications need start up torque and some parameters will be sensitive to the motor start.
(1) Voltage boost

Set VF_LSP_VBST for starting voltage.
(2) Starting frequency

Set LMT_SP_L for the starting frequency. Normally, it will be the motor rated slip.
RPM ( Nameplate) CS _ MOTOR _ POLE

CS _ MOTOR _ FREQ
LMT _ SP _ L 120 100 [%]
CS _ MOTOR _ FREQ
(3) Start-up time
Set TIME_ST for the holding time to keep starting voltage and frequency. After this timer, the drive starts acceleration.
(4) Starting frequency jump/rate selection

Set VF_SPL_RATE_EN = 1 if an acceleration rate is needed from 0 Hz to the starting frequency. Otherwise, it immediately
jumps to the starting frequency.
Run command
(B_EXT)
Frequency
LMT_SP_L LMT_SP_L
TIME_ST TIME_ST
Voltage
VF_LSP_VBST VF_LSP_VBST
(a) VF_SPL_RATE_EN=0 (b) VF_SPL_RATE_EN=1
VF_SPL_RATE_EN
Low frequency starting rate enable
Standard value: 0
Limit: 0-1
Set to 1 if the acceleration rate is needed from 0 Hz to the starting frequency.
[Related parameters] VF_LSP_VBST, LMT_SP_L, TIME_ST
Rev.S
285
4GBF0632
3.6.6.3. Standard V/f voltage boost at low speed

Voltage boost can generally be added at low speeds.
Flux Reference
(OPTION)
FL_R Field Weakening V
Vd ED_REF VU_REF
VF_LSP_VBS
G1 G2
2
f /
3 VV_REF
r* Vq EQ_REF VW_REF
X G1 G2
Speed Reference
VF_LSP_VBST
Low speed voltage boost
Limit: 0.0 - 10.0 % (1.0/100%)
Note: V/f control
Sets the voltage reference boost value used at low speed. The relation between the voltage and speed is shown on the
graph below. When using auto torque boost (MI_R1_SET, MI_L_CMP, MI_ID_BASE, VF_TRQBST_GAIN), set
VF_LSP_VBST=0%.
[Related parameters] VF_SPL_RATE_EN, LMT_SP_L, TIME_ST
VF_LSP_VBSTSP
Low speed voltage boost enable frequency
Limit: 0.0 - 100.0 % (1.0/100%)
Note: V/f control
Sets the voltage reference boost enabled frequency. It is used at low speed. The relation between the voltage and speed
is shown on the graph below. When using auto torque boost (MI_R1_SET, MI_L_CMP, MI_ID_BASE,
VF_TRQBST_GAIN), set VF_LSP_VBST=0%.
Voltage
100%
VF_LSP_VBST
Base speed
Frequency
VF_LSP_VBST_SP
+ 2×VF_LSP_VBST
Rev.S
286
4GBF0632
3.6.6.4. Advanced V/f voltage boost

In advanced V/f mode, voltage boost is determined by motor parameters and boost gains. When being used the function, set
VF_TRQBST_GAIN to 100 % standardly. Motor parameters are set properly the following parameters.
MI_R1_SET Primary resistance compensation gain (SL standard value: 100)

MI_L_CMP Reactance compensation gain (SL standard value: 1100)
MI_ID_BASE Motor excitation current (Standard value: 20 %)
In addition, the following parameters are effective for adjustment of start and low speed.
MI_R1_SET_LF Resistance compensation low-speed area gain (SL standard value: 100)
MI_R1_SET_FREQ Primary resistance compensation changeover frequency (SL standard value: 0.5 Hz)
MI_ID_BASE Voltage Ref
FL_R Id* + Vd ED_REF VU_REF

X R1 G1 G2
2
/
l1 3 VV_REF
l1
+
r* + Vq EQ_REF VW_REF
X G1 G2
s +
k
Iq
Flt R1
VF_TRQBST_GAIN
Auto torque boost gain
Limit: 0.0 - 125.0% (1.0/100%)
Note: V/f control
Sets the compensation output gain in automatic torque boost.
[Related parameters] VF_FLT_SP_R, VF_FLT_IQ_F
VF_SP_TRQBST
Base speed of auto torque boost gain
Limit: 0.0 - 125.0 % (1.0/100%)
Note: Not used
Sets the base speed that changes the auto torque boost gain. The boost gain is reduced when below this speed setting.
VF_FLT_SP_R
Auto torque boost speed reference filter
Limit: 0.0 - 1024.0 rad/s
Note: V/f control
Sets the time constant of the speed reference filter used in the auto torque boost.
[Related parameters] VF_TRQBST_GAIN, VF_FLT_IQ_F
Rev.S
287
4GBF0632
VF_FLT_IQ_F
Auto torque boost q-axis current feedback filter
Limit: 0.0 - 1024.0 rad/s
Note: V/f control, Available firmware 07A or later
Set a filter of q-axis current feedback for voltage reference for auto torque boost in V/f control.
[Related parameters] VF_TRQBST_GAIN, VF_FLT_SP_R
Rev.S
288
4GBF0632
3.6.6.5. Stability compensation

There are two kinds of stability compensation. One is based on torque current and compensates frequency (VF_FCMP), the other
is based on field current and compensates voltage (VF_DVCMP).
VF_DVCMP_A
Field Current Stability Anti-overshoot Gain
Standard value: 100
Limit: 0 - 100000
Note: V/f control
Sets the anti-overshoot gain for the voltage stabilization compensation.
[Related parameters] VF_DVCMP_AT, VF_DVCMP_LSP, VF_DVCMP_LSP_G, VF_TIME_DVCMP
VF_DVCMP_AT
Field Current Stability Anti-overshoot Response Gain
Limit: 0.00 - 1024.0 rad/s
Note: V/f control
Sets the anti-overshoot time constant for the voltage stabilization compensation.
[Related parameters] VF_DVCMP_A, VF_DVCMP_LSP, VF_DVCMP_LSP_G, VF_TIME_DVCMP
VF_DVCMP_LSP
Field Current Stability low speed gain change speed
Limit: 0.0 - 125.0% (1.0/100%)
Sets the speed level that changes the field current stability gain
[Related parameters] VF_DVCMP_A, VF_DVCMP_AT, VF_DVCMP_LSP_G
VF_DVCMP_LSP_G
Field Current Stability low speed gain
Limit: 0 - 5000
Sets the field current stability gain at low speed.
[Related parameters] VF_DVCMP_A, VF_DVCMP_AT, VF_DVCMP_LSP
Voltage
compensation
gain
VF_DVCMP_LSP_G
VF_DVCMP_A
VF_DVCMP_LSP
Speed
Rev.S
289
4GBF0632
VF_TIME_DVCMP
Field Current stabilization compensation start time
Limit: 0.000 - 100.0 s
Note: V/f control
Sets the delay time from drive start to compensation start in the field current stabilizing compensation. If it is set to 0, the
setting value becomes same delay time as TIME_ST.
[Related parameters] VF_FCMP_A, VF_FCMP_AT
VF_FCMP_A
Frequency stabilization compensation anti-overshoot gain
Standard value: 500
Limit: 0 - 100000
Note: V/f control
Sets the anti-overshoot gain for the frequency stabilization compensation used by the torque current stability.
[Related parameters] VF_FCMP_AT, VF_TIME_FCMP
VF_FCMP_AT
Frequency stabilization compensation anti-overshoot time constant
Limit: 0.00 - 1024.0 rad/s
Note: V/f control
Sets the anti-overshoot time constant for the frequency stabilization compensation used by the torque current stability.
[Related parameters] VF_FCMP_A, VF_TIME_FCMP
VF_TIME_FCMP
Frequency stabilization compensation start time
Limit: 0.000 - 100.0 s
Note: V/f control
Sets the delay time from drive start to compensation start in the stabilizing compensation. If it is set to 0, the setting value
becomes same delay time as TIME_ST.
[Related parameters] VF_FCMP_A, VF_FCMP_AT
Rev.S
290
4GBF0632
3.6.6.6. Flying restart

In V/f operation, once the drive starts gating at the detected frequency from FSEEK, it is recovering motor voltage of the rated V/f
ratio from the rate set by VF_SRCH_RATE. While recovering voltage, the torque current is decreased to be less than the set
values VF_SRCH_IQ_LV or VF_SRCH_IQ_MAX and changes frequency by the set gain VF_SRCH_SP_G.
VF_SRCH_IQ_LV
Flying restart available current revel
Limit: -100.0 - 100.0% (1.0/100%)
Sets the torque current reference for “speed search” when in “flying restart”. While in speed search mode, the frequency
is adjusted to keep the torque current at this level.
[Related parameters] VF_SRCH_IQ_MAX, VF_SRCH_RATE, VF_SRCH_SP_G
VF_SRCH_IQ_MAX
Flying restart maximum speed available current limit
Limit: 0.0 - 400.0% (1.0/100%)
Sets the max torque current reference for FSEEK flying restart. While in FSEEK mode, the voltage is controlled with a V/f
ratio unless the torque current is more than this level. VF_SRCH_IQ_LV is also used for voltage release when not in
FSEEK mode restart.
[Related parameters] VF_SRCH_IQ_LV, VF_SRCH_RATE, VF_SRCH_SP_G
VF_SRCH_RATE
Flying restart voltage ramp rate
Limit: 0.000 – 30.0 s
Sets the voltage increase rate after the speed search. This is usually the motor time constant. If this rate is fast, the flux
current may become too large.
[Related parameters] VF_SRCH_IQ_LV, VF_SRCH_IQ_MAX, VF_SRCH_SP_G
VF_SRCH_SP_G
Flying restart frequency integral gain
Standard value: 50
Limit: 0 - 100000
Sets the speed search integral gain. When this setting is small, it takes a long time to search for the motor speed. When this
setting is large, it may fail to catch the motor speed.
[Related parameters] VF_SRCH_IQ_LV, VF_SRCH_IQ_MAX, VF_SRCH_RATE
Rev.S
291
4GBF0632
3.6.6.7. Stall compensation

When the load current is bigger than the level set by VF_STLPOINT, the drive will reduce the motor speed to decrease the load
current.
VF_FLT_STL
Stall prevention input current filter
Limit: 0.0 - 1024.0 rad/s
Note: V/f control
Sets the filter time constant for the current feedback used in the stall prevention compensation.
[Related parameters] VF_LMT_STL, VF_STL_P, VF_STL_W1, VF_STLONSP, VF_STLPOINT
VF_LMT_STL
Stall prevention compensation limit
Limit: 0.0 - 125.0 % (1.0/100%)
Note: V/f control
Sets the output limit for the compensation gain used in the output voltage control.
[Related parameters] VF_FLT_STL, VF_STL_P, VF_STL_W1, VF_STLONSP, VF_STLPOINT
VF_STL_P
Stall prevention proportional gain
Limit: 0 - 100000
Note: V/f control
Sets the proportional gain for the stall prevention compensation.
[Related parameters] VF_FLT_STL, VF_LMT_STL, VF_STL_W1, VF_STLONSP, VF_STLPOINT
VF_STL_W1
Stall prevention response time constant
Limit: 0.00 - 1000.0 rad/s
Note: V/f control
Sets the response time constant for the stall prevention compensation.
[Related parameters] VF_FLT_STL, VF_LMT_STL, VF_STL_P, VF_STLONSP, VF_STLPOINT
VF_STLONSP
Sall prevention compensation valid speed
Limit: 0.0 - 125 % (1.0/100%)
Note: V/f control
Sets the minimum valid speed for the compensation in the stall prevention compensation.
[Related parameters] VF_FLT_STL, VF_LMT_STL, VF_STL_P, VF_STL_W1, VF_STLPOINT
VF_STLPOINT
Stall prevention compensation start current
Limit: 0.0 - 400.0 % (1.0/100%)
Note: V/f control
Sets the compensation start current in the stall prevention compensation.
[Related parameters] VF_FLT_STL, VF_LMT_STL, VF_STL_P, VF_STL_W1, VF_STLONSP
Rev.S
292
4GBF0632
3.6.6.8. Voltage regulator and adjustment

The Drive can have a close-loop control to regulate the motor voltage. In an open-loop case, VF_V_ADJ may be used to
manually adjust the voltage.
VF_LMT_VCMP
Output voltage control compensation limit
Limit: 0 - 200.0 % (1.0/100%)
Note: V/f control
Sets the output limit for the compensation gain used in the output voltage control.
[Related parameters] VF_VCMP_P, VF_VCMP_W1, VF_FLT_VCMP, VF_V_ADJ
VF_VCMP_P
Output voltage control proportional gain
Limit: 0 - 100000
Note: V/f control
Sets the proportional gain for the voltage control.
[Related parameters] VF_LMT_VCMP, VF_VCMP_W1, VF_FLT_VCMP, VF_V_ADJ
VF_VCMP_W1
Output voltage control response time constant
Limit: 0.00 - 3000.0 rad/s
Note: V/f control
Sets response time constant for output voltage control.
[Related parameters] VF_LMT_VCMP, VF_VCMP_P, VF_FLT_VCMP, VF_V_ADJ
VF_FLT_VCMP
Output voltage control voltage feedback filter
Limit: 0.0 - 1024.0 rad/s
Note: V/f control
Sets the time constant of the output voltage feedback filter used in the output voltage control.
[Related parameters] VF_LMT_VCMP, VF_VCMP_P, VF_VCMP_W1, VF_V_ADJ
VF_V_ADJ
Voltage adjustment of Volts / Hertz control
Limit: -100.0 – 100.0 % (1.0/100%)
Note: V/f control
Sets the V/f ratio adjustment. When at 50% speed, 1% adjustment gain boosts up 0.5% voltage. When the closed-loop
control (VF_VCMP) is used, do not use VF_V_ADJ.
[Related parameters] VF_LMT_VCMP, VF_VCMP_P, VF_VCMP_W1, VF_FLT_VCMP
Rev.S
293
4GBF0632
3.6.6.9. Over voltage protection

This function is not used for this equipment.
VF_FLT_TQZ
Regeneration control power feedback filter
Limit: 0.0 - 1024.0 rad/s
Note: Not used
Sets the filter time constant for the output power used in the DC voltage rise prevention compensation.
[Related parameters] VF_TQZ_A, VF_TQZ_AT, VF_TQZ_P, VF_TQZ_W1, VF_TQZ_LV
VF_TQZ_A
Regeneration control differential gain
Limit: 0 - 100000
Note: Not used
Sets the differential gain for the DC voltage rise prevention control.
[Related parameters] VF_FLT_TQZ, VF_TQZ_AT, VF_TQZ_P, VF_TQZ_W1, VF_TQZ_LV
VF_TQZ_AT
Regeneration control differential time constant
Limit: 0.00 - 1024.0 rad/s
Note: Not used
Sets the differential time constant for the DC voltage rise prevention control.
[Related parameters] VF_FLT_TQZ, VF_TQZ_A, VF_TQZ_P, VF_TQZ_W1, VF_TQZ_LV
VF_TQZ_P
Regeneration control proportional gain
Limit: 0 - 100000
Note: Not used
Sets the proportional gain of for the DC voltage rise prevention control.
[Related parameters] VF_FLT_TQZ, VF_TQZ_A, VF_TQZ_AT, VF_TQZ_W1, VF_TQZ_LV
VF_TQZ_W1
Regeneration control response time constant
Limit: 0.00 - 1024.0 rad/s
Note: Not used
Sets the response time constant for the DC voltage rise prevention control.
[Related parameters] VF_FLT_TQZ, VF_TQZ_A, VF_TQZ_AT, VF_TQZ_P, VF_TQZ_LV
VF_TQZ_LV
Regeneration control compensation start voltage
Standard value: -80.0 %
Limit: -400.0 - 400.0% (1.0/100%)
Note: Not used
Sets the compensation start voltage for the DC voltage rise prevention control.
[Related parameters] VF_FLT_TQZ, VF_TQZ_A, VF_TQZ_AT, VF_TQZ_P, VF_TQZ_W1
VF_FLT_VDCR
DC Voltage Overvoltage Prevention Control input filter
Limit: 0.0 - 1024.0 rad/s
Note: Not used
Sets the time constant of the DC voltage feedback filter for the DC voltage rise prevention control.
[Related parameters] VF_LMT_VDCR, VF_VDCR_A, VF_VDCR_AT, VF_VDCR_P, VF_VDCR_W1, VF_VDCR_LV
Rev.S
294
4GBF0632
VF_LMT_VDCR
VDC OV prevention control compensation limit
Limit: 0.0 - 125.0% (1.0/100%)
Note: Not used
Sets the output limit for the DC over-voltage control.
[Related parameters] VF_FLT_VDCR, VF_VDCR_A, VF_VDCR_AT, VF_VDCR_P, VF_VDCR_W1, VF_VDCR_LV
VF_VDCR_A
VDC OV prevention control differential gain
Limit: 0 - 100000
Note: Not used
Sets the differential gain for the DC over-voltage control.
[Related parameters] VF_FLT_VDCR, VF_LMT_VDCR, VF_VDCR_AT, VF_VDCR_P, VF_VDCR_W1, VF_VDCR_LV
VF_VDCR_AT
VDC OV prevention control differential time constant
Limit: 0.00 - 1024.0 rad/s
Note: Not used
Sets the differential time constant for the DC over-voltage control.
[Related parameters] VF_FLT_VDCR, VF_LMT_VDCR, VF_VDCR_A, VF_VDCR_P, VF_VDCR_W1, VF_VDCR_LV
VF_VDCR_P
VDC OV prevention control proportional gain
Standard value: 20
Limit: 0 - 100000
Note: Not used
Sets the proportional gain for the DC over-voltage control.
[Related parameters] VF_FLT_VDCR, VF_LMT_VDCR, VF_VDCR_A, VF_VDCR_AT, VF_VDCR_W1, VF_VDCR_LV
VF_VDCR_W1
VDC OV prevention control response time constant
Limit: 0.00 - 1000.0 rad/s
Note: Not used
Sets the response time constant for the DC over-voltage control.
[Related parameters] VF_FLT_VDCR, VF_LMT_VDCR, VF_VDCR_A, VF_VDCR_AT, VF_VDCR_P, VF_VDCR_LV
VF_VDCR_LV
VDC OV prevention control compensation start voltage
Limit: 0.0 - 200.0% (1.0/100%)
Note: Not used
Sets the compensation start voltage for the DC over-voltage control.
[Related parameters] VF_FLT_VDCR, VF_LMT_VDCR, VF_VDCR_A, VF_VDCR_AT, VF_VDCR_P, VF_VDCR_W1
Rev.S
295
4GBF0632
3.6.6.10. Momentary voltage drop ride-through

In Volt/ Hertz control mode, the drive continues running operation by momentary voltage drop ride-through when detecting power
source failure. It carries out automatic current regulation to achieve the ride-through. Set parameter TIME_MVD for the
ride-through time.
VF_MVD_EN
Momentary voltage drop ride-through enable flag
Standard value: 1
Limit: 0-1
Set to 1 when using the momentary voltage drop ride-through function.
[Related parameters] VF_ACR_PLL_P, VF_ACR_PLL_W1
VF_ACR_PLL_P
Proportional gain for speed PLL while ACR
Standard value: 100
Limit: 0 – 100000
Sets proportional gain for speed PLL while ACR
VF_ACR_PLL_W1
Response time constant for speed PLL while ACR
Limit: 0.00 - 1024.0 rad/s
When using V/f ACR control mode, set the speed PLL gain. The Drive will be in the adjustment test mode when step time
(TEST_TIME_STEP) and voltage step (VF_ACR_PLL_STEP) acquire their values. Adjust these parameters so as to not
have over-shoot with the d-axis voltage reference ED_REF.
Note: Current response adjustments, ACR_P and ACR_W1, are also needed. The drive can be in current response test
mode (TEST 26). It is not necessarily to switch SYSTEM. The current response adjustment should be done before
adjusting VF_ACR_PLL_P and VF_ACR_PLL_W1.
The drive will be in V/f ACR mode in the cases shown below;
(a) Momentary voltage drop ride-through
(b) Current limit (ILIM)
(c) DC brake (DB)
VF_ACR_PLL_STEP
0%
TEST_TIME_STEP time
ED_REF
0%
time
[Related parameters] VF_MVD_EN
Rev.S
296
4GBF0632
3.6.6.11. Slip compensation

For slip compensations for V/f control, there are two compensations; the first option is a method that is calculated by rated motor
parameters, and the second one is used speed sensor. The former method needs to set the motor rated RPM
(CS_MOTOR_RPM) and VF_WSCMP_EN to 1, the latter one needs to set VF_WSCMP_EN to 0.
VF_WSCMP_EN
V/f slip compensation enable
Standard value: 0
Limit: 0-1
Note: V/f control
Sets the enable flag for the slip frequency compensation. The compensation gain is calculated from the motor RPM, pole and the
frequency setting. So it needs motor nameplate RPM setting (CS_MOTOR_PRM). The rated torque current produces the rated
slip frequency.
[Related parameters] CS_MOTOR_RPM, CS_MOTOR_POLE, CS_MOTOR_FREQ
VF_WS_ADJ
V/f control slip compensation adjustment gain
Limit: 0.0 - 800.0% (1.0/100%)
Set gain of micro adjustment for compensation gain of slip frequency compensation. The “compensation gain” mentioned here is
culuculated by motor RPM, motor pole, and motor rated frequency in VF_WSCMP_EN = 1.
[Related parameters] VF_WSCMP_EN, VF_WS_ADJ2
VF_WS_ADJ2
V/f control slip compensation adjustment gain for regenerate status
Limit: 0.0 – 800.0 % (1.0/100%)
Set gain of micro adjustment for compensation gain of slip frequency compensation for regenerate status. The “compensation
gain” mentioned here is calculated by motor RPM, motor pole, and motor rated frequency in VF_WSCMP_EN = 1. If it is set to 0,
VF_WS_ADJ is applied to both power running and regeneration.
[Related parameters] VF_WSCMP_EN, VF_WS_ADJ
VF_LMT_WS_GAIN
V/f control rate limit of gain switching for slip compensation
Limit: 0.0 – 300.0 % (1.0/100%)
It can be individually set adjustment gain for slip frequency compensation both power running (VF_WS_ADJ) and regeneration
(VF_WS_ADJ2). Set rate limit at switching the gains.
[Related parameters] VF_WSCMP_EN, VF_WS_ADJ, VF_WS_ADJ2
VF_FLT_ID_F
V/f control d-axis current feedback filter
Limit: 0.0 - 1024.0 rad/s
Set a filter of q-axis current feedback for vector axis compensation in V/f control slip frequency compensation.
[Related parameters] VF_DLT_ID_GAIN
Rev.S
297
4GBF0632
VF_DLT_ID_GAIN
V/f control vector axis compensation gain
Limit: 0.0 - 3000.0 % (1.0/100%)
Set the proportional gain of vector axis compensation for the V/f control slip compensation.
[Related parameters] VF_FLT_ID_F
VF_ASPR_P
V/f speed control proportional gain
Standard value: 0
Limit: 0 - 100000
Note: V/f control
Sets the proportional gain of the V/f simple ASPR. The speed sensor is required for this function. Sets VF_WSCMP_EN
to 0.
[Related parameters] VF_ASPR_W1
VF_ASPR_W1
V/f speed control response time constant
Limit: 0.00 - 1024.0 rad/s
Note: V/f control
Sets the response gain of V/f the simple ASPR. The speed sensor is required for this function. Sets VF_WSCMP_EN to
0.
[Related parameters] VF_ASPR_P
3.6.6.12. Current limit
VF_CP_ILIM
Current limit level
Limit: 0.0 - 400.0% (1.0/100%)
Note: V/f control
Sets the output current limit.
[Related parameters] VF_FLT_ILIM
VF_FLT_ILIM
V/f control current limit filter
Limit: 0.0 - 3000.0 rad/s
Note: V/f control
Sets the time constant of the output current limit filter.
[Related parameters] VF_CP_ILIM
Rev.S
298
4GBF0632
3.6.7. Synchronous motor (SM) control

The drive has a synchronous motor control option. Basically, it controls the torque current on the same axis of the armature
voltage vector (power factor is 1.0), and excitation current to make the armature voltage amplitude be in a constant V/f ratio.
Firmware 10A or later adapt for SM vector control with resolver or PLG (if the speed sensor is connected in sensorless control, it
is only used to monitor speed).
The synchronous motor requires an external exciter power converter, and some interface. The SM exciter needs to be brush
type or AC brush-less type. Synchronous motor control is not available for DC brush-less type. With AC brush-less type, all
semiconductor devices should be passive diode. Any switching device, over voltage protection circuit, or any kind of control circuit
will have to be removed.
Rotary Xfmr
SM
SM
AC power unit
Rectifier
DC power unit
AC brush-less Exciter AC Exciter Brush type Exciter
Function Page
Exciter interface 300
Control overview 301
Exciter current control 303
Initial position detection 305
IQ constant starting 307
Voltage PLL 309
Voltage control while VPLL 310
Protection for Synchronous Motor control 314
Power factor adjustment 315
Synchronous transfer and capture 315
SM control with position sensor 316
Initial phase detection 318
Cautions for PMSM control 319
Current angle setting for PMSM 320
Weak field control for PMSM 321
Rev.S
299
4GBF0632
3.6.7.1. Exciter interface
The “field on” command (B_FL_CMD) and “field reference” (FC_REF) need to be connected all the time. Other signals
are optional.
Drive Exciter
B_FL_CMD Field on/off command

DO
1.0/100%
Required Field current reference
FC_REF
AOUT
1.0/100%
For protection FC_FBK Field current feedback
AIN
(Option)
FL_FOC Field over current
FL_READY Exciter Ready
For protection FL_RNTD DI

(Option) Exciter Run
FL_FAULT Exciter failure
Rev.S
300
4GBF0632
3.6.7.2. Control overview

There are 3 modes according to its speed and voltage.
Mode1
”Initial position detection”: The initial position is detected when the motor is stopped.
Mode2
“Constant IQ starting”: This is the motor starting mode without speed control. It uses an initial position and current control with a
pre-set speed reference rate and current.
Mode3
“Voltage PLL”: The speed and phase angle are estimated with the motor voltage PLL. The speed control and voltage control are
available in this mode. The drive is usually in this mode.
$CR_RATE_ACC Speed
SP_F
0PS Switch Speed $MS_RATE_IQACC
Operation lowest speed
$MS_VPLL_SP $LMT_SP_MIN
0%
$MS_RATE_IQDEC
Armature voltage
MAIN_VAC_F
0%
$MS_START_IQ
Stator current
I1_F
0%
$MS_KF1
Field current
+ $MS_FLBST_IQACC
FC_FBK
+ $MS_FLBST_INI
0%
time
Mode1 : Mode3 : Voltage PLL
Initial position detection Mode2 :
Constant IQ starting
Rev.S
301
4GBF0632
VPLL_ON=1
SP_R + T_R
Speed
control
VU_FBK -
$ASPR_A $FLT_T_R
VV_FBK
$ASPR_AT $LMT_T_
VW_FBK FSEEK_FREQ SP_F
Voltage Speed $ASPR_P
detection Estimation $ASPR_W1
VPLL_ON=1
$MS_START_IQ
Ampli MAIN_VAC_F
-tude
VPLL_ON=1
FSEEK_FREQ QOCMP
Phase
SP_R
IQ_REF EQ_R Gate Pulse
ID_REF+ ED_R
Curren Voltage
÷ reference
control
-
SP_F FL_ $LMT_IQ_BAS $ACR_A
IQ_FBK $LMT_E
$LMT_IQ_TOP $ACR_P
$LMT_IQ_INV ID_FBK $ACR_W1
$LMT_SP_BASE
$LMT_I
FL_CMD
+ + FC_REF To Exciter
$MS_KF1
+ +
+ Voltage
control
MAIN_VAC_F -
÷
$MS_FLBST_INI
$MS_FLBST_IQACC
$MS_FLBST_VPLL
Rev.S
302
4GBF0632
3.6.7.3. Exciter current control

The Exciter reference can be voltage or current. When using the voltage reference, it is possible to have the exciter current
regulator on the drive. The drive needs current feedback.
Exciter interface signal
Current reference FC_REF
Exciter current control

Exciter reference Open loop FC_REF
Voltage reference
Current control PHC_F
Drive internal control

MS_FLG_FCF_E = 1
Feed-forward
reference FC_REF + PHC_F
Field
MS_KF1 - 4 control
-
$MS_FLDC $MS_FCR_P $MS_LMT_PHC_
$ML_FCRST $MS_FCR_W1 $ML_LMT_PHC_
FC_FBK
MS_FLG_FCF_E = 1
MS_FLG_FCF_E
Exciter current control enable flag
Standard value: 0
Limit: 0-1
Sets to 1 when using the drive internal exciter current control.
MS_FCR_P
Exciter current control proportional gain
Standard value: 600
Limit: 0 - 100000
Sets the proportional gain of the exciter current control.
MS_FCR_W1
Exciter current control response time constant
Limit: 0.00 - 256.0 rad/s
Sets the response gain of the exciter current control.
Rev.S
303
4GBF0632
MS_FLDCL
Exciter current reference upper limit
Limit: 0.0 - 400.0% (1.0/100%)
Sets the upper limits for the exciter current reference. The Upper limit is also used for field current limit protection.
MS_FCRST
Exciter current reference lower limit
Limit: 0.0 - 400.0% (1.0/100%)
Sets the lower limits for the exciter current reference.
MS_LMT_PHC_U
Exciter current control upper limit
Limit: -400.0 - 400.0% (1.0/100%)
Sets the upper limits for the exciter current control output.
MS_LMT_PHC_L
Exciter current control lower limit
Limit: -400.0 - 400.0% (1.0/100%)
Sets the lower limits for the exciter current control output.
AOUT_FCR_GS
Exciter current control reference gain
Standard value: 0
Limit: -100000000 - 100000000
Sets the gain for the exciter current control reference.
AOUT_FCR_OS
Exciter current control reference gain
Standard value: 0
Limit: -100000000 - 100000000
Sets the offset for the exciter current control reference.
Rev.S
304
4GBF0632
3.6.7.4. Initial position detection

The drive detects the rotor position by finding the voltage vector at the excitation current rising edge. An automatic offset
adjustment is available before the excitation of every start. To build up field flux, the drive needs some time delay for the motor
time constant. The drive will wait to start gating with MS_TIME_FC. The initial position calculation will be done in the first half of
the timer MS_TIME_FC. This time can be adjusted with MS_TIMI_INI_ADJ.
B_EXT
B_ASD EU_R
SM_V_U_SUM 0
SM_V_V_SU Gate Block EV_R
Initial position SM_V_W_SUM 0 INV
EW_R
0 0
VU_FBK
SM_VD_FBK
-1 D uvw Accumulate VV_FBK
tan SM_VQ_FBK
Q /dq VW_FBK
MS_START_QO_OS
MS_TIME_FC/2+MS_TIME_INI_ADJ
MS_KF1
FC_FBK
+ MS_FLBST_INI FC_REF
MAIN_VAC_F B_FL_CMD Exciter SM
Offset Adjustment
45ms-90ms
MS_TIME_FC
MS_TIME_FC/2+MS_TIME_INI_ADJ
Initial position calculation
RUN Command B_EXT
Exciter RUN Command B_FL_CMD
Field Current Reference FC_REF
Exciter RUN B_FL_RNTD
Gating B_SM_GATE_CMD
Field Current Feedback FC_FBK
Field Voltage Feedback
INV AC Voltage Feedback MAIN_VAC_F
Rev.S
305
4GBF0632
MS_TIME_FC
Field winding response time
Standard value: 1.000 s (Field Winding Type)
0.000 s (PMSM)
Limit: 0.000 - 32.0 s
Sets the response time for the field voltage to stabilize after the field command is output to the exciter.
MS_TIME_INI_ADJ
Initial position detection adjustment time
Limit: -5.000 - 5.000 s
Sets the time adjustment, for the voltage accumulation time, of the initial position detection. If this time is 0sec,
accumulation time for the motor voltage will be half of MS_TIME_FC.
MS_START_QO_OS
Initial position detection angle offset
Standard value: -16384 (Sensorless vector control)
0 (Vector control with position sensor)
Limit: -32768 - 32768
Sets the offset angle from the detected initial rotor position.
MS_KF1
Base flux for field current reference
Limit: 0.0 - 200.0% (1.0/100%)
Sets the base flux for the field reference. It is a no-load field current at base speed.
MS_FLBST_INI
Boost filed reference for initial position detection
Limit: -100.0 - 100.0% (1.0/100%)
Sets the Boost flux gain for the initial position detection.
Rev.S
306
4GBF0632
3.6.7.5. IQ constant starting

The drive starts with the constant current in low speed that doesn’t have enough voltage for the PLL.
In SM control with position sensor, the drive does not operate in IQ constant starting.
EU_R
ID_REF ED_REF
0 ACR dq/ EV_R
+- INV
MS_START_IQ IQ_REF EQ_REF uvw EW_R
ACR
SP_REF SP_R
+- QO
Rate ∫
MS_ RATE_IQACC ~CR_RATE_ACC Preset ID_FBK IU_F
uvw
Init. Pos. Det. IQ_FBK /dq IW_F
IPLL
MS_START_QO_OS
MS_KF1 (+ MS_FLBST_IQACC) FC_REF
B_FL_CMD Exciter SM
MS_START_IQ
Current reference for IQ constant starting
Limit: 0.0 - 200.0% (1.0/100%)
Sets the current reference for the IQ constant starting.
MS_RATE_IQACC, MS_RATE_IQDEC
Standard value: 600.000 s (Sensorless Vector Control)
0.000s (Vector Control with Position Sensor)
Limit: 0.000 - 3600.000 s
Sets the speed ramp rate at 0% speed for the IQ constant starting. The ramp rate is close to CR_RATE_ACC.
Frequency
CR_RATE_ACC CR_RATE_DEC
MS_RATE_IQACC
MS_VPLL_SP
MS_RATE_IQDEC
Time
Rev.S
307
4GBF0632
MS_FLBST_IQACC
Boost filed reference for IQ constant starting
Limit: -100.0 - 100.0% (1.0/100%)
Sets the Boost flux gain for the IQ constant starting.
MS_STA_G
Stability compensation proportional gain for IQ constant starting
Standard value: 0
Limit: -10000 - 100000
Sets the proportional gain of the stability compensation for the IQ constant starting.
MS_STA_W
Stability the compensation response time constant for the IQ constant starting.
Limit: 0.00 - 256.0 rad/s
Sets the response gain of stability compensation for the IQ constant starting.
MS_DIDT_LMT_ST
di/dt limit N for starting current
Limit: 0.0 - 400.0 %/ms (1.0/(100%/ms))
Sets the the maximum current change per ms at the IQ constant starting.
Rev.S
308
4GBF0632
3.6.7.6. Voltage PLL

The speed and phase angle are estimated by the motor voltage PLL. The speed control and voltage control are available in this
mode. The drive is usually in this mode.
In PMSM control, do not use voltage PLL.
EU_R
ID_REF ED_REF
0 ACR dq/ EV_R
SP_REF_AIN0 INV
SP_REF_AIN1
SP_REF
SP_R IQ_REF +- EQ_REF uvw EW_R
Rate ASPR ACR
CR_RATE_ACC +- +- Q
ID_FBK IU_F
SP_
uvw
IQ_FBK /dq IW_F
QO_GA
∫
FSEEK_FREQ ED_FBK VU_FBK
IPLL ÷
uvw VV_FBK
MAIN_VAC_ a 2 +b 2 EQ_FBK /dq VW_FBK
IPLL
Volt. Control FC_REF

B_FL_CMD Exciter SM
MS_VPLL_SP
Voltage PLL enabling speed
Standard value: Field Winding SM: 5.0 % PMSM: 125%
Limit: 0.0 - 125.0% (1.0/100%)
Sets the speed level that enables voltage PLL. In PMSM control, set it and LVL_VF_LOW 125%.
[Related parameters] LVL_VF_LOW
Rev.S
309
4GBF0632
3.6.7.7. Voltage control while Voltage PLL

To control the motor voltage, there are several feed forward blocks and 1 closed loop for exciter reference. The exciter reference
can be either a current or voltage reference.
In the case of field winding SM vector control with position sensor, field control is possible even at startup without voltage PLL.
Field Cur. REF

Adjusted by VL_ADJ
Field Current
Feed-forward reference
100% (KF1 + IQ x KF2)
MS_KF2
MS_KF1 Base reference
CS_MOTOR_CURR [A]
0% Load
0% 100% Armature Current (motor rating)
Rev.S
310
4GBF0632
MS_KF2
Flux gain from torque current
Limit: 0.0 - 200.0% (1.0/100%)
Sets the proportional gain for the torque current feedback to the exciter reference.
MS_KF3
Flux reference offset
Limit: -100.0 - 100.0% (1.0/100%)
Sets the offset for exciter reference.
MS_KF4
Flux gain from speed feedback
Limit: -100.0 - 100.0% (1.0/100%)
Sets the proportional gain for the speed feedback to the exciter reference. It is used only with the AC brush-less exciter
with a voltage reference sent to the exciter.
Constant field voltage

AC Exciter causes proportional E2
Secondary voltage (E2) for AC brush-less exciter
3 x E2
2 x E2
MS_KF4
E2
Speed
Ns 0 -Ns -2 x Ns
MS_VL_P
Voltage compensation proportional gain
Standard value: 200
Limit: 0 - 100000
Sets the proportional gain of the voltage compensation
MS_VL_I
Voltage compensation integral gain
Standard value: 100
Limit: 0 - 100000
Sets the integral gain of the voltage compensation
MS_VLIMIT
Voltage compensation output tlimit
Limit: 0.0 - 200.0% (1.0/100%)
Sets the output limit of the voltage compensation.
Rev.S
311
4GBF0632
MS_VL_A
Voltage compensation Anti Over Gain
Standard value: 0
Limit: 0 – 100000
Sets the anti over gain of the voltage compensation.
MS_VL_AT
Voltage compensation ωAT Gain
Standard value: 0.0rad/s
Limit: 0.0 - 256.0 rad/s
Sets the ωAT gain of the voltage compensation.
MS_FLBST_VPLL
Boost filed reference for voltage PLL mode
Limit: 0.0 - 100.0 % (1.0/100%)
Sets the Boost flux gain for the voltage PLL mode.
MS_FLBST_VPLL_SP
Boost filed reference ending speed for voltage PLL mode
Limit: 0.0 - 100.0 % (1.0/100%)
Sets the Boost flux gain ending speed for the voltage PLL mode.
Flux reference
FL_R_SM
MS_FLBST_VPLL
100%
MS_FLBST_VPLL_SP
|Speed|
MS_ VPLL_SP
Rev.S
312
4GBF0632
MS_FLCMP_G
Flux current forcing gain
Standard value: 0
Limit: 0 - 100000
Sets the proportional gain of “flux forcing” when in voltage PLL mode.
MS_FLCMP_W
Flux current forcing response time
Limit: 0.00 - 256.0 rad/s
Sets the response gain of “flux forcing” at voltage PLL mode.
Rev.S
313
4GBF0632
3.6.7.8. Protection for Synchronous Motor control

MS_CP_FOC
Field current over current level
Limit: 0.0 - 400.0% (1.0/100%)
Sets the over current level of the exciter field current (FOC_S). It is only available with field current feedback (FC_FBK).
MS_CP_LF
Field current loss detection level
Limit: 0.0 - 100.0% (1.0/100%)
Sets the field current loss detection level (LF). When the field current feedback (FC_FBK) is available (MS_FLG_FCF_E
= 1), this is the current level of the exciter feedback. When it is not available, this level will be the flux error of the flux
reference from the estimated feedback.
MS_TIME_FLDCL
Limit: 0.000 - 300.000 s
Sets the delay time of the filed current limit detection (FCL_T). When the field current is larger than MS_FLDCL, more
than 80% of this set time, it indicates an alarm (FCL_TA), and will detect fault FCL_T after this set time has elapsed.
MS_CP_OV
Over voltage level
Limit: 0.0 - 200.0% (1.0/100%)
Sets the over voltage level of the motor voltage (OV_S).
MS_CP_VPLL_ERR
Voltage PLL error detection level
Limit: 0.0 - 90.0 deg
Sets the voltage PLL error detection level (VPLL_ERR).
MS_FLT_VPLL_ERR
Angle filter for voltage PLL error
Limit: 0.0 - 1024.0 rad/s
This filter setting is for the angle of the voltage PLL error.
Rev.S
314
4GBF0632
3.6.7.9. Power factor adjustment

Power factor adjustment is available as a reactive current setting, and can be controlled on-line from an upstream PLC.
MS_IDR_OS
D-axis current reference offset
Limit: -400.0 - 400.0% (1.0/100%)
Sets the d-axis current reference. Normally, it is 0%, but only the case for the special power factor control is required.
3.6.7.10. Synchronous transfer and capture

Synchronous transfer and capture is available. The drive controls exciter current only when under drive control. After transfer,
the up stream control system needs to switch to exciter control.
MS_XFR_FLDHLD
Exciter reference holding time after SM transfer
Limit: 0.000 - 300.000 s
Sets the hold time of B_LFCMD and FC_REF after transfer.
MS_CPT_VLDLY
Voltage compensation starting delay time after SM capture
Limit: 0.000 - 32.000 s
Sets the starting time delay of voltage compensation after capture.
Rev.S
315
4GBF0632
3.6.7.11. Synchronous Motor control with Position sensor

SM control with position sensor (resolver or PLG) is available for applications which needs high start torque (Available in
firmware 10A or later)
SM control of this drive detects initial rotor position in start-up period, similar to sensorless control. By setting initial rotor
position to parameter, the drive can output large start torque, and starting characteristics will be same in any time.
In SM sensorless control, the drive starts with IQ constant starting, and accelerate SM to the speed it can use voltage
PLL(VPLL). Meanwhile, in SM vector control with position sensor, the drive executes speed control by using position
sensor information. If the SM reached the speed can use VPLL, the drive modify the position information by VPLL result,
and realize power factor 1.
In low speed where cannot use VPLL, by modify inner current vector angle depending on the load, the drive control
power factor near 1.
＜SM control with resolver＞
・ Set SYSTEM.Bit7 SM 1 and SYSTEM.BitD SL 0.

・ If the drive detects initial rotor position every start period, set MS_FLG_TRUEDAT 0. No need to adjust rotor position
parameter MS_QR_TRUEDAT.
・ If the drive is set adjusted rotor position to parameter MS_QR_TRUEDAT, set MS_FLG_TRUEDAT 1. The drive does not
detect initial rotor position, and starting characteristic is same every time.
・ The drive does not need to adjusted MS_QR_TRUEDAT again even motor and resolver installation. However, if instrllation of
them changed, readjustment of MS_QR_TRUEDAT is needed.
＜SM control with PLG＞
・ Set SYSTEM.Bit7 SM 1 and SYSTEM.BitD SL 0, and set CS_PGOUT 0.

・ Use PLGs pulse number is under 8192P/rev. PLGs whose pulse number is over this is not suitable for SM control with PLG.
・ PLG with Z pulse is not needed. If PLG has Z pulse, the drive can adjust rotor position every 1 rotarion. To use Z pulse
adjustment, set MS_FLG_ZPLS 1.
・ PLG’s pulse number need not to be exponentiation of 2.
・ The drive detects initial rotor position similar to sensorless control, because PLGs cannot detect initial rotor position.
・ By using PLG with Z pulse, the drive can detect relative rotor position. In this case, the drive can start SM without initial rotor
position detection similar to SM control with resolver. Set MS_FLG_TRUEDAT 1 in the middle of tuning.
・ In first drive after turn on control power source, the drive detects initial rotor position, because the drive loses Z pulse position
by turn off power.
・ Relative phase of Z pulse and rotor position set on MS_QR TRUEDAT does not change. However, if installation of motor and
PLG, readjustment is needed similar to resolver.
・ In Z pulse detection drive just after turn on control power, if the drive cannot detect Z pulse even the motor is rotating, Z pulse
undetected alarm(Z_PLS_A) is detected. It is medium fault, if the operation is stopped, this alarm go off. When the PLG is
differential PLG, the drive detects Z_PLS_A when lost Z pulse under operation also.
Rev.S
316
4GBF0632
Control specification of field winding SM
Initial rotor position detection Start up Under VPLL

Executed every startup period IQ constant starting Speed control by using
Sensorless
speed and phase
vector control
calculated by VPLL.
<MS_FLG_TRUEDAT = 0> Speed control by using Speed control by sensor
Executed every startup period sensor speed information. information.
Vector control
<MS_FLG_TRUEDAT = 1> Calculate phase by sensor
With resolver
Not executed. Start by using phase and VPLL phase.
MS_QR_TRUEDAT
Vector control Executed every startup period Same as above Same as above
With PLG
(Without Z pulse
correction)
MS_FLG_ZPLS = 0
<MS_FLG_TRUEDAT = 0> Same as above Same as above
Executed every startup period
Vector control <MS_FLG_TRUEDAT = 1>
With PLG Executed only first time just
(With Z pulse correction) after turn on control power.
MS_FLG_ZPLS = 1 Start by using
MS_QR_TRUEDAT after Z
pulse detection.
MS_DLT_GAIN
SM inner current vector phase correction gain
Standard: 0.0 deg
Limit: 0.0 - 180.0 deg
Note: Not used
Not used parameter.
MS_FLG_ZPLS
SM Z pulse correction enable flag
Data type: 16 - bit integer
Standard: 0
Limit: 0, 1
In SM control with PLG, set 1 to use Z pulse correction of phase. The drive can use PLGs without Z pulse. However, by using Z
pulse PLG, the drive can correct phase every 1 rotation.
[Related articles] Z_PLS_A
Rev.S
317
4GBF0632
3.6.7.12. Initial rotor position adjustment
Resolver can detect SM’s rotor phase even if just after turn on control power. On the other hand, PLGs cannot detect absolute
rotor phase. However, PLGs with Z pulse can detect relative phase between Z pulse and rotor position. Then, if initial phase
adjustment is done, the drive executes initial rotor position detection only on first start-up just after turn on control power, and
after it, the drive can pass it. In use this sequence, set MS_FLG_TRUEDAT 1.
If the new sensor is installed to the motor, phase the sensor detected and rotor phase are not the same. Without adjustment, the
drive cannot control motor speed correctly, there is a risk of motor is out of control.
Implement initial rotor position adjustment after the new sensor is installed to the motor. The rotor should be free from outer
power to search rotor position by DC conducting.
Steps for initial rotor position adjustment are below:
(1) Separate coupling the motor and the load.

(2) Connect maintenance tool to the drive.
(3) Release outer inter-lock conditions to set the drive READY.
(4) The motor rotates by adjustment. Set safety precaution not to enter around the motor.
(5) Resolvers
Check MS_FLG_TRUEDAT = 1 and proceed (6).
PLGs with Z pulse
Set MS_FLG_TRUEDAT = 0, speed reference around 5 %, turn on start command EXT. Implement initial rotor position
detection and get first Z pulse. Check the value of B_INI_ZPLS_DET is changed 0 from 1 and turn off EXT. Then, set
MS_FLG_TRUEDAT = 1 and proceed (6).
(6) Set the drive current response test mode (TEST26) by maintenance tools. To know how to set, see manuals of
maintenance tools 4GAF0430(Japanese) or 4GBF0430(English).
(7) Set TEST26_ID_BAS 10~30% by maintenance tools, and turn on start command EXT. The drive starts DC conducting.
Then, the motor rotates forward and reverse, and it stops. Check the motor is stop by speed feedback(SP_F) or etc, turn
off EXT.
(8) Turn off the current response test mode(TEST26).
(9) Check the value of QR_TRUEDAT_SET by maintenance and set MS_QR_TRUEDAT this value.
(10) Testrun the motor before connect motor and load.
※Caution for drive setting parameter loading

・ Be careful not to update MS_QR_TRUEDAT to older value when loading the drive setting parameters saved before initial
rotor phase adjustment.
・ Initialize control power is not needed to change the value of MS_QR_TRUDAT.
MS_FLG_TRUEDAT
SM initial rotor position adjustment flag
Standard: 0
Limit: 0, 1
In SM vector control with resolver or PLG, set 1 when correct offset between rotor phase and sensor phase by
MS_QR_TRUEDAT. If 0 is set, the drive executes initial rotor position detection in every start up similar to sensorless vector
control.
[Related parameters] MS_QR_TRUEDAT
MS_QR_TRUEDAT
SM initial rotor position adjustment
Standard: 0
Limit: -32767 - 32767
In SM control with resolver or PLG, set offset phase between rotor position and sensor phase. If the sensor reinstalled,
readjustment is needed.
[Related parameters] MS_FLG_TRUEDAT
Rev.S
318
4GBF0632
3.6.7.13. Cautions for Permanent Magnet Synchronous Motor(PMSM) Control
Cautions for PMSM driving by this drive are below:
(1) This drive can drive PMSM by same firmware driving IM or field winding SM. Set 1 SYSTEM.Bit7 SM and SYSTEM.Bit1
PM. (Available in firmware 11A or later)
(2) Position sensor for PMSM driving is resolver or PLG. The resolver should be applied for applications that require
low-speed, high torque, or are not allowed to be reversed.
(3) If the resolver is removed from the motor, initial rotor position adjustment is needed. The way of adjustment is same to
MS_QR_TRUEDAT setting of field winding SM. Do not drive the motor before initial rotor position adjustment. There are
the risk of motor is out of control.
(4) The drive cannot use sensorless vector control or Volts/ Hertz control for PMSMs.
(5) Single drive cannot drive 2 or more PMSMs.
(6) Even if the drive is stopped, voltage by permanent magnet occur if PMSM rotating. Attach or remove main circuit cables of
PMSM after the motor completely stopped, because of the risk of electric shock.
(7) In the case of SPM (surface magnet type) motor control, the torque is proportional even to the field weakened region to the
Q-axis current for the magnet phase. In the case of a winding field type SM or IM, the rotor flux weakens in the weakened
magnetic flux region, and the torque decreases to compensate by increasing the Q-axis current. On the other hand, in the
case of SPM Motors, it is not necessary to increase the Q-axis current even in the weakened area. By setting the value
PM_FLG_T_R to 1, you can avoid the control of increasing the Q-axis current in the weakened area.
PM_FLG_T_R
PM Control Torque Reference Flag
Standard: 0 (Other than SPM motor control）、1 (SPM motor control）
Limit: 0, 1
Set 1 to avoid dividing the T_R by the Flux criterion (FL_R) to generate Q-axis current reference (IQ_R).
In SPM motor control, dividing the T_R by FL_R is not needed. Set it 1.
Rev.S
319
4GBF0632
3.6.7.14. Current angle setting of PMSM

When d axis is set as the direction of a magnetic pole of PM motor, and q axis is set as the right angle to d axis, the angle of q
axis and a current vector is called current angle. The torque produced by motor increases more, in the one which a current angle
is larger than 0, among an IPM (embedded magneto type permanent magnet) motor and PRM (permanent magnet reluctance
motor). This is because the torque (magnet torque) by a magnet is produced, and also the torque (reluctance torque) by iron core
for a rotor is produced.
Current angle
Torque
Reluctance torque
Magnet torque
Motor torque
-90 -80 -70 -60 -50 -40 -30 -20 -10 0

Current angle (deg)
*) In case of IPM motor
With this equipment, a current angle can be set by a parameter. The current required for producing same torque is reduced by
setting a current angle. SPM (Surface Magnet Type Permanent magnet) motor does not produce reluctance torque. The minimum
current required to generate the same torque is the Q-axis direction.
PM_PH
Current angle setting
Standard value: 0.0 deg (SPM motor), -30.0 deg (IPM motor)
Limit: -180.0 – 180.0 deg
Sets the current angle. A minus value is the forward direction. By current angle setting, the relation of torque reference T_R, d axis
current reference ID_R, and q axis current reference IQ_R becomes the following.
ID_R = |T_R| x sin(PM_PH)
IQ_R = T_R x cos(PM_PH)
Rev.S
320
4GBF0632
3.6.7.15. Weak field control for PMSM

As for an operating method of a motor, the system which operates magnetic flux as fixed is common.
In this case, since induction voltage is a product of speed and magnetic flux, the motor voltage becomes high in proportion to
speed. To operate at a still higher speed, field weakening control reduces motor magnetic flux after reaching rated voltage, and
controls motor voltage uniformly.
In an induction motor or a synchronous motor with a field winding, a magnetic field is controlled directly to perform a field
weakening. Since the magnetic field which a magnet generates is always constant in the case of PM motor, in order to weaken a
magnetic field, the magnetic field of the magnet is reduced by the magnetic flux which d axis current of the minus direction
generates. With this equipment, ID reference is controlled by PI control so that output voltage does not exceed setting voltage.
Since the IPM (embedded magnet) motor and PRM (permanent magnet reluctance motor) using reluctance torque differ in motor
voltage greatly by load also at the same speed, their start speed of weak field control is not constant. Moreover, since PI control is
used, delay arises in field weakening control and it may exceed setting voltage temporarily (overshooting). Cautions are required
when the acceleration-and-deceleration rate of motor speed is high.
Above field weakening start speed, motor voltage becomes constant and a motor output serves as a constant output
characteristic.
The field weakening control combines the voltage saturation suppression control (VSC). It is the control to reduce output voltage
so that it does not exceed the PWM modulation percentage which an inverter could output ( b) in the figure below).
In addition, when the base speed(CS_SP_BASE) is set to less than 100%, the D-axis current is automatically passed when the
motor speed is exceeds base speed, and the induced voltage is weakened. ( c) in the figure below Automatic flux weakening)
Characteristics of weak field control
Weak field control
Rev.S
321
4GBF0632
3.6.7.16. PMSM control with PLG

This equipment can control PMSM with PLG(Available in firmware 11A or later). To start SM, the magnetic pole position
information at that time is needed. Immediately after the control power supply, resolvers can obtain absolute position
information of the magnetic poles. But the pole position is unknown until the Z Pulse is acquired in the case of PLG. In the
case of field winding SM, the field current can be used to estimate the position of the initial pole and to obtain the starting
position information. But in case of PMSM, the pole position cannot be obtained immediately after the control power is
turned on without motor moving. The forced rotation mode applies a constant frequency current to the motor after the
control power is turned on till get the Z pulse. During forced rotation mode, the motor rotates backwards. After the Z pulse
is acquired, the timer time (set in PM_Z_DET_DLY) waits for normal operation. PLG without a Z-pulse cannot control
PMSM. And, initial rotor position adjustment is needed.
PM_Z_DET_DLY
Initial Z pulse detection delay
Standard: 0.02 s
Limit: 0.0 ~ 10.0 s
In PM control with PLG, set the wait time from detection of Z pulse by forced rotation at initial startup until transition to normal
control.
PM_Z_DET_FREQ
Initial Z pulse detection frequency
Standard: 1.0 %
Limit: -100.0 ~ 100.0 %
In PM control with PLG, set the output frequency by forced rotation at initial startup. 100% corresponds to rated speed
(CS_MOTOR_RPM).
PM_Z_DET_IQ
Initial Z pulse detection IQ reference
Standard: 40.0 %
Limit: -100.0 ~ 100.0 %
In PM control with PLG, set the output Q-axis current reference by forced rotation at initial startup.
PM_Z_DET_MODE
First Z pulse detection forced rotation mode
Standard: 1
Limit: 0, 1
In PM control with PLG,it selects the mode to force the rotation to Z Pulse detection at initial startup.
PM_Z_DET_TIME
Initial Z pulse detection error timer
Limit: 0.0 ~ 300.0 s
In PM control with PLG, set the timeout period until Z pulse detection by forced rotation at initial startup. If the Z pulse cannot be
detected even after the timeout time elapses, a ROT_F error will occur.
Rev.S
322
4GBF0632
3.6.8. JOG operation
3.6.8.1. Standard JOG speed

The JOG operation is a mode that operates the inverter when the JOG command is active, and has the following features.
(1) “Forward output” by “forward JOG command (F)”, “reverse output” by “reverse JOG command (R)”.
(2) The 1st speed, 2nd speed and 3rd speed are also provided for each forward JOG command and reverse JOG command.
Use the 2nd speed command, “2S”, to select the 2nd speed, and use the 3rd speed command, “3S”, to select the 3rd speed.
(3) Each F, R, 2S and 3S command is input via a sequence input or PI/O input.
Also, the function has the following restrictions.

(4) The startup command (EXT) is given priority over the JOG command.
In addition, the JOG command is detected at the rise of the signal, so the JOG operation is not performed even when the
startup command is turned off, after start command cancels the JOG operation.
(5) The first command to be input from F and R, 2S and 3S is given priority.
(6) If both JOG speed and analog or communication input is used, 1st JOG can be used. It can be input speed reference to a
variable SP_REF_J1S_OS. This is added to 1st JOG forward and reverse speed. Therefore, setting of 1st JOG speed
(CR_JOG_FJ1S, CR_JOG_RJ1S) are set usually 0 %. It cannot be used how to set to 0 sec for internal rate, and use
external rate.
The setting parameters shown in Table 3.6.2 are the speed references of the JOG operation. The JOG operation command
and an operation pattern are shown inFig 3.6.7.
Table 3.6.2 JOG Operation Command and Speed Reference Settings

Forward JOG Reverse JOG 2nd speed 3rd speed
Type Speed reference setting
command F command R command 2S command 3S
Forward JOG CR_JOG_FJ1S
1 0 0 0
1st speed + SP_REF_J1S_OS (variable)
Forward JOG
1 0 1 0 CR_JOG_FJ2S
2nd speed
Forward JOG
1 0 0 1 CR_JOG_FJ3S
3rd speed
Reverse JOG CR_JOG_RJ1S
0 1 0 0
1st speed + SP_REF_J1S_OS (variable)
Reverse JOG
0 1 1 0 CR_JOG_RJ2S
2nd speed
Reverse JOG
0 1 0 1 CR_JOG_RJ3S
3rd speed
Speed reference
CR_JOG_FJ3S
CR_JOG_FJ2S
CR_JOG_FJ1S
0
CR_JOG_RJ1S
CR_JOG_RJ2S
CR_JOG_RJ3S
Forward JOG 0
command F
Reverse JOG 0
command R
2nd speed 0
command 2S
3rd speed 0
command 3S
Startup command 0
EXT
Fig 3.6.7 JOG Operation Command and Operation Pattern
Rev.S
323
4GBF0632
CR_JOG_FJ1S-CR_JOG_FJ3S
Forward jog 1 speed reference - 3 speed reference
Standard value: CR_JOG_FJ1S: 10.0%
CR_JOG_FJ2S: 50.0%
CR_JOG_FJ3S: 100.0%
Limit: 0.0 - 130.0% (1.0/100%)
Sets the forward inching 1 - 3 speed references.
[Related parameters] MSK_SERSEQ1, MSK_DI1, DIn_AS, SGN_DI
CR_JOG_RJ1S-CR_JOG_RJ3S
Reverse jog 1 speed reference - 3 speed reference
Standard value: CR_JOG_RJ1S: -10.0%
CR_JOG_RJ2S: -50.0%
CR_JOG_RJ3S: -100.0%
Limit: -130.0 - 0.0% (1.0/100%)
Sets the reverse inching 1 - 3 speed references.
[Related parameters] MSK_SERSEQ1, MSK_DI1, DIn_AS, SGN_DI
Rev.S
324
4GBF0632
3.6.8.2. Optional JOG speed
Additional 15 x JOG speed selections are available. These speed are enabled when 2S/ 3S inputs are both 0, and
determined by JOB0, 1, 2, 3 in DI_DATA5 (DI_EX5 and SERSEQDATA5). The startup command (EXT) is given
priority over the JOG command in the same as standard JOG function, and combination used with analog or
communication input is also.
Table 3.6.3 Optional JOG Operation Command and Speed Reference Settings
2S 3S JOG0 JOG1 JOG2 JOG3 F R
1 0 X X X X CR_JOG_FJ2S CR_JOG_RJ2S
0 1 X X X X CR_JOG_FJ3S CR_JOG_RJ3S
CR_JOG_FJ1S CR_JOG_RJ1S
0 0 0 0 0 0 + SP_REF_J1S_OS + SP_REF_J1S_OS
(variable) (variable)
0 0 1 0 0 0 OP_JOG_SP01 - (OP_JOG_SP01)
0 0 0 1 0 0 OP_JOG_SP02 - (OP_JOG_SP02)
0 0 1 1 0 0 OP_JOG_SP03 - (OP_JOG_SP03)
0 0 0 0 1 0 OP_JOG_SP04 - (OP_JOG_SP04)
0 0 1 0 1 0 OP_JOG_SP05 - (OP_JOG_SP05)
0 0 0 1 1 0 OP_JOG_SP06 - (OP_JOG_SP06)
0 0 1 1 1 0 OP_JOG_SP07 - (OP_JOG_SP07)
0 0 0 0 0 1 OP_JOG_SP08 - (OP_JOG_SP08)
0 0 1 0 0 1 OP_JOG_SP09 - (OP_JOG_SP09)
0 0 0 1 0 1 OP_JOG_SP10 - (OP_JOG_SP10)
0 0 1 1 0 1 OP_JOG_SP11 - (OP_JOG_SP11)
0 0 0 0 1 1 OP_JOG_SP12 - (OP_JOG_SP12)
0 0 1 0 1 1 OP_JOG_SP13 - (OP_JOG_SP13)
0 0 0 1 1 1 OP_JOG_SP14 - (OP_JOG_SP14)
0 0 1 1 1 1 OP_JOG_SP15 - (OP_JOG_SP15)
OP_JOG_SP01 - OP_JOG_SP15
Optional Jog 1 speed reference - 15 speed reference
Limit: 0.0 - 130.0% (1.0/100%)
Sets the optional JOG 1 - 15 speed references. TIME_DI_TRNS adds a time delay to allow for the transition of multiple
digital inputs before switching to the new speed reference.
Input (0, 0, 0, 1) (1, 1, 1, 1)
Selection OP_JOG_SP01 OP_JOG_SP15
TIME_DI_TRNS
(Standard value)
Speed Speed Speed

Parameter Parameter Parameter
reference % reference % reference %
OP_JOG_SP01 25 OP_JOG_SP06 55 OP_JOG_SP11 80
[Related parameters] MSK_SERSEQ1, MSK_DI1, DIn_AS, DI_EX5, SERSEQDATA5, DI_DATA5, TIME_DI_TRNS
Rev.S
325
4GBF0632
3.6.9. Flying restart
FLG_RESTART
Sensorless flying restart flag
Standard value: 2 (Sensor-less, V/f and SM control)
Limit: 0-2
Set 2 as standard valure when inverter output voltage is used for flying restart. IPLL restart will be enabled while the motor
residual voltage is over LVL_VF_LOW.
FSEEK restart will be enabled when FLG_IPLL_RESTART=2 and while the detected motor speed is over FSEEK_LOW_FREQ.
If FSEEK_LOW_FREQ=0%, FSEEK restart will be disabled.
It becomes the frequency sweep mode by setting the FLG_RESTRT = 1, only when B_SPA1 = 1. In the case of B_SPA1 = 0, it
becomes nomal start from the 0% speed.
FLG_RESTART Flying restart method Related parameters

0 No restart N.U.
SL_SP_RESTART
1 Frequency sweep restart.
LVL_VF_LOW
2 Voltage PLL and peak-peak detection. FSEEK_LOW_FREQ
Motor Voltage LVL_VF_LOW=3%
FSEEK_LOW_FREQ=2%
Motor Speed
FLG_RESTART=2 IPLL FSEEK Normal

(standard value) Restart Restart Start
LVL_VF_LOW
Inverter output voltage low detection level for capture and IPLL restart
Standard value: 3.0 % (Other than PMSM), 125.0% (PMSM)
Limit: 0.0 - 125.0% (1.0/100%)
Note: This is enabled when using sensorless or V/f control and FLG_RESTART=2.
Sets the minimum level for the detection of the inverter output voltage used with the capture and IPLL restart. When the motor
voltage is below this level, FSEEK frequency detection will become active. In case of PMSM control, set it 125.0%( not detect idle
restarts, same to MS_VPLL_SP).
[Related parameters] MS_VPLL_SP
FLT_IPLL
Inverter output voltage PLL filter
Limit: 0.0 - 1024.0 rad/s
Sets the filter for the phase difference during “utility synchronization capture” and for the “IPLL Restart”.
IPLL_P
Inverter output voltage PLL proportional gain
Standard value: 20
Limit: 0 – 100000
Sets the proportional gain of the “Inverter output voltage PLL” used for the “utility synchronization capture” and for the “IPLL
restart”.
[Related parameters] FLT_IPLL, IPLL_W1, FLG_ RESTART
Rev.S
326
4GBF0632
IPLL_W1
Inverter output voltage PLL response gain
Limit: 0.00 - 3000.0 rad/s
Sets the response gain of the “Inverter output voltage PLL” used for the “utility synchronization capture” and the “IPLL restart”.
[Related parameters] FLT_IPLL, IPLL_P, FLG_RESTART
FLT_IPLL_FLX
Motor flux feedback filter for FSEEK restart
Limit: 0.0 - 1024.0 rad/s
Sets the filter time constant for the “inverter flux feedback filter” for “FSEEK restart”.
FLT_IPLL_VFBK
Motor voltage feedback filter for FSEEK restart
Limit: 0.0 - 1024.0 rad/s
Sets the filter time constant for the “inverter voltage feedback filter” for “FSEEK restart.”
FSEEK_FLX_G
FSEEK speed detection flux gain
Limit: 0.0 - 3200.0% (1.0/100%)
Sets the flux detection gain in “FSEEK sensor-less flying restart”. When flux filter (FLT_IPLL_FLX) is too large, the
amplitude might be smaller than the detection level. This gain will help to increase flux feedback.
FLT_FSEEK_FREQ
Frequency feedback filter for FSEEK restart
Limit: 0.0 - 1024.0 rad/s
Sets the filter time constant for the “inverter voltage feedback filter” for “FSEEK restart”.
FSEEK_LOW_FREQ
FSEEK speed detection lower limit frequency
Limit: 0.0 - 100.0% (1.0/100%)
Sets the lower frequency limit of “coast motor speed detection” in “sensor-less flying restart”. “Coast motor speed” is
considered to be zero if the actual speed of the coasting motor is lower than this setting.
FSEEK_ID_RATE
FSEEK restart flux current recovery rate
Limit: 0.0 - 3600.0 s
Sets the flux current (ID_R) recovery rate when restarting in “sensor-less flying restart”. The time rate is from 0% to rated
flux current. The time rate will be approximately equal to the motor time constant.
In firmware 10A or later, MI_T2(motor time constant) + 0.5s is set automatically.
[Related parameters] FSEEK_LOW_FREQ, FLG_RESTART, MI_T2
Rev.S
327
4GBF0632
SL_E2D_PSF
Sensorless power failure recovery initial E2D value
Limit: -100000 - 100000
Sets the initial value of E2D, the d-axis secondary voltage, used in “sensor-less power failure recovery”.
Set to 5368 when using “sensor-less power failure recovery”.
SL_KCW_P_PSF
Correctional proportional gain for sensorless restart after instantaneous power loss
Limit: 0 - 100000
The Proportional gain setting used for synchronizing the speed when performing a sensor-less restart, after an instantaneous
power loss.
SL_KCW_I_PSF
Correctional integral gain for sensorless restart after instantaneous power loss
Standard value: 150
Limit: 0 - 100000
The Integral gain setting used for synchronizing the speed when performing a sensor-less restart, after an instantaneous power
loss.
SL_FLT_E2D_PSF
E2D filter for sensorless restart after instantaneous power loss
Limit: 0.0 - 1024.0 rad/s
This filter setting is for the rate of voltage compensation decay of SL_E2D_PSF during sensor-less restart after an instantaneous
power loss. Immediately after an instantaneous power loss, the drive will output more voltage to compensate for the power loss,
which will decay to the normal operation level.
SL_FLT_IQMAX
Sensorless IQ limit filter
Limit: 0.0 - 1024.0 rad/s
For sensor-less restart after an instantaneous power loss, the torque current limit (IQMAX), must be limited during speed
synchronization. This filter setting allows a limitation with primary delay filter characteristics.
Rev.S
328
4GBF0632
3.6.10. Emergency operation

In the event of an emergency, the two following operations may be performed with a PI/O signal.
3.6.10.1. Emergency operation mode

This operation mode is used to operate the equipment, regardless of the signals sent from the (TC-net I/O) in the system
with the (TC-net I/O) transmission unit. Normally, if a fault occurs in the host PLC, the system is left to only operate with
(TC-net I/O) signals, from the host PLC. The drive units are only operated with I/O level signals in this mode.
A normally open contact, which is closed in the emergency operation mode, is connected to the terminals on the input/output
circuit board (XIO: ARND-4045).
Assign this input signal to E-DRIVE signal
If the E-DRIVE signal is closed, the sequence data input from TOSLINE-S20 is omitted and operation is made only with P
I/O.
Transmission error fault signals are masked temporarily while the E-DRIVE signal is applied.
Please note the following is for using the emergency operation mode.
PI/O sequence input is masked with MSK_DI_EMG in the emergency operation mode.
The mask output of MSK_DI_EMG is used as a sequence command in the emergency operation mode, because the
sequence input from transmission equipment is ignored. When each bit of the mask is 0, the mask output becomes 1 and
the command becomes active.
Therefore, usually set FFFF(h) to MSK_DI_EMG.
Please turn off the EXT signal input when the emergency operation with F, R (JOG operation) is performed, because the
JOG operation is not available while EXT is turned on. MSK_DI_EMG cannot turn the EXT signal off.
The current limit by external current limit (LMT_IQ_EXT, LMT_IQ_EXT_INV) and external torque limit (LMT_TRQ_T4,
LMT_TRQ_INV_T4) are released in the emergency operation mode.
3.6.10.2. E-HOLD mode
In this operation mode, if a fault occurs in the main system being operated, the contact is input to continue operation at the
speed, at which the fault occurred.
The normally open contact, which is closed by the HOLD operation command, is connected to the terminal on the
input/output circuit board (XIO: ARND-4045).
Assign this input signal as “HOLD” signal.
If the external contact input to the EXT is closed, the operation is made based on the external reference, regardless of any
HOLD inputs.
If the external contact input to EXT is opened and the external contact input to HOLD is closed, that speed is kept and
operation continues based on the kept speed reference (E-HOLD state).
When stopping operation from the E-HOLD state, the external contact input to “HOLD” is opened, or other operation
preparation (UV) conditions are turned off.
Please note the following is for using the E-HOLD mode.
The E-HOLD operation is not available when zero speed detection, MA_ZERO_SP is open (i.e. MA_ZERO_SP=125%). The
motor will coast and not hold its speed.
The Current limit by external current limit (LMT_IQ_EXT, LMT_IQ_EXT_INV) and external torque limit (LMT_TRQ_T4,
LMT_TRQ_INV_T4) are released in the E-HOLD operation.
Rev.S
329
4GBF0632
3.6.11. Shared motion

Two independent drive parameter setfiles can be stored and used. The outline of the shared motion is shown in Fig 3.6.8.
The Parameter bank selection signal is CHG_2S in DI_DATA6, which can be from a discrete digital input or from serial
communication (DI_EX6 and SERSEQDATA6).
Via DI : FLG_CHGSYS=12345
Via Serial : FLG_CHGSYS=6789
Setting parameter
selection CHG_2S
Input via DI or Serial
EEPROM
A bank SRAM
(Parameters for
Parameters for motor
application A)
controlled now.
EEPROM • Load timing from EEPROM to SRAM :

B bank (1) Loading by Drive Reset of the tool.
(Parameters for (2) Changing of CHG_2S signal.
application B)
• Save timing from SRAM to EEPROM :
At the time of parameter change,
the EEPROM is simultaneously rewritten with the SRAM.
Fig 3.6.8 Shared Motion
DATA_STS
Parameter bank information
Standard value: 0
Limit:
Used to differentiate which setting parameters are for A or B bank in shared motion. Set to 1 when setting parameters for
A bank, and set to 2 when setting the parameters for B bank. Set to 0 when shared motion is not used.
FLG_CHGSYS
Setting value changeover control selection flag
Standard value: 0
Limit:
Sets whether the setting value changeover control is used or not. To input the setting value changeover signal with DI, set 12345
to FLG_CHGSYS. To input the setting value changeover signal through serial transmission, set 6789 to FLG_CHGSYS. When
any other values are set, the setting value changeover control does not work.
Rev.S
330
4GBF0632
The shared motion command signal interface is shown in Fig 3.6.9. The signal input is available via transmission input or discrete
DI input. FLG_CHGSYS sets which input type (transmission or discrete) will be used.
When using LAN for a signal input, set up the CHG_2S of MSK_SERSEQ6. When using DI for a signal input, set up CHG_2S of
MSK_DI_EX6.
While performing shared motion, the inverter cannot be operated. Therefore, input a signal that turns off READY, as an interlock
when performing shared motion.
If the CHG_2S signal is input from the PLC and switches the EEPROM banks during a tool (TMdrive Navigator (TMdN))
connection, the tool will also simultaneously switch the corresponding parameters of the bank to the new bank parameter settings.
Setting CHG_2S = 0 selects A Bank and setting CHG_2S = 1 selects B Bank.
※In firmware 09B or older, input a signal turns off UV while shared motion.
SERSEQDATA6
LAN card Mask

Bit7 CHG_2S processing Switching signal logic
MSK_SERSEQ6 0: Select bank A
1: Select bank B
I/O board SCAN_RCV**_AS

(XIO) =SERSEQDATA6 FLG_CHGSYS
=6789(D) Setting value
Switching
signal switching
FLG_CHGSYS processing
(CHG_2S) DI_EX6
=12345(D)
DI input
Switch with FLG_CHGSYS
Mask FLG_CHGSYS=12345
Bit7 CHG_2S processing Select DI input
FLG_CHGSYS=6789
MSK_DI_EX6 Select transmission
DI input
DIn_AS=BIEX6_CHG_2S Any other switching signals
(n=1-11) are not accepted.
READY off signal DI_EX1

(SPA□) Bit12 SPA1 READY
Turn off READY during
□:1～4 sequence switching.
DI_EX2 A READY off signal can
Bit10 SPA2 be entered by
Upper level main trunk Bit11 SPA3 transmission input.
Bit12 SPA4
Control software processing
TMdrive-MVe2
Fig 3.6.9 Shared Motion Command Signal Interface
Rev.S
331
4GBF0632
The setup of shared motion may not be completed normally at the beginning of a start up in field. In this case, setting the
parameters to change cannot be performed using the CHG_2S signal. Therefore, manually save parameters to the A bank and B
bank EEPROM from a setting parameter file at the beginning of the start up in the field. The parameters of both banks are included
in one setting parameter file (.drc).
The operation flow of the tool is shown in Fig 3.6.10. In order to switch the EEPROM bank, the CHG_2S signal is input using LAN
or a DI, and it can also be switched with the TMdN tool.
When the drive file Bank (A or B) differs from a drive EEPROM bank and the TMdN tool is used to connect with the drive, a
"Reconcile EEPROM Bank" message will appear in the TMdN tool. In this case, switch the EEPROM bank in drive using LAN, the
DI or change the EEPROM bank association in the TMdN tool.
Import Drive file (.drc)

"File"→"Import"→"Drive"
Turn on interlock switch on the cubicle

display (Lighting)
Comfirm that the bank of a file is A in the

main screen of TMdN.
Go Online
EEPROM in a drive is A bank EEPROM in a drive is B bank
(Either)
【Reconcile EEPROM Bank】【Reconcile EEPROM Bank】
Select "Switch Active EEPROM Bank Select "Change EEPROM Bank
in Drive" and click "Continue" Association in TMdN and Continue"
and click "Continue"
Change drive file

"Do you wish to change the current
Bank A→B
EEPROM bank"→ "Yes"
Switch drive EEPROM Synchronize
Bank B→A Drive file B→Drive RAM B
Synchronize
Go Offline
Drive file A→Drive RAM A
Go Offline
On the main screan of TMdN,
Change drive file Bank B→A

Change drive file Bank A→B
Go Online
Go Online
【Reconcile EEPROM Bank】
Select "Switch Active EEPROM
Bank in Drive"and click "Continue"
Select "Switch Active EEPROM Bank
in Drive"and click "Continue" "Do you wish to change the current
"Do you wish to change the current Switch drive EEPROM

EEPROM bank"→ "Yes" Bank B→A

Bank A→B
Drive file A→Drive RAM A
Synchronize
Drive file B→Drive RAM B
Initialize the contorl power source
Turn off interlock switch on the cubicle

display (Extinction)
Fig 3.6.10 The Setting Parameter Save Method to Each Bank of drive EEPROM
Rev.S
332
4GBF0632
When a drive parameter is on both the A and B banks of the EEPROM in a drive, Fig 3.6.11 shows how to create a parameter
setting file from the drive parameters.
Select "New Drive" and make a default new

drive file (.drc)
Turn on interlock switch on the cubicle

display (Lighting)
Go Online
EEPROM in a drive is A bank EEPROM in a drive is B bank
(Either)
【Reconcile EEPROM Bank】【Reconcile EEPROM Bank】
Select "Switch Active EEPROM Bank Select "Change EEPROM Bank
in Drive" and click "Continue" Association in TMdN and Continue"
and click "Continue"
Change drive file

"Do you wish to change the current
Bank A→B
Bank B→A Drive RAM B→Drive file B
Synchronize
Go Offline
Drive RAM A→Drive file A
Go Offline
Change drive file Bank B→A

Change drive file Bank A→B
Go Online
Go Online
Select "Switch Active EEPROM
Bank in Drive"and click "Continue"
Select "Switch Active EEPROM Bank
in Drive"and click "Continue" "Do you wish to change the current
"Do you wish to change the current Switch drive EEPROM

EEPROM bank"→ "Yes" Bank B→A

Bank A→B
Drive RAM A→Drive file A
Synchronize
Drive RAM B→Drive file B
Turn off interlock switch on the cubicle

display (Extinction)
Fig 3.6.11 How to create a parameter setting file from parameter in the drive
Bit signal B_CPUA_CHG_SET indicates which bank the inverter has currently selected. When B_CPUA_CHG_SET is 0, bank
A is selected. When B_CPUA_CHG_SET is 1, bank B is selected. Moreover, it can also be confirmed, which bank has been
selected, using the icon of the main screen of the TMdN tool.
Rev.S
333
4GBF0632
In this inverter equipment, the composition of the setting parameters are divided into 3 kinds, the A-bank setting parameters, the
B-bank setting parameters and common setting parameters. Table 3.6.4 shows the composition of the setting parameters
Table 3.6.4 Composition of setting parameters in shared motion
Type Explanation
Setting parameters saved on the A-bank side of the EEPROM used to preserve the
A-bank parameters of the control board.
Setting The symbol names are the same as the B-bank setting parameters.
Parameter These are loaded in case the A-bank is selected by shared motion.
Setting parameters saved on the B-bank side of the EEPROM used to preserve the
B-bank parameters of the control board.
Setting Symbol names are the same as the A-bank setting parameters.
Parameter These are loaded in case that the B-bank is selected by shared motion.
Common Digital input, communication, display and so on. (See below table)
Setting
Parameter
Digital input Serial communication TC-net I/O EGD

DI1_AS FLG_DI_DATA1_SEL TCNET_COM_IDX EGD_CEID1
DI2_AS MSK_CMD1 TCNET_DRV1_ND EGD_CGRP1
DI3_AS MSK_SERSEQ1 TCNET_DRV2_ND EGD_CGRP2
DI4_AS MSK_SERSEQ2 TCNET_HHLT_TM EGD_CPID1
DI5_AS MSK_SERSEQ4 TCNET_MHLT_TM EGD_DEST
DI6_AS MSK_SERSEQ5 TCNET_MSCAN_TM EGD_GATEWAY
DI7_AS MSK_SERSEQ6 TCNET_OE_ND EGD_IP
DI8_AS TCNET_SYNC_ND EGD_RATE
DI9_AS EGD_RPID2
DI10_AS EGD_SUBNET_MSK
DI11_AS Communication common DeviceNet Display
MSK_DI_EMG COMM_TYPE CS_CURR_SCALE KPAD_FLGSET1

MSK_DI_EX5 FLG_DSCAN CS_VOLT_SCALE KPAD_METER1_DT
MSK_DI_EX6 SCAN_R_ADRS DNET_BAUD KPAD_METER1_RG
MSK_DI1 SCAN_R_SIZE DNET_CODE KPAD_METER2_DT
MSK_DI3 SCAN_W_ADRS DNET_M_MACID KPAD_METER2_RG
MSK_DI3_EMG SCAN_W_SIZE DNET_MACID KPAD_METER3_DT
MSK_DI4 TIME_PWB_SYNC DNET_OPTION KPAD_METER3_RG
MSK_DI4_EMG TIME_TL_F DNET_PRC_GAIN KPAD_METER4_DT
MSK_DI7 TL_CYC_TIME DNET_PRC_GAIN2 KPAD_METER4_RG
MSK_DI7_EMG TL_OP1_DT DNET_PRC_SCALE
SGN_DI_EX3 TL_OP1_ST DNET_RD_AS
SGN_DI_EX4 TL_OP2_DT DNET_SERIAL_NO
SGN_DI_EX5 TL_OP2_ST DNET_SP_SCALE
SGN_DI_EX6 TL_OP3_DT DNET_TR_SCALE
SGN_DI_EX7 TL_OP3_ST
SGN_DI_GIF TL_OP4_DT Tool Ethernet others
SGN_DI1 TL_OP4_ST TOOL_GATEWAY FLG_CHGSYS

SGN_DI2 TL_PC_NO TOOL_IP1 SETSTART
SGN_DINT3 TL_SELF_NO TOOL_IP2
TOOL_IP3
TOOL_IP4
TOOL_SUBNET_MSK
Rev.S
334
4GBF0632
3.6.12. RMFC control

RMFC: Reference Model Following Control
(1) A machine model where the system is approximated to an ideal one-inertia system.
(2) A speed controller that controls the machine system model.
This control system is called a “Reference Model Following Control (RMFC)“ because the motor speed is
controlled so that it will follow the model speed output of the reference model.
By combining RMFC control with speed control that comes after, it is possible to configure a two-degree-of-freedom control
system where the speed reference response and disturbance response can be set separately.
The figure below shows the speed control block with Reference Model Flow Control (RMFC).
When RMFC control is used, anti-overshoot gain ASPR_A and simultaneous constant ASPR_AT are not used, so set both
ASPR_A and ASPR_AT to 0.
1.0/100% RMFC control 1.0/100%

<Integral, Proportional> Torque
Speed <Inertia> reference
reference + + Speed + + T_R
SP_R control
- RMFC_P -
RMFC_W1 RMFC_JM
1.0/100%
Speed
detection
SP_F
Fig 3.6.12 Speed Control (using RMFC)
FLG_DR_OUT
Drooping output select flag
Standard value: 0
Limit: 0, 1
Set to 1 to add drooping output to the RMFC control output in speed control with RMFC control.
[Related parameters] FLG_RMFC
FLG_ES_RMFC
Emergency stop operation select in RMFC control
Standard value: 0
Limit: 0, 1
In RMFC control, set to 1 when the deceleration with limiting current is required in an emergency stop.
RMFC control is turned off automatically, in an emergency stop, when FLG_EX_RMFC is set to 1.
FLG_RMFC
RMFC control select flag
Standard value: 0
Limit: 0, 1
Set to 1 to use RMFC control.
[Related parameters] FLG_DR_OUT, RMFC_JM, RMFC_P
Rev.S
335
4GBF0632
LMT_RMFC_JMS
Modeled speed limit
Limit: 0.0 - 125.0 % (1.0/100%)
Note: Not used
Sets the upper limit of the motor modeled speed when using RMFC control.
RMFC_JM
RMFC control modeled moment of inertia
Standard value: 0
Limit: 0 - 1000000
Sets the modeled motor moment of inertia of RMFC control.
RMFC_P
RMFC control proportional gain
Limit: 0 - 100000
Sets the proportional gain of RMFC control.
RMFC_W1
RMFC control response gain
Limit: 0.0 - 1024.0 rad/s
Sets the RMFC control response gain.
Rev.S
336
4GBF0632
3.6.13. Distributed control
DT_FLG_DNDT
Acceleration range selection flag
Standard value: 0
Limit: 0-2
Note: Not used
DT_FLG_TMODE
Torque calculation mode changeover flag
Standard value: 0
Limit: 0, 1
DT_FLG_TMODE = 0, IQ_F x FL_R(Product of IQ_F and FL_R) will be added to the motor torque.
DT_FLG_TMODE = 1, T_R will be added to the motor torque.
DT_FLT_TRQ1, DT_FLT_TRQ2
Torque operational filter 1, Torque operational filter 2
Limit: 0.0 - 256.0 rad/s
These are used for the load torque calculation.
DT_GD2
Inertia moment
Limit: 0 - 1000000
Adjust so that the load torque (LD_TRQ_OUT) is 0, when accelerating from 0 to top speed, under no-load.
t
DT _ GD2 62500
N
t: Acceleration time at 100% torque [s]
-1
N: Top revolution count [min ]
DT_IMP_FLT
Impact drop compensation speed reference filter
Limit: 0.0 - 256.0 rad/s
Sets the speed reference filter for the impact drop compensation.
DT_IMP_R_INZ
Impact drop compensation speed reference
Limit: 0.0 - 50.0 % (1.0/100%)
Note: Initialize
Sets the initial value of the impact drop compensation speed reference.
DT_LB_BAND
Load deviation dead band
Limit: 0.0 - 150.0% (1.0/100%)
Sets the load deviation dead band.
Rev.S
337
4GBF0632
DT_LB_CMP_G
Load balance correction gain
Standard value: 0
Limit: 0 - 100000
Sets the load balance correction gain.
DT_LB_CMP_SP
Load balance correction speed
Limit: 0.0 - 125.0% (1.0/100%)
Sets the load balance correction speed.
When DT_LB_CMP_SP is 0.0%, the load balance output is normalized using the speed reference. The normalization is
performed with the formula shown below.
|Speed ref. (%)|
Load balance output (%) = Load balance output (before normalization) × DT_LB_CMP_G
The normalization makes the load balance output almost zero when at very low speeds. In this case, set a much greater
value than zero to DT_LB_CMP_SP, and the load balance output will not normalize with the speed reference.
DT_LB_CMP_SP (%)
Load balance output (%) = Load balance output (before normalization) × DT_LB_CMP_G
DT_LB_FLT
Load balance correction filter
Limit: 0.0 - 256.0 rad/s
Sets the load balance correction filter.
DT_LB_LMT
Load balance correction limit
Limit: 0 - 100.0% (1.0/100%)
Sets the load balance correction limit.
DT_LB_MODE
Load balance input changeover
Limit: 0, 1
Selects the load balance input changeover.
0= This setting is used when the load balance control is 1:1

The load balance control is executed on the master side and the result is transmitted to the slave side to subtract from the
speed reference.
1= This setting is used when the load balance control is 1: N
The load balance control is executed on the slave side and the result is reflected on the speed reference on the slave
side.
This is the standard mode because the 1:1 configuration can also be used in this mode.
Rev.S
338
4GBF0632
DT_LB_P
Load balance proportional gain
Standard value: 0
Limit: 0 - 100000
DT_LB_W1
Load balance integral gain
Limit: 0.0 - 1024.0 rad/s
DT _ LB _ P DT _ LB _ W1
DL _ LB _ I _ T
500
DT_LB_I_T: Integral gain
DT_LB_P: Proportional gain
DT_LB_TEST
Load balance performance test flag
Standard value: 0
Limit: 0, 1
When checking performance, before “transmission with trunk line” is established, set to 1.
DT_LB_TYPE
Load balance control input changeover
Standard value: 0
Limit: 0, 1
Load balance control changeover is selected as follows:
0= DT_LD_TRQ, the output of the “acceleration/deceleration torque elimination calculation” will be used as input data.
1= Torque reference T_R will be used as input data.
DT_LR_MODE
Load relay input changeover
Standard value: 0
Limit: 0, 1
Selects the load relay input changeover as follows:
0= The torque reference average T_R_OUT will be used as input data.
1= The output average LD_TRQ_OUT of the acceleration/deceleration torque elimination calculation will be used as input
data.
DT_LR_OFL
Load relay OFF level
Limit: 0.0 - 400.0 % (1.0/100%)
DT_LR_ONL
Load relay ON level
Limit: 0.0 - 400.0 % (1.0/100%)
This level should be adjusted, so that the load relay signal does not chatter, when the impact drop compensation is performed.
Set this parameter to satisfy the following: DT _ LR _ OFL DT _ LR _ ONL .
Rev.S
339
4GBF0632
DT_PG_PPR
Motor counter setting
Standard value: 0
Limit: 0-4
Sets the increment of the motor counter (DT_MT_CNT) per motor rotation.
DT_PG_PPR Increment of the motor counter [P/R]

0 256
1 512
2 1024
3 2048
4 4096
DT_RATE_QSTOP
Harmonious deceleration time setting
Limit: 0.0 - 3600.0 s
Sets the harmonious deceleration time.
This setting is effective only when FLG_RATE_QSTOP = 1.
When set to 5.0 seconds, if the QSTOP signal is activated, the speed reference will decelerate the speed reference to 0% in
5 seconds from any running speed.
[Related parameters] FLG_RATE_QSTOP
FLG_RATE_QSTOP
Coordinated stop flag
Standard value: 0
Limit: 0, 1
Set to 1 to use the coordinated stop function.
The coordinated stop time can be set with DT_RATE_QSTOP.
[Related parameters] DT_RATE_QSTOP
DT_TRQ_TAU
Torque calculation delay time
Standard value: 0 ms (16 ms)
Limit: 0 - 39 ms
Sets the torque calculation delay time.
Rev.S
340
4GBF0632
3.6.14. General purpose function

Set parameters related to general purpose function.
Function Page
Speed detection/protection
Analog speed reference lost (SP_LOST) 342
Speed reach detection (SP_RCH, FLG_SP_RCH=1) 345
Speed following detection (SP_RCH, FLG_SP_RCH=0) 347
Low speed detection (SP_LOW) 348
Motor stall detection (ROT_F) 349
Motor reverse rotation detection (REV_ROT_F) 352
Speed detection error (SP_ERR, SP_ERR2) 353
Automatic sensor-less mode change in Differential PG error 356
Analog speed input dead-band 357
Current detection/protection
Overload auto speed reduction (SOFT_STL) 358
Current de-rating at high temperature (CS_DERATE) 360
Low load detection (UL,UL_A) 363
Optional operation
Start command type and selection (EXT0/1, START0/1, STOP0/1, DIR0/1, SEL_DI) 365
Frequency jump (SP_JP) 368
Torque release/reduction rate (Torque helper option) 370
Spare sequence assignment (FUNC_SPA) 371
Simple programmable logic (FUNC1~4) 372
Option data substitution processing 374
Interface extension of DI/O, AI/O for PLC 375
Process (PID) control (OP_PR) 376
Auto retry (RTRY) 378
Output open inverter operation test mode 380
Fans control 380
EC fans control 383
Event counter (EVENT) 386
Time synchronization by using digital or serial communication input 387
Rev.S
341
4GBF0632
3.6.14.1. Analog speed reference lost (SP_LOST)

Function Overview
There are several options available for when a broken wire is detected on the 4-20mA input speed reference.
The selection for these options is performed by masking the bits explained on the next page. The box below contains the
available options that may be performed in the event of the 4-20mA input broken wire.
・Coast stop
・Coast stop and issues “FAULT” signal
・Decelerate to MA_ZERO_SP and stop
・Decelerate to LMT_SP_MIN and keep running with “ALARM”
・Keep running at previous speed reference just before the loss detection with “ALARM”
Below is the description for the detection of SP_LOST:

・ The loss of the speed reference is detected when the external speed reference （SP_REF_INP2） is below the detection
level set in “CP_SP_LOST” over 500ms.
・ This function(SP_LOST) is only active when the “EXT” signal is ON.
・ The “Loss of speed reference” detection signal “B_SP_LOST_” is latched and cannot be reset while the “EXT” signal is ON.
・ The “Loss of speed reference” alarm “B_SP_LST_A_” is not latched.
Speed Speed
Reference Reference
(4-20mA) Signal (0-10V) XIO
Master Isolator board
Drive control panel
Detects fault here
Output voltage
10V
0V 0mA Input
4mA 20mA Current
-2.5V
Rev.S
342
4GBF0632
External Speed
Reference
CP_SP_LOST
(SP_REF_INP2)
Wire broken Valid while EXT=0

Fault detection
(B_SP_LOST_)
500ms
Alarm signal Resets automatically
(B_SP_LST_A_)
Run command
(B_EXT)
Invalid while EXT=1

Fault reset
(B_FRST)
MSK_ MSK_ MSK_ MSK_

Operation Mode UV2 HFD2 READY2 STPRQ2 FLG_SP_LOST_EN
Bit14 Bit14 Bit14 Bit15
Coast stop without FAULT
1 0 0 0 (Don’t care)
output
Coast stop with FAULT output 1 1 0 0 (Don’t care)
Decelerate to MA_ZERO_SP
0 0 1 0 0
and stop
Keep running at minimum
speed (LMT_SP_MIN) with 0 0 0 1 0
alarm output
Keep running at previous
0 0 0 1 1
speed with alarm output
Rev.S
343
4GBF0632
CP_SP_LOST
External speed reference loss detection level
Limit: -25.0 - 125.0 % (1.0/100%)
Sets the loss detection level for the external speed reference.
Detects the loss of the speed reference input (SP_REF_AIN0, SP_REF_AIN1) from the analog input.
Set to 0% to detect the speed reference loss from the analog input.
When any loss is detected, B_SP_LST_A_ and B_SP_LOST_ will be set to 0 by the software.
Because B_SP_LOST_ is latched, a fault reset is required for recovery.
Set FLG_SP_LOST_EN to 1 to maintain the speed when a speed loss detection occurs.
The table below shows the detect
Signal name Destination Use

STPRQ2.BIT15 Activating mask, thus generating stop command on
detection.
B_SP_LST_A_
LFD2.BIT15 Activating mask, thus generating slight fault signal on
detection.
READY2.BIT14 Activating mask, thus generating deceleration command
on detection.
B_SP_LOST_ UV2.BIT14 Activating mask, thus stopping coast stop on detection.
HFD2.BIT14 Activating mask, thus generating critical fault signal on
detection.
[Related parameters] FLG_SP_LOST_EN, SP_LST_A, SP_LOST
FLG_SP_LOST_EN
Speed maintenance at external speed reference loss detection selection
Reference value: 0
Limit: 0, 1
When maintaining the current speed reference, to detect the loss of the external speed reference, set to 1.
[Related parameter] CP_SP_LOST
Rev.S
344
4GBF0632
3.6.14.2. Speed reach detection (SP_RCH, FLG_SP_RCH=1)

Function Overview
Used for the detection of the motor speed when more than the set values.
Operation Overview
・ When the absolute value of the motor speed feedback is more than the set values “CR_SP_RCH, CR_SP_RCH2 & 3”, the
detection signal （B_SP_RCH, B_SP_RCH2 & 3） will be 1 after the time set in ”TIME_SP_RCH” has elapsed.
・ The hysteresis of the detection can be set with “CR_SP_RCH_BAND”.
・ The detection level is the same for forward and reverse operations.
・ The detection bits B_SP_RCH, B_SP_RCH2 & 3 are assigned to Digital output or serial communication output
・ Parameter “FLG_SP_RCH” is set to 1 for this function.
・ If this function is not required, simply do not assign the detection bit to any interface.
・ B_SP_RCH_TDON, B_SP_RCH2_TDON, B_SP_RCH3_TDON, B_SP_RCH_TDOFF, B_SP_RCH2_TDOFF and
B_SP_RCH3_TDOFF are available in firmware 04B or later.
|SP_F|
CR_SP_RCH3
CR_SP_RCH2
CR_SP_RCH_BAND
CR_SP_RCH
B_SP_RCH
TIME_SP_RCH TIME_SP_RCH
B_SP_RCH_TDON
TIME_SP_RCH
B_SP_RCH_TDOFF
TIME_SP_RCH
B_SP_RCH2
B_SP_RCH2_TDON
TIME_SP_RCH
B_SP_RCH2_TDOFF
TIME_SP_RCH
B_SP_RCH3
B_SP_RCH3_TDON
TIME_SP_RCH
B_SP_RCH3_TDOFF
TIME_SP_RCH
Rev.S
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CR_SP_RCH, CR_SP_RCH2, CR_SP_RCH3

Speed reached detection level
Standard value: CR_SP_RCH: 10.0 %
CR_SP_RCH2: 0.0 %
CR_SP_RCH3: 0.0 %
Limit: 0.0 - 125.0% (1.0/100%)
Set three points for speed reached detection level setting.
When the absolute value of speed feedback has reached CR_SP_RCH, the detection signal B_SP_RCH is set to 1, after the time
delay, set by TIME_SP_RCH, has elapsed. Similarly, when the absolute value has reached CR_SP_RCH2 and CR_SP_RCH3,
the detection signals B_SP_RCH2 and B_SP_RCH3 are set to 1, after the time delay, set by TIME_SP_RCH, has elapsed.
After that, when the absolute value of speed feedback is below the individual speed detection level CR_SP_RCH_BAND, the
corresponding detection signal, B_SP_RCHn, turns to 0.
CR_SP_RCH becomes active only when FLG_SP_RCH=1. CR_SP_RCH2 and CR_SP_RCH3 are available regardless of the
setting of FLG_SP_RCH.
When the speed reached detection is not used, the CR_SP_RCHn setting should be 0%.
[Related parameters]CR_SP_RCH_BAND, FLG_SP_RCH, TIME_SP_RCH
CR_SP_RCH_BAND
Speed following completion detection band
Limit: 0.0 - 125.0% (1.0/100%)
The role of CR_SP_RCH_BAND changes according to the setting of FLG_SP_RCH. See below.
For FLG_SP_RCH=0 (Speed following detection range)

Set the deviation range when the speed is determined to follow the target.
When the absolute value of the difference between the external speed reference and the speed feedback becomes smaller than
CR_SP_RCH_BAND, the detection signal B_SP_RCH is set to 1 after the delay time TIME_SP_RCH has elapsed.
Afterwards, when the absolute value of the difference between the external speed reference and the speed feedback become
higher than CR_SP_RCH_BAND, then the detection signal B_SP_RCH turns to 0.
When the speed following detection function is not used, CR_SP_RCH_BAND should be 0.
For FLG_SP_RCH=1 (Speed reached detection hysteresis width)

Set the detection hysteresis width of the speed reached detection with CR_SP_RCH_BAND.
[Related parameters] CR_SP_RCH, FLG_SP_RCH, TIME_SP_RCH
FLG_SP_RCH
Speed following/Speed reached switching flag
Standard value: 0
Limit: 0, 1
Set to 0 when selecting the speed following function. Set to 1 when selecting the speed reached function.
[Related parameters]CR_SP_RCH, CR_SP_RCH_BAND, TIME_SP_RCH
TIME_SP_RCH
Speed reached detection timer setting
Limit: 0.00 - 32.76 s
Sets the detection delay time for the speed reached detection and the speed following detection.
[Related parameters]CR_SP_RCH, CR_SP_RCH_BAND, FLG_SP_RCH
Rev.S
346
4GBF0632
3.6.14.3. Speed following detection (SP_RCH, FLG_SP_RCH=0)

Function Overview
The speed following detection function detects when the speed feedback reaches the external speed reference level.
Operation Overview
・ When the absolute value of the motor speed feedback is close to the external speed reference within the dead-band
“CR_SP_RCH_BAND”, the detection signal （B_SP_RCH） will be 1 after the time set in ”TIME_SP_RCH” has elapsed.
・ The detection bit B_SP_RCH1 is assigned to the digital output or serial communication output
・ The parameter “FLG_SP_RCH” is set to 0 for this function.
・ If this function is not required, simply do not assign a detection bit (B_SP_RCHn) to any interface.
[Related parameters] FLG_SP_RCH, CR_SP_RCH_BAND, TIME_SP_RCH
Rev.S
347
4GBF0632
3.6.14.4. Low speed detection (SP_LOW)

Function Overview
The low speed detection SP_LOW detects when the motor speed (absolute value) is lower than the specified value.
Operation Overview
・ The Detection signal (B_SP_LOW) will be ON when the motor speed (absolute value) goes lower than the set value in
“CR_SP_LOW”.
・ A hysteresis can be set to the detection with “CR_SP_LOW_BAND”.
CR_SP_LOW
Speed drop detection level
Limit: 0.0 - 125.0% (1.0/100%)
Set speed for speed drop detection.
When the speed drop detection is not used, set to 0.
When the absolute value of the speed feedback becomes lower than this speed drop detection level, the speed drop detection
signal B_SP_LOW is set to 1.
Then, after the absolute value of the speed feedback becomes higher than the sum of the speed drop detection level and
CR_SP_LOW_BAND, the speed drop detection signal changes to 0.
[Related parameters]CR_SP_LOW_BAND
CR_SP_LOW_BAND
Speed drop detection return rate
Limit: 0.0 - 125.0% (1.0/100%)
Set the return rate (hysteresis rate) after the speed drop is detected.
When speed drop detection function is not used, set to 0.
[Related parameters]CR_SP_LOW
Rev.S
348
4GBF0632
3.6.14.5. Motor stall detection (ROT_F)

Function Overview
Motor stall detection ROT_F detects the motor stall.
Operation Overview
・ In sensor type vector control, when the difference of the speed reference and speed feedback become greater than the set
value of CP_ROT_F_DIFF and while the speed feedback is lower than set value of CP_ROT_F_EN, then the motor stall
will be detected after the time delay of TIME_ROT_F has elapsed.
・ In V/f control, when the stall compensation is greater than the set value CP_ROT_F_DIFF, then the motor stall will be
detected after the time delay TIME_ROT_F has elapsed.
・ In SM control, when the speed reference is bigger than the set value MS_VPLL_SP and the voltage is less than the set
value LVL_VF_LOW, then the motor stall will be detected after the time delay TIME_ROT_F has elapsed.
・ When the casting motor speed is out of the speed limit range, ROT_F is also detected. For example, the reverse speed
limit (LMT_SP_R) is 0%, and actual motor is turning in reverse(negative speed), then ROT_F is detected.
・ In case of PMSM control with PLG, it has forced rotation mode to get initial Z pulse. When this function is enable, if the
drive cannot get Z pulse for the time PM_Z_DET_TIME, ROT_F is detected.
- Sensor-type vector control case:
Speed
Reference
(SP_R)
Speed Only while SP_F is below this level

CP_ROT_F_EN
Feedback
(SP_F)
Difference
CP_ROT_F_DIFF
| SP_R - SP_F |
Fault detection
B_ROT_F_ Latched
TIME_ROT_F
Rev.S
349
4GBF0632
- Volts/Hertz case:
Speed
Reference
(SP_R)
VF_STALL works only while SP_F

Speed
Feedback is above this level
VF_STLONSP
(SP_F)
VF_STLCMP CP_ROT_F_DIFF
Fault detection
B_ROT_F_ Latched
TIME_ROT_F
- SM case:
Speed
Reference MS_VPLL_SP
(SP_R)
If motor doesn't have enough

Drive Voltage voltage, then detects fault.
(MAIN_VAC_F) LVL_VF_LOW
Fault detection
B_ROT_F_ Latched
TIME_ROT_F
- Coasting stop case:

If motor turns out of speed limit
Speed reference range, then detects fault.
(SP_R)
LMT_SP_R
Fault detection
B_ROT_F_ Latched
1 sec
Rev.S
350
4GBF0632
CP_ROT_F_DIFF
Motor stall detection level
Limit: 0.0 - 125.0% (1.0/100%)
Sets the absolute difference value between the speed reference and speed feedback.
Used for motor stall detection.
The Motor stall detection sets bit B_ROT_F_ to 0 after the delay TIME_ROT_F has elapsed and when both of the
following conditions are met:
(1) The absolute difference value between the speed reference and speed feedback exceeds the motor stall detection
difference level.
(2) The absolute value of the speed feedback is less than CP_ROT_F_EN, which is set separately.
[Related parameters] CP_ROT_F_EN, TIME_ROT_F
CP_ROT_F_EN
Motor stall detection enabling speed
Limit: 0.0 - 125.0% (1.0/100%)
Sets the absolute value of the speed feedback regarded as the motor stall.
The motor stall detection sets bit B_ROT_F_ to 0 after the delay TIME_ROT_F has elapsed and when both of the
following conditions are met:
(1) The absolute difference value between the speed reference and speed feedback exceeds the motor stall detection
difference level.
(2) The absolute value of the speed feedback is less than CP_ROT_F_EN, which is set separately.
[Related parameters] CP_ROT_F_DIFF, TIME_ROT_F
TIME_ROT_F
Speed stall detection delay timer
Limit: 0.00 - 60.00 s
Sets the detection delay time for the motor stall detection signal.
[Related parameters] CP_ROT_F_DIFF, CP_ROT_F_EN
Rev.S
351
4GBF0632
3.6.14.6. Motor reverse rotation detection (REV_ROT_F)

Function Overview
Motor reverse rotation detection detects when the motor rotates in the wrong direction.
Operation Overview
・ If the difference between the speed reference and the speed feedback is larger than set value CP_REV_ROT and their
polarities are different, “Motor Reverse Rotation” will be detected after 2 seconds.
・ The detection delay of 2 seconds is fixed and not changeable.
・ If this function is not required, mask out “B_REV_ROT_F_”.
Speed
Reference
(SP_R) Different
Polarity
Speed
Feedback
(SP_F)
Differece
CP_REV_ROT
| SP_R - SP_F |
Fault detection
B_REV_ROT_F_ Latched
2s
CP_REV_ROT
Reverse rotation detection level
Limit: 0.0 - 125.0% (1.0/100%)
Sets the motor reverse rotation detection level.
Sets the detection signal B_REV_ROT_F_ to 0 after a 2s delay has elapsed when the difference between the speed
reference and speed feedback exceeds the reverse rotation detection level, while the speed reference and speed
feedback signs are different.
Rev.S
352
4GBF0632
3.6.14.7. Speed detection error (SP_ERR, SP_ERR2)

Function Overview
Detects the speed sensing error of the speed sensors, the resolver and the PLG (pulse encoder). The Speed detection error
also detects the speed estimation error with sensor-less vector control.
Operation Overview
(1) Resolver：
Detects SP_ERR_, if the speed feedback changes more than the set value CP_SP_ERR in 1ms, and continues for 3ms
Detected speed
( | SP_FBK0 | )
CP_SP_ERR
differenctial speed
( Δ| SP_FBK0 | )
Fault detection
Detection delay Latched
B_SP_ERR_
3ms
CP_SP_ERR
Resolver SP_ERR detection level
Limit: 0.0 - 125.0 % (1.0/100%)
Sets the detection level of the speed detection error SP_ERR when the resolver is used.
When 0% is set to CP_SP_ERR, 5% is applied, by default, to the detection level of the resolver.
[Related parameters] FLT_SP_ERR, SP_ERR
FLT_SP_ERR
Resolver SP_ERR detection filter
Limit: 0.0 - 1024.0 rad/s
When the resolver is used, FLT_SP_ERR sets the filter value, used as the detection signal, of the speed detection error,
SP_ERR.
[Related parameters] CP_SP_ERR
Rev.S
353
4GBF0632
(2) Sensor-less vector：

Detects SP_ERR_, if the speed compensation (WOCD) is greater than the set value (SL_CP_SP_ERR) for the set time
(SL_TIME_SP_ERR). If it is detected after flying restart, check that FSEEK_ID_RATE is equivalent to MI_ID_BASE.
Compensation for the SL_CP_SP_ERR

Speed estimation
(WOCD)
Fault detection
Detection delay Latched
B_SP_ERR_
SL_TIME_SP_ERR
SL_CP_SP_ERR
Sensorless SP_ERR detection level
Standard value: 30.0 % (Single motor sensorless), 50.0 % (Multi-motor sensorless)
Limit: 0.0 - 125.0% (1.0/100%)
Sets the detection level of the speed detection error (SP_ERR) for sensorless type operation.
When 0% is set to SL_CP_SP_ERR, 30% is applied, by default, to the speed detection error level.
[Related parameters] SL_TIME_SP_ERR
SL_TIME_SP_ERR
Sensorless SP_ERR detection timer
Standard value: 0.00 s (2.50 s) (Single drive sensorless), 0.00 s (5.00 s) (Multi-motor sensorless)
Limit: 0.0 - 300.0 s
Sets the detection delay timer, of the speed detection error (SP_ERR) when in sensorless type operation.
When 0 is set to SL_TIME_SP_ERR, 2.50sec are applied, by default, to the detection delay.
[Related parameters] SL_CP_SP_ERR
Rev.S
354
4GBF0632
(3) Single-end PLG(Pulse Encoder)：

Detects SP_ERR2_, if the speed feedback is not detected after all of the following has occurred:
The motor torque is applied
The Speed reference is > 0.5%
The torque reference reaches the limit T_R_MAX4 - 5%
The speed feedback is < 0.2%
The detection timer TIME_SP_ERR2 has elapsed
SP_R > 0.5%

Speed
Reference 0.5%
(SP_R)
Motor Speed SP_F < 0.2%

(SP_F) 0.2%
T_R_MAX4 - 5%
Torque T_R > T_R_MAX4 - 5%
Reference
（T_R）
Fault detection Detection delay Latched

B_SP_ERR2_
TIME_SP_ERR2
TIME_SP_ERR2
SP_ERR2 detection delay time
Limit: 0.00 - 300.0 s
Sets the time delay, to detect the Speed Detection Error 2 (SP_ERR2), when PLG is used as a speed sensor.
[Related parameters] MSK_BLR3, SP_ERR2
(4) Differential PLG：

Detects SP_ERR2_, when the drive is missing the differential pulse input (hardware detection) for 10ms.
Differenctial
pulses
Fault detection Detection delay Latched

B_SP_ERR2_
10ms
Rev.S
355
4GBF0632
3.6.14.8. Automatic sensor-less mode change in Differential PG error

Function Overview
The drive can change control mode from differential PG control mode to sensor-less control in the event of a differential PG
error.
Operation Overview
・ When the drive detects missing differential PG input pulses for the set timer TIME_SP_ERR_SL, it automatically changes
mode to sensor-less vector control.
・ In the sensor-less control mode after a differential PG error, it displays B_SL_CHG_ in ALARM.
・ The drive cannot return to PG control mode with just a fault reset, the control power must also be cycled.
FLG_SP_ERR_SL
Automatic sensorless mode change flag
Standard value: 0
Limit: 0, 1
Set FLG_SP_ERR_SL to 1 in applications that use a speed sensor and need to continue operation in sensor-less mode
after the speed sensor has failed. Setting FLG_SP_ERR_SL to 0 will cause fault in the event of a speed sensor failure.
TIME_SP_ERR_SL
Automatic sensorless mode change timer
Limit: 0.000 - 300.0 s
Sets the time delay to automatically change to sensor-less mode when speed control with speed sensor is used and a speed
detection error is detected.
[Related parameters] FLG_SP_ERR_SL
Rev.S
356
4GBF0632
3.6.14.9. Analog speed input dead-band

Function Overview
Analog speed input dead-band eliminates the speed reference ripple from the analog input.
Operation Overview
・ When the difference between the software speed reference and the analog speed reference input is within the dead-band,
the analog speed reference input is not used. The center of the dead band is the software speed reference. The dead band
has the software speed reference as the center plus or minus the dead band range. When the analog speed reference
input is above or below the dead-band, the change above or below the dead-band offsets to the software speed reference
and creates a new software speed reference and moves the dead-band with it. See the figure below.
Speed reference analog input
Modified
speed reference
OP_SP_DBAND
OP_SP_DBAND
Speed reference input dead-band
Limit: 0.0 - 10.0 % (1.0/100%)
Sets the input dead-band for the analog speed reference input. When the change in analog speed reference input is
within the dead-band, that analog speed reference input is not used.
Rev.S
357
4GBF0632
3.6.14.10. Overload auto speed reduction (Soft stall)

Function Overview
Overload auto speed reduction (Soft stall) automatically reduces the motor speed to prevent an overload trip (OL5, OL20,
OL5_B and OL20_B) when an overload condition is detected. This function may be effective on variable torque applications, like
fans or pumps. It does not work with constant torque applications.
Operation Overview
If the RMS load reaches its alarm levels, it reduces the speed reference by the amount set by “CR_SOFT_STALL”.
Operation Description
Speed Speed reference is

Reference reduced to set% in
(SP_REF) "CR_SOFT_STALL"
Drive will trip if the

Overload Alarm Level load increases more
Drive can run
RMS Load continuouslly, if the
load is reduced
Soft Stall Detection

(B_SOFT_STL_)
Set “FLG_SOFT_STALL” to “1” if this function is required and reset to “0” if not used.
In soft stall operation bits “B_SOFT_STL_“ changes to “0”.
If the RMS load value exceeds the set values in “CP_RMS_A” or “CP_RMS_A20”, the internal speed reference will
gradually decrease to the % value (set in “CR_SOFT_STALL”) of the external reference.
For example, if the external reference is 90% and “CR_SOFT_STALL” is set to 80%, the drive reduces the internal
speed reference to 90%×80%=72%. If the RMS load reduces under the set values, the speed is changing back to the
external reference.
The speed reduction rate depends on the amount of RMS overload value, but never exceeds the deceleration rates
set by “CR_RATE_DEC”, etc.
This soft stall function can be also used to prevent converter overload. The converter regeneration capability of this
equipment is 80 % power in equipment capacity. Therefore, for the soft stall of the converter, this function starts level
of CS_RMS_CNV5 in power running and CP_RMS_C_INV in regeneration. In the case of regeneration, the speed
reference increases.
CR_SOFT_STALL
Overload speed reduction level
Limit: 0.0 - 100.0 % (1.0/100%)
The speed reduction rate used when an overload occurs is set here.
(Example: When the speed reference input is 90% and CR_SOFT_STALL is set to 80%, the speed reference decreases
to as low as 72% when an overload occurs.)
This setting is active when FLG_SOFT_STALL is 1.
[Related parameters] FLG_SOFT_STALL, CP_RMS_5, CP_RMS_20
FLG_SOFT_STALL
Auto speed reduction selection flag for overload
Standard value: 0
Limit: 0, 1
To reduce the reference speed when an overload reaches the overload alarm level, set this flag to 1.
[Related parameters] CR_SOFT_STALL
Rev.S
358
4GBF0632
CP_RMS_C_INV
Converter regeneration soft stall start level
Limit: 0.0 - 300.0 % (1.0/100%)
Set start level of soft stall (speed increase) by converter regeneration current.
This setting is active when FLG_SOFT_STALL is 1.
This function is not used.
[Related parameters] FLG_SOFT_STALL
Rev.S
359
4GBF0632
3.6.14.11. Current de-rating at high temperature (CS_DERATE)

Function Overview
Current de-rating at high temperature (CS_DERATE) reduces the over-load current and the motor speed when the ambient
temperature is high.
Operation Overview
・ OP_TMP_IN is being input the internal temperature of the control panel.
・ When OP_TMP_IN is greater than 40 C, the drive reduces the over-load current level.
・ When the motor current is greater than over-load current level, the drive reduces the motor speed using the Soft-stall
function.
Derating gain
100%
CS_DERATE
OP_TMP_IN
40degC 50degC
CS_DERATE
Current reduction rate for high temperature ambient
Limit: 0.0 - 100.0% (1.0/100%)
Sets the reduction gain for the overload current level when the drive ambient temperature is at 50 C.
(Example: When using 75% of the drive rated current at 50 C, set CS_DERATE = 75%.)
To enable this function, set FLG_SOFT_STALL to 1. While the current reduction function is active, B_SOFT_STL_ will be
0. Set CS_DERATE to 100% if it is not used.
[Related parameters]FLG_SOFT_STALL
Rev.S
360
4GBF0632
3.6.14.12. Energy saving drive

Function Overview
This function can save energy by flux weakening in low load. The flux weakening start speed (base speed) is automatically
adjusted depending on load current.
Operation Overview
・ The flux weakening start speed (base speed) is automatically adjusted depending on load current. When load current is
low, it can achieve energy saving drive by reducing flux current.
・ Set a filter FLT_ECO_IQF to prevent disturbance from load current ripple or rapid load change.
・ If the function is not used, set LVL_ECO_FLX to 125 %. If it is used, set lower limit of flux by this parameter depending on
control type.
・ The base speed is automatically calculated by load current based on the base speed setting CS_SP_BASE. Basically, the
base speed is calculated by CS_SP_BASE×|IQ_F|. The value is limited by LVL_ECO_FLX. In fact, the flux is kept rated
reference until the speed feedback reaches level LVL_ECO_FLX.
・ For standard usage, set CS_SP_BASE to 100 %. In this case, the base speed becomes 80 % at 80 % load current.
・ The function can be used with normal flux weakening. For example, if the CS_SP_BASE is set to 90 %, the base speed
becomes 90 % at rated torque, and 72 % by calculating 90 % × 80 % at 80 % load current.
Flux weakening [%]

start speed
(Base speed)
CS_SP_BASE
LVL_ECO_FLX
[%]
CS_SP_BASE × 100 % Load current
LVL_ECO_FLX |IQ_F|
Relation of load and base speed
[%]
SP_F
Speed feedback
Time
IQ_F
Load current
Time
Base speed
LVL_ECO_FLX
Time
FL_R Change flux refrence
Flux reference depending on load
current
Time
Keep rated flux reference Keep rated flux reference

at |SP_F| < LVL_ECO_FLX at |SP_F| < MI_SP_BASE×IQ_F
Example of applications of reduced torque characteristics
Rev.S
361
4GBF0632
FLT_ECO_IQF
Q axis current filter for energy saving drive
Limit: 0.0 - 1024.0 rad/s
Sets Q axis current filter for energy saving.
[Related parameters] LVL_ECO_FLX
LVL_ECO_FLX
Flux under limit level for energy saving drive
Standard value: 125.0 % (Nonuse setting)
60.0 % (Sensor-less vector control)
50.0 % (V/f control)
30.0 % (With sensor vector control)
Limit: 0.0 - 125.0 %
Sets Q axis current filter for energy saving.
[Related parameters] FLT_ECO_IQF, CS_SP_BASE
Rev.S
362
4GBF0632
3.6.14.13. Low load detection (UL, UL_A)

Function Overview
Low load detection (UL, UL_A) detects when the load current is low.
Operation Overview
・ The detection level for Low load detection is determined by 2 set values (CP_UL_H & CP_UL_L).
・ CP_UL_L is for the load current level at 0% speed, and CP_UL_H is for the load current level at 100% speed.
・ The Low load current level will be the square curve between CP_UL_L and CP_UL_H. See below, Figure (1), Left.
・ If CP_UL_H=CP_UL_L, the Low load current level is a constant value in all speed conditions. See below, Figure (1), Right.
・ CP_UL_SP sets the activation speed for the Low load detection. When the motor speed is more than the set value
CP_UL_SP, the load current is below the CP_UL_L/CP_UL_H curve level, and after the timer TIME_UL has timed out, the
drive will detect both a UL_T fault and a UL_A alarm. See below, Figure (2).
(1) CP_UL_H ≧ CP_UL_L for current comparison
Load Current (%) Load Current (%)
100% 100%
CP_UL_H CP_UL_H=
CP_UL_L
CP_UL_L
Detects fault Detects fault
CP_UL_SP 100% CP_UL_SP 100%

Motor Speed (%) Motor Speed (%)
(2) CP_UL_H < CP_UL_L for kW comparison
Load kW (%)
100%
CP_UL_H
Detects fault
CP_UL_SP 100%
Motor Speed (%)
CP_UL_H, CP_UL_L
Low current detection level
Standard value: CP_UL_H: 20.0%
CP_UL_L: 0.0 %
Limit: CP_UL_H: 0.0 - 100.0 % (1.0/100%)
CP_UL_L: -100.0 - 100.0 % (1.0/100%)
Sets the low current detection level for the 100% and 0% speed conditions.
Rev.S
363
4GBF0632
CP_UL_SP
Low current detection enable speed
Standard value: 0.0 % (20.0%)
Limit: 0.0 - 125.0% (1.0/100%)
Sets the activation speed for the low current detection level.
TIME_UL
Low current detection time
Limit: 0.000 - 3600.00 s
Sets the timeout time for the low current detection. When the load current is below the level (CP_UL_H, CP_UL_L) and after this
timer setting has timed out, the drive detects both UL_T for fault and UL_A for alarm.
Rev.S
364
4GBF0632
3.6.14.14. Start command type and selection (EXT0/1, START0/1, STOP0/1, DIR0/1,
SEL_DI)
Function Overview
The start command type and selection allow for the selection of two different choices for the speed reference and the run
command.
Operation Overview
・ The SEL_DI status selects one of two console groups.
・ The SEL_MODE keypad L/R selects one of two console modes or a keypad operation mode.
・ The speed reference can be from the direct analog/serial communication input to SP_REF_AIN0/1 or from the MRH,
speed up/down, function.
Selection Signals Run Commands Speed References Direction

SEL_MODE SEL_DI Alternate (EXT) Edge signal Value Input Boolean Inputs Signal
<Run/ Stop> <Run> B_SEL_MRH=0 B_SEL_MRH=1 <Reverse>
B_EXT0 B_START0 [DI_EX6.B6] [DI_EX6.B6] B_DIR0
[DI_DATA1.B13] [DI_DATA5.B4] [DI_EX5.B6]
① 0
<Stop> SP_REF_AIN0 <Acceleration>
0 B_STOP0 1.0/100% B_SP_UP
[DI_DATA5.B2] [DI_DATA5.B9]
Console <Run/ Stop> <Run> B_SEL_MRH=0 <Deceleration> <Reverse>
mode B_EXT1 B_START1 [DI_EX6.B6] B_SP_DN B_DIR1
[DI_DATA5.B0] [DI_DATA5.B3] [DI_DATA5.B8] [DI_EX5.B5]
② 1
<Stop> SP_REF_AIN1
B_STOP1 1.0/100%
[DI_DATA5.B1]
<Run> <Acceleration> <Reverse>
1 【｜】 button on 【＋】 button on DIR button
keypad keypad on keypad
③ Keypad
<Stop> <Deceleration>
operation
【○】 button on 【－】 button on
mode
keypad keypad
・ Signal “SEL_MODE” is changed by pressing the “REMOTE/LOCAL” button of the keypad, for more than 2 seconds.
However, while in operation, this changeover is disabled. If the “KPAD_PRIVILEGE” is set to “0”, the operation is fixed to
remote and cannot be changed with the keypad.
・ When momentary Start/Stop signals are received by the drive, the Stop signal has priority over the Start signal. The
alternate RUN/STOP signal EXT is logically added to this signal as shown below. So, the changing and momentary
commands must not be used at the same time.
・ The Up/Down function changes the speed reference according to the MRH rate “CR_RATE_MRH”, while the up/down
command is ON. When both of the up/down input commands are ON, the down command has priority.
Rev.S
365
4GBF0632
Speed
B_SEL_MRH
Reference
SP_REF1, 2
B_SEL_MODE Kepad mode=1, Other=0 etc. ＋ SP_REF_INP
B_SEL_DI ＋
Dead band
OP_SP_DBAND
① SP_REF_AIN0
Minimum speed limit
LMT_SP_MIN
② SP_REF_AIN1 SP_REF4
Speed ×
ReferenceInputs ０
①，② B_SP_UP_DI
SP_MRH Polarity
SP_UP
③ B_SP_UP_KPAD Switch
MRH
①，② B_SP_DN_DI function
SP_DN
③ B_SP_DN_KPAD
Speed Up/Down SP_MRH counts up with SP_UP=1

command (Digital) SP_MRH counts down with SP_DN=1
（CR_RATE_MRH sets rate of count
① B_DIR0 up/down.）
② B_DIR1 0: Forward
Keypad 1: Backword
③ B_DIR_MODE
Speed Direction
command (Digital)
① B_START0
Run
Comands
② B_START1 command
Start
S
Q B_EXT
③ Kepad "Start" Button
R
① B_STOP0
Comands
② B_STOP1
Stop
③ Kepad "Stop" Button
B_EXT0
Comands
①
Run
② B_EXT1
Rev.S
366
4GBF0632
CR_RATE_MRH
Enhanced Keypad acceleration / deceleration rate
Limit: 0.0 - 3000 s
Sets the increase-and-decrease rate (time which it takes to increase to 100%) of the speed reference, when operating the
motor, using the panel key of the Enhanced Keypad. When 0.0 sec is set as the increase-and-decrease rate, 10.0 sec are
applied automatically.
[Related parameters] KPAD_PRIVILEGE, CR_RATE_MRH_DN
CR_RATE_MRH_DN
Enhanced Keypad deceleration rate
Limit: 0.0 - 3000 s
Sets the decrease rate (time which it takes to increase to 100%) of the speed reference, when operating the motor, using the
panel key of the Enhanced Keypad. If 0.0 s is set, the decrease rate is the value set in CR_RATE_MRH.
[Related parameters]KPAD_PRIVILEGE, CR_RATE_MRH
FLG_MRH_CLR
Enhanced Keypad speed reference zero clear in stopping operation flag
Standard value: 0
Limit: 0, 1
Set to 1, to make the speed reference zero, after the motor is stopped with the "STOP" key, when using the panel key, of the
Enhanced Keypad.
FLG_STOP_MODE
Stop key effective mode flag
Standard value: 0
Limit: 0, 1
Set to 1, when only the specified stop signal from the Enhanced Keypad, the remote digital input or the local digital input is to be
used.
Set to 0, when all of the stop input is available.
Combination of KPAD_PRIVILEGE and 0 (standard) 1, 2

FLG_STOP_MODEKPAD_PRIVILEGE
0 1 0 1
FLG_STOP_MODE
(standard) (standard)
Enhanced or multi-language keypad
R L, R L R
Local (L) / Remote (R)
DI_EX5.B0 / SEL 0: Local，1: Remote 0, 1 0 1 0, 1 0 0 1
DI_EX5.B2 / STOP0 Local yes yes no yes no yes no
DI_EX5.B1 / STOP1 Remote yes no yes yes no no yes
Enhanced or multi-language keypad
yes no no yes yes no no
Stop 【｜】
[Related parameters] KPAD_PRIVILEGE
Rev.S
367
4GBF0632
3.6.14.15. Frequency Jump

Function Overview
Frequency jump prevents the motor speed from staying in resonance frequencies, of the drive system.
Operation Overview
・ The Internal speed reference jumps up and down to keep away from set speeds.
・ The Center frequency of jumping ranges are set in “CR_SP_JP1 - 3” and the jumping widths are set in
“CR_SP_JP_BAND1 - 3”.
・ If the external reference stays in a jump area, the lower value of the jumping range is taken as an internal speed reference,
while accelerating and the upper value is taken as an internal speed reference, while decelerating.
・ When this function is not required, the set the “CR_SP_JP1 - 3” and “CR_SP_JP_BAND1 - 3” parameters to zero.
・ If only one or two jumping areas are required, a smaller number and range of areas may be used. Parameters for unused
areas are set to zero.
・ If two jumping areas overlap, the jump widths are combined. However, this kind of setting is not recommended.
Internal Speed
Reference
(Ramp Input)
CR_SP_JP3
CR_SP_JP2
CR_SP_JP_BAND3
CR_SP_JP_BAND3
CR_SP_JP_BAND2
CR_SP_JP1 CR_SP_JP_BAND2
CR_SP_JP_BAND1 External Speed

CR_SP_JP_BAND1 Reference
CR_SP_JP1 CR_SP_JP2 CR_SP_JP3

Same for
Reversing
CR_SP_JP1 - CR_SP_JP3
Frequency jump center frequency
Limit: 0.0 - 125.0 % (1.0/100%)
Sets the three center frequency points, for a jump, to avoid mechanical resonant frequency.
Sets the percentage of the frequency jump.
Use the absolute value for the center frequency. The jump is set in the same range for both the normal and reverse
rotations.
Set all points to 0 if the frequency jump is not used.
When using one or two points out of the three points, use lowest numbers first (first use 1, then 2, then 3). Set 0 for the
setting value(s) that is/are not used.
Rev.S
368
4GBF0632
CR_SP_JP_BAND1 - CR_SP_JP_BAND3
Frequency jump distance
Limit: 0.0 - 30.0% (1.0/100%) (If frequency jump range goes below 0, the jump is limited to 0.)
Sets the three center frequency points, for a jump, to avoid mechanical resonant frequency.
Sets the percentage of the frequency jump.
Set all points to 0 if the frequency jump is not used.
When using one or two points out of the three points, use lowest numbers first (first use 1, then 2, then 3). Set 0 for the
setting value(s) that is/are not used.
The jump ranges should not overlap one another.
The frequency jump is performed before the speed reference rate processing. Therefore, when the frequency jump is
performed, the speed reference SP_R will change at an internal rate.
FLG_SP_R_JP
Rate jump selection
Standard value: 0
Limit: 0, 1
Set to 0 for the speed reference to avoid the frequency jump region. Set to 1 to change the frequency in steps so that the
internal speed reference does not enter the frequency jump region.
Rev.S
369
4GBF0632
3.6.14.16. Torque release/reduction rate (Torque helper option)

Function Overview
In mechanical tie torque control mode (it follows external torque reference all the time), the drive can have a torque
release/reduction rate and even the external torque reference has a step change.
Operation Overview
・ In mechanical tie torque control mode (FLG_TENSEL = -1 or -2), B_ST in DI_DATA1 needs to be 1 before the start
command.
・ After the start command and restart sequence, the drive releases its torque with the rate setting CR_RATE_TRQ_A.
・ When the start command is removed, the drive reduces its torque reference to MA_ZERO_TRQ, then shuts off the
current.
・ The torque reference will be reduced to problem-free minimum torque (MA_ZERO_TRQ) according to rate of
CR_RATE_TRQ_D for the system, and interrupted the current.
<START> <STOP>
EXT
RNTD
70% (Example)
SP_F
External torque
reference
T_R
MA_ZERO_TRQ
(Zero Torque Level)
CR_RATE_TRQ_A
CR_RATE_TRQ_D
Speed Search
CR_RATE_TRQ_A
Helper Torque Release Rate
Limit: 0.0 - 3600 s
Sets the internal rate, corresponding to the torque 0 - 100% reference signal release time.
Sets 60.00 s to release 0 - 100% in 60 seconds.
CR_RATE_TRQ_D
Helper Torque Reduction Rate
Limit: 0.0 - 3600 s
Sets the internal rate corresponding to the torque 100% - 0% reference signal reduction time.
Sets 60.00 s to reduce 100 - 0% in 60 seconds.
MA_ZERO_TRQ
Zero torque detection level
Limit: 0.0 - 125.0 % (1.0/100%)
Set the minimum torque that will not have a torque impact on the application.
Rev.S
370
4GBF0632
3.6.14.17. Spare sequence assignment (FUNC_SPA)

Function Overview
Spare sequence assignment (FUNC_SPA) assigns any internal bit data to the spare input B_SPA1, B_SPA2, B_SPA3, and
B_SPA4. Then it enables any of the spare input bits B_SPA1, B_SPA2, B_SPA3, and B_SPA4 into the drive protection
sequence.
Operation Overview
・ Bit signals can be assigned to sequence spare inputs B_SPA1, B_SPA2, B_SPA4 or B_SPA4 with the setting of
parameters FUNC1_SPA1_AS, FUNC_SPA2_AS, FUNC_SPA3_AS, or FUNC_SPA4_AS.
・ When FUNC1_SPA1_AS, FUNC_SPA2_AS, FUNC_SPA3_AS, or FUNC_SPA4_AS are assigned “B_DUST”, the spare
inputs are determined with the digital inputs DI_EX1 and DI_EX2.
・ To enable the spare inputs, the mask setting and the sign setting configurations for the digital inputs DI_EX1 and DI_EX2
are also required.
DI_EX1
BIEX1_SPA1
DI
Filter
DI_IN1
Bit assignment
DI1_AS~DI10_AS
DI_EX2
BIEX2_SPA2
Bit assignment
FUNC_SPA1_AS BIEX2_SPA3
FUNC_SPA2_AS
FUNC_SPA3_AS BIEX2_SPA4
FUNC_SPA4_AS
Enable when it is not
B_DUST
FUNC_SPA1_AS – FUNC_SPA4_AS
Spare sequence input assignment address
Limit:
Sets the bit name for sequence spare assignment.
Rev.S
371
4GBF0632
3.6.14.18. Simple programmable logic (FUNC1~4)

Function Overview
The simple programmable logic function (FUNC1~4) can have simple programmable logic sequences (4 sets) to calculate digital
logic and four arithmetic operations.
Operation Overview
・ The simple programmable logic (FUNC1~4) has four kinds of parameters
(a) The address settings FUNCx_INP1_AS and FUNCx_INP2_AS.
Each block can have two input assignment, it determines bit data or floating point data.
On the firmware 08A or later, 16 bits and 32 bits integer can be also set. In addition, bit data can be calculated not only
digital logic operation but also four arithmetic operations.
(b) The Gains and offsets FUNCx_INP1_GS, FUNCx_INP2_GS, FUNCx_INP1_OS and FUNCx_INP2_OS
When using floating data inputs, each 2 inputs can have their own gain and offset.
(c) The error level FUNCx_ERR
When performing data compare, FUNCx_ERR determines the hysteresis.
(d) The time on/off delay (FUNCx_TON and FUNCx_TOFF) it can have a time delay for the logic bit output.
・ Because these blocks are in a 100ms task, they cannot used in a faster sequence than 100ms.
・ If calculated results by this function are assigned to the BLR sequence by using FUNC_SPA of previous clause, it needs to
calculate 1 in fault status and to reverse SPAn bit logic by SGN_DIn. Or if it is used a logic of 0 in fault status, it needs to be
delayed more then 100ms by setting TIME_SPA, and to assign SPAn_T (with OFF delay) to protection sequence.
Input assignment B_FUNCx_INP1 Digital Logic 9 9 9

(NOT1, NOT2, AND, OR,
FUNCx_INP1_AS B_FUNCx_INP2 TDON TDOFF
XOR, NAND, NOR, FFQ,
FUNCx_INP2_AS FFNQ)
FUNCx_TON FUNCx_TOFF
FUNCx_OUT1
FUNCx_OUT2
4
x Gain Arithmetic Logic
+ Offset (+, -, x, /)
FUNCx_INP1_GS
FUNCx_INP1_OS
FUNCx_INP2_GS
4 4 4
FUNCx_INP2_OS Compare Logic
(<, >, =, !=) TDON TDOFF
FUNCx_ERR FUNCx_TON FUNCx_TOFF
Function Output symbol Data type Output

Digital B_FUNCx_NOT1 Bit Not INP1
Logic B_FUNCx_NOT2 Bit Not INP2
B_FUNCx_AND Bit INP1 AND INP2
B_FUNCx_OR Bit INP1 OR INP2
B_FUNCx_XOR Bit INP1 XOR INP2
B_FUNCx_NAND Bit INP1 NAND INP2
B_FUNCx_NOR Bit INP1 NOR INP2
B_FUNCx_FFS Bit S-R flip flop Q data (S=INP1, R=INP2)
B_FUNCx_NFFS Bit S-R flip flop NQ data (S=INP1, R=INP2)
Arithmetic FUNCx_OUT1 Floating INP1 x GS1 + OS1
Logic FUNCx_OUT2 Floating INP2 x GS2 + OS2
FUNCx_ADD Floating OUT1 + OUT2
FUNCx_SUB Floating OUT1 - OUT2
FUNCx_MUL Floating OUT1 x OUT2
FUNCx_DIV Floating OUT1 / OUT2
Compare B_FUNCx_LES Bit OUT1 < OUT2, (OUT1 > (OUT2 + ERR) then back to 0)
Logic B_FUNCx_GRT Bit OUT1 > OUT2, (OUT1 < (OUT2 – ERR) then back to 0)
B_FUNCx_EQ Bit (OUT2 – ERR) =< OUT1 =< (OUT2 + ERR)
B_FUNCx_NEQ Bit OUT1 < (OUT2 – ERR) or (OUT2 + ERR) < OUT1
Rev.S
372
4GBF0632
FUNCx_INP1_AS, FUNCx_INP2 _AS

Simple programmable logic input assignment address
Limit:
FUNCx_INP1_GS, FUNCx_INP2_GS
Simple programmable logic gain
Standard value: 0
8 8
Limit: -10 - 10
FUNCx_INP1_OS, FUNCx_INP2_OS
Simple programmable logic offset
Standard value: 0
8 8
Limit: -10 - 10
FUNCx_INPx_AS, FUNCx_INPx_GS and FUNCx_INPx_OS specify the bit or floating point data address, gain, and offset
of the simple programmable logic (4 groups). Gain and offset are effective only when data assignment is for floating point
data.
FUNCx_ERR
Simple programmable logic compare error
Standard value: 0
8 8
Limit: -10 - 10
Specify the compare error level of the simple programmable logic (4 groups). FUNCx_ERR is active only when the data
assignment is for floating point data.
FUNCx_TON, FUNCx_TOFF
Simple programmable logic on/off delay time 1 to 4
Limit: 0.0 - 300.0 s
Sets the on/off time delay for the Simple programmable logic 1 to 4.
Rev.S
373
4GBF0632
3.6.14.19. Option data substitution processing(FUNC_GET, FUNC_PUT)
Overview of function
Signals generated by simple programmable logic function or any variables exist in the drive can substituted to any
variables exist in the drive.For example, this function can substitute any signals from digital or analog input to any simbols
without hardware connection.
Operation overview
・ Set source signals to FUNC_GETx_AS, and set destination signal FUNC_PUTx_AS(x=1~4). Same x GET signal
and PUT signal are pair.
・ Signal’s data type which and set to these parameters are bit integer or floating point number only. And, pair signal’s
data types are must be same. If not, the drive does not excute substitution processing.
・ PUT signals shuld be transmission signals or analog input signals or digital input signals. If signals calculated some
other part is set, there will be a risk of some error.
FUNC_GET1_AS, FUNC_GET2_AS, FUNC_GET3_AS, FUNC_GET4_AS

Optional data get1 ~ 4
Data type: Symbol(32 - bit integer)
Standard value: N/A
Limit: N/A
Set signals wanted to use in option data substitution processing.
Sets 60.00 s to reduce 100 - 0% in 60 seconds.
[Related Parameters] FUNC_PUTx_AS
FUNC_PUT1_AS, FUNC_PUT2_AS, FUNC_PUT3_AS, FUNC_PUT4_AS

Optional data put1 ~ 4
Data type: Symbol(32 - bit integer)
Standard value: N/A
Limit: N/A
Set substituted symbols in option data substitution processing. Signals not calculated in other part should be set.
[Related Parameters] FUNC_GETx_AS
Rev.S
374
4GBF0632
3.6.14.20. Interface extension of DI/O, AI/O for PLC

Function Overview
It can be input PLC data from drive and output PLC data to drive by hardware.
Operation Overview
Set each gain as below.
DO_PLC
Input DO_PLC to SCAN_RCVx_AS by gain 1. Output DOx_AS which is set B_DO_PLC_x.
DI_PLC
Set B_DI_PLC_x toDIx_AS, output DI_PLC to SCAN_WRx_AS by gain 1.
AIN_PLC
Receive analog input by 1.0 pu. Set proper gain for count value (eg. 25000).
AOUT_PLC
Receive count value (eg. 25000) by PLC. Set to count when outputting at 10V by gain 1 on AOUTx_GS.
Digital input 16 points (below)

DO_PLC
AOUT_PLC Digital output 16 points (below)
PLC
Programmable Communication TM-MVe2
logic controller Analog input 1 point (AIN_PLC)
DI_PLC
AIN_PLC Analog output 1 point (AOUT_PLC)
BIT DI_PLC DO_PLC

F DI_PLC_F DO_PLC_F
E DI_PLC_E DO_PLC_E
D DI_PLC_D DO_PLC_D
C DI_PLC_C DO_PLC_C
B DI_PLC_B DO_PLC_B
A DI_PLC_A DO_PLC_A
9 DI_PLC_9 DO_PLC_9
8 DI_PLC_8 DO_PLC_8
7 DI_PLC_7 DO_PLC_7
6 DI_PLC_6 DO_PLC_6
5 DI_PLC_5 DO_PLC_5
4 DI_PLC_4 DO_PLC_4
3 DI_PLC_3 DO_PLC_3
2 DI_PLC_2 DO_PLC_2
1 DI_PLC_1 DO_PLC_1
0 DI_PLC_0 DO_PLC_0
[Related parameters] SCAN_RCVx_AS, SCAN_WRx_AS, DOx_AS, DIx_AS, AOUTx_GS
Rev.S
375
4GBF0632
3.6.14.21. Speed reference process (PID) control (OP_PR)

Function Overview
A speed reference can be operated by the speed reference process (PID) and control (OP_PR) which has a simple external
process control loop (PID), such as air flow, material temperature, or air pressure.
Operation Overview
・ The analog or serial input process reference (PR_REF) and process feedback (PR_FBK) need to be supplied by the
system.
・ The speed reference SP_REF_AIN0 or SP_REF_AIN1 can be used as a feed-forward reference.
・ The process control is enabled while B_RNTD = 1 and B_PR_ST = 1. (B_PR_ST is DI_DATA6.B13 from the digital input
or serial communication).
・ The process response time needs to be slower than the drive acceleration or deceleration response time. The drive needs
to respond faster than what the process requires.
Speed reference (can be 0%) LMT_SP_MIN

SP_REF_AIN0/ SP_REF_AIN1 +
SP_REF4
OP_PR_LMT_INU +
Process reference OP_PR_LMT_INL OP_OP_LMT_OUT
+ Proportional +
PR_REF + +
dx gain
- SP_REF_PID
+
OP_PR_RATE OP_PR_P
+
Integral gain
+
OP_PR_I
Process feedback
Differential gain
PR_FBK
Control enable FLG_PR_DIN OP_PR_A

OP_PR_FLT 0: REF - FBK OP_PR_AT
B_RNTD 1: FBK
B_PR_ST (DI_DATA6.B13) A
PID Enable
FLG_PR_DIN
Process control differential input selection
Standard value: 0
Limit: 0, 1
Set to 0 when the difference between the process reference and process feedback is used for the differential control input.
Set to 1 when the process feedback is used for the differential control input.
OP_PR_A
Process control differential anti-overshoot gain
Standard value: 0
Limit: 0 - 100000
OP_PR_AT
Process control differential anti-overshoot ω AT gain
Limit: 0.0 - 1000.0 rad/s
OP_PR_P
Process control proportional gain
Limit: -100000 - 100000
Rev.S
376
4GBF0632
OP_PR_W1
Process control response gain
Limit: 0.00 - 1000.0 rad/s
Sets the process control gain.
OP_PR_FLT
Process control feedback filter
Limit: 0.0 - 1024.0 rad/s
This parameter sets the low pass filter for the process feedback.
OP_PR_RATE
d/dt rate for process control reference input
Limit: 0.00 - 3600 s
Sets the internal time rate corresponding to the process reference signal to change from 0 to 100%.
Set to 60.00 s to increase 0 to 100% in 60 seconds.
OP_PR_LMT_INU
Process control input upper limit
Limit: 0 - 100000.0 % (1.0/100%)
Sets the input upper limit of the process control.
OP_PR_LMT_INL
Process control input lower limit
Standard value: -100.0 %
Limit: -100000.0 - 0 % (1.0/100%)
Sets the input lower limit of the process control.
OP_PR_LMT_OUT
Process control output limit
Standard value: 100.0
Limit: 0 - 125.0% (1.0/100%)
Sets output limit of the process control.
Rev.S
377
4GBF0632
3.6.14.22. Auto retry (RTRY)

Function Overview
When using the Auto retry (RTRY) function, the drive can reset and restart, by itself, if the fault is caused by a transient event.
Use this function with caution, as there are risks associated with auto-reset and restart that may damage the equipment.
Operation Overview
・ Attempt number to retry (0 - 10 times).
・ Interval time between retries (0.0 - 300.0s)
・ Choose whether to output a FAULT signal (DO) or not.
・ Choose whether to interrupt a retry with UVS off, P_SW off, IL off, STCMD off or FRST on.
・ The numbers of retry operation will clear to zero, after five minutes starting operation.
RTRY_F_EN
Automatic retry fault output enable
Standard value: 0
Limit: 0, 1
Set the FAULT output enable in case of an automatic retry. If it is 1, the drive will output a FAULT in case of an automatic
retry.
RTRY_INTVL
Automatic retry interval time
Limit: 0.0 – 300.0 s
Sets the interval time for an automatic retry from a specified fault determined by the setting of RTRY_MSK.
RTRY_MSK
Automatic retry enable mask
Limit:
RTRY_MSK holds the mask settings for the Automatic retry function.

F BLR_HFD Other fault except PSF
E N.U. Not used
D N.U. Not used
C N.U. Not used
B N.U. Not used
A N.U. Not used
9 N.U. Not used
8 N.U. Not used
7 N.U. Not used
6 N.U. Not used
5 N.U. Not used
4 OH_ Power module overheat
3 OL_ Overload
2 FUSE_ Fuse blown
1 OV_ DC overvoltage
0 OCA_ AC overcurrent
Rev.S
378
4GBF0632
RTRY_MAX
Automatic retry trial max time
Standard value: 0
Limit: 0 - 10
Sets the maximum attempts for automatic retry.
Rev.S
379
4GBF0632
3.6.14.23. Output open inverter operation test mode

Function Overview
The drive has special mode which is set automatically setting for inverter gating operation test in the output open.
Operation Overview
・ BIEXH_OPN_TST assigns to digital input. The digital input sets to 1 to transfer to the output open test mode. The digital
input sets to 0 to transfer to the normal mode in the same way.
・ Due to transfer to the output open mode from the normal mode, or to the normal mode from output open test mode, it
needs that FLDR is off.
・ The test status signal B_OPN_TST is 1 in the test mode, and it is 0 in the normal mode.
・ Output contactor (ACSW) turns off forcibly but the ON answer signal returns automatically in the test mode.
・ If SYSTEM setting is set to vector control with/ without sensor, it is automatically changed to V/f control mode in the test
mode. Similarly, it is automatically changed SM control to IM control.
・ Masks setting for protection sequences and other special function setting are automatically set in the test mode. It
provides easily output open test condition.
Automatic setting (B_OPN_TEST = 1)
1. ACSW setting
FLDR Command : 0
N B_OPN_TST Answer: 1
General digital input 0 : Normal mode
BIEXH_OPN_TST 1 : Test mode 2. SYSTEM setting
Vectol contor → V/f control
SM control → IM control
3. Masks setting
4. Other setting
Rev.S
380
4GBF0632
3.6.14.24. Fans control

Function Overview
The drive can have fan control.
Operation Overview
・ The fan control depends on the flag setting (FLG_CFN_CTRL), the fan’s on timing can be changed.
・ A fan command off delay by timer setting TIME_CFN_OFF is available.
・ Event counter 15 and 16 memorize respectively accumulated total operation time of main fan and redundant fan.
・ Redundant fan control is available (FLG_CFN_RDNT = 1).
(a) When one fan is down, this control initiates the redundant fan’s command and indicates ALARM for the fan bank
controlling the fan that went down.
(b) Even when no fan is down, the redundant fan control initiates the other fan’s command if the current fan is still healthy
after 30 days of operation.
(c) If signal inputs to internal digital input (CFN_SEL: CN22 on GIF board), the fan control switches waiting fans at every
signal input. For the (b), the 30 days timer is cleared and starts from the beginning.
(d) If both fans are down, and the redundant fan control detects C_FN_T after TIME_CFAN.
(e) The redundant fan control can be reset by FRST.
FLG_CFN_CTRL
Fan on timing selection
Standard value: 1
Limit: 0, 1
FLG_CFN_CTRL Operation
0 Always ON
1 ON after AC_MCCB closed
FLG_CFN_RDNT
Redundant fan control selection
Standard value: 0
Limit: 0, 1
Set to 1 for the redundant control.
TIME_CFAN
Cooling fan timer
Limit: 0.00 - 300.0 s
Sets the delay time to detect the Equipment ventilation fan stop timer (C_FN_T).
[Related parameters] MSK_UVA1, C_FN_T,
TIME_CFN_OFF
Fan off delay timer
Standard value: 30.00 min
Limit: 0.00 - 300.0 min
Sets the delay time for turning off the cooling fans.
Rev.S
381
4GBF0632
TIME_CFN_ANS_DLY
Cooling Fan Answer di timer
Standard: 0.1 s
Limit: 0.0 ~ 300.0 s
Sets the DI input delay time of the cooling fan. To avoid detecting fan alarms because the fan is slower than the control power
supply and the stop answers come back sooner is needed in case of instantaneous interruption accident, set it longer than power
supply failure recovery time(CP_PSFRCV_TIME).
[Related parameters] CP_PSFRCV_TIME
Rev.S
382
4GBF0632
3.6.14.25. EC fans speed control

If this equipment is applied to EC (Electronically Commutated motor) fan as cooling fan, the EC fans speed control function can be
used as option. This function controls rotation frequency of the fans to keep fin temperature constant. Especially, it has a
beneficial effect on alleviation of heat cycle for the application which cycles through run and stop operation. This function is only
for the drive Type-G cell inverter is installed.
Previous value of fin temperature reference Fin temperature increase detection
PI control
OP_CFN_P Speed limit Speed rate
Dead band
OP_CFN_I 100 % OP_CFN_RATE Analog output
FIN_TMP_DBAND
＋ Fin temperature
- ＋ reference - ＋ (1.0/ 100 %)
＋ CFN_SP_REF
＋＋
OP_CFN_SPL
100 %
Differenceal (fixed value)
Fin temperature feedback OP_CFN_A
OP_CFN_AT
Load current reference
The following table shows variables regarding fin temperature of cell inverters. These can be correctly detected, when main power
is on and control power of cell inverters is active.
Variable Note
FIN_TMP_Un N = 1 ~ 6, Fin temperature of U-phase cell inverter
FIN_TMP_Vn N = 1 ~ 6, Fin temperature of V-phase cell inverter
FIN_TMP_Wn N = 1 ~ 6, Fin temperature of W-phase cell inverter
FIN_TMP_FBK Average fin temperature of all of used cell inverters
FIN_TMP_MAX Maximum fin temperature of all of used cell inverters
FIN_TMP_MIN Minimum fin temperature of all of used cell inverters
OP_CFN_P
EC fans control proportion gain
Limit: -100000 – 100000
Set to proportion gain for EC fans control.
OP_CFN_W1
EC fans control response gain
Limit: 0.0 – 1000.0 rad/s
Set to response gain for EC fans control.
OP_CFN_A
EC fans control anti-overshort gain
Limit: -100000 – 100000
Set to anti-overshort gain for EC fans control.
Rev.S
383
4GBF0632
OP_CFN_AT
EC fans control anti-overshort ωT gain
Standard value: 0.1 rads/s
Limit: 0.0 – 1000.0 rad/s
Set to anti-overshort ωT gain for EC fans control.
OP_CFN_RATE
EC fans control speed rate
Limit: 0.0 – 3600.0 s
Set to speed rate gain for EC fans control.
OP_CFN_SPL
EC fans control minimum speed
Limit: 0.0 – 100.0 %
Set to minimum speed for EC fans control.
OP_CFN_CELL_OH
Cell overheat alarm avoid temperature difference
Standard value: 5.0 deg C
Limit: -100.0 - 100.0 deg C
If max value of fin temperature of each cells was over cell overheat alarm setting(CP_CELL_OH_A) minus this parameter
value, the drive stop to control EC fan speed, and change the speed 100%. Set OP_CFN_RATE accelerate rate to 100%.
[Related parameters] CP_CELL_OH_A , OP_CFN_RATE
OP_CFN_TR_OH
Transformer overheat alarm avoid temperature difference
Standard value: 5.0 deg C
Limit: -100.0 - 100.0 deg C
If rise temperature of input transformer was over overheat alarm setting(CP_OH_TR_A) minus this parameter value, the drive
stop to control EC fan speed, and change the speed 100%. Set OP_CFN_RATE accelerate rate to 100%.
If fan speed reference is not interface with transformer panel, set some minus value. Then, transformer panel overheat
alarm does not influence EC fan speed control in main circuit panel.
[Related parameters] CP_OH_TR_A , OP_CFN_RATE
Rev.S
384
4GBF0632
FIN_TMP_DBAND
Fin temperature dead band
Limit: 0.0 – 10.0 degC
Set to deadband of fin temperature of cell inverters for EC fans control.
TIME_CFN_MAX
Overheat avoid max fan speed keep timer
Limit: 0.0 - 3600.0 s
If overheat alarm of cell or transformer are detected, the drive stop EC fan speed control and change speed reference 100%.
Set time delay to restart speed control of EC fan to this parameter.
Rev.S
385
4GBF0632
3.6.14.26. Event counter (EVENT)

Function Overview
The drive events are recorded in the “Event Counter”.
Operation Overview
・ The data of the “Event Counter” is stored in the EEPROM on the main control board.
・ From specification of crystal oscillator used in CTR board, it is possible to cause error of 1/10000 sec error per 1 sec.
However, we do not guarantee the accuracy as drives.
Event Name Unit Calculation method

1 Motor kWh kWh Accumulates VI_POWER at every 500ms sampling
2 Motor kVAh kVAh Accumulates VI_KVA at every 500ms sampling
3 Control on time hour Counts at every 500ms sampling
4 Run time hour Counts at every 500ms sampling while B_FLDR=1
5 ACSW open count count Counts B_ACSW off
6 BLF off count count Counts B_BLF off
7 BLR off count count Counts B_BLR off
8 UV off count count Counts B_UV off
9 READY off count count Counts B_READY off
10 PSF restart count count Counts B_PSF_RCV_F3 on
11 Est. Input kWh kWh Accumulates LINE_POWER at every 500ms sampling
12 Est. Input kVAh kVAh Accumulates LINE_KVA at every 500ms sampling
13 Motor power consumption kWh Accumulates VI_POWER > 0 at every 500ms sampling
14 Motor power generation kWh Accumulates VI_POWER < 0 at every 500ms sampling
15 Fan-A on time hour Counts at every 500ms sampling while B_DI_C_FN = 1
16 Fan-B on time hour Counts at every 500ms sampling while B_DI_C_FN_B = 1
Rev.S
386
4GBF0632
3.6.14.27. Time synchronization by using digital or serial communication input
Function Overview
This function can synchronize time set by parameters in advance or set by serial communication to CTR board and display keypad
(KPAD & GOT) by using triggered digital or communication input.
Operation Overview
・ Set six items Hour, Minute, Second, Month, Day and Year by three parameters when synchronizing discretionary set time
in advance. For example, if you want to synchronize CTR board and display time to 8:10:30 pm February 13th 2025, set
below.
CHG_TIME_HR_MIN = 2010
CHG_TIME_SEC_MO = 3002
CHG_TIME_DAY_YR = 1325
・ Set six items Hour, Minute, Second, Month, Day and Year by three parameters when synchronizing discretionary set time
in advance. For example, if you want to synchronize CTR board and display time to 8:10:30 pm February 13th 2025, set
below.
・ When setting the variables, the three parameters do not necessarily have to be set. If the parameters are set, the setting
can be overwritten by the variables.
・ BIEXH_CHG_TIME assigned by general digital input or SSEQ_CHG_TIME assigned by serial communication word can
be the trigger to synchronize setting time to CTR board and display time.
・ The CTR board time is not changed when setting inadequate value, but Display time is changed to retained time by CTR
board.
・ The month, day and year are not synchronized even if received the input trigger when setting 0. Therefore, the hour and
minute can be synchronized by setting only one parameter CHG_TIM_HR_MIN. In the case, the second is cleared to 0.
CHG_TIME_HR_MIN
Time synchronization setting (Hour & Minute)
Standard value: 0
Limit: 0 - 2359
Note: Initialization, Available firmware 08A or later
Set to hour and minute to synchronize in advance. Set to 4 digits hour and minute by 2 digits decimal. Use
CHG_TIME_HR_MIN_T when setting by communication.
[Related parameters] CHG_TIME_SEC_MO, CHG_TIME_DAY_YR
CHG_TIME_SEC_MO
Time synchronization setting (Second & Month)
Standard value: 0
Limit: 0 - 5912
Set to second and month to synchronize in advance. Set to 4 digits second and month by 2 digits decimal. Use
CHG_TIME_ SEC_MO _T when setting by communication.
[Related parameters] CHG_TIME_SEC_MO, CHG_TIME_DAY_YR
CHG_TIME_DAY_YR
Time synchronization setting (Day & Year)
Standard value: 0
Limit: 0 - 3199
Set to day and year to synchronize in advance. Set to 4 digits day and year by 2 digits decimal. Use CHG_TIME_
DAY_YR _T when setting by communication.
[Related parameters] CHG_TIME_HR_MIN, CHG_TIME_SEC_MO
Rev.S
387
4GBF0632
3.6.15. Restart after instantaneous power failure

Set parameters related to restart after instantaneous power failure.
FLG_PSFRCV
Power supply failure recovery flag
Standard value: 1
Limit: 0, 1
When using the power failure recovery function, set to 1.
FLG_PSF_CLR
Power supply failure clear
Standard value: 0
Limit: 0-2
If a power failure occurs, it is not performed the recovery process and resets the PSF failure by each setting under the following
conditions.
In the case of FLG_PSF_CLR = 1:
・ Off the STCMD within power failure compensation time (CP_PSFRCV_TIME).
・ An answer of the upper level circuit breaker is off within power failure compensation time (CP_PSFRCV_TIME). (When
operating run and stop of the drive by on-off state of the upper level circuit breaker.)
In the case of FLG_PSF_CLR = 2:
・ Exceeded the power failure compensation time (CP_PSFRCV_TIME).
Power source failure resteart mode of combination FLG_PSFRCV and FLG_PSF_CLR

FLG_PSF_CLR FLG_PSFRCV Power recovery within CP_PSFRCV_TIME Time out
Stop due to the power source failure, it
(1) 0 Stop due to the power source failure, it
does not restart. It outputs FAULT signal.
0 does not restart. It outputs FAULT
(2) 1 Restart signal.
Time out with maintenance of STCMD

FLG_PSF_CLR FLG_PSFRCV STCMD off within CP_PSFRCV_TIME
on
Reset power source failure Stop due to the power source failure, it
(3) 1 0/1 (it does not output FAULT) does not restart. It outputs FAULT
signal.
Input main AC breaker off within Time out with maintenance of input
FLG_PSF_CLR FLG_PSFRCV
CP_PSFRCV_TIME main AC breaker on
Reset power source failure
(4) 0 does not restart. It outputs FAULT
(it does not output FAULT)
signal.
1
For power source failure, same as (2), and for operation of main AC breaker, same as
(5) 1
(4) depending on CP_PFCRCV_TIME setting.
FLG_PSF_CLR FLG_PSFRCV Power recovery within CP_PSFRCV_TIME Time out

(6) 0 does not restart. It dose not output FAULT Stop due to the power source failure, it
2 signal. does not restart. It dose not output
FAULT signal.
(7) 1 Restart
FLG_SSEQ_PSFDO
Holding digital output while power supply failure restart operation
Standard value: 1
Limit: 0, 1
If FLG_SSEQ_PSFDO is set to 1, then UV, READY, and RNTD in SSEQ_OUT will be held to 1, during the PSF restart operation.
Rev.S
388
4GBF0632
CP_UVA
AC voltage drop detection level
Limit: 0.0 - 100.0 % (1.0/100%)
Sets the detection level for the input voltage loss fault (MPSF).
[Related parameters] CP_UVA_SIL
CP_UVA_SIL
Input AC under voltage start interlock level
Limit: 0.0 - 100.0 % (1.0/100%)
Sets the input AC under voltage start interlock level to detect UVA_SIL.
When input AC voltage is less than this level, and it detects converter over current or DC overvoltage, it blocks gate signal
and does power source failure restart operation without FAULT output.
[Related parameters] CP_UVA
FLT_VAC_PRO
Input voltage detection filter for voltage dip protection
Limit: 0.0 – 1024.0 rad/s
Sets the filter time constant of the input voltage detection. When the filter is not used, set FLT_VAC_PRO to 0. The input
voltage feedback for the protection is VAC_PRO. There are other input voltage feedback, VAC_F with a 50 rad/s fixed
filter and VAC_F_FLT with a 3.125 rad/s filter.
[Related parameters] CS_VAC_MIN
CS_VAC_MIN
Input voltage minimum level
Limit: 0.0 - 100.0 % (1.0/100%)
Sets the input voltage minimum level to keep the drive rating voltage.
When the input voltage decreases below this level, the output voltage will is reduced.
[Related parameters] FLT_VAC_MIN
FLT_VAC_MIN
Input voltage dip flux limit filter
Limit: 0.0 - 1024.0 rad/s
This parameter sets the time constant, for the filter to reduce the output voltage, when the input voltage dips.
When FLT_VAC_MIN is not used, set the parameter to 0.
[Related parameters] CS_VAC_MIN
TIME_UVA_SIL
Waiting timer for power-up preparation
Limit: 0.11 - 300.0 s
Sets the power-up preparation timer. In case of a power failure restart, this timer can perform a start delay after power-up.
Rev.S
389
4GBF0632
CP_PSF
Control power supply failure detection level
Standard value: 160.0 V
96.0 V (North American model)
Limit: 0.0 - 1000.0 V
Sets the control power supply failure (PSF) detection level. As the level is set higher, the time to detect the control power supply
failure becomes shorter.
[Related parameters] MSK_BLR6, FLG_PSFRCV, TIME_CEMFOFF, CPSF
FLG_CPSF_MODE
CPSF occurrence condition change in power recovery
Standard value: 0
Limit: 0, 1
This parameter can change the occurrence condition of CPSF failure when the control power supply recovers after the control
power supply failure (CPSF) is detected. The CPU on the control board will stop the operation of the drive equipment.
FLG_CPSF_MODE = 0: CPSF occurs
FLG_CPSF_MODE = 1: CPSF does not occur
FLG_UPS_USE
UPS use flag
Standard value: 0
Limit: 0, 1
In a system where the power is supplied from a UPS (uninterruptible power supply), set this flag to 1.
When FLG_UPS_USE=1, if the control power is lost due to a UPS failure or other reason, UPS_ERR turns off.
[Related parameters] UPS_ERR
TIME_MVD
Main input voltage and control power voltage fault delay timer.
Limit: 0.00 - 300.0 s
Sets the time delay for the MPSF and CPSF faults after the main power or the control power supply feedback is lost.
[Related parameters] MSK_BLR6, CP_PSF, CP_UVA
CP_PSFRCV_TIME
Power supply failure recovery time
Limit: 0.00 - 300.0 s
Sets the power failure time to recover after a power failure.
When the time of the power failure is longer than CP_PSFRCV_TIME, the recovery is prohibited when power returns to normal.
TIME_CEMFOFF
Timer for restart after power failure
Standard value: See below formula
Limit: 0.00 - 300.0 s
Sets the delay time to restart after the UV power failure.
The standard value is calculated using the formulat below. If the value set to TIME_CEMFOFF is lower than the standard
value, the delay time TIME_CEMFOFF becomes equal to the standard value.
Standard value formula:

With power supply failure restart: 5.0 s
However, the minimum value is TIME_CTT + TIME_FON + 1.5sec.
When the time needs to conform to the time delay between the drives,
increase the 5.0sec time for the Inverter with power supply failure.
Without power supply failure restart: 0.0 s
[Related parameters] TIME_CTT, TIME_FON
Rev.S
390
4GBF0632
3.6.16. Utility voltage phase lock loop (PLL)

The utility voltage phase lock loop (PLL) detects the utility voltage phasing and frequency. The VD_FBK is calculated by
coordinate conversion of the AC voltage. VD_FBK is input to the proportional calculation plus the integrator unit, and the
phase of the input voltage is determined by integrating the output from the proportional calculator VD_FBK was input to.
The result of the proportional calculation and integration of VD_FBK is CNV_QO. CNV_QO is used in the coordinate
conversion that calculates VD_FBK and in the coordinate conversion that calculates the voltage reference. When
CNV_QO matches the phase of the input voltage, VD_FBK will become 0. In other words, this system detects the phase
of the utility voltage by performing proportional plus integral control so that VD_FBK is always 0.
65536CNT/2pi
<Filter> <Proportion, Integral> QO
(Input voltage phase)
DLT_Q Integ-
ral
FLT_PLL PLL_P
PLL_W1
PLL source
VD_FBK
voltage Coodinate
conversion
VQ_FBK
PLL power supply - main power supply

phase difference setting
PHASE_SFT
Fig 3.6.13 Current Control, Voltage Phase Detection and PWM Control
FLT_PLL
Power phase PLL filter
Limit: 0.0 - 1024.0 rad/s
Sets the time constant of the power supply phase PLL filter. When filter is not used, set to 0.
Rev.S
391
4GBF0632
PHASE_SFT
Power phase shift setting
Limit: -180.0 - 180.0 deg
Sets the differential value between the PLL power phase and the main power phase.
For example, when the PLL power phase leads the main power phase by 30 degrees, set PHASE_SFT to 30 degrees.
It is not necessarily to set this parameter because this drive uses standardly the main input voltage phase for the PLL phase.
PLL power Main power
It is 30deg lead.
Thus set PHASE_SFT=30deg.
PLL_P
Power phase PLL proportional gain
Limit: 0 - 32767
Sets the power phase voltage phase lock loop (PLL) proportional gain
[Related parameters] PLL_W1
PLL_W1
Power phase PLL response gain, Power supply phase PLL response gain 2
Limit: 0.00 - 1000.0 rad/s
(PLL_W1)
Sets the power phase PLL response gain.
[Related parameters] PLL_P
CS_SRC_FRQ
Power source frequency setting
Standard value: 50Hz
Limit: -80 - 80 Hz
Sets the power source frequency.
Rev.S
392
4GBF0632
3.6.17. Synchronous transfer and capture
Function Overview
Drives can switch the variable speed motor driving to the utility power from inverter driving synchronously, and also switch it to
inverter driving from the utility power without shock.
Operation Overview
The user can switch arbitrarily the variable speed motor driving between utility power driving and inverter driving each other by
operating the drive, the upper breaker (52V1), the output contactor of the drive (88V2) and the bypass contactor connected to
utility power.
Utility 52V1 88V2

INV
50Hz/
60Hz
PT & Sync RY
25
Aux CT
M
52M1 CT(R,T)
The drive switches the motor driving by using the drive run command (INVON) and the utility power bypass command (BYPON)
from high order systems. It drives at valiable speed according to speed reference when it receives INVON. On the other hand,
when it receives BYPON, operates to transfer (XFR) as below.
Increases speed to utility power driving speed. Detects the phase of utility power. Closes the bypass contactor.
Stops the Inverter driving Opens the inverter output contactor
Moreover, when driving by the utility power, BYPON turns off, and the drive receives only INVON, operates to capture (CPT) as
below.
Closes inverter output contactor. Detects the phase of utility power. Opens the bypass contactor. Starts the inverter
driving. Driving at variable speed
Drive run command

(B_ASD)
Bypass command
(B_XFR)
Transfer(XFR)
Motor Capture(CPT)
Frequency/Voltage
Drive
current
Utility
current
Function Page
System setting 394
System interface 397
Utility current interface 399
Synchronous transfer (XFR) 400
Capture to the drive (CPT) 405
Rev.S
393
4GBF0632
3.6.17.1. System settings for SyncXFR and SyncCPT

The System settings for SyncXFR and SyncCPT depend on the enabling of the system configuration flag parameters.
FLG_SYNC_EN
Synchronous transfer/capture enabling flag
Standard value: 0
Limit: 0-2
Set to 1 to enabling transfer, set to 2 for transfer & capture. B_ASD input is available as a start command only while
FLG_SYNC_EN = 1 or 2.
Flg Transfer Capture Note

0 N.A N.A No sync-transfer/capture
1 O N.A Only Transfer enable
2 O O Both Transfer/Capture enable
FLG_SYNC_INTSQ
Synchronous transfer/capture internal sequence enabling flag
Standard value: (1)
Limit: 0-2
Set to 1 to enable the internal sequence. Set it to 2 to enable the speed reference as a transfer command, according to the speed
reference level (LVL_XFR_SPREF). When the customer reference is greater than LVL_XFR_SPREF, the drive will transfer,
when it is less than LVL_XFR_SPREF, the drive will capture automatically.
Flg ASD input XFR input CPT input SP_REF Note

Only for
0 O O O speed Using outside relay/PLC sequence
reference
Only for
1 O O N.U speed Internal sequence
reference
Speed Internal sequence & SP_REF are used as XFR
2 O N.U (*1) N.U reference & If the SP_REF level is 0%, the ASD is used as a
for XFR/CPT soft-starter
(*1) The XFR input is available when connected
When using an internal sequence, the drive run command (INVON) is connected to the ASD signal and the utility power bypass
command (BYPON) is connected to the XFR signal directly. When using an external relay/ PLC sequence, INVON and BYPON
are connected to relay/ PLC as below.
SRDY
INVON
BYPON INVON BYPON
CPT BP_CTT XFR BP_CTT

BP_CTT
SYNC SYNC
ASD_EN ACSW_
INVON BYPON CPT ASD XFR
B_ASD B_XFR B_CPT B_ASD B_XFR

(a) Using internal relay sequence (a) Using external relay sequence
Rev.S
394
4GBF0632
FLG_XFR_UTL_SEL
Transfer/capture speed level
Standard value: 1
Limit: 0, 1
When using alternate utility power for utility connected to the drive, set to 1.
On the other hand, when calculating utility voltage, apparent power, active power and reactive power, specially using utility
reactive power for RCV control, set to 1. Therefore, it is necessarily to correspond target utility of RCV control and synchronous
transfer. (Utility reactive power detection for RCV control is not available now.)
[Rated parameters] FLG_RCV_TYPE, FLG_RCV_FBK
LVL_XFR_SPREF
Transfer/capture speed level
Limit: 0.0 - 100.0% (1.0/100%)
Sets the transfer and capture over speed level for the synchronous transfer and capture. When the customer reference is greater
than LVL_XFR_SPREF, the drive will transfer, when it is less than LVL_XFR_SPREF, the drive will capture automatically. Sets
FLG_SYNC_INTSQ = 2 when using this function. If the drive is used as a soft starter, operates to transfer to the utility power by
just inputting the drive run signal (B_ASD) at LVL_XFR_SPREF=0% and LMT_SP_MIN=5%.
CPT XFR (Utility power drive)

(Inverter drive
at variable speed) SP_REF
LVL_XFR_SPREF - 2% LVL_XFR_SPREF
TIME_XFR_SPREF
Transfer/capture switch delay timer by speed reference
Limit: 0.00 - 300.0 s
Sets the time delay to transfer and capture using the speed reference. Sets FLG_SYNC_INTSQ = 2 when using this
function.
FLG_XFR_ACSW
Synchronous transfer output contactor control flag
Standard value: 1
Limit: 0, 1
Setting FLG_XFR_ACSW to 1 will make the SRDY signals the same as the READY signals for starting the drive. When
FLG_XFR_ACSW is 0, the SRDY signals will be 1, even when the output contactor is open (ACSW_=0) while starting the drive
and the output contactor being closed after the start command (B_ASD).
FLG_SYNC_FOUT
Synchronous transfer fault output enable flag
Standard value: 1
Limit: 0, 1
Setting FLG_SYNC_FOUT to 1 enables the output FAULT DO (B_FAULT, SSEQ_OUT1.B5) and all the transfer and capture
sequences.
Rev.S
395
4GBF0632
FLG_SYNC_TRB
Synchronous transfer traceback enable flag
Standard value: 1
Limit: 0, 1
Setting FLG_SYNC_TRB to 1 enables saving the traceback data, even when successful transfer or capture occur without faulting.
Although the traceback data is recorded for the transfer and capture, the transfer or capture are not recorded in the trouble record
(fault history).
- Gate block timing at transfer, 25ms after B_XFR_OK rising edge
- Gate start timing at capture, 25ms after B_INV_START rising edge
In the following case, even when the sequence bit is masked out, there will be a recording of the traceback data.
- Transfer failure (B_XFR_INCMP_)
(a) The drive cannot synchronize to the utility. (It will keep running)
(b) The bypass contactor status did not answer “closed” 1sec after the drive sent the “bypass close” command.
- Capture failure (B_CPT_FIL_)
(a) The drive awaited a “closed” answer status from the output contactor (ACSW_) and timed out (TIME_CPT_FAIL)
(b) The bypass contactor status did not answer “opened” 1sec after the drive sent the “bypass open” command.
LMT_SYNC_V_R
DC Voltage rise Limit
Standard value: 105%
Limit: 0.0 ~ 110.0 % (1.0/100%)
When the input voltage rises, the drive will increase the DC voltage to the upper limit of the setting value. If the modulation rate of
the converter exceeds the value set in LMT_SYNC_ST_LVL and LMT_SYNC_ST_BAND, the DC voltage rises as the input
voltage rises.
[Related parameters]CS_V_R, LMT_SYNC_ST_LVL, LMT_SYNC_ST_BAND
LMT_SYNC_ST_LVL
DC voltage reference increase start modulation rate level
Standard value: 115%
Limit: 0.0 ~ 130.0 % (1.0/100%)
When the input voltage rises, when the converter modulation rate exceeds the hysteresis(top: LMT_SYNC_ST_LVL bottom:
LMT_SYNC_ST_LVL - LMT_SYNC_ST_BAND), the DC voltage rises to the maximum value set by LMT_SYNC_V_R.
[Related parameters]CS_V_R, LMT_SYNC_V_R, LMT_SYNC_ST_BAND
LMT_SYNC_ST_BAND
DC voltage reference increase start modulation rate band
Data type: 5%
Standard value: 0.0 ~ 10.0 % (1.0/100%)
When the input voltage rises, when the converter modulation rate exceeds the hysteresis(top: LMT_SYNC_ST_LVL bottom:
LMT_SYNC_ST_LVL - LMT_SYNC_ST_BAND), the DC voltage rises to the maximum value set by LMT_SYNC_V_R.
[Related parameters]CS_V_R, LMT_SYNC_V_R, LMT_SYNC_ST_LVL
Rev.S
396
4GBF0632
3.6.17.2. System interface

Drive System Note
B_ASD Drive run command
B_XFR Transfer/Capture command
B_BP_CTT Bypass contactor/CB answer (1:Close)
B_ACSW_ Drive output contactor/CB answer (1:Close)
B_BYPSW_TRIP Bypass contactor/CB trip command (Momentary)
B_BYPSW_CMD Bypass contactor/CB close command (Momentary)
B_ACSW_CMD Drive output contactor/CB close/trip command (1:Close)
B_SRDY Drive ready for start command
B_XFR_CHK Synch relay answer (1:Synch)
IUTL_R_F,
Bypass current feedback (Aux CT)
IUTL_T_F
(a) B_ASD (DI_DATA6.B5)

Drive run command from the system to the drive.
This input is available as a start command only while FLG_SYNC_EN = 1 or 2 (Transfer/Capture enable).
(b) B_XFR (DI_DATA6.B0)

Transfer/Capture command from the system to the drive.
Once the drive receives the B_XFR command, the drive increases its speed up to the utility frequency and transfers the motor
to the utility line.
When FLG_SYNC_INTSQ = 2, the drive will be in transfer mode when the speed reference is greater than LVL_XFR_SPREF.
When FLG_SYNC_INTSQ = 2, the B_XFR command is not required.
(c) B_BP_CTT (DINT_DATA6.B10)

The bypass contactor (BP_CTT) or circuit breaker (CB) answer from the system to the drive is always required.
When using the multi-motor selection, additional circuitry for the BP_CTT or CB answer is required.
(d) B_ACSW_ (DINT_DATA6.B8)

The drive output contactor (ACSW_) or Circuit Breaker (CB) answer from the system to the drive is always required. When
using the multi-motor selection, additional circuitry for the ACSW_ or CB answer is required.
(c) BP_CTT answer for multiple motor application (d) ACSW answer for multiple motor application
52M1a_ANS Ma_SEL 88V2a_ANS Ma_SEL

Selected M1x_ANS Selected V2x_ANS
needs to be close needs to be close
52M1b_ANS Mb_SEL 88V2b_ANS Mb_SEL
Same as above for more selection Same as above
Same as left
Ma_SEL Mb_SEL No motor selection -> Open
No motor selection -> Close
Then drive cannot start.
Then drive cannot run in ASD mode.
Rev.S
397
4GBF0632
(e) B_BYPSW_TRIP (SSEQ_OUT3.B3)

The bypass contactor trip(BYPSW_TRIP) or circuit breaker(CB) open command from the drive to the system is always
required.
(f) B_BYPSW_CMD (SSEQ_OUT3.B6)
The bypass contactor command(BYPSW_CMD) or circuit breaker (CB) close command from the drive to the system is only
required for capture.
Momentary signals are standard for these close and open commands. When the contactor CB doesn’t have a close or open
coil, additional circuitry is required.
（i）Latch type （ii）Constant excitation type
BYPSW_CMD BYPSW_TRIP BYPSW_CMD CC
Mx_SEL
BYPSW_TRIP Mx_SEL
Mx_SEL Mx_SEL Emagency Emagency

Stop Stop
CC TC CC
(g) B_ACSW_CMD (SSEQ_OUT3.B2)

The drive output contactor(ACSW_CMD) or circuit breaker(CB) close and open command from the drive to the system is
always required.
A held or toggled signal is standard for the B_ACSW_CMD command.
(h) B_SRDY (SSEQ_OUT3.B8)

The drive ready signal to the system will initiate the start command based on the B_SRDY status.
(i) B_XFR_CHK (DINT_DATA6.B2)

The transfer check(XFR_CHK) signal is the synchronized status relay (25) answer.
(j) IUTL_R_F, IUTL_T_F

The bypass current feedback IUTL_R_F and IUTL_T_F require auxiliary current transformers (CTs) to detect the bypass
contactor or CB closing time. The utility current feedback is used as a standard. When the IUTL_R_F and IUTL_T_F current
interface is unavailable, the contactor or CB timing needs be measured and a control timer needs to be used carefully.
Rev.S
398
4GBF0632
3.6.17.3. Utility current interface

The utility current interface is used to detect the bypass contactor or circuit breaker(CB) closing time. The utility current feedback
is used as a standard.
FLG_BP_CUR_USE
Utility current detection enable flag
Standard value: 1
Limit: 0, 1
Set to 1 if the utility current detection is using utility synchronization control.
CS_UTLPT_RATIO
Utility PT voltage ratio setting
Standard value: 0
Limit: 0 - 1000
Sets the PT voltage ratio, which is used for the utility voltage detection. If CS_UTLPT_RATIO is 0, the same value as
CS_PT_RATIO is used for CS_UTLPT_RATIO.
CS_UTLCT_CURR
CT rated current for active front end
Limit: 0 - 30000 A
Note: Initialize
Sets the CT primary current when the CT feedback feeds the drive detection an input of 10 V. If CS_UTLCT_CURR is 0.0A, the
same value as CS_HCT_CURR is used for CS_UTLCT_CURR.
CP_OC_UTL
Utility current over current level
Limit: 0.0 - 400.0 % (1.0/100%)
Note: Initialize
Set the level for the detection of the utility current percentage from the drive rating current CS_EQUIP_CURR.
Rev.S
399
4GBF0632
3.6.17.4. Synchronous transfer (XFR)

Operation Overview
・While in the adjustable speed drive mode (ASD), once the XFR command is initiated, the drive will accelerate towards the
synchronous speed.
・At the same time, the XFR regulator will attempt to regulate the drive, to match the motor phase angle and voltage amplitude
to the utility.
・When the drive detects it has synchronized for the number of cycles determined by XFR_CYCLE, the drive issues the bypass
contactor close command.
・When drive detects bypass contactor “close” answer, the drive stops gating.
・There are two cases that detect when the bypass contactor has actually closed. The thrird one (3) listed below is a timeout
case.
(1) Utility current is bigger than set level (CP_OC_UTL)
(2) Bypass contactor auxiliary contact answer
(3) If TIME_XFR_END times out without the bypass contactor “close” answer, a transfer fail will occur.
・The drive can perform a retry, even when the drive cannot synchronize by enabling FLG_XFR_RETRY.
Drive run command

(B_ASD)
Bypass run command

(B_XFR)
XFR_CYCLE
Motor
Frequency/Voltage
Drive current
Angle error LVL_XFR_DLTQ

(XFR_DLTQ_ERR)
Bypass contactor close cmmand

TIME_XFR_END
(B_BPSW_CMD)
(3)
Utility current
(1)
(2)
Bypass contactor answer
(B_BP_CTT)
Transfer competed, drive off

(B_XFR_OK)
Rev.S
400
4GBF0632
LVL_XFR_DLTQ
Transfer phase error level
Limit: 0.0 - 180.0 deg
Sets the phase error level of the PLL for synchronous transfer. The phase difference is evaluated in terms of its absolute
value. If LVL_XFR_DLTQ is set to 1.0 degree, an error of 1.0 degree is allowed in the synchronization.
LVL_XFR_DLTV
Transfer voltage error level
Limit: 0.0 - 120.0% (1.0/100%)
Sets the voltage error level from utility voltage during a synchronous transfer. The voltage difference is evaluated in terms
of its absolute value.
XFR_CYCLE
Transfer cycle count
Standard value: 30
Limit: 0 - 1500
Sets the phase synchronization cycle count for the synchronous transfer. The line voltage is determined as synchronized if the
phase difference is within the determined value LVL_XFR_DLTQ during the number of cycles set to XFR_CYCLE.
TIME_XFR_END
Bypass contactor answer timeout time
Limit: 0.00 - 3600.0 s
Sets the timeout delay for the bypass contactor “close” answer during the synchronous transfer. Set TIME_XFR_END to a value
greater than the bypass contactor operation time delay. If TIME_XFR_END times out before the bypass “close” answer is
received, the drive will fail to transfer.
CR_RATE_XFR
Acceleration rate for transfer
Limit: 0.00 - 3600.0 s
Sets the acceleration time for the synchronous transfer.
First, the inverter accelerates to T25_XFR_SP using CR_RATE_ACC. The inverter then accelerates to the utility speed
at a squared inverse cubed root time rate set with CR_RATE_XFR.
CR_RATE_XFR
Utility
T25_XFR_SP
CR_RATE_ACC
Delta Theta
Rev.S
401
4GBF0632
G_XFR_I
Voltage adjustment gain
Limit: 0 - 1024.0 rad/s
Set the integral gain to adjust the inverter output voltage to the utility voltage during synchronous transfer.
XFR_V_GAIN
Voltage gain for utility voltage feedback
Limit: 0 - 130% (1.0/100%)
Sets the output voltage gain from the utility voltage for the synchronous transfer.
FLT_XFR
Filter for transfer voltage adjustment
Limit: 0.0 - 1024.0 rad/s
Sets the filter for the phase error during the synchronous transfer.
TIME_XFR_F
Transfer operation timeout time
Limit: 0.00 - 1000.0 s
Sets the delay time to allow the transfer operation to perform the speed synchronization before timing out.
FLG_XFR_RETRY
Synchronous transfer retry enable flag
Standard value: 0
Limit: 0, 1
Set FLG_XFR_RETRY to 1 to permit only one retry operation when the transfer fails during synchronous transfer.
If the retry fails, a trip or alarm will be output if an attempt to continue operation is made depending on the mask setting of the
sequence.
Rev.S
402
4GBF0632
TIME_XFR_SPHLD
Transfer speed hold time
Limit: 0.00 - 300.00 s
Sets the time to hold the speed after an attempt to synchronize is performed and before a retry to synchronize is
performed.
Bypass command
(B_XFR)
TIME_XFR_F TIME_XFR_SPHLD
Motor
Frequency/Voltage
Drive
current
Angle error
(XFR_DLTQ_ERR)
XFR_PLL_A
Transfer PLL control differential gain
Standard value: 0
Limit: 0 - 100000
Sets the differential gain for the Transfer PLL control.
XFR_PLL_AT
Transfer PLL control differential time constant
Limit: 0.00 - 1024.0 rad/s
Sets the differential time constant for the Transfer PLL control.
XFR_PLL_P
Transfer PLL control proportional gain
Standard value: 2
Limit: 0 - 100000
Sets the proportional gain for the Transfer PLL control.
XFR_PLL_W1
Transfer PLL control response time constant
Limit: 0.00 - 1024.0 rad/s
Sets the response time constant for the Transfer PLL control.
Rev.S
403
4GBF0632
XFR_QSHIFT
Transfer phase shift angle
Limit: -100.0 - 100.0 deg
Sets the phase offset for the synchronous transfer. If XFR_QSHIFT is set to a positive value, the inverter phase will lag the utility
phase, if XFR_SHIFT is set to a negative value, the inverter phase will lead the utility phase.
XFR_TOP_SLIP
Transfer top speed rating slip
Limit: -5.0 - 5.0% (1.0/100%)
Sets the top speed slip frequency to pre-calculate the optimal ramp rate to the utility speed. XFR_TOP_SLIP is for a faster
response when in vector control. For V/f control, XFR_TOP_SLIP is not required.
Rev.S
404
4GBF0632
3.6.17.5. Capture to the drive (CPT)

Operation Overview
・While the utility line provides voltage and power to the motor, once the XFR command is removed, the drive output contactor
will be closed, and the utility voltage is connected to drive output and enables PLL block.
・The PLL block will detect the utility frequency, phase angle, and voltage amplitude.
・When drive locks onto(synchronizes with) the utility phasing for the number of cycles specified in CPT_CYCLE, the bypass
contactor “open” command is issued from the drive.
・When drive detects the bypass contactor open, it starts gating.
・There are four cases to detect the bypass contactor is actually open. The fifth one (5) listed below is a timeout case.
(1) The utility current is less than the set level LVL_CPT_IDIP
(2) The bypass contactor auxiliary contact “open” answer was received
(3) The phase error is greater than unlock level LVL_IPLL_DLTQ + LVL_IPLL_UNLCK
(4) The motor voltage is less than set level LVL_CPT_VDIP
(5) If none of the four cases above occurs after synchronizing, TIME_CPT_END is a time that will elapse and force the start
command for the operation to continue.
Drive run command

(B_ASD)
Bypass run command

(B_XFR)
CPT_CYCLE
Motor
LVL_CPT_VDIP
Voltage
(4)
Drive
current
LVL_IPLL_DLTQ LVL_IPLL_DLTQ + LVL_IPLL_UNL
Angle error
(XFR_DLTQ_ERR)
(3)
Bypass contactor
open cmmand TIME_CPT_END
(5)
(B_BPSW_TRIP)
Utility
current (1)
Bypass contactor answer (2)

(B_BP_CTT)
Capture completed, drive start

(B_INV_START) 1sec
Rev.S
405
4GBF0632
LVL_IPLL_DLTQ
Drive output PLL phase error level
Limit: 0.0 - 180.0 deg
Sets the phase locked level of the drive output PLL for the synchronous capture. The phase difference is evaluated in
terms of its absolute value. If 1.0 degree is set, an error of less that 1.0 degree is regarded as phase locked.
LVL_IPLL_UNLCK
Capture phase error unlock level
Limit: 0.0 - 180.0 deg
Sets the phase unlock level of the drive output PLL for the synchronous capture.
LVL_CPT_IDIP
Utility current dip level for capture
Limit: 0.0 - 100.0% (1.0/100%)
Sets the utility current level to detect the bypass contactor “open” answer. When the utility current is lower than
LVL_CPT_IDIP, the drive detects the bypass contactor open, and starts gating. Set LVL_CPT_IDIP to 0% if this function
disabled.
LVL_CPT_VDIP
Motor voltage dip level for capture
Limit: 0.0 - 100.0% (1.0/100%)
Sets the motor voltage level to detect bypass contactor “open” answer. When the motor voltage is lower than
LVL_CPT_VDIP, the drive detects the bypass contactor “open” answer, and starts gating.
TIME_CPT_VDIP_ST
Limit: 0.00 - 300.0 s
Sets the gating time delay for the capture voltage dip detection.
CPT_CYCLE
Capture cycle count
Standard value: 30
Limit: 0 - 1500
Sets the phase synchronized cycle count for the synchronous capture. The line voltage is determined as synchronized if the
phase difference is within the determined value LVL_IPLL_DLTQ during the number of cycles set to CPT_CYCLE.
TIME_CPT_END
Limit: 0.00 - 300.0 s
Set the delay time to wait for the bypass contactor “open” answer during the synchronous capture. Set a value greater than the
contact operation delay time of the bypass contactor.
Rev.S
406
4GBF0632
TIME_CPT_FHLD_D
Frequency hold delay time for capture
Limit: 0.00 - 300.0 s
Sets the time interval during which the frequency hold delay occurs. During TIME_CPT_FHLF_D, the drive detects the motor
phase angle and outputs the utility CTT “open” command.
After the drive holds the frequency, it may have an angle error due to the held frequency ripple. TIME_CPT_FHLD_D may help
avoid the angle error in the held frequency during the utility CTT open delay. This parameter should be set to a value less than the
actual utility CTT physical opening time after being sent the “open” command from the drive.
CPT_IQ_F
Torque current pre-set for capture
Limit: -400.0 - 400.0% (1.0/100%)
Sets the estimated torque current while the motor is on the utility. This parameter is required when the utility current
detection is not used. Otherwise, set CPT_IQ_F to 0%.
CPT_QSHIFT
Capture phase shift angle
Limit: -180.0 - 180.0 deg
Sets the phase offset for the synchronous capture. If CPT_QSHIFT is set to a positive value, the inverter phase is lagging the
utility phase, if CPT_QSHIFT is set to negative, the inverter phase is leading the utility phase.
CPT_V_GAIN
Voltage gain for utility voltage feedback for capture
Limit: 0 - 125% (1.0/100%)
Sets the output voltage gain from utility voltage for the synchronous capture.
FLT_CPT_V_G
Filter for transfer voltage adjustment
Limit: 0.0 - 1024.0 rad/s
Set the filter for voltage recovery simulation for the synchronous capture.
TIME_CPT_SPHLD
Speed hold time after capture
Limit: 0.00 - 300.0 s
Sets the time interval, during which the speed is maintained, in the inverter, after capturing the motor during the synchronous
capture.
After the inverter captures the motor, it maintains the utility speed for TIME_CPT_SPHLD. After TIME_CPT_SPHLD times out, the
drive follows the external speed reference.
TIME_CPT_SPHLD should be set to a value longer than utility contactor “open” answer (BP_CTT) time delay.
Motor speed
External speed reference

TIME_CPT_SPHLD
Utility ASD mode
Rev.S
407
4GBF0632
3.6.18. Other functions

Parameters related to other functions.
3.6.18.1. Voltage saturation compensation (VSC)

If the ratio between the AC voltage and the DC voltage is excessive, the converter's current control output may be saturated,
making the control unstable. The current control output is kept from saturating using the voltage saturation suppression control
(VSC). The basic operation is to generate the D-axis current reference in accordance with the primary voltage reference value.
The figure below shows the block diagram of voltage saturation suppression control.
1.0/100%
Flux reference
Flux reference FL_R
<Integration> x
operation
<Current limit> +
100%
<Filter> -
Primay voltage <Proportion> +
+ 1.0/100%
reference D-axis voltage
E1_R - +
reference
Limit FLT_VSC ID_R
Upper:
<VSC control>
1.0/100% LMT_VSC_UL
VSC_P: Proportional gain
Lower:
VSC_I: Integration gain
Control start LMT_VSC_LL
level
LMT_VSC
Fig 3.6.14 Voltage Saturation Compensation
FLT_VSC
Voltage saturation rate suppression filter
Limit: 0.0 - 1024.0 rad/s
G_VSC_I
Voltage saturation suppression integral gain
Standard value: 450
Limit: 0 - 100000
Sets the proportional and integral gain for voltage saturation suppression control (VSC). The VSC will weaken the flux
reference for the inverter.
[Related parameters] LMT_VSC, LMT_VSC_LL, LMT_VSC_UL
G_VSC_P
Voltage saturation suppression proportional gain
Limit: 0 - 100000
Sets the proportional gain for the voltage saturation suppression control. The voltage saturation suppression control will
weaken the magnetic flux reference for the inverter.
[Related parameters] LMT_VSC, LMT_VSC_LL, LMT_VSC_UL
Rev.S
408
4GBF0632
LMT_VSC
Voltage saturation suppression control start level
Limit: 0.0 - 200.0 % (1.0/100% (percent modulation 1))
Sets the start level for the voltage saturation suppression control (VSC). The VSC will weaken the flux reference.
Setting LMT_VSC to 100% assumes 100% of the PWM carrier amplitude (percent modulation 1).
[Related parameters] G_VSC_I, G_VSC_P, LMT_VSC_LL, LMT_VSC_UL
LMT_VSC_LL
Voltage saturation suppression control lower limit
Standard value 0
Limit: -32767 - 0
Sets the lower and negative limit for output of the voltage saturation suppression control (VSC).
LMT_VSC_LL is a terminal voltage constant control.
LMT_VSC_LL is not used.
LMT_VSC_UL
Voltage saturation suppression control upper limit
Standard value 8192
Limit: 0 - 32767
Sets the upper and positive limit for output of the voltage saturation suppression control (VSC). The output of the VSC will reduce
the flux reference gain.
LMT_VSC_UL is a terminal voltage constant control. When limiting LMT_VSC_UL to a positive value, LMT_VSC_UL is a voltage
saturation suppression control. Only limitation to a positive value LMT_VSC_UL is used.
[Related parameters] G_VSC_I, G_VSC_P, LMT_VSC
Rev.S
409
4GBF0632
3.6.18.2. Variable current limiter control (CLC)

Variable current limiter control (CLC) is used when performing tension control or torque control of a load. It is possible to perform
the CLC current control with an external reference.
When performing variable current limiter control (CLC), enter the ST signal (See Section 3.2.1) from outside and enter the CLC
reference using an analog input or serial communication’s input. When using CLC, increase the external speed reference to the
speed limit to saturate the speed control output.
FLG_CLC_INTLMT
Integration limit flag in CLC control
Standard value: 0
Limit: 0, 1
Set to 1 when limiting to the same level as the CLC reference. FLG_CLC_INTLMT is applied for the integration of the speed
controller while the CLC control is performed.
[Related parameters] LMT_CL_REF
FLG_CLREF_SW
Current limit command switch
Standard value: 0
Limit: 0, 1
Always set to 1 when the current limit control (CLC) is used in speed control with the RMFC control, regardless of the ST
command. When FLG_CLREF_SW is zero, the current limit control is performed by the ST command.
[Related parameters] FLG_TIQ_SW, LMT_CL_REF
FLG_TIQ_SW
Current reference select
Standard value: 0
Limit: 0, 1
In the speed regulator with the RMFC control, set FLG_TIQ_SW to 1 to input a torque reference as the current limit
reference.
[Related parameters] FLG_CLREF_SW, LMT_CL_REF
LMT_CL_REF
Upper current limit
Limit: 0.0 - 400.0 % (1.0/100%) (0.0 - 125.0% In firmware 10A or older)
Sets the upper limit of the current reference input of current limit control (CLC).
When the reference input of the current limit control is set as a torque reference, the current limit control is the upper limit of torque
reference.
Set LMT_CL_REF to 0 when the current limit control is not used.
[Related parameters] FLG_CLREF_SW, FLG_TIQ_SW
Rev.S
410
4GBF0632
3.6.18.3. ASPR torque forcing

Speed forcing sets the level of the ASPR torque forcing.
ASPR_SP_FORCE
ASPR torque forcing
Limit: 0.0 - 150.0 % (1.0/100%)
Note: Initialize
Sets the ASPR torque forcing value.
ASPR_SP_FORCE is effective in improving the startup characteristic of the sensor-less control.
[Related parameters] FLG_SPFORC_P
FLG_SPFORC_P
ASPR torque forcing polarity selection
Standard value: 0
Limit: 0, 1
Set to 1 when the ASPR torque forcing at startup should be positive regardless of the speed reference direction.
Set FLG_SPFORC_P to 1 when the load is always negative, such as in the winding machine of a crane.
[Related parameters] ASPR_SP_FORCE
Rev.S
411
4GBF0632
3.6.18.4. Torque compensation

Torque compensation sets parameters related to torque compensation.
FLG_SP_R_MODL
Speed regulation 2 model speed reference selection
Standard value: 0
Limit: 0, 1
When using the speed reference input, of the speed regulation 2 as the model speed reference (SP_R_MODL), set
FLG_SP_R_MODL to 1.
This setting is effective when Speed regulation 2 is selected (FLG_ASR = 1).
[Related parameters] FLT_SP_MODL
FLG_TCMP
Torque feed forward compensation selection
Standard value: 0
Limit: 0, 1
Set to 1 for torque feed forward compensation.
In torque feed forward compensation, the sum (TCMP_FFD) of speed dependent loss, the fixed loss, the acceleration and
deceleration torque and the external compensation (TCMD_EXT) are added to the torque reference (T_R).
[Related parameters] OP_LOSFUNC1_SP - OP_LOSFUNC4_SP, OP_LOSFUNC0_TRQ - OP_LOSFUNC4_TRQ,
OP_TCMP_J_G, OP_TCMP_LOS, OP_TCMP_LOS_DB
FLG_MODL
Modeled speed reference signal select flag
Standard value: 0
Limit: 0, 1
Sets to 1 to use the speed feedback (SP_F) as the signal to make modeled speed reference.
FLT_SP_MODL
Modeled speed reference filter
Limit: 0.0 - 1024.0 rad/s
Sets the filter of the modeled speed reference (SP_R_MODL)
SP_R_MODL is the input to the torque feed forward compensation.
When using ASR, FLG_ASR = 1 and when FLG_SP_R_MODL = 1, SP_R_MODL is input to the ASR as a speed
reference.
Set FLT_SP_MODL to 0 when the filter is not used.
[Related parameters] FLT_SP_MODL is active when FLG_ASR = 1 and FLG_SP_R_MODL = 1, or FLG_TCMD = 1.
Rev.S
412
4GBF0632
OP_LOSFUNC0_TRQ - OP_LOSFUNC4_TRQ
Torque feed forward compensation loss function toque
Limit: 0.0 - 50.0 % (1.0/100%)
OP_LOSFUNC1_SP - OP_LOSFUNC4_SP
Torque feed forward compensation loss function speed
Standard value: 25.0 - 100.0 %, incremented by 25.0 %
Limit: 0.0 - 125.0 % (1.0/100%)
Sets the loss function dependent on speed for torque feed forward compensation.
The torque compensations are adjusted for the speed regulator output (TRQ_REF) to be zero when running the motor unloaded
at each of the speed points. OP_LOSFUNC1_SP - OP_LOSFUNC4_SP are active when FLG_TCMP = 1.
[Related parameters] FLT_SP_MODL
Torque compensation
4
3
2
1
0
Modeled speed reference

SP_R_MODL
OP_TCMP_J_G
Torque feed forward compensation inertia compensation gain
Limit: 0.0 - 1000.0% (1.0/100%)
Sets the ratio of the acceleration and deceleration torque compensation, which are added to the torque feed forward
compensation.
The acceleration and deceleration torque is calculated from the modeled speed reference differential (SP_R_MODL_D) x
inertia (ASR_J0_T).
OP_TCMP_J_G adjusts the speed regulator output (TRQ_REF) to a minimum by running the motor with acceleration and
deceleration.
OP_TCMP_J_G is active when FLG_TCMP = 1.
[Related parameters] ASR_J0, FLT_SP_MODL
Rev.S
413
4GBF0632
OP_TCMP_LOS
Torque feed forward compensation fixed loss
Limit: 0.0 - 50.0 % (1.0/100%)
OP_TCMP_LOS_DB
Torque feed forward compensation fixed loss speed dead band
Limit: 0.0 - 125.0 % (1.0/100%)
Sets the fixed loss which is added to the torque feed forward compensation.
OP_TCMP_LOS_DB adjusts the speed regulator output (TRQ_REF) to a minimum by running the motor with very low speed.
[Related parameters] Valid when FLG_TCMP = 1. FLT_SP_MODL
Torque compensation
OP_TCMP_LOS
Modeled speed
- OP_TCMP_LOS_DB reference
SP_R_MODL
OP_TCMP_LOS_DB
- OP_TCMP_LOS
TCMP_ENB_BIT
Torque compensation change bit selection
Limit:
Selects the sequence bits (DI_EX3 or SERSEQDATA2) which enable or disable the torque. According to the value of
TCMP_ENB_BIT, the torque compensation becomes as shown below.
Value Meaning
0000 H Torque compensation is always disabled.
FFFF H Torque compensation is always enabled.
Others When result of an AND operation with the sequence bit is 0, the torque compensation is
disabled, and when the result of an AND operation is 1, the torque compensation is enabled.
[Related parameters] FLG_TCMP
FLG_TCMP_JCMP
Torque Compensation Calculation Switch Flag
Standard value: 1
Limit: 0, 1
If this parameter is 1, the torque compensation amount of TCMP_JCMP = 100% is the mode at 100% torque.
Rev.S
414
4GBF0632
3.6.18.5. Dynamo
Dynamo sets the parameters related to the dynamometer. This function is not used for this equipment.
DYNO_FLX0 - DYNO_FLX4
Dynamometer flux limit function flux
Limit: 0.0 - 100.0 % (1.0/100%)
Note: Not used
DYNO_SP1 - DYNO_SP4
Dynamometer flux limit function speed
Limit: 0.0 - 125.0 % (1.0/100%)
Note: Not used
Set flux limit function in the dynamometer feature.
Flux limit
0 1 4
2
3
Modeled speed reference

SP_R_MODL
FLG_DYNO
Dynamometer feature control flag
Standard value: 0
Limit: 0, 1
Note: Not used
Set to 1 to use dynamometer feature torque control.
G_DYNO_P
Dynamometer feature torque regulator proportional gain
Standard value: 0
Limit: 0 - 100000
Note: Not used
Sets the proportional gain of the dynamometer feature torque regulator.
Rev.S
415
4GBF0632
G_DYNO_W1
Dynamometer feature torque regulator response gain
Limit: 0.00 - 3000.0 rad/s
Note: Not used
Sets the response gain of the dynamometer feature torque regulator.
LMT_DYNO_REG
Dynamometer torque regulator output limit
Limit: 0.0 - 300.0 % (1.0/100%)
Note: Not used
Sets the output limit of the dynamometer torque regulator.
Rev.S
416
4GBF0632
3.6.18.6. Voltage minor control

Voltage minor control sets the parameters related to the voltage minor control. This function is not used for this equipment.
AVCMP_I
Voltage compensation integral gain
Standard value: 0
Limit: 0 - 1000.0 rad/s
Note: Not used
Sets the integral gain for the voltage compensation.
AVCMP_P
Voltage compensation proportional gain
Standard value: 0
Limit: 0 - 32767
Note: Not used
Sets the proportional gain for the voltage compensation.
LMT_AVCMP
Voltage compensation output limit
Limit: 0.0 - 50.0% (1.0/100%)
Note: Not used
Sets the limit for the output of voltage compensation. Set LMT_AVCMP to 0 when the voltage compensation is not used.
[Related parameters] AVCMP_P, AVCMP_I
Rev.S
417
4GBF0632
3.6.18.7. Motor current balancing control (IBC)

Motor current balancing control (IBC) sets the parameters related to the motor current balancing control.
G_IBC_I
Output current balance control integral gain
Standard value: 0
Limit: 0 - 10000.0
Sets the integral gain to adjust the inverter output current to be balanced for each of the three phases. G_IBC_I is not
normally used and is normally set to zero. When G_IBC_I is required, it is recommended that G_IBC_I be set to 500.
G_IBC_P
Output current balance control proportional gain
Standard value: 0
Limit: 0 - 10000.0
Sets the proportional gain to adjust the inverter output current to be balanced for each of the three phases. G_IBC_P is
not normally used and is normally set to zero. When G_IBC_I is required, it is recommended that G_IBC_P be set to 600.
Rev.S
418
4GBF0632
3.6.18.8. Simulation mode

Simulation mode does motor speed simulation by using a simple motor model. Speed control and sequence operation checks can
be done without powering the motor.
Simulation principle is expressed by the following formula. The output torque is calculated from the current reference and the flux
reference. The load torque and inertia can be set by parameters. The load torques, such as the constant torque, the torque that
changes in relation to speed, and the torque that is proportional to the square of speed, can be set.
d
TM TL J
dt
TM:Output torque (IQ_R × FL_R), TL:Load torque, J:Inertia, :Motor speed
This is used for the simulation display of control data during the startup of the transmission line, etc. This mode can be used only
the control board (CTR). Therefore, it masks automatically protection sequences regarding to hardware protocol and sensors.
The following protections are automatically masked.
Protecion symbols Protection contents Protection sequences

FPGA_CRC_ERR FPGA CRC error BLR1
CURU, CURW Inverter current failure BLR1
CURU_B, CURW_B Inverter current failure B bank BLR2
CURU_CNV, CURU_CNV, CURU_CNV Converter current failure BLR2
OH_TR Transformer overheat BLR2
SP_ERR2 Speed error 2 BLR3
PLD_ERR PLD error BLR5
DS_T Door switch timer BLR5
C_OCA, OVP, OVN, OH, GPSF, LINK_F, All of protections for cell inverters BLR7 ~ BLR15
FUSE, CELL_F
CELL_PR Cell inverters preparation UVA1
CELL_UV Cell inverter UV (H/W gate block) UV1
OH_TR_A Transformer overheat alarm LFD2, STPRQ2
SER_IUA, SER_IVA, SER_IWA, Serial communication errors SIL2
SER_IUB, SER_IVB, SER_IWA,
SER_C1A, SER_C2A, SER_C3A,
SER_C1B, SER_C2B, SER_C3B
Set the parameters related to simulation mode.
SIM_MODE
Simulation mode selection
Standard value: 0
Limit: 0, 1
Note: Initialize, Setting by digital input is available in firmware 10A or later
Set to 1 to select the simulation mode with power on.
Even if SIM_MODE = 0 is set, the drive will be in simulation mode when the variable, SIM_MODE_T = 1 or setting
BIEXH_SIM_MODE 1 by digital input. In this case, mode is changeable when being stopped (UV signal off) AC input
circuit breaker is open.
While the simulation mode (SIM_MODE_T = 1), the gate block operates automatically. The drive outputs BLR signal to
prevent turning on AC input circuit breaker.
[Related parameters] SIM_FLT_IDIQ, SIM_J0, SIM_LD_TRQ, SIM_LOSS, SIM_LOSS_W, SIM_LOSS_W2
SIM_FLT_IDIQ
Simulation current filter
Limit: 0.0 - 1024.0 rad/s
This is used to set the current response in the simulation mode.
The feedback signal of the excitation current (ID) and the torque current (IQ) becomes the filter output of each reference
value.
Set SIM_FLT_IDIQ to 0 when the simple SFC is used.
[Related parameters] SIM_MODE
Rev.S
419
4GBF0632
SIM_J0
Simulation inertia gain
Standard value: 250
Limit: 0 - 1000000
This is used to calculate the simulation speed (SIM_SP).
(Standard value)
Rated torque 4000 100% 4000
SIM _ J 0 Tacc 1564 250
Rated speed 25000 100% 25000
Tacc: Acceleration time [ms] from zero to rated speed (base speed) with rated torque
Rated torque = 4000 count
100% speed = 25000 count
SIM_LD_TRQ
Simulation load torque
Limit: 0.0 - 1000.0 % (1.0/100%)
Note: Initialize
This is used to calculate the simulation speed (SIM_SP).
This is effective with the set polarity while operating (RNFLG on).
This is used when the load is elevated. Ex.) Crane.
SIM_LOSS, SIM_LOSS_W, SIM_LOSS_W2

Simulation loss fixed value (SIM_LOSS)
Simulation loss speed rate (SIM_LOSS_W)
Simulation loss speed square rate (SIM_LOSS_W2)
Standard value Limit

Parameter name
(1.0/100%) (1.0/100%)
SIM_LOSS 15.0 % 0.0 - 1000.0 %
SIM_LOSS_W 0.0 % 0.0 - 1000.0 %
SIM_LOSS_W2 80.0 % 0.0 - 1000.0 %
Used for calculation of simulation speed (SIM_SP).

Parameter name Use, remark
SIM_LOSS Sets the fixed loss value. The polarity is determined by the
direction of speed.
SIM_LOSS_W Sets the loss that is proportional to the speed.
SIM_LOSS = SP_F × SIM_LOSS_W
SIM_LOSS : Loss
SIM_LOSS_W2 Sets the loss that is proportional to the square of the speed.
(Example) Fan, pump
SIM_LOSS2 = SP_F × | SP_F | × SIM_LOSS_W2
SIM_LOSS2 : Loss
Rev.S
420
4GBF0632
SIM_SPD_SEL
Simulation mode speed feedback change bit selection
Limit:
Selects the sequence bits (DI_EX3 or SERSEQDATA2) which change the simulation mode speed feedback. According to value
of SIM_SPD_SEL, the speed feedback becomes as shown below.
Value Meaning
0000 H Speed feedback always uses the result of the simulation.
FFFF H Speed feedback always uses the value at the address specified by the variable SIM_SP_AS.
Value other If the result of an AND process with sequence bits is 0, use the result of the simulation. If the
than the result of an AND process with sequence bits is 1, use the value at the address specified by
above the variable SIM_SP_AS.
SIM_MSK_DINTG
Simulation mode GIF board internal digital input data masks
Standard value: D100 H
Limit:
Set masks of GIF board internal digital input data for simulation mode. For the simulation mode, in the case of settng 0000 H, the
following answer bits are forcibly set to complete READY status because of dealing with the possibility of using only control board.
When commissioning and testing answer back of digital inputs, set to 1 not to get back answers automatically.

F N.U. Not used
E ACSW_ Output side AC contactor
D BP_CTT Bypass contactor
C DI_C_FN_ Cooling fan
B DI_C_FN_B_ Redundant cooling fan
A N.U. Not used
9 N.U. Not used
8 PRE_CTT_ANS Pre-charge contactor answer
7 N.U. Not used
6 N.U. Not used
5 N.U. Not used
4 N.U. Not used
3 N.U. Not used
2 N.U. Not used
1 N.U. Not used
0 BLR_MSK_SIM Simulation BLR mask Available in firmware 11A or later
Rev.S
421
4GBF0632
3.6.18.9. Others
Other parameters
FLG_FE
Field economize selection
Standard value: 0
Limit: 0-2
This bit is used when the excitation current exceeds 50% of the inverter rated current, thus reducing the reserve excitation
current.
0 = 100% excited by MI_ID_BASE (no FE)
1 = 75% excited by MI_ID_BASE
2 = 50% excited by MI_ID_BASE
[Related parameters] MI_ID_BASE
GAIN_QCMP_I
Current detection delay compensation gain
Standard value: 167
Limit: -31999 - 31999
Sets the current detection delay compensation gain.
GAIN_QCMP_V
Operation time delay compensation gain
Standard value: 417
Limit: -31999 - 31999
Sets the operation time delay compensation gain.
GAIN_QCMP_V2
Sensorless θ compensation correction gain
Standard value: 0
Limit: -40000 – 40000
Note: Not used
Sets the θ compensation correction gain.
G_QCMP_IQ_I
θ correction gain
Standard value: 0
Limit: -40000 - 40000
Sets the θ correction gain.
Valid during the sensor-less control
OP_DNDT_CMP_G
DNDT compensation gain
Standard value: 0
Limit: 0 - 100000
Sets the control gain for the DNDT compensation. OP_DNDT_CMP_G is not used.
OP_DNDT_POINT
DNDT compensation start point
Standard value: 0
Limit: 0 - 100000
Sets the starting point for the DNDT compensation. OP_DNDT_POINT is not used.
Rev.S
422
4GBF0632
OP_OS_DNDT
Over speed compensation DNDT level
Standard value: 0
Limit: 0.0 - 125.0 %/ms (1.0/100%/ms)
OP_OS_SP
Over speed compensation start speed deviation
Standard value: 0
Limit: 0.0 - 125.0 % (1.0/100%)
Sets the control gain for the over speed compensation.
CPS_TIME_TAU
Power failure time detection CR filter time constant
Limit: 0.00 - 300.0 s
Sets the CR filter time constant to detect the power failure time.
FLG_CELL_RUNBACK
Cell run-back mode setting flag
Standard value: 0
Limit: 0, 1
When testing at cell run-back mode, set FLG_CELL_RUNBACK to 1. Then, CELL_NUM is set to 1.
Do not change this setting.
FLG_INV_CAR
Inverter modulation method select flag
Standard value: 2
Limit: 0, 2
Note: Available firmware 08B or later
Select inverter modulation method. Setting 1 is not available.
FLG_INV_CAR Method
0 Constant pulse
2 Non carrier cross
Rev.S
423
4GBF0632
3.7 Converter Basic Function

The control block of the active front end converter is shown below.
The active front end converter performs both voltage and current control. The active front end converter uses the current
detection to control both the motoring current flow and current protection to the equipment. The voltage phase detection and DC
bus voltage detection are used to control the regenerative current flow from the equipment and provide voltage control to the
converter current reference. The active front end converter also uses the voltage phase detection to provide voltage saturation
compensation. The active front end converter also uses the current detection to provide a reactive current and voltage control.
Voltage phase
detection (PLL) 3.7.5
Current protection
over load/ over current Current detection
3.7.4
DC bus DC bus Current Current

voltage voltage reference control
reference control 3.7.3
3.7.1 3.7.2
Voltage saturation
compensation 3.8.2
Reactive current/
voltage control 3.8.1
DC bus
Voltage detection
Fig 3.7.1 Control Block Diagram (Active front end converter with DC voltage control)
3.7.1. DC Bus Voltage reference
The DC Bus Voltage reference sets the CS_V_R with the weight of 1.0 per 100%. The standard setting is CS_V_R =
100%.
CS_V_R
DC voltage reference setting
Limit: 0.0 - 1000.0 % (1.0/100%)
Sets the DC voltage reference.
Rev.S
424
4GBF0632
3.7.2. DC Bus Voltage control

The figure below shows the DC Bus voltage control block. The voltage reference signal V_R, and the voltage feedback VDC_F
are input with a weighting such that a value of 1.0 is equivalent to a 100%. A proportional plus integral calculation is applied to the
voltage reference, detection and anti-overshoot controls. A filter and current limiting process is applied to the proportional and
integral calculation and the result is output as IQ_S, which has a weighting such that a value of 1.0 is equivalent to 100%.
The control response is determined by the following parameters:

Parameter Meaning Purpose
AVR_A Anti-overshoot gain Excessive overshoot can be suppressed by setting this parameter to a larger value.
AVR_AT Anti-overshoot The time constant for the anti-overshoot above. Adjust this value to minimize the
time constant overshoot.
AVR_P Proportional gain Set this parameter according to the load conditions and the desired response.
AVR_W1 Response gain Sets the target response.
<Integration>
1.0/100% <Current limiter>
Voltage <Filter> 1.0/100%

<Proportional> +
reference + + IQ_S
CS_V_R
– – +
Limit value
FLT_IQ_S
1.0/100% LMT_l1
Voltage
detection
VDC_F
<Anti-overshoot>
AVR_A: Anti-overshoot gain
AVR_AT: Time constant for the
Anti-overshoot
<Voltage control>
AVR_P: AVR proportional gain
AVR_W1: AVR response gain
Fig 3.7.2 Voltage Control
AVR_A
AVR anti-overshoot gain
Limit: 0 - 100000
Sets the AVR anti-overshoot gain.
AVR_AT
AVR anti-overshoot ω AT gain
Limit: 0.0 - 1000.0 rad/s
Sets the AVR anti-overshoot ω AT gain.
AVR_P
AVR proportional gain
Limit: 0 - 32767
Sets the AVR proportional gain.
[Related parameters] AVR_MST, AVR_W1
Rev.S
425
4GBF0632
AVR_W1
AVR response gain
Limit: 0.00 - 1000.0 rad/s
Sets the AVR response gain.
[Related parameters] AVR_MST, AVR_P
AVR_MST
AVR master ratio
Limit: 0.00- 100.0 %
Sets the ratio of master AVR. The master gain of AVR_P and AVR_W1 are determined by this setting ratio. The individual AVR
ratio of cell inverters is based on “100 % - AVR_MST”. Therefore, if the setting is 0 %, the mode is changed to the individual AVR
for cell inverters. If the DC voltages are unbalanced between groups of the cell inverters, it should be raised the ratio. However,
is must not be set to 100 % because the DC voltage will become unstable. Stop converter gating when changing this setting value.
[Related parameters] AVR_P, AVR_W1
AVR_PN_P
Neutral point control proportional gain
Limit: 0 - 32767
Sets the proportional gain of neutral point control. If both AVR_PN_P and AVR_PN_I are changed to setting 0, the neutral point
control is switched to the previous method of firmware 02A or earlier. It can be change this gain during running but it is necessary
to initialize control power to switch the old and new control method.
[Related parameters] AVR_PN_I, AVR_PN_GAIN
AVR_PN_I
Neutral point control integral gain
Limit: 0 - 32767
Sets the integral gain of neutral point control. If both AVR_PN_P and AVR_PN_I are changed to setting 0, the neutral point control
is switched to the previous method of firmware 02A or earlier. It can be change this gain during running but it is necessary to
initialize control power to switch the old and new control method.
[Related parameters] AVR_PN_P, AVR_PN_GAIN
FLG_PN_IREF
Neutral point control instantaneous power calculation flag
Standard value: 1
Limit: 0, 1
Sets compensation method of neutral point control. If it is set to 0, it uses instantaneous power calculated by current feedback. If
it is set to 1, it uses instantaneous power calculated by current reference.
[Related parameters] TIME_PN_MODSW
TIME_PN_MODSW
Neutral point control mode switching timer
Limit: 0.0 ~ 300.0 s
It compensates neutral point by current feedback base at converter’s gate off and current reference base at converter’s
gate on. Set switching time from converter operation start. It is available on FLG_PN_IREF = 1.
[Related parameters] FLG_PN_IREF
Rev.S
426
4GBF0632
DVDT_A, DVDT_AT
Voltage DVDT compensation anti-overshoot gain (DVDT_A)
Voltage DVDT compensation anti-overshoot AT gain (DVDT_AT)
Standard value: DVDT_A: 2000
DVDT_AT: 5.0 rad/s
Limit: DVDT_A: 0 - 32767
DVDT_AT: 0.0 - 125.0 rad/s
Sets the voltage DVDT compensation overshoot gain and the voltage DVDT compensation overshoot AT gain.
FLT_IQ_S
Converter torque current filter
Limit: 0.0 - 1024.0 rad/s
Sets the time constant of the converter torque current filter. When filter is not used, set 0.
FLT_VDC_CNV
DC voltage feedback filter for converter
Limit: 0.0 - 1024.0 rad/s
G_ID_IQCMP, G_ID_IQCMP2
Converter d axis current reference Iq correction gain (G_ID_IQCMP)
Converter d axis current reference Iq correction gain 2 (G_ID_IQCMP2)
Standard value: 0
Limit: -2000 - 2000
Sets the ratio of the q axis current reference added to the d axis current reference of the converter.
G_ID_IQCMP is the correction gain when the q axis current reference is positive.
G_ID_IQCMP2 is the correction gain when the q axis current reference is negative.
ID_S
Converter d axis current reference setting
Standard value: -5.0%
Limit: -250.0 - 250.0% (1.0/100%)
Note: Initialize
Sets the converter d axis current reference.
G_IQ_CMP_CNV
Converter q axis current feed-forward gain
Standard value: 50.0% (100.0 %)
Limit: 0.0 - 150.0 %
Sets the converter q axis current feed-forward gain from the inverter current. G_IQ_CMP_CNV may be required in hard load
impact applications.G_IQ_CMP_CNV will cause the converter DC bus voltage to respond faster.
[Related parameters] FLT_IQ_CMP
Rev.S
427
4GBF0632
FLT_IQ_CMP
Power compensation IQ filter
Limit: 0.0 - 1024.0 rad/s
Set filter for the inverter q-axis feedback to use power compensation. When filter is not used, set 0.
[Related parameters] G_IQ_CMP_CNV
EQ_GS_FBK0
Converter ACR preset minor adjustment gain
Standard value: -112 (6.6kV, 10kV & 11kV class model)
-50 (6.0kV class)
150 (3.3kV & 4.16kV class model)
Limit: -10000 - 10000
Set minor adjustment gain for converter ACR preset. It is necessary to tune in case of nonstandard input transformer.
[Related parameters] EQ_GS_FBK0_OVD
EQ_GS_FBK0_OVD
Converter ACR preset minor adjustment gain after overvoltage
Limit: -10000 - 10000
Set minor adjustment gain for converter ACR preset after DC overvoltage. In case of starting after direct power feeding or
restarting after DC overvoltage, it adjusts gain to start converter with discharging DC voltage.
[Related parameters] EQ_GS_FBK0
AVR_PN_GAIN
Neutral point control start up gain
Limit: 0.0 ~ 100.0 %
When the converter starts, the neutral point potential compensation gain AVR_PN_P and AVR_PN_I are reduced by this setting
to reducing the charging current at startup.
[Related parameters] AVR_PN_P, AVR_PN_I
LMT_E_CNV
Converter Voltage limit
Limit: 0.0 - 135.0 %
Set the limit value of the converter AC voltage reference. If set to 0%, the limit will be equivalent to 99.103%.
Rev.S
428
4GBF0632
3.7.3. Converter Current control
ACR_A_CNV
Converter ACR anti-overshoot gain
Limit: 0 - 32767
Sets the ACR (Automatic Current Regulator) anti-overshoot gain.
ACR_P_CNV
Converter ACR proportional gain
Limit: 0 - 32767
Sets the ACR (Automatic Current Regulator) proportional gain.
ACR_PI_MUL_CNV
Converter ACR multiplication gain
Standard value: 0
Limit: 0–3
Note: Not used
ACR_PI_MUL
Sets the power of the ACR (Automatic Current Regulator) proportional gain. The ACR_P is powered by 2 .
ACR_W1_CNV
Converter ACR response gain
Limit: 0 - 2000.0 rad/s
Sets the ACR (Automatic Current Regulator) response gain.
ACR _ P _ CNV ACR _ W 1 _ CNV

ACR _ I _ T _ B
F _ ACR
ACR_I_T integral gain

ACR_P proportional gain
ACR_W1 response gain [rad/s]
F_ACR current control frequency [Hz]
ACR_WL_CNV
Converter ACR decoupling control gain
Limit: 0 - 32767
Set the gain of decoupling control for converter ACR (Automatic Current Regulator).
FLG_WLC_IREF
Converter ACR decoupling control compensation current reference flag
Standard value: 1
Limit: 0, 1
Note: Initialize
Available in firmware 04A or later
Set compensation method of converter ACR decoupling control. If it is set to 0, it compensates by current feedback. If it is set to 0,
it compensates by current reference.
Rev.S
429
4GBF0632
3.7.4. Converter Current overload/ over current protection
LMT_I1_CNV
Converter primary current limit
Standard value: 110.0 %(Default value)
70.0 %(Default value for VAR control)
100.0 %(VAR control, reactive power compensation amount 40% of the maximum frame capacity)
Limit: 0.1 - 400.0 % (1.0/100%)
Sets the limit value of the converter current. The drive controls input current will not to exceed LMT_I1_CNV.
Set LMT_I1_CNV = 110 if the converter will have 110 % overload specification.
CP_RMS_CNV20
20-minute RMS overload detection
Standard value: See the chart below
Limit: 0.0 - 300.0 % (1.0/100%)
Sets the 20 minute RMS overload level based on the equation below.
2
OL
1 .0 2 20 60 T T
100
20 min RMS
20 60
OL: Overload [%]
T: Time [s]
[Related parameters] MSK_UVA2, OL20_B
CP_RMS_CNV5
5-minute RMS overload response
Limit: 0.0 - 300.0 % (1.0/100%)
Sets the five minute RMS overload level based on the equation below.
2
OL
1 .0 2 5 60 T T
100
5 min RMS
5 60
OL: Overload [%]
T: Time [s]
[Related parameters] MSK_UVA2, OL5_B
CP_RMS_CNV5A, CP_RMS_CNV20A
5-minute overload alarm setting, 20-minute overload alarm detection
Limit: 0.0 - 300.0 % (1.0/100%)
Sets the 5-minute RMS alarm setting and the 20-minute RMS alarm setting each.
If both the 5-minute RMS alarm and the 20-minute RMS alarm are on, the overload alarm OL_A_B_ will activate.
Please refer to the following TIME_CL table for a listing of some pre calculated settings.
TIME_CL 60 sec
OL(%) 110 115 125 150 175 200 225 250
CP_RMS_CNV5(%) 102.08 103.17 105.48 111.80 118.85 126.49 134.63 143.18
CP_RMS_CNV20(%) 100.52 100.80 101.40 103.08 105.03 107.24 109.69 112.36
CP_RMS_CNV5A(%) 100.04 101.11 103.37 109.57 116.47 123.96 131.94 140.31
CP_RMS_CNV20A(%) 100.02 100.30 100.89 102.56 104.50 106.70 109.14 111.80
[Related parameters] MSK_STPRQ2, OL_A_B
Rev.S
430
4GBF0632
CP_OCA_CNV
Converter AC overcurrent detection level
Limit: 0.0 - 400.0 % (1.0/100%)
Note: Initialize
Sets the AC overcurrent (OCA) detection level when the converter is gating.
When CS_CNV_CURR = 124.0 A and CP_OCA_CNV = 150%, AC overcurrent is detected at
124.0[ Arms] 150% 2 263.0[ Apeak ] .
[Related parameters] CS_CNV_CURR, xn_C_OCA
CP_CURCHK_CNV
Converter HCT check current
Limit: 0.0 - 100.0% (1.0/100%)
Sets the current value of converter HCTs.
When converters start operating, CURx__CNV (x = U, V, W) are detected if it cannot detect the converter current greater than a
setting current value (CP_CURCHK_CNV) during a setting time (TIME_CURCHK_CNV).
[Related parameters] TIME_CRUCHK_CNV, MSK_BLR2
TIME_CURCHK_CNV
Converter HCT check timer
Limit: 0 - 0.1 s
Sets the current value of converter HCTs.
When converters start operating, CURx__CNV (x = U, V, W) are detected if it cannot detect the converter current greater than a
setting current value (CP_CURCHK_CNV) during a setting time (TIME_CURCHK_CNV).
[Related parameters] CP_CURCHK_CNV, MSK_BLR2
Rev.S
431
4GBF0632
3.7.5. Converter voltage phase lock loop gain

For converter control, set PI control gains of PLL (Phase Locked Loop). It is not necessary for this drive to adjust the phase by
phase shift because it is detected the PLL voltage for converter from main input voltage. In the case of reverse phase, the
converter can not normally control. Therefore, please change the main input voltage to normal phase when it is detected input
voltage reverse phase (VAC_ROT_F).
CPLL_P
Converter voltage PLL proportional gain
Standard value: 10
Limit: 0 – 100000
Sets the PLL proportional gain of the converter.
[Related parameters] CPLL_W1
CPLL_W1
Converter voltage PLL response gain
Limit: 0.00 - 3000.0 rad/s
Sets the PLL response gain of the converter.
[Related parameters] CPLL_P
<Proportion> 65536cnt/ 2pi

<Filter> <Integration> QO_B
CPLL_DLT_Q (Input voltage phase)
Integ-
ral
300rad/s CPLL_P
CPLL_W1
Main input voltage

VU_FBK_B ED_FBK_CNV
VV_FBK_B coordinate
transform EQ_FBK_CNV
VW_FBK_B
θ
Rev.S
432
4GBF0632
3.7.6. Converter PLL error detection

It is possible that converter control becomes unstable if the input power source includes harmonic or occurs some power failure.
When the drive detects the converter voltage phase lock loop error based the converter d-axis current and voltage, the converter
stops gating on the diode rectifier mode until the PLL become normal condition same as momentary voltage drop ride-through.
Converter gate enable signal

$LVL_PLL_UVD
$CP_UV
$LVL_PLL_OV
DC voltage A
N
D
$LVL_PLL_IQFBK
Load current
$OP_IDCNV_AT $LVL_PLL_IDCNV
O
$LVL_PLL_ICNV
A
N
D
R (Ride-through)
$LVL_PLL_OC (Converter GB) A B_PLL_ERR
A B_PLL_ERR_T N
Converter current N SQ D
D R
Converter d-axis $LVL_PLL_IDERR
$TIME_PLL_ERDET
current reference +
O
Converter d-axis - R
current $LVL_VFBK_DLTQ
Converter d-axis voltage
$TIME_PLL_EDWAIT
$LVL_PLL_EDLOW A
N
D
LVL_VFBK_DLTQ
Converter voltage PLL d-axis voltage error detection level
Limit: 0.0 - 300.0 % (1.0/100%)
Set the level of converter d-axis voltage for detecting converter PLL voltage error.
[Related parameters] LVL_PLL_IDERR, LVL_PLL_OV, LVL_PLL_UVD, LVL_PLL_IQFBK, LVL_PLL_OC,
LVL_PLL_ICNV, LVL_PLL_IDCNV, OP_IDCNV_AT, TIME_PLL_ERDET, LVL_PLL_EDLOW, TIME_PLL_EDWAIT
LVL_PLL_IDERR
Converter voltage PLL d-axis current error detection level
Limit: 0.0 - 300.0 % (1.0/100%)
Set the level of converter d-axis current for detecting converter PLL voltage error. It is detected by difference between
d-axis current reference and feedback.
[Related parameters] LVL_VFBK_DLTQ, LVL_PLL_OV, LVL_PLL_UVD, LVL_PLL_IQFBK, LVL_PLL_OC,
Rev.S
433
4GBF0632
LVL_PLL_OV
Converter voltage PLL error detection over voltage level
Limit: 0.0 - 300.0 % (1.0/100%)
Set the level of the DC over voltage for detecting converter PLL voltage error. When load condition is less than
LVL_PLL_IQFBK, the DC voltage is more than this setting value so that the converter PLL error is detected.
[Related parameters] LVL_VFBK_DLTQ, LVL_PLL_OV, LVL_PLL_UVD, LVL_PLL_IQFBK, LVL_PLL_OC,
LVL_PLL_UVD
Converter voltage PLL error detection ride-through DC voltage lower level
Limit: 0.0 - 300.0 % (1.0/100%)
Set the level of the DC lower voltage to run ride-through control for detecting converter PLL voltage error. When the DC
voltage is more than this setting level, the inverter runs continuously with converter gate block. If this setting is set to 0,
this setting is automatically set to 150 % and this function is unavailable.
[Related parameters] LVL_VFBK_DLTQ, LVL_PLL_IDERR, LVL_PLL_OV, LVL_PLL_IQFBK, LVL_PLL_OC,
LVL_PLL_IQFBK
Converter voltage PLL error detection inverter q-axis current level
Limit: 0.0 - 300.0 % (1.0/100%)
Set the level of the inverter q-axis current for detecting converter PLL voltage error. When the inverter q-axis current is
larger than this setting value, the direct voltage is more than LVL_PLL_OV so that the converter PLL error is detected.
[Related parameters] LVL_VFBK_DLTQ, LVL_PLL_IDERR, LVL_PLL_OV, LVL_PLL_UVD, LVL_PLL_OC,
LVL_PLL_OC
Converter voltage PLL error detection converter over current level
Limit: 0.0 - 300.0 % (1.0/100%)
Set the level of the converter over current level for detecting converter PLL voltage error. When the converter voltage PLL
is unstable, and converter current is detected more than this setting, the PLL error is detected. The DC voltage detection
does not relate. If the setting is set to 0, the over current level is automatically set to 300 %, converter current become no
effect for the detection.
[Related parameters] LVL_VFBK_DLTQ, LVL_PLL_IDERR, LVL_PLL_OV, LVL_PLL_UVD, LVL_PLL_IQFBK,
LVL_PLL_ICNV
Converter voltage PLL error detection converter current level in converter d-axis current sudden change
Limit: 0.0 - 300.0 % (1.0/100%)
Set the level of the converter current level for detecting converter PLL voltage error when detecting main voltage
disturbance. If the setting is set to 0, this level is automatically set to 300 % and this condition is not included detecting one.
The detected condition of converter d-axis current sudden change is set by LVL_PLL_IDCNV and OP_IDCNV_AT.
LVL_PLL_OC, LVL_PLL_IDCNV, OP_IDCNV_AT, TIME_PLL_ERDET, LVL_PLL_EDLOW, TIME_PLL_EDWAIT,
Rev.S
434
4GBF0632
LVL_PLL_IDCNV
Converter voltage PLL error detection converter d-axis current fluctuation level
Limit: 0.0 - 300.0 % (1.0/100%)
Note: Available in firmware 05C or later
Set the level of the converter d-axis current incomplete differential output for detecting converter PLL voltage error. If the
setting is set to 0, this level is automatically set to 300 % and this condition is not included detecting one.
LVL_PLL_OC, LVL_PLL_ICNV, OP_IDCNV_AT, TIME_PLL_ERDET, LVL_PLL_EDLOW, TIME_PLL_EDWAIT,
OP_IDCNV_AT
Converter d-axis current incomplete differential time constant
Standard value: 500.0 rad/ s
Limit: 0.0 - 2400.0 rad/ s
Note: Available in firmware 05C or later
Set the time constant of the converter d-axis incomplete differential for detecting converter PLL voltage error. The
incomplete differential gain is fixed value 1.
LVL_PLL_OC, LVL_PLL_ICNV, LVL_PLL_IDCNV, TIME_PLL_ERDET, LVL_PLL_EDLOW, TIME_PLL_EDWAIT,
TIME_PLL_ERDET
Converter voltage PLL error detection timer
Limit: 0.0 - 300.0 s
Set the timer of monitor for increasing direct voltage and converter current after converter d-axis voltage and d-axis
current difference are reached to them converter PLL voltage error detection levels.
LVL_PLL_OC, LVL_PLL_ICNV, LVL_PLL_IDCNV, OP_IDCNV_AT, LVL_PLL_EDLOW, TIME_PLL_EDWAIT
LVL_PLL_EDLOW
Converter voltage PLL converter d-axis voltage lowering level
Limit: 0.0 - 300.0 % (1.0/100%)
Set the level of the converter d-axis voltage to recover to normal condition for converter voltage PLL after detecting the
PLL error.
LVL_PLL_OC, LVL_PLL_ICNV, LVL_PLL_IDCNV, OP_IDCNV_AT, TIME_PLL_ERDET, TIME_PLL_EDWAIT
TIME_PLL_EDWAIT
Converter voltage PLL error recovery waiting time
Limit: 0.0 - 300.0 s
Set the timer of recovery waiting timer after detecting converter PLL error detection. Set the smaller value than the
ride-through control timer TIME_MVD.
LVL_PLL_OC, LVL_PLL_ICNV, LVL_PLL_IDCNV, OP_IDCNV_AT, TIME_PLL_ERDET, LVL_PLL_EDLOW
Rev.S
435
4GBF0632
LVL_DISTB_SPLOW
Source voltage disturbance ride through stop speed setting
Limit: 0.0 - 125.0 %
Set motor absolute speed lower limit keep source voltage disturbance ride through.
For the disturbance without voltage decrease, the drive keep ride through until the motor stops regardless of control
power voltage fault delay timer(TIME_MVD).If 5% is set, when the speed dropped under 5%, the drive detect MPSF
TIME_MVD setting value after. Then, if PLL failure is not over after power supply failure recovery time, the drive output
BLR signal.If the drive should stop source voltage disturbance ride through after TIME_MVD setting value, set 125% to
this parameter.
[Related parameters] TIME_MVD, CP_PSFRCV_TIME
Rev.S
436
4GBF0632
3.7.7. Restart (Retry) function when detecting input voltage disturbance

It can continue to run by using a ride-through even if converter control become malfunction because of happening disturbed input
voltage. However, when serious input power disturbance is occur, the DC voltage and converter current can transiently reach to
protection level. In that case, the faults are cleared and it can restart (retry) because the over voltage and current are transient
affair.
The short term interval retry can be restricted by setting TIME_DISTB_RTRY. The input voltage disturbance is detected by
momentary voltage drop by setting CP_UVA_DISTB or voltage fluctuation by setting LVL_VAC_DISTB.
When transient overcurrent occurs, it can reset immediately after gate block. On the other hand, for overvoltage, it cannot reset
until DC voltage comes down under the protect level after gate block even if it is transient. In firmware 08A or earlier, the interval
time from automatic reset to restart after detecting fault of converter overcurrent and DC over voltage are same time. In firmware
08B or later, the interval for converter overcurrent is fixed value 0.1 sec and, for overvoltage is setting by TIME_OV_RTRY. It is
possible to restart with detecting DC voltage lowering regardless of the timer by setting FLG_RTRY_MODE in firmware 09A or
later.
LVL_VAC_DISTB
Disturbed input voltage detection level
Limit: -150.0 - 150.0 %
Set the disturbed input voltage detection level for clearing faults and restarting when detecting over voltage and converter
over current. In the case of setting to 0, the function is not available. This function is available in GIF board’s firmware
group number P03 or later, so if the firmware P02 or earlier is used, please do not use the function. If it retries after
converter overcurrent and DC overvoltage regardless of input voltage disturbance, set negative value.
[Related parameters] TIME_DISTB_RTRY, TIME_OV_RTRY, CP_UVA_SIL
TIME_DISTB_RTRY
Retry restriction time for disturbed input voltage
Limit: 0.0 - 300.0 s
When detecting over voltage and converter over current in happening input voltage disturbance, the faults are cleared
and it restarts. After the restart, if over voltage or current occur in this timer, it does not retry again.
Input voltage disturbance
Converter over Restart Re-fault detection for a Re-fault detection after

current or DC over (Retry) term of retry inhbition, in retry inhbition time, in that
voltage that case, stop the drive case, restart again
Time
Disturbed input $TIME_DISTB_RTRY $TIME_DISTB_RTRY

voltage detection Restart (retry) inhibition Restart (retry) inhibition
[Related parameters] LVL_VAC_DISTB, TIME_OV_RTRY, CP_UVA_SIL
Rev.S
437
4GBF0632
TIME_OV_RTRY
DC overvoltage retry interval in disturbed input voltage
Standard value: 1.0 s(80E, 100E)
2.0s (150E – 400E)
12.0s (TYPE-G)
Limit: -1 - 300.0 s
Set interval time from fault clearing to restarting after automatic reset when detecting DC over voltage. If electrical
condition is not ready in setting time in spite of resetting, it gives up retrying, detects DC overvoltage retry failure
(OV_RTRY_F) and stops the operation. Set larger than 0.1 sec. If the retry function after detecting DC overvoltage is
disenabled, set - 1 sec. In that case, the retry function after detecting converter overcurrent is only enabled.
Fault detection Fault rest Restart
Time
Restart interval $TIME_DISTB_RTRY

Retry inhibition
Disturbed input
voltage detection Converter overcurrent： 0.1 s (Fixed value)
DC overvoltage： $TIME_OV_RTRY (Setting value)
Restart (Retry) interval after DC overvoltage detection
Continued fault Retry timeout

DC overvoltage
Fault reset signal (Stop rest, BLR output)
detection
Time
$TIME_OV_RTRY
Disturbed input Restart interval
voltage detection
Time out in case of detecting ongoingly DC overvoltage
[Related parameters] LVL_VAC_DISTB, TIME_DISTB_RTRY, CP_UVA_SIL
FLG_OV_RTRY_MOD
DC overvoltage retry mode in disturbed input voltage
Standard value: 0 (Type-E cell inverters)
1 (Type-G cell inverters)
Limit: 0, 1
If it is set to 1, it can restart with detecting DC voltage lowering regardless of TIME_OV_RTRY when detecting DC
overvoltage during main power disturbance.
[Related parameters] LVL_VAC_DISTB, TIME_DISTB_RTRY, CP_UVA_SIL, LVL_VDC_CCDRDY
LVL_VDC_CCDRDY
DC voltage level of CCD boards ready condition
Standard value: 0 % (CP_OV – 3 %)
Limit: 0.0 - 150.0 %
Set DC voltage level of restarting in case of overvoltage retry by setting FLG_OV_RTRY_MOD = 1. In addition, this
setting doubles as DC voltage level of cell inverters preparation (CELL_PR) after direct power feeding for type-G cell
inverter model.
[Related parameters] FLG_OV_RTRY_MOD
Rev.S
438
4GBF0632
3.8 Converter Optional Function

The Converter Optional Function sets the parameters for the converter optional functions.
3.8.1. Reactive current/ voltage control (RCV Control)

The reactive current/voltage control (RCV) can be performed by using the converter's power regeneration function, with the
purpose of improving utility power factor. It can be provided to both leading and lagging reactive power even if motor running.
The control target is set by FLG_RCV_TYPE and FLG_RCV_FBK. The command value such as AC voltage, power and power
factor (PF) is set to RCV_REF_T as the reference through analog input or serial communication, etc., and the converter d-axis
current reference, ID_R is calculated to maintain the error to zero between the command value and the feedback. The feedback
can be input to RCV_FBK_T through analog or serial communication. In addition, it is possible to use input voltage, input reactive
power, utility voltage or utility reactive power calculated by software as feedback
On the other hand, envn when it does not use this control in software, it is possible to command converter d-axis current reference
directly through ID_FIX_T by using analog input or serial communication. It has a deadband for the ultimate converter d-axis
reference not to be lower than d-axis current reference setting (ID_S) in no load condition.
The block diagram, of the reactive current/voltage suppression control, is shown in the figure below. The RCV control outputs
converter d-axis current reference in the same manner as the voltage saturation suppression control from the Converter Voltage
Saturation Compensation Control. Therefore, if the RCV voltage saturation suppression control and the Converter Voltage
Saturation Compensation Control are both in use, the Converter Voltage Saturation Compensation Control is prioritized, to
prevent interference between the two. This function is available in firmware 07A or later.
Reference offset Drooping gain RCV control enable flag

RCV_ADJ RCV_DROOP FLG_RCV_DYM
(1.0/100%)
Communication input Dead band is changed in response to load.

Control target is The width is kept to ID_S in no load condition.
<Integral> ID_FIX_T (1.0/100%)
selected by
(Inital value：ID_FIX)
FLG_RCV_FBK
FLG_RCV_TYPE <Dead band>
<Current limit>
RCV control reference <Current limit> IDMAX_CNV4 1.0/100%
＋ <Rate> － <Proportion> ＋＋ ID_REF_CNV
Communication input ＋
RCV_REF_T ＋ Converter d-axis
＋－＋
(1.0/100%) current reference
Voltage Limit：
Reference rate
Reactive Var Upper limt
RATE_RCV_R <RCV control> B_IDCNV_DB
Power factor LMT_RCV_UL
G_RCV_P： Proportion gain Deadband detection
RCV control feadback ＜Filter＞ Lower limit
G_RCV_I ： Integral gain (Digital output)
LMT_RCV_LL
Communication input
RCV_FBK_T
(1.0/100%) d-axis current reference setting
Feadback filter B_IDCNV_LMT
Input/ Utility voltage ID_S_T (1.0/100%)
FLT_RCV_FBK (Inital value： ID_S） Limit detection
Reactive Var
(Digital output)
Fig 3.8.1 Reactive Current/Voltage Control (RCV control)
It has a deadband on last step of converter d-axis current reference generation. The load is larger, this deadband width is
narrower. When no load in ID_S = -5 % (standard), the deadband keeps ± 5 % but the converter q-axis current exceeds 5 %, the
deadband becomes gradually narrow. After that, the current value exceeds 10 %, the deadband becomes 0 %; no deadband,
therefore it can be set arbitrary d-axis current reference.
The sign switching of deadband has the hysteresis. When deadband is 5 %, if the input value exceeds half of deadband 2.5 %, the
output value jumps sign of input value one.
Deadband width = (D)

[%] Output [%]
| ID_S |
(D)
Input [%]
(D)
[%]
0 | ID_S | | ID_S |×2
| Converter q-axis current | (D)
Fig 3.8.2 Deadband of Converter d-axis current reference
Rev.S
439
4GBF0632
FLG_RCV_DYM
RCV control enable flag
Standard value: 0
Limit: 0-3
Sets the converter RCV control active / non-active as shown below. RCV control is normally inactive.
FLG_RCV_DYM converter RCV control notes

Not use RCV control If it is directly input converter d-axis current
0 reference through ID_FIX_T by using analog input
and serial communication, set to 0.
1 Always active
Depending on CM_BUF1 CM_BUF1 is made by AND of DI_EX3(12) and
2 CM_BUF1=0…non-active SERSEQDATA2(12).
CM_BUF1=1…active
Depending on CM_BUF2 CM_BUF2 is made by AND of DI_EX3(11) and
3 CM_BUF2=0…non-active SERSEQDATA2(11).
CM_BUF2=1…active
If it is set FLG_RCV_DYM to 0, it is not used RCV control (PI control) in the software. It can be directly input converter d-axis
current reference calculated by PLC. Even if this condition, the limit and deadband of near zero reference in software are available.
Set ID_S to -5 % standardly. The value processed the limit and deadband is sum of ID_FIX_T and ID_S_T.
The following bit flags are helpful to generate the current reference outside drive.
B_RCV_READY: RCV control ready condition; the bit means the converter can regulate current.
B_IDCNV_LMT: The bit means the current reference reaches level of IDMAX_CNV4.
B_IDCNV_DB: The bit means the current reference reaches deadband of near zero reference.
FLG_RCV_FBK
RCV control feedback select flag
Standard value: 0
Limit: 0 – 2 (Setting 1 is not available now)
Select FLG_RCV_FBK and FLG_RCV_TYPE to set the target of RCV control.
When setting FLG_RCV_FBK to 1 and using utility reactive power or voltage for the feedback, set FLG_XFR_UTL_SEL to 1.
In this case, synchronized utility by synchronous function is limited to same utility as detected reactive power or voltage.
[Rated parameters] FLG_RCV_TYPE, FLG_XFR_UTL_SEL
Rev.S
440
4GBF0632
FLG_RCV_TYPE
RCV control selection flag
Standard value: 0
Limit: 0-2
FLG_RCV_FBK and FLG_RCV_TYPE determine the feedback type and control type for the converter RCV control.
FLG_RCV_TYPE
FLG_RCV_FBK 0 (Var control) 1 (PF reference & Var control) 2 (Voltage control)
REF FBK REF FBK REF FBK
(LINE_KVAR_SC
(LINE_KVAR_SC
RCV_REF_T as I / CNV_KVA_T)
0 I / CNV_KVA_T) VAC_F as input
PF from drive as Reactive
(Drive input) as Reactive voltage [%]
input [%] power from drive
power from drive
input [%]
RCV_REF_T input [%]
RCV_REF_T
as Reactive (UTL_KVAR_SCI (UTL_KVAR_SCI
1 as VUTL_F as
power /CNV_KVA_T) as RCV_REF_T as / CNV_KVA_T)
(Utility) Voltage [%] utility voltage
[%] Utility reactive Utility PF [%] as Utility reactive
*1) [%]
power [%] power [%]
RCV_FBK_T as RCV_FBK_T as
RCV_REF_T as RCV_FBK_T as
2 Reactive Power Reactive Power
PF from external Voltage from
(External FBK) from external from external
FBK [%] external FBK[%]
FBK[%] FBK[%]
*1) Available in firmware 11A or later
RCV refrence from analog input or communication RCV_REF_T (1.0/100 %)

FLG_RCV_TYPE Type of reference
-100.0 % 0.0 % +100.0 %
0 Reactive power Leading Max value 0 Var Lagging Max value
1 Power factor Leading PF PF = 1 Lagging PF
2 Input voltage Not use Not use Rated input voltage
Some examples for interface and parameter setting are shown below.
(1) The case of using actual value measured from Var meter or power factor meter at utility power supply
RCV control is performed with feedback value measured from Var meter or power factor meter at target utility power supply.
If the reference is fixed value such as 0% reactive power or 100% power factor, the interface for reference is not required.
The fixed value can be set by RCV_ADJ. On the other hand, the reference (RCV_REF_T) can be set from communication
or analog input via PLC.
<Reference: Reactive power>

FLG_RCV_FBK = 2
FLG_RCV_TYPE = 0
<Reference: Power Factor>

FLG_RCV_FBK = 2
FLG_RCV_TYPE = 1
The left figure is example of using analog reactive

power feedback measured at utility power supply. The
analog signal is connected to interface module (IFM).
In case of using XIO board, analog input channel 1
Utility Var
can be used. Serial communication input is also
VAR MVe2 M available.
IFM
(Analog input)
RCV feadback RCV_FBK_T
Rev.S
441
4GBF0632
(2) The case of using actual value measured from both current and voltage meter at utility power supply
(Available in firmware 11A or later)
RCV control is performed with feedback values which are voltage measured at R-S and S-T phase by VT and current
measured at S and T phase by CT at target utility power supply. This feedback signals are connected to CTR. Reference
value (reactive power) is calculated by drive software.
If the reference is fixed value such as 0% reactive power or 100% power factor, the interface for reference is not required.
The fixed value can be set by RCV_ADJ. On the other hand, the reference (RCV_REF_T) can be input from
communication or analog input via PLC.
In this case, the utility power supply must be the same as one for synchronize transfer.

FLG_RCV_FBK = 1
FLG_RCV_TYPE = 0
FLG_XFR_UTL_SEL = 1

FLG_RCV_FBK = 1
FLG_RCV_TYPE = 1
FLG_XFR_UTL_SEL = 1
Adjustment is available by setting analog offset and

R RS gain for utility voltage and current.
Utility Var
T ST
MVe2 M AD_GS27, AD_OS27 for R phase utility current
CTR AD_GS28, AD_OS28 for T phase utility current
CH23 CH24 AD_GS30, AD_OS30 for R-S phase utility voltage
(Analog input) AD_GS31, AD_OS31 for S-T phase utility voltage
Utility Voltage & Curren t
(3) The case of using drive’s internal signal as feedback
This drive can calculate reactive power of utility power supply without option (external) circuit. RCV control can be
performed with this value as feedback.
Reference signal (RCV_REF_T) of reactive power or power factor is input through analog signal or communication via
PLC.
In case of performing RCV control with multiple drives at the same utility power supply, this interface and parameter setting
can be applicable.

FLG_RCV_FBK = 0
FLG_RCV_TYPE = 0

FLG_RCV_FBK = 0
FLG_RCV_TYPE = 1
The left figure is example of using analog RCV control

reference through Interface module (IFM).
In case of using XIO board, analog input channel 1 can be
used. Serial communication is also available.
Var
Utility
VAR MVe2 M
IFM
(Analog input)
PLC
RCV reference RCV_REF_T
Rev.S
442
4GBF0632
(4) The case of control the VAR by multiple drives
It is possible to use more than one drive and to improve the power factor of the system in total. Normally, master – slave
configuration. In master drive, set FLG_RCV_DYM = 1 and use actual value measured from both current and voltage meter at
utility power supply. Output RCV_PIOUT from master drive’s analog output and input it to slaver drive’s analog input. In slave
drive, set FLG_RCV_DYM = 0 and assign RCV_PIOUT to ID_FIX_T. Then, slave drive output reactive power by using control
amount of master drive.
-Master drive-
FLG_RCV_DYM = 1
FLG_RCV_FBK = 1
FLG_RCV_TYPE = 0
FLG_XFR_UTL_SEL = 1

FLG_RCV_DYM = 1
FLG_RCV_FBK = 1
FLG_RCV_TYPE = 1
FLG_XFR_UTL_SEL = 1
-Slave drive-
FLG_RCV_DYM = 0 Current and voltage meter at utility power supply
FLG_RCV_FBK = 2 observation in master drive can tune inner offsets and
FLG_RCV_TYPE = 0 gains.
AD_GS27, AD_OS27：R phase utility power current
<Reference: Power Factor> AD_GS28, AD_OS28：T phase utility power current
FLG_RCV_DYM = 0 AD_GS30, AD_OS30：R-S phase utility power voltage
FLG_RCV_FBK = 2 AD_GS31, AD_OS31：S-T phase utility power voltage
FLG_RCV_TYPE = 1
Utility R RS Var
T ST Master
MVe2 M
CTR
FLG_RCV_DYM = 1
CH23 CH24 (Analog output: RCV_PIOUT)
(Analog Input)
Current and voltage meter

at utility power supply
(Assign RCV_PIOUT to
IFM
ID_FIX_T)
Var
Slave
MVe2 M
FLG_RCV_DYM = 0
Rev.S
443
4GBF0632
FLG_RCV_LSYM_SEL
RCV control output lower limit selection flag
Standard value: 0
Limit: 0, 1
The minimum limit of the converter RCV control output is chosen. Set 0 to choose the parameter RCV_RC_LL, or set
FLG_RCV_LSYM_SEL to 1 to choose the d-axis current limit value as the output lower limit.
[Related parameters] RCV_RC_LL
FLT_RCV_FBK
RCV feedback filter
Limit: 0.0 - 1024.0 rad/s
Sets the time constant of the feedback filter of the converter RCV control. Set FLT_RCV_FBK to 0 when the filter is not used.
FLT_RCV_ILIM
RCV output limit value filter
Limit: 0.0 - 1024.0 rad/s
Sets the filter time constant of the output limit value of the converter RCV control. Set FLT_RCV_ILIM to 0 when the filter is not
used.
G_RCV_I
RCV integral gain
Limit: 0 - 100000
Sets the integration gain of the converter RCV control.
[Related parameters] G_RCV_P, RCV_ADJ, FLG_RCV_DYM, FLG_RCV_VAC, LMT_RCV_UL, LMT_RCV_LL
G_RCV_P
RCV proportional gain
Limit: 0 - 100000
Sets the proportional gain of the converter RCV control.
[Related parameters] G_RCV_I, RCV_ADJ, FLG_RCV_DYM, FLG_RCV_VAC, LMT_RCV_UL, LMT_RCV_LL
ID_FIX
RCV d axis current reference setting
Limit: -300.0 - 300.0 % (1.0/100%)
Note: Initialize
Sets the d axis current reference of the converter RCV control. This parameter will be effective when initialized after
FLG_RCV_DYM is set to 0, or when FLG_RCV_DYM_T is set to 0. ID_FIX will become active after initialization. The variable
ID_FIX_T is normally used as a d axis current reference.
[Related parameters] FLG_RCV_DYM
LMT_RCV_LL, LMT_RCV_UL
RCV’s PI control output lower limit (LMT_RCV_LL), RCV’s PI control output upper limit (LMT_RCV_UL)
Standard value: (LMT_RCV_LL) 0.0 % (-100.0%(*1), -40.0%(*2))
(LMT_RCV_UL) 0.0 % (100.0%(*1), 40.0%(*2))
(*1) Default value for VAR control
(*2) VAR control, reactive power compensation amount 40% of the maximum frame capacity
Limit: (LMT_RCV_LL) -300.0 - 0.0 % (1.0/100%)
(LMT_RCV_UL) 0.0 - 300.0 % (1.0/100%)
Sets the PI control output limit of the converter RCV control.
Rev.S
444
4GBF0632
RATE_RCV_R
RCV control reference rate
Limit: 0.00 - 30.0 s
Sets the time needed for a 100% increase of the AC voltage reference input for the converter RCV control. If 0.00s are set, there
will be no reference input rate. RCV feedback inputs the rate as preset.
RCV_ADJ
RCV control reference adjustment
Limit: -300.0 - 300.0 % (1.0/100%)
Set the offset of the reference such as voltage, power and power factor for the converter RCV control. If the reference is fixed
value, set this parameter and be not required external RCV reference signal.
RCV_DROOP
RCV control drooping gain
Standard value: 0
Limit: 0 - 100000
Sets the drooping gain of the converter RCV control. The value 2560 counts for the drooping gain 1.
RCV_RC_LL
RCV control output lower limit
Standard value: 0.0 % (-150.0 %)
Limit: -300.0 - 300.0 % (1.0/100%)
Sets the output lower limit of the converter RCV control when FLG_RCV_LSYM_SEL is set to 1.
[Related parameters] FLG_RCV_LSYM_SEL
RCV_TOCF_SCL
RCV control output limit scale
Limit: 0 - 100000
Set the output limit scale of the converter RCV control when the overload alarm (OL_A) occurs during operation of the converter
RCV control. RCV_TOCF_SCL = 8192 counts mean that limit scale is 0.25.
[Related parameters] TIME_RCV_TOCF
TIME_RCV_TOCF
RCV control output limit scale timer
Limit: 0.00 - 300.0 s
Set the delay time that is from the occurring overload alarm (OL_A) until decreasing the RCV control output. TIME_RCV_TOCF is
also the time from stopping the overload alarm until increasing the RCV control output.
[Related parameters] RCV_TOCF_SCL
Rev.S
445
4GBF0632
3.8.2. Voltage saturation compensation (VSC)

If the ratio between the AC voltage and the DC voltage is excessive, the converter's current control output may become saturated,
thus, making the control unstable. This is prevented by the voltage saturation suppression control (VSC). This function is not used
for this equipment.
FLT_VSC_CNV
Voltage saturation rate suppression filter
Limit: 0.0 - 1024.0 rad/s
Note: Not used
G_VSC_CNV_I
Voltage saturation suppression integral gain
Standard value: 450
Limit: 0 - 32767
Note: Not used
Sets the proportional and integral gain for the voltage saturation suppression control (VSC). The VSC will correct the d
axis current reference for the converter.
[Related parameters] LMT_VSC_CNV, LMT_VSC_CNV_LL, LMT_VSC_CNV_UL
G_VSC_CNV_P
Voltage saturation suppression proportional gain
Limit: 0 - 32767
Note: Not used
Sets the proportional gain for the voltage saturation suppression control. The voltage saturation suppression control
decreases the d-axis current reference compensation for the converter.
[Related parameters] LMT_VSC_CNV, LMT_VSC_CNV_LL, LMT_VSC_CNV_UL
LMT_VSC_CNV
Voltage saturation suppression control start level
Limit: 0.0 - 200.0% (1.0/100% (percent modulation 1))
Note: Not used
Sets the start level for the voltage saturation suppression control (VSC). The VSC will correct the d axis current reference for the
converter.
100% assumes 100% of the PWM carrier amplitude (percent modulation 1).
[Related parameters] G_VSC_CNV_I, G_VSC_CNV_P, LMT_VSC_CNV_LL, LMT_VSC_CNV_UL
LMT_VSC_CNV_LL
Voltage saturation suppression control lower limit
Standard value 0
Limit: -32767 - 0
Note: Not used
Sets the lower limits for the output of the voltage saturation suppression control (VSC). The output of the VSC will be the
correction value of the d axis current reference of the converter.
When limiting to a negative value, VSC is a terminal voltage constant control.
[Related parameters] G_VSC_CNV_I, G_VSC_CNV_P, LMT_VSC_CNV
LMT_VSC_CNV_UL
Voltage saturation suppression control upper limit
Standard value 8192
Limit: 0 - 32767
Note: Not used
Sets the upper limits for the output of the voltage saturation suppression control (VSC). The output of the VSC will be the
correction value of the d axis current reference of the converter.
When limiting to a positive value, VSC is a voltage saturation suppression control.
[Related parameters] G_VSC_CNV_I, G_VSC_CNV_P, LMT_VSC_CNV
Rev.S
446
4GBF0632
3.8.3. Other converter function

Sets the parameters related to the other converter function.
ACR_BPF
Current vibration preventive control BPF gain
Standard value: 0
Limit: -32767 – 32767
Note: Not used
Sets the band pass filter for the vibration suppression of the power supply voltage and current.
ACR_DMP
Current vibration preventive control gain
Standard value: 0
Limit: -32767 – 32767
Note: Not used
Sets the current vibration preventive control gain.
CR_DLT_Q
Compensation of phase between twin bank
Limit: -180.0 - 180.0 deg
Sets the advance of the phase angle between the B and A banks for the twin configuration.
For example, when the B bank main power phase of the twin converter is 30 degrees in advance of the A bank main power phase,
set the CR_DLT_Q to +30.0 degrees.
FLG_POW_AVE
Power averaging control enable flag
Standard value: 0
Limit: 0, 1
Sets the power averaging control enable flag. When the drive is used in a power generator application set the FLG_POW_AVE to
1, then the motor base speed is adjusted to average the generator power. Setting FLG_POW_AVE to 1 will cause the motor base
speed to always be controlled to 10% lower than its usual speed.
FLT_POW_AVE_BAS
Filter constant for power averaging control base speed reference
Limit: 0.0 - 1024.0 rad/s
Sets the filter constant for the power averaging control base speed reference. Set FLT_POW_AVE_BAS to 0 when the
filter is not used.
Base speed
100%
|SP_F|
5%
-10% 15% 90% 100%
Rev.S
447
4GBF0632
GAIN_QCMP_ICNV
Converter output current detection delay compensation gain
Standard value: 0
Limit: -32767 – 32767
Set the converter output current detection delay compensation gain.
GAIN_QCMP_CPLL
Converter PLL voltage detection delay compensation gain
Standard value: 0
Limit: -32767 – 32767
Set converter PLL voltage detection delay compensation gain.
GAIN_QCMP_VCNV
Converter output voltage detection delay compensation gain
Limit: -32767 – 32767
Set converter output voltage detection delay compensation gain.
Rev.S
448
4GBF0632
3.9 Motor protection function

The motor protection function protects the motor by sending the protection signals of the motor to the external input/output
channels in the drive equipment. It detects the failure of motor, and controls run and stop commands to the utilities like a cooling
fan.
The figure below shows the motor protection fault sequence. There are minor fault (MP_LFD), critical fault (MP_HFD), start
interlock (MP_SIL) and operation ready complete (MP_RIL) in the fault detection by the motor protection inputs (analog and
digital).
Set the critical fault (MP_HFD) and the emergency stop (MP_QSTOP) as a pair. Use caution when setting up the motor
protection. When the emergency stop (MP_QSTOP) is not available, the equipment will not stop.
MSK_
MP_LFD1~3,5~8
Set symbol name (address) Scaling Alarm level
Input the value of symbol set by AIN1_GS~AIN3_GS > MP_xxx_LVA
AI
AIN1_AS~AIN3_AS AIN1_OS~AIN3_OS
Set symbols for DI target Bit reverse

MSK_ Set bit mask as
DI (1: reverse)
BIEX1_xxx - BIEX10_xxx
MP_HFD1~3 same
SGN_DI_EX9~10
Fault level Traceback triggered
> make FI codes
MP_xxx_LV
B_MP_FAULT
Select load relay condition (1: fault)
(1: wait for load off) MSK_MP_QSTOP1~3
N
MP_FLG_LR1~3 QSTOP delay time
TIME_MP_xxx_QS
O In case of waiting load
DT_WR_SEQ/LR (1: load on)
R off, also QSTOPs after
1 sec.
0000h
FFFFh MSK_ MSK_UV1/

MP_SIL1~3 MP_S_IL,QSTOP_FAULT_
Set 1 to QSTOP_FAULT_
mask when using MP_HFD
O
and MP_QSTOP
R
Disregard MP_SIL and MP_RIL B_UV
Gate block
while running (B_RNTD=1) (0: UV off)
Running (1: running)
B_RNTD
MSK_ READY1/
MP_RIL1 MP_R_IL
O
R
B_MP_QSTOP QSTOP
N
(1: QSTOP) deceleration stop
B_QSTOP_FAULT_
(0: fault)
QSTOP fault detection
(0: fault)
Fig 3.9.1 Motor protection fault sequence
Rev.S
449
4GBF0632
The figure below shows the time chart of motor protection fault sequence.
When MP_HFD is detected, the drive control outputs MP_FAULT and starts QSTOP deceleration stop after TIME_MPxxx_QS
[s]. After the drive stops, the drive control outputs QSTOP_FAULT, turns off UV and executes the gate block.
When MP_SIL and MP_RIL are used, MP_SIL and MP_RIL are disregarded while RNTD is on. MP_SIL and MP_RIL become
active after the equipment stops, so the interlocks to UV and READY are released when the fault signals in MP_SIL and MP_RIL
recover.
Fig 3.9.2 Motor protection fault sequence time chart
Rev.S
450
4GBF0632
The start interlock (MP_SIL), operation ready complete interlock (MP_RIL), interlock electric condition (UV) and operation ready
complete (READY) are stopping conditions requiring clearance by acceptable conditions or removal by deactivation, before the
interlocking signals are accepted.
The figurer below shows the structure of MP_SIL and MP_RIL. MP_SIL and MP_RIL are disregarded after the UV or READY
signals acquire an acceptable status. MP_SIL and MP_RIL are also disregarded while running (RNTD on).
Fig 3.9.3 Structure of MP_SIL and MP_RIL
Rev.S
451
4GBF0632
3.9.1. Motor protection detection

Sets the parameters related to motor protection detection.
MP_BE_TM_LV, MP_BE_TM_LVA
Bearing temperature HFD level fault(MP_BE_TM_LV), Bearing temperature LFD level alarm(MP_BE_TM_LVA)
Standard value: (MP_BE_TM_LV) 0 degC (100 degC)
(MP_BE_TM_LVA) 0 deg C (95 degC)
Limit: 0 - 200 degC
Sets the HFD (MP_BE_TM1_OL - MP_BE_TM3_OL, MP_BE_TMX_OL) level and LFD (MP_BE_TM1_OLA - MP_BE_TM3_OLA,
MP_BE_TMX_OLA) level of the bearing temperatures MP_BE_TM1 - MP_BE_TM3 and MP_BE_TMX.
[Related parameters] MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1, MSK_MP_LFD1, TIME_MPBET_QS
TIME_MPBET_QS
Bearing temperature HFD QSTOP timer
Limit: 0.00 - 300.00 s
Sets the delay time, to start the QSTOP, of the bearing temperature HFD (MP_BE_TM1_OL - MP_BE_TM3_OL,
MP_BE_TMX_OL, MP_BE_TM_H1 - MP_BE_TM_H3).
[Related parameters] MSK_MP_HFD1, MSK_MP_HFD3, MSK_MP_QSTOP1, MSK_MP_QSTOP3, MP_FLG_LR1,
MP_FLG_LR3
MP_BV_X_LV, MP_BV_X_LVA
Bearing vibration X axis HFD level (MP_BV_X_LV), Bearing vibration X axis LFD level (MP_BV_X_LVA)
Standard value: (MP_BV_X_LV) 0.0 mm/sec (5.6 mm/sec)
(MP_BV_X_LVA) 0.0 mm/sec (2.8 mm/sec)
Limit: 0 - 200 mm/sec
Sets the HFD (MP_BV_1X_OL - MP_BV_3X_OL) level and the LFD (MP_BV_1X_OLA - MP_BV_3X_OLA) level of the bearing
vibration X axis MP_BV_1X - MP_BV_3X.
[Related parameters] MSK_MP_HFD2, MSK_MP_QSTOP2, MP_FLG_LR2, MSK_MP_LFD2, TIME_MPBV_QS
MP_BV_Y_LV, MP_BV_Y_LVA
Bearing vibration Y axis HFD level (MP_BV_Y_LV), Bearing vibration Y axis LFD level (MP_BV_Y_LVA)
Standard value: (MP_BV_Y_LV) 0.0 mm/sec (5.6 mm/sec)
(MP_BV_Y_LVA) 0.0 mm/sec (2.8 mm/sec)
Sets the HFD (MP_BV_1Y_OL - MP_BV_3Y_OL) level and the LFD (MP_BV_1Y_OLA - MP_BV_3Y_OLA) level of the bearing
vibration Y axis MP_BV_1Y - MP_BV_3Y.
MP_BV_Z_LV, MP_BV_Z_LVA
Bearing vibration Z axis HFD level (MP_BV_Z_LV), Bearing vibration Z axis LFD level (MP_BV_Z_LVA)
Standard value: (MP_BV_Z_LV) 0.0 mm/sec (5.6 mm/sec)
(MP_BV_Z_LVA) 0.0 mm/sec (2.8 mm/sec)
Sets the HFD (MP_BV_1Z_OL - MP_BV_3Z_OL) level and LFD (MP_BV_1Z_OLA - MP_BV_3Z_OLA) level of the bearing
vibration Z axis MP_BV_1Z - MP_BV_3Z.
Rev.S
452
4GBF0632
TIME_MPBV_QS
Bearing vibration HFD QSTOP timer
Limit: 0.00 - 300.00 s
Sets the delay time, to start the QSTOP, of the bearing vibration HFD (MP_BV_1X_OL - MP_BV_3X_OL, MP_BV_1Y_OL -
MP_BV_3Y_OL, MP_BV_1Z_OL - MP_BV_3Z_OL, MP_BV_X1_OL - MP_BV_X3_OL).
[Related parameters] MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1
MP_CW_TM_LV, MP_CW_TM_LVA
Cooling water temperature HFD level (MP_CW_TM_LV), Cooling water temperature LFD level (MP_CW_TM_LVA)
Standard value: (MP_CW_TM_LV) 0 degC (45 degC)
(MP_CW_TM_LVA) 0 degC (35 degC)
Limit: 0 - 200 degC
Sets the HFD (MP_CW_TM1_OL, MP_CW_TM2_OL, MP_CW_TMX_OL) level and the LFD (MP_CW_TM1_OLA,
MP_CW_TM2_OLA, MP_CW_TMX_OLA) level of the cooling water temperatures MP_CW_TM1, MP_CW_TM2, MP_CW_TMX.
[Related parameters] MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1, MSK_MP_LFD1, TIME_MPCWT_QS
TIME_MPCWT_QS
Cooling water temperature HFD QSTOP timer
Limit: 0.00 - 300.00s
Sets the delay time, to start the QSTOP, of the cooling water temperature HFD (MP_CW_TM1_OL, MP_CW_TM2_OL,
MP_CW_TMX_OL).
TIME_MPCFMR_QS
Cooling fan motor running QSTOP timer
Limit: 0.00 - 300.00 s
Sets the delay time, to start the QSTOP, of the cooling fan motor running (MP_CF1_MR, MP_CF2_MR) set with the digital input.
TIME_MPOLHF_QS
Oil lubrication unit HFD QSTOP timer
Limit: 0.00 - 300.00 s
Sets the delay time, to start the QSTOP, of the oil lubrication unit HFD (MP_OLU_HFD) set with the digital input.
TIME_MPOLHP_QS
Oil lubrication unit high pressure line normal QSTOP timer
Limit: 0.00 - 300.0 s
Sets the delay time, to start the QSTOP, of the oil lubrication unit high pressure line normal (MP_OLU_HPL_N) set with the digital
input.
TIME_MPOLLP_QS
Oil lubrication unit low pressure line normal QSTOP timer
Limit: 0.00 - 300.00 s
Sets the delay time, to start the QSTOP, of the oil lubrication unit low pressure line normal (MP_OLU_LPL_N) set with the digital
input.
Rev.S
453
4GBF0632
MP_CWF_LV, MP_CWF_LVA
Cooling water flow HFD level (MP_CWF_LV), Coolin water flow LFD level(MP_CWF_LVA)
Standard value: (MP_CWF_LV) 0 l/min (100 l/min)
(MP_CWF_LVA) 0 l/min (140 l/min)
Limit: 0 - 3000 l/min
Sets the HFD (MP_CWF1_LL, MP_CWF2_LL, MP_CWFS_LL) level and the LFD (MP_CWF1_LLA, MP_CWF2_LLA
MP_CWFS_LLA) level of the cooling water flow MP_CWF1, MP_CWF2, MP_CWFS.
The HFD is set to 50%, and the LFD is set to 70% of the standard rating. The standard values are the examples of the 200 l/min
rating.
[Related parameters] MSK_MP_HFD2, MSK_MP_QSTOP2, MP_FLG_LR2, MSK_MP_LFD2, TIME_MPCW_QS
TIME_MPCW_QS
Cooling water flow HFD QSTOP timer
Limit: 0.00 - 300.00 s
Sets the delay time, to start the QSTOP, of the cooling water flow HFD (MP_CWF1_LL, MP_CWF2_LL, MP_CWFS_LL,
MP_CWF_L1).
MP_FLG_LR3
MP_IAR_TM_LV, MP_IAR_TM_LVA
Inlet air temperature HFD level (MP_IAR_TM_LV), Inlet air temperature LFD level (MP_IAR_TM_LVA)
Standard value: (MP_IAR_TM_LV) 0 degC (50 degC)
(MP_IAR_TM_LVA) 0 degC (45 degC)
Limit: 0 - 200 degC
Sets the HFD (MP_IAR_TM1_OL, MP_IAR_TM2_OL, MP_IAR_TMX_OL) level and the LFD (MP_IAR_TM1_OLA,
MP_IAR_TM2_OLA, MP_IAR_TMX_OLA) level of inlet air temperatures MP_IAR_TM1, MP_IAR_TM2, MP_IAR_TMX.
[Related parameters] MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1, MSK_MP_LFD1, TIME_MPIART_QS
TIME_MPIART_QS
Inlet air temperature HFD QSTOP timer
Limit: 0.00 - 300.00 s
Sets the delay time, to start the QSTOP, of the inlet air temperature HFD (MP_IAR_TM1_OL, MP_IAR_TM2_OL,
MP_IAR_TMX_OL).
MP_OAR_TM_LV, MP_OAR_TM_LVA
Outlet air temperature HFD level (MP_OAR_TM_LV), Outlet air temperature LFD level (MP_OAR_TM_LVA)
Standard value: (MP_OAR_TM_LV) 0 degC (70 degC)
(MP_OAR_TM_LVA) 0 degC (65 degC)
Limit: 0 - 200 degC
Sets the HFD (MP_OAR_TM1_OL, MP_OAR_TM2_OL, MP_OAR_TMX_OL) level and the LFD (MP_OAR_TM1_OLA,
MP_OAR_TM2_OLA, MP_OAR_TMX_OLA) level of the outlet air temperatures MP_OAR_TM1, MP_OAR_TM2,
MP_OAR_TMX.
[Related parameters] MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1, MSK_MP_LFD1, TIME_MPIART_QS
TIME_MPOART_QS
Outlet air temperature HFD QSTOP timer
Limit: 0.00 - 300.00 s
Sets the delay time, to start the QSTOP, of the outlet air temperature HFD (MP_OAR_TM1_OL, MP_OAR_TM2_OL,
MP_OAR_TMX_OL).
Rev.S
454
4GBF0632
MP_SW_TM_LV, MP_SW_TM_LVA
Starter winding temperature HFD level (MP_SW_TM_LV), Starter winding temperature LFD level(MP_SW_TM_LVA)
Standard value: (MP_SW_TM_LV) 0 degC (155 degC)
(MP_SW_TM_LVA) 0 degC (145 degC)
Limit: 0 - 200 degC
Sets the HFD (MP_SW_TM1_OL - MP_SW_TM3_OL, MP_SW_TMX_OL) level and the LFD (MP_SW_TM1_OLA -
MP_SW_TM3_OLA, MP_SW_TMX_OLA) level of the starter winding temperatures MP_SW_TM1 - MP_SW_TM3,
MP_SW_TMX.
MP_FLG_LR2, MSK_MP_LFD1, MSK_MP_LFD2, TIME_MPSWT_QS
TIME_MPSWT_QS
Starter winding temperature HFD QSTOP timer
Limit: 0.00 - 300.00 s
Sets the delay time, to start the QSTOP, of the Starter winding temperature HFD (MP_SW_TM1_OL - MP_SW_TM3_OL,
MP_SW_TMX_OL).
TIME_MPWLK_QS
Water leakage QSTOP timer
Limit: 0.00 - 300.00 s
Sets the delay time, to start the QSTOP, of the water leakage (MP_WLK1) by digital input.
MP_MTMP_PT_AS
M_TMP transferring destination address (PT)
Standard value: dust
Limit:
A detected temperature value by the motor temperature detection circuit (PT1000, 1kohm platinum sensor) is copied to a symbol
assigned by this parameter.
This feature provides a motor protection with the motor temperature detection circuit (PT1000).
[Related parameters] MP_MTMP_PT_OS, MP_MTMP_RTD_AS, MP_MTMP_RTD_OS
MP_MTMP_PT_OS
M_TMP transferring offset (PT)
Limit: -1000.0 ~ 1000.0 degC
Sets an offset applied to that a detected temperature value by the motor temperature detection circuit (PT1000, 1kohm platinum
sensor) is copied to a symbol assigned by MP_TMP_PT_AS.
[Related parameters] MP_MTMP_PT_AS, MP_MTMP_RTD_AS, MP_MTMP_RTD_OS
Rev.S
455
4GBF0632
MP_MTMP_RTD_AS
M_TMP transferring destination address (RTD)
Standard value: dust
Limit:
A detected temperature value by the motor temperature detection circuit (RTD, 100ohm platinum sensor) is copied to a symbol
assigned by this parameter.
This feature provides a motor protection with the motor temperature detection circuit (RTD).
[Related parameters] MP_MTMP_PT_AS, MP_MTMP_PT_OS, MP_MTMP_RTD_OS
MP_MTMP_RTD_OS
M_TMP transferring offset (RTD)
Limit: -1000.0 ~ 1000.0 degC
Sets an offset applied to that a detected temperature value by the motor temperature detection circuit (RTD, 100ohm platinum
sensor) is copied to a symbol assigned by MP_TMP_PT_AS.
[Related parameters] MP_MTMP_PT_AS, MP_MTMP_PT_OS, MP_MTMP_RTD_AS
Rev.S
456
4GBF0632
3.9.2. Motor protection operation command

The table below shows motor protection command signals. Refer to 0 for the digital output.
Table 3.9.1 Motor protection command signals
Symbol Content
B_MP_CF1_MR_CMD Cooling Fan 1 Motor Run Command
B_MP_CF2_MR_CMD Cooling Fan 2 Motor Run Command
B_MP_OL_PR_CMD Oil Lubrication Pump Run Command
B_MP_OL_PS_CMD Oil Lubrication Pump Stop Command
B_MP_SPH_ON_CMD Space Heater On Command
3.9.2.1. Motor cooling fan operation command

The figure below shows motor cooling fan operation command sequence.
The operation command sequence outputs the run and stop of the motor cooling fan digitally (DO). The command means
running is set with 1 and stopping is set with 0.
When the cooling fan has stopped for TIME_MPCFMR_ST(0~300s) or more, the command turns off even though the command
is displayed as on.
Fig 3.9.4 Motor cooling fan operation command sequence
Rev.S
457
4GBF0632
Fig 3.9.5 - Fig 3.9.8 show time charts for each case.
TD1 - TD3 are parameters for delay times.
TD1: TIME_MPCFMR_ON
TD2: TIME_MPCFMR_OF
TD3: TIME_MPCFMR_ST
Fig 3.9.5 shows Case 1).

Case 1 runs or stops the cooling fan with the UV signal in the drive.
The external Start and Stop switch B_MP_CF_IL_, should be reversed by the sign setting DI_EX10/MP_CF_IL_.
UV controls the on and off status of the run command.

Case 2 runs or stops the cooling fan with an external Start and Stop switch.
The Start and Stop switch B_MP_CF_IL_ controls the on and off status of the run command.

When the running signal feedback stops, during the UV acceptable condition and the Start and Stop B_MP_CF_IL_ switch is
released, the run command is turned off.

When cooling fans #1 and #2 are used, cooling fan #2 starts after cooling fan #1 starts with the 2 multiplied delay time
(2xTIME_MPCFMR_ON).
Rev.S
458
4GBF0632
Fig 3.9.5 Case 1) Run and stop by UV in drive
Fig 3.9.6 Case 2) Run and stop by external start/stop switch
Rev.S
459
4GBF0632
Fig 3.9.7 Case 3) Cooling fan stopped during UV on and external start/stop switch on
Fig 3.9.8 Case 4) Run and stop cooling fan #1 and #2 by UV in drive
Rev.S
460
4GBF0632
TIME_MPCFMR_OF
Motor cooling fan off timer
Limit: 0.00 - 300.00 s
It is used for motor cooling fan operation command sequence.
Sets the delay time, to output the “turn off” signal, of the motor cooling fan operation commands (B_MP_CF1_MR_CMD,
B_MP_CF2_MR_CMD) for the digital output.
[Related parameters] DO1_AS - DO12_AS
TIME_MPCFMR_ON
Motor cooling fan on timer
Limit: 0.00 - 300.00 s
It is used for motor cooling fan operation command sequence.
Sets the delay time, to output the “turn on” signal, of the motor cooling fan operation commands (B_MP_CF1_MR_CMD,
B_MP_CF2_MR_CMD) for the digital output.
TIME_MPCFMR_ST
Motor cooling fan stopping detection timer
Limit: 0.00 - 3600.00 s
It is used for the motor cooling fan operation command sequence.
TIME_MPCFMR_ST sets the delay time, to detect the “turn off” signal, of the motor cooling fan running (B_MP_CF1_MR,
B_MP_CF2_MR) set with the digital input.
Sets the delay time until the running signal input is received, after the operation command signal output is sent.
[Related parameters] SGN_DI_EX9
Rev.S
461
4GBF0632
3.9.2.2. Space heater on command

The figure below shows the space heater “on” command sequence.
The “on” command sequence outputs the “on” and “off” of the space heater digitally (DO). The command means on is set with 1
and off is set with 0.
When TIME_MPSPH_ST (0~300s) or more has been off, the command turns off though the command is on.
Fig 3.9.9 Space heater on command sequence
Fig 3.9.10 - Fig 3.9.13 show time charts in each case.

TD1, TD3 and TD4 are parameters for delay times.
TD1: TIME_MPSPH_ON
TD3: TIME_MPSPH_ST
TD4: TIME_MPSPH_A

Case 1 turns on or off, the space heater using the FLDR signal in the drive.
The external Start and Stop signal B_MP_SPH_IL_ should be reversed by the sign setting DI_EX10/MP_SPH_IL_.
FLDR off/on turns on/off the on command.

Case 2 turns on or off the space heater using the external Start and Stop signal.
The Start/Stop signal B_MP_SPH_IL_ on/off turns on/off the on command.

When the motor space heater feedback signal turns “off” during the FLDR “not acceptable” status and the Start and Stop
B_MP_SPH_IL_ signal is released, the drive turns off the “on” command.

When the space heater feedback signal turns “on” during the FLDR met or acceptable status, the drive detects the alarm signal
MP_LFD3 and MP_SPH_ON_A_.
Rev.S
462
4GBF0632
Fig 3.9.10 Case 1) On and off by FLDR in drive
Fig 3.9.11 Case 2) On and off by external start/stop switch
Fig 3.9.12 Case 3) Space heater switched off during FLDR off and external start/stop switch on
Rev.S
463
4GBF0632
Fig 3.9.13 Case 4) Space heater switched on during FLDR on (light fault detection)
TIME_MPSPH_ON
Space heater on timer
Limit: 0.00 - 3600.00 s
It is used for the space heater on command sequence.
TIME_MPSPH_ON sets the delay time, to output the “on” status of the “space heater on” command (B_MP_SPH_ON_CMD) for
the digital output.
TIME_MPSPH_ST
Space heater stopping detection timer
Limit: 0.00 - 3600.00 s
It is used for space heater on command sequence.
TIME_MPSPH_ST sets the delay time to detect the signal “off” status of the “space heater on” (B_MP_SPH_ON) signal received
by the digital input.
[Related parameters] SGN_DI_EX9
TIME_MPSPH_A
Space heater LFD detection timer
Limit: 0.00 - 300.00 s
It is used for “space heater on” command sequence.
Sets the delay time, to detect the LFD (MP_SPH_ON_A), when the “space heater on” (B_MP_SPH_ON) received by the digital
input and the field excitation (FLDR) are on at the same time.
[Related parameters] MSK_MP_LFD3, SGN_DI_EX9
Rev.S
464
4GBF0632
3.9.2.3. Oil lubrication operation command

The figure below shows oil lubrication operation command sequence.
The oil lubrication operation command sequence outputs the run and stop signals of the oil lubrication digitally (DO). Each
command outputs an “on” status with a 0.1 second one-shot signal.
Fig 3.9.14 Oil lubrication operation command sequence
Fig 3.9.15 - Fig 3.9.17 show time charts in each case.

TD1 - TD3 are parameters for delay times.
TD1: TIME_MPOLPR_ON
TD2: TIME_MPOLPR_OF
TD3: TIME_MPOLPR_ST

The drive runs or stops the oil lubrication with the UV signal in the drive.
The external Start and Stop signal B_MP_OL_P_IL_ should be reversed by the sign setting DI_EX10/MP_OL_P_IL_.
UV on outputs the run command, and both a UV and RNTD “off”, not met, or not acceptable status signals will output the stop
command.

The drives starts or stops the oil lubrication with an external Start and Stop signal.
The Start and Stop signal B_MP_OL_P_IL_ can control the run and stop commands. A B_MP_OL_P_IL_ “on” signal outputs
the run command, and a B_MP_OL_P_IL_ “off” signal outputs the stop command.

When the oil lubrication fault occurs during the UV met condition and the Start and Stop B_MP_OL_P_IL_ signal is released,
the drive outputs the stop command, after both the UV and the RNTD “off” signals are detected by the drive.
Rev.S
465
4GBF0632
Start/Stop switch (1: start)

B_MP_OL_P_IL_
Electric condition (1: met)

B_UV
TD1 TD1
Motor running (1: running)

B_RNTD
Run command (1: run)

B_MP_OL_PR_CMD
TD2
Stop command (1: stop)

B_MP_OL_PS_CMD
Pump (1: running)
Operation ready (1: met)

B_READY
MP fault (0: fault)

B_MP_HFD_
Fig 3.9.15 Case 1) Run and stop by UV in drive
Rev.S
466
4GBF0632
Fig 3.9.16 Case 2) Run and stop by external start/stop switch
Rev.S
467
4GBF0632
Fig 3.9.17 Case 3) Pump stopped during UV on and external start/stop switch on
TIME_MPOLPR_ON
Oil lubrication unit on timer
Limit: 0.00 - 300.00 s
It is used for the oil lubrication unit operation command sequence.
Sets the delay time to output the “on” status signal of the oil lubrication unit “run” command (B_MP_OL_PR_CMD) for the digital
output.
TIME_MPOLPR_OF
Oil lubrication unit off timer
Limit: 0.00 - 300.00 s
It is used for the oil lubrication unit operation command sequence.
Sets the delay time to output the “on” status signal of the oil lubrication unit “stop” command (B_MP_OL_PS_CMD) for the digital
output.
Rev.S
468
4GBF0632
3.9.3. Motor protection sequence
MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1

MP critical fault mask 1 (MSK_MP_HFD1),
MP quick stop mask 1 (MSK_MP_QSTOP1),
MP quick stop load relay selection 1 (MP_FLG_LR1)
Limit:
These are the mask settings for the MP critical fault 1, the MP quick stop 1 and the load relay “off” status condition setting for the
MP quick stop 1.
The motor protection sequence signals are assigned to each bit. Set 1 to those bits whose signals are used and set 0 to
those bits which are not used.
Set the same values to MP critical fault 1 and MP quick stop 1 as pairs. When using these motor protection sequence signals, set
1 to QSTOP_FAULT_, of the electrical condition mask 1, to turn off UV, after the quick stop has finished.
When the load relay off condition, of the MP quick stop, is "use", the quick stop does not begin until the load relay turns off, even
if it is time to start the quick stop. After one second passes, from the load relay “off” status, the quick stop will start, even if the quick
stop delay timer has not timed out.
Table 3.9.2 MSK_MP_HFD1, MSK_MP_QSTOP1, MP_FLG_LR1

BIT Abbreviation Description
F MP_BE_TM1_OL_ Bearing Temperature 1 Over Level
E MP_BE_TM2_OL_ Bearing Temperature 2 Over Level
D MP_BE_TM3_OL_ Bearing Temperature 3 Over Level
C MP_BE_TMX_OL_ Bearing Temperature Max Over Level
B MP_CW_TM1_OL_ Cooling Water Temperature 1 Over Level
A MP_CW_TM2_OL_ Cooling Water Temperature 2 Over Level
9 MP_CW_TMX_OL_ Cooling Water Temperature Max Over Level
8 MP_IAR_TM1_OL_ Inlet Air Temperature 1 Over Level
6 MP_IAR_TMX_OL_ Inlet Air Temperature Max Over Level
5 MP_OAR_TM1_OL_ Outlet Air Temperature 1 Over Level
3 MP_OAR_TMX_OL_ Outlet Air Temperature Max Over Level
2 MP_SW_TM1_OL_ Stator Winding Temperature 1 Over Level
[Related parameters] MSK_UV1
Rev.S
469
4GBF0632

Limit:
These are the mask settings for the MP critical fault 2, the MP quick stop 2, and the load relay “off” condition setting for the MP
quick stop 2.
Set the same values to the MP critical fault 2 and the MP quick stop 2 as pairs. When using these motor protection sequence
signals, set 1 to QSTOP_FAULT_, of the electrical condition mask 1, to turn off UV after the quick stop has finished.
When the load relay off condition, of the MP quick stop is "use", the quick stop does not begin until the load relay turns off, even if
it is time to start the quick stop. After one second passes from the load relay “off” status, the quick stop will start, even if in the quick

F MP_SW_TMX_OL_ Stator Winding Temperature Max Over Level
E MP_BV_1X_OL_ Bearing Vibration 1-X Over Level
D MP_BV_1Y_OL_ Bearing Vibration 1-Y Over Level
C MP_BV_1Z_OL_ Bearing Vibration 1-Z Over Level
B MP_BV_2X_OL_ Bearing Vibration 2-X Over Level
A MP_BV_2Y_OL_ Bearing Vibration 2-Y Over Level
9 MP_BV_2Z_OL_ Bearing Vibration 2-Z Over Level
8 MP_BV_3X_OL_ Bearing Vibration 3-X Over Level
7 MP_BV_3Y_OL_ Bearing Vibration 3-Y Over Level
5 MP_BV_X1_OL_ Bearing Vibration Max1 Over Level
2 MP_CWF1_LL_ Cooling Water Flow 1 Low Level
0 MP_CWFS_LL_ Cooling Water Flow Sum Low Level
Rev.S
470
4GBF0632

Limit:
These are the mask settings for the MP critical fault 3, the MP quick stop 3, and the load relay “off” condition setting for the MP
quick stop 3.
Set the same values to the MP critical fault 3 and the MP quick stop 3 as pairs. When using these motor protection sequence
signals, set 1 to QSTOP_FAULT_, of the electrical condition mask 1, to turn off UV after the quick stop has finished.
When the load relay off condition, of the MP quick stop is "use", the quick stop does not begin until the load relay turns off, even if
it is time to start the quick stop. After one second passes from the load relay “off” status, the quick stop will start, even if in the quick

F MP_BE_TM_H1_ Bearing Temperature High1
E MP_BE_TM_H2_ Bearing Temperature High2
D MP_BE_TM_H3_ Bearing Temperature High3
C MP_CF1_MR Cooling Fan 1 Motor Running
B MP_CF2_MR Cooling Fan 2 Motor Running
A MP_CWF_L1_ Cooling Water Flow Low 1
9 MP_OLU_HFD_ Oil Lubrication Unit HFD
8 MP_OLU_HPL_N Oil Lubrication Unit High Pressure Line Normal
7 MP_OLU_LPL_N Oil Lubrication Unit Low Pressure Line Normal
6 MP_SW_TM_H_ Stator Winding Temperature High
5 MP_WLK1_ Water Leakage 1
4 N.U. Not used
3 N.U. Not used
2 N.U. Not used
1 N.U. Not used
0 N.U. Not used
Rev.S
471
4GBF0632
MSK_MP_SIL1
MP start interlock mask 1
Limit:
These are the mask settings for MP start interlock 1.
The motor protection sequence signals are assigned to each bit.
Set 1 to bits whose signals are used and set 0 to those bits not used.
When using each signal of the MP start interlock 1, set 1 to MP_S_IL of the electrical condition mask 1.
Table 3.9.5 MSK_MP_SIL1

F MP_BE_TM1_OL_ Bearing Temperature 1 Over Level
E MP_BE_TM2_OL_ Bearing Temperature 2 Over Level
D MP_BE_TM3_OL_ Bearing Temperature 3 Over Level
C MP_BE_TMX_OL_ Bearing Temperature Max Over Level
B MP_CW_TM1_OL_ Cooling Water Temperature 1 Over Level
A MP_CW_TM2_OL_ Cooling Water Temperature 2 Over Level
9 MP_CW_TMX_OL_ Cooling Water Temperature Max Over Level
6 MP_IAR_TMX_OL_ Inlet Air Temperature Max Over Level
3 MP_OAR_TMX_OL_ Outlet Air Temperature Max Over Level
Rev.S
472
4GBF0632
MSK_MP_SIL2
Limit:

F MP_SW_TMX_OL_ Stator Winding Temperature Max Over Level
E MP_BV_1X_OL_ Bearing Vibration 1-X Over Level
D MP_BV_1Y_OL_ Bearing Vibration 1-Y Over Level
C MP_BV_1Z_OL_ Bearing Vibration 1-Z Over Level
B MP_BV_2X_OL_ Bearing Vibration 2-X Over Level
A MP_BV_2Y_OL_ Bearing Vibration 2-Y Over Level
8 MP_BV_3X_OL_ Bearing Vibration 3-X Over Level
7 MP_BV_3Y_OL_ Bearing Vibration 3-Y Over Level
0 MP_CWFS_LL_ Cooling Water Flow Sum Low Level
Rev.S
473
4GBF0632
MSK_MP_SIL3
Limit:

F MP_BE_TM_H1_ Bearing Temperature High1
E MP_BE_TM_H2_ Bearing Temperature High2
D MP_BE_TM_H3_ Bearing Temperature High3
C MP_CWF_L1_ Cooling Water Flow Low 1
B MP_SW_TM_H_ Stator Winding Temperature High
A MP_WLK1_ Water Leakage 1
9 N.U. Not used
8 N.U. Not used
7 N.U. Not used
6 N.U. Not used
5 N.U. Not used
4 N.U. Not used
3 N.U. Not used
2 N.U. Not used
1 N.U. Not used
0 N.U. Not used
Rev.S
474
4GBF0632
MSK_MP_RIL1
MP operation ready interlock mask 1
Limit:
These are the mask settings for the MP operation ready interlock 1.
The motor protection sequence signals are assigned to each bit. Set 1 to bits whose signals are used and set 0 to those bits not
used.
When using each signal of the MP operation ready interlock 1, set 1 to MP_R_IL of the operation ready complete mask 1.
Table 3.9.8 MSK_MP_RIL1

F MP_CF1_MRA Cooling Fan 1 Motor Running Alarm
E MP_CF2_MRA Cooling Fan 2 Motor Running Alarm
D MP_OLU_HFDA_ Oil Lubrication Unit HFD Alarm
C MP_OLU_HPL_NA Oil Lubrication Unit High Pressure Line Normal Alarm
B MP_OLU_LPL_NA Oil Lubrication Unit Low Pressure Line Normal Alarm
A N.U. Not used
9 N.U. Not used
8 N.U. Not used
7 N.U. Not used
6 N.U. Not used
5 N.U. Not used
4 N.U. Not used
3 N.U. Not used
2 N.U. Not used
1 N.U. Not used
0 N.U. Not used
[Related parameters] MSK_READY1
Rev.S
475
4GBF0632
MSK_MP_LFD1
MP minor fault 1
Limit:
These are the mask settings for the MP minor fault 1.
used.
Table 3.9.9 MSK_MP_LFD1

F MP_BE_TM1_OLA_ Bearing Temperature 1 Over Level Alarm
E MP_BE_TM2_OLA_ Bearing Temperature 2 Over Level Alarm
D MP_BE_TM3_OLA_ Bearing Temperature 3 Over Level Alarm
C MP_BE_TMX_OLA_ Bearing Temperature Max Over Level Alarm
B MP_CW_TM1_OLA_ Cooling Water Temperature 1 Over Level Alarm
A MP_CW_TM2_OLA_ Cooling Water Temperature 2 Over Level Alarm
9 MP_CW_TMX_OLA_ Cooling Water Temperature Max Over Level Alarm
8 MP_IAR_TM1_OLA_ Inlet Air Temperature 1 Over Level Alarm
7 MP_IAR_TM2_OLA_ Inlet Air Temperature 2 Over Level Alarm
6 MP_IAR_TMX_OLA_ Inlet Air Temperature Max Over Level Alarm
5 MP_OAR_TM1_OLA_ Outlet Air Temperature 1 Over Level Alarm
4 MP_OAR_TM2_OLA_ Outlet Air Temperature 2 Over Level Alarm
3 MP_OAR_TMX_OLA_ Outlet Air Temperature Max Over Level Alarm
2 MP_SW_TM1_OLA_ Stator Winding Temperature 1 Over Level Alarm
Rev.S
476
4GBF0632
MSK_MP_LFD2
MP minor fault 2
Limit:
The motor protection sequence signals are assigned to each bit. Set 1 to bits whose signals are used and set 0 those to bits not
used.

F MP_SW_TMX_OLA_ Stator Winding Temperature Max Over Level Alarm
E MP_BV_1X_OLA_ Bearing Vibration 1-X Over Level Alarm
D MP_BV_1Y_OLA_ Bearing Vibration 1-Y Over Level Alarm
C MP_BV_1Z_OLA_ Bearing Vibration 1-Z Over Level Alarm
B MP_BV_2X_OLA_ Bearing Vibration 2-X Over Level Alarm
A MP_BV_2Y_OLA_ Bearing Vibration 2-Y Over Level Alarm
9 MP_BV_2Z_OLA_ Bearing Vibration 2-Z Over Level Alarm
8 MP_BV_3X_OLA_ Bearing Vibration 3-X Over Level Alarm
7 MP_BV_3Y_OLA_ Bearing Vibration 3-Y Over Level Alarm
6 MP_BV_3Z_OLA_ Bearing Vibration 3-Z Over Level Alarm
5 MP_BV_X1_OLA_ Bearing Vibration Max1 Over Level Alarm
2 MP_CWF1_LLA_ Cooling Water Flow 1 Low Level Alarm
1 MP_CWF2_LLA_ Cooling Water Flow 2 Low Level Alarm
0 MP_CWFS_LLA_ Cooling Water Flow Sum Low Level Alarm
Rev.S
477
4GBF0632
MSK_MP_LFD3
MP minor fault 3
Limit:
used.

F MP_CF1_MRA Cooling Fan 1 Motor Running Alarm
E MP_CF2_MRA Cooling Fan 2 Motor Running Alarm
D MP_CF1_MCC_F_ Cooling Fan 1 MCC Fault
C MP_CF2_MCC_F_ Cooling Fan 2 MCC Fault
B MP_CWF_L1A_ Cooling Water Flow Low 1 Alarm
A MP_CW_TM_H1_ Cooling Water Temperature High 1
9 MP_OLU_LFD_ Oil Lubrication Unit LFD
8 MP_OLU_HFDA_ Oil Lubrication Unit HFD Alarm
7 MP_SPH_ON_A_ Space Heater On Alarm
6 MP_SPH_MCC_F_ Space Heater MCC Fault
5 MP_WLK1A_ Water Leakage 1 Alarm
4 N.U. Not used
3 N.U. Not used
2 N.U. Not used
1 N.U. Not used
0 N.U. Not used
Rev.S
478
4GBF0632
MSK_MP_LFD5
MP minor fault 5
Limit:
used.
When the auxiliary points of contact, of the motor breakers, are input to the DI, set 1 to the pertinent bits of MP minor fault masks
for MSK_MP_LFD5. In addition, set 1 to FLG_IMNUM_SEL when detecting the number of motors using the DI data in the
sensor-less multiple motors control.

F MP_BR01_CL Motor Breaker 01 Closed
E MP_BR02_CL Motor Breaker 02 Closed
D MP_BR03_CL Motor Breaker 03 Closed
C MP_BR04_CL Motor Breaker 04 Closed
B MP_BR05_CL Motor Breaker 05 Closed
A MP_BR06_CL Motor Breaker 06 Closed
9 MP_BR07_CL Motor Breaker 07 Closed
[Related parameters] FLG_IMNUM_SEL
Rev.S
479
4GBF0632
MSK_MP_LFD6
MP minor fault 6
Limit:
used.

Rev.S
480
4GBF0632
MSK_MP_LFD7
MP minor fault 7
Limit:
used.

Rev.S
481
4GBF0632
MSK_MP_LFD8
MP minor fault 8
Limit:
used.

Rev.S
482
4GBF0632
3.10 External Transformer protection function

The transformer protection function protects the external transformer by connecting the protection signals of transformer to the
external input/output channels going into the drive. The transformer protection function detects the failure of external transformer.
The figure below shows external transformer protection function fault sequence. There is a minor fault (MP_LFD) and a critical
fault (MP_HFD) in the fault detection of the transformer protection inputs (analog and digital).
In the critical fault MP_HFD, related to the transformer failing, the transformer protection function outputs MP_FAULT and turns
off the electrical condition UV. The equipment will immediately stop.
Fig 3.10.1 External Transformer protection fault sequence
3.10.1. External Transformer protection detection

Sets the parameters related to the transformer protection detection.
MP_OL_TM_LV, MP_OL_TM_LVA
Oil temperature HFD level (MP_OL_TM_LV), Oil temperature LFD level(MP_OL_TM_LVA)
Standard value: (MP_OL_TM_LV) 0 degC (100 degC)
(MP_OL_TM_LVA) 0 degC (90 degC)
Limit: 0 - 200 degC
Sets the HFD (MP_OL_TM_OL) level and the LFD (MP_OL_TM_OLA) level of the oil temperature MP_OL_TM.
[Related parameters] MSK_MP_HFD4, MSK_MP_LFD4
MP_WD_TM_LV, MP_WD_TM_LVA
Winding temperature HFD level (MP_WD_TM_LV), Winding temperature LFD level (MP_WD_TM_LVA)
Standard value: (MP_WD_TM_LV) 0 degC (105 degC)
(MP_WD_TM_LVA) 0 degC (95 degC)
Limit: 0 - 200 degC
Sets the HFD (MP_WD_TM_OL) level and the LFD (MP_WD_TM_OLA) level of the winding temperature MP_WD_TM.
[Related parameters] MSK_MP_HFD4, MSK_MP_LFD4
Rev.S
483
4GBF0632
3.10.2. External Transformer protection sequence
MSK_MP_HFD4
MP critical fault mask 4
Limit:
This is the mask setting for MP critical fault 4.
The transformer protection function signals are assigned to each bit. Set 1 to bits whose signals are used and set 0 to
those bits not used.
When using each signal of the MP critical fault 4, set 1 to the FAULT_ of electrical condition mask 2.
If a signal of the critical failure 4 is set to "use"(Masked OFF), that signal of the critical failure 4 becomes an “operation continuation”
signal that will not output a FAULT when a failure occurs.
Table 3.10.1 MSK_MP_HFD4
F MP_OL_TM_TR_ Oil Temperature Trip
E MP_WD_TM_TR_ Winding Temperature Trip
D MP_OL_LVL_TR_ Oil Level Trip
C MP_PRD_TR_ Pressure Relief Device Trip
B MP_BH_RL_TR_ Buchholz Relay Trip
A MP_GP_RL_TR_ Sudden Gas Pressure Relay Trip
9 MP_OL_TM_OL_ Oil Temperature Over Level
8 MP_WD_TM_OL_ Winding Temperature Over Level
7 N.U. Not used
6 N.U. Not used
5 N.U. Not used
4 N.U. Not used
3 N.U. Not used
2 N.U. Not used
1 N.U. Not used
0 N.U. Not used
Rev.S
484
4GBF0632
MSK_MP_LFD4
MP minor fault 4
Limit:
The transformer protection function signals are assigned to each bit. Set 1 to bits whose signals are used and set 0 to those bits
not used.
F MP_OL_TM_A_ Oil Temperature Alarm
E MP_OL_TM_TR_ Oil Temperature Trip
D MP_WD_TM_A_ Winding Temperature Alarm
C MP_WD_TM_TR_ Winding Temperature Trip
B MP_OL_LVL_A_ Oil Level Alarm
A MP_OL_LVL_TR_ Oil Level Trip
9 MP_PRD_A_ Pressure Relief Device Alarm
8 MP_PRD_TR_ Pressure Relief Device Trip
7 MP_BH_RL_A_ Buchholz Relay Alarm
6 MP_BH_RL_TR_ Buchholz Relay Trip
5 MP_GP_RL_TR_ Sudden Gas Pressure Relay Trip
4 MP_OL_TM_OLA_ Oil Temperature Over Level Alarm
3 MP_WD_TM_OLA_ Winding Temperature Over Level Alarm
2 N.U. Not used
1 N.U. Not used
0 N.U. Not used
Rev.S
485
4GBF0632
3.11 Other Function
3.11.1. Enhanced keypad (KPAD) setting
Sets the parameters related to the enhanced keypad (KPAD).

It has option of a multi-language keypad (GOT) which is supported by nine languages (English, Japanese, Chinese, Russian,
Spanish, Portuguese, French, Italian and Korean). Both keypads are applied to same parameters.
Refer to “Drive Equipment Multi-Language Keypad Operation Guide (4GBF0249)”, for details.
KPAD_PRIVILEGE
Enhanced Keypad mode selection flag
Standard value: 0
Limit: 0-2
Sets the function mode of the Enhanced Keypad.
Setting Explanation
Referencing symbols is available with Enhanced Keypad.
0
Always use this setting when using standard display panel.
1 Referencing symbols and operating motor are available with Enhanced Keypad.
Referencing and re-writing symbols, parameter management and operating motor are available with
2 Enhanced Keypad.
Default loading function in TMdrive-Navigator Commissioning Wizard is available.
KPAD_FLGSET1
Enhanced Keypad flag set 1
Limit:
Selects the display mode of the Enhanced Keypad.
Selections are assigned to each bit. Set 1 to bits whose signals are selected and set 0 to those bits not selected.

F N.U. Not used
E N.U. Not used
D N.U. Not used
C N.U. Not used
B N.U. Not used
A N.U. Not used
9 N.U. Not used
8 N.U. Not used
7 N.U. Not used
6 N.U. Not used
5 N.U. Not used
4 N.U. Not used
3 N.U. Not used
2 N.U. Not used
1 N.U. Not used
0 FAULT_DP Fault display initial screen: fault description
(Setting Example)
Setting Explanation
0000 H An initial screen of the fault display becomes a fault name display.
0001 H An initial screen of the fault display becomes a fault description display.
Rev.S
486
4GBF0632
KPAD_METER1_DT - KPAD_METER4_DT
Enhanced Keypad meter settings; data
Standard value: Below table
Limit: 0 - 19
Sets the data displayed on meters of the Enhanced Keypad.
These parameters will be updated if the meter settings are changed with the Enhanced Keypad. If these parameters are
changed with the maintenance tool, the meter settings are updated after the meter display is updated (once the other
screen is displayed).
The relation between parameters and data is shown below.
Physi
KPAD display Physical amount cal
Data Percent variable
name variable quanti
ty unit
0 Speed reference Speed Reference SP_REF_PCT SP_REF_SCI min-1
1 Speed feedback Motor Speed MOT_SPD_PCT MOT_SPD_SCI min-1
2 Torque current feedback Torque Current MOT_TRQ_CURR_PCT MOT_TRQ_CURR_SCI A
3 Motor primary current Motor Current MOT_CURR_PCT MOT_CURR_SCI A

Average DC voltage
4 DC Volt DC_VOLT_PCT DC_VOLT_SCI V
feedback
5 Exciting current feedback Flux Current MOT_FLX_CURR_PCT MOT_FLX_CURR_SCI A
6 Torque reference Torque Ref TRQ_REF_PCT TRQ_REF_SCI Nm
7 Flux reference Flux Ref FLUX_REF_PCT FLUX_REF_SCI -
8 Output frequency Motor Frequency MOT_FREQ_PCT MOT_FREQ_SCI Hz
9 Output voltage Motor Volt MOT_VOLT_PCT MOT_VOLT_SCI V
10 Motor power Motor Power MOT_POWER_PCT MOT_POWER_SCI kW
11 Line-to-line voltage feedback CNV Line Volt LINE_VOLT_PCT LINE_VOLT_SCI V
12 Speed reference for display Speed Ref Set SP_REF_PCT SP_REF_DSP_SCI min-1
13 Motor temperature Motor Temp M_TMP_FLT_PCT M_TMP_FLT_SCI deg C
14 Reactive power Reactive Power VI_KVAR_PCT VI_KVAR_SCI kVAR

15 Apparent power Apparent Power VI_KVA_PCT VI_KVA_SCI kVA
16 Motor power factor Mot Power Factor VI_PF_PCT VI_PF_SCI -
17 MRH speed reference MRH Speed Ref SP_REF_MRH_PCT SP_REF_MRH_SCI min-1
18 CTR board temperature CTR PWB Temp PWB_TMP_FLT_PCT PWB_TMP_FLT_SCI deg C

Input transformer
19 Input Xfmr Temp TR_TMP_FLT_PCT TR_TMP_FLT_SCI deg C
temperature
Standard values are shown below.

Parameter Standard value
KPAD_METER1_DT 1 Speed feedback
KPAD_METER2_DT 3 Motor primary current
KPAD_METER3_DT 9 Output voltage
KPAD_METER4_DT 11 Line-to-line voltage feedback
[Related parameters] KPAD_METER1_RG - KPAD_METER4_RG
Rev.S
487
4GBF0632
KPAD_METER1_RG - KPAD_METER4_RG
Enhanced Keypad meter settings; range 1 - 4
Standard value: Below table
Limit: 0-7
Sets the meter range of the Enhanced Keypad.
These parameters will be updated if the meter settings are changed with the Enhanced Keypad. If these parameters are
changed with the maintenance tool, the meter settings are updated after the meter display is updated (once the other
screen is displayed).
The relation between parameters and data is shown below.

Setting Data
0 0 to +100%
1 -100% to +100%
2 0 to +150%
3 -150% to +150%
4 0 to +200%
5 -200% to +200%
6 0 to +300%
7 -300% to +300%
Standard values are shown below.

Parameter Standard value
KPAD_METER1_RG 2 (0 to +150%)
[Related parameters] KPAD_METER1_DT - KPAD_METER4_DT
Rev.S
488
4GBF0632
3.11.2. IP address setting

Set the IP address-related parameters.
TOOL_IP1 - TOOL_IP4
IP address
Standard value: 192, 168, 87, 87 (192.168.87.87)
Limit:
Note: Initialize
Set the IP address of the drive’s own station for Ethernet transmission.
TOOL_IP1~TOOL_IP4 set the values of each section of the dotted decimal notation (example: 192.168.87.87). The IP address
must be unique. The same IP address may not be used elsewhere on the network this drive is on.
The lowest octet of the IP address, corresponding to “ddd” in address “aaa.bbb.ccc.ddd”, is set with the rotary switches on the
main control (CTR) board. However, when the value of the rotary switches is 0 or 255, the least address reaches the value set with
TOOL_IP4.
IP address: aaa. bbb. ccc. ddd
SW2 SW3
Rotary switches on the main control board
Set upper 4-bit of the least address by a hex digit

Set lower 4-bit of the least address by a hex digit
(When the rotary switches setting is 0 or 255, the least address is defined by TOOL_IP4)
TOOL_SUBNET_MSK
Subnet mask
Standard value: FFFFFF00 H (255.255.255.0)
Limit:
Note: Initialize
Sets the subnet mask for the tool Ethernet transmission.
TOOL_SUBNET_MSK sets the values of each section of the dotted decimal notation. For example, 255.254.155.25 expressed in
hexadecimal notation is FFFE9B19bH (where bH means base Hex) or 255.254.155.25 would be FF.FE.9B.19 and similarly
255.255.255.0 would be FFFFFF00bH.
TOOL_GATEWAY
Tool gateway
Standard value: C0A85701 H (192.168.87.1)
Limit:
Note: Initialize
Sets the gateway number for the Ethernet transmission.
TOOL_GATEWAY sets the values of each section of the dotted decimal notation. For example, 192.168.87.1 expressed in
hexadecimal notation would be C0A85701bH.
Rev.S
489
4GBF0632
3.11.3. Spare parameters for future use

The spare parameters are both for floating-point numbers and 16-bit integers.
SPARE_F01_SET - SPARE_F10_SET
Spare Floating-point number setting 1 - 10
Reference value: 0.0
Limit: -
Spare set values are for the floating point number.
SPARE_W01_SET - SPARE_W10_SET
Spare 16-bit integer setting 1 - 10
Reference value: 0
Limit: -
Spare set values are for the 16-bit integer.
Rev.S
490
4GBF0632
3.11.4. Adjustment for time

The CTR board of this equipment doesn't have a backup power source for the time. Since the CTR board saves its time in the
EEPROM at power off and reads from the EEPROM at power on, the CTR board time at power on will be the power off time.
Therefore, after powering on this equipment, it's necessary to adjust the time.
Below are the available the methods to adjust the CTR board time.
(1) Auto Adjustment for time via transmission (LAN).

The TC-net I/O transmission has a network time. When using TC-net I/O transmission, the TC-net I/O serial communication
board (ARND-4027) writes the CTR board time periodically. It doesn’t need any particular setting.
When using a LAN transmission of something other than TC-net I/O transmission, the time is written periodically from a PLC
by the message transmission. This is available with the PLC transmission which has a message transmission function. The
PLC needs to send a message, for adjusting the time, to this equipment.
For more details of each transmission, please refer to the ”Drive Equipment PLC Transmission Instruction Manual”
(Document #6F3A4885).
(2) Connect the keypad display which adjusts time at power on automatically.
The keypad has a backup power for date and time. The keypad writes its date and time to the CTR board when powering on.
(3) Connect the TMdrive Navigator (TMdN) and adjust the time.
Adjust the CTR board time to the PC time with the time adjustment function of the TMdN tool. Connect the TMdN tool and
synchronize the PC date and time to the drive.
In the above methods, (3) the time adjustment by the PC tool doesn’t perform the time adjustment automatically.
When you cannot use (1) or (2), please be sure to adjust the time with the TMdN tool before turning power off when a fault has
occurred.
When a fault occurs in this equipment, the CTR board time is copied to the occurrence time of the traceback. If the power is
turned off without adjusting the time, the traceback occurrence time becomes inaccurate. If you adjust the time before turning
power off, even after the fault occurred, the traceback occurrence time is revised automatically.
Rev.S
491
4GBF0632
3.11.5. Others
These are the other parameters.
COMB1_AS - COMB4_AS
Bit combination output address
Limit:
The value of a bit variable is converted into the data of a floating point number.
The conversion results are stored in COMB1_OUT - COMB4_OUT.
If the value of a bit is 0 or 1, the conversion results are each 0.0 and 1.0.
If each bit, of the sequence data, of the 16bit integer needs to be fetched, use WORD_OUT1_AS - WORD_OUT4_AS and
WORD_OUT1_BN - WORD_OUT4_BN.
COMB1_MSK1 - COMB1_MSK4
Bit combination output mask
Standard value: 0
Limit:
Note: Not used
TIME_SPA1 - TIME_SPA4
Spare input signal delay time 1 to 4
Limit: 0.00 - 300.0 s
Sets the delay time for the DI input spare signals 1 to 4. The resolution of the delay time is 50ms. SPAn_T are forcibly set to 1 for
50ms when the control power turns on.
[Related parameters] MSK_BLR5, MSK_UVA4, SPA1_T - SPA4_T
CALC1_INP1_AS, CALC1_INP2_AS, CALC2_INP1_AS, CALC2_INP2_AS

Arbitrary calculation1 Input 1Data, Arbitrary calculation 1 Input 2 Data, Arbitrary calculation 2 Input 1 Data, Arbitrary calculation 2
Input 2 Data
Limit: -
CALC1_INP1_GS, CALC1_INP2_GS, CALC2_INP1_GS, CALC2_INP2_GS

Arbitrary calculation 1 Input 1 Gain, Arbitrary calculation 1 Input 2 Gain, Arbitrary calculation 2 Input 1 Gain, Arbitrary calculation 2
Input 2 Gain
Reference value 0.0
Limit: -
Rev.S
492
4GBF0632
FLT_CALC1, FLT_CALC2
Arbitrary calculation1 output filter, arbitrary calculation 2 output filter
Reference value: 0.0 rad/s
Limit: 0.0 - 1024.0 rad/s
An arbitrary symbol (floating point number) can be designated to perform an operation as in the figure below. The operation
results can be monitored in CALC1_OUT and CALC2_OUT. Furthermore, the absolute value of operation results can be
monitored in CALC1_ABS_OUT and CALC2_ABS_OUT.
The value of a variable designated

in CALCn_INP1_AS + CALCn_OUT
CALCn_INP1_GS +
FLT_CALCn
The value of a variable designated CALCn_ABS_OUT
in CALCn_INP2_AS
CALCn_INP2_GS (n : 1, 2)
CAP_1_AS - CAP_8_AS
Capture buffer channel address
Limit:
This is used in the capture buffer function of the TMdN tool.
CAP_1_AS - CAP_8_AS set the addresses for channels 1 to 8.
(Standard)
Parameter Variable
CAP_1_AS SP_R
CAP_2_AS SP_F
CAP_3_AS MOT_VAC_F
CAP_4_AS E1_R
CAP_5_AS IQ_F
CAP_6_AS ID_F
CAP_7_AS IU_F
CAP_8_AS IW_F
CAP_CHAN_CFG
Capture buffer channel configuration
Standard value: 3
Limit: 1-3
CAP_CHAN_CFG sets the channel configuration.
1 = 2 channels
2 = 4 channels
3 = 8 channels
CAP_ENB_DLY
Capture buffer auto enable delay time
Standard value: -1
Limit: -1 - 32767
CAP_ENB_DLY sets the delay time, in increments of 1 minute, before the automatic sampling restarts.
If -1 is set to CAP_ENB_DLY, the automatic enable does not work.
Rev.S
493
4GBF0632
CAP_P_MULT
Capture buffer sampling period multiplier
Standard value: 20
Limit: 1 - 32767
Sets the multiplier for the sampling period selected by CAP_TSK_EXEC.
Sampling period = Period selected by CAP_TSK_EXEC x CAP_P_MULT
CAP_PRE_SAMP
Capture buffer pre-trigger sampling ratio
Limit: 0.0 - 100.0%
CAP_PRE_SAMP sets the pre-trigger sampling ratio to the total sampling period.
CAP_TRIG_AS
Capture buffer trigger address
Standard value: ID_F
Limit:
CAP_TRIG_AS sets the trigger signal address.
CAP_TRIG_BIT
Capture buffer trigger bit
Standard value: 0
Limit: 0 - 15
CAP_TRIG_BIT sets the bit number of the trigger signal.
[Related parameters] CAP_TRIG_BIT is active when CAP_TRIG_MOD = 0 or 1.
CAP_TRIG_LVL
Capture buffer trigger level
Standard value: 0.05
Limit:
CAP_TRIG_LVL sets the trigger level. This is used with CAP_TRIG_MOD = 2 to 5.
CAP_TRIG_MOD
Capture buffer trigger mode
Standard value: 4
Limit: 0-5
CAP_TRIG_MOD sets the trigger mode.
CAP_TRIG_MOD Content
0 Bit on
1 Bit off
2 level
3 level
4 > level
5 < level
Rev.S
494
4GBF0632
CAP_TRIG_TYP
Capture buffer trigger type
Standard value: 1
Limit: 0, 1
CAP_TRIG_TYP sets the trigger type.
0 = Level trigger
1 = Edge trigger
CAP_TSK_EXEC
Capture buffer sampling period
Standard value: 1
Limit: 0-3
CAP_TSK_EXEC selects the sampling period.
0 = No sampling
1 = 1 ms period
2 = 10 ms period
3 = Current control period
Sampling period = Period selected by CAP_TSK_EXEC x CAP_P_MULT
SH_READ_AS0 - SH_READ_AS3
SH read address
Limit:
Sets an absolute address of SH (the master CPU) to be read. SH_READ_AS0 – SH_READ_AS3 read-out data goes into
the following variables:
When resetting the maximum and the minimum values, input a larger value than the present maximum value and a
smaller value than the present minimum value, respectively.
SH_READ_DAT0 - SH_READ_DAT3: Read-out data
SH_READ_MAX0 - SH_READ_MAX3: The maximum value of read-out data
SH_READ_MIN0 - SH_READ_MIN3: The minimum value of read-out data
SETCRC
Set value area CRC value
Data type : 16-bit integer
Reference value: Automatic setting H
Limit:
If a set value is changed, the CRC(Cyclic Redundancy Check) value, in the set value area, is calculated and is written to
SETCRC.
SETEND
Setting parameters area end
Limit:
This is a symbol to indicate the start and end addresses of the setting parameters area.
SETSTART
Setting parameters area start
Limit:
This is a symbol to indicate the start and the end addresses of the setting parameters area.
Rev.S
495
4GBF0632
PP7A_RD_ADR1 - PP7A_RD_ADR4
PP7A Monitor addresses 1 - 4
Reference value: 0000 H
Limit: -
Designates an address, to refer to memory values, inside the PP7A microcomputer.
The memory values are stored in PP7A_RD_DAT1 - PP7A_RD_DAT4, respectively.
WORD_OUT1_AS - WORD_OUT4_AS
Bit fetch designation symbols 1 - 4
Data type: Symbol (32bit integer)
Reference value: DUSTW
Limit: -
WORD_OUT1_BN - WORD_OUT4_BN
Bit fetch designation bit numbers 1 - 4
Reference value: 0
Limit: 0 - 15
The symbols and bit numbers of the 16bit integer can be designated to fetch bit values. The bit values are stored in B_BIT_OUT1
- B_BIT_OUT4, respectively.
RATE_PPIEO
Speed control PI/P change integration decreasing rate
Standard value: 0.0
Limit: -
Note: Not used
FLG_SP_REF_PG
PLG input speed reference selection flag
Standard value: 0
Limit: 0, 1
Note: Not used
CELL_MON_SEL
Monitor cell number of steps select
Standard value: 0
Limit: 0 – 6 (1-6 in firmware 11A or older.)
Set cell number of group for monitoring the values below. For example when setting CELL_MON_SEL = 1, the values below are
value for first group cells.
In the case of 2 group × 2 bank topology, Setting 1 and 2 mean first and secand group of A bank, setting 3 and 4 mean first and
secand group of B bank. In the case of 3 group × 2 bank topology, setting 1, 2 and 3 mean first, secand and third group of A bank,
setting 4, 5 and 6 mean first, secand and third group of B bank. Set to 0 to automatically select a failed step one time (the first
failure after the control power-on is monitored for the first step). The step the drive is monitoring can be checked with the variable
DRIVE_STS. The automatic setting function by setting 0 is available in firmware 11A or later.
Phase Converter Converter voltage DC voltage feedback DC voltage feedback

Current reference (P side) (P side) (N side)
U-phase IU_CNV VU_REF_B VDC_MON_UP VDC_MON_UN
V-pahse IV_CNV VV_REF_B VDC_MON_VP VDC_MON_VN
W-pahse IW_CNV VW_REF_B VDC_MON_WP VDC_MON_WN
Rev.S
496
4GBF0632
G_DSP_VOLT
Voltage adjustment gain for monitor
Limit: -300.0 - 300.0 %
Set the voltage adjustment gain for monitor
G_DSP_POW
Power adjustment gain for monitor
Limit: -300.0 - 300.0 %
Set the power adjustment gain for monitor
Rev.S
497
4GBF0632
4 Appendix
4.1 Typical Variable List
The typical variables used in the equipment are shown:
No. Variable Symbol Data Type Weight Descriptions

1. SP_R Floating-point 1.0/100% Speed reference
number
2. SP_REF1 Floating-point 1.0/100% External speed reference 1
number
3. SP_F Floating-point 1.0/100% Velocity feedback
number
4. SP_FBK0 Floating-point 1.0/100% Velocity feedback before inputting filter
number
5. SP_F_DSP Floating-point 1.0/100% Speed feedback for monitor
number Motor primary frequency (V/f control)
6. T_R Floating-point 1.0/100% Torque reference
number
7. E1_R Floating-point 1.0/100% Primary voltage reference
number
8. E1_R_T Floating-point 1.0/100% Rating conversion primary voltage reference (% Unit)
number
9. E1_R_V Floating-point 1.0/1V Primary voltage reference (V Unit)
number
10. IQ_R Floating-point 1.0/100% q axis motor current reference
number
11. IQ_F Floating-point 1.0/100% q axis motor current feedback
number
12. ID_R Floating-point 1.0/100% d axis motor current reference
number
13. ID_F Floating-point 1.0/100% d axis motor current feedback
number
14. IQ_F_B Floating-point 1.0/100% Converter q axis motor current feedback
number
15. ID_F_B Floating-point 1.0/100% Converter d axis motor current feedback
number
16. I1_F Floating-point 1.0/100% Motor primary current feedback
number
17. IU_F Floating-point 1.0/100% U phase current feedback
number
18. EQ_R Floating-point 1.0/100% q axis voltage reference
number
19. ED_R Floating-point 1.0/100% d axis voltage reference
number
20. EQ_R_B Floating-point 1.0/100% Converter q axis voltage reference
number
21. ED_R_B Floating-point 1.0/100% Converter d axis voltage reference
number
22. VDC_F Floating-point 1.0/100% Vdc feedback
number
23. VDC_F_FLT Floating-point 1.0/100% Vdc feedback after filter
number
24. FL_R Floating-point 1.0/100% Magnetic flux reference
number
25. M_TMP_FLT Floating-point 1.0/1°C Motor temperature after filter
number
26. QO 16-bit integer 65536/2π Outputted electrical angle
27. DEAD_EU_R 16-bit integer 16384/percent U phase voltage reference dead time compensation
modulation 1 amount
28. DEAD_EV_R 16-bit integer 16384/percent V phase voltage reference dead time compensation
modulation 1 amount
29. DEAD_EW_R 16-bit integer 16384/percent W phase voltage reference dead time compensation
modulation 1 amount
30. G_VSC_FLX Floating-point 1.0/100% Voltage saturation suppression magnetic flux
Rev.S
498
4GBF0632
number deterioration gain
31. ASPROUT_FLT Floating-point 1.0/100% Speed control output
number
32. TENS_R1 Floating-point 1.0/100% Tension reference input 1
number
33. EXT_TRQ Floating-point 1.0/100% External torque reference
number
34. IQ_LMT_EXT Floating-point 1.0/100% External current limit
number
35. I1MAX Floating-point 1.0/100% Upper limit of motor primary current
number
36. SFC_DATA Floating-point 1.0/100% SFC Output
number
37. CPS_FLT Floating-point 1.0/1V Control power supply voltage after filter
number
38. DT_MT_CNT 16-bit integer - Motor counter
39. DT_MT_POS 16-bit integer - Resolver counter
40. WOC Floating-point 1.0/100% Sensorless frequency
number
41. WOCD Floating-point 1.0/100% Sensorless estimated frequency compensation
number
42. FREQ_DFDT Floating-point 1.0/100% Sensorless secondary voltage reverse operation
number frequency
43. E2Q Floating-point 1.0/100% Motor secondary q axis voltage
number
44. E2D Floating-point 1.0/100% Motor secondary d axis voltage
number
45. V_R Floating-point 1.0/100% Converter Vdc reference
number
46. CNV_FO 16-bit integer 16/1Hz Frequency of converter
47. VD_FBK Floating-point 1.0/100% Converter d axis PLL voltage feedback
number
48. VQ_FBK Floating-point 1.0/100% Converter q axis PLL voltage feedback
number
49. VAC_F Floating-point 1.0/100% Converter power supply voltage feedback
number
50. DLT_Q Floating-point 1.0/100% Converter power supply phase difference
number
51. G_VSC_DATA Floating-point 1.0/100% Converter voltage saturation suppression d axis
number current compensation value
52. IQ_CMP_CNV Floating-point 1.0/100% Converter q axis current compensation input
number
Rev.S
499
4GBF0632
4.2 Group Data Constitution/Parameter Default Values of Enhanced Keypad

The group data constitutions of the enhanced keypad are shown below. The group is divided into the primary group and
sub-group, and they are constituted such that the sub-group includes the set values and symbols of variables.
In addition, a parameter can be each set at a default value using the enhanced keypad. The defaults values used with the
enhanced keypad are shown together therewith.
Refer to “Drive Enhanced Keypad Operation Guide” (6E3A4734) for the operation method of the enhanced keypad.
Primary Group: Analog I/O AD_GS0 ····························································· 0

Sub Group: Bit Combination AD_GS1 ····························································· 0
COMB1_AS ···············································B_DUST AD_GS3 ····························································· 0
COMB1_MSK1 ····················································· 0 AD_GS4 ····························································· 0
COMB1_MSK2 ····················································· 0 AD_GS5 ····························································· 0
COMB1_MSK3 ····················································· 0 AD_GS14 ···························································· 0
COMB1_MSK4 ····················································· 0 AD_GS23 ···························································· 0
COMB2_AS ···············································B_DUST AD_GS25 ···························································· 0
COMB2_MSK1 ····················································· 0 AD_GS26 ···························································· 0
COMB2_MSK2 ····················································· 0 AD_GS27 ···························································· 0
COMB2_MSK3 ····················································· 0 AD_GS28 ···························································· 0
COMB2_MSK4 ····················································· 0 AD_GS30 ···························································· 0
COMB3_AS ···············································B_DUST AD_GS31 ···························································· 0
COMB3_MSK1 ····················································· 0 AD_GS32 ···························································· 0
COMB3_MSK2 ····················································· 0 AD_OS1 ····························································· 0
COMB3_MSK3 ····················································· 0 AD_OS2 ····························································· 0
COMB3_MSK4 ····················································· 0 AD_OS3 ····························································· 0
COMB4_AS ···············································B_DUST AD_OS4 ····························································· 0
COMB4_MSK1 ····················································· 0 AD_OS5 ····························································· 0
COMB4_MSK2 ····················································· 0 AD_OS20 ···························································· 0
COMB4_MSK3 ····················································· 0 AD_OS21 ···························································· 0
COMB4_MSK4 ····················································· 0 AD_OS22 ···························································· 0
AD_OS23 ···························································· 0
Primary Group: Analog I/O AD_OS25 ···························································· 0
Sub Group: Check Pin Out AD_OS26 ···························································· 0
DA1_AS ······················································· DUST AD_OS27 ···························································· 0
DA1_GS ······························································ 0 AD_OS28 ···························································· 0
DA1_OS ······························································ 0 AD_OS30 ···························································· 0
DA2_AS ······················································· DUST AD_OS31 ···························································· 0
DA2_GS ······························································ 0 AD_OS32 ···························································· 0
DA2_OS ······························································ 0 MTMP_OS ·························································· 0
DA3_AS ······················································· DUST MTMP_PT_RMAX ················································· 0
DA3_GS ······························································ 0 MTMP_PT_RMIN ·················································· 0
DA3_OS ······························································ 0 MTMP_RTD_MAX ················································ 0
DA4_AS ······················································· DUST MTMP_RTD_MIN ················································· 0
DA4_GS ······························································ 0 TRTMP_OS ························································· 0
DA4_OS ······························································ 0
DA5_AS ······················································· DUST Primary Group: Analog I/O
DA5_GS ······························································ 0 Sub Group: Output #1-7
DA5_OS ······························································ 0 AOUT1_CODE ····················································· 0
AOUT1_OP_AS ··············································DUST
Primary Group: Analog I/O AOUT1_OP_GS ··················································· 0
Sub Group: Input #1-3 AOUT1_OP_OS ··················································· 0
AIN1_AS ······················································ DUST AOUT2_CODE ····················································· 0
AIN1_GS ····························································· 0 AOUT2_OP_AS ··············································DUST
AIN1_OS ····························································· 0 AOUT2_OP_GS ··················································· 0
FLT_AIN1 ···························································· 0 AOUT2_OP_OS ··················································· 0
AIN1_TYPE·························································· 0 AOUT3_CODE ····················································· 0
AIN2_AS ······················································ DUST AOUT3_OP_AS ··············································DUST
AIN2_GS ····························································· 0 AOUT3_OP_GS ··················································· 0
AIN2_OS ····························································· 0 AOUT3_OP_OS ··················································· 0
FLT_AIN2 ···························································· 0 AOUT4_CODE ····················································· 0
AIN3_AS ······················································ DUST AOUT4_OP_AS ·············································DUST
AIN3_GS ····························································· 0 AOUT4_OP_GS ··················································· 0
AIN3_OS ····························································· 0 AOUT4_OP_OS ··················································· 0
FLT_AIN3 ···························································· 0 FLT_AOUT4 ························································ 0
AOUT5_CODE ····················································· 0
Primary Group: Analog I/O AOUT5_OP_AS ·············································DUST
Sub Group: Internal Analog Input AOUT5_OP_GS ··················································· 0
Rev.S
500
4GBF0632
AOUT5_OP_OS ···················································· 0 EGD_RATE ························································· 0
FLT_AOUT5 ························································· 0 EGD_RPID2 ························································ 0
AOUT6_CODE ····················································· 0 EGD_SUBNET_MSK ············································· 0
AOUT6_OP_AS ············································ DUST
AOUT6_OP_GS ···················································· 0 Primary Group: Communication
AOUT6_OP_OS ···················································· 0 Sub Group: Protection
FLT_AOUT6 ························································· 0 FLG_HB_DOWN ·················································· 0
AOUT7_CODE ····················································· 0 TIME_HB_DOWN ················································· 0
AOUT7_OP_AS ············································ DUST TIME_TL_F ························································· 0
AOUT7_OP_GS ···················································· 0
AOUT7_OP_OS ···················································· 0 Primary Group: Communication
FLT_AOUT7 ························································· 0 Sub Group: S20
COMM_TYPE ······················································ 0
Primary Group: Analog I/O FLG_FAULT ························································ 0
Sub Group: Meter D/A TL_CYC_TIME ····················································· 0
DA_LMT_OFF ······················································ 0 TL_PC_NO ·························································· 0
DA1_AS ······················································· DUST TL_SELF_NO ······················································ 0
DA1_GS ······························································ 0
DA1_OS ······························································ 0 Primary Group: Communication
DA2_AS ······················································· DUST Sub Group: Scan Receive
DA2_GS ······························································ 0 SCAN_R_ADRS ··················································· 0
DA2_OS ······························································ 0 SCAN_R_SIZE ····················································· 0
DA3_AS ······················································· DUST SCAN_RCV01_AS ··········································DUST
DA3_GS ······························································ 0 SCAN_RCV01_GS ················································ 0
DA3_OS ······························································ 0 SCAN_RCV02_AS ··········································DUST
DA4_AS ······················································· DUST SCAN_RCV02_GS ················································ 0
DA4_GS ······························································ 0 SCAN_RCV03_AS ··········································DUST
DA4_OS ······························································ 0 SCAN_RCV03_GS ················································ 0
DA5_AS ······················································· DUST SCAN_RCV04_AS ··········································DUST
DA5_GS ······························································ 0 SCAN_RCV04_GS ················································ 0
DA5_OS ······························································ 0 SCAN_RCV05_AS ··········································DUST
SCAN_RCV05_GS ················································ 0
Primary Group: Communication SCAN_RCV06_AS ··········································DUST
Sub Group: DeviceNet SCAN_RCV06_GS ················································ 0
CS_CURR_SCALE ················································ 0 SCAN_RCV07_AS ··········································DUST
CS_VOLT_SCALE················································· 0 SCAN_RCV07_GS ················································ 0
DNET_BAUD························································ 0 SCAN_RCV08_AS ··········································DUST
DNET_CODE ······················································· 0 SCAN_RCV08_GS ················································ 0
DNET_M_MACID ·················································· 0 SCAN_RCV09_AS ··········································DUST
DNET_MACID ······················································ 0 SCAN_RCV09_GS ················································ 0
DNET_OPTION ···················································· 0 SCAN_RCV10_AS ··········································DUST
DNET_PRC_GAIN················································· 0 SCAN_RCV10_GS ················································ 0
DNET_PRC_GAIN2 ··············································· 0
DNET_PRC_SCALE ·············································· 0 Primary Group: Communication
DNET_RD_AS ······················································ 0 Sub Group: Scan Write
DNET_SERIAL_NO ··············································· 0 SCAN_W_ADRS ·················································· 0
DNET_SP_SCALE ················································ 0 SCAN_W_SIZE ···················································· 0
DNET_TR_SCALE ················································ 0 SCAN_WR01_AS ···········································DUST
SCAN_WR01_GS ················································· 0
Primary Group: Communication SCAN_WR02_AS ···········································DUST
Sub Group: Drive-to-Drive Trans SCAN_WR02_GS ················································· 0
FLG_DSCAN ························································ 0 SCAN_WR03_AS ···········································DUST
TL_OP1_DT ························································· 0 SCAN_WR03_GS ················································· 0
TL_OP1_ST ························································· 0 SCAN_WR04_AS ···········································DUST
TL_OP2_DT ························································· 0 SCAN_WR04_GS ················································· 0
TL_OP3_DT ························································· 0 SCAN_WR05_GS ················································· 0
TL_OP4_DT ························································· 0 SCAN_WR06_GS ················································· 0
SCAN_WR07_GS ················································· 0
Primary Group: Communication SCAN_WR08_AS ···········································DUST
Sub Group: EGD SCAN_WR08_GS ················································· 0
EGD_CEID1 ························································· 0 SCAN_WR09_AS ···········································DUST
EGD_CGRP1 ······················································· 0 SCAN_WR09_GS ················································· 0
EGD_CGRP2 ······················································· 0 SCAN_WR10_AS ···········································DUST
EGD_CPID1 ························································· 0 SCAN_WR10_GS ················································· 0
EGD_DEST·························································· 0 SCAN_WR11_AS ··········································DUST
EGD_GATEWAY··················································· 0 SCAN_WR11_GS ················································· 0
EGD_IP ······························································· 0 SCAN_WR12_AS ··········································DUST
Rev.S
501
4GBF0632
SCAN_WR12_GS ················································· 0 OP_SFC_P ·························································· 0
SCAN_WR13_AS ·········································· DUST OP_SFC_P_1 ······················································ 0
SCAN_WR13_GS ················································· 0 OP_SFC_P_2 ······················································ 0
SCAN_WR14_AS ·········································· DUST OP_SFC_P_3 ······················································ 0
SCAN_WR14_GS ················································· 0
SCAN_WR15_AS ·········································· DUST Primary Group: Compensation
SCAN_WR15_GS ················································· 0 Sub Group: Speed Forcing
SCAN_WR16_AS ·········································· DUST ASPR_SP_FORCE ··············································· 0
SCAN_WR16_GS ················································· 0 FLG_SPFORC_P ·················································· 0
SCAN_WR17_AS ·········································· DUST
SCAN_WR17_GS ················································· 0 Primary Group: Compensation
SCAN_WR18_AS ·········································· DUST Sub Group: Torque Compensation
SCAN_WR18_GS ················································· 0 FLG_SP_R_MODL ················································ 0
SCAN_WR19_AS ·········································· DUST FLG_TCMP ························································· 0
SCAN_WR19_GS ················································· 0 FLT_SP_MODL ···················································· 0
SCAN_WR20_AS ·········································· DUST OP_LOSFUNC0_TRQ ··········································· 0
SCAN_WR20_GS ················································· 0 OP_LOSFUNC1_SP ·············································· 0
SCAN_WR24_GS ················································· 0 OP_TCMP_J_G ···················································· 0
SCAN_WR25_AS ·········································· DUST OP_TCMP_LOS ··················································· 0
SCAN_WR25_GS ················································· 0 OP_TCMP_LOS_DB ············································· 0
TCMP_ENB_BIT ··················································· 0
Primary Group: Communication
Sub Group: Serial Sequence Input Primary Group: Compensation
MSK_SERSEQ1 ··················································· 0 Sub Group: Volt Minor Control
MSK_SERSEQ2 ··················································· 0 AVCMP_I ···························································· 0
MSK_SERSEQ4 ··················································· 0 AVCMP_P ··························································· 0
CNT_GS_V1 ························································ 0
Primary Group: Communication CNT_OS_VV1 ······················································ 0
Sub Group: Serial Sequence Output CNT_OS_VW1 ····················································· 0
FLG_SSEQ_RNTD ················································ 0 CNT_OS_VU1 ······················································ 0
SSEQ_OUT_B0_AS ····································B_DUST LMT_AVCMP ······················································· 0
SSEQ_OUT_B1_AS ····································B_DUST
SSEQ_OUT_B2_AS ····································B_DUST Primary Group: Compensation
SSEQ_OUT_B3_AS ····································B_DUST Sub Group: Volt Satulation Compen
FLT_VSC ···························································· 0
Primary Group: Communication G_VSC_I ····························································· 0
Sub Group: TC-net I/O G_VSC_P ··························································· 0
TCNET_DRV1_ND ················································ 0 LMT_VSC ··························································· 0
TCNET_DRV2_ND ················································ 0 LMT_VSC_LL ······················································ 0
TCNET_HHLT_TM ················································ 0 LMT_VSC_UL ······················································ 0
TCNET_MHLT_TM ················································ 0
TCNET_MSCAN_TM ············································· 0 Primary Group: Compensation
TCNET_OE_ND ···················································· 0 Sub Group: WLi, E2 Compensation
TCNET_SYNC_ND ················································ 0 ACR_E2 ······························································ 0
ACR_WL ····························································· 0
Primary Group: Compensation FLG_E2CMP ······················································· 0
Sub Group: Simulation Forward Ctrl FLT_FLX_ACR ····················································· 0
FLG_SFC_D_SEL ················································· 0
FLT_SFC ····························································· 0 Primary Group: Control
FLT_SPSFCD······················································· 0 Sub Group: Current Control
LMT_SFC_D ························································ 0 ACR_A ······························································· 0
OP_SFC_A ·························································· 0 ACR_P ······························································· 0
OP_SFC_A_1 ······················································· 0 ACR_PI_MUL ······················································ 0
OP_SFC_A_2 ······················································· 0 ACR_W1 ····························································· 0
OP_SFC_A_3 ······················································· 0
OP_SFC_D ·························································· 0 Primary Group: Control
OP_SFC_D_1······················································· 0 Sub Group: Current Ctrl Variables
OP_SFC_D_2······················································· 0 I1_F ························································ (Variable)
OP_SFC_D_3······················································· 0 I1_F_B····················································· (Variable)
OP_SFC_J··························································· 0 I1_F_DSP ················································ (Variable)
OP_SFC_J_1 ······················································· 0 ID_F ························································ (Variable)
OP_SFC_J_2 ······················································· 0 ID_F_B ···················································· (Variable)
OP_SFC_J_3 ······················································· 0 ID_F_DSP ················································ (Variable)
Rev.S
502
4GBF0632
ID_R ······················································· (Variable) Sub Group: Run Command
IQ_F ······················································· (Variable) TIME_FOFF ························································· 0
IQ_F_B ··················································· (Variable) TIME_FON ·························································· 0
IQ_F_DSP ··············································· (Variable) TIME_RNTD ························································ 0
IQ_F_FLT ················································ (Variable)
IQ_R ······················································· (Variable) Primary Group: Control
Sub Group: Torque Control
Primary Group: Control FLG_IQ_EXTOFF ················································· 0
Sub Group: Current Limit Control FLG_IQ_EXTROFF ··············································· 0
FLG_CLC_INTLMT ················································ 0 FLG_TENSEL ······················································ 0
FLG_CLREF_SW ·················································· 0 FLG_TENS_CUT ·················································· 0
FLG_TIQ_SW ······················································· 0 FLT_T_R ····························································· 0
LMT_CL_REF······················································· 0 LMT_DIDT_N ······················································· 0
LMT_DIDT_P ······················································· 0
Primary Group: Control
Sub Group: Field Control Primary Group: Control
CS_KS_FAI·························································· 0 Sub Group: Torque Ctrl Variables
CS_SP_BASE ······················································ 0 EXT_TRQ ················································ (Variable)
FLG_SP_BASE2 ··················································· 0 T_R ························································· (Variable)
FLT_FLX ····························································· 0 T_R_OUT ················································· (Variable)
MA_V_RATE ························································ 0 TENS_R ·················································· (Variable)
MI_ID_BASE ························································ 0 TENS_R_A ··············································· (Variable)
OP_LF_FAI_HF ···················································· 0 TENS_R1 ················································· (Variable)
OP_LF_FAI_LF ····················································· 0 TENS_R2 ················································· (Variable)
OP_LF_KS_FAI ···················································· 0 TRQ_REF ················································ (Variable)
OP_SP_BASE2 ···················································· 0
Primary Group: Digital I/O
Primary Group: Control Sub Group: Bit Calibration
Sub Group: Field Ctrl Variables SGN_DI1 ···························································· 0
FL_R ······················································ (Variable) MSK_DI1 ···························································· 0
MSK_DI_EMG ······················································ 0
Primary Group: Control SGN_DI2 ···························································· 0
Sub Group: Flux Function SGN_DI_EX3 ······················································· 0
FLT_FLX_LMT······················································ 0 MSK_DI3 ···························································· 0
MA_FLUXFUNC00 ················································ 0 MSK_DI3_EMG ···················································· 0
MA_FLUXFUNC01 ················································ 0 MSK_DI4 ···························································· 0
MA_FLUXFUNC03 ················································ 0 SGN_DI_EX4 ······················································· 0
MA_FLUXFUNC05 ················································ 0 MSK_DI_EX5 ······················································· 0
MA_FLUXFUNC07 ················································ 0 MSK_DI_EX6 ······················································· 0
MA_FLUXFUNC09 ················································ 0 MSK_DI7 ···························································· 0
MA_FLUXFUNC12 ················································ 0 SGN_DI_EX10 ····················································· 0
MA_FLUXFUNC13 ················································ 0 SGN_DI_EX11 ····················································· 0
MA_FLUXFUNC14 ················································ 0 FLG_DI_DATA1_SEL ············································ 0
MA_FLUXFUNC15 ················································ 0 SGN_DI_GIF ······················································· 0
MA_FLUXFUNC16 ················································ 0 SGN_DOEX ························································· 0
MA_FLUXFUNC17 ················································ 0 SGN_DOEX2 ······················································· 0
MA_FLUXFUNC18 ················································ 0
MA_FLUXFUNC19 ················································ 0 Primary Group: Digital I/O
MA_FLUXFUNC20 ················································ 0 Sub Group: Input #1-11
TIME_DI_TRNS ···················································· 0
Primary Group: Control DI1_AS ···················································· B_DUST
Sub Group: Motor Internal Model TIME_DI1_ON ······················································ 0
MI_KCT ······························································· 0 TIME_DI1_OFF ···················································· 0
MI_L_CMP ··························································· 0 DI2_AS ···················································· B_DUST
MI_R1_SET ························································· 0 TIME_DI2_ON ······················································ 0
MI_R1_SET_FREQ ··············································· 0 TIME_DI2_OFF ···················································· 0
MI_R1_SET_LF ···················································· 0 DI3_AS ···················································· B_DUST
MI_R2_CMP························································· 0 TIME_DI3_ON ······················································ 0
MI_R2C_G ··························································· 0 TIME_DI3_OFF ···················································· 0
MI_T2 ································································· 0 DI4_AS ···················································· B_DUST
MI_T2_BIAS ························································· 0 TIME_DI4_ON ······················································ 0
MI_T75_BIAS ······················································· 0 TIME_DI4_OFF ···················································· 0
DI5_AS ···················································· B_DUST
Primary Group: Control TIME_DI5_ON ······················································ 0
Rev.S
503
4GBF0632
TIME_DI5_OFF····················································· 0 TRB_L16_OP_AS ···········································DUST
DI6_AS ·····················································B_DUST TRB_TIME_LONG ················································ 0
TIME_DI6_ON ······················································ 0
TIME_DI6_OFF····················································· 0 Primary Group: Drive Utility
DI7_AS ·····················································B_DUST Sub Group: Standard Traceback
TIME_DI7_ON ······················································ 0 TRB_FAULT_TM ·················································· 0
TIME_DI7_OFF····················································· 0 TRB_TIME_STD ··················································· 0
DI8_AS ·····················································B_DUST TRB_TRIG_MOD ·················································· 0
TIME_DI8_ON ······················································ 0 TRB01_OP_AS ··············································DUST
TIME_DI8_OFF····················································· 0 TRB02_OP_AS ··············································DUST
DI9_AS ·····················································B_DUST TRB03_OP_AS ··············································DUST
TIME_DI9_ON ······················································ 0 TRB04_OP_AS ··············································DUST
TIME_DI9_OFF····················································· 0 TRB05_OP_AS ··············································DUST
DI10_AS ···················································B_DUST TRB06_OP_AS ··············································DUST
TIME_DI10_ON ···················································· 0 TRB07_OP_AS ··············································DUST
TIME_DI10_OFF ··················································· 0 TRB08_OP_AS ··············································DUST
DI11_AS ···················································B_DUST TRB09_OP_AS ··············································DUST
TIME_DI11_ON ···················································· 0 TRB10_OP_AS ··············································DUST
TIME_DI11_OFF ··················································· 0 TRB11_OP_AS ··············································DUST
FLG_UVS2_USE··················································· 0 TRB12_OP_AS ··············································DUST
TRB13_OP_AS ··············································DUST
Primary Group: Digital I/O TRB14_OP_AS ··············································DUST
Sub Group: Output #1-12 TRB15_OP_AS ··············································DUST
DO1_AS ····················································B_DUST TRB16_OP_AS ··············································DUST
DO5_AS ···················································B_DUST TRB20_OP_AS ··············································DUST
DO10_AS ·················································B_DUST TRB25_OP_AS ··············································DUST
TRB28_OP_AS ··············································DUST
Primary Group: Drive Utility TRB29_OP_AS ··············································DUST
Sub Group: Keypad TRB30_OP_AS ··············································DUST
CR_RATE_MRH ··················································· 0 TRB31_OP_AS ··············································DUST
FLG_MRH_CLR ···················································· 0 TRB32_OP_AS ··············································DUST
FLG_STOP_MODE ··············································· 0 TRB33_OP_AS ··············································DUST
KPAD_FLGSET1··················································· 0 TRB34_OP_AS ··············································DUST
KPAD_METER1_DT ·············································· 0 TRB35_OP_AS ··············································DUST
KPAD_METER1_RG·············································· 0 TRB36_OP_AS ··············································DUST
KPAD_METER2_DT ·············································· 0 TRB37_OP_AS ··············································DUST
KPAD_METER2_RG·············································· 0 TRB38_OP_AS ··············································DUST
KPAD_METER3_DT ·············································· 0
KPAD_METER3_RG·············································· 0
KPAD_METER4_DT ·············································· 0 Primary Group: Event Counter
KPAD_METER4_RG·············································· 0 EVENT01 ················································ (Variable)
KPAD_PRIVILEGE ················································ 0 EVENT02 ················································ (Variable)
EVENT03 ················································ (Variable)
Primary Group: Drive Utility EVENT04 ················································ (Variable)
Sub Group: Long Traceback EVENT05 ················································ (Variable)
TRB_L_FAULT_TM ··············································· 0 EVENT06 ················································ (Variable)
TRB_L01_OP_AS ·········································· DUST EVENT07 ················································ (Variable)
TRB_L11_OP_AS ·········································· DUST
TRB_L12_OP_AS ·········································· DUST Primary Group: Fault Sequence
TRB_L13_OP_AS ·········································· DUST Sub Group: BLF
TRB_L14_OP_AS ·········································· DUST MSK_BLF1 ·························································· 0
TRB_L15_OP_AS ·········································· DUST
Rev.S
504
4GBF0632
Primary Group: Fault Sequence VDC_F ···················································· (Variable)
Sub Group: BLR VDC_F_FLT ············································· (Variable)
MSK_BLR1 ·························································· 0 VR_F ······················································· (Variable)
MSK_BLR2 ·························································· 0 VT_F ······················································· (Variable)
MSK_BLR3 ·························································· 0
MSK_BLR4 ·························································· 0 Primary Group: Feedbacks
MSK_BLR5 ·························································· 0 Sub Group: Motor Current
MSK_BLR6 ·························································· 0 I1_F ························································ (Variable)
MSK_BLR7 ·························································· 0 I1_F_EQUIP_150······································· (Variable)
MSK_BLR8 ·························································· 0 ID_F ························································ (Variable)
MSK_BLR9 ·························································· 0 IQ_F ························································ (Variable)
MSK_BLR10 ························································ 0 IQ_F_FLT ················································· (Variable)
MSK_BLR11 ························································ 0 IU_F ························································ (Variable)
MSK_BLR12 ························································ 0 IW_F ······················································· (Variable)
MSK_BLR13 ························································ 0
MSK_BLR14 ························································ 0 Primary Group: Feedbacks
MSK_BLR15 ························································ 0 Sub Group: Motor Speed
ABS_SP_F_FLT ········································ (Variable)
Primary Group: Fault Sequence ABS_SP_F_OUT ······································· (Variable)
Sub Group: FAULT FLT_SP_T ················································ (Variable)
MSK_HFD1 ·························································· 0 SP_F ······················································· (Variable)
MSK_HFD2 ·························································· 0 SP_F_DSP ··············································· (Variable)
SP_F_OUT ··············································· (Variable)
Primary Group: Fault Sequence SP_F_SET ··············································· (Variable)
Sub Group: UVA SP_F_SL ················································· (Variable)
MSK_UVA1 ·························································· 0 SP_FBK ··················································· (Variable)
MSK_UVA2 ·························································· 0
MSK_UVA3 ·························································· 0 Primary Group: Feedbacks
MSK_UVA4 ·························································· 0 Sub Group: Other Feedbacks
CPS ························································ (Variable)
Primary Group: Fault Sequence CPS_FLT ················································· (Variable)
Sub Group: UV M_TMP_FLT ············································· (Variable)
MSK_UV1 ···························································· 0 M_TMP_FLT_R2 ······································· (Variable)
MSK_UV2 ···························································· 0
Primary Group: Fundamental
Primary Group: Fault Sequence Sub Group: Accel/Decel Rate
Sub Group: READY CR_RATE_ACC ··················································· 0
MSK_READY1······················································ 0 CR_RATE_DEC ··················································· 0
MSK_READY2······················································ 0
Primary Group: Fundamental
Primary Group: Fault Sequence Sub Group: Drive Information
Sub Group: STPRQ INF_DBREV ························································ 0
MSK_STPRQ1······················································ 0 INF_M_TYPE ······················································· 0
MSK_STPRQ2······················································ 0 INF_SOFTVER ····················································· 0
INF_TEMPLATE_NO ············································· 0
Primary Group: Fault Sequence INF_TIME_DAY ···················································· 0
Sub Group: ALARM INF_TIME_HOUR ················································· 0
MSK_LFD1 ·························································· 0 INF_TIME_MIN ···················································· 0
MSK_LFD2 ·························································· 0 INF_TIME_MONTH ··············································· 0
INF_TIME_SEC ···················································· 0
Primary Group: Fault Sequence INF_TIME_YEAR ·················································· 0
Sub Group: SIL
MSK_SIL1 ··························································· 0 Primary Group: Fundamental
MSK_SIL2 ··························································· 0 Sub Group: Equipment Ratings
CS_DC_VOLT ······················································ 0
Primary Group: Feedbacks CS_EQUIP_CURR ················································ 0
Sub Group: Analog Input CS_EQUIP_KVA ·················································· 0
AIN1_F···················································· (Variable) CS_EQUIP_VOLT ················································· 0
AIN2_F···················································· (Variable) CS_FRAME_CURR ··············································· 0
AIN3_F···················································· (Variable) CS_FRAME_SIZE ················································· 0
CS_HCT_CURR ··················································· 0
Primary Group: Feedbacks CS_SRC_FRQ ····················································· 0
Sub Group: Equip Current FLG_WVU ··························································· 0
ID_FBK ··················································· (Variable) SYSTEM ····························································· 0
ID_FBK_B················································ (Variable)
IQ_FBK ··················································· (Variable) Primary Group: Fundamental
IQ_FBK_B ··············································· (Variable) Sub Group: Motor Ratings
CS_MOTOR_CURR ·············································· 0
Primary Group: Feedbacks CS_MOTOR_FREQ ·············································· 0
Sub Group: Equip Voltage CS_MOTOR_POLE ··············································· 0
Rev.S
505
4GBF0632
CS_MOTOR_RPM ················································ 0 Primary Group: Monitor Variables
CS_MOTOR_VOLT ··············································· 0 Sub Group: Execution Time
CS_MTR_F_BASE ················································ 0 EXEA_TIME_1 ·········································· (Variable)
CS_MTR_V_BASE ················································ 0 EXEA_TIME_BG ······································· (Variable)
CS_SP_BASE ······················································ 0 EXEA_TIME_MII ········································ (Variable)
CS_XOVER_VOLT ················································ 0 EXEM_TIME_1 ·········································· (Variable)
MA_MOTOR_KW ·················································· 0 EXEM_TIME_10 ········································ (Variable)
EXEM_TIME_100 ······································ (Variable)
Primary Group: Fundamental EXEM_TIME_BG ······································· (Variable)
Sub Group: Sensor Settings MAXA_TIME_1 ·········································· (Variable)
CS_PGCNT ························································· 0 MAXA_TIME_BG ······································· (Variable)
CS_PGOUT ························································· 0 MAXA_TIME_MII ······································· (Variable)
CS_RES_DGFLT ·················································· 0 MAXM_TIME_1 ········································· (Variable)
CS_RES_TYPE ···················································· 0 MAXM_TIME_10 ······································· (Variable)
FLG_DIFF_PG······················································ 0 MAXM_TIME_100 ······································ (Variable)
FLG_PGOUT_PPR ················································ 0 MAXM_TIME_BG ······································ (Variable)
FLG_RES_EX4 ····················································· 0
FLG_SNGPG_TYPE ·············································· 0 Primary Group: Monitor Variables
FLT_QPG ···························································· 0 Sub Group: Flux Reference
OP_RCMODE1 ····················································· 0 FL_R ······················································· (Variable)
OP_RCMODE2 ····················································· 0 FLX_REF ················································· (Variable)
OP_RDCMP_G1 ··················································· 0 G_VSC_FLX ············································· (Variable)
OP_RDCMP_G2 ··················································· 0 KS_FAI_T ················································ (Variable)
OP_RDCMP_P1 ··················································· 0
OP_RDCMP_P2 ··················································· 0 Primary Group: Monitor Variables
Sub Group: Frequency
Primary Group: Monitor Variables ABS_FREQ ·············································· (Variable)
Sub Group: Current Control FREQ ······················································ (Variable)
I1MAX ····················································· (Variable) FSOUT ···················································· (Variable)
ID_FORCE··············································· (Variable) QO ·························································· (Variable)
ID_FORCE_G··········································· (Variable) QOCMP_I ················································ (Variable)
ID_FUNC ················································· (Variable) QOCMP_V ··············································· (Variable)
ID_R ······················································· (Variable)
ID_R1F ··················································· (Variable) Primary Group: Monitor Variables
ID_REF ··················································· (Variable) Sub Group: Jog Reference
ID_REF_CNV ··········································· (Variable) JOG_R ···················································· (Variable)
IQ_LMT_EXT ··········································· (Variable)
IQ_LMT_EXT_INV ····································· (Variable) Primary Group: Monitor Variables
IQ_R ······················································· (Variable) Sub Group: Jog Reference
IQ_R_NORM ············································ (Variable) DT_MT_CNT ············································ (Variable)
IQ_REF ··················································· (Variable) PG_POS ·················································· (Variable)
IQ_REF_B ··············································· (Variable) PG_POS_CNT_MARK ································ (Variable)
IQMAX4_FLT ··········································· (Variable) PG_POS_FLATCH ····································· (Variable)
IQMAX4_T ··············································· (Variable) PG_POS_RLATCH ···································· (Variable)
REF_IU ··················································· (Variable) RESCMP_POS ········································· (Variable)
REF_IV ··················································· (Variable)
REF_IW ·················································· (Variable) Primary Group: Monitor Variables
Sub Group: Motor Power
Primary Group: Monitor Variables MOT_POW_G ··········································· (Variable)
Sub Group: Distribution Control MOT_POWER··········································· (Variable)
DT_GD2_RAT ·········································· (Variable) VI_POWER ·············································· (Variable)
DT_IMP_REF ··········································· (Variable) MOT_KWH_SAVE ····································· (Variable)
DT_IMP_T ··············································· (Variable)
DT_LB_CMP_EX ······································ (Variable) Primary Group: Monitor Variables
DT_LB_CMP_IN ······································· (Variable) Sub Group: Others
DT_LB_GAIN ··········································· (Variable) BG_A_CNT ·············································· (Variable)
DT_LB_T_EX ··········································· (Variable) CHGSYS ·················································· (Variable)
DT_LB_T_TEST········································ (Variable) COMB1_OUT ············································ (Variable)
DT_LB_TST_G ········································· (Variable) COMB2_OUT ············································ (Variable)
DT_LD_TRQ ············································ (Variable) COMB3_OUT ············································ (Variable)
DT_MT_TRQ ············································ (Variable) COMB4_OUT ············································ (Variable)
DT_RD_SEQ ············································ (Variable) INF_CHKSUM_FBAK ································· (Variable)
DT_WR_SEQ ··········································· (Variable) INF_CHKSUM_FRUN ································· (Variable)
ISB_CUR_ERR ········································· (Variable)
Primary Group: Monitor Variables ISB_SOFTVER ·········································· (Variable)
Sub Group: Drooping MI_T2_T ·················································· (Variable)
DROOP_GAIN_T ······································ (Variable) MI_T2_T2 ················································· (Variable)
DROOP_INBUF ········································ (Variable) MIIA_CNT ················································ (Variable)
DROOP_R ··············································· (Variable) OL20CHK_REC ········································· (Variable)
OLCHK_REC ············································ (Variable)
Rev.S
506
4GBF0632
QCMP_IQ_I ············································· (Variable) DI_EX7 ···················································· (Variable)
RESCUE_MODE······································· (Variable) HFD1_INP ················································ (Variable)
SFC_A_T················································· (Variable) HFD2_INP ················································ (Variable)
SFC_D_T ················································ (Variable) KPAD_DATA ············································ (Variable)
SFC_DATA ·············································· (Variable) LFD1_INP ················································ (Variable)
SFC_J_T ················································· (Variable) LFD2_INP ················································ (Variable)
SFC_P_T················································· (Variable) READY1_INP ············································ (Variable)
SFC_SP_RVS ·········································· (Variable) READY2_INP ············································ (Variable)
SFC_T_R ················································ (Variable) SERSEQDATA1 ········································ (Variable)
SIM_LD_TRQ_T ······································· (Variable) SERSEQDATA2 ········································ (Variable)
SIM_LOSS1 ············································· (Variable) SIL1_INP ················································· (Variable)
SIM_LOSS2 ············································· (Variable) STPRQ1_INP ············································ (Variable)
SIM_MODE_T ·········································· (Variable) STPRQ2_INP ············································ (Variable)
SIM_SP ··················································· (Variable) UV1_INP ·················································· (Variable)
SIM_SP_AS ············································· (Variable) UV2_INP ·················································· (Variable)
SIM_SP1 ················································· (Variable) UVA1_INP ················································ (Variable)
SIM_T_R ················································· (Variable) UVA2_INP ················································ (Variable)
T1A_CNT ················································ (Variable) UVA3_INP ················································ (Variable)
T1M_CNT ················································ (Variable) UVA4_INP ················································ (Variable)
TMIIM_CNT ············································· (Variable)
Primary Group: Monitor Variables
Primary Group: Monitor Variables Sub Group: Sequence Output
Sub Group: Sensorless BLR1_OUT ··············································· (Variable)
ABS_FREQ_DFDT ···································· (Variable) BLR2_OUT ··············································· (Variable)
ABS_WOC ··············································· (Variable) BLR3_OUT ··············································· (Variable)
AD_MAXC ··············································· (Variable) BLR4_OUT ··············································· (Variable)
E2_FBK··················································· (Variable) BLR5_OUT ··············································· (Variable)
E2_REF ·················································· (Variable) BLR6_OUT ··············································· (Variable)
E2D ························································ (Variable) BLR7_OUT ··············································· (Variable)
E2Q ························································ (Variable) BLR8_OUT ··············································· (Variable)
FOUT······················································ (Variable) BLR9_OUT ··············································· (Variable)
FREQ_DFDT ············································ (Variable) BLR10_OUT ············································· (Variable)
IM_AVE ··················································· (Variable) BLR11_OUT ············································· (Variable)
IM_NUMBER ············································ (Variable) BLR12_OUT ············································· (Variable)
SL_ID_BOOST ········································· (Variable) BLR13_OUT ············································· (Variable)
SL_MON_SP ············································ (Variable) BLR14_OUT ············································· (Variable)
SL_MON_SP_FLT ····································· (Variable) BLR15_OUT ············································· (Variable)
THETA_T_CMP ········································ (Variable) BR_OUT ·················································· (Variable)
V_DEV ···················································· (Variable) HFD1_OUT ·············································· (Variable)
WOC ······················································ (Variable) HFD2_OUT ·············································· (Variable)
WOCD ···················································· (Variable) LFD1_OUT ··············································· (Variable)
LFD2_OUT ··············································· (Variable)
Primary Group: Monitor Variables READY1_OUT ·········································· (Variable)
Sub Group: Sequence Input READY2_OUT ·········································· (Variable)
BLF1_INP ················································ (Variable) SIL1_OUT ················································ (Variable)
BLR1_INP················································ (Variable) SSEQ_OUT1 ············································ (Variable)
BLR2_INP················································ (Variable) SSEQ_OUT2 ············································ (Variable)
BLR3_INP················································ (Variable) STPRQ1_OUT ·········································· (Variable)
BLR4_INP················································ (Variable) STPRQ2_OUT ·········································· (Variable)
BLR5_INP················································ (Variable) UV1_OUT ················································ (Variable)
BLR6_INP················································ (Variable) UV2_OUT ················································ (Variable)
BLR7_INP················································ (Variable) UVA1_OUT ·············································· (Variable)
BLR10_INP ·············································· (Variable) UVA4_OUT ·············································· (Variable)
BLR11_INP ·············································· (Variable)
BLR12_INP ·············································· (Variable) Primary Group: Monitor Variables
BLR13_INP ·············································· (Variable) Sub Group: Speed Control
BLR14_INP ·············································· (Variable) ABS_SP_R ··············································· (Variable)
BLR15_INP ·············································· (Variable) ASPR_A_T ··············································· (Variable)
BR_INP ··················································· (Variable) ASPR_AT_T ············································· (Variable)
DI_DATA1 ··············································· (Variable) ASPR_G_NO ············································ (Variable)
DI_DATA11 ·············································· (Variable) ASPR_GAIN_EXT ······································ (Variable)
DI_DATA2 ··············································· (Variable) ASPR_I_T ················································ (Variable)
DI_DATA5 ··············································· (Variable) ASPR_P_T ··············································· (Variable)
DI_DATA6 ··············································· (Variable) ASPROUT_FLT ········································· (Variable)
DI_EX1 ··················································· (Variable) ASPROUT_FLT_RVS ································· (Variable)
DI_EX2 ··················································· (Variable) ASR_J0_T ················································ (Variable)
DI_EX3 ··················································· (Variable) DLT_SP ··················································· (Variable)
DI_EX4 ··················································· (Variable) FTC_SP_R ··············································· (Variable)
Rev.S
507
4GBF0632
JOG_R ···················································· (Variable) FLG_RATE_READY ·············································· 0
SP_MRH ················································· (Variable) MA_BR_CURR ····················································· 0
SP_R ······················································ (Variable) MA_BR_SPEED ··················································· 0
SP_R_MEM ············································· (Variable) MSK_BR ····························································· 0
SP_RB ···················································· (Variable) TIME_BR ···························································· 0
SP_REF ·················································· (Variable)
SP_REF_AIN1 ·········································· (Variable) Primary Group: Protection
SP_REF_DSP ·········································· (Variable) Sub Group: Contactor
SP_REF_PID ··········································· (Variable) FLG_PRE_CTT_TYPE ··········································· 0
SP_REF1 ················································ (Variable) TIME_CTT ··························································· 0
SP_REF2 ················································ (Variable)
SP_REFA1 ·············································· (Variable) Primary Group: Protection
SP_REFA2 ·············································· (Variable) Sub Group: Ctrl Power Fault Det
SP_REFA2_D··········································· (Variable) CP_PSF ······························································ 0
SP_REFA2_G ·········································· (Variable) FLG_CPSF_MODE ··············································· 0
SP_REFA3 ·············································· (Variable) FLG_UPS_USE ···················································· 0
SP_T ······················································ (Variable)
Primary Group: Protection
Primary Group: Monitor Variables Sub Group: Current/Torque Limit
Sub Group: Torque Compensation LMT_I1 ······························································· 0
TCMP_EXT ·············································· (Variable) LMT_I1_LOWF ····················································· 0
TCMP_FFD ·············································· (Variable) LMT_I1_LOWF_H ················································· 0
TCMP_J ·················································· (Variable) LMT_I1_LOWF_L ················································· 0
TCMP_J_G_T··········································· (Variable) LMT_IQ_BAS ······················································· 0
TCMP_JCMP ··········································· (Variable) LMT_IQ_EXTOFF ················································· 0
TCMP_LOS_DB_T ···································· (Variable) LMT_IQ_INV ························································ 0
TCMP_LOS_T ·········································· (Variable) LMT_IQ_TOP ······················································· 0
TCMP_LOSCMP ······································· (Variable) LMT_SP_BASE ···················································· 0
TCMP_SP_LOS ········································ (Variable) LMT_TRQ ··························································· 0
LMT_TRQ_INV ····················································· 0
Primary Group: Monitor Variables LMT_VDC_CL_H ·················································· 0
Sub Group: Torque Reference LMT_VDC_CL_H2 ················································ 0
EXT_TENS_GAIN ····································· (Variable) LMT_VDC_CL_L ·················································· 0
EXT_TRQ ················································ (Variable) LMT_VDC_CL_L2 ················································· 0
FLT_T_R_T·············································· (Variable) RMS_STF_LVL ···················································· 0
LMT_TRQ_INV_T4 ···································· (Variable) TIME_CL ····························································· 0
LMT_TRQ_T4··········································· (Variable) TIME_LOWF_OFF ················································ 0
T_R ························································ (Variable) TIME_STF_INT ···················································· 0
T_R_MAX4 ·············································· (Variable) TIME_STF_ON ····················································· 0
T_R_MAX4_NEG ······································ (Variable)
T_R_OUT ················································ (Variable) Primary Group: Protection
TENS_R ·················································· (Variable) Sub Group: Fan
TENS_R_A ·············································· (Variable) TIME_CFAN ························································ 0
TENS_R1 ················································ (Variable) TIME_MFAN ························································ 0
TENS_R2 ················································ (Variable)
TRQ_REF ················································ (Variable) Primary Group: Protection
Sub Group: Gate Setting
Primary Group: Monitor Variables CS_F_PWM························································· 0
Sub Group: Voltage Reference
E1_R ······················································ (Variable) Primary Group: Protection
E1_R_T ··················································· (Variable) Sub Group: Ground Protection
E1_R_V··················································· (Variable) CP_GDV ····························································· 0
ED_R ······················································ (Variable) CP_GDV_A ························································· 0
EDCMP ··················································· (Variable) FLT_GDV ···························································· 0
EQ_R······················································ (Variable) TIME_GR ···························································· 0
EQCMP ··················································· (Variable)
LMT_E_T················································· (Variable) Primary Group: Protection
VU_REF ·················································· (Variable) Sub Group: Other
VV_REF ·················································· (Variable) CP_CURCHK ······················································· 0
VW_REF ················································· (Variable) FLG_EXRST ························································ 0
FLG_TL_F_QSTOP ··············································· 0
Primary Group: Others TIME_AIN_FAULT ················································ 0
Sub Group: - TIME_DS ···························································· 0
TIME_SPA1 ························································· 0
TIME_SPA2 ························································· 0 Primary Group: Protection
TIME_SPA3 ························································· 0 Sub Group: Over Current/Voltage
TIME_SPA4 ························································· 0 CP_OCA ····························································· 0
CP_OV ······························································· 0
Sub Group: Brake Setting Primary Group: Protection
Rev.S
508
4GBF0632
Sub Group: Overheat OP_ASPR_AT_3 ·················································· 0
CP_CELL_OH ······················································ 0 OP_ASPR_P_1 ···················································· 0
CP_OH_TR ·························································· 0 OP_ASPR_P_2 ···················································· 0
CP_OH_TR_A ······················································ 0 OP_ASPR_P_3 ···················································· 0
CP_MOTOR_OH··················································· 0 OP_ASPR_W1_1 ·················································· 0
FLG_MTMP_SEL ·················································· 0 OP_ASPR_W1_2 ·················································· 0
OP_ASPR_W1_3 ·················································· 0
Primary Group: Protection OP_FLT_SFC_1 ··················································· 0
Sub Group: Overload OP_FLT_SFC_2 ··················································· 0
CP_RMS_20 ························································ 0 OP_FLT_SFC_3 ··················································· 0
CP_RMS_5 ·························································· 0 OP_FLT_SP_1 ····················································· 0
CP_RMS_A·························································· 0 OP_FLT_SP_2 ····················································· 0
CP_RMS_A20 ······················································ 0 OP_FLT_SP_3 ····················································· 0
CP_RMS_CNV20 ·················································· 0 OP_FLT_SPSFCD_1 ············································· 0
CP_RMS_CNV5···················································· 0 OP_FLT_SPSFCD_2 ············································· 0
CP_RMS_CNV20A ················································ 0 OP_FLT_SPSFCD_3 ············································· 0
CP_RMS_CNV5A·················································· 0 OP_FLT_T_R_1 ··················································· 0
OP_FLT_T_R_2 ··················································· 0
Primary Group: Protection OP_FLT_T_R_3 ··················································· 0
Sub Group: Phase Loss OP_RMFC_P_1 ···················································· 0
CP_VAC_PH_LOSS ·············································· 0 OP_RMFC_P_2 ···················································· 0
CP_VINV_PH_LOSS ············································· 0 OP_RMFC_P_3 ···················································· 0
OP_RMFC_W1_1 ················································· 0
Primary Group: Protection OP_RMFC_W1_2 ················································· 0
Sub Group: Speed Limit/Protection OP_RMFC_W1_3 ················································· 0
CP_OSP······························································ 0
CP_OSS_FO ························································ 0 Primary Group: Special Control
LMT_SP_F··························································· 0 Sub Group: DC Brake
LMT_SP_INV ······················································· 0 FLG_SL_DB ························································ 0
LMT_SP_L ··························································· 0 SL_I_DB ····························································· 0
LMT_SP_R ·························································· 0
MA_ZERO_SP······················································ 0 Primary Group: Special Control
OP_SP_DBAND···················································· 0 Sub Group: Drooping
CR_DROOP_BAND ·············································· 0
Primary Group: Protection CR_DROOP_GAIN ··············································· 0
Sub Group: Speed Reference Fault Det CR_SP_DROOP_H ··············································· 0
CP_SP_LOST ······················································ 0 CR_SP_DROOP_L ··············································· 0
FLG_SP_LOST_EN ··············································· 0 FLG_LD_DROOP ················································· 0
FLT_DROOP ······················································· 0
Sub Group: Speed Sensor Fault Det Primary Group: Special Control
CP_SP_ERR ························································ 0 Sub Group: Jump Frequencies
FLG_SP_ERR_SL ················································· 0 CR_SP_JP_BAND1 ·············································· 0
FLT_SP_ERR ······················································· 0 CR_SP_JP_BAND2 ·············································· 0
TIME_SP_ERR_SL················································ 0 CR_SP_JP_BAND3 ·············································· 0
TIME_SP_ERR2 ··················································· 0 CR_SP_JP1 ························································ 0
CR_SP_JP2 ························································ 0
Primary Group: Protection CR_SP_JP3 ························································ 0
Sub Group: Under Voltage FLG_SP_R_JP ····················································· 0
CP_UVA ······························································ 0
CS_VAC_MIN······················································· 0 Primary Group: Special Control
Sub Group: Low Speed Det
Primary Group: Simulation Mode CR_SP_LOW ······················································· 0
Sub Group: - CR_SP_LOW_BAND ············································· 0
SIM_FLT_IDIQ······················································ 0
SIM_J0································································ 0 Primary Group: Special Control
SIM_LD_TRQ ······················································· 0 Sub Group: Others
SIM_LOSS ··························································· 0 CR_DLT_Q ·························································· 0
SIM_LOSS_W ······················································ 0 FLG_FE ······························································ 0
SIM_LOSS_W2····················································· 0 FLG_FLD_ERR ···················································· 0
SIM_MODE ·························································· 0 FLG_RNTD_FER ·················································· 0
SIM_SPD_SEL ····················································· 0 GAIN_QCMP_I ····················································· 0
GAIN_QCMP_V ···················································· 0
Primary Group: Special Control LMT_E ································································ 0
Sub Group: ASPR Gain Group MI_DCMP_G ······················································· 0
OP_ASPR_A_1 ···················································· 0 OP_DNDT_CMP_G ··············································· 0
OP_ASPR_A_2 ···················································· 0 OP_DNDT_POINT ················································ 0
OP_ASPR_A_3 ···················································· 0 OP_OS_DNDT ····················································· 0
OP_ASPR_AT_1 ··················································· 0 OP_OS_SP ························································· 0
OP_ASPR_AT_2 ··················································· 0
Rev.S
509
4GBF0632
Primary Group: Special Control
Sub Group: Over Load Softstall Primary Group: Special Control
CR_SOFT_STALL ················································· 0 Sub Group: Sensorless Multi-Motor
FLG_SOFT_STALL ··············································· 0 CP_N_IM_LL ······················································· 0
CS_DERATE ························································ 0 FLG_MAXC_USE ················································· 0
FLG_SL_ID_SET ·················································· 0
Primary Group: Special Control FLG_SL_IM_AVE ················································· 0
Sub Group: Restart Setting FLG_SL_IM_N_DET ·············································· 0
CP_PSFRCV_TIME ··············································· 0 FLG_SL_MON_SP_N ············································ 0
FLG_PSFRCV ······················································ 0 FLG_SL_SP_EST ················································· 0
FLG_RESTART ···················································· 0 MI_FBK_G ·························································· 0
TIME_CEMFOFF ·················································· 0 MI_G_E2 ····························································· 0
MI_G_E2_R2 ······················································· 0
Primary Group: Special Control MI_KCT ······························································ 0
Sub Group: Sensorless MI_L_CMP ·························································· 0
CP_N_IM_LL ························································ 0 MI_R1_SET ························································· 0
FLG_SL_IM_AVE ·················································· 0 MI_R1_SET_FREQ ··············································· 0
FLG_SL_IM_N_DET ·············································· 0 MI_R1_SET_LF ···················································· 0
FLG_SL_MON_SP_N ············································ 0 SL_AVR_I ··························································· 0
FLG_SL_SP_CHK ················································· 0 SL_AVR_P ·························································· 0
FLG_SL_SP_EST ················································· 0 SL_DE2_BIAS······················································ 0
FSEEK_LOW_FREQ ············································· 0 SL_DE2_G ·························································· 0
MI_FBK_G ··························································· 0 SL_DE2_G_LMT ·················································· 0
MI_G_E2 ····························································· 0 SL_DFDT_GAIN ··················································· 0
MI_G_E2_R2························································ 0 SL_DFDT_SP_H ·················································· 0
MI_KCT ······························································· 0 SL_DFDT_SP_H2 ················································· 0
MI_L_CMP ··························································· 0 SL_DFDT_SP_L ··················································· 0
MI_R1_SET ························································· 0 SL_DFDT_SP_L2 ················································· 0
MI_R1_SET_FREQ ··············································· 0 SL_DFDTLMT ······················································ 0
MI_R1_SET_LF ···················································· 0 SL_E2_OS ·························································· 0
SL_CP_SP_ERR ·················································· 0 SL_E2D_PSF ······················································· 0
SL_DFDT_GAIN ··················································· 0 SL_E2LMT_BASE ················································· 0
SL_DFDT_SP_H ··················································· 0 SL_E2LMT_GS ···················································· 0
SL_DFDT_SP_H2 ················································· 0 SL_E2LMT_OS ···················································· 0
SL_DFDT_SP_L ··················································· 0 SL_E2RC_BASE ·················································· 0
SL_DFDT_SP_L2 ·················································· 0 SL_E2RC_GS ······················································ 0
SL_DFDTLMT ······················································ 0 SL_E2RC_OS ······················································ 0
SL_E2_OS ··························································· 0 SL_FLT_AIO ························································ 0
SL_E2D_PSF ······················································· 0 SL_FLT_DE2 ······················································· 0
SL_E2LMT_BASE ················································· 0 SL_FLT_E2D_PSF ················································ 0
SL_E2LMT_GS ····················································· 0 SL_FLT_E2Q ······················································· 0
SL_E2LMT_OS ····················································· 0 SL_FLT_EDQFBK ················································· 0
SL_E2RC_BASE ··················································· 0 SL_FLT_FS_R ····················································· 0
SL_E2RC_GS ······················································ 0 SL_FLT_IQF ························································ 0
SL_E2RC_OS ······················································ 0 SL_FLT_IQMAX ··················································· 0
SL_FLT_E2D_PSF ················································ 0 SL_FLT_MON_SP ················································ 0
SL_FLT_E2Q ······················································· 0 SL_FS_R_CMP_G ················································ 0
SL_FLT_EDQFBK ················································· 0 SL_I_DB ····························································· 0
SL_FLT_FS_R ······················································ 0 SL_ID_FORCE_LF ················································ 0
SL_FLT_IQF ························································ 0 SL_FLT_N ··························································· 0
SL_FLT_IQMAX ···················································· 0 SL_IM_D_TH ······················································· 0
SL_FLT_MON_SP ················································· 0 SL_KCW_BASE ··················································· 0
SL_FLT_N ··························································· 0 SL_KCW_I ·························································· 0
SL_FLT_WOCD ···················································· 0 SL_KCW_I_PSF ··················································· 0
SL_FS_R_CMP_G ················································ 0 SL_KCW_P ························································· 0
SL_I_DB ······························································ 0 SL_KCW_P_PSF ·················································· 0
SL_ID_FORCE_LF ················································ 0 SL_LMT_IQMAX_I ················································ 0
SL_IM_D_TH························································ 0 SL_LMT_WOC_L ·················································· 0
SL_KCW_BASE ···················································· 0 TIME_LMT_WOC ················································· 0
SL_KCW_I ··························································· 0
SL_KCW_I_PSF ··················································· 0 Primary Group: Special Control
SL_KCW_P ·························································· 0 Sub Group: Shared Motion
SL_KCW_P_PSF ·················································· 0 DATA_STS ·························································· 0
SL_LMT_IQMAX_I················································· 0 FLG_CHGSYS ····················································· 0
SL_LMT_WOC_L ·················································· 0
SL_SP_CHK_LVL ················································· 0 Primary Group: Special Control
SL_SP_RESTART ················································· 0 Sub Group: Speed Reach/Trace Set
SL_TIME_SP_ERR················································ 0 CR_SP_RCH ······················································· 0
SL_WOCD_DISCH ················································ 0 CR_SP_RCH_BAND ············································· 0
TIME_LMT_WOC ·················································· 0 CR_SP_RCH2 ····················································· 0
Rev.S
510
4GBF0632
CR_SP_RCH3 ······················································ 0 CR_DEC_CHG5 ··················································· 0
FLG_SP_RCH ······················································ 0 CR_DEC_CHG6 ··················································· 0
TIME_SP_RCH ····················································· 0
Primary Group: Speed Reference
Primary Group: Special Control Sub Group: Accel/Decel Rate
Sub Group: TQZ Function CR_RATE_ACC ··················································· 0
TIME_MVD ·························································· 0 CR_RATE_DEC ··················································· 0
FLG_TIME_RATE ················································· 0
Primary Group: Speed Control TIME_RATE ························································ 0
Sub Group: ASPR TIME_ST ····························································· 0
ASPR_A ······························································ 0
ASPR_AT ···························································· 0 Primary Group: Speed Reference
ASPR_P ······························································ 0 Sub Group: Emergency Quick Stop
ASPR_W1 ··························································· 0 CR_RATE_QSTOP ··············································· 0
FLG_ASR ···························································· 0 FLG_DT_LMT ······················································ 0
FLG_SP_REF_PG················································· 0 FLG_RATE_QSTOP ·············································· 0
FLT_PPIEO·························································· 0 QS_PGAIN ·························································· 0
FLT_SP ······························································· 0 TIME_QSTOP ······················································ 0
LMT_ASPRG························································ 0
Primary Group: Speed Reference
Primary Group: Speed Control Sub Group: Jog
Sub Group: ASR CR_JOG_FJ1S ···················································· 0
ASR_ERR_MAX ··················································· 0 CR_JOG_FJ2S ···················································· 0
ASR_ERR_MIN ···················································· 0 CR_JOG_FJ3S ···················································· 0
ASR_I ································································· 0 CR_JOG_RJ1S ···················································· 0
ASR_J0 ······························································· 0 CR_JOG_RJ2S ···················································· 0
ASR_P_CMD ······················································· 0 CR_JOG_RJ3S ···················································· 0
ASR_P_FBK ························································ 0 OP_JOG_SP01 ···················································· 0
ASR_W0 ····························································· 0 OP_JOG_SP02 ···················································· 0
FLG_ASR ···························································· 0 OP_JOG_SP03 ···················································· 0
FLG_ASR_J0 ······················································· 0 OP_JOG_SP04 ···················································· 0
FLT_SP ······························································· 0 OP_JOG_SP05 ···················································· 0
OP_JOG_SP06 ···················································· 0
Primary Group: Speed Control OP_JOG_SP07 ···················································· 0
Sub Group: Monitor Variables OP_JOG_SP08 ···················································· 0
ASPROUT_FLT ········································ (Variable) OP_JOG_SP09 ···················································· 0
DLT_SP ·················································· (Variable) OP_JOG_SP10 ···················································· 0
SP_F ······················································ (Variable) OP_JOG_SP11 ···················································· 0
SP_R ······················································ (Variable) OP_JOG_SP12 ···················································· 0
OP_JOG_SP13 ···················································· 0
Primary Group: Speed Control OP_JOG_SP14 ···················································· 0
Sub Group: RMFC OP_JOG_SP15
FLG_DR_OUT ······················································ 0
FLG_ES_RMFC ···················································· 0 Primary Group: Speed Reference
FLG_RMFC·························································· 0 Sub Group: S Curve
RMFC_JM ··························································· 0 FLT_SP_R ·························································· 0
RMFC_P ····························································· 0 CR_STYP_EN ······················································ 0
RMFC_W1 ··························································· 0 CR_STYP_ST ······················································ 0
SP_PPI_PLG························································ 0
Primary Group: Test Mode
Primary Group: Speed Reference Sub Group: Common
Sub Group: Accel/Decel #2-6 DATA_TEST ············································· (Variable)
CR_RATE_ACC2 ·················································· 0 TEST_MODE ············································ (Variable)
CR_RATE_ACC3 ·················································· 0 TEST_SEL ··············································· (Variable)
CR_RATE_ACC4 ·················································· 0 TEST1_REQ ············································· (Variable)
CR_RATE_CHG2 ·················································· 0 TEST4_REQ ············································· (Variable)
CR_RATE_DEC2 ·················································· 0 TEST9_REQ ············································· (Variable)
CR_RATE_DEC3 ·················································· 0 TIME_TEST ·············································· (Variable)
CR_RATE_DEC4 ·················································· 0
CR_RATE_DEC5 ·················································· 0 Primary Group: Test Mode
CR_RATE_DEC6 ·················································· 0 Sub Group: Test1
CR_DEC_CHG2 ··················································· 0 TEST1_REQ ············································· (Variable)
CR_DEC_CHG3 ··················································· 0
CR_DEC_CHG4 ··················································· 0 Primary Group: Test Mode
Rev.S
511
4GBF0632
Sub Group: Test2 Sub Group: V/f Pattern Select
ID_TEST26 ·············································· (Variable) CS_VF_MODE ····················································· 0
IMPACT_TEST25 ······································ (Variable) VF_CURVE_GAIN ················································ 0
SP_TEST22 ············································· (Variable) CR_FP1 ······························································ 0
SP_TEST29 ············································· (Variable) CR_FP2 ······························································ 0
TEST2_REQ ············································ (Variable) CR_FP3 ······························································ 0
TEST26_ID_BAS ······································ (Variable) CR_FP4 ······························································ 0
TEST26_QO ············································ (Variable) CR_FP5 ······························································ 0
CR_VP1 ······························································ 0
Primary Group: Test Mode CR_VP2 ······························································ 0
Sub Group: Test3 CR_VP3 ······························································ 0
ID_TEST35 ·············································· (Variable) CR_VP4 ······························································ 0
TEST3_REQ ············································ (Variable) CR_VP5 ······························································ 0
TEST31_F_SET ········································ (Variable)
TEST34_ED_R ········································· (Variable) Primary Group: V/f Control
TEST34_EQ_R ········································· (Variable) Sub Group: Start Compensation
TEST34_F_SET ········································ (Variable) VF_LSP_VBST ····················································· 0
TEST34_I1_PF ········································· (Variable) VF_LSP_VBSTSP ················································· 0
TEST34_I1_R ··········································· (Variable) VF_SP_TRQBST ·················································· 0
TEST34_RATE_ED_R ······························· (Variable) VF_TRQBST_GAIN ··············································· 0
TEST34_RATE_EQ_R ······························· (Variable) LMT_SP_L ·························································· 0
TEST34_RATE_I1_R ································· (Variable) TIME_ST ····························································· 0
TEST36_ID_BAS ······································ (Variable)
Primary Group: V/f Control
Primary Group: Test Mode Sub Group: Slip Compensation
Sub Group: Test4 VF_WSCMP_EN ·················································· 0
TEST4_REQ ············································ (Variable) CS_MOTOR_RPM ················································ 0
CS_MOTOR_POLE ··············································· 0
Primary Group: Test Mode
Sub Group: Test5 Primary Group: V/f Control
TEST5_REQ ············································ (Variable) Sub Group: Flying Restart Setting
FLG_RESTART ···················································· 0
Primary Group: Test Mode SL_SP_RESTART ················································ 0
Sub Group: Test6
TEST6_REQ ············································ (Variable) Primary Group: V/f Control
Sub Group: Voltage Reference
Primary Group: Test Mode VF_E1_REF ························································ 0
Sub Group: Test7 VF_EDD ····························································· 0
TEST7_REQ ············································ (Variable) VF_EQQ ····························································· 0
Primary Group: Test Mode Primary Group: V/f Control

Sub Group: Test8 Sub Group: Frequency
TEST8_REQ ············································ (Variable) F_P ···································································· 0
WOC ·································································· 0
Primary Group: Test Mode VF_WS ······························································· 0
Sub Group: Test9
TEST9_REQ ············································ (Variable)
Primary Group: V/f Control
Rev.S
512
4GBF0632
4.3 List of Set Values Added in Firmware of Each Version

Some of the set values are added due to the version up of the firmware. The added set values are shown in the list here.
Refer to the purview for the reference values of each set value.
Firmware Firmware
Set Value Symbol Set Value Symbol
Number Number
A4FA02A LVL_PLL_EDLOW A4FA09A CP_REC_F
LVL_PLL_EDWAIT TIME_REC_F
LVL_PLL_IDERR LVL_VDC_CCDRDY
LVL_PLL_OV TIME_PN_MODSW
LVL_VFBK_DLTQ EQ_GS_FBK0_OVD
TIME_PLL_EDWAIT FLG_OV_RTRY_MOD
A4FA02B LVL_PLL_EDLOW VF_FLT_ID_F
LVL_PLL_EDWAIT VF_DLT_ID_GAIN
LVL_PLL_IDERR VF_LMT_WS_GAIN
LVL_PLL_OV VF_WS_ADJ2
LVL_VFBK_DLTQ
TIME_PLL_EDWAIT A4FA09B LVL_UVA_PRECHG
A4FA03A OP_CFN_P A4FA10A PM_PH

OP_CFN_W1 MS_QR_TRUEDAT
OP_CFN_A MS_FLG_ZPLS
OP_CFN_AT MS_VL_A
FIN_TMP_DBAND MS_OP_VL_A_1
CP_CELL_OH_A MS_OP_VL_A_2
CP_UV MS_OP_VL_A_3
CP_UV_SIL MS_VL_AT
OP_XFMR_VOLT MS_OP_VL_AT_1
TIME_VINV_PH_LOSS MS_OP_VL_AT_2
A4FA04A CP_UVA_SIL MS_OP_VL_AT_3
CP_RMS_C_INV FUNC_GET1_AS
OP_CFN_RATE FUNC_GET2_AS
FLG_PN_IREF FUNC_GET3_AS
FLG_WLC_IREF FUNC_GET4_AS
FUNC_PUT1_AS
A4FA04B SIM_MSK_DINTG FUNC_PUT2_AS
OP_CFN_SPL FUNC_PUT3_AS
LVL_PLL_OC FUNC_PUT4_AS
A4FA05A LVL_VAC_DISTB MS_FLG_TRUEDAT
TIME_DISTB_RTRY MS_DLT_GAIN
GAIN_QCMP_ICNV LVL_DISTB_SPLOW
GAIN_QCMP_CPLL OP_CFN_CELL_OH
GAIN_QCMP_VCNV OP_CFN_TR_OH
A4FA05B LVL_PLL_UVD TIME_CFN_MAX
TIME_H_OCA_DET FLG_AIN_CUR
LVL_PLL_ICNV
A4FA05C LVL_PLL_IDCNV A4FA11A TIME_QSTOP_FAULT
OP_IDCNV_AT FLG_T2_CMP_BAS
A4FA06A DEAD_T_CMP PM_FLG_T_R
PM_Z_DET_DLY
A4FA07A CS_AC2_VOLT PM_Z_DET_FREQ
SL_SS_EN_SP PM_Z_DET_IQ
SL_SS_EN_BAND PM_Z_DET_MODE
VF_WS_ADJ PM_Z_DET_TIME
VF_FLT_IQ_F CR_RATE_MRH_DN
A4FA08A AD_GS_VDC_B TIME_CFN_ANS_DLY
CHG_TIME_HR_MIN LMT_SYNC_V_R
CHG_TIME_SEC_MO LMT_SYNC_ST_LVL
CHG_TIME_DAY_YR LMT_SYNC_ST_BAND
A4FA08B TIME_OV_RTRY FLG_TCMP_JCMP
FLG_INV_CAR AVR_PN_GAIN
LMT_E_CNV
MP_MTMP_PT_AS
MP_MTMP_PT_OS
MP_MTMP_RTD_AS
MP_MTMP_RTD_OS
Rev.S
513
4GBF0632
Firmware Firmware
Set Value Symbol Set Value Symbol
Number Number
Rev.S
514
4GBF0632
4.4 Symbol Index

AD_OS5......................................................................... 112
AIN_FAULT ................................................................... 31
Ａ AIN1_AS ....................................................................... 110
AC_P_T ........................................................................... 54 AIN1_GS ....................................................................... 111
ACR_A ........................................................................... 251 AIN1_OS ....................................................................... 111
ACR_A_CNV ................................................................. 429 AIN1_TYPE .................................................................. 111
ACR_AB_RT ................................................................. 251 AIN2_AS ....................................................................... 110
ACR_BPF ...................................................................... 447 AIN2_GS ....................................................................... 111
ACR_DMP ..................................................................... 447 AIN2_OS ....................................................................... 111
ACR_E2 ......................................................................... 252 AIN3_AS ....................................................................... 110
ACR_P ........................................................................... 251 AIN3_GS ....................................................................... 111
ACR_P_CNV ................................................................. 429 AIN3_OS ....................................................................... 111
ACR_PI_MUL ............................................................... 251 AOUT_FCR_GS ............................................................ 304
ACR_PI_MUL_CNV ..................................................... 429 AOUT_FCR_OS ............................................................ 304
ACR_W1 ........................................................................ 251 AOUT1_CODE .............................................................. 116
ACR_W1_CNV .............................................................. 429 AOUT1_OP_AS............................................................. 116
ACR_WL ....................................................................... 252 AOUT1_OP_GS ............................................................ 116
ACR_WL_CNV.............................................................. 429 AOUT1_OP_OS ............................................................ 116
ACSW_C.......................................................................... 30 AOUT2_CODE .............................................................. 116
ACSW_F .......................................................................... 30 AOUT2_OP_AS............................................................. 116
ACSW_T .......................................................................... 30 AOUT2_OP_GS ............................................................ 116
AD_GS_ICNV ............................................................... 113 AOUT2_OP_OS ............................................................ 116
AD_GS_VDC ................................................................. 113 AOUT3_CODE .............................................................. 116
AD_GS_VDC_B............................................................. 113 AOUT3_OP_AS............................................................. 116
AD_GS0 ......................................................................... 112 AOUT3_OP_GS ............................................................ 116
AD_GS1 ......................................................................... 112 AOUT3_OP_OS ............................................................ 116
AD_GS14 ....................................................................... 112 AOUT4_CODE .............................................................. 116
AD_GS2 ......................................................................... 112 AOUT4_OP_AS............................................................. 116
AD_GS20 ....................................................................... 112 AOUT4_OP_GS ............................................................ 116
AD_GS21 ....................................................................... 112 AOUT4_OP_OS ............................................................ 116
AD_GS23 ....................................................................... 112 AOUT5_CODE .............................................................. 116
AD_GS25 ....................................................................... 112 AOUT5_OP_AS............................................................. 116
AD_GS26 ....................................................................... 112 AOUT5_OP_GS ............................................................ 116
AD_GS27 ....................................................................... 112 AOUT5_OP_OS ............................................................ 116
AD_GS28 ....................................................................... 112 AOUT6_CODE .............................................................. 116
AD_GS3 ......................................................................... 112 AOUT6_OP_AS............................................................. 116
AD_GS30 ....................................................................... 112 AOUT6_OP_GS ............................................................ 116
AD_GS31 ....................................................................... 112 AOUT6_OP_OS ............................................................ 116
AD_GS32 ....................................................................... 112 AOUT7_CODE .............................................................. 116
AD_GS4 ......................................................................... 112 AOUT7_OP_AS............................................................. 116
AD_GS5 ......................................................................... 112 AOUT7_OP_GS ............................................................ 116
AD_OS_ICNV ............................................................... 113 AOUT7_OP_OS ............................................................ 116
AD_OS_IUC .................................................................. 113 ASPR_A......................................................................... 238
AD_OS_IVC .................................................................. 113 ASPR_AT ...................................................................... 238
AD_OS_IWC ................................................................. 113 ASPR_P ......................................................................... 238
AD_OS_VDC ................................................................. 114 ASPR_SP_FORCE ........................................................ 411
AD_OS0 ......................................................................... 112 ASPR_W1 ...................................................................... 238
AD_OS1 ......................................................................... 112 ASR_ERR_MAX............................................................ 240
AD_OS14 ....................................................................... 112 ASR_ERR_MIN ............................................................ 240
AD_OS2 ......................................................................... 112 ASR_I ............................................................................ 240
AD_OS20 ....................................................................... 112 ASR_J0.......................................................................... 240
AD_OS21 ....................................................................... 112 ASR_P_CMD ................................................................. 240
AD_OS23 ....................................................................... 112 ASR_P_FBK .................................................................. 240
AD_OS25 ....................................................................... 112 ASR_W0 ........................................................................ 241
AD_OS26 ....................................................................... 112 AVCMP_I ...................................................................... 417
AD_OS27 ....................................................................... 112 AVCMP_P ..................................................................... 417
AD_OS28 ....................................................................... 112 AVR_A ........................................................................... 425
AD_OS29 ....................................................................... 112 AVR_AT ........................................................................ 425
AD_OS3 ......................................................................... 112 AVR_MST ..................................................................... 426
AD_OS30 ....................................................................... 112 AVR_P ........................................................................... 425
AD_OS31 ....................................................................... 112 AVR_PN_GAIN ............................................................ 428
AD_OS32 ....................................................................... 112 AVR_PN_I ..................................................................... 426
AD_OS4 ......................................................................... 112 AVR_PN_P .................................................................... 426
Rev.S
515
4GBF0632
AVR_W1 ........................................................................ 426 COMB2_AS ................................................................... 492
COMB2_MSK1 ............................................................. 492
COMB2_MSK2 ............................................................. 492
Ｂ COMB2_MSK3 ............................................................. 492
B_HLTY .......................................................................... 48 COMB2_MSK4 ............................................................. 492
BLA ................................................................................. 55 COMB3_AS ................................................................... 492
BLF.................................................................................. 56 COMB3_MSK1 ............................................................. 492
BLR ................................................................................. 75 COMB3_MSK2 ............................................................. 492
BP_CTT ........................................................................... 51 COMB3_MSK3 ............................................................. 492
BR_F................................................................................ 48 COMB3_MSK4 ............................................................. 492
COMB4_AS ................................................................... 492
COMB4_MSK1 ............................................................. 492
Ｃ COMB4_MSK2 ............................................................. 492
COMB4_MSK3 ............................................................. 492
C_FN ............................................................................... 31
COMB4_MSK4 ............................................................. 492
C_FN_B ........................................................................... 31
COMM_TYPE ............................................................... 133
C_FN_T ........................................................................... 32
CP_CELL_OH............................................................... 165
C_IL................................................................................. 36
CP_CELL_OH_A .......................................................... 165
CALC1_INP1_AS.......................................................... 492
CP_CUR_DIFF ............................................................. 172
CALC1_INP1_GS ......................................................... 492
CP_CURCHK ................................................................ 172
CALC1_INP2_AS.......................................................... 492
CP_CURCHK_CNV ...................................................... 431
CALC1_INP2_GS ......................................................... 492
CP_GDV ........................................................................ 177
CALC2_INP1_AS.......................................................... 492
CP_GDV_A.................................................................... 177
CALC2_INP1_GS ......................................................... 492
CP_MOTOR_OH........................................................... 181
CALC2_INP2_AS.......................................................... 492
CP_N_IM_LL ................................................................ 279
CALC2_INP2_GS ......................................................... 492
CP_OC_UTL ................................................................. 399
CAP_1_AS ..................................................................... 493
CP_OCA ........................................................................ 172
CAP_2_AS ..................................................................... 493
CP_OCA_CNV .............................................................. 431
CAP_3_AS ..................................................................... 493
CP_OH_TR.................................................................... 165
CAP_4_AS ..................................................................... 493
CP_OH_TR_A ............................................................... 165
CAP_5_AS ..................................................................... 493
CP_OSP......................................................................... 175
CAP_6_AS ..................................................................... 493
CP_OSS_FO .................................................................. 175
CAP_7_AS ..................................................................... 493
CP_OV ........................................................................... 173
CAP_8_AS ..................................................................... 493
CP_PSF ......................................................................... 390
CAP_CHAN_CFG ......................................................... 493
CP_PSFRCV_TIME ...................................................... 390
CAP_ENB_DLY ............................................................ 493
CP_REC_F .................................................................... 174
CAP_P_MULT .............................................................. 494
CP_REV_ROT ............................................................... 352
CAP_PRE_SAMP.......................................................... 494
CP_RMS_20 .................................................................. 171
CAP_TRIG_AS .............................................................. 494
CP_RMS_5 .................................................................... 171
CAP_TRIG_BIT ............................................................ 494
CP_RMS_A ................................................................... 171
CAP_TRIG_LVL ........................................................... 494
CP_RMS_A20 ............................................................... 171
CAP_TRIG_MOD.......................................................... 494
CP_RMS_C_INV ........................................................... 359
CAP_TRIG_TYP ........................................................... 495
CP_RMS_CNV20 .......................................................... 430
CAP_TSK_EXEC .......................................................... 495
CP_RMS_CNV20A ....................................................... 430
CELL_MON_SEL ......................................................... 496
CP_RMS_CNV5 ............................................................ 430
CELL_OH_A ................................................................... 45
CP_RMS_CNV5A ......................................................... 430
CELL_PR ........................................................................ 33
CP_ROT_F_DIFF ......................................................... 351
CELL_SET_ERR ............................................................ 43
CP_ROT_F_EN ............................................................. 351
CELL_UV ........................................................................ 33
CP_SP_ERR .................................................................. 353
CHG_START................................................................... 36
CP_SP_LOST ................................................................ 344
CHG_TIME_DAY_YR .................................................. 387
CP_UL_H ...................................................................... 363
CHG_TIME_HR_MIN .................................................. 387
CP_UL_L....................................................................... 363
CHG_TIME_SEC_MO .................................................. 387
CP_UL_SP .................................................................... 364
CL_T ................................................................................ 24
CP_UV........................................................................... 174
CL_T_B ........................................................................... 25
CP_UV_SIL................................................................... 174
CL_TA ............................................................................. 24
CP_UV_SIL_L .............................................................. 174
CL_TA_B ......................................................................... 25
CP_UVA ........................................................................ 389
CNT_GS_V1 .................................................................. 114
CP_UVA_SIL ................................................................ 389
CNT_OS_VU1 ............................................................... 114
CP_VAC_PH_LOSS ...................................................... 179
CNT_OS_VV1 ............................................................... 114
CP_VFBK_F.................................................................. 178
CNT_OS_VW1 .............................................................. 114
CP_VFBK_F_A ............................................................. 178
CODE_ERR ..................................................................... 44
CP_VFBKF_L_LIM ...................................................... 178
COMB1_AS ................................................................... 492
CP_VINV_PH_LOSS .................................................... 179
COMB1_MSK1 ............................................................. 492
CPLL_ERR...................................................................... 55
COMB1_MSK2 ............................................................. 492
CPLL_P ......................................................................... 432
COMB1_MSK3 ............................................................. 492
CPLL_W1 ...................................................................... 432
COMB1_MSK4 ............................................................. 492
CPS_TIME_TAU .......................................................... 423
Rev.S
516
4GBF0632
CPSF ............................................................................... 29 CR_VP1 ......................................................................... 284
CPT_CYCLE ................................................................. 406 CR_VP2 ......................................................................... 284
CPT_FAIL ....................................................................... 51 CR_VP3 ......................................................................... 284
CPT_IQ_F ..................................................................... 407 CR_VP4 ......................................................................... 284
CPT_QSHIFT................................................................ 407 CR_VP5 ......................................................................... 284
CPT_V_GAIN................................................................ 407 CS_AC_VOLT ................................................................. 78
CPU_A............................................................................. 38 CS_AC2_VOLT ............................................................... 79
CPU_M ............................................................................ 38 CS_CNV_CURR .............................................................. 79
CR_DEC_CHG2 ............................................................ 224 CS_CURR_SCALE ....................................................... 148
CR_DEC_CHG3 ............................................................ 224 CS_DC_VOLT ................................................................. 78
CR_DEC_CHG4 ............................................................ 224 CS_DERATE ................................................................. 360
CR_DEC_CHG5 ............................................................ 224 CS_EQUIP_CURR.......................................................... 78
CR_DEC_CHG6 ............................................................ 224 CS_EQUIP_KVA ............................................................ 78
CR_DLT_Q .................................................................... 447 CS_EQUIP_VOLT .......................................................... 78
CR_DROOP_BAND ...................................................... 234 CS_F_PWM ..................................................................... 77
CR_DROOP_GAIN ....................................................... 234 CS_FRAME_SIZE .......................................................... 79
CR_FP1 ......................................................................... 284 CS_HCT_CNV ................................................................ 79
CR_FP2 ......................................................................... 284 CS_HCT_CURR .............................................................. 78
CR_FP3 ......................................................................... 284 CS_KS_FAI ..................................................................... 81
CR_FP4 ......................................................................... 284 CS_MOTOR_CURR ........................................................ 80
CR_FP5 ......................................................................... 284 CS_MOTOR_POLE ........................................................ 80
CR_JOG_FJ1S .............................................................. 324 CS_MOTOR_RPM .......................................................... 80
CR_JOG_FJ2S .............................................................. 324 CS_MOTOR_VOLT ........................................................ 80
CR_JOG_FJ3S .............................................................. 324 CS_MTR_F_BASE .......................................................... 80
CR_JOG_RJ1S .............................................................. 324 CS_MTR_V_BASE .......................................................... 81
CR_JOG_RJ2S .............................................................. 324 CS_PGCNT ................................................................... 154
CR_JOG_RJ3S .............................................................. 324 CS_PGOUT ................................................................... 159
CR_RATE_ACC ............................................................ 223 CS_PT_RATIO ................................................................ 79
CR_RATE_ACC2 .......................................................... 223 CS_RES_DGFLT .......................................................... 159
CR_RATE_ACC3 .......................................................... 223 CS_RES_TYPE ............................................................. 160
CR_RATE_ACC4 .......................................................... 223 CS_SP_BASE .................................................................. 81
CR_RATE_ACC5 .......................................................... 223 CS_SRC_FRQ ............................................................... 392
CR_RATE_ACC6 .......................................................... 223 CS_UTLCT_CURR ....................................................... 399
CR_RATE_CHG2 .......................................................... 223 CS_UTLPT_RATIO ...................................................... 399
CR_RATE_CHG3 .......................................................... 223 CS_V_R ......................................................................... 424
CR_RATE_CHG4 .......................................................... 223 CS_VAC_MIN ............................................................... 389
CR_RATE_CHG5 .......................................................... 223 CS_VF_MODE .............................................................. 283
CR_RATE_CHG6 .......................................................... 223 CS_VOLT_SCALE ........................................................ 148
CR_RATE_DEC ............................................................ 224 CS_XOVER_VOLT ......................................................... 81
CR_RATE_DEC2 .......................................................... 224 CURU .............................................................................. 26
CR_RATE_DEC3 .......................................................... 224 CURU_B ......................................................................... 26
CR_RATE_DEC4 .......................................................... 224 CURU_CNV .................................................................... 26
CR_RATE_DEC5 .......................................................... 224 CURU_DIFF ................................................................... 27
CR_RATE_DEC6 .......................................................... 224 CURV_CNV .................................................................... 26
CR_RATE_MRH ........................................................... 367 CURV_DIFF ................................................................... 27
CR_RATE_MRH_DN.................................................... 367 CURW ............................................................................. 26
CR_RATE_QSTOP ....................................................... 228 CURW_B ......................................................................... 26
CR_RATE_TRQ_A ........................................................ 370 CURW_CNV ................................................................... 26
CR_RATE_TRQ_D ........................................................ 370 CURW_DIFF .................................................................. 27
CR_RATE_XFR............................................................. 401
CR_SOFT_STALL ........................................................ 358
CR_SP_DROOP_H ....................................................... 234
Ｄ
CR_SP_DROOP_L ........................................................ 234 DA_LMT_OFF .............................................................. 117
CR_SP_JP_BAND1....................................................... 369 DA1_AS ......................................................................... 118
CR_SP_JP_BAND2....................................................... 369 DA1_GS......................................................................... 118
CR_SP_JP_BAND3....................................................... 369 DA1_OS......................................................................... 119
CR_SP_JP1 ................................................................... 368 DA2_AS ......................................................................... 118
CR_SP_JP2 ................................................................... 368 DA2_GS......................................................................... 118
CR_SP_JP3 ................................................................... 368 DA2_OS......................................................................... 119
CR_SP_LOW ................................................................. 348 DA3_AS ......................................................................... 118
CR_SP_LOW_BAND .................................................... 348 DA3_GS......................................................................... 118
CR_SP_RCH ................................................................. 346 DA3_OS......................................................................... 119
CR_SP_RCH_BAND ..................................................... 346 DA4_AS ......................................................................... 118
CR_SP_RCH2 ............................................................... 346 DA4_GS......................................................................... 118
CR_SP_RCH3 ............................................................... 346 DA4_OS......................................................................... 119
CR_STYP_EN ............................................................... 229 DA5_AS ......................................................................... 118
CR_STYP_ST ................................................................ 230
Rev.S
517
4GBF0632
DA5_GS ......................................................................... 118 DYNO_FLX0 ................................................................. 415
DA5_OS ......................................................................... 119 DYNO_FLX1 ................................................................. 415
DATA_STS .................................................................... 330 DYNO_FLX2 ................................................................. 415
DEAD_T_CMP ................................................................ 77 DYNO_FLX3 ................................................................. 415
DEGD_F2 ........................................................................ 41 DYNO_FLX4 ................................................................. 415
DEGD_F3 ........................................................................ 41 DYNO_SP1 ................................................................... 415
DI1_AS ............................................................................ 86 DYNO_SP2 ................................................................... 415
DI10_AS .......................................................................... 86 DYNO_SP3 ................................................................... 415
DI11_AS .......................................................................... 86 DYNO_SP4 ................................................................... 415
DI2_AS ............................................................................ 86
DI3_AS ............................................................................ 86
DI4_AS ............................................................................ 86
Ｅ
DI5_AS ............................................................................ 86 EGD_CEID1 ................................................................. 145
DI6_AS ............................................................................ 86 EGD_CGRP1................................................................. 145
DI7_AS ............................................................................ 86 EGD_CGRP2................................................................. 145
DI8_AS ............................................................................ 86 EGD_CPID1 .................................................................. 145
DI9_AS ............................................................................ 86 EGD_DEST ................................................................... 145
DNET_BAUD................................................................ 148 EGD_GATEWAY .......................................................... 146
DNET_CODE ................................................................ 148 EGD_IP ......................................................................... 146
DNET_M_MACID......................................................... 149 EGD_RATE ................................................................... 146
DNET_MACID .............................................................. 149 EGD_RPID2 .................................................................. 146
DNET_OPTION ............................................................ 149 EGD_SUBNET_MSK ................................................... 146
DNET_PRC_GAIN ....................................................... 149 EQ_GS_FBK0 ............................................................... 428
DNET_PRC_GAIN2 ..................................................... 149 EQ_GS_FBK0_OVD ..................................................... 428
DNET_PRC_SCALE ..................................................... 150
DNET_RD_AS .............................................................. 150
DNET_SERIAL_NO ..................................................... 150 Ｆ
DNET_SP_SCALE ........................................................ 150
FAULT ............................................................................ 75
DNET_TR_SCALE ....................................................... 151
FCL_T ............................................................................. 56
DO1_AS ......................................................................... 106
FCL_TA ........................................................................... 56
DO10_AS ....................................................................... 106
FIN_TMP_DBAND ....................................................... 385
DO11_AS ....................................................................... 106
FL_FAULT...................................................................... 57
DO12_AS ....................................................................... 106
FL_READY ..................................................................... 56
DO2_AS ......................................................................... 106
FLG_AIN_CUR............................................................. 111
DO3_AS ......................................................................... 106
FLG_ASR ...................................................................... 236
DO4_AS ......................................................................... 106
FLG_ASR_J0 ................................................................ 241
DO5_AS ......................................................................... 106
FLG_BP_CUR_USE ..................................................... 399
DO6_AS ......................................................................... 106
FLG_CCD_CRC_ERR_MSK ........................................ 181
DO7_AS ......................................................................... 106
FLG_CELL_RUNBACK ............................................... 423
DO8_AS ......................................................................... 106
FLG_CFN_CTRL .......................................................... 381
DO9_AS ......................................................................... 106
FLG_CFN_RDNT ......................................................... 381
DS_T ................................................................................ 74
FLG_CHGSYS .............................................................. 330
DT_FLG_DNDT ............................................................ 337
FLG_CLC_INTLMT ..................................................... 410
DT_FLG_TMODE ......................................................... 337
FLG_CLREF_SW ......................................................... 410
DT_FLT_TRQ1 ............................................................. 337
FLG_CPSF_MODE....................................................... 390
DT_FLT_TRQ2 ............................................................. 337
FLG_CURV_RATE ....................................................... 225
DT_GD2 ........................................................................ 337
FLG_DI_DATA1_SEL .................................................... 87
DT_IMP_FLT ................................................................ 337
FLG_DIFF_PG ............................................................. 154
DT_IMP_R_INZ ............................................................ 337
FLG_DR_OUT .............................................................. 335
DT_LB_BAND .............................................................. 337
FLG_DSCAN ................................................................ 147
DT_LB_CMP_G ............................................................ 338
FLG_DT_LMT .............................................................. 228
DT_LB_CMP_SP .......................................................... 338
FLG_DYNO .................................................................. 415
DT_LB_FLT .................................................................. 338
FLG_E2CMP................................................................. 252
DT_LB_LMT ................................................................. 338
FLG_ES_RMFC ............................................................ 335
DT_LB_MODE .............................................................. 338
FLG_EXRST ................................................................. 180
DT_LB_P ....................................................................... 339
FLG_FAULT ................................................................. 142
DT_LB_TEST................................................................ 339
FLG_FE ........................................................................ 422
DT_LB_TYPE ............................................................... 339
FLG_FLD_ERR ............................................................ 219
DT_LB_W1.................................................................... 339
FLG_HB_DOWN .......................................................... 134
DT_LR_MODE .............................................................. 339
FLG_IMNUM_SEL ...................................................... 278
DT_LR_OFL.................................................................. 339
FLG_INV_CAR ............................................................. 423
DT_LR_ONL ................................................................. 339
FLG_IQ_EXTOFF ........................................................ 244
DT_PG_PPR.................................................................. 340
FLG_IQ_EXTROFF ...................................................... 244
DT_RATE_QSTOP ....................................................... 340
FLG_LD_DROOP ......................................................... 235
DT_TRQ_TAU............................................................... 340
FLG_LMT_FRST .......................................................... 180
DVDT_A ........................................................................ 427
FLG_MAXC_USE ......................................................... 279
DVDT_AT...................................................................... 427
Rev.S
518
4GBF0632
FLG_MODL .................................................................. 412 FLT_AOUT4 ................................................................. 117
FLG_MOT_G ................................................................ 262 FLT_AOUT5 ................................................................. 117
FLG_MRH_CLR ........................................................... 367 FLT_AOUT6 ................................................................. 117
FLG_MTMP_SEL ......................................................... 163 FLT_AOUT7 ................................................................. 117
FLG_OV_RTRY_MOD.................................................. 438 FLT_CALC1 .................................................................. 493
FLG_PGOUT_PPR ....................................................... 155 FLT_CALC2 .................................................................. 493
FLG_PN_IREF ............................................................. 426 FLT_CPT_V_G.............................................................. 407
FLG_POW_AVE ........................................................... 447 FLT_DROOP................................................................. 235
FLG_PR_DIN................................................................ 376 FLT_ECO_IQF ............................................................. 362
FLG_PRE_CTT_TYPE ................................................. 166 FLT_FLX....................................................................... 255
FLG_PSF_CLR ............................................................. 388 FLT_FLX_ACR ............................................................. 252
FLG_PSFRCV ............................................................... 388 FLT_FSEEK_FREQ ..................................................... 327
FLG_RATE_QSTOP ..................................................... 340 FLT_FWEAK_SPF ....................................................... 255
FLG_RATE_READY..................................................... 227 FLT_GDV ...................................................................... 177
FLG_RCV_DYM ........................................................... 440 FLT_IPLL ..................................................................... 326
FLG_RCV_FBK ............................................................ 440 FLT_IPLL_FLX ............................................................ 327
FLG_RCV_LSYM_SEL ................................................ 444 FLT_IPLL_VFBK ......................................................... 327
FLG_RCV_TYPE .......................................................... 441 FLT_IQ_CMP ............................................................... 428
FLG_RES_EX4 ............................................................. 160 FLT_IQ_S...................................................................... 427
FLG_RESTART ............................................................ 326 FLT_PLL ....................................................................... 391
FLG_RMFC................................................................... 335 FLT_POW_AVE_BAS .................................................. 447
FLG_RMFC_G_ADJ ..................................................... 264 FLT_PPIEO .................................................................. 238
FLG_RNTD_FER.......................................................... 236 FLT_QPG ...................................................................... 154
FLG_SFC_D_SEL ......................................................... 265 FLT_RCV_FBK............................................................. 444
FLG_SL_DB .................................................................. 275 FLT_RCV_ILIM............................................................ 444
FLG_SL_ID_SET .......................................................... 268 FLT_SFC....................................................................... 266
FLG_SL_IM_AVE ......................................................... 280 FLT_SP ......................................................................... 236
FLG_SL_IM_N_DET .................................................... 278 FLT_SP_ERR ................................................................ 353
FLG_SL_MON_SP_N ................................................... 268 FLT_SP_MODL ............................................................ 412
FLG_SL_SP_CHK ........................................................ 275 FLT_SP_R ..................................................................... 231
FLG_SL_SP_EST ......................................................... 268 FLT_SPSFCD ............................................................... 266
FLG_SNGPG_TYPE ..................................................... 154 FLT_T_R ....................................................................... 236
FLG_SOFT_STALL ...................................................... 358 FLT_VAC_MIN............................................................. 389
FLG_SP_BASE2 ........................................................... 255 FLT_VAC_PRO............................................................. 389
FLG_SP_ERR_SL ......................................................... 356 FLT_VDC_CNV ............................................................ 427
FLG_SP_LOST_EN ...................................................... 344 FLT_VDC_F .................................................................. 114
FLG_SP_R_JP .............................................................. 369 FLT_VFBK_F ............................................................... 178
FLG_SP_R_MODL ....................................................... 412 FLT_VI_POWER .......................................................... 253
FLG_SP_RCH ............................................................... 346 FLT_VSC ...................................................................... 408
FLG_SP_REF_PG......................................................... 496 FLT_VSC_CNV............................................................. 446
FLG_SPFORC_P .......................................................... 411 FLT_XFR ...................................................................... 402
FLG_SSEQ_PSFDO ..................................................... 388 FOC ................................................................................. 57
FLG_SSEQ_RNTD ....................................................... 142 FOC_S ............................................................................. 57
FLG_STOP_MODE ...................................................... 367 FPGA_CRC_ERR............................................................ 39
FLG_STYP_BMPLS ..................................................... 231 FPGA2_WD..................................................................... 39
FLG_SYNC_EN ............................................................ 394 FPGA3_WD..................................................................... 39
FLG_SYNC_FOUT ....................................................... 395 FPGA4_WD..................................................................... 39
FLG_SYNC_INTSQ ...................................................... 394 FSEEK_FLX_G............................................................. 327
FLG_SYNC_TRB .......................................................... 396 FSEEK_ID_RATE ........................................................ 327
FLG_T2_CMP_BAS ...................................................... 248 FSEEK_LOW_FREQ .................................................... 327
FLG_TCMP ................................................................... 412 FSTOP............................................................................. 57
FLG_TCMP_JCMP ....................................................... 414 FUNC_GET1_AS .......................................................... 374
FLG_TENS_CUT .......................................................... 260 FUNC_GET2_AS .......................................................... 374
FLG_TENSEL .............................................................. 260 FUNC_GET3_AS .......................................................... 374
FLG_TIME_RATE ........................................................ 227 FUNC_GET4_AS .......................................................... 374
FLG_TIQ_SW ............................................................... 410 FUNC_PUT1_AS .......................................................... 374
FLG_TL_F_QSTOP ...................................................... 180 FUNC_PUT2_AS .......................................................... 374
FLG_UPS_USE ............................................................ 390 FUNC_PUT3_AS .......................................................... 374
FLG_UVS2_USE ............................................................ 89 FUNC_PUT4_AS .......................................................... 374
FLG_WLC_IREF .......................................................... 429 FUNC_SPA1_AS .......................................................... 371
FLG_WVU....................................................................... 81 FUNC_SPA2_AS .......................................................... 371
FLG_XFR_ACSW ......................................................... 395 FUNC_SPA3_AS .......................................................... 371
FLG_XFR_RETRY........................................................ 402 FUNC_SPA4_AS .......................................................... 371
FLG_XFR_UTL_SEL.................................................... 395 FUNC1_ERR ................................................................ 373
FLT_AIN1 ..................................................................... 111 FUNC1_INP1_AS ......................................................... 373
FLT_AIN2 ..................................................................... 111 FUNC1_INP1_GS......................................................... 373
FLT_AIN3 ..................................................................... 111 FUNC1_INP1_OS......................................................... 373
Rev.S
519
4GBF0632
FUNC1_INP2_AS ......................................................... 373 Ｉ
FUNC1_INP2_GS ......................................................... 373
FUNC1_INP2_OS ......................................................... 373 ID_FIX .......................................................................... 444
FUNC1_TOFF .............................................................. 373 ID_S .............................................................................. 427
FUNC1_TON ................................................................ 373 IL ..................................................................................... 35
FUNC2_ERR................................................................. 373 INF_DBREV ................................................................... 82
FUNC2_INP1_AS ......................................................... 373 INF_JOBNO1 ................................................................. 82
FUNC2_INP1_GS ......................................................... 373 INF_JOBNO2 ................................................................. 82
FUNC2_INP1_OS ......................................................... 373 INF_M_TYPE ................................................................. 82
FUNC2_INP2_AS ......................................................... 373 INF_MEMO .................................................................... 82
FUNC2_INP2_GS ......................................................... 373 INF_PANEL ................................................................... 82
FUNC2_INP2_OS ......................................................... 373 INF_SOFTVER ............................................................... 82
FUNC2_TOFF .............................................................. 373 INF_TAG ........................................................................ 83
FUNC2_TON ................................................................ 373 INF_TEMPLATE_NO .................................................... 83
FUNC3_ERR................................................................. 373 INF_TIME_DAY ............................................................. 83
FUNC3_INP1_AS ......................................................... 373 INF_TIME_HOUR ......................................................... 83
FUNC3_INP1_GS ......................................................... 373 INF_TIME_MIN ............................................................. 83
FUNC3_INP1_OS ......................................................... 373 INF_TIME_MONTH ...................................................... 83
FUNC3_INP2_AS ......................................................... 373 INF_TIME_SEC ............................................................. 83
FUNC3_INP2_GS ......................................................... 373 INF_TIME_YEAR .......................................................... 83
FUNC3_INP2_OS ......................................................... 373 INF_TITLE ..................................................................... 83
FUNC3_TOFF .............................................................. 373 IPLL_P .......................................................................... 326
FUNC3_TON ................................................................ 373 IPLL_W1 ....................................................................... 327
FUNC4_ERR................................................................. 373
FUNC4_INP1_AS ......................................................... 373
FUNC4_INP1_GS ......................................................... 373 Ｋ
FUNC4_INP1_OS ......................................................... 373 KPAD_FLGSET1 .......................................................... 486
FUNC4_INP2_AS ......................................................... 373 KPAD_METER1_DT .................................................... 487
FUNC4_INP2_GS ......................................................... 373 KPAD_METER1_RG .................................................... 488
FUNC4_INP2_OS ......................................................... 373 KPAD_METER2_DT .................................................... 487
FUNC4_TOFF .............................................................. 373 KPAD_METER2_RG .................................................... 488
FUNC4_TON ................................................................ 373 KPAD_METER3_DT .................................................... 487
KPAD_METER3_RG .................................................... 488
Ｇ KPAD_METER4_DT .................................................... 487
KPAD_METER4_RG .................................................... 488
G_DSP_POW ................................................................ 497 KPAD_PRIVILEGE ...................................................... 486
G_DSP_VOLT ............................................................... 497
G_DYNO_P ................................................................... 415
G_DYNO_W1 ................................................................ 416 Ｌ
G_IBC_I ........................................................................ 418 LF .................................................................................... 58
G_IBC_P........................................................................ 418 LMT_ASPRG ................................................................ 264
G_ID_IQCMP ................................................................ 427 LMT_AVCMP ............................................................... 417
G_ID_IQCMP2 .............................................................. 427 LMT_CL_REF............................................................... 410
G_IQ_CMP_CNV .......................................................... 427 LMT_DIDT_N ............................................................... 246
G_QCMP_IQ_I .............................................................. 422 LMT_DIDT_P ............................................................... 246
G_RCV_I ....................................................................... 444 LMT_DYNO_REG ........................................................ 416
G_RCV_P ...................................................................... 444 LMT_E .......................................................................... 252
G_VSC_CNV_I .............................................................. 446 LMT_E_CNV ................................................................ 428
G_VSC_CNV_P ............................................................. 446 LMT_FRST ..................................................................... 37
G_VSC_I ........................................................................ 408 LMT_I1 ......................................................................... 169
G_VSC_P ....................................................................... 408 LMT_I1_CNV................................................................ 430
G_XFR_I........................................................................ 402 LMT_I1_EX................................................................... 169
GAIN_QCMP_CPLL ..................................................... 448 LMT_I1_LOWF............................................................. 169
GAIN_QCMP_I ............................................................. 422 LMT_I1_LOWF_H ........................................................ 169
GAIN_QCMP_ICNV ..................................................... 448 LMT_I1_LOWF_L ........................................................ 169
GAIN_QCMP_V ............................................................ 422 LMT_I1_STF................................................................. 169
GAIN_QCMP_V2 .......................................................... 422 LMT_IQ_BAS ............................................................... 244
GAIN_QCMP_VCNV .................................................... 448 LMT_IQ_EXTOFF ........................................................ 244
GIF_CLKDWN................................................................ 39 LMT_IQ_INV ................................................................ 245
GR_A ............................................................................... 53 LMT_IQ_TOP ............................................................... 244
GR_T ............................................................................... 53 LMT_RCV_LL............................................................... 444
LMT_RCV_UL .............................................................. 444
Ｈ LMT_RMFC_JMS......................................................... 336
LMT_SFC_D ................................................................. 266
H_C_OCA ........................................................................ 21 LMT_SP_BASE ............................................................ 244
H_OCA ............................................................................ 21 LMT_SP_F .................................................................... 232
Rev.S
520
4GBF0632
LMT_SP_INV................................................................ 245 MA_FLUXFUNC13 ...................................................... 256
LMT_SP_L .................................................................... 232 MA_FLUXFUNC14 ...................................................... 256
LMT_SP_MIN ............................................................... 233 MA_FLUXFUNC15 ...................................................... 256
LMT_SP_R .................................................................... 232 MA_FLUXFUNC16 ...................................................... 256
LMT_SYNC_ST_BAND................................................ 396 MA_FLUXFUNC17 ...................................................... 256
LMT_SYNC_ST_LVL ................................................... 396 MA_FLUXFUNC18 ...................................................... 256
LMT_SYNC_V_R .......................................................... 396 MA_FLUXFUNC19 ...................................................... 256
LMT_TRQ ..................................................................... 245 MA_FLUXFUNC20 ...................................................... 256
LMT_TRQ_EX .............................................................. 245 MA_MOTOR_KW ........................................................... 81
LMT_TRQ_INV ............................................................ 245 MA_V_RATE................................................................. 256
LMT_TRQ_INV_EX...................................................... 245 MA_ZERO_SP .............................................................. 175
LMT_VDC_CL_H ......................................................... 173 MA_ZERO_TRQ ........................................................... 370
LMT_VDC_CL_H2........................................................ 173 MI_DCMP_G ................................................................ 248
LMT_VDC_CL_L .......................................................... 173 MI_FBK_G .................................................................... 268
LMT_VDC_CL_L2 ........................................................ 173 MI_G_E2 ....................................................................... 269
LMT_VSC...................................................................... 409 MI_G_E2_R2................................................................. 269
LMT_VSC_CNV ............................................................ 446 MI_ID_BASE ................................................................ 256
LMT_VSC_CNV_LL ..................................................... 446 MI_KCT ........................................................................ 275
LMT_VSC_CNV_UL..................................................... 446 MI_L_CMP.................................................................... 275
LMT_VSC_LL ............................................................... 409 MI_R1_SET................................................................... 275
LMT_VSC_UL .............................................................. 409 MI_R1_SET_FREQ ...................................................... 276
LVL_CPT_IDIP............................................................. 406 MI_R1_SET_LF ............................................................ 276
LVL_CPT_VDIP ........................................................... 406 MI_R2_CMP ................................................................. 247
LVL_CRDIF_DET ........................................................ 172 MI_R2C_G .................................................................... 247
LVL_DISTB_SPLOW ................................................... 436 MI_T2 ............................................................................ 247
LVL_ECO_FLX ............................................................. 362 MI_T2_BIAS ................................................................. 247
LVL_IPLL_DLTQ ......................................................... 406 MI_T75_BIAS ............................................................... 248
LVL_IPLL_UNLCK ...................................................... 406 MP_BE_TM_H1 .............................................................. 62
LVL_PLL_EDLOW ....................................................... 435 MP_BE_TM_H2 .............................................................. 62
LVL_PLL_ICNV ........................................................... 434 MP_BE_TM_H3 .............................................................. 62
LVL_PLL_IDCNV ........................................................ 435 MP_BE_TM_LV ............................................................ 452
LVL_PLL_IDERR ......................................................... 433 MP_BE_TM_LVA ......................................................... 452
LVL_PLL_IQFBK ......................................................... 434 MP_BE_TM1_OL............................................................ 59
LVL_PLL_OC ............................................................... 434 MP_BE_TM1_OLA ......................................................... 64
LVL_PLL_OV ............................................................... 434 MP_BE_TM2_OL............................................................ 59
LVL_PLL_UVD............................................................. 434 MP_BE_TM2_OLA ......................................................... 64
LVL_UVA_PRECHG .................................................... 167 MP_BE_TM3_OL............................................................ 59
LVL_VAC_DISTB ......................................................... 437 MP_BE_TM3_OLA ......................................................... 64
LVL_VDC_CCDRDY .................................................... 438 MP_BE_TMX_OL ........................................................... 59
LVL_VF_LOW .............................................................. 326 MP_BE_TMX_OLA ........................................................ 64
LVL_VFBK_DLDQ ....................................................... 433 MP_BH_RL_A................................................................. 72
LVL_XFR_DLTQ .......................................................... 401 MP_BH_RL_TR .............................................................. 71
LVL_XFR_DLTV .......................................................... 401 MP_BR01_CL ................................................................. 68
LVL_XFR_SPREF ........................................................ 395 MP_BR02_CL ................................................................. 68
MP_BR03_CL ................................................................. 68
MP_BR04_CL ................................................................. 68
Ｍ MP_BR05_CL ................................................................. 68
M_FN .............................................................................. 48 MP_BR06_CL ................................................................. 68
M_FN_T .......................................................................... 48 MP_BR07_CL ................................................................. 68
M_OH .............................................................................. 47 MP_BR08_CL ................................................................. 68
M_OH_A.......................................................................... 47 MP_BR09_CL ................................................................. 68
MA_BR_CURR.............................................................. 176 MP_BR10_CL ................................................................. 68
MA_BR_SPEED............................................................ 176 MP_BR11_CL ................................................................. 68
MA_FLUXFUNC00 ...................................................... 256 MP_BR12_CL ................................................................. 68
MP_BR25_CL ................................................................. 68
Rev.S
521
4GBF0632
MP_BR26_CL ................................................................. 68 MP_BV_Z_LV ............................................................... 452
MP_BR27_CL ................................................................. 68 MP_BV_Z_LVA ............................................................. 452
MP_BR28_CL ................................................................. 68 MP_CF1_MCC_F ............................................................ 67
MP_BR29_CL ................................................................. 68 MP_CF1_MR................................................................... 62
MP_BR30_CL ................................................................. 68 MP_CF1_MRA ................................................................ 67
MP_BR31_CL ................................................................. 68 MP_CF2_MCC_F ............................................................ 67
MP_BR32_CL ................................................................. 68 MP_CF2_MR................................................................... 62
MP_BR33_CL ................................................................. 68 MP_CF2_MRA ................................................................ 67
MP_BR34_CL ................................................................. 68 MP_CW_TM_H1 ............................................................. 67
MP_BR35_CL ................................................................. 68 MP_CW_TM_LV ........................................................... 453
MP_BR36_CL ................................................................. 68 MP_CW_TM_LVA ........................................................ 453
MP_BR37_CL ................................................................. 68 MP_CW_TM1_OL........................................................... 59
MP_BR38_CL ................................................................. 68 MP_CW_TM1_OLA ........................................................ 64
MP_BR39_CL ................................................................. 68 MP_CW_TM2_OL........................................................... 59
MP_BR40_CL ................................................................. 68 MP_CW_TM2_OLA ........................................................ 64
MP_BR41_CL ................................................................. 68 MP_CW_TMX_OL .......................................................... 59
MP_BR42_CL ................................................................. 68 MP_CW_TMX_OLA........................................................ 64
MP_BR43_CL ................................................................. 68 MP_CWF_L1................................................................... 62
MP_BR44_CL ................................................................. 68 MP_CWF_L1A ................................................................ 67
MP_BR45_CL ................................................................. 68 MP_CWF_LV ................................................................ 454
MP_BR46_CL ................................................................. 68 MP_CWF_LVA ............................................................. 454
MP_BR47_CL ................................................................. 68 MP_CWF1_LL ................................................................ 62
MP_BR48_CL ................................................................. 68 MP_CWF1_LLA.............................................................. 66
MP_BR49_CL ................................................................. 68 MP_CWF2_LL ................................................................ 62
MP_BR50_CL ................................................................. 68 MP_CWF2_LLA.............................................................. 66
MP_BR51_CL ................................................................. 68 MP_CWFS_LL ................................................................ 62
MP_BR52_CL ................................................................. 68 MP_CWFS_LLA ............................................................. 67
MP_BR53_CL ................................................................. 68 MP_FAULT..................................................................... 73
MP_BR54_CL ................................................................. 68 MP_FLG_LR1 ............................................................... 469
MP_BR55_CL ................................................................. 68 MP_FLG_LR2 ............................................................... 470
MP_BR56_CL ................................................................. 68 MP_FLG_LR3 ............................................................... 471
MP_BR57_CL ................................................................. 68 MP_GP_RL_TR............................................................... 71
MP_BR58_CL ................................................................. 68 MP_IAR_TM_LV .......................................................... 454
MP_BR59_CL ................................................................. 68 MP_IAR_TM_LVA ........................................................ 454
MP_BR60_CL ................................................................. 68 MP_IAR_TM1_OL .......................................................... 59
MP_BR61_CL ................................................................. 68 MP_IAR_TM1_OLA........................................................ 64
MP_BR62_CL ................................................................. 68 MP_IAR_TM2_OL .......................................................... 59
MP_BR63_CL ................................................................. 68 MP_IAR_TM2_OLA........................................................ 64
MP_BR64_CL ................................................................. 68 MP_IAR_TMX_OL.......................................................... 59
MP_BV_1X_OL ............................................................... 60 MP_IAR_TMX_OLA ....................................................... 64
MP_BV_1X_OLA ............................................................ 65 MP_MTMP_PT_AS....................................................... 455
MP_BV_1Y_OL ............................................................... 60 MP_MTMP_PT_OS ...................................................... 455
MP_BV_1Y_OLA ............................................................ 65 MP_MTMP_RTD_AS.................................................... 456
MP_BV_1Z_OL ............................................................... 60 MP_MTMP_RTD_OS ................................................... 456
MP_BV_1Z_OLA ............................................................. 65 MP_OAR_TM_LV ......................................................... 454
MP_BV_2X_OL ............................................................... 61 MP_OAR_TM_LVA ...................................................... 454
MP_BV_2X_OLA ............................................................ 66 MP_OAR_TM1_OL ......................................................... 60
MP_BV_2Y_OL ............................................................... 61 MP_OAR_TM1_OLA ...................................................... 65
MP_BV_2Y_OLA ............................................................ 66 MP_OAR_TM2_OL ......................................................... 60
MP_BV_2Z_OL ............................................................... 61 MP_OAR_TM2_OLA ...................................................... 65
MP_BV_2Z_OLA ............................................................. 66 MP_OAR_TMX_OL ........................................................ 60
MP_BV_3X_OL ............................................................... 61 MP_OAR_TMX_OLA ...................................................... 65
MP_BV_3X_OLA ............................................................ 66 MP_OL_LVL_A............................................................... 72
MP_BV_3Y_OL ............................................................... 61 MP_OL_LVL_TR ............................................................ 70
MP_BV_3Y_OLA ............................................................ 66 MP_OL_TM_A ................................................................ 71
MP_BV_3Z_OL ............................................................... 61 MP_OL_TM_LV ............................................................ 483
MP_BV_3Z_OLA ............................................................. 66 MP_OL_TM_LVA ......................................................... 483
MP_BV_X_LV ............................................................... 452 MP_OL_TM_OL.............................................................. 71
MP_BV_X_LVA............................................................. 452 MP_OL_TM_OLA ........................................................... 72
MP_BV_X1_OL ............................................................... 61 MP_OL_TM_TR .............................................................. 70
MP_BV_X1_OLA ............................................................ 65 MP_OLU_HFD ............................................................... 62
MP_BV_X2_OL ............................................................... 61 MP_OLU_HFDA ............................................................. 68
MP_BV_X2_OLA ............................................................ 66 MP_OLU_HPL_N ........................................................... 63
MP_BV_X3_OL ............................................................... 61 MP_OLU_HPL_NA ........................................................ 63
MP_BV_X3_OLA ............................................................ 66 MP_OLU_LFD ................................................................ 67
MP_BV_Y_LV ............................................................... 452 MP_OLU_LPL_N............................................................ 63
MP_BV_Y_LVA............................................................. 452 MP_OLU_LPL_NA ......................................................... 63
Rev.S
522
4GBF0632
MP_PRD_A ..................................................................... 72 MS_OP_VL_A_2 ........................................................... 262
MP_PRD_TR ................................................................... 71 MS_OP_VL_A_3 ........................................................... 262
MP_R_IL ......................................................................... 69 MS_OP_VL_AT_1 ......................................................... 262
MP_S_IL ......................................................................... 69 MS_OP_VL_AT_2 ......................................................... 262
MP_SPH_MCC_F ........................................................... 68 MS_OP_VL_AT_3 ......................................................... 262
MP_SPH_ON_A .............................................................. 68 MS_OP_VL_I_1 ............................................................ 262
MP_SW_TM_H ............................................................... 63 MS_OP_VL_I_2 ............................................................ 262
MP_SW_TM_LV ........................................................... 455 MS_OP_VL_I_3 ............................................................ 262
MP_SW_TM_LVA ......................................................... 455 MS_OP_VL_P_1............................................................ 262
MP_SW_TM1_OL ........................................................... 60 MS_OP_VL_P_2............................................................ 262
MP_SW_TM1_OLA......................................................... 65 MS_OP_VL_P_3............................................................ 262
MP_SW_TM2_OL ........................................................... 60 MS_QR_TRUEDAT ...................................................... 318
MP_SW_TM2_OLA......................................................... 65 MS_RATE_IQACC ....................................................... 307
MP_SW_TM3_OL ........................................................... 60 MS_RATE_IQDEC ....................................................... 307
MP_SW_TM3_OLA......................................................... 65 MS_STA_G.................................................................... 308
MP_SW_TMX_OL........................................................... 60 MS_STA_W ................................................................... 308
MP_SW_TMX_OLA ........................................................ 65 MS_START_IQ ............................................................. 307
MP_WD_TM_A ............................................................... 72 MS_START_QO_OS ..................................................... 306
MP_WD_TM_LV ........................................................... 483 MS_TIME_FC ............................................................... 306
MP_WD_TM_LVA ........................................................ 483 MS_TIME_FLDCL ....................................................... 314
MP_WD_TM_OL............................................................. 71 MS_TIME_INI_ADJ ..................................................... 306
MP_WD_TM_OLA .......................................................... 72 MS_VL_A ...................................................................... 312
MP_WD_TM_TR ............................................................. 70 MS_VL_AT.................................................................... 312
MP_WLK1....................................................................... 63 MS_VL_I ....................................................................... 311
MP_WLK1A .................................................................... 68 MS_VL_P ...................................................................... 311
MPSF .............................................................................. 54 MS_VLIMIT .................................................................. 311
MS_CP_FOC ................................................................. 314 MS_VPLL_SP ............................................................... 309
MS_CP_LF .................................................................... 314 MS_XFR_FLDHLD ...................................................... 315
MS_CP_OV ................................................................... 314 MSK_BLF1 ................................................................... 188
MS_CP_VPLL_ERR ..................................................... 314 MSK_BLR1 ................................................................... 189
MS_CPT_VLDLY .......................................................... 315 MSK_BLR10 ................................................................. 197
MS_DIDT_LMT_ST ...................................................... 308 MSK_BLR11 ................................................................. 198
MS_DLT_GAIN ............................................................ 317 MSK_BLR12 ................................................................. 199
MS_FCR_P .................................................................... 303 MSK_BLR13 ................................................................. 200
MS_FCR_W1................................................................. 303 MSK_BLR14 ................................................................. 201
MS_FCRST ................................................................... 304 MSK_BLR15 ................................................................. 202
MS_FLBST_INI ............................................................ 306 MSK_BLR2 ................................................................... 190
MS_FLBST_IQACC ...................................................... 308 MSK_BLR3 ................................................................... 191
MS_FLBST_VPLL ........................................................ 312 MSK_BLR4 ................................................................... 191
MS_FLBST_VPLL_SP.................................................. 312 MSK_BLR5 ................................................................... 192
MS_FLCMP_G .............................................................. 313 MSK_BLR6 ................................................................... 193
MS_FLCMP_W ............................................................. 313 MSK_BLR7 ................................................................... 194
MS_FLDCL ................................................................... 304 MSK_BLR8 ................................................................... 195
MS_FLG_FCF_E .......................................................... 303 MSK_BLR9 ................................................................... 196
MS_FLG_TRUEDAT .................................................... 318 MSK_BR ....................................................................... 220
MS_FLG_ZPLS ............................................................. 317 MSK_CMD1 .................................................................... 99
MS_FLT_VPLL_ERR ................................................... 314 MSK_DI_EMG ................................................................ 90
MS_IDR_OS .................................................................. 315 MSK_DI_EX5 ................................................................. 97
MS_KF1 ........................................................................ 306 MSK_DI_EX6 ................................................................. 98
MS_KF2 ........................................................................ 311 MSK_DI1 ........................................................................ 90
MS_KF3 ........................................................................ 311 MSK_DI3 ........................................................................ 93
MS_KF4 ........................................................................ 311 MSK_DI3_EMG .............................................................. 93
MS_LMT_PHC_L ......................................................... 304 MSK_DI4 ........................................................................ 95
MS_LMT_PHC_U ......................................................... 304 MSK_DI4_EMG .............................................................. 95
MS_OP_KF1_1.............................................................. 262 MSK_DI7 ........................................................................ 99
MS_OP_KF1_2.............................................................. 262 MSK_DI7_EMG .............................................................. 99
MS_OP_KF1_3.............................................................. 262 MSK_HFD1 .................................................................. 211
MS_OP_KF2_1.............................................................. 262 MSK_HFD2 .................................................................. 212
MS_OP_KF2_2.............................................................. 262 MSK_LFD1 ................................................................... 217
MS_OP_KF2_3.............................................................. 262 MSK_LFD2 ................................................................... 218
MS_OP_START_IQ_1................................................... 262 MSK_MP_HFD1 ........................................................... 469
MS_OP_TIME_FC_1 .................................................... 262 MSK_MP_HFD4 ........................................................... 484
MS_OP_TIME_FC_2 .................................................... 262 MSK_MP_LFD1............................................................ 476
MS_OP_TIME_FC_3 .................................................... 262 MSK_MP_LFD2............................................................ 477
MS_OP_VL_A_1 ........................................................... 262 MSK_MP_LFD3............................................................ 478
Rev.S
523
4GBF0632
MSK_MP_LFD4............................................................ 485 OP_ASPR_A_3 .............................................................. 262
MSK_MP_LFD5............................................................ 479 OP_ASPR_AT_1............................................................ 262
MSK_MP_LFD8............................................................ 482 OP_ASPR_P_1 .............................................................. 262
MSK_MP_QSTOP1....................................................... 469 OP_ASPR_P_2 .............................................................. 262
MSK_MP_QSTOP2....................................................... 470 OP_ASPR_P_3 .............................................................. 262
MSK_MP_QSTOP3....................................................... 471 OP_ASPR_W1_1 ........................................................... 262
MSK_MP_RIL1 ............................................................. 475 OP_ASPR_W1_2 ........................................................... 262
MSK_MP_SIL1 ............................................................. 472 OP_ASPR_W1_3 ........................................................... 262
MSK_MP_SIL2 ............................................................. 473 OP_CFN_A.................................................................... 383
MSK_MP_SIL3 ............................................................. 474 OP_CFN_AT ................................................................. 384
MSK_READY1 .............................................................. 209 OP_CFN_CELL_OH ..................................................... 384
MSK_READY2 .............................................................. 210 OP_CFN_P .................................................................... 383
MSK_SERSEQ1 .............................................................. 90 OP_CFN_RATE ............................................................ 384
MSK_SERSEQ2 .............................................................. 93 OP_CFN_SPL ............................................................... 384
MSK_SERSEQ4 .............................................................. 95 OP_CFN_TR_OH.......................................................... 384
MSK_SERSEQ5 .............................................................. 97 OP_CFN_W1................................................................. 383
MSK_SERSEQ6 .............................................................. 98 OP_DNDT_CMP_G ...................................................... 422
MSK_SIL1..................................................................... 213 OP_DNDT_POINT ....................................................... 422
MSK_SIL2..................................................................... 214 OP_DVCMP_A_1 .......................................................... 262
MSK_STPRQ1 .............................................................. 215 OP_DVCMP_A_2 .......................................................... 262
MSK_STPRQ2 .............................................................. 216 OP_DVCMP_A_3 .......................................................... 262
MSK_UV1 ..................................................................... 207 OP_DVCMP_AT_1........................................................ 262
MSK_UV2 ..................................................................... 208 OP_DVCMP_AT_2........................................................ 262
MSK_UVA1................................................................... 203 OP_DVCMP_AT_3........................................................ 262
MSK_UVA2................................................................... 204 OP_FCMP_A_1 ............................................................. 262
MSK_UVA3................................................................... 205 OP_FCMP_A_2 ............................................................. 262
MSK_UVA4................................................................... 206 OP_FCMP_A_3 ............................................................. 262
MTMP_AS ..................................................................... 164 OP_FCMP_AT_1........................................................... 262
MTMP_OS..................................................................... 113 OP_FCMP_AT_2........................................................... 262
MTMP_PT_RMAX ........................................................ 162 OP_FCMP_AT_3........................................................... 262
MTMP_PT_RMIN ......................................................... 162 OP_FLT_SFC_1 ............................................................ 262
MTMP_RTD_MAX........................................................ 162 OP_FLT_SFC_2 ............................................................ 262
MTMP_RTD_MIN ........................................................ 162 OP_FLT_SFC_3 ............................................................ 262
MTMP_S ......................................................................... 47 OP_FLT_SP_1 .............................................................. 262
OP_FLT_SP_2 .............................................................. 262
OP_FLT_SP_3 .............................................................. 262
Ｎ OP_FLT_SPSFCD_1 .................................................... 262
N. U. ................................................................................ 74 OP_FLT_SPSFCD_2 .................................................... 262
N_IM ............................................................................... 50 OP_FLT_SPSFCD_3 .................................................... 262
NO_LOAD ....................................................................... 49 OP_FLT_T_R_1 ............................................................ 262
NO_VAC .......................................................................... 54 OP_FLT_T_R_2 ............................................................ 262
OP_FLT_T_R_3 ............................................................ 262
OP_ID_BASE_1 ............................................................ 262
Ｏ OP_ID_BASE_2 ............................................................ 262
OP_ID_BASE_3 ............................................................ 262
OCA ................................................................................. 21
OP_IDCNV_AT ............................................................. 435
OCA_B............................................................................. 21
OP_IM_NUM_1 ............................................................ 279
OH_ACL .......................................................................... 55
OP_IM_NUM_2 ............................................................ 279
OH_ACL_T...................................................................... 55
OP_IM_NUM_3 ............................................................ 279
OH_TR ............................................................................ 70
OP_JOG_SP01 .............................................................. 325
OH_TR_A ........................................................................ 70
OP_JOG_SP02 .............................................................. 325
OL_A ............................................................................... 22
OP_JOG_SP03 .............................................................. 325
OL_A_B ........................................................................... 23
OP_JOG_SP04 .............................................................. 325
OL20 ................................................................................ 23
OP_JOG_SP05 .............................................................. 325
OL20_B ........................................................................... 23
OP_JOG_SP06 .............................................................. 325
OL5 .................................................................................. 22
OP_JOG_SP07 .............................................................. 325
OL5_B ............................................................................. 23
OP_JOG_SP08 .............................................................. 325
OP_ACR_P_1 ................................................................ 262
OP_JOG_SP09 .............................................................. 325
OP_ACR_P_2 ................................................................ 262
OP_JOG_SP10 .............................................................. 325
OP_ACR_P_3 ................................................................ 262
OP_JOG_SP11 .............................................................. 325
OP_ACR_W1_1 ............................................................. 262
OP_JOG_SP12 .............................................................. 325
OP_ACR_W1_2 ............................................................. 262
OP_JOG_SP13 .............................................................. 325
OP_ACR_W1_3 ............................................................. 262
OP_JOG_SP14 .............................................................. 325
OP_ASPR_A_1 .............................................................. 262
OP_JOG_SP15 .............................................................. 325
OP_ASPR_A_2 .............................................................. 262
OP_LF_FAI_HF ............................................................ 256
Rev.S
524
4GBF0632
OP_LF_FAI_LF ............................................................ 256 OP_RMFC_P_2 ............................................................. 262
OP_LF_KS_FAI ............................................................ 256 OP_RMFC_P_3 ............................................................. 262
OP_LOSFUNC0_TRQ .................................................. 413 OP_RMFC_W1_1 .......................................................... 262
OP_LOSFUNC1_SP ..................................................... 413 OP_RMFC_W1_2 .......................................................... 262
OP_LOSFUNC1_TRQ .................................................. 413 OP_RMFC_W1_3 .......................................................... 262
OP_LOSFUNC2_SP ..................................................... 413 OP_SFC_A .................................................................... 265
OP_LOSFUNC2_TRQ .................................................. 413 OP_SFC_A_1 ................................................................ 262
OP_LOSFUNC3_SP ..................................................... 413 OP_SFC_A_2 ................................................................ 262
OP_LOSFUNC3_TRQ .................................................. 413 OP_SFC_A_3 ................................................................ 262
OP_LOSFUNC4_SP ..................................................... 413 OP_SFC_D .................................................................... 265
OP_LOSFUNC4_TRQ .................................................. 413 OP_SFC_D_1 ................................................................ 262
OP_MI_FBK_G_1 ......................................................... 262 OP_SFC_D_2 ................................................................ 262
OP_MI_FBK_G_2 ......................................................... 262 OP_SFC_D_3 ................................................................ 262
OP_MI_FBK_G_3 ......................................................... 262 OP_SFC_J ..................................................................... 265
OP_MI_G_E2_1 ............................................................ 262 OP_SFC_J_1 ................................................................. 262
OP_MI_G_E2_2 ............................................................ 262 OP_SFC_J_2 ................................................................. 262
OP_MI_G_E2_3 ............................................................ 262 OP_SFC_J_3 ................................................................. 262
OP_MI_L_CMP_1 ......................................................... 262 OP_SFC_P .................................................................... 265
OP_MI_L_CMP_2 ......................................................... 262 OP_SFC_P_1................................................................. 262
OP_MI_L_CMP_3 ......................................................... 262 OP_SFC_P_2................................................................. 262
OP_MI_R1_LF_1 .......................................................... 262 OP_SFC_P_3................................................................. 262
OP_MI_R1_LF_2 .......................................................... 262 OP_SL_I_DB_1 ............................................................. 262
OP_MI_R1_LF_3 .......................................................... 262 OP_SL_I_DB_2 ............................................................. 262
OP_MI_R1_SET_1 ........................................................ 262 OP_SL_I_DB_3 ............................................................. 262
OP_MI_R1_SET_2 ........................................................ 262 OP_SP_BASE2 ............................................................. 256
OP_MI_R1_SET_3 ........................................................ 262 OP_SP_DBAND ............................................................ 357
OP_MI_T2_1 ................................................................. 262 OP_TCMP_J_G ............................................................. 413
OP_MI_T2_2 ................................................................. 262 OP_TCMP_LOS ............................................................ 414
OP_MI_T2_3 ................................................................. 262 OP_TCMP_LOS_DB ..................................................... 414
OP_MOT_CURR_1 ....................................................... 262 OP_XFMR_VOLT ........................................................... 79
OP_MOT_CURR_2 ....................................................... 262 OSS ................................................................................. 45
OP_MOT_CURR_3 ....................................................... 262 OSS_FO........................................................................... 45
OP_MOT_FREQ_1........................................................ 262 OV_RTRY_F ................................................................... 28
OP_MOT_FREQ_2........................................................ 262 OV_S ............................................................................... 58
OP_MOT_FREQ_3........................................................ 262
OP_MOT_KW_1............................................................ 262
OP_MOT_KW_2............................................................ 262
Ｐ
OP_MOT_KW_3............................................................ 262 P_SW ............................................................................... 35
OP_MOT_POLE_1 ........................................................ 262 PARA_ERR ..................................................................... 44
OP_MOT_POLE_2 ........................................................ 262 PG_POS_SFT................................................................ 155
OP_MOT_POLE_3 ........................................................ 262 PHASE_SFT ................................................................. 392
OP_MOT_RPM_1 ......................................................... 262 PLD_ERR ........................................................................ 44
OP_MOT_RPM_2 ......................................................... 262 PLL_P ........................................................................... 392
OP_MOT_RPM_3 ......................................................... 262 PLL_W1 ........................................................................ 392
OP_MOT_VOLT_1 ........................................................ 262 PM_FLG_T_R ............................................................... 319
OP_MOT_VOLT_2 ........................................................ 262 PM_PH .......................................................................... 320
OP_MOT_VOLT_3 ........................................................ 262 PM_Z_DET_DLY .......................................................... 322
OP_OS_DNDT .............................................................. 423 PM_Z_DET_FREQ ....................................................... 322
OP_OS_SP .................................................................... 423 PM_Z_DET_IQ ............................................................. 322
OP_PR_A....................................................................... 376 PM_Z_DET_MODE ...................................................... 322
OP_PR_AT .................................................................... 376 PM_Z_DET_TIME ........................................................ 322
OP_PR_FLT .................................................................. 377 PN15_F ........................................................................... 44
OP_PR_LMT_INL ........................................................ 377 PP7A_RD_ADR1........................................................... 496
OP_PR_LMT_INU ........................................................ 377 PP7A_RD_ADR2........................................................... 496
OP_PR_LMT_OUT ....................................................... 377 PP7A_RD_ADR3........................................................... 496
OP_PR_P ....................................................................... 376 PP7A_RD_ADR4........................................................... 496
OP_PR_RATE ............................................................... 377 PRDATA_B0_AS........................................................... 142
OP_PR_W1.................................................................... 377 PRDATA_B1_AS........................................................... 142
OP_RATE_ACC ............................................................ 227 PRDATA_B10_AS......................................................... 142
OP_RATE_DEC ............................................................ 227 PRDATA_B11_AS......................................................... 142
OP_RCMODE1 ............................................................. 160 PRDATA_B12_AS......................................................... 142
OP_RCMODE2 ............................................................. 160 PRDATA_B13_AS......................................................... 142
OP_RDCMP_G1 ............................................................ 160 PRDATA_B14_AS......................................................... 142
OP_RDCMP_G2 ............................................................ 160 PRDATA_B15_AS......................................................... 142
OP_RDCMP_P1 ............................................................ 160 PRDATA_B2_AS........................................................... 142
OP_RDCMP_P2 ............................................................ 160 PRDATA_B3_AS........................................................... 142
OP_RMFC_P_1 ............................................................. 262
Rev.S
525
4GBF0632
PRDATA_B4_AS........................................................... 142 SCAN_WR03_GS .......................................................... 140
PRDATA_B5_AS........................................................... 142 SCAN_WR04_AS .......................................................... 138
PRE_CTT ........................................................................ 52 SCAN_WR06_GS .......................................................... 140
PRE_CTT_F .................................................................... 52 SCAN_WR07_AS .......................................................... 138
SCAN_WR07_GS .......................................................... 140
SCAN_WR08_AS .......................................................... 138
Ｑ SCAN_WR08_GS .......................................................... 140
QS_PGAIN .................................................................... 228 SCAN_WR09_AS .......................................................... 138
QSTOP_FAULT .............................................................. 74 SCAN_WR09_GS .......................................................... 140
SCAN_WR10_AS .......................................................... 138
SCAN_WR10_GS .......................................................... 140
Ｒ SCAN_WR11_AS .......................................................... 138
SCAN_WR11_GS .......................................................... 140
RATE_PPIEO ............................................................... 496
SCAN_WR12_AS .......................................................... 138
RATE_RCV_R ............................................................... 445
SCAN_WR12_GS .......................................................... 140
RCV_ADJ ...................................................................... 445
SCAN_WR13_AS .......................................................... 138
RCV_DROOP ................................................................ 445
SCAN_WR13_GS .......................................................... 140
RCV_RC_LL.................................................................. 445
SCAN_WR14_AS .......................................................... 138
RCV_TOCF_SCL .......................................................... 445
SCAN_WR14_GS .......................................................... 140
REC_F ............................................................................. 52
SCAN_WR15_AS .......................................................... 138
REV_ROT_F ................................................................... 50
SCAN_WR15_GS .......................................................... 140
RMFC_JM ..................................................................... 336
SCAN_WR16_AS .......................................................... 138
RMFC_P ........................................................................ 336
SCAN_WR16_GS .......................................................... 140
RMFC_W1..................................................................... 336
SCAN_WR17_AS .......................................................... 138
RMS_STF_LVL ............................................................. 170
SCAN_WR17_GS .......................................................... 140
ROT_F ............................................................................. 50
SCAN_WR18_AS .......................................................... 138
RTRY ............................................................................... 37
SCAN_WR18_GS .......................................................... 140
RTRY_F_EN ................................................................. 378
SCAN_WR19_AS .......................................................... 138
RTRY_INTVL ............................................................... 378
SCAN_WR19_GS .......................................................... 140
RTRY_MAX................................................................... 379
SCAN_WR20_AS .......................................................... 138
RTRY_MSK................................................................... 378
SCAN_WR20_GS .......................................................... 140
SCAN_WR21_AS .......................................................... 138
Ｓ SCAN_WR21_GS .......................................................... 140
SCAN_WR22_AS .......................................................... 138
SCAN_R_ADRS ............................................................ 135 SCAN_WR22_GS .......................................................... 140
SCAN_R_SIZE .............................................................. 135 SCAN_WR23_AS .......................................................... 138
SCAN_RCV01_AS ........................................................ 136 SCAN_WR23_GS .......................................................... 140
SCAN_RCV01_GS ........................................................ 137 SCAN_WR24_AS .......................................................... 138
SCAN_RCV02_GS ........................................................ 137 SCAN_WR25_AS .......................................................... 138
SCAN_RCV03_GS ........................................................ 137 SER_C1A ........................................................................ 42
SCAN_RCV04_AS ........................................................ 136 SER_C1B ........................................................................ 42
SCAN_RCV04_GS ........................................................ 137 SER_C2A ........................................................................ 42
SCAN_RCV05_AS ........................................................ 136 SER_C2B ........................................................................ 42
SCAN_RCV05_GS ........................................................ 137 SER_C3A ........................................................................ 42
SCAN_RCV06_AS ........................................................ 136 SER_C3B ........................................................................ 42
SCAN_RCV06_GS ........................................................ 137 SER_IUA......................................................................... 42
SCAN_RCV07_AS ........................................................ 136 SER_IUB......................................................................... 42
SCAN_RCV07_GS ........................................................ 137 SER_IVA ......................................................................... 42
SCAN_RCV08_AS ........................................................ 136 SER_IVB ......................................................................... 42
SCAN_RCV08_GS ........................................................ 137 SER_IWA ........................................................................ 42
SCAN_RCV09_AS ........................................................ 136 SER_IWB ........................................................................ 42
SCAN_RCV09_GS ........................................................ 137 SETCRC ........................................................................ 495
SCAN_RCV10_AS ........................................................ 136 SETEND ....................................................................... 495
SCAN_RCV10_GS ........................................................ 137 SETSTART ................................................................... 495
SCAN_W_ADRS ........................................................... 137 SGN_DI_EX10 .............................................................. 102
SCAN_W_SIZE ............................................................. 138 SGN_DI_EX11 .............................................................. 103
SCAN_WR01_AS .......................................................... 138 SGN_DI_EX3 .................................................................. 93
SCAN_WR01_GS .......................................................... 140 SGN_DI_EX4 .................................................................. 95
SCAN_WR02_GS .......................................................... 140 SGN_DI_EX6 .................................................................. 98
Rev.S
526
4GBF0632
SGN_DI_EX9 ................................................................ 101 SL_SP_CHK_LVL ........................................................ 274
SGN_DI1 ......................................................................... 90 SL_SP_RESTART......................................................... 274
SGN_DI2 ......................................................................... 92 SL_SS_EN_BAND ........................................................ 277
SGN_DINT_GIF ........................................................... 105 SL_SS_EN_SP .............................................................. 277
SGN_DINT3.................................................................. 104 SL_TIME_SP_ERR....................................................... 354
SGN_DOEX .................................................................. 107 SL_WOCD_DISCH ....................................................... 275
SGN_DOEX2 ................................................................ 107 SOFT_STL ...................................................................... 50
SH_READ_AS0 ............................................................. 495 SP_ERR........................................................................... 46
SH_READ_AS1 ............................................................. 495 SP_ERR2......................................................................... 46
SH_READ_AS2 ............................................................. 495 SP_LOST......................................................................... 49
SH_READ_AS3 ............................................................. 495 SP_LST_A ....................................................................... 49
SIM_FLT_IDIQ............................................................. 419 SP_PPI_PLG ................................................................. 238
SIM_J0 .......................................................................... 420 SP_SIL ............................................................................ 46
SIM_LD_TRQ ............................................................... 420 SPA1................................................................................ 74
SIM_LOSS .................................................................... 420 SPA1_T ........................................................................... 74
SIM_LOSS_W ............................................................... 420 SPA2................................................................................ 74
SIM_LOSS_W2 ............................................................. 420 SPA2_T ........................................................................... 74
SIM_MODE .................................................................. 419 SPA3................................................................................ 74
SIM_MSK_DINTG........................................................ 421 SPA3_T ........................................................................... 74
SIM_SPD_SEL.............................................................. 421 SPA4................................................................................ 74
SL_AVR_I ..................................................................... 269 SPA4_T ........................................................................... 74
SL_AVR_P..................................................................... 269 SPARE_F01_SET ......................................................... 490
SL_CHG .......................................................................... 49 SPARE_F02_SET ......................................................... 490
SL_CP_SP_ERR............................................................ 354 SPARE_F03_SET ......................................................... 490
SL_DE2_BIAS .............................................................. 269 SPARE_F04_SET ......................................................... 490
SL_DE2_G..................................................................... 269 SPARE_F05_SET ......................................................... 490
SL_DE2_G_LMT........................................................... 269 SPARE_F06_SET ......................................................... 490
SL_DFDT_GAIN........................................................... 270 SPARE_F07_SET ......................................................... 490
SL_DFDT_SP_H ........................................................... 270 SPARE_F08_SET ......................................................... 490
SL_DFDT_SP_H2 ......................................................... 270 SPARE_F09_SET ......................................................... 490
SL_DFDT_SP_L............................................................ 270 SPARE_F10_SET ......................................................... 490
SL_DFDT_SP_L2.......................................................... 270 SPARE_W01_SET ........................................................ 490
SL_DFDTLMT .............................................................. 271 SPARE_W02_SET ........................................................ 490
SL_E2_OS ..................................................................... 271 SPARE_W03_SET ........................................................ 490
SL_E2D_A ..................................................................... 271 SPARE_W04_SET ........................................................ 490
SL_E2D_AT .................................................................. 271 SPARE_W05_SET ........................................................ 490
SL_E2D_PSF ................................................................ 328 SPARE_W06_SET ........................................................ 490
SL_E2LMT_BASE ........................................................ 271 SPARE_W07_SET ........................................................ 490
SL_E2LMT_GS ............................................................. 271 SPARE_W08_SET ........................................................ 490
SL_E2LMT_OS ............................................................. 271 SPARE_W09_SET ........................................................ 490
SL_E2RC_BASE ........................................................... 272 SPARE_W10_SET ........................................................ 490
SL_E2RC_GS ................................................................ 272 SSEQ_OUT_B0_AS ...................................................... 142
SL_E2RC_OS ................................................................ 272 SSEQ_OUT_B1_AS ...................................................... 142
SL_FLT_AIO ................................................................. 280 SSEQ_OUT_B2_AS ...................................................... 142
SL_FLT_DE2 ................................................................ 272 SSEQ_OUT_B3_AS ...................................................... 142
SL_FLT_E2D_PSF ....................................................... 328 STCMD ........................................................................... 36
SL_FLT_E2Q ................................................................ 272 STPRQ ............................................................................ 75
SL_FLT_EDQFBK ........................................................ 272 SWILON ......................................................................... 36
SL_FLT_FS_R............................................................... 272 SYS_ERR ........................................................................ 38
SL_FLT_IDF ................................................................. 276 SYSTEM ......................................................................... 76
SL_FLT_IQF ................................................................. 273
SL_FLT_IQMAX ........................................................... 328
SL_FLT_MON_SP ........................................................ 273
Ｔ
SL_FLT_N..................................................................... 279 TCMP_ENB_BIT .......................................................... 414
SL_FLT_WOCD ............................................................ 273 TCNET_COM_IDX ....................................................... 143
SL_FS_R_CMP_G ......................................................... 273 TCNET_DRV1_ND ....................................................... 143
SL_I_DB ........................................................................ 273 TCNET_DRV2_ND ....................................................... 143
SL_ID_FORCE_LF ....................................................... 273 TCNET_HHLT_TM ...................................................... 143
SL_IM_D_TH ................................................................ 273 TCNET_MHLT_TM ..................................................... 143
SL_KCW_BASE ............................................................ 273 TCNET_MSCAN_TM ................................................... 144
SL_KCW_I .................................................................... 274 TCNET_OE_ND ........................................................... 144
SL_KCW_I_PSF............................................................ 328 TCNET_SYNC_ND ...................................................... 144
SL_KCW_I2 .................................................................. 274 TIME_AC_P .................................................................. 219
SL_KCW_P ................................................................... 274 TIME_ACL.................................................................... 179
SL_KCW_P_PSF........................................................... 328 TIME_AIN_FAULT ...................................................... 181
SL_LMT_IQMAX_I....................................................... 274 TIME_BR ...................................................................... 176
SL_LMT_WOC_L ......................................................... 274
Rev.S
527
4GBF0632
TIME_CEMFOFF ......................................................... 390 TIME_MVD .................................................................. 390
TIME_CFAN ................................................................. 381 TIME_OV_RTRY .......................................................... 438
TIME_CFN_ANS_DLY ................................................ 382 TIME_PLL_EDWAIT ................................................... 435
TIME_CFN_MAX ......................................................... 385 TIME_PLL_ERDET ..................................................... 435
TIME_CFN_OFF .......................................................... 381 TIME_PN_MODSW ..................................................... 426
TIME_CL ...................................................................... 170 TIME_PWB_SYNC ....................................................... 134
TIME_CODE_ERR ....................................................... 181 TIME_QSTOP............................................................... 228
TIME_CPT_END .......................................................... 406 TIME_QSTOP_FAULT ................................................ 228
TIME_CPT_FHLD_D ................................................... 407 TIME_RATE ................................................................. 227
TIME_CPT_SPHLD ..................................................... 407 TIME_RCV_TOCF........................................................ 445
TIME_CPT_VDIP_ST................................................... 406 TIME_REC_F ............................................................... 174
TIME_CTT .................................................................... 180 TIME_RNTD................................................................. 219
TIME_CUR_DIFF ........................................................ 172 TIME_ROT_F ............................................................... 351
TIME_CURCHK_CNV ................................................. 431 TIME_SP_ERR_SL....................................................... 356
TIME_DI_TRNS ............................................................. 87 TIME_SP_ERR2 ........................................................... 355
TIME_DI1_OFF .............................................................. 87 TIME_SP_RCH............................................................. 346
TIME_DI1_ON................................................................ 87 TIME_SPA1 .................................................................. 492
TIME_DI10_OFF ............................................................ 87 TIME_SPA2 .................................................................. 492
TIME_DI10_ON.............................................................. 87 TIME_SPA3 .................................................................. 492
TIME_DI11_OFF ............................................................ 87 TIME_SPA4 .................................................................. 492
TIME_DI11_ON.............................................................. 87 TIME_ST....................................................................... 228
TIME_DI2_OFF .............................................................. 87 TIME_STCMD .............................................................. 219
TIME_DI2_ON................................................................ 87 TIME_STF_INT............................................................ 170
TIME_DI3_OFF .............................................................. 87 TIME_STF_ON ............................................................. 170
TIME_DI3_ON................................................................ 87 TIME_STF2 .................................................................. 170
TIME_DI4_OFF .............................................................. 87 TIME_TL_F .................................................................. 134
TIME_DI4_ON................................................................ 87 TIME_UL ...................................................................... 364
TIME_DI5_OFF .............................................................. 87 TIME_UVA_SIL ........................................................... 389
TIME_DI5_ON................................................................ 87 TIME_VINV_PH_LOSS ............................................... 179
TIME_DI6_OFF .............................................................. 87 TIME_XFR_END.......................................................... 401
TIME_DI6_ON................................................................ 87 TIME_XFR_F................................................................ 402
TIME_DI7_OFF .............................................................. 87 TIME_XFR_SPHLD ..................................................... 403
TIME_DI7_ON................................................................ 87 TIME_XFR_SPREF ...................................................... 395
TIME_DI8_OFF .............................................................. 87 TL_CYC_TIME ............................................................. 140
TIME_DI8_ON................................................................ 87 TL_F1 .............................................................................. 40
TIME_DI9_OFF .............................................................. 87 TL_F2 .............................................................................. 40
TIME_DI9_ON................................................................ 87 TL_F3 .............................................................................. 40
TIME_DISTB_RTRY .................................................... 437 TL_F4 .............................................................................. 40
TIME_DS ...................................................................... 181 TL_OP1_DT .................................................................. 147
TIME_FOFF ................................................................. 219 TL_OP1_ST................................................................... 147
TIME_FON ................................................................... 219 TL_OP2_DT .................................................................. 147
TIME_GR ...................................................................... 177 TL_OP2_ST................................................................... 147
TIME_H_OCA_DET ..................................................... 172 TL_OP3_DT .................................................................. 147
TIME_HB_DOWN ........................................................ 134 TL_OP3_ST................................................................... 147
TIME_LMT_WOC......................................................... 275 TL_OP4_DT .................................................................. 147
TIME_LOWF_OFF ....................................................... 170 TL_OP4_ST................................................................... 147
TIME_MFAN ................................................................ 180 TL_PC_NO .................................................................... 141
TIME_MPBET_QS ....................................................... 452 TL_SELF_NO ............................................................... 141
TIME_MPBV_QS.......................................................... 453 TOOL_GATEWAY ........................................................ 489
TIME_MPCFMR_OF.................................................... 461 TOOL_IP1 ..................................................................... 489
TIME_MPCFMR_ON ................................................... 461 TOOL_IP2 ..................................................................... 489
TIME_MPCFMR_QS .................................................... 453 TOOL_IP3 ..................................................................... 489
TIME_MPCFMR_ST .................................................... 461 TOOL_IP4 ..................................................................... 489
TIME_MPCW_QS......................................................... 454 TOOL_SUBNET_MSK ................................................. 489
TIME_MPCWT_QS ...................................................... 453 TRB_FAULT_TM ......................................................... 184
TIME_MPIART_QS ...................................................... 454 TRB_L_FAULT_TM ..................................................... 184
TIME_MPOART_QS .................................................... 454 TRB_L01_OP_AS.......................................................... 186
TIME_MPOLHF_QS .................................................... 453 TRB_L02_OP_AS.......................................................... 186
TIME_MPOLHP_QS .................................................... 453 TRB_L03_OP_AS.......................................................... 186
TIME_MPOLLP_QS ..................................................... 453 TRB_L04_OP_AS.......................................................... 186
TIME_MPOLPR_OF .................................................... 468 TRB_L05_OP_AS.......................................................... 186
TIME_MPOLPR_ON .................................................... 468 TRB_L06_OP_AS.......................................................... 186
TIME_MPSPH_A.......................................................... 464 TRB_L07_OP_AS.......................................................... 186
TIME_MPSPH_ON ...................................................... 464 TRB_L08_OP_AS.......................................................... 186
TIME_MPSPH_ST........................................................ 464 TRB_L09_OP_AS.......................................................... 186
TIME_MPSWT_QS....................................................... 455 TRB_L10_OP_AS.......................................................... 186
TIME_MPWLK_QS ...................................................... 455 TRB_L11_OP_AS.......................................................... 186
Rev.S
528
4GBF0632
TRB_L12_OP_AS.......................................................... 186 U2_OVP .......................................................................... 18
TRB_L13_OP_AS.......................................................... 186 U3_C_OCA ...................................................................... 18
TRB_L14_OP_AS.......................................................... 186 U3_CELL_F .................................................................... 20
TRB_L15_OP_AS.......................................................... 186 U3_FUSE ........................................................................ 19
TRB_L16_OP_AS.......................................................... 186 U3_GPSF ........................................................................ 19
TRB_TIME_FAST ........................................................ 183 U3_LINK_F .................................................................... 19
TRB_TIME_LONG ....................................................... 183 U3_OH ............................................................................ 19
TRB_TIME_STD........................................................... 183 U3_OVN .......................................................................... 18
TRB_TRIG_MOD.......................................................... 183 U3_OVP .......................................................................... 18
TRB01_OP_AS .............................................................. 185 U4_C_OCA ...................................................................... 18
TRB02_OP_AS .............................................................. 185 U4_CELL_F .................................................................... 20
TRB03_OP_AS .............................................................. 185 U4_FUSE ........................................................................ 19
TRB04_OP_AS .............................................................. 185 U4_GPSF ........................................................................ 19
TRB05_OP_AS .............................................................. 185 U4_LINK_F .................................................................... 19
TRB06_OP_AS .............................................................. 185 U4_OH ............................................................................ 19
TRB07_OP_AS .............................................................. 185 U4_OVN .......................................................................... 18
TRB08_OP_AS .............................................................. 185 U4_OVP .......................................................................... 18
TRB09_OP_AS .............................................................. 185 U5_C_OCA ...................................................................... 18
TRB10_OP_AS .............................................................. 185 U5_CELL_F .................................................................... 20
TRB11_OP_AS .............................................................. 185 U5_FUSE ........................................................................ 19
TRB12_OP_AS .............................................................. 185 U5_GPSF ........................................................................ 19
TRB13_OP_AS .............................................................. 185 U5_LINK_F .................................................................... 19
TRB14_OP_AS .............................................................. 185 U5_OH ............................................................................ 19
TRB15_OP_AS .............................................................. 185 U5_OVN .......................................................................... 18
TRB16_OP_AS .............................................................. 185 U5_OVP .......................................................................... 18
TRB17_OP_AS .............................................................. 185 U6_C_OCA ...................................................................... 18
TRB18_OP_AS .............................................................. 185 U6_CELL_F .................................................................... 20
TRB19_OP_AS .............................................................. 185 U6_FUSE ........................................................................ 19
TRB20_OP_AS .............................................................. 185 U6_GPSF ........................................................................ 19
TRB21_OP_AS .............................................................. 185 U6_LINK_F .................................................................... 19
TRB22_OP_AS .............................................................. 185 U6_OH ............................................................................ 19
TRB23_OP_AS .............................................................. 185 U6_OVN .......................................................................... 18
TRB24_OP_AS .............................................................. 185 U6_OVP .......................................................................... 18
TRB25_OP_AS .............................................................. 185 UL_A ............................................................................... 25
TRB26_OP_AS .............................................................. 185 UL_T ............................................................................... 25
TRB27_OP_AS .............................................................. 185 UPS_ERR ........................................................................ 31
TRB28_OP_AS .............................................................. 185 UV_MPSF ....................................................................... 54
TRB29_OP_AS .............................................................. 185 UV_READY .................................................................... 75
TRB30_OP_AS .............................................................. 185 UV_SIL ........................................................................... 28
TRB31_OP_AS .............................................................. 185 UVA ................................................................................. 75
TRB32_OP_AS .............................................................. 185 UVA_EX .......................................................................... 34
TRB33_OP_AS .............................................................. 185 UVA_SIL ......................................................................... 54
TRB34_OP_AS .............................................................. 185 UVD ................................................................................ 28
TRB35_OP_AS .............................................................. 185 UVS ................................................................................. 34
TRB36_OP_AS .............................................................. 185 UVS1_ANS...................................................................... 34
TRB37_OP_AS .............................................................. 185 UVS2_ANS...................................................................... 34
TRB38_OP_AS .............................................................. 185
TRTMP_OS ................................................................... 165
Ｖ
Ｕ V1_C_OCA ...................................................................... 18
V1_CELL_F .................................................................... 20
U1_C_OCA ...................................................................... 18 V1_FUSE ........................................................................ 19
U1_CELL_F .................................................................... 20 V1_GPSF......................................................................... 19
U1_FUSE ........................................................................ 19 V1_LINK_F ..................................................................... 19
U1_GPSF ........................................................................ 19 V1_OH............................................................................. 19
U1_LINK_F .................................................................... 19 V1_OVN .......................................................................... 18
U1_OH ............................................................................ 19 V1_OVP ........................................................................... 18
U1_OVN .......................................................................... 18 V2_C_OCA ...................................................................... 18
U1_OVP .......................................................................... 18 V2_CELL_F .................................................................... 20
U2_C_OCA ...................................................................... 18 V2_FUSE ........................................................................ 19
U2_CELL_F .................................................................... 20 V2_GPSF......................................................................... 19
U2_FUSE ........................................................................ 19 V2_LINK_F ..................................................................... 19
U2_GPSF ........................................................................ 19 V2_OH............................................................................. 19
U2_LINK_F .................................................................... 19 V2_OVN .......................................................................... 18
U2_OH ............................................................................ 19 V2_OVP ........................................................................... 18
U2_OVN .......................................................................... 18 V3_C_OCA ...................................................................... 18
Rev.S
529
4GBF0632
V3_CELL_F .................................................................... 20 VF_STL_P ..................................................................... 292
V3_FUSE ........................................................................ 19 VF_STL_W1 .................................................................. 292
V3_GPSF ......................................................................... 19 VF_STLONSP ............................................................... 292
V3_LINK_F ..................................................................... 19 VF_STLPOINT ............................................................. 292
V3_OH ............................................................................. 19 VF_TIME_DVCMP ....................................................... 290
V3_OVN .......................................................................... 18 VF_TIME_FCMP .......................................................... 290
V3_OVP ........................................................................... 18 VF_TQZ_A .................................................................... 294
V4_C_OCA ...................................................................... 18 VF_TQZ_AT .................................................................. 294
V4_CELL_F .................................................................... 20 VF_TQZ_LV .................................................................. 294
V4_FUSE ........................................................................ 19 VF_TQZ_P..................................................................... 294
V4_GPSF ......................................................................... 19 VF_TQZ_W1 ................................................................. 294
V4_LINK_F ..................................................................... 19 VF_TRQBST_GAIN...................................................... 287
V4_OH ............................................................................. 19 VF_V_ADJ .................................................................... 293
V4_OVN .......................................................................... 18 VF_VCMP_P ................................................................. 293
V4_OVP ........................................................................... 18 VF_VCMP_W1 .............................................................. 293
V5_C_OCA ...................................................................... 18 VF_VDCR_A ................................................................. 295
V5_CELL_F .................................................................... 20 VF_VDCR_AT ............................................................... 295
V5_FUSE ........................................................................ 19 VF_VDCR_LV ............................................................... 295
V5_GPSF ......................................................................... 19 VF_VDCR_P ................................................................. 295
V5_LINK_F ..................................................................... 19 VF_VDCR_W1 .............................................................. 295
V5_OH ............................................................................. 19 VF_WS_ADJ ................................................................. 297
V5_OVN .......................................................................... 18 VF_WS_ADJ2 ............................................................... 297
V5_OVP ........................................................................... 18 VF_WSCMP_EN........................................................... 297
V6_C_OCA ...................................................................... 18 VFBK_F .......................................................................... 53
V6_CELL_F .................................................................... 20 VFBK_F_A ...................................................................... 53
V6_FUSE ........................................................................ 19 VINV_PH_LOSS ............................................................. 32
V6_GPSF ......................................................................... 19 VPLL_ERR...................................................................... 58
V6_LINK_F ..................................................................... 19
V6_OH ............................................................................. 19
V6_OVN .......................................................................... 18
Ｗ
V6_OVP ........................................................................... 18 W1_C_OCA ..................................................................... 18
VAC_PH_LOSS............................................................... 32 W1_CELL_F ................................................................... 20
VAC_ROT_F ................................................................... 32 W1_FUSE ....................................................................... 19
VF_ACR_PLL_P ........................................................... 296 W1_GPSF ........................................................................ 19
VF_ACR_PLL_W1 ........................................................ 296 W1_LINK_F .................................................................... 19
VF_ASPR_P .................................................................. 298 W1_OH ............................................................................ 19
VF_ASPR_W1 ............................................................... 298 W1_OVN ......................................................................... 18
VF_CP_ILIM ................................................................. 298 W1_OVP .......................................................................... 18
VF_CURVE_GAIN ....................................................... 283 W2_C_OCA ..................................................................... 18
VF_DLT_ID_GAIN ....................................................... 298 W2_CELL_F ................................................................... 20
VF_DVCMP_A .............................................................. 289 W2_FUSE ....................................................................... 19
VF_DVCMP_AT ............................................................ 289 W2_GPSF ........................................................................ 19
VF_DVCMP_LSP.......................................................... 289 W2_LINK_F .................................................................... 19
VF_DVCMP_LSP_G ..................................................... 289 W2_OH ............................................................................ 19
VF_FCMP_A ................................................................. 290 W2_OVN ......................................................................... 18
VF_FCMP_AT............................................................... 290 W2_OVP .......................................................................... 18
VF_FLT_ID_F ............................................................... 297 W3_C_OCA ..................................................................... 18
VF_FLT_ILIM............................................................... 298 W3_CELL_F ................................................................... 20
VF_FLT_IQ_F ............................................................... 288 W3_FUSE ....................................................................... 19
VF_FLT_SP_R .............................................................. 287 W3_GPSF ........................................................................ 19
VF_FLT_STL ................................................................ 292 W3_LINK_F .................................................................... 19
VF_FLT_TQZ ................................................................ 294 W3_OH ............................................................................ 19
VF_FLT_VCMP ............................................................ 293 W3_OVN ......................................................................... 18
VF_FLT_VDCR ............................................................. 294 W3_OVP .......................................................................... 18
VF_LMT_STL ............................................................... 292 W4_C_OCA ..................................................................... 18
VF_LMT_VCMP ........................................................... 293 W4_CELL_F ................................................................... 20
VF_LMT_VDCR ............................................................ 295 W4_FUSE ....................................................................... 19
VF_LMT_WS_GAIN ..................................................... 297 W4_GPSF ........................................................................ 19
VF_LSP_VBST.............................................................. 286 W4_LINK_F .................................................................... 19
VF_LSP_VBSTSP ......................................................... 286 W4_OH ............................................................................ 19
VF_MVD_EN ................................................................ 296 W4_OVN ......................................................................... 18
VF_SP_TRQBST ........................................................... 287 W4_OVP .......................................................................... 18
VF_SPL_RATE_EN ...................................................... 285 W5_C_OCA ..................................................................... 18
VF_SRCH_IQ_LV ......................................................... 291 W5_CELL_F ................................................................... 20
VF_SRCH_IQ_MAX ..................................................... 291 W5_FUSE ....................................................................... 19
VF_SRCH_RATE .......................................................... 291 W5_GPSF ........................................................................ 19
VF_SRCH_SP_G ........................................................... 291
Rev.S
530
4GBF0632
W5_LINK_F .................................................................... 19 WORD_OUT4_BN ........................................................ 496
W5_OH ............................................................................ 19
W5_OVN ......................................................................... 18
W5_OVP .......................................................................... 18
Ｘ
W6_C_OCA ..................................................................... 18 XFR_CYCLE ................................................................. 401
W6_CELL_F ................................................................... 20 XFR_FAIL ....................................................................... 51
W6_FUSE ....................................................................... 19 XFR_INCMP ................................................................... 51
W6_GPSF ........................................................................ 19 XFR_PLL_A .................................................................. 403
W6_LINK_F .................................................................... 19 XFR_PLL_AT................................................................ 403
W6_OH ............................................................................ 19 XFR_PLL_P .................................................................. 403
W6_OVN ......................................................................... 18 XFR_PLL_W1 ............................................................... 403
W6_OVP .......................................................................... 18 XFR_QSHIFT ............................................................... 404
WORD_OUT1_AS ......................................................... 496 XFR_TOP_SLIP ............................................................ 404
WORD_OUT1_BN ........................................................ 496 XFR_V_GAIN ............................................................... 402
WORD_OUT2_AS ......................................................... 496
WORD_OUT2_BN ........................................................ 496
WORD_OUT3_AS ......................................................... 496 Ｚ
WORD_OUT3_BN ........................................................ 496
Z_PLS_A ......................................................................... 58
WORD_OUT4_AS ......................................................... 496
Rev.S
531
TOSHIBA MITSUBISHI-ELECTRIC
INDUSTRIAL SYSTEMS CORPORATION
TM_WDC50017C

4GBF0632 - MEDIUM VOLTAGE INVERTER TMdrive-MVe2 Function Manual PDF

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4GBF0632 - MEDIUM VOLTAGE INVERTER TMdrive-MVe2 Function Manual PDF

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Medium Voltage IGBT Inverter

1 Application Equipment and Usage Notes

DeviceNetTM is a registered trademark of ODVA (Open DeviceNet Vendor Association).

To prevent electric shock accidents

1.2 Reading this Manual

How to Read [2. Failure Signal Explanation]

How to Read [3.Parameter Explanation]

2 Description of Equipment Protection and Fault Signals

Fig. 2.a TMdrive-MVe2 Protection System Diagram

Pet name Contents Type

Mask setting (Temporary variable) (Ex.): MSK_BLR1_TT etc.

Fault input 15 Fault output 15

Fault input 0 Fault output 0

Parameter For a fault needed to mask or to remove mask automatically, 0

The mask setting (parameter) and mask setting (temporary

Fig. 2.b Schematic diagram of fault signal mask process

Table 2.1 shows the main protective functions of the TMdrive-MVe2.

*1 and *2 in the tables represent the following notes.

Table 2.1(a) Main Protective Functions

Table2.1(b) Main Protective Functions

Table2.1(c) Main Protective Functions

Table 2.2 List of Fault Codes 1

Table 2.3 List of Fault Codes 2

Table 2.4 List of Fault Codes 3

Table 2.5 List of Fault Codes 4

xn_OVP (x=U, V, W, n=1~6)

xn_OVN (x=U, V, W, n=1~6)

xn_OH (x=U, V, W, n=1~6)

xn_GPSF (x=U, V, W, n=1~6)

xn_LINK_F (x=U, V, W, n=1~6)

xn_FUSE (x=U, V, W, n=1~6)

xn_CELL_F (x=U, V, W, n=1~6)

2.1.2 Current-related protection

(2) Overload detection

Type of Overload protection Inverter setting Converter setting

Fig 2.1.1 Allowable Overload Operation Pattern

(3) Current limit timer

Fig 2.1.2 Allowable Overload Operation Pattern

(4) Low load current detection

(5) HCT healthy check

CURU_CNV, CURV_CNV, CURW_CNV

(6) Difference current detection

CURU_DIFF, CURV_DIFF, CURW_DIFF

2.1.3 Voltage protection

2.1.4 Main circuit and control power supply protection

(1) Control power supply failure

Fig 2.1.3 Control power lost detection time

(2) Output contactor open

(1) During operation of hardware gate block

(3) Cell inverters communication is not healthy.

(4) PWB board’s jumper setting is not correct.

(5) Hardware gate block wire broken

2.1.5 Operation-related protection

(2) External equipment electrical ready condition

(3) External interlock

(4) Panel interlock switch

2.1.6 Control circuit-related protection

(1) CPU error

(2) System setting error

(5) FPGA errors

(4) Transmission error

(5) Serial communication error

1 and 2 in the tables represent the following notes.