A Tunable Image Reject Notch Filter Integrated in

Conventional LNA Topology.

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I. BACKGROUND
This template, modified in MS Word 2007 and saved as a
“Word 97-2003 Document” for the PC, provides authors
with most of the formatting specifications needed for
preparing electronic versions of their papers.
II. DESCRIPTION
In the Project, the integrated notch filter combined with
standard LNA topology illustrated in figure 1 as presented
by Rogers et al [5] is analyzed.
to tune the filter. For process variation, Isharp is to be tuned as
well for cancellation of resonator losses. The inductors Lb,, Lc
are to be tuned to provide simultaneous noise and power
matching of the circuit in passband [6]. The tank comprised
of LT, CT, tuned to the passband frequency, can provide
some additional image rejection. While accomplishing
satisfactory image rejection, we need to take many factors
such as noise figure, non-linearity (IIP3 and 1-dB
compression point), bandwidth and stability into
consideration.
III. SIMULATION IDEAS
We plan to start with image reject notch filter integrated
in a standard LNA topology proposed by Rogers et al as
illustrated in figure 1 [5]. In this paper, the tuned values and
sizes of components are not presented. We intend to
determine the optimum values of the components in the
design of figure 1 and meet the specifications achieved by
Rogers et al. In addition, we want to explore any scope for
further improvement. We plan to carry out the simulation in
ADS (Advanced Design Systems) platform.
First, we plan to analyze the proposed notch filter
integrated in LNA topology and estimate the analytical range
of components and stability constraints to meet the target
specifications for the design. We intend to use small signal
models, review literatures relevant to the design and analysis
[5-9] and use ADS simulations to achieve the target
specifications. Then, we want to explore further provision for
optimizing the components using simulations to improve the
performance of notch filtering and LNA using simulations.
The final results will be compared with the target
specifications achieved by Rogers et al [5]. Finally, we want
to evaluate the performance of the design in contrast to
relatively recent advances in similar integrated image reject
filtering as presented in [10,11] and if possible incorporate
any upgrade in the design.

Figure 1: LNA circuit with resonator placed at the emitter to

provide a high impedance at the undesired image frequency [5]
REFERENCES
The primary objective is to be accomplished is to achieve
[1] J.A. Macedo, and M.A. Copeland, “A 1.9 GHz silicon receiver with
satisfactory image rejection with the depicted notch filter monolithic image filtering,” IEEE J. Solid- State Circuits, Vol. 33, pp.
integrated with conventional LNA topology. We want to 378-386, March 1998.
achieve the objective for the system operating at a frequency [2] J.W.M. Rogers, J.A. Macedo, C. Plett, “A completely integrated
of 5GHz. The resonator at the emitter need to be tuned such receiver front-end with monolithic image reject filter and VCO,”
that it presents high impedance at the image frequency. As a IEEE RFIC Symposium, pp. 143-146, June 2000.
result, the image will be reflected. To compensate for loses
associated with LC resonator, the active circuitry must be
employed as shown in figure 1. A varactor is used for C f2_var

Project Proposal (Group 1), ECSE 536-RF Microelectronics

[3] M.A. Copeland, S.P. Voinigescu, D. Marchesan, P. Popescu, M.C.
Maliepaard, “5-GHz SiGe HBT monolithic radio transceiver with
tunable filtering,” IEEE Transactions on Microwave Theory and
Techniques, vol. 48, pp. 170- 18 1, Feb. 2000.
[4] H. Samavati, H.R. Rategh, T:H. Lee, “A 5-GHz CMOS wireless LAN
receiver front-end,” IEEE J. Solid-state Circuits, vol. 35, pp. 765-772,
May 2000.
[5] J. W. M. Rogers and C. Plett, "A completely integrated 1.8 volt 5
GHz tunable image reject notch filter," in 2001 IEEE Radio
Frequency Integrated Circuits (RFIC) Symposium (IEEE Cat.
No.01CH37173), 2001, pp. 75-78.
[6] S.P. Voinigescu, M.C. Maliepaard, J.L. Showell, G.E. Babcock, D.
Marchesan, M. Schroter, P. Schvan, and D.L. Harame, “A scalable
high-frequency noise model for bipolar transistors with applications to
optimal transistor sizing for low-noise amplifier design” IEEE J.
Solid-state Circuits, vol. 32, pp. 1430-1439, Sept. 1997
[7] Behzad Razavi, RF Microelectronics, 1998 Prentice Hall.
[8] T. H. Lee, The Design of CMOS Radio Frequency Integrated Circuits,
1998 Cambridge University Press.
[9] A.M. Niknejad and R.G. Meyer, “Analysis, design, and optimization
of spiral inductors and transformers for Si RF IC’s,’’ IEEE J. Solid-
state Circuits, vol. 33, pp. 1470-1481, Oct. 1998.
[10] L. C. Lee, A. K. b. A'ain, and A. V. Kordesch, "A 2.4-GHz CMOS
Tunable Image-Rejection Low-Noise Amplifier with Active
Inductor," in APCCAS 2006 - 2006 IEEE Asia Pacific Conference on
Circuits and Systems, 2006, pp. 1679-1682.
[11] Y. Zheng, S. J. Wong, and Y. Xu, "Wideband monolithic tunable
high-Q notch filter for image rejection in RF application," ed: Google
Patents, 2006.