12 Design an op-amp

differentiat-
operation, and discuss the ca
es of output waveform distorcaus
ing circuit to produce given
a

determine its upper tion.

output, and
operating fequency
14 Design an op-amp integrating
13 Draw the circuit diagram for an circuit to produce a given
out
op-amp integrating
circuit. Ske- put, and determine its lower
teh tvpical input and output operating frequency.
waveforms, explain the circuit

INTRODUCTION

Op-amps are widely used in circuits where the output is switched between
the positive and negative saturation levels. Positive feedback is employed in
these circuits, and no frequency compensation is required. In the simplesto
op-amp switching circuits, the zero crossing detector, one input is grounded
while the signal is applied to the other input. The output changes state when
the signal crosses the zero voltage level. The Schmitt trigger circuit, which is
essentialy a voltage level detector with positive feedback, has upper and
lower input trigger voltages that cause the output to change from one
extreme to the other. A comparator is an integrated circuit similar to an op-
circuit
except that it is designed only for switching. differentiating
A
amp
of the input
produces an output voltage proportional to the rate-of-change
to the area
voltage, and the output from an integrating circuit is proportional
covered by the input waveform.

8-1 OP-AMPS IN SWITCHING CIRCUITS

Output Voltage Swing

n switching applications, the op-amp output is normally switched betw
the positive and negative saturation voltages (+Vofsat) and-Vofsat) Ined
voltage change that occurs is known as the output voltage swing. Formauy
amps (such as a 741), the output saturation voltages are typically the su
Itage
voltage levels minus 1 V. Thus, as illustrated in Fig. 8-1(a), the output vol
sWing is

AV. Vdsat)-(-Vofsat)
(8-1)

AV(Vcc-1 V)-(VEE +1 V)
rough approximation. It could be 2 or 0.5
The 1 V drop is only a V
have the olOupu
upon the particular op-amp. However, many op-amps can
c a n have
rop). Asme
*
switched from supply level to the other (there is no 1 V
one
drop
tioned in Section 2-3, this is known as rail-to-rail operation.

Maximum Differential Input Voltage refers

in Section 23 of
The input voltage range for an op-amp, as discussed
only to linear applications. In switching applications, one input
 Chapter 8 Switching, Differentiating, and Integrating Circuits
175
Input Input
PW
PW
+ofsat) 4+of sat)
AV AV
Output Output
AV
o(sat)
AV%
Vo(sat)
At At At At
(a) Output distortion caused
by slow slew rate
(b) Output distortion is
minimized if At <<t
Figure 8-1 In op-amp switching applications, the output voltage usually switches
between positive and negative saturation levels. The op-amp SR can produce output
waveform distortion.
the op-amp may be grounded while a
large positive or negative voltage is
applied to the other terminal [see Fig. 8-2(a)]. Thus, there is a large differen-
tial input voltage. In this case, one of the op-amp input transistors may have
its base-emitter junction reverse-biased. A
typical BJT cannot survive more
than 5 V of base-emitter reverse bias; however, most op-amps are designed to
handle large differential input voltages. Some have a maximum
diferential
riput Doltage specified, and where this is lower than the applied input volt-
age, an external limiting circuit may be required (see Section 9-3).
Slew Rate
ASdiscussed in Sections 2-6 and 5-4, the maximum switching speed, or the
e-of-change of the op-amp output voltage, is termed the slew rate (SR). In
Swtching applications a step voltage is usually applied to the op-amp input,
a the output that results may be distorted by the effects of the SR. This is
strated in Fig. 8-1(a), where the rise and fall times of the input square
wave
t
arerisetooandsmall (compared to the pulse width) to be noticeable, but the
fall times are large enough to substantially change the shape
e waveform. The output rise and fall times are dictated by the op-amP
SR. From
Eq. 2-10
At= AV%
SR
Ift
a n d fall times of the output are not greater than 1070 O
form pulse width (Pw), the output will at least look like rectangular wav a
see
ISee Fig. 8-1(b)]
Fig. 8-10 h i s may be an acceptable amount distortion in some situd
tions. Other ciro l c e s might require output rise and fall times much
 176 Operational Amplifier
smaller than 10% of pulse width. Whatever the sitss
op-amp minimum SR can be determined from Eq. 2-10 tion, the requir
Frequency Compensation
Op-amps employ in nonlinear applicati where the
hed from one extreme to the other normally do not require tputs are switc.
pensation. There is no ac feedback when the output is in a stead quency com
Tated condition. n fact, the feedback in switching circuits is ate satu
tive de quantity, rather than negative ac. So, the ac stabilitv codyà poi
important in linear applications, do not apply in
op-amp switching rations,
However, it should be noted that some applications classified
in as
ircits
nonlinea
the op-amp circuit may actually be functioning
as a linear
amplifier
Section Review
S-1.1 Discuss the effects of output voltage swing, maximum
input voltage, and SR upon op-amps switching circuits.
differentia
82 VOLTAGE LEVEL DETECTORS
Zero Crossing Detector
The zero
crossing detector circuit in Fig. 8-2(a) is simply an op-amp with the
inverting input terminal grounded and the input signal applied to the nonire
verting input. When the input is above the
rated at its
ground level, the output is sat
positive maximum, and when the input is below the ground leve,
+Vcc Output
Input +Vo(sat)
-VEE
(a) Noninverting zero -Vo(sat)
crossing detector
Input
+Vo(sat)
Output
(b) Zero crossing -Vo(sat)
Figure 8-2 Op-amp detector input and output
output switches connected to waveforms O S s i n gdetector
between positivefunction
inpu
tion as a nonir
voltage crosses zero. and noninverting the
t i m e
negative saturation a c h
 Chapter8 Switching, Differentiating, and Integrating
Circuits 177
the output is at its negative maximum level. This is
aut illustrated by the input
waveforms, which
show that the
output voltage changes from
ane extreme to the other cach time the
input voltage crosses zero. As illus-
i n Rig.
tr 8-2(b), the input waveform could have any shape (sinusoidal,
mlse, ramp, etc.), and the output will always be a
The actual input voltage that causes the rectangular-type wave.
output to switch is not
a voltage (typically 100 pV) above or below precisely
but some very small
de-
pending upon the op-amp open-loop gain. zero,
Input
+Vcc
+o(sat)
output
Vo(sat)
(a) Inverting zero crossing detector and input and output waveforms
Input
+Vcc - VR2
R +VcC
-+Vo(sat)
Vo\
Output
Vo -------
Vo(sat)
(6) Voltage level detector and
input and output waveforms
gure 8-3 Op-amp connected as an inverting zero
ing
voltage level detector. crossing detector and as a noninvert-
Decause the
output voltage from the circuit in
Fig. 8-2(a) always moves in
POSIve direction when the input crosses zero from
Cit can be classified negative to positive, the
nonin as a
noninverting zero crossing detector. If the
op-amp
cng input is grounded and the signal is applied to the
PTO ig. 8-3(a), the output is negative when the input is above inverting
the
a n d vice versa. Because of the waveform inversion, this circut
tderting zero crossing detector; also referred to as an
iOE
Example 8-1
If the
zero cros
Supply, determine
Supply, deto g detector in Fig. 8-3(a)
e
uses a 741 with a t15 V
the typical output voltage swing and the typical input
op-amp
178 Operetional Amplifier
voltage level
above and below ground level at which
the the outp swite
voltave
the rise time of the output
Also calculate
Solution
FromFq. 8-1
AV(Vcc- 1 V) -(VEE + 1 V) (15 =
= 28 V =t 14 V
V-1V)--15V
200 000 (typical) and SR =
0.5 V/us.
For the 741, Ao1 =
+14 V
v Ao 200000
= 70 uV
From Eq. 2-10
AV 28 V
At
SR0.5 V/ws
=
56 us
Level Detector
The circuit in Fig. 8-3(b) has the op-amp inverting input biased to a positire
level via a voltage divider (R1 and Rz). The bias voltage level (VRz) could bea
negative quantity instead of positive. The waveforms show that the output
voltage switches levels when the input voltage crosses the bias voltagelevel
This circuit is appropriately named a voltage level detector.
No design calculatiorns are involved in using an op-amp as a zero crossin
detector, and for the level detector only the voltage divider has to De
Sgned. For both applications, a suitable op-amp must be selected. Volag
level detectors and zero Com
crossing detectors are sometimes referred to ad
parators because the input voltage at one terminal is being comparedt the
nput voltage at the other input terminal. This term should not contused
with the
De
integrated circuit comparator discussed in Section&-o
Voltage Level Monitor
The voltage level detector in Fig. 8-4(a) monitors its own supply
z andVa
(Vcc).The op-amp and
(derived from Vcc) inverting input is biased to referencevoltage
is applied to hen Vccislo
enough to make VR3 < Vz, the the noninverting termua
and
raiseh
so the
light-emitting diode op-amp output is low (h 1h to
above Vz the (LED) is off. When Vcc is nigd the Lrais LED
e
op-amp the
ergized. Thus, the LEDoutput switches to high (near VcC)
voltage
indicates when Vcc is above a pie etermir
a predetermine
level.
84a:0
Suppose that the
op-amp in Fig.
input
connert
inverting input is connected terminals are
witched
to the to swiinputi s
D1, and the noninvert Va3
n p u t i sa b o v e
R2R3 junction. Now, the op-amp output is low**
82
182 Operetional Amplifier
supply exceeds 11 V. Thus, LED D, is energized whilele . .
A output switches to +Vs to energize LED
D3 during Vs 11V.
Note the curve at the top of the the
superimposed upon the 12 V dc supply.waveforms due to thehen
output Si
enmViVyelar s
finSimila
2Vs SineWav
Practice Problem
8-2.1 Design an op-amp circuit in
as
Fig. 8-5 to
monitor
indication is to be produced when the a V
9
8V supply is above 10 Vsuppl
or
y. A he
or below
A-3 INVERTING SCHMITT TRIGGER
CIRCUIT
Circuit Operation
A Schmitt
trigger circuit is a fast-operating
input voltage arrives at a level voltage level detector. When
determined t-
output voltage switches rapidly between its by the circuit components. -
maximum negative level. An maximum positive level andi
shown in Fig. 8-7 op-amp inverting Schmitt trigger circuit
looks like a
together with input and output waveforms. The circ
the input
noninverting amplifier, except for the important difference
voltage (7;) is applied to the th
back voltage (Vrz) inverting
goes to the noninverting
input terminal and the leee
input.
+Vcc Input
-VRa
Vo
-+
VeE Vo
ofsat)
Output
VRzR
(a) Inverting Schmitt -Vosa
Figure 8-7
trigger circuit (6) Input and output waveforms
ASchmitt
between negative andtrigger circuit is a fast-operating level detector that
swicn
circuit positive
output goes output voltagelevels. In theinverting
trigger
shown, the chmitt
negative when the input goes po tive,
viceand
versa
When the
op-amp
output is at its positive maximum level(+Vata
a
positive quantity. Thus,
nal is with maximum te
vj at the ground
positive with groun level, the
inverting
output remains at respect to
+Vofsat). To
the
inverting terminal,
ar
d consequenty
tage>
to raise the
inverting change
change
input terminal
the output
output level,
leves the it at the n
ninvas
ing terminal, that is, above above
the level of
the tage level at the no rere
voltaf
to as the is
upper triggering +VR2.
R2. So, the voltage
volta +
level
circut
or the
When the circuit point (UTP) for
upper triggerpoint
output is at its el (-Vodsat
a
negative quantity. The negative maximum E ctto4
noninverting terminal is negaive hespe
egative with respect
 Chapter 8
Switching, Differentiating, and Integrating
Circuits 183
rorting terminal, causing the output to remain at
will now be changed only when the inverting input -Vofaat).
The output level
wil
voltage is driven
thevoltage level at the noninverting terminal (below -VR2). In this casebelow
is a lower triggering level or ower Irigger point (LTP) -V
Note that after the instantaneous level of v; has
increased to the UTP and
has switched to -Vo(sat), VR2 1S a negative
quantity and the
at Vsat) even when di falls below the UTP. Switch over output remains
from -Volsat to
V eat) does not occur until Uj LTP (-VR2).
=
to the LTP and v, has switched to
Similarly, after v has been
re
+Volsat), the output remains at
+Vdsat) when oj is increased above the LTP. Switch over from
-Vosat) does not occur again until v, = UTP. +Volsat) to
Positive Feedback
As discussed, the Schmitt trigger output switches from
when the input voltage is raised to the UTP and positive to negative
switches from negative to
positive when the input is decreased to the LTP. When vj is raised
microvolts above the UTP, the op-amp output just few
begins to move in a negative
direction, causing VR2 to decrease, thus making vj more
to VR2. In this way, the differential input voltage positive with respect
the
causing to switch
output
from +Vosat) to -Vosat) is increased as the
output switches levels. This is a
positive feedback, and it causes the output to switch very
extreme to the other. Just how rapidly from one
of course, still dictated
rapidly the Schmitt trigger output switches is,
by the op-amp SR.
Triggering Points
When the output voltage of the circuit in
level (+V), the
Fig. 8-7 is at its steady state positive
voltage at the noninverting terminal is
VR2= oXR2
R +R2
and this is the UTP.
Thus,
URT= +VR2
R +R2 (8-2)
e n the
output voltage is at its steady state negative level (-V), the LTP is
LTP = -V,R2 (8-3)
R +R2
Voltage WNaveforms
VOltage waveforms in Fig. 8-8 show the Schmitt trigger circuit
S inputs. In every case the output switches from positive to response
negative
when the
put voltage arrives at the UTP and from negative to positive
O input falls to the LTP. So, the output waveforms are always rectant
gular, except in
situation where the SR produces distortion.
a
184 Operational Anmplifier
Input -UTP
LTP
+Vo(sat)
Output
Figure 8-s Typical input and output waveforms for
Vo(sat)
an inverting Schmitt trigger circuit.
Hysteresis
The difference between the UTP and the
LTP is termed
cations require a small amount of
hysteresis. Some
appli
amount of hysteresis. One of the most
hysteresis, while others require a large
important effects of hysteresis is the
elimination of noise triggering. Consider
with
Fig. 8-9(a) which shows a sine wave
higher frequency noise superimposed as a zero
a
crossing detector
input. Because the input waveform crosses zero and crosses back again be-
fore staying above or below the zero level, the
crossing detector switches out-
put levels more than once before settling at its
positive
negativeor extreme.
Figure 8-96) shows that when a Schmitt trigger circuit is used in place of the
zero
crossing detector, the difference between the UTP and LTP (the hystere-
sis) eliminates the
multiple triggering around the zero level.
input Input -A --UTP
- -
LTP
Output Output
(a) Noisy input produces multiple (b) Hysteresis eliminates multiple
trnggering
triggering
Figure 8-9 A noisy waveform may cross and recross zero several
times, thus producin
multiple triggering of a zero crossing detector. The hystereslis
circuit eliminate present in a Schmitt trigg
can multiple triggering.
Input/Output Characteristic
A graph of dc output voltage (Vo) versus de input voltage (Vi) can be plotte
tted
for an inverting Schmitt trigger circuit, as shown in Fig. 8-10. This is thecircuit
 Chapter8 Switching, Differentiat.ing, and Integrating Circuits 185
nputoulyut charne
acteristic. To understand the characteristic, consider the
each of
each
of the numbered points on the graph:
at
oltages
At point 1, V, Vofsat) and Vi < LTP, thus keeping V., = o(sat)
point 1 through points 2 and 3, V, remains at +Vofsat) as V, is
r oincreased
m through the TP and through zero, until V, = UTP.
From point 3 to point 4, V switches raridly from +Vodsat) to - Vofsa
UTP
Asat)
when V, =
Eanm point 4 to point 5, Vo Temains at -Vofsat) as V is increased above
the UTP
From oint 5 through points 4 and 6, V, remains at -Vofsat) as Vi is
reduced through the UTP and through zero, until V, =LTP.
Eeam point 6 to point 2, Vo SWitches rapidly from -Vofsat) to +Vosat)
LTP.
when Vi =
2 to pOint 1, Vo remains at +Volsat) as V; is reduced below
From point
the LTP
t+Vo
Vo(sat)
+Vi
- Vo(sat)
-Vo
LTP UTP
Schmitt trigger circuit.
ure 8-10 Output/input characteristics for an inverting
Circuit Design amplifier
Design procedure for a Schmitt trig& circuit is similar
much larger
to op-amp
thar
han
design. A voltage divider current (l2 in Fig. 8-7) is selected calculated as
the then
op-amp input bias current. The resistor values are
(8-4)
UTP
R2
and
(8-5)
R= UTP
186 Operationel Amplifier
When using a BIFET op-amp, it is best to follow the usual
procedur.
lecting the largest of the two resistors as I MIL, and then calculatino th o f se
nesistance to give the required trigBgering level.
Example 8-3
Using a 741 op-amp, calculate resistor values for the Schmitt trigger cire
Fig. 8-11 to give triggering points of t2 V.
Solution
1IB(mas), SO select 12 = 50 pA. From Eq. 8-4
R2 =
UTP 2V
50 A
=
40 k2 (use 39 kM standard value)
From Eq. 8-5
R= UTP_(12V-1 V)-2V
50 A
=
180 kO (standard value)
+12 V
741
12v R
180 k2
R2
39 k2
Figure 8-11 Inverting Schmitt
trigger circuit for Example 8-3.
Adjusting the Trigger Points
Many Schmitt trigger circuit applications require UTP and LTP levels that are
not
equal in magnitude. This is
usually achieved by the use of diodes, as i
lustrated in Fig. 8-12. For the circuit in
with resistor
Fig. 8-12(a), the diode (Di) in series
R is only forward-biased when the op-amp output is
In this condition, the UTP is posSiTve
VR2, as before. When Vo is negative, Di 1S
verse-biased and I2 is reduced to the op-amp
input
verting terminal is grounded via R2, giving zero
bias
current. The nou
cuit has level for the LTP. So,
C this
a
positive UTP and a zero
voltage LTP.
Figure 8-12(6) shows a circuit with s.
When Vo is different-level trigger po
two
posítive, Dj is forward-biased and
set by resistors Ri and R2. With Vo negative, D»D2is forward-biased
is reversed, and theUIr
and Di
reversed, and the LTP is determined by the resistances of and
The diode forward voltage drop (Ve) must be
R3 R2 lat-
considered when
ing the trigger points for both of the circuits in Fig. 8-12. This is donecalcu
by replacing V, with (Vofsat)- E) in Eq. 8-5. The voltage divider
simp
should normally be a minimum of 100 uA for satisfactory diode operatio
current2
 Chapter 8 Switching, Differentiating, and Integrating Circuits 187
PY Dy
VEE
R R REE
R2 R2
(a) D gives LTP
= 0O (b) D and D2 give different UTP and LTP levels
Fioure 8-12 Diodes can be used with inverting Schmitt trigger circuits to produce different
levels of positive and negative triggering voltages.
The diode reverse recovery time (tr) should be much smaller than the signal
minimum pulse width.
Practice Problem
8-3.1 Design the Schmitt trigger circuit in Fig. 8-12(b) to have UTP = 6 V and
LTP -3.5 V. Use a 741 op-amp with Vcc +18 V. Draw the input/
=
=
output characteristic for the circuit.
8-4 NONINVERTING SCHMITT TRIGGER CIRCUIT
Circuit Operation
APoninverting Schmitt trigger circuit is shown in Fig. 8-13. This circuit looks
ik
inverting amplifier, except that (unlike an inverting amplifier) the in-
n g input is grounded and the noninverting input is connected to the
Cton of R1 and R2. The input and output waveforms show that vo
swito
rapidly from -Volsat) to +Vo(sat) When vj arrives at the UTP and that
SW1tches back to
-Volsat) when v; falls to the LTP
Input
R2 -UTP - LTP
W
( *Vcc +o(sat)
o
-VEE Output
(a) Vo(sat)
Figure 8-13ninverting
Noninv Schmitt
input arrives trigge
ger circuit (6) Input and output waveforms
t ng Schmitt
att the the
and goestrigger circuit. The output goes
positive when
UTP
neg
egativewhen Vi = LTP
188 Operational Amplifier
Consider the circuit situation illustrated in Fig. 8-14(a). The dc input voltage is
Vi =UTP= 5V
and the dc output is
V+olsat) = 15 V
The voltage at the op-amp noninverting input is
UTP+ UP)XR
V= UTP+VR2 =
R +R2
5V+5V-5V)x5 k
5 k+15 kl
= 7.5 V
It is seen that the voltage at the junction of Ri and Rz is far above the ground
level voltage at the op-amp inverting input terminal. So, the positive voltage
at the noninverting input keeps the output at its positive saturation level. To
switch the output to -Vofsat), the voltage at the junction of R1 and Rz must be
pulled down to the (ground level) voltage at the inverting input terminal.
This occurs when Vi is at the LTP [see Fig. 8-14(b)]. Switching occurs when
the op-amp noninverting input (the junction of Ri and R) is at the ground
level, the input voltage is at the UTP or LTP, and the output is #Vofsat) This
means that at the instant of switching
VRI = IUTP| = ILTP
and
VR2=1Vosat)
Design procedure for a noninverting Schmitt trigger circuit is just as simple
as for the inverting circuit. Voltage divider current Ia is again selected much
larger than the op-amp input bias current. Then the resistor values are
UTP
R1= 8-6)
and
R (8-7)
Adjusting the Trigger Points
Pand
Noninverting Schmitt trigger circuits can be designed for different
LTP voltages by the use of diodes, as in the case of the
inverting Cirethe
ure8-15(a) shows a circuit with a diode thàt is forward-biased
output voltage is negative. The UTP is determined by R and R, tak da c onuyngac
count of the diode torward voltage drop (Vp). The diode is reverse-br
when V, is positive,
and so there is
effectively
zero voltag drop
acros
R and
and
giving LTP=0. The circuit in Fig. 8-15(b) has a UTP dependent up
 ChapterB
189
Switching. Differentiating, ard Integrating Circuits

R
7.SV
RI R2 15 k2

25V+ 16V
+o W
5V R5 k
15v
-16 V
(a) Noninverting Schmitt trigger circuit voltages
when the input is at the UTP and the
output is
at ofsat)
R2
15 V+
W-
RI
R215 k
- 5V+
(-o W N
R 5 k2 -+
OV
15V
V-VE -16 V

(b) Noninverting Schmitt trigger circuit voltages when

the input is at the LTPand the output is on the point
of switching from +/o(sat) to
-Vo(sat)
Figure 8-14 At the instant of switching in a noninverting Schmitt trigger circuit, the op-
amp noninverting input terminal voltage must be at the ground level.

Rz and an LTP set by R1 and R3. The circuit voltage levels are investigated in
Example 8-4
D R150 k
D R2 D2
K M20 ka
R 9+Vcc R
t15V
27 k2

b-VEE EE
5V
(a) Di gives LTP =0 (b) D and D2 give different UTP and
LTP levels
gure 8-15 Diodes can be used to produce different UTP and LTP levbls for noninvert-
ing Schmitt trigger circuits.

Example 8-4
and
e the Schmitt trigger circuit in Fig. 8-15(b) to determine the UTP
TT
LPAssume that the op-amp is rail-to-rail operated and that the diode
forward voltage drop is 0.7 V.
1 9 0 OperationalAmplifier
Solution
tVcc= t15 en V.
V. When
With rail-to-rail operation,
V% =
Vo=-l5V and Vj=Un
=
15V-0.7y
R2 150 k
95.3 uAA
UTP= lh R1 =95.3uA X 27 kl
2.57 V
When V= +15 V and Vi =LTP,
h 15V-0.7v
R3 120 k
= 119 uA
LTP= -Js Ri= -119 uA x 27 kl2
=-3.2V
Computer Analysis
Input +2.59 V(UT
DI R2
HW- 150k
Output +14V
R3
D2 120k
RI
VC
27k
VE . -14 V
(a) Noninverting Schmitt
Figure B-16 trigger circuit Whenh
(6) Input and output wavefor
input voltageComputer
arrives atanalysis of the Schmitt
x d t r e
Fig. 8-150 e
to its
positive extreme. +2.59 V(the trigger circuit
trigger circut from negative
output UTP), the output
at-3
from its
(the LTP). The nes
switches back again
jain when the
input
Wn
Practice Problem
8-4.1 Design a
UTP =4Vnoninverting
8-15b)10
and LTP Schmitt
-2.5
=
V. trigger circuit,as as in Fig.
CC=20
VD
the Use a 741 op-amp c
input/output characteristic for the circuit. w