SiHG20N50C

Vishay Siliconix

Power MOSFET

FEATURES
PRODUCT SUMMARY • Halogen-free According to IEC 61249-2-21
VDS (V) at TJ max. 560 Definition
RDS(on) (Ω) VGS = 10 V 0.270 • Low Figure-of-Merit Ron x Qg
Qg (Max.) (nC) 76 • 100 % Avalanche Tested
Qgs (nC) 21 • High Peak Current Capability
Qgd (nC) 34 • dV/dt Ruggedness
Configuration Single • Improved Trr/Qrr
D • Improved Gate Charge
• High Power Dissipations Capability
TO-247AC • Compliant to RoHS Directive 2002/95/EC

S
D S
G
N-Channel MOSFET

ORDERING INFORMATION
Package TO-247AC
Lead (Pb)-free SiHG20N50C-E3
Lead (Pb)-free and Halogen-free SiHG20N50C-GE3

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage VDS 500
V
Gate-Source Voltage VGS ± 30
TC = 25 °C 20
Continuous Drain Current (TJ = 150 °C)e VGS at 10 V ID
TC = 100 °C 11 A
Pulsed Drain Currenta IDM 80
Linear Derating Factor 1.8 W/°C
Single Pulse Avalanche Energyb EAS 361 mJ
Maximum Power Dissipation PD 250 W
Peak Diode Recovery dV/dtc dV/dt 5 V/ns
Operating Junction and Storage Temperature Range TJ, Tstg - 55 to + 150
°C
Soldering Recommendations (Peak Temperature) for 10 s 300d
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. VDD = 50 V, starting TJ = 25 °C, L = 2.5 mH, Rg = 25 Ω, IAS = 17 A.
c. ISD ≤ 18 A, dI/dt ≤ 380 A/μs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
e. Limited by maximum junction temperature.

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient RthJA - 40
°C/W
Maximum Junction-to-Case (Drain) RthJC - 0.5

Document Number: 91382 www.vishay.com

S11-0440-Rev. C, 14-Mar-11 1
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHG20N50C
Vishay Siliconix

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 μA 500 - - V
VDS Temperature Coefficient ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 700 - mV/°C
Gate-Source Threshold Voltage (N) VGS(th) VDS = VGS, ID = 250 μA 3.0 - 5.0 V
Gate-Source Leakage IGSS VGS = ± 30 V - - ± 100 nA
VDS = 500 V, VGS = 0 V - - 25
Zero Gate Voltage Drain Current IDSS μA
VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 250
Drain-Source On-State Resistance RDS(on) VGS = 10 V ID = 10 A - 0.225 0.270 Ω
Forward Transconductance gfs VDS = 50 V, ID = 10 A - 6.4 - S
Dynamic
Input Capacitance Ciss VGS = 0 V, - 2451 2942
pF
Output Capacitance Coss VDS = 25 V, - 300 360
Reverse Transfer Capacitance Crss f = 1.0 MHz - 26 32
Total Gate Charge Qg - 65 76
Gate-Source Charge Qgs VGS = 10 V ID = 18 A, VDS = 400 V - 21 - nC
Gate-Drain Charge Qgd - 29 -
Turn-On Delay Time td(on) - 80 -
Rise Time tr VDD = 250 V, ID = 18 A, - 27 -
ns
Turn-Off Delay Time td(off) Rg = 9.1 Ω - 32 -
Fall Time tf - 44 -
Gate Input Resistance Rg f = 1 MHz, open drain - 1.1 - Ω
Drain-Source Body Diode Characteristics
MOSFET symbol
Continuous Source-Drain Diode Current IS D
- - 20
showing the
integral reverse G
A
Pulsed Diode Forward Current ISM p - n junction diode S - - 80

Body Diode Voltage VSD TJ = 25 °C, IS = 18 A, VGS = 0 V - - 1.5 V

Body Diode Reverse Recovery Time trr - 503 - ns
TJ = 25 °C, IF = IS,
Body Diode Reverse Recovery Charge Qrr - 6.7 - μC
dI/dt = 100 A/μs, V = 35 V
Reverse Recovery Current IRRM - 30 - A

The information shown here is a preliminary product proposal, not a commercial product datasheet. Vishay Siliconix is not committed to produce this or any similar
product. This information should not be used for design purposes, nor construed as an offer to furnish or sell such products.

www.vishay.com Document Number: 91382

2 S11-0440-Rev. C, 14-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
 SiHG20N50C
Vishay Siliconix

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

70 100
VGS
TJ = 25 °C
Top 15 V
60 14 V
13 V TJ = 150 °C
12 V

ID, Drain Current (A)

10
ID, Drain Current (A)

50 11 V
10 V
9.0 V
40 8.0 V TJ = 25 °C
7.0 V
6.0 V 1
30 Bottom 5.0 V

20
0.1

10 7.0 V

0 0.01
0 6 12 18 24 30 5 6 7 8 9 10

VDS, Drain-to-Source Voltage (V) VGS, Gate-to-Source Voltage (V)

Fig. 1 - Typical Output Characteristics, TC = 25 °C RDS(on), Drain-to-Source On Resistance Fig. 3 - Typical Transfer Characteristics

40 3
VGS
TJ = 150 °C
Top 15 V ID = 17 A
14 V 2.5
13 V
30 12 V
ID, Drain Current (A)

11 V
10 V 2
(Normalized)

9.0 V
8.0 V
7.0 V
20 6.0 V 1.5
Bottom 5.0 V VGS = 10 V

7.0 V 1
10
0.5

0 0
0 6 12 18 24 30 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160

VDS, Drain-to-Source Voltage (V) TJ, Junction Temperature (°C)

Fig. 2 - Typical Output Characteristics, TC = 150 °C Fig. 4 - Normalized On-Resistance vs. Temperature

Document Number: 91382 www.vishay.com

S11-0440-Rev. C, 14-Mar-11 3
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHG20N50C
Vishay Siliconix

105 1000
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted Operation in this area limited
Crss = Cgd by RDS(on)
Coss = Cds + Cgd 100

ID, Drain Current (A)

104
Capacitance (pF)

Ciss

103 10 100 µs

1 ms
102 Coss 1
TC = 25 °C
TJ = 150 °C 10 ms
Single Pulse
Crss
10 0.1
1 10 100 1000 10 100 1000 10 000

VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 8 - Maximum Safe Operating Area

20 20
ID = 17 A
VGS, Gate-to-Source Voltage (V)

VDS = 400 V
16
VDS = 250 V 15
ID, Drain Current (A)

VDS = 100 V

12
10
8

5
4

0 0
0 30 60 90 120 25 50 75 100 125 150

QG, Total Gate Charge (nC) TC, Case Temperature (°C)

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 9 - Maximum Drain Current vs. Case Temperature

100
ISD, Reverse Drain Current (A)

TJ = 150 °C TJ = 25 °C
10

VGS = 0 V
0.1
0.2 0.5 0.8 1.1 1.4

VSD, Source-to-Drain Voltage (V)

Fig. 7 - Typical Source-Drain Diode Forward Voltage

www.vishay.com Document Number: 91382

4 S11-0440-Rev. C, 14-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
 SiHG20N50C
Vishay Siliconix

1
Duty Cycle = 0.5
Normalized Effective Transient
Thermal Impedance

0.2

0.1
0.1
0.05

0.02

Single Pulse

0.01
10-4 10-3 10-2 0.1 1

Pulse Time (s)

Fig. 10 - Normalized Thermal Transient Impedance, Junction-to-Case (TO-247)

RD
VDS VDS

VGS tp
D.U.T. VDD
Rg
+
- VDD
VDS
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
IAS
Fig. 11a - Switching Time Test Circuit
Fig. 12b - Unclamped Inductive Waveforms

VDS
90 % QG
10 V

QGS QGD

10 %
VGS VG
td(on) tr td(off) tf

Fig. 11b - Switching Time Waveforms

Charge
Fig. 13a - Basic Gate Charge Waveform

L Current regulator
VDS Same type as D.U.T.
Vary tp to obtain
required IAS 50 kΩ

12 V 0.2 µF
Rg D.U.T + 0.3 µF
V DD
- +
IAS D.U.T.
VDS
-
10 V
tp 0.01 Ω VGS

3 mA

Fig. 12a - Unclamped Inductive Test Circuit

IG ID
Current sampling resistors
Fig. 13b - Gate Charge Test Circuit

Document Number: 91382 www.vishay.com

S11-0440-Rev. C, 14-Mar-11 5
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHG20N50C
Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit

+ Circuit layout considerations

D.U.T.
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
-

- +
-

Rg • dV/dt controlled by Rg +
• Driver same type as D.U.T. VDD
-
• ISD controlled by duty factor “D”
• D.U.T. - device under test

Driver gate drive

Period P.W.
D=
P.W. Period

VGS = 10 Va

D.U.T. lSD waveform

Reverse
recovery Body diode forward
current current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
VDD

Re-applied
voltage
Body diode forward drop
Inductor current

Ripple ≤ 5 % ISD

Note
a. VGS = 5 V for logic level devices

Fig. 14 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91382.

www.vishay.com Document Number: 91382

6 S11-0440-Rev. C, 14-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
 Package Information
www.vishay.com
Vishay Siliconix
TO-247AC (High Voltage)
A A
4
E 7 ØP (Datum B)
B
E/2 S A2 Ø k M DBM
3 R/2 ØP1
A
D2
Q

4 4
2xR
D D1
(2)

1 2 3 D 4
Thermal pad
5 L1

C L 4
E1
See view B A
0.01 M D B M
2 x b2 C View A - A
2x e
3xb
b4 A1
0.10 M C A M
(b1, b3, b5)
Planting Base metal
Lead Assignments
1. Gate D DE E
2. Drain
3. Source (c) c1
C C
4. Drain
(b, b2, b4)
(4)
Section C - C, D - D, E - E
View B
MILLIMETERS INCHES MILLIMETERS INCHES
DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.
A 4.58 5.31 0.180 0.209 D2 0.51 1.30 0.020 0.051
A1 2.21 2.59 0.087 0.102 E 15.29 15.87 0.602 0.625
A2 1.17 2.49 0.046 0.098 E1 13.72 - 0.540 -
b 0.99 1.40 0.039 0.055 e 5.46 BSC 0.215 BSC
b1 0.99 1.35 0.039 0.053 Øk 0.254 0.010
b2 1.53 2.39 0.060 0.094 L 14.20 16.25 0.559 0.640
b3 1.65 2.37 0.065 0.093 L1 3.71 4.29 0.146 0.169
b4 2.42 3.43 0.095 0.135 N 7.62 BSC 0.300 BSC
b5 2.59 3.38 0.102 0.133 ØP 3.51 3.66 0.138 0.144
c 0.38 0.86 0.015 0.034 Ø P1 - 7.39 - 0.291
c1 0.38 0.76 0.015 0.030 Q 5.31 5.69 0.209 0.224
D 19.71 20.82 0.776 0.820 R 4.52 5.49 0.178 0.216
D1 13.08 - 0.515 - S 5.51 BSC 0.217 BSC
ECN: X13-0103-Rev. D, 01-Jul-13
DWG: 5971
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Contour of slot optional.
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body.
4. Thermal pad contour optional with dimensions D1 and E1.
5. Lead finish uncontrolled in L1.
6. Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154").
7. Outline conforms to JEDEC outline TO-247 with exception of dimension c.
8. Xian and Mingxin actually photo.

Revision: 01-Jul-13 1 Document Number: 91360

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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
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Revision: 02-Oct-12 1 Document Number: 91000