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June 2014
FDB86363_F085
N-Channel PowerTrench® MOSFET
D D
80 V, 110 A, 2.4 mΩ
Features
Typical RDS(on) = 2.0 mΩ at VGS = 10V, ID = 80 A
Typical Qg(tot) = 131 nC at VGS = 10V, ID = 80 A G
UIS Capability G S
RoHS Compliant TO-263 S
Qualified to AEC Q101 FDB SERIES
Applications
For current package drawing, please refer to the Fairchild
Automotive Engine Control website at www.fairchildsemi.com/packaging
PowerTrain Management
Solenoid and Motor Drivers
Integrated Starter/Alternator
Primary Switch for 12V Systems
Notes:
1: Current is limited by bondwire configuration.
2: Starting TJ = 25°C, L = 0.25mH, IAS = 64A, VDD = 80V during inductor charging and VDD = 0V during time in avalanche.
3: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder
mounting surface of the drain pins. RθJC is guaranteed by design, while RθJAis determined by the board design. The maximum rating
presented here is based on mounting on a 1 in2 pad of 2oz copper.
Off Characteristics
BVDSS Drain-to-Source Breakdown Voltage ID = 250μA, VGS = 0V 80 - - V
VDS = 80V, TJ = 25oC - - 1 μA
IDSS Drain-to-Source Leakage Current
VGS = 0V TJ = 175oC (Note 4) - - 1 mA
IGSS Gate-to-Source Leakage Current VGS = ±20V - - ±100 nA
On Characteristics
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250μA 2.0 3.0 4.0 V
ID = 80A, TJ = 25oC - 2.0 2.4 mΩ
RDS(on) Drain to Source On Resistance
VGS= 10V TJ = 175oC (Note 4) - 3.8 4.3 mΩ
Dynamic Characteristics
Ciss Input Capacitance - 10000 - pF
VDS = 40V, VGS = 0V,
Coss Output Capacitance - 1400 - pF
f = 1MHz
Crss Reverse Transfer Capacitance - 95 - pF
Rg Gate Resistance f = 1MHz - 3.3 - Ω
Qg(ToT) Total Gate Charge at 10V VGS = 0 to 10V VDD = 64V - 131 150 nC
Qg(th) Threshold Gate Charge VGS = 0 to 2V ID = 80A - 18 21 nC
Qgs Gate-to-Source Gate Charge - 47 - nC
Qgd Gate-to-Drain “Miller“ Charge - 24 - nC
Switching Characteristics
Note:
4: The maximum value is specified by design at TJ = 175°C. Product is not tested to this condition in production.
1.2 300
POWER DISSIPATION MULTIPLIER
0.6 150
0.4 100
0.2 50
0.0 0
0 25 50 75 100 125 150 175 25 50 75 100 125 150 175 200
TC, CASE TEMPERATURE(oC) TC, CASE TEMPERATURE(oC)
Figure 1. Normalized Power Dissipation vs. Case Figure 2. Maximum Continuous Drain Current vs.
Temperature Case Temperature
2
DUTY CYCLE - DESCENDING ORDER
1
NORMALIZED THERMAL
D = 0.50
IMPEDANCE, ZθJC
0.20
0.10 PDM
0.05
0.02
0.1 0.01 t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
SINGLE PULSE PEAK TJ = PDM x ZθJA x RθJA + TC
0.01
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10
t, RECTANGULAR PULSE DURATION(s)
Figure 3. Normalized Maximum Transient Thermal Impedance
10000
VGS = 10V
1000
IDM, PEAK CURRENT (A)
100
TC = 25oC
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
10 CURRENT AS FOLLOWS:
I = I2 175 - TC
150
SINGLE PULSE
1
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10
t, RECTANGULAR PULSE DURATION(s)
2000 1000
If R = 0
1000 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD)
100 100
100us STARTING TJ = 25oC
10
OPERATION IN THIS
AREA MAY BE 10
LIMITED BY rDS(on) 1ms
1 STARTING TJ = 150oC
SINGLE PULSE 10ms
TJ = MAX RATED
100ms
TC = 25oC
0.1 1
0.001 0.01 0.1 1 10 100 1000
1 10 100 200 tAV, TIME IN AVALANCHE (ms)
VDS, DRAIN TO SOURCE VOLTAGE (V)
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515
Figure 5. Forward Bias Safe Operating Area Figure 6. Unclamped Inductive Switching
Capability
300 300
PULSE DURATION = 80μs
IS, REVERSE DRAIN CURRENT (A)
200 10
TJ = 175 oC
TJ = 175oC TJ = 25 oC
150
TJ = 25oC 1
100
TJ = -55oC
0.1
50
0 0.01
2 3 4 5 6 7 0.0 0.2 0.4 0.6 0.8 1.0 1.2
VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)
300 300
250
ID, DRAIN CURRENT (A)
100 100
5V
30 2.0
25
ON-RESISTANCE (mΩ)
1.6
20
NORMALIZED
TJ = 175oC TJ = 25oC
15 1.2
10
0.8
ID = 80A
5
VGS = 10V
0 0.4
2 4 6 8 10 -80 -40 0 40 80 120 160 200
VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE(oC)
Figure 11. RDSON vs. Gate Voltage Figure 12. Normalized RDSON vs. Junction
Temperature
1.5 1.10
VGS = VDS ID = 5mA
NORMALIZED DRAIN TO SOURCE
ID = 250μA
1.2
THRESHOLD VOLTAGE
BREAKDOWN VOLTAGE
1.05
NORMALIZED GATE
0.9
1.00
0.6
0.95
0.3
0.0 0.90
-80 -40 0 40 80 120 160 200 -80 -40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE(oC) TJ, JUNCTION TEMPERATURE (oC)
Figure 13. Normalized Gate Threshold Voltage vs. Figure 14. Normalized Drain to Source
Temperature Breakdown Voltage vs. Junction Temperature
100000 10
VGS, GATE TO SOURCE VOLTAGE(V)
ID = 80A
VDD = 32V
Ciss
CAPACITANCE (pF)
8
10000
VDD = 40V VDD = 48V
Coss 6
1000
4
100 Crss
2
f = 1MHz
VGS = 0V
10 0
0.1 1 10 100 0 30 60 90 120 150
VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE(nC)
Figure 15. Capacitance vs. Drain to Source Figure 16. Gate Charge vs. Gate to Source
Voltage Voltage
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY
PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY
THEREIN, WHICH COVERS THESE PRODUCTS.