Problem Solutions – Chapter 5

CHAPTER 5
© 2016 Pearson Education, Inc.

5-1.*

a) F  (A  B)CD
b) G  (A  B)(C  D)

5-2.
+V
a) 3-input a) 3-input
NAND NAND
a) 3-input
gate gate gate
NAND b) 4-input b)gate
NORNOR
b) 4-input 4-input
gate NOR
+Vgate +V
+V +V
+V +V
A A

B B
F F
A A
C C

B B
D D
F F
C C

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5-3.
an ing rnin tors igh

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or ud a uc y
w cl le tr p
e in nt ns co

D
th k ( de f i es
of or stu e o tat
ity s w g us d S

is
te f t ss th nite
e rt ss fo U
gr hi in e
th a a ly by

k
in o e r
y y p d le d
ro n an o te
st f a s d s ec
de o rse de ot
ill le u vi pr
w r sa co pro is
o eir is rk
th nd wo
a his
T

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved. This material is protected under all copyright laws as they currently
exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher.
 Problem Solutions – Chapter 5

5-4.
a)
256 x 8 ROM 256 x 8 ROM
8 8 8 8
A(7:0) Address Address

DECODER
A8 A0 0 EN EN
A9 A1 1
2
3 256 x 8 ROM 256 x 8 ROM
8 8 8 8
Address Address

EN EN

256 x 8 ROM 256 x 8 ROM

8 8 8 8
Address Address

EN EN

256 x 8 ROM 256 x 8 ROM

8 8 8 8
Address Address

EN EN

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D(7:0) D(15:8)

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an ing rnin tors igh

b) 4K×32/(256×8) = 64 ROM chips

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D
th k ( de f i es
of or stu e o tat

5-5.* (Errata: Change "32 X 8" to "64 X 8" ROM)

ity s w g us d S

is
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e rt ss fo U

IN OUT IN OUT IN OUT IN OUT

gr hi in e
th a a ly by

k
in o e r
y y p d le d
ro n an o te

000000 0000 0000 010000 0001 0110 100000 0011 0010 110000 0100 1000
st f a s d s ec
de o rse de ot
ill le u vi pr

000001 0000 0001 010001 0001 0111 100001 0011 0011 110001 0100 1001
w r sa co pro is
o eir is rk

000010 0000 0010 010010 0001 1000 100010 0011 0100 110010 0101 0000
th nd wo
a his

000011 0000 0011 010011 0001 1001 100011 0011 0101 110011 0101 0001
T

000100 0000 0100 010100 0010 0000 100100 0011 0110 110100 0101 0010
000101 0000 0101 010101 0010 0001 100101 0011 0111 110101 0101 0011
000110 0000 0110 010110 0010 0010 100110 0011 1000 110110 0101 0100
000111 0000 0111 010111 0010 0011 100111 0011 1001 110111 0101 0101
001000 0000 1000 011000 0010 0100 101000 0100 0000 111000 0101 0110
001001 0000 1001 011001 0010 0101 101001 0100 0001 111001 0101 0111
001010 0001 0000 011010 0010 0110 101010 0100 0010 111010 0101 1000
001011 0001 0001 011011 0010 0111 101011 0100 0011 111011 0101 1001
001100 0001 0010 011100 0010 1000 101100 0100 0100 111100 0110 0000
001101 0001 0011 011101 0010 1001 101101 0100 0101 111101 0110 0001
001110 0001 0100 011110 0011 0000 101110 0100 0110 111110 0110 0010
001111 0001 0101 011111 0011 0001 101111 0100 0111 111111 0110 0011

5-6.
a) 16 + 16 + 1 = 33 address bits and 16 + 1 = 17 output bits, 8G × 17
b) 8 + 8 + 1 + 1 = 18 address bits and 8 + 1 = 9 output bits, 256K×9
c) 4 × 4 = 16 address bits and 14 output bits are needed, 64K × 14
d) 4+4 = 8 address bits and 8 output bits, 256× 8
2

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved. This material is protected under all copyright laws as they currently
exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher.
 Problem Solutions – Chapter 5

5-7.
Input Output
X Y Z A B C D
0 0 0 1 0 0 0
0 0 1 1 0 0 1
0 1 0 0 1 1 1
0 1 1 0 1 0 1
1 0 0 0 1 0 0
1 0 1 0 1 0 1
1 1 0 0 1 1 1
1 1 1 1 0 0 1

5-8.
A Y B Y C Y D Y
1 1 1 1 1 1 1 1
X 1 X 1 1 1 X 1 X 1 1 1
Z Z Z Z
A = XY + XY + YZ B = XY + XY + YZ C = YZ C = YZ + Z

)
eb
 XYA instead
ByAusing XY  YZof A and B XY  XYof  YZ  YZ by all f our f unctions.
Y in D,Z Ycan beC shared C  YZ  Z

er or in ing
ZYinstead Further
,

ed id n
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no the iss tea s

itt W tio
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e
d on g. in t la
since A is the complement of B, terms Y andXXY can be shared betweenA and B. Thus, only f our

m ld a
an ing rnin tors igh

By using Aterms
product instead
Y of
Z, XYA and and
, XY, YZ Zinstead of Y in D,inversion
are required.An YZ can be shared
must by all four functions.
be programmed for A. Further, since A is the

.
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or ud a uc y
w cl le tr p

complement of B, terms XY and XY can be shared between A and B. Thus, only four product terms
e in nt ns co

D
th k ( de f i es

YZ, XY, XY, and Z are required. An inversion must be programmed for A.
of or stu e o tat
ity s w g us d S

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e rt ss fo U

5-9.
gr hi in e
th a a ly by

k
in o e r
y y p d le d
ro n an o te

Find the truth table and K-maps:

st f a s d s ec

A Y B Y C Y
de o rse de ot

Find the truth table and K-maps:

ill le u vi pr

A Y B Y C Y
w r sa co pro is

Find 1
X the
Y truth
Z Atable B and
C DK-maps:
o eir is rk

X Y Z A B C
E F D E F
th nd wo

X 1 1 X 1 1 1 X 1 1
X00 Y00 Z00 A00 B00 C00 D00 E00 F0
a his

0
1Z
T

00 00 01 00 00 00 00 00 01 X Z 1 1 X 1 1 Z1 X
0 0 1 0 0 0 0 0 1
00 01 10 00 00 00 01 00 10 A =Z XY B = XZ+ YZ Z
0 0
01 1
10 1
00 0
00 0
00 1
01 0
10 0
00 01 A  XY B  X  YZ C  XY  XY  Z
D A = XY Y EB = X + YZY F
0 011 101 100 000 011 100 000 001 10 Y
11 00 01 00 11 01 00 00 01 D Y E Y F
1 0 0 0 1 0 0 0 0 1 1 1 Y
11 01 10 01 10 10 01 00 10
1 1
10 1
11 1
00 1
11 1
01 0
00 0
10 0
01 01 X X 11 X 11 11
1 11 10 11 10 10 01 00 00 1 Z X X Z1 X 1 Z1
1 1 1 1 1 0 0 0 1 D =ZYZ EZ= 0 F=ZZ
D = YZ E=0 F= Z
Implementation of A, D, and E requiresDonly  YZtwo terms, XY Z. and E  0 orward implementation
Straightf
Y F ofZ B, C, and F
requires f our terms,
Implementation of A,,XYXYZ,
D, andXYZ,
E and Z. By implementing
requires only two terms,B,XY C,Z.and
and F,Yonlyorward
Straightf three additional terms of B, C, and F
implementation
X, X Y, and
requires Z are
f our required.
terms, ,XY So we
XYZ, XYZ, andf orm
Z. Bythe solution using
implementing f ivand
B, C, e product terms:
, YZ, additional
F, only three XXYY, X, andterms
Z. The solution
Implementation
is described of
byA, D,
the and E requires
equations givonly
en two
with terms,
the XY
six and YZ.
K-maps. Straightforward
X, X Y, and Z are required. So we f orm the solution using f iv e product terms: implementation
, YZ, XXYY, X, and Z.ofThe
B, C,solution
and F
requires four terms,
is described by XY, XYZ, XYZ,giv
the equations andenZ.with
By implementing B, C, and F, only three additional terms
the six K-maps.
X, XY, and Z are required. So we form the solution using five product terms: XY, YZ, XY, X, and Z. The solution is
described by the equations given with the six K-maps.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved. This material is protected under all copyright laws as they currently
exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher.
 Problem Solutions – Chapter 5

5-10.
The values given in the four K-maps come from Table 4-4 on page 224.
The v alues giv en in the f our K-maps come f rom Table 3-1 on page 99.
W C X C Y C Z C
0 0 0 0 0 1 1 1 1 0 1 0 1 0 0 1
0 1 1 1 1 0 0 0 1 0 1 0 1 0 0 1
B B B B
d d d d d d d d d d d d d d d d
A A A A
1 1 d d 0 1 d d 1 0 d d 1 0 d d
D D D D

WW= AABB + BC
BCDD X X = BC DBC
BCD  BD
+ BC + BD Y =CD
Y CD+ CD
CD Z = D
Z D
In this case, shared terms are limited. One such term BC D is generated inW.
In this case, shared terms are limited. One such term BCD is generated in W.

5-11.*
Assume
Assume 3-input
3-input OR gates.
OR gates.
W C C C C
0 0 0 0 0 1 1 1 1 0 1 0 1 0 0 1
0 1 1 1 1 0 0 0 1 0 1 0 1 0 0 1
B B B B

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1 1 d d 0 1 d d 1 0 d d 1 0 d d
an ing rnin tors igh

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D D D
or ud a uc y

D
w cl le tr p
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D
th k ( de f i es

W =AA+BC + BD X XBCD
BC BD = BCDBC
+ BC + BD
 BD Y
Y=CD
CD+ C D ZZ=DD
of or stu e o tat

W CD
ity s w g us d S

Each of the equations abov e is implemented using one 3-input OR gate. Four gates are used.
is
te f t ss th nite

Each of the equations above is implemented using one 3-input OR gate. Four gates are used.
e rt ss fo U
gr hi in e
th a a ly by

k
in o e r
y y p d le d
ro n an o te

5-12.
st f a s d s ec
de o rse de ot
ill le u vi pr

Figure 5-10 uses 3-input OR gates.

w r sa co pro is
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Figure 6-23 uses 3-input OR gates.

th nd wo

A B C Y
a his

Y Y D Y
T

1 1 1 1 1 1 1 1 1 1
X 1 1 X 1 1 X 1 1 1 X 1 1
Z Z A Z Z
A = XZ + YZ + X YZ B = XY + YZ + X Y D = XY + Z
A  XZ  YZ  XYZ B  XY  YZ  XY C  A  XY D  XY  Z
A, B, and D each require three or fewer product terms so can be implemented with 3-input ORgates.
C requires f our terms so cannot be implemented with a 3-input OR gate. But because A L device
the f irst
output
P
A, B,
can and as
used D each requiretothree
an input or fewerother
implement product terms so can
f unctions be implemented
it can be assignedwith
to A3-input
and AOR gates.
can thenC be
requires
usedfour
to implement C us
terms so
inputs of cannot be implemented
a 3-input OR gate. with a 3-input OR gate. But because the first PAL device output can used as an input to
implement other functions it can be assigned to A and A can then be used to implement C using just two inputs of a 3-
input OR gate.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved. This material is protected under all copyright laws as they currently
exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher.
 Problem Solutions – Chapter 5

5-13.
Figure 5-10 uses 3-input OR gates.

F C G C
1
1 1 1 1 1 1 1 1
B B
1 1 1 1 1
A A
1 1 1 1
D D

Straightforward implementation of F requires five prime implicants and of G requires four prime implicants, but only 3
inputs are available on the PAL OR gates. So sum-of-products that can be factored from F and G or both and
implemented by the other PAL cells are needed. A single sum of products that will work is H  ABC  BCD  BCD.
The terms of H are shown with dotted lines on the K-maps. Using H:

F  H  CD  AB
G  H  AB
There are other possible functions for H and corresponding results for F and H.

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5-14.

e
d on g. in t la

m ld a
an ing rnin tors igh

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or ud a uc y

F ( A, B, C )  C ( AB  B) C ( AB  A)
w cl le tr p

a)
e in nt ns co

D
th k ( de f i es

F ( A, B, C)  C( AB  AB) C( A  B)
of or stu e o tat

b)
ity s w g us d S

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k
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5-15.
ro n an o te
st f a s d s ec
de o rse de ot
ill le u vi pr

a)
w r sa co pro is
o eir is rk
th nd wo
a his
T

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved. This material is protected under all copyright laws as they currently
exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher.
 Problem Solutions – Chapter 5

b) Using Shannon’s expansion theorem, F ( A, B, C, D)  D(C( A  B) C(1))  D(C( A) C( A)) . Then using the 4-
LUT from part a, the function can be implemented as:

5-16.
Assuming that the upper input of each mux is selected with a 0:

a) MUX2: 0, MUX3: 1, MUX4: 0

)
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ed id n
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b) MUX2: 1, MUX3: 1, MUX4: 1

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c) MUX2: 1, MUX3: 1, MUX4: 0
an ing rnin tors igh

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5-17.
ity s w g us d S

is
te f t ss th nite

Invert the b input so that the upper 2-LUT is equal to f (a, b)  a  b and the lower 2-LUT is equal to f (a, b)  ab
e rt ss fo U
gr hi in e
th a a ly by

k
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st f a s d s ec
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5-18.
ill le u vi pr
w r sa co pro is
o eir is rk

The state machine is a Moore machine since the output Z depends only the current state. Using a state assignment of 0
th nd wo

for State0 and 1 for State1, then Z is the same as the state of the flip-flop.
a his
T

Then the configuration bits 0:10 = 1001 0011 111 (assuming that the a input of the 2-LUTs is the most significant bit of
the address and that a = in1 and b = in2).

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved. This material is protected under all copyright laws as they currently
exist. No portion of this material may be reproduced, in any form or by any means, without permission in writing from the publisher.