Lecture # 6

Protection Techniques and

Snubber Circuits
Prof. Dr. Shahid Iqbal
Department of Electrical Engineering
University of Gujrat
Email: si@uog.edu.pk
 Snubber Circuits

•To reduce electrical stress during switching events

•To reduce switching losses

•To limit applied voltage during turn-off transient

•To limit device currents during turn-on transient

•To limit di/dt and dv/dt at turn-on & turn-off respectively

ILLUSTRATION OF NEED FOR SNUBBER CIRCUIT
iC = IL - iD
vCE = VCC - vL
VCC
iD L IL = const
iC Turn-on Ideal case
vb iC
vCE
vBE Turn-off

vb Turn-on Turn-off
V1
t1 t2 t
V2 3
iC = IL
iC = IL 4
iC vCE
Switching trajectory
1 t
vCE 2 vCE = VCC
VCC

on off t
ILLUSTRATION OF NEED FOR SNUBBER CIRCUIT

i + -
+ L1 + L2 Io
vDf
L5 Df
- iDf
Vo iC
BJT on BJT off Df reverse- Cd L3
Diode off Diode on L diC  ve recoveryBJT on BJT base
 - drive circuit vCE
L
diC
 ve
dt current Diode L4
Io dt Io off
iC Vo
iC
diC diC
vCE  ve  ve
dt dt vCE
0 0
t0 t1 t2 t5
t3 t4 t6 Reverse current for blocking
BJT Turning-off BJT Turning-on V0 and damping energy
vCE = Vo + 0.7 Diode recovered stored in L
ILLUSTRATION OF NEED FOR SNUBBER CIRCUIT
Operation of Circuit
Equivalent circuit for current flow From t1, v is -ve since iC is decreasing up to t3
< t1, v= 0 since iC is constant up to t1
+ + Io + L1 + L2 Io
vDf = Vo - vCE vDf Io - ic
L5
- Vo -
Vo
i C = Io Cd L3 iC is decreasing
Cd
vCE= VCE(sat) ;t < t0 - L4 vCE = Vo - v - vDf
- = incre ;t0 to t1 vDf ~ - 0.7V
BJT in steady on-state BJT during switching off

From t3 to t4,v is zero since iC is constant From t4,v is +ve since iC is increasing

+ + Io L1 + L2
vDf + Io Io - ic; Df FB
L5 vDf -ve; recovery
- Df Ileakage; >t6
Vo Vo -
iC= 0
Cd Cd L3 iC Incre; t4 to t5
decre to Io; > t5
- vCE ~ Vo L4 vCE = Vo-v-vDf
-
BJT in steady off-state vDf ~ - 0.7V BJT during switching on
Overvoltage Snubber Circuit

i + - +
L I
o
+ VDfDf Df: off on
-
kVo
Vo iC Io Vo
C iC
d S1 vCE = Vo - L(di/dt) - VDf
vCE 0 to tfi: kVo = (LIo)/tfi
0 0
- 0
tfi
At Turn-off
(a) Without snubber circuit
Overvoltage Snubber Circuit
RovCov discharge
vCov
vCov & vCE
i +
L
- vCE
+ Df I
o Rov vCov = Vo Vo
iDf Io
i
i & iC vCE
Vo Cd iC iov iC LCov charging
vCE
S1 Dov iC i & iC
vCE vCov 0 tov i
Cov
Df = RB FB FB
DOV = RB FB RB
- BJT on off off
ic fall time « tov
(b) with snubber circuit
Induces a voltage to FB Dov

The change in voltage of Cov is given by the energy balance:

2
L I C v 2 L I o2
 o
 ov CE or v 2
CE 
2 2 Cov
 Overvoltage Snubber Circuit
Design Rules
A) Selection of COV
i + -
L Df I
From Energy Balance Rule: + o Rov
iDf
L I o2 CovvCE
2
 Vo Cd iC iov
Dov
2 2
2 S1
vCov
vCE
L I o Co
vCE
2
  vCE
2
,max - v
Cov
(b) with snubber circuit
L I o2
Cov  2
vCE ,max

where Io is the dc load/output current required

L is the stray/leakage inductance
vCE,max = vCE,max - Vo
 Overvoltage Snubber Circuit
Design Rules
B) Selection of ROV
i + -
L
From 2.3  toff  0.1T + Df Io
Rov
iDf

2.3Rov Cov  0.1T Vo Cd iC iov

S1 Dov
vCov
0.1 vCE Cov
we get 2.3RovCov 
f -
1
Rov  (b) with snubber circuit
23 fCov
C) Power Rating of ROV: T
L I o2
PRov  vCE D = (time for on-
2T state)/T
v low is on
Rule of thumb: CE

2.3RovCov  0.1T D = 0.9 D = 0.1

 Turn-On Snubber Circuit
Due to the diode’s
reverse-recovery
current
L I
+ Df o
iC = Irr
iDf vCE Vo Io
Vo Due to ignoring
Cd i
C L
vCE
S t2i
1 0 0
- iC trr
to t1 t2
(a) Without snubber circuit
 Turn-On Snubber Circuit

Irr = f(IF, Vo, Lon)

I
+ Df o iC = Irr
Io
vCE Vo
Cd +
Vo Ron vLon
vLon Lon
- Don
i iC 0 0
C
vCE to t1
- S1
To absorb Lon energy and prevent voltage
(b) with snubber circuit ‘spike’ on vCE during S1 switching off
 Turn-On Snubber Circuit
I I
Df o + Df o
on off
Cd + Cd +
Vo
Vo vLon Lon vLon= 0 Lon
- Don -
Ron and
Don RB i i
C Don SC C
vCE vCE
by LS
S1 = Vo - vLon - S1
BJT turning-on BJT Steady-on
decreasing increasing Steady-state

When the switch is being turned-on, iC increases and the rate of change of iC, diC/dt
through the Lon will induce a voltage drop across Lon, i.e vLon= Lon(diC/dt).
Thus, the vCE across the switch experience an instantaneous drop : By KVL,
diC diC
Vo  vCE  vLon vCE  Vo  vLon  Vo  Lon where  finite positive
dt dt
 Turn-On Snubber Circuit
I
Df o
on

Cd +
Vo vLon Lon
- Don
Don RB i
C
The voltage drop due to Lon is given by: vCE
S1 = Vo - vLon
diC I 0 L I
vCE  vLon  Lon  Lon [ o ]  on o , to = 0 BJT turning-on
dt t1  0 t1

Small Lon Large Lon

With out Lon
 Turn-On Snubber Circuit
Design Rules
A) Selection of Ron
vLon  VDon  VRon  vCE  overvoltag e +
Ron
vCE ,max  vCE vCE ,max  I o Ron  VRon
vLon Lon
- Don
v i
Ron  CE ,max C
Io

B) Selection of Lon C) Power Rating of Ron:

2.3  toff  0.1T
Lon I o2
Lon

1 R PRon 
2. 3 Lon  on 2T
Ron 10 f 23 f

Rule of thumb: 2.3Lon/Ron  0.1T

 Turn-OFF Snubber Circuit
i + - vCE
+ L Df Io
iDf
Roff

Vo Cd

iC ioff t
S1 Doff vCE waveform during turn-off
vCE vCoff
CS
- iC CS1 < CS2 < CS3
Turn-off snubber circuit Coff = 0

Choose Coff to get desired delay. CS1

CS2
Roff < (0.1T)/ (2.3Coff) CS3

Vo vCE
Power dissipation of Roff, PR = 0.5CS(Vo)2 f
Switching trajectory
 Need for Component Temperature Control
 All components, capacitors, inductors and transformers, and semiconductor
devices and circuits have maximum operating temperatures specified by
manufacturer.
 Component reliability decreases with increasing temperature. Semiconductor
failure rate doubles for every 10 - 15 C increase in temperature above 50 C.
 High component operating temperatures have undesirable effects on components.
Capacitors Magnetic Components Semiconductors
Electrolyte • Losses (at constant power • Unequal power sharing in
evaporation rate input) increase above 100 paralleled or seriesed
increases significantly C devices.
with temperature
• Winding insulation • Reduction in breakdown
increases and thus
(lacquer or voltage in some devices.
shortens lifetime.
varnish) degrades above
• Increase in leakage currents.
100 C
• Increase in switching times.
 Temperature Control Methods
1) Control voltages across and current through components via good design
practices.
• Snubbers may be required for semiconductor devices.
• Free-wheeling diodes may be needed with magnetic components.
2) Use components designed by manufacturers to maximize heat transfer via
convection and radiation from component to ambient.
• Short heat flow paths from interior to component surface and large
component surface area.
3) Component user has responsibility to properly mount temperature-critical
components on heat sinks.
• Apply recommended torque on mounting bolts and nuts and use thermal
grease between component and heat sink.
• Properly design system layout and enclosure for adequate air flow so that
heat sinks can operate properly to dissipate heat to the ambient.
 Heat Conduction Thermal Resistance
Generic geometry of heat flow via conduction

b
h
Pcond heat flow
dire ction

Temperature = T 2 T2 > T Temperature = T 1

1

• Heat flow Pcond [W/m2] =A (T2 - T1) / d = (T2 - T1) / Rcond

• Thermal resistance Rcond = d / [ A]

• Cross-sectional area A = hb
•  = Thermal conductivity has units of W-m-1-C-1 (Al = 220 W-m-1-C-1 ).
• Units of thermal resistance are C/W
 Thermal Equivalent Circuits
• Heat flow through a structure • Thermal equivalent circuit simplifies
composed of layers of different calculation of temperatures in various
materials. parts of structure.

Chip Tj Junction Case Sink Ambient

+ R jc R R sa
+ cs + +
P Tj Tc Ts Ta
Case Tc
- - - -

Isolation pad

Heat sink T
s • Tj = Pd (Rjc + Rcs + Rsa) + Ta
T ja  T j  Ta  P( Rjc  Rcs  Rsa )
or T ja  P( Rja )

• If there parallel heat flow paths, then thermal

resistances of the parallel paths combine as
Ambient Temperature T a do electrical resistors in parallel.
Heat Sinks