Summary of

Steady-State Converter Analysis and Design

Appendix A
to the
Textbook Chapters 2 and 3 Slides

A-1 Chapters 2&3: Steady-state converter analysis

 Ideal Switch Model

Single-Pole Double-Throw Switch (SPDT)

• Switching Function s(t)

⎧ 1 , switch in position a a
s (t ) = ⎨ +
ia
⎩0 , switch in position p
ic 1
c vap
• Three-Terminal Device
– Two equations required + 0
vcp
vcp = s (t ) ⋅ vap
p
ia = s (t ) ⋅ ic
A-2 Chapters 2&3: Steady-state converter analysis
 Quiz - Buck Converter Power Stage Design

Ig Zi≈ 0 a iT
Given: Vg , Vo , R , ∆vo , ∆vi, Ts
vT c L iL Io
vL
iCi T iCo Find: D , L, IT , ITrms
Vg vi Ci D vD Co vo R Vo
iD
p

V g ≈ const Vo ≈ const
Assumptions:
Ig Zi≈ 0 a iT vT c L iL Io • Lossless
1s vL • Small ripple
vD
iCi 0 iCo
Vg vi Ci Co vo R Vo • (ω s Ci ) −1 << Z i
iD • (ω s Co ) −1 << R
p • ∆iL ≈ (5 − 10)% ⋅ I L
A-3 Chapters 2&3: Steady-state converter analysis
 Buck Converter Power Stage Design

Given: Vg , Vo , R , ∆vo , ∆vi , Ts

Ig Zi≈ 0 a iT vT c L iL Io
vL Find: Ci , Co , L , D
iCi T iCo
Vg i.e. find: D , L , ILmax
vi Ci D vD Co vo R Vo
VTmax , IT , ITrms
iD
p VDmax , ID , IDrms
Ci , Co
V g ≈ const Vo ≈ const
Assumptions:
Ig Zi≈ 0 a iT vT c L iL Io • Lossless
1s vL • Small ripple
vD
iCi 0 iCo
Vg vi Ci Co vo R Vo • (ω s Ci ) −1 << Z i
iD • (ω s Co ) −1 << R
p • ∆iL ≈ (5 − 10)% ⋅ I L
A-4 Chapters 2&3: Steady-state converter analysis
 Buck Converter
Duty Cycle and Inductor
Ig Zi≈ 0 a iT vT c L iL Io s(t) 1 DTs D'Ts DTs D'Ts
1s vL
vD 0
iCi 0 iCo
Vg v Ci Co vo R V1
i
iD vL(t) 0
p V0
2∆iL
vi ≈ V g , I g = IT , I o = Vo / R
IL
iL(t)
V1 = Vi − Vo , V0 = −Vo 0

Vo
Vo = D ⋅ Vi ⇒ D=
Vg
I L = Io

Vi − Vo Vo 1 D′Vo
2∆i L = DTs ′
= D Ts ⇒ L= I L max = I L + ∆i L
L L f s 2∆i L
A-5 Chapters 2&3: Steady-state converter analysis
 Buck Converter
Transistor and Diode
Ig Zi≈ 0 a iT vT c L iL Io s(t) 1 DTs D'Ts DTs D'Ts
1s vL
vD 0
iCi 0 iCo
Vg v Ci Co vo R IL
i
iD iT(t)
IT
0
p
IT = D ⋅ I L I Trms ≈ D ⋅ I L Vi
Transistor vT(t)
IT = D ⋅ I o I Trms ≈ D ⋅ I o 0

VT max = V g
IL
iD(t)
ID
I D = D′ ⋅ I L I Drms ≈ D ′ ⋅ I L 0
Diode 0
I D = D′ ⋅ I o I Drms ≈ D′ ⋅ I o vD(t)

VD max = V g -Vi
A-6 Chapters 2&3: Steady-state converter analysis
 Buck Converter
Input and Output Capacitors
Ig Zi≈ 0 a iT vT c L iL Io s(t) 1 DTs D'Ts DTs D'Ts
1s vL
vD 0
iCi 0 iCo
Vg v vo R
i Ci
iD
Co ∆iL
iCo(t) 0
Ts
p 2
1 1 Ts 1 ∆i L vo(t) 2∆vo
2∆vo = ⋅ ∆i L = ⋅ Vo
Co 2 2 f s 4Co
0
1 ∆i L
Co = Ig
f s 8∆vo
iCi(t) 0
1 1 D ′I g
2∆vi = ⋅ I g ⋅ D ′Ts = ⋅
Ci f s Ci vi(t) 2∆vi
1 D′I g Vg
Ci =
f s 2∆vi 0
A-7 Chapters 2&3: Steady-state converter analysis
 Boost Converter Power Stage Design

vD Given: Vg , Vo , R , ∆vo , ∆vi , Ts

Ig Zi≈ 0 a iL L c iD p Io
vL Find: Ci , Co , L , D,
iT D
iCi iCo
Vg i.e. find: D , L , ILmax
vi Ci T vT Co vo R Vo
VTmax , IT , ITrms
VDmax , ID , IDrms
Ci , Co
V g ≈ const Vo ≈ const
Assumptions:
Ig Zi≈ 0 iL L c vD iD p Io • Lossless
vL s0 • Small ripple
vT
iCi 1 iCo
Vg vi Ci Co vo R Vo • (ω s Ci ) −1 << Z i
iT
• (ω s Co ) −1 << R
a • ∆iL ≈ (5 − 10)% ⋅ I L
A-8 Chapters 2&3: Steady-state converter analysis
 Boost Converter
Duty Cycle and Inductor
Ig Zi≈ 0 iL L c vD iD p Io s(t) 1 DTs D'Ts DTs D'Ts
vL s0
vT 0
iCi 1 iCo
Vg v Ci iT Co vo R V1
i
vL(t) 0
a V0
2∆iL
vi ≈ V g , Ig = IL , I o = Vo / R
IL
iL(t)
V1 = Vi , V0 = Vi − Vo 0

1 Vg 1
Vo = ⋅ Vi ⇒ D = 1− IL =
′
⋅ Io
1− D Vo D

Vi 1 DV g 1 DVg
2∆i L = DTs = ⋅ ⇒ L= I L max = I L + ∆i L
L fs L f s 2∆i L
A-9 Chapters 2&3: Steady-state converter analysis
 Boost Converter
Transistor and Diode
Ig Zi≈ 0 iL L c vD iD p Io s(t) 1 DTs D'Ts DTs D'Ts
vL s0
vT 0
iCi 1 iCo
Vg v Ci iT Co vo R IL
i
iT(t)
IT
0
a
IT = D ⋅ I L Transistor I Trms ≈ D ⋅ I L Vo
vT(t)
Io Io
IT = D ⋅ VT max = Vo I Trms ≈ D ⋅
0
D ′ D′
IL
iD(t)
I D = D′ ⋅ I L ID
Diode I Drms ≈ D ′ ⋅ I L 0

Io Io 0
I D = D′ ⋅ VD max = Vo I Drms ≈ D ′ ⋅ vD(t)
D′ D′
-Vo
A-10 Chapters 2&3: Steady-state converter analysis
 Boost Converter
Input and Output Capacitors
Ig Zi≈ 0 iL L c vD iD p Io s(t) 1 DTs D'Ts DTs D'Ts
vL s0
vT 0
iCi 1 iCo
Vg v Ci iT Co vo R iCo(t)
i

0
a -Io
1 1 D ′I o
2∆vo = − ′
⋅ (− I o ) ⋅ D Ts = ⋅ vo(t) 2∆vo
Co f s Co Vo
1 D′I o
Co = 0
f s 2∆vo
∆iL
iCi(t) 0
1 1 Ts 1 ∆i L Ts
2∆vi = ⋅ ∆i L = ⋅
Ci 2 2 f s 4Ci 2
vi(t) 2∆vi
1 ∆i L Vg
Ci =
f s 8∆vi 0
A-11 Chapters 2&3: Steady-state converter analysis
 Buck-Boost Converter Power Stage Design

Given: Vg , Vo , R , ∆vo , ∆vi , Ts

Ig Zi≈ 0 a iT vT c
vD i
D p Io
Find: Ci , Co , L, D
D
iCi T iCo
Vg i.e. find: D , L , ILmax
vi Ci L vL Co vo R Vo
VTmax , IT , ITrms
iL
VDmax , ID , IDrms
Ci , Co
V g ≈ const Vo ≈ const
Assumptions:
Ig Zi≈ 0 a iT 1s0 iD p Io • Lossless
vT v • Small ripple
iCi c D iCo
Vg Vg v Ci L vL Co vo R Vo • (ω s Ci ) −1 << Z i
i
iL • (ω s Co ) −1 << R
• ∆i L ≈ (5 − 10)% ⋅ I L
A-12 Chapters 2&3: Steady-state converter analysis
 Buck-Boost Converter
Duty Cycle and Inductor
Ig Zi≈ 0 a iT 1s0 iD p Io s(t) 1 DTs D'Ts DTs D'Ts

vT v 0
iCi c D iCo
Vg v Ci L vL Co vo R V1
i
iL vL(t) 0
V0
2∆iL
vi ≈ V g , I g = IT , I o = Vo / R
IL
iL(t)
V1 = Vi , V0 = −Vo 0

D Vo
Vo = ⋅ Vi D= 1
⇒ IL = ⋅ Io
Vo + V g ′
1− D D

Vi 1 DV g 1 DVg
2∆i L = DTs = ⋅ ⇒ L= I L max = I L + ∆i L
L fs L f s 2∆i L
A-13 Chapters 2&3: Steady-state converter analysis
 Buck-Boost Converter
Transistor and Diode
Ig Zi≈ 0 a iT 1s0 iD p Io s(t) 1 DTs D'Ts DTs D'Ts

vT v 0
iCi c D iCo
Vg v Ci L vL Co vo R IL
i
iT(t)
iL IT
0
IT = D ⋅ I L I Trms ≈ D ⋅ I L Vi+Vo
Transistor vT(t)
I Io
IT = D ⋅ o I Trms ≈ D ⋅
D′ D′ 0

VT max = VD max = Vi + Vo IL
iD(t)
ID
I D = D′ ⋅ I L I Drms ≈ D ′ ⋅ I L 0
Diode
I Io 0
I D = D′ ⋅ o I Drms ≈ D′ ⋅ vD(t)
D′ D′
-(Vi+Vo)
A-14 Chapters 2&3: Steady-state converter analysis
 Buck-Boost Converter
Input and Output Capacitors
Ig Zi≈ 0 a iT 1s0 iD p Io s(t) 1 DTs D'Ts DTs D'Ts

vT v 0
iCi c D iCo
Vg v Ci L vL Co vo R iCo(t)
i
iL 0
-Io
1 1 D ′I o 2∆vo
2∆vo = − ⋅ (− I o ) ⋅ D ′Ts = ⋅ vo(t)
Co f s Co Vo
1 D′I o 0
Co =
f s 2∆vo Ig
iCi(t) 0
1 1 D ′I g
2∆vi = ⋅ I g ⋅ D ′Ts = ⋅
Ci f s Ci
vi(t) 2∆vi
1 D′I g Vg
Ci =
f s 2∆vi
0
A-15 Chapters 2&3: Steady-state converter analysis