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Submitted By:
M.K. Ataul Karim
ID: 163001112
Submission Date: 28th July, 2020.
Exercise 2.1: f= A’B’+AC+BC; Using this function, make a LUT in DSCH.
Snip and show at least one logic output while running the simulation.
Answer:
Here,
f= A’B’+AC+BC
According to this function the truth table will be:
A B C Output (f)
0 0 0 1
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 1
Answer:
(i) Implement the truth table using a 4-to-1 MUX:
w1 w2 w3 f
(ii) Convert the 4-to-1 MUX into a 2-to-1 MUX logic circuit in DSCH:
When, select pin w1=0, f= w2.w3
when, select pin w1=1, f= w2+w3
Timing diagram of this circuit: