Professional Documents
Culture Documents
2. What are the four basic types of shift registers? Draw a block
diagram for each of them.
Answer
i. Serial-in serial-out shift register
2. Linearity.
In D/A converters, it is desired that equal increments in the
numerical significance of the digital inputs should result in
equal increments in the analog output voltage.
3. Accuracy.
The accuracy of a D/A converter is determined by the
measure of the difference between the actual output voltage
and the expected output voltage. It is specified as the
percentage of maximum output or the full-scale output
voltage. For example, if a D/A converter is specified as the
accuracy of 0.1%, with full-scale of maximum output
voltage of 10 V, the maximum error at output voltage
corresponding to any input combination will be 10 ×
0.1/100 V = 10 mV.
4. Settling time.
It is one of the important governing factors of a D/A
converter. For any change in digital input, the analog output
voltage does not instantaneously attain its expected value
corresponding to the digital input and takes some time to
attain the steady state output. This is due to transients that
appear at the output voltage and oscillation may occur
because of the presence of switches, active devices, stray
capacitance, and inductance associated with passive circuit
components.
5. Temperature sensitivity.
The analog output voltage for any fixed digital input varies
with temperature. This is due to the temperature
sensitiveness of various active and passive components like
reference voltage source, resistors, diodes, transistors, OP
AMPs, etc. The temperature sensitivity is defined by the
change in output voltage from its expected value in respect
to temperature and is specified in terms of ± ppm/°C.
Answer
1. Range of input voltage.
This is the factor that specifies the minimum and maximum
analog input voltage that can be accepted by an A/D
converter.
2. Input impedance.
This is an important design criterion that limits the
maximum input current to the A/D converter without
deteriorating its performance or damage.
3. Accuracy.
It is the error involved in the conversion process and is
represented in %.
4. Conversion time.
This characteristic specifies the maximum time required for
the conversion process and is very critical while interfacing
with other devices and synchronization with time. The
output is considered only after the end of conversion.
Answer
Resolution= (1/ (2N-1))* VFS
2N-1= VFS/ Resolution
2N-1=5V/1mV=5000
2N=5001
N=log105001/ log102
N=13
8. List down any four different logic families basing on internal
construction and fabrication process involved in the integrated
circuits.
Answer
RTL Resistor-transistor logic
DTL Diode-transistor logic
TTL Transistor-transistor logic
ECL Emitter-coupled logic
I2L Integrated-injection logic
MOS Metal oxide semiconductor
CMOS Complementary metal oxide semiconductor
The first two, RTL and DTL logic families have only historical
significance, since they are seldom used in new designs. RTL was
the first commercially available family to have been used
extensively. It is included here because it represents a useful
starting point to understand the basic operation of digital gates. A
TTL circuit is the modification of a DTL and hence, DTL circuits
have been gradually replaced by TTL. The operation of TTL will be
easier to understand after DTL gates are discussed. These families
have a large number of SSI circuits as well as MSI and LSI circuits.
I2L and MOS are mostly used for the construction of LSI functions.
Answer
1. Propagation delay (speed of operation).
2. Power dissipation.
3. Fan in.
4. Fan out.
5. Noise immunity.
6. Operating temperature.
Answer
TTL is the most popular of all the logic families. The original basic
TTL gate was a slight improvement over the DTL gate. As the TTL
technology progressed, more and more additional improvements
were carried out to make this logic family the most widely used
type in the design of digital systems. Gates of this family possesses
the highest switching speed when compared to other logic families
that utilize the saturated transistors. TTL family, or the
commercially available 74/54 series, evolved into five major
divisions.
ii. Then from the given state diagram the state table has to
be prepared.
iii. If the state reduction mechanism is possible, then the
number of states may be reduced.
vii. With the help of a state table and the flip-flop excitation
table the circuit excitation and the output tables have to
be determined.
Answer
Answer
15. The circuits below are a D-latch and a D-flip flop. Complete the
timing diagram by drawing the waveforms of X and Y assuming
that they are both low initially
Answer
16. In the six circuits below the setup and hold times of the flip
flops are 5ns and 1ns respectively. The propagation delay of the flip
flops may vary between 4ns and 7ns while the propagation delay of
the gates may vary between 2ns and 6ns. The signal C is a
symmetrical square wave. Write down the setup and hold
inequalities that relate to the second flip flop in each circuit. You
should measure all times from the rising edge of CLOCK. Identify
which of the circuits will not work reliably and determine the
maximum clock frequency for each of the others.
Answer