NAME – ARYAN KUMAR

ROLL NO – BTECH/10394/18

BRANCH – ECE ‘B’

Experiment 1

Aim of the Experiment:

Design of a low pass RC circuit for a given cut off frequency and
obtain its frequency
response and observe the response for square waveform for T<<RC,
T=RC and
T>>RC.

AIM1: Obtain the frequency response of a low pass RC circuit with

sine wave input.

AIM2: Plot the output for square wave input under T<<RC, T=RC and
T>>RC.

Equipment Used :
Dual Channel CRO, Bode Plotter, Resistor, Capacitor, Function
Generator
Circuit Diagram:

S.no Time Constant V V Practical Gain/Loss

Theoretical
1. RC >> T V1 = -490.437
-499.895 mV
mV
V2 = 498.703 mV
499.895 mV
2. RC = T V1 = -19.7 V -19.264 V
V2 = 19.7 V 19.797 V
3. RC << T V1 = -4.89 V -4.775 V
V2 = 4.89 V 4.80 V

OBSERVATION TABLE FOR SQUARE WAVE INPUT

1. RC >> T

2. RC = T
3. RC << T

Experiment 2

Aim of the Experiment:

Design of a high pass RC circuit for a given cut off frequency and
obtain its frequency
response and observe the response for square waveform for T<<RC,
T=RC and
T>>RC.

AIM1: Obtain the frequency response of a high pass RC circuit with

sine wave input.
AIM2: Plot the output for square wave input under T<<RC, T=RC and
T>>RC.

Equipment Used:
Dual Channel CRO, Bode Plotter, Resistor, Capacitor, Function
Generator

Circuit Diagram:

Fc = 1/(2*pi*R*C), R = 100KOhm, C = 0.001uF

S.no Time Constant V V practical Gain/Loss

Theoretical
1. RC >> T V1 = 20.4 V 20.48 V
V2 = -20.4 V -20.47 V
2. RC = T V1 = 24.898 24.896 V
V
V2 = -24.769 V
-24.898 V
3. RC << T V1 = 39.732 39.758 V
V
V2 = -37.777 V
-39.732 V
OBSERVATION TABLE FOR SQUARE WAVE INPUT
1. RC >> T

2. RC = T

3. RC << T
Experiment 3

Aim of the Experiment:

Determination of the resonance frequency in a series RLC circuit and

plotting of its
waveforms.

AIM1: Obtain the frequency response of a series RLC circuit.

AIM2: Determine the resonance frequency in a series RLC circuit and
compare this
to the expected resonance value.

Equipments Used:
Dual Channel CRO, Bode Plotter, Resistor, Capacitor, Inductor,
Function Generator
RLC circuit
F = 1/(2*pi*(L*C) ^1/2), L = 5mH, C = 0.0791uF, R = 100 KO

Circuit Diagram:

OBSERVATION TABLE FOR VARIOUS FREQUENCIES

S.n Frequency Vout (V) Vin (V) Vout/Vin Gain
o (Hz) (dB)
1 1 2 40 0.05 -26
2 10 16 40 0.4 -7.95
3 100 38.2 40 0.955 -0.399
4 500 39.8 40 0.995 -0.043
5 1k 39.9 40 0.9975 -0.021
6 2k 39.7 40 0.9925 -0.0653
7 3k 39.7 40 0.9925 -0.0653
8 4k 39.82 40 0.9955 -0.0391
9 5k 39.85 40 0.99625 -0.0326
10 6k 39.89 40 0.99625 -0.0326
11 7k 39.79 40 0.99475 -0.04572
12 7.5k 39.892 40 0.9973 -0.02348
13 8k 39.912 40 0.9978 -0.01913
14 9k 39.894 40 0.99735 -0.02174
15 10k 39.844 40 0.9961 -0.03394
16 100k 39.818 40 0.99545 -0.03961
17 200k 39.834 40 0.99585 -0.03612
18 300k 39.79 40 0.99475 -0.04572
19 1M 38 40 0.95 -0.445
20 2M 33.8 40 0.845 -1.462

NAME – ARYAN KUMAR

ROLL NO – BTECH/10394/18

BRANCH – ECE ‘B’

Experiment No 4

Diode Clipper Circuit

Aim of the Experiment:

Construction of Diode Clipper circuits and plotting of its waveforms.
AIM1: Design the Shunt Positive Clipper, Shunt Negative Clipper &
Negative Bias series Clipper circuits and plot input-output
waveforms.
AIM2: Design the Positive bias series Clipper and Double ended shunt
clipper and plot input output waveforms.

Software Used: Ni Multisim 14.0

Equipment and Components Used:
Sl. Test and Measuring Rating/ Value Quantity
No. Equipment
1. CRO (Dual Channel) 30 MHz 1
2. AC Power Supply 1
3. DC Power Supply 1
Components
Sl. Component Rating Quantity
No.
1. Diode
2. Capacitor 1
 3. Resistor 1
4. Bread Board 1
5. Connecting wires

Theory:
Clipping circuits are used to select transmission of that part of an
arbitrary waveform which lies above or below some particular
reference voltage level. Clipping circuits are also referred to as
Limiters, Amplitude selectors or Slicers.
Clipping circuits are constructed using a combination of resistors,
diodes or transistor and reference voltage. Clipping circuits are
classified based on the position of diode as
i. Series diode clipper
ii. Shunt diode clipper
and further they are classified as, with ‘0’ reference, with positive
reference, with negative reference; also, as positive clipper, negative
clipper.
Circuit Diagram and Waveforms:

Series negative clipper with zero reference

          

Output Waveform

Transfer Characteristics
 Series positive clipper with zero reference

         
Output Waveform

Transfer Characteristics
 Shunt negative clipper with zero reference

       
Output Waveform

Transfer Characteristics
 Shunt positive clipper with zero reference

       
Output Waveform

Transfer Characteristics
Series positive clipper with positive reference

Output Waveform

Transfer Characteristics
 Shunt negative clipper with positive reference

       

Output Waveform

Transfer Characteristics
 Series negative clipper with positive reference

       
Output Waveform

Transfer Characteristics
 Shunt positive clipper with positive reference

       
Output Waveform

Transfer Characteristics
 Two Level Clipper

       
Output Waveform

Transfer Characteristics
Observation:

S. Reference Practical Clipping Voltage

No. Type Of Clipper Voltage Levels

V1 0.215V

0V V2 -4.35V

V1 2V
Series Positive
1 Clipper 2V V2 -4.459V

V1 4.390V

0V V2 0V

V1 4.420V
Series Negative
2 Clipper 2V V2 2V

V1 0.587V

0V V2 -4.979V

V1 2.559V
Shunt Positive
3 Clipper 2V V2 -4.988V

4 Shunt Negative 0V V1 4.979V

 V2 -0.587V

V1 4.964V

Clipper 2V V2 1.396V

-2V V1 -2.559V

5 Two Level Clipper 2V V2 2.559V

Result and Discussions:

The Diode Clipper, also known as a Diode Limiter, is a wave shaping
circuit that takes an input waveform and clips or cuts off its top half,
bottom half or both halves together. Positive Clipper and Negative
Clipper. In a positive clipper, the positive half cycles of the input
voltage will be removed. ... During the negative half cycle of the
input, the diode is forward biased and so the negative half cycle
appears across the output.

Experiment No 5
Diode Clamper Circuit
Aim of the Experiment:
Construction of Diode Clamper circuits and plotting of waveforms.
AIM1: Design the Positive Clamper & Negative Clamper circuits and
plot input - output waveforms.
AIM2: Design the Positive Bias Clamper & Negative Bias Clamper
circuits and plot input - output waveforms.

Software Used: Ni Multisim 14.0

Equipment and Components Used:
Sl. Test and Measuring Rating/ Value Quantity
No. Equipment
1. CRO (Dual Channel) 30 MHz 1
2. AC Power Supply 1
3. DC Power Supply 1
Components
Sl. Component Rating Quantity
No.
1. Diode 1
2. Capacitor 1
3. Resistor 1
4. Bread Board 1
5. Connecting wires

Theory:
Whenever a circuit point is connected through low impedance to a
reference voltage 𝑉R , we say that point has been clamped to 𝑉R and
the voltage at that point will not deviate appreciably from 𝑉R.
Available in two types – one way clamp and two way clamp.
Many times, whenever a signal passes through a capacitive coupling
network, it loses its DC component. Clamping circuit helps in
reintroducing the DC component. Hence also known as dc – restorer
circuit, dc inserter OR dc re – inserter circuit. A clamper is also
referred to as DC restorer or DC re-inserter. The Clampers clamp the
given waveform either above or below the reference level, which are
known as positive or negative clampers respectively.
Clamping circuits are classified as two types.
i. Negative Clampers
ii. Positive Clampers

Circuit Diagram:
Negative Clamping with zero reference
 Output Waveform

Positive Clamping with zero reference

 Output Waveform

Negative Clamping with Negative reference

 Output Waveform

Positive Clamping with Positive reference

Output Waveform
Negative Clamping with Positive reference

Output Waveform
Positive Clamping with Negative reference

Output Waveform
Observation:

S. Type Of Reference Practical Clipping Voltage

No. Clamper Voltage Levels
V1 9.416V
0V V2 -0.429V
V1 11.335V
2V V2 1.547V
Positive V1 7.505V
1 clamper -2V V2 -2.4V
V1 0.429V
0V V2 -9.416V
V1 2.4V
2V V2 -7.532V
Negative V1 -1.554V
2 Clamper -2V V2 -11.531

Result and Discussions:

1. The different types of clamping circuits are studied and observed
the response for various combinations of VR, capacitors and diodes.
2. A clamping circuit (also known as a clamper) will bind the upper or
lower extreme of a waveform to a fixed DC voltage level.
3. Clamper circuits do not restrict the peak-to-peak values of the
signal.
NAME – ARYAN KUMAR

ROLL NO – BTECH/10394/18

BRANCH – ECE ‘B’

EXPERIMENT 6

NAME - SCHMITT TRIGGER

AIM -

Design of Schmitt trigger circuit using transistor and generation of

square wave from a given sine wave.

AIM1: Design Schmitt Trigger circuit using BJT and plot waveforms.
AIM2: Find the UTP, LTP and Hysteresis of the Schmitt Trigger circuit.

SOFTWARE USED - NI MULTISIM 14.2

THEORY AND WORKING PRINCIPLE -

Schmitt Trigger is an emitter coupled binary trigger circuit. It has two

stable states because the transistor Q1 may be ON and Q2 OFF or vice
versa. To understand its working principle let’s assume that the input
starts at ground, or 0 volts and the transistors Q1 and Q2 are
identical.

Let transistor Q1 is necessarily turned off, and has no effect on this

circuit. Resistors Rc1, R1, and R2 form a voltage divider across the VCC.
The power supply sets the base voltage of Q2 to a value of (VCC × R2)/
(Rc1 + R1 + R2). As long as the input voltage remains significantly less
than the base voltage of Q2, Q1 will remain off and the circuit
operation will not change. While Q1 is off, Q2 is on. The emitter and
collector current are the same, and are set by the value of Re and the
emitter voltage. Emitter Voltage = Base voltage at Q2 – VBE (i.e., 0.7 V
for Si) If Q2 is in saturation under these circumstances, the output
voltage will be within a fraction of the threshold voltage set by R c1,
R1, and R2. It is important to note that the output voltage of this
circuit cannot drop to zero volts, and generally not to a valid logic 0.
Now, suppose that the input voltage rises, and continues to rise until
it approaches the threshold voltage at the base of Q2. At this point,
Q1 begins to conduct. Now the current through Rc1 increases and the
voltage at the collector of Q1 decreases. But this reduces the base
voltage on Q2. Q1 is now conducting and it carries some of the
current flowing through Re, and the voltage across Re doesn't change
as rapidly. Therefore, Q2 turns off and the output voltage rises to VCC.
The circuit has just changed states. Let the input voltage rises
further, it will turn ON Q1 turned OFF Q2. However, if the input
voltage starts to fall back towards zero, there must clearly be a point
at which this circuit will reset itself. The falling threshold voltage is
the voltage at which Q1's base becomes more negative than Q2's
base, so that Q2 will begin conducting again. But it is not the same as
the rising threshold voltage, since Q1 is currently affecting the
behaviour of the voltage divider.

Important:

1. The circuit will change states as VIN approaches VB2, not when
the two voltages are equal.
2. Since the common emitter connection is part of the feedback
system in this circuit, value of Re must be large enough to
provide the requisite amount of feedback, without becoming so
large as to starve the circuit of needed current.
 The output voltage falls back to the sum of the voltages across R e
and the saturation voltage of Q2. Thus, a square wave is
produced. The turn ON voltage is usually called the upper trigger
point or UTP and the turn OFF voltage is called lower trigger
point or LTP. UTP is always greater than LTP since the voltage
required to turn ON a device is more than that required to turn
it OFF.

EXPERIMENTAL SETUP -
OBSERVATION TABLE -

S.No. Vin (Vpk) Vout (Vpk-pk) UTP (V) LTP (V)

1 1V 0 0 0
2 6V 332 µV 5.898 V 3.808 V
3 12 V 1.79 V 5.963 V 3.57 V
4 24 V 0.768 V 6.62 V 4.16 V

WAVEFORMS -

1. Vin = 6 V, UTP = 5.898 V, LTP = 3.808 V

 2. Vin = 12 V, UTP = 5.963 V, LTP = 3.57 V

RESULT AND DISCUSSIONS: -

The input signal was compared with the output signal and the UTP
and STP values were noted.

EXPERIMENT 7:
NAME - ASTABLE MULTIVIBRATOR

AIM -

Construction of Astable Multivibrator using transistor and to plotting

of the output waveform.

AIM1: Observe the waveforms of Astable Multivibrator at base and

collector of the transistors.
AIM2: Verify different states and find the frequency.

SOFTWARE USED - NI MULTISIM 14.2

THEORY AND WORKING PRINCIPLE –

EXPERIMENTAL SETUP -
WAVEFORMS -

Fig: Waveform of output Vc1 from the collector of transistor Q1

Fig: Waveform of output Vc2 from the collector of transistor Q2

Fig: Waveform of output Vb1 from the base of transistor Q1

Fig: Waveform of output Vb2 from the base of transistor Q2

RESULT AND DISCUSSIONS -

By performing above experiment we designed Astable multivibrator
also plot different output waveforms from collector and base
terminal of transistor Q1 and Q2. Astable multivibrator does not
require any triggering pulse and no level is stable so it transit from
high to low then again high.

Max voltage of collector is 12V and min is 16.85 mV.

Theoretical time period is T= 1.38*50k*0.1uF= 6.9 ms and its frequency is

144.94 Hz.
Observed time period is T= 7.054 ms and observed frequency is
141.71Hz.

EXPERIMENT 8:

NAME - MONO-STABLE MULTIVIBRATOR

AIM - Construction of Monostable Multivibrator using transistor and

plotting of the output waveform.

AIM1: Observe the waveforms of Monostable Multivibrator at base

and collector of the waveforms.
AIM2: Find the width of pulse.

SOFTWARE USED - NI MULTISIM 14.2

THEORY AND WORKING PRINCIPLE -

EXPERIMENTAL SETUP: -
WAVEFORMS -

Fig: Square wave Input waveform 1V(peak) and frequency 1.4kHz

Fig: Waveform of output Vc1 from the collector of transistor Q1

Fig: Waveform of output Vc2 from the collector of transistor Q2

RESULT AND DISCUSSIONS -
By performing above experiment we designed Monostable
multivibrator also plot different output waveforms from collector
terminal of transistor Q1 and Q2. Monostable multivibrator requires
one triggering pulse and one state is stable and other is unstable.

Max voltage of collector is 12V and min is 16.97mV.

Theoretical time period is T=0.69*50k (ohm)*0.01uF= 345 us and its

frequency is 2.89 kHz.

Observed time period is T=711.853 us and observed frequency is

1.40 kHz.

NAME – ARYAN KUMAR

ROLL NO – BTECH/10394/18

BRANCH – ECE ‘B’

EXPERIMENT 9

NAME: BISTABLE MULTIVIBRATOR

AIM:

Construction of bistable multivibrator using transistor and plotting of

the output waveform.
AIM1: Observe the waveforms of Bistable Multivibrator at base and
collector of the transistors.
AIM2: Verify different states.

SOFTWARE USED: NI MULTISIM 14.2

THEORY AND WORKING PRINCIPLE:

EXPERIMENTAL SETUP:

INPUT: 1 V (peak) ,1 kHz (square wave)

WAVEFORMS:

Fig: output waveform at VC1 from collector terminal of Transistor

Q1
(Max volt: 14.720V, Min volt: 21.697mV, time period=2.01ms)
Fig: output waveform at VC2 from collector terminal of Transistor
Q2
(Max volt: 14.720V, Min volt: 21.696mV, time period=2.01ms)
Fig: output waveform at Vb1 from collector terminal of Transistor
Q1
(Max volt: 725.113mV, Min volt: -14.071V, time period=1.998ms)
Fig: output waveform at Vb2 from collector terminal of Transistor
Q2
(Max volt: 725.053mV, Min volt: -14.071V, time period=1.998ms)

RESULT AND DISCUSSIONS:

By performing above experiment we designed Bistable multivibrator
also plot different output waveforms from collector and base
terminal of transistor Q1 and Q2 respectively.

Theoretical values:
R1=50k, R2=100k, C=33nF
Theoretical F(max)= 454.45Hz
Observed max frequency is F=1/ (1.998m) = 500.5Hz
EXPERIMENT 10:

NAME: MILLER SWEEP CIRCUIT

AIM: Design of Miller Sweep circuit and plotting of the output

waveform.

SOFTWARE USED: NI MULTISIM 14.2

THEORY AND WORKING PRINCIPLE:

EXPERIMENTAL SETUP:
WAVEFORMS:

RESULT AND DISCUSSIONS:

Output waveform was observed and the sweep time Ts, retrace time
Tr were noted.
Retrace time Tr = 485.871 us
Sweep time Ts = 517.20 us