A B C D E

1 1

Compal confidential 2

Schematics Document
Mobile Arrandale rPGA989 with
3 Intel PCH(Ibex Peak-M) core logic 3

2009-11-05
REV 1.0

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 1 of 45
A B C D E
 A B C D E

Compal confidential Calpella Consumer 14" UMA

CK505 32QFN
Clock Generator
1
Fan conn Page 6
Mobile Arrandale ICS9LRS3197AKLFT MLF 1

P19
2C CPU + GMCH
Socket-rPGA989 DDR3 SO-DIMM X2
DDR3 1066 1.5V BANK 0, 1, 2, 3 P17, 18
LCD Conn. Page 6,7,8,9,10
page 21 UMA

Dual Channel

USB conn x1 P29

CRT Left side (ESATA)
page 20 DMI X4 FDI X4
UMA
USB conn x2
Right side P29

2 2

USB2.0 X12
BT Conn
P29

HDMI Conn. Level Shifter UMA Intel PCH USB Camera

page 22 page 22
Azalia
(LVDS Conn) P21
Ibex Peak-M
SATA Master-1
PCI-E BUS*4 FCBGA 951 Finger print P29
SATA Slave

Page 11,12,13,14,15,16
Mini-Card P29
WWAN

RTL8401 (LAN Mini-Card Mini-Card SPI

Audio CKT
New Card Codec_IDT92HD80 Audio Jack
+Card reader) WLAN TV-tuner
P27 P28
P25 P24 P24 P24 LPC BUS
3 3

P30
SPI ROM 32M
AT25DF321-SU MDC
RJ45 CONN P27
P25
ME code + System BIOS
ENE SATA HDD Connector
4M Bytes P23
KB926
Version D2 P31
SATA ODD Connector
P23

Touch Pad CONN. Int.KBD

RTC CKT. LED
P32 P31
P11 P32 Dock ESATA P29
USB2.0*1

ACCELEROMETER RGB SPI ROM 2M P30 LPC Debug

RJ45 MX25L2005CMI-12G Port P30 Multi Bay P23
ST P23
SPDIF
4 4

MIC*1 EC code
K/B backlight Conn LINE-OUT*1 256K Bytes Capsense switch Conn
P32
P32

Security Classification Compal Secret Data Compal Electronics, Inc.

2006/02/13 2006/03/10 Title
DC/DC Interface CKT. Issued Date Deciphered Date
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P33 P26 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 2 of 45
A B C D E
 A

Symbol Note : USB assignment:

USB-0 Left side(with ESATA)
Voltage Rails O MEANS ON X MEANS OFF
: means Digital Ground USB-1 Right side
USB-2 Right side
USB-3 Dock
: means Analog Ground USB-4 Camera
power USB-5 MiniCard(WLAN)
plane @ : means just reserve , no build USB-6 X (HM55 don't support)
USB-7 X (HM55 don't support)
+B +5VALW +1.5V +5VS 45@ : means need be mounted when 45 level assy or rework stage. USB-8 MiniCard(WWAN)
+3VS
VL BATT @ : means need be mounted when 45 level assy or rework stage. USB-9 New Card
+3VALW +1.5VS
USB-10 X
+0.75V CONN@ : means ME part USB-11 Finger Printer
State +VCCP
PA@ : Only For PA (With Capacitor sensor) USB-12 Bluetooth
+CPU_CORE
USB-13 X
+1.05VS OPP@ : For POWER BUTTON (NO CAP SERSOR)
+1.5VS_CPU PCIe assignment:
DEBUG@ : For DEBUG
PCIe-1 WWAN
PCIe-2 WLAN
S0 O O O O PCIe-3 RTL8401 Combo
PCIe-4 New card
S1 O O O O PCIe-5 X
PCIe-6 X
S3 O O O X PCIe-7 X (HM55 don't support)
PCIe-8 X (HM55 don't support)
S5 S4/AC O O X X
SATA assignment:
S5 S4/ Battery only O X X X SATA0 HDD
SATA1 ODD
S5 S4/AC & Battery
don't exist X X X X SATA2 X (HM55 don't support)
1
SATA3 X (HM55 don't support) 1

SATA4 ESATA
SATA5 Multi Bay

SMBUS Control Table PCH I2C / SMBUS ADDRESSING

WWAN M93 NEW
Thermal Thermal Cap sensor CARD G sensor
SOURCE XDP BATT Sensor SODIMM CLK GEN WLAN
Sensor board DEVICE HEX ADDRESS
SMB_EC_CK1
SMB_EC_DA1
KB926 X V X X X X X X V X X +3VL DDR SO-DIMM0 A0 10100000
DDR SO-DIMM1 A4 10100100
SMB_EC_CK2 +3VALW
SMB_EC_DA2
KB926 X X X X X X X X X X X CLOCK GENERATOR (EXT.) D2 11010010
G sensor 1D 00011101
SMBCLK +3VS/+3VALW
SMBDATA
PCH X X X V V V V X X V V
SML0CLK
PCH X X X X X X X X X X X +3VALW EC I2C / SMBUS1 ADDRESSING
SML0DATA
SML1CLK
SML1DATA
PCH X X X X X X X X X X X DEVICE HEX ADDRESS

VCCP +3VS +3VS +3VS

+3VS
+3VL +3VS +3VS
CONNECTED Smart Battery
@+3VALW Cap Sensor board
@+3VALW

ZZZ ZZZ
PCB: DA60000F400
PA@: DAZ0BI00600 (w/o SIM daoughter/B)
OPP@: DAZ0BI00400
DAZ0BI00100 DAZ0BI00400
PA@ OPP@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 3 of 45
A
 5 4 3 2 1

1A 80mA 80mA
+V_BATTERY Dock con +3VAUX_BT BLUE TOOTH
1.3A 1.3A
Dock con 0.3A +3VS_PEC New card
INVPWR_B+ LVDS CON
EC_ROM 10mA
SPI ROM(PCH) 25mA
20mA CODEC 92HD81
DOCK_VIN VL +5VL +3VL_EC EC 25mA
D
+3VS_DVDD D

CIR INT_MIC
50mA
Finger printer
541mA
PCH
1.5A 1.5A
7642mA +3VS +LCDVDD LVDS CON
201mA 201mA 250mA
8.3A 8287mA +3V_LAN LAN +3VS_CK505
AC VIN +3VALW
275A 275mA 1A 1A
+3V_PEC NEW CARD +3VS_WWAN Mini card-WWAN
7.12A
B++ 169mA 1A 1A
PCH +3VS_WLAN Mini card-WLAN

500mA 500mA 250mA

+USB_VCC USB-L(ESATA) PCH
C
850mA 850mA C

1A +1.8VS 600mA
USBX2-R CPU
7.7A
+5VALW 0.1A 20mAx4 100mA 100mA
+5VALW_LED LED +3VS_LS HDMI TRANS

6.1A DDR3
+5VS
35mA
MDC
B+ 3A
CPU
20.67A +3VS_HDA CODEC I/O
8 A
2.16A 13.3A DDR3 800Mhz 4G x2 1mA 1mA
+1.5V_B+ +1.5V +3VS_ACL G-SENSOR
650mA 650mA
+0.75V DDR3 60mA
CODEC 92HD81
60mA
B
0.5A +AVDD_CODEC B

3.7 X 3=11.1V Mini card-WWAN INT_MIC

+1.5VS_WLAN 500mA
DC BATT 0.5A CODEC PVDD
1650mA Mini card-WLAN
+1.5VS
1.8A
650mA 650mA ODD
+1.5VS_PEC New card
1300mA
HDD
162mA
PCH 1300mA
18.24A Multi Bay
+VCCP 18A
CPU 1A 1A
+CRT_VCC CRT CONN
2.89A 25.24A
VCCP_B+ +1.05V_VCCP 80mA
+1.05VS_CK505 50mA/3.19V
+USB_CAM PC Camera
7A 7A
+1.05VS PCH 120mA 20mAx6
+5VS_LED LED
A A

5.49A 48A/1.05V
CPU_B+ +VCC_CORE CPU

Security Classification Compal Secret Data Compal Electronics, Inc.

1.72A 15A/1.05 V Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title

GFX_B+ +GFX_CORE CPU THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
Power delevry
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 4 of 45
5 4 3 2 1
 A

1 1

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 5 of 45
A
 Layout rule 10mil
width trace length <
 5 4 3 2 1

+VCCP
0.5", spacing 20mil JCPU1B
R1 1 2 20_0402_1% COMP3 AT23 COMP3
A16 CLK_CPU_BCLK
XDP Connector XDP_TDI @ R2 1 2 51_0402_1%
BCLK CLK_CPU_BCLK 14

MISC
R3 1 2 20_0402_1% COMP2 AT24 B16 CLK_CPU_BCLK# XDP_TMS @ R4 1 2 51_0402_1%
COMP2 BCLK# CLK_CPU_BCLK# 14
R5 1 2 49.9_0402_1% COMP1 XDP_PREQ# @ R6 1 2 51_0402_1%

CLOCKS
G16 COMP1 BCLK_ITP AR30
BCLK_ITP# AT30
R7 1 2 49.9_0402_1% COMP0 AT26 XDP_TDO R8 1 2 51_0402_1%
COMP0 CLK_EXP
PEG_CLK E16 CLK_EXP 12
D16 CLK_EXP# This shall place near CPU
PEG_CLK# CLK_EXP# 12
PAD T1 TP_SKTOCC# AH24 SKTOCC# XDP_TCK @ R9 1
DPLL_REF_SSCLK A18 2 51_0402_1%
D DPLL_REF_SSCLK# A17 eDP D
H_CATERR# AK14 CATERR#

THERMAL
F6 SM_DRAMRST# JTAG MAPPING
R10 H_PECI_ISO SM_DRAMRST#
14 H_PECI 1 2 AT15 PECI
0_0402_5% AL1 SM_RCOMP0
SM_RCOMP[0] SM_RCOMP1 XDP_TDI_R R30 XDP_TDI
SM_RCOMP[1] AM1 1 2 0_0402_5%
AN1 SM_RCOMP2
H_PROCHOT# SM_RCOMP[2]
40 H_PROCHOT# AN26 PROCHOT#
AN15 PM_EXTTS#0 T63 PAD
PM_EXT_TS#[0]

DDR3
MISC
AP15 PM_EXTTS#1 R14 1 2 0_0402_5% XDP_TDO_M @ R32 1 2 0_0402_5% XDP_TDO
PM_EXT_TS#[1] PM_EXTTS#1_R 17,18
H_THERMTRIP# AK15 from DDR
14 H_THERMTRIP# THERMTRIP#

2
R34
AT28 +VCCP 0_0402_5%
PRDY# XDP_PREQ#
PREQ# AP27
PM_EXTTS#0 R27 1 2 10K_0402_5%

1
AN28 XDP_TCK
H_CPURST#_R TCK XDP_TMS PM_EXTTS#1 R29 +3VS
PAD T73 AP26 RESET_OBS# TMS AP28 1 2 10K_0402_5% XDP_TDI_M @ R37 1 2 0_0402_5%

PWR MANAGEMENT
AT27 XDP_TRST#
TRST# R603

JTAG & BPM

R20 1 2 H_PM_SYNC_R AL15 AT29 XDP_TDI_R XDP_DBRESET# 1 2
13 H_PM_SYNC PM_SYNC TDI
0_0402_5% AR27 XDP_TDO_R XDP_TDO_R R38 1 2 0_0402_5%
TDO XDP_TDI_M
TDI_M AR29 1K_0402_5%
H_CPUPWRGD R21 1 2SYS_AGENT_PWROK AN14 AP29 XDP_TDO_M
0_0402_5% VCCPWRGOOD_1 TDO_M
AN25 XDP_DBRESET# XDP_TRST# R39 1 2 51_0402_1%
DBR# XDP_DBRESET# 13
14 H_CPUPWRGD R23 1 2 VCCPWRGOOD_0 AN27
0_0402_5% VCCPWRGOOD_0

BPM#[0] AJ22
R1216 VDDPWRGOOD_R AK13 AK22
C 2K_0402_1% SM_DRAMPWROK BPM#[1] C
BPM#[2] AK24
38 VCCP_POK 1 2 BPM#[3] AJ24
AM15 VTTPWRGOOD BPM#[4] AJ25
1.5K_0402_1% R1217 AH22
BPM#[5]
2 1 BPM#[6] AK23
PAD T74 H_PWRGD_XDP_R AM26 AH23
TAPPWRGOOD BPM#[7]

14 BUF_PLT_RST# R26 1 2 PLT_RST#_R AL14 RSTIN#

1.5K_0402_1%
1

IC,AUB_CFD_rPGA,R1P0
R28 CONN@
Design guide 750_0402_1%
1.11update,PLTRST series
PWM Fan Control circuit
2

resittor 1.5K, PL +1.5V 1105_Add R597.

resistor 750 ohm +5VS
R597
1 0_0603_5% JP2
R12 1 2 1
@ R1205 0_0402_5% 1K_0402_1% 1
2 2

1
1 2 1 1
D48 C3 C295 3
2

Q104 4.7U_0805_10V4Z 0.1U_0402_16V4Z GND

4 GND
+VCCP RB751V_SOD323
Processor Pullups 2 2
S

SM_DRAMRST# 3 1 ACES_88231-02001
DRAMRST# 17,18

2
CONN@
H_CATERR# R35 1 2 49.9_0402_1%
BSS138_NL_SOT23-3 +FAN
G
2
1

H_CPURST#_R @ R36 1 2 68_0402_5%

B R15 B
PCH_DDR_RST 14 1 @ 1 @ 1 @

1
2
5
6

1
H_PROCHOT# R11 2 1 68_0402_5% 100K_0402_5% 1 C1438 C1439 C1440
D Q97 @ D49
C12 G
2

470P_0402_50V7K 2 2 2 RLZ5.1B_LL34
31 FAN_PWM 3
2 S SI3456BDV-T1-E3_TSOP6

2
4
0.1U_0402_16V4Z
DDR3 Compensation Signals 0.1U_0402_16V4Z
0.1U_0402_16V4Z

1103_Add 0.1uF for DRAMRST#.

SM_RCOMP0 R40 1 2 100_0402_1%

SM_RCOMP1 R41 1 2 24.9_0402_1%

1.5VSCPU_DRAM_PWRGD 39
SM_RCOMP2 R42 1 2 130_0402_1%

R1208 1.5K_0402_1%
Layout Note:Please these 1.5VSCPU_DRAM_PWRGD 2 1
resistors near Processor +3VALW +1.5V @ R384 1.1K_0402_1%
2 1

R1209
13 PM_DRAM_PWRGD PM_DRAM_PWRGD 1 2 VDDPWRGOOD_R
5

U57 0_0402_5%
VCCP_POK 2
P

B
1

Y 4
1 @ R383 R1218
A
G

3K_0402_1% 750_0402_1%
NC7SZ08P5X_NL_SC70-5
3

A A
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/03/13 Deciphered Date 2009/05/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Auburndale(1/5)-Thermal/XDP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 6 of 45
5 4 3 2 1
 
5 4 3 2 1

Layout rule trace

length < 0.5"
JCPU1E

JCPU1A AJ13
EXP_ICOMPI R44 RSVD32
PEG_ICOMPI B26 1 2 49.9_0402_1% RSVD33 AJ12
PEG_ICOMPO A26
13 DMI_CRX_PTX_N0 A24 DMI_RX#[0] PEG_RCOMPO B27 AP25 RSVD1
13 DMI_CRX_PTX_N1 C23 A25 EXP_RBIAS R45 1 2 750_0402_1% AL25 AH25
DMI_RX#[1] PEG_RBIAS RSVD2 RSVD34
13 DMI_CRX_PTX_N2 B22 DMI_RX#[2] AL24 RSVD3 RSVD35 AK26
13 DMI_CRX_PTX_N3 A21 DMI_RX#[3] PEG_RX#[0] K35 AL22 RSVD4
J34 +V_DDR_CPU_REF0 AJ33 AL26
PEG_RX#[1] RSVD5 RSVD36
13 DMI_CRX_PTX_P0 B24 J33 AG9 AR2
DMI_RX[0] PEG_RX#[2] +V_DDR_CPU_REF1 RSVD6 RSVD_NCTF_37
13 DMI_CRX_PTX_P1 D23 G35 M27
DMI_RX[1] PEG_RX#[3] RSVD7

DMI
D D
13 DMI_CRX_PTX_P2 B23 G32 L28 AJ26
DMI_RX[2] PEG_RX#[4] RSVD8 RSVD38
13 DMI_CRX_PTX_P3 A22 F34 J17 AJ27
DMI_RX[3] PEG_RX#[5] SA_DIMM_VREF RSVD39
F31 H17
PEG_RX#[6] SB_DIMM_VREF
13 DMI_CTX_PRX_N0 D24 D35 G25
DMI_TX#[0] PEG_RX#[7] RSVD11
13 DMI_CTX_PRX_N1 G24 E33 G17
DMI_TX#[1] PEG_RX#[8] RSVD12
13 DMI_CTX_PRX_N2 F23 C33 E31 AP1
DMI_TX#[2] PEG_RX#[9] RSVD13 RSVD_NCTF_40
13 DMI_CTX_PRX_N3 H23 D32 E30 AT2
DMI_TX#[3] PEG_RX#[10] RSVD14 RSVD_NCTF_41
B32
PEG_RX#[11]
13 DMI_CTX_PRX_P0 D25 C31 AT3
DMI_TX[0] PEG_RX#[12] RSVD_NCTF_42
13 DMI_CTX_PRX_P1 F24 B28 AR1
DMI_TX[1] PEG_RX#[13] RSVD_NCTF_43
13 DMI_CTX_PRX_P2 E23 B30
DMI_TX[2] PEG_RX#[14]
13 DMI_CTX_PRX_P3 G23 DMI_TX[3] PEG_RX#[15] A31

PEG_RX[0] J35 RSVD45 AL28

H34 CFG0 AM30 AL29
PEG_RX[1] CFG1 CFG[0] RSVD46
PEG_RX[2] H33 AM28 CFG[1] RSVD47 AP30
E22 F35 CFG2 AP31 AP32
13 FDI_CTX_PRX_N0 FDI_TX#[0] PEG_RX[3] CFG3 CFG[2] RSVD48
13 FDI_CTX_PRX_N1 D21 FDI_TX#[1] PEG_RX[4] G33 AL32 CFG[3] RSVD49 AL27
D19 E34 CFG4 AL30 AT31
13 FDI_CTX_PRX_N2 FDI_TX#[2] PEG_RX[5] CFG5 CFG[4] RSVD50
13 FDI_CTX_PRX_N3 D18 FDI_TX#[3] PEG_RX[6] F32 AM31 CFG[5] RSVD51 AT32
G21 D34 CFG6 AN29 AP33
13 FDI_CTX_PRX_N4 FDI_TX#[4] PEG_RX[7] CFG7 CFG[6] RSVD52
E19 F33 AM32 AR33

PCI EXPRESS -- GRAPHICS

13 FDI_CTX_PRX_N5 FDI_TX#[5] PEG_RX[8] CFG8 CFG[7] RSVD53
13 FDI_CTX_PRX_N6 F21 FDI_TX#[6] PEG_RX[9] B33 AK32 CFG[8] RSVD_NCTF_54 AT33
Intel(R) FDI
G18 D31 CFG9 AK31 AT34

RESERVED
13 FDI_CTX_PRX_N7 FDI_TX#[7] PEG_RX[10] CFG10 CFG[9] RSVD_NCTF_55
PEG_RX[11] A32 AK28 CFG[10] RSVD_NCTF_56 AP35
C30 CFG11 AJ28 AR35
PEG_RX[12] CFG12 CFG[11] RSVD_NCTF_57
13 FDI_CTX_PRX_P0 D22 FDI_TX[0] PEG_RX[13] A28 AN30 CFG[12] RSVD58 AR32
C21 B29 CFG13 AN32
13 FDI_CTX_PRX_P1 FDI_TX[1] PEG_RX[14] CFG14 CFG[13]
13 FDI_CTX_PRX_P2 D20 FDI_TX[2] PEG_RX[15] A30 AJ32 CFG[14]
C18 CFG15 AJ29 E15
13 FDI_CTX_PRX_P3 FDI_TX[3] CFG16 CFG[15] RSVD_TP_59
13 FDI_CTX_PRX_P4 G22 FDI_TX[4] PEG_TX#[0] L33 AJ30 CFG[16] RSVD_TP_60 F15
E20 M35 CFG17 AK30 A2
C 13 FDI_CTX_PRX_P5 FDI_TX[5] PEG_TX#[1] CFG18 CFG[17] KEY C
13 FDI_CTX_PRX_P6 F20 FDI_TX[6] PEG_TX#[2] M33 H16 RSVD_TP_86 RSVD62 D15
13 FDI_CTX_PRX_P7 G19 FDI_TX[7] PEG_TX#[3] M30 RSVD63 C15
L31 AJ15 @ R48 1 2 0_0402_5%
PEG_TX#[4] RSVD64 @ R49
13 FDI_FSYNC0 F17 FDI_FSYNC[0] PEG_TX#[5] K32 RSVD65 AH15 1 2 0_0402_5%
13 FDI_FSYNC1 E17 FDI_FSYNC[1] PEG_TX#[6] M29
PEG_TX#[7] J31 B19 RSVD15
13 FDI_INT C17 FDI_INT PEG_TX#[8] K29 A19 RSVD16
H30
PEG_TX#[9] @ R50
13 FDI_LSYNC0 F18
FDI_LSYNC[0] PEG_TX#[10]
H29 1 2 0_0402_5% A20
RSVD17
D17 F29 @ R51 1 2 0_0402_5% B20
13 FDI_LSYNC1 FDI_LSYNC[1] PEG_TX#[11] RSVD18
E28 AA5
PEG_TX#[12] RSVD_TP_66
D29 U9 AA4
PEG_TX#[13] RSVD19 RSVD_TP_67
D27 T9 R8
PEG_TX#[14] RSVD20 RSVD_TP_68
C26 AD3
PEG_TX#[15] RSVD_TP_69
AC9 AD2
RSVD21 RSVD_TP_70
L34 AB9 AA2
PEG_TX[0] RSVD22 RSVD_TP_71
M34 AA1
PEG_TX[1] RSVD_TP_72
M32 R9
PEG_TX[2] RSVD_TP_73
L30 AG7
PEG_TX[3] RSVD_TP_74
M31 C1 AE3
PEG_TX[4] RSVD_NCTF_23 RSVD_TP_75
K31 A3
PEG_TX[5] RSVD_NCTF_24
M28
PEG_TX[6]
H31 V4
PEG_TX[7] RSVD_TP_76
K28 V5
PEG_TX[8] RSVD_TP_77
G30 N2
PEG_TX[9] RSVD_TP_78
G29 J29 AD5
PEG_TX[10] RSVD26 RSVD_TP_79
F28 J28 AD7
PEG_TX[11] RSVD27 RSVD_TP_80
E27 W3
PEG_TX[12] RSVD_TP_81
D28 A34 W2
PEG_TX[13] RSVD_NCTF_28 RSVD_TP_82
C27 A33 N3
PEG_TX[14] RSVD_NCTF_29 RSVD_TP_83
C25 AE5
PEG_TX[15] RSVD_TP_84
C35 AD9
B RSVD_NCTF_30 RSVD_TP_85 B
B35
RSVD_NCTF_31
IC,AUB_CFD_rPGA,R1P0 AP34
CONN@ VSS

IC,AUB_CFD_rPGA,R1P0
CONN@
CRB 0.9 change to GND

CFG Straps for PROCESSOR

CFG0 @ R52 1 2 3.01K_0402_1% CFG4 @ R53 1 2 3.01K_0402_1%

PCI-Express Configuration Select CFG4-Display Port Presence

1: Single PEG 1: Disabled; No Physical
CFG0 *
0: Bifurcation enabled Display Port *
Not applicable for Clarksfield Processor attached to Embedded Display Port
A A

don't
CFG4 0: Enabled; An external
CFG3 R54 1 2 3.01K_0402_1% Display Port CFG7
WW33 PD 3.01K on CFG7 for PCIE Jitter
device is connected to the WW41 staff
Embedded Display Port
CFG3-PCI Express Static Lane Reversal
1: Normal Operation CFG7 @ R55 1 2 3.01K_0402_1%
CFG3 0: Lane Numbers Reversed
15 -> 0, 14 ->1, .....
Security Classification Compal Secret Data Compal Electronics, Inc.
* Only temporary for early Issued Date 2008/03/13 Deciphered Date 2009/05/11 Title
CFD samples (rPGA/BGA)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Auburndale(2/5)-DMI/PEG/FDI
Only for pre ES1 sample AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 7 of 45
5 4 3 2 1
 5 4 3 2 1

JCPU1D
JCPU1C

18 DDR_B_D[0..63] W8 M_CLK_DDR2 18
D SB_CK[0] D
AA6 M_CLK_DDR0 17 W9 M_CLK_DDR#2 18
SA_CK[0] DDR_B_D0 SB_CK#[0]
17 DDR_A_D[0..63] AA7 M_CLK_DDR#0 17 B5 M3 DDR_CKE2_DIMMB 18
SA_CK#[0] DDR_B_D1 SB_DQ[0] SB_CKE[0]
P7 DDR_CKE0_DIMMA 17 A5
DDR_A_D0 SA_CKE[0] DDR_B_D2 SB_DQ[1]
A10 C3
DDR_A_D1 SA_DQ[0] DDR_B_D3 SB_DQ[2]
C10 B3 V7 M_CLK_DDR3 18
DDR_A_D2 SA_DQ[1] DDR_B_D4 SB_DQ[3] SB_CK[1]
C7 E4 V6 M_CLK_DDR#3 18
DDR_A_D3 SA_DQ[2] DDR_B_D5 SB_DQ[4] SB_CK#[1]
A7 Y6 M_CLK_DDR1 17 A6 M2 DDR_CKE3_DIMMB 18
DDR_A_D4 SA_DQ[3] SA_CK[1] DDR_B_D6 SB_DQ[5] SB_CKE[1]
B10 Y5 M_CLK_DDR#1 17 A4
DDR_A_D5 SA_DQ[4] SA_CK#[1] DDR_B_D7 SB_DQ[6]
D10 P6 DDR_CKE1_DIMMA 17 C4
DDR_A_D6 SA_DQ[5] SA_CKE[1] DDR_B_D8 SB_DQ[7]
E10 D1
DDR_A_D7 SA_DQ[6] DDR_B_D9 SB_DQ[8]
A8 D2
DDR_A_D8 SA_DQ[7] DDR_B_D10 SB_DQ[9]
D8 SA_DQ[8] F2 SB_DQ[10] SB_CS#[0] AB8 DDR_CS2_DIMMB# 18
DDR_A_D9 F10 AE2 DDR_B_D11 F1 AD6
SA_DQ[9] SA_CS#[0] DDR_CS0_DIMMA# 17 SB_DQ[11] SB_CS#[1] DDR_CS3_DIMMB# 18
DDR_A_D10 E6 AE8 DDR_B_D12 C2
DDR_A_D11 SA_DQ[10] SA_CS#[1] DDR_CS1_DIMMA# 17 DDR_B_D13 SB_DQ[12]
F7 SA_DQ[11] F5 SB_DQ[13]
DDR_A_D12 E9 DDR_B_D14 F3
DDR_A_D13 SA_DQ[12] DDR_B_D15 SB_DQ[14]
B7 SA_DQ[13] G4 SB_DQ[15] SB_ODT[0] AC7 M_ODT2 18
DDR_A_D14 E7 AD8 DDR_B_D16 H6 AD1
DDR_A_D15 SA_DQ[14] SA_ODT[0] M_ODT0 17 DDR_B_D17 SB_DQ[16] SB_ODT[1] M_ODT3 18
C6 SA_DQ[15] SA_ODT[1] AF9 M_ODT1 17 G2 SB_DQ[17]
DDR_A_D16 H10 DDR_B_D18 J6
DDR_A_D17 SA_DQ[16] DDR_B_D19 SB_DQ[18]
G8 SA_DQ[17] J3 SB_DQ[19]
DDR_A_D18 K7 DDR_B_D20 G1
DDR_A_D19 SA_DQ[18] DDR_B_D21 SB_DQ[20] DDR_B_DM0 DDR_B_DM[0..7] 18
J8 SA_DQ[19] G5 SB_DQ[21] SB_DM[0] D4
DDR_A_D20 G7 DDR_B_D22 J2 E1 DDR_B_DM1
DDR_A_D21 SA_DQ[20] DDR_B_D23 SB_DQ[22] SB_DM[1] DDR_B_DM2
G10 SA_DQ[21] DDR_A_DM[0..7] 17 J1 SB_DQ[23] SB_DM[2] H3
DDR_A_D22 J7 B9 DDR_A_DM0 DDR_B_D24 J5 K1 DDR_B_DM3
DDR_A_D23 SA_DQ[22] SA_DM[0] DDR_A_DM1 DDR_B_D25 SB_DQ[24] SB_DM[3] DDR_B_DM4
J10 SA_DQ[23] SA_DM[1] D7 K2 SB_DQ[25] SB_DM[4] AH1
DDR_A_D24 L7 H7 DDR_A_DM2 DDR_B_D26 L3 AL2 DDR_B_DM5
DDR_A_D25 SA_DQ[24] SA_DM[2] DDR_A_DM3 DDR_B_D27 SB_DQ[26] SB_DM[5] DDR_B_DM6
M6 SA_DQ[25] SA_DM[3] M7 M1 SB_DQ[27] SB_DM[6] AR4
DDR_A_D26 M8 AG6 DDR_A_DM4 DDR_B_D28 K5 AT8 DDR_B_DM7
DDR_A_D27 SA_DQ[26] SA_DM[4] DDR_A_DM5 DDR_B_D29 SB_DQ[28] SB_DM[7]
L9 SA_DQ[27] SA_DM[5] AM7 K4 SB_DQ[29]
DDR_A_D28 L6 AN10 DDR_A_DM6 DDR_B_D30 M4
C DDR_A_D29 SA_DQ[28] SA_DM[6] DDR_A_DM7 DDR_B_D31 SB_DQ[30] C
K8 SA_DQ[29] SA_DM[7] AN13 N5 SB_DQ[31]
DDR_A_D30 N8 DDR_B_D32 AF3
DDR_A_D31 SA_DQ[30] DDR_B_D33 SB_DQ[32]
P9 SA_DQ[31] AG1 SB_DQ[33] DDR_B_DQS#[0..7] 18
DDR_A_D32 AH5 DDR_B_D34 AJ3 D5 DDR_B_DQS#0
DDR_A_D33 SA_DQ[32] DDR_B_D35 SB_DQ[34] SB_DQS#[0] DDR_B_DQS#1
AF5 SA_DQ[33] DDR_A_DQS#[0..7] 17 AK1 SB_DQ[35] SB_DQS#[1] F4
DDR_A_D34 AK6 C9 DDR_A_DQS#0 DDR_B_D36 AG4 J4 DDR_B_DQS#2
SA_DQ[34] SA_DQS#[0] SB_DQ[36] SB_DQS#[2]
DDR SYSTEM MEMORY A

DDR_A_D35 AK7 F8 DDR_A_DQS#1 DDR_B_D37 AG3 L4 DDR_B_DQS#3

DDR_A_D36 SA_DQ[35] SA_DQS#[1] DDR_A_DQS#2 DDR_B_D38 SB_DQ[37] SB_DQS#[3] DDR_B_DQS#4
AF6 J9 AJ4 AH2
SA_DQ[36] SA_DQS#[2] SB_DQ[38] SB_DQS#[4]

DDR SYSTEM MEMORY - B

DDR_A_D37 AG5 N9 DDR_A_DQS#3 DDR_B_D39 AH4 AL4 DDR_B_DQS#5
DDR_A_D38 SA_DQ[37] SA_DQS#[3] DDR_A_DQS#4 DDR_B_D40 SB_DQ[39] SB_DQS#[5] DDR_B_DQS#6
AJ7 AH7 AK3 AR5
DDR_A_D39 SA_DQ[38] SA_DQS#[4] DDR_A_DQS#5 DDR_B_D41 SB_DQ[40] SB_DQS#[6] DDR_B_DQS#7
AJ6 AK9 AK4 AR8
DDR_A_D40 SA_DQ[39] SA_DQS#[5] DDR_A_DQS#6 DDR_B_D42 SB_DQ[41] SB_DQS#[7]
AJ10 AP11 AM6
DDR_A_D41 SA_DQ[40] SA_DQS#[6] DDR_A_DQS#7 DDR_B_D43 SB_DQ[42]
AJ9 AT13 AN2
DDR_A_D42 SA_DQ[41] SA_DQS#[7] DDR_B_D44 SB_DQ[43]
AL10 AK5
DDR_A_D43 SA_DQ[42] DDR_B_D45 SB_DQ[44]
AK12 AK2
DDR_A_D44 SA_DQ[43] DDR_B_D46 SB_DQ[45]
AK8 AM4
DDR_A_D45 SA_DQ[44] DDR_B_D47 SB_DQ[46]
AL7 DDR_A_DQS[0..7] 17 AM3 DDR_B_DQS[0..7] 18
DDR_A_D46 SA_DQ[45] DDR_A_DQS0 DDR_B_D48 SB_DQ[47] DDR_B_DQS0
AK11 C8 AP3 C5
DDR_A_D47 SA_DQ[46] SA_DQS[0] DDR_A_DQS1 DDR_B_D49 SB_DQ[48] SB_DQS[0] DDR_B_DQS1
AL8 F9 AN5 E3
DDR_A_D48 SA_DQ[47] SA_DQS[1] DDR_A_DQS2 DDR_B_D50 SB_DQ[49] SB_DQS[1] DDR_B_DQS2
AN8 H9 AT4 H4
DDR_A_D49 SA_DQ[48] SA_DQS[2] DDR_A_DQS3 DDR_B_D51 SB_DQ[50] SB_DQS[2] DDR_B_DQS3
AM10 M9 AN6 M5
DDR_A_D50 SA_DQ[49] SA_DQS[3] DDR_A_DQS4 DDR_B_D52 SB_DQ[51] SB_DQS[3] DDR_B_DQS4
AR11 AH8 AN4 AG2
DDR_A_D51 SA_DQ[50] SA_DQS[4] DDR_A_DQS5 DDR_B_D53 SB_DQ[52] SB_DQS[4] DDR_B_DQS5
AL11 AK10 AN3 AL5
DDR_A_D52 SA_DQ[51] SA_DQS[5] DDR_A_DQS6 DDR_B_D54 SB_DQ[53] SB_DQS[5] DDR_B_DQS6
AM9 AN11 AT5 AP5
DDR_A_D53 SA_DQ[52] SA_DQS[6] DDR_A_DQS7 DDR_B_D55 SB_DQ[54] SB_DQS[6] DDR_B_DQS7
AN9 AR13 AT6 AR7
DDR_A_D54 SA_DQ[53] SA_DQS[7] DDR_B_D56 SB_DQ[55] SB_DQS[7]
AT11 AN7
DDR_A_D55 SA_DQ[54] DDR_B_D57 SB_DQ[56]
AP12 AP6
DDR_A_D56 SA_DQ[55] DDR_B_D58 SB_DQ[57]
AM12 AP8
DDR_A_D57 SA_DQ[56] DDR_B_D59 SB_DQ[58]
AN12 DDR_A_MA[0..15] 17 AT9
DDR_A_D58 SA_DQ[57] DDR_A_MA0 DDR_B_D60 SB_DQ[59]
AM13 Y3 AT7
DDR_A_D59 SA_DQ[58] SA_MA[0] DDR_A_MA1 DDR_B_D61 SB_DQ[60]
AT14 W1 AP9
DDR_A_D60 SA_DQ[59] SA_MA[1] DDR_A_MA2 DDR_B_D62 SB_DQ[61]
AT12 AA8 AR10 DDR_B_MA[0..15] 18
B DDR_A_D61 SA_DQ[60] SA_MA[2] DDR_A_MA3 DDR_B_D63 SB_DQ[62] DDR_B_MA0 B
AL13 AA3 AT10 U5
DDR_A_D62 SA_DQ[61] SA_MA[3] DDR_A_MA4 SB_DQ[63] SB_MA[0] DDR_B_MA1
AR14 V1 V2
DDR_A_D63 SA_DQ[62] SA_MA[4] DDR_A_MA5 SB_MA[1] DDR_B_MA2
AP14 AA9 T5
SA_DQ[63] SA_MA[5] DDR_A_MA6 SB_MA[2] DDR_B_MA3
V8 V3
SA_MA[6] DDR_A_MA7 SB_MA[3] DDR_B_MA4
T1 R1
SA_MA[7] DDR_A_MA8 SB_MA[4] DDR_B_MA5
Y9 18 DDR_B_BS0 AB1 T8
SA_MA[8] DDR_A_MA9 SB_BS[0] SB_MA[5] DDR_B_MA6
17 DDR_A_BS0 AC3 U6 18 DDR_B_BS1 W5 R2
SA_BS[0] SA_MA[9] DDR_A_MA10 SB_BS[1] SB_MA[6] DDR_B_MA7
17 DDR_A_BS1 AB2 AD4 18 DDR_B_BS2 R7 R6
SA_BS[1] SA_MA[10] DDR_A_MA11 SB_BS[2] SB_MA[7] DDR_B_MA8
17 DDR_A_BS2 U7 T2 R4
SA_BS[2] SA_MA[11] DDR_A_MA12 SB_MA[8] DDR_B_MA9
U3 R5
SA_MA[12] DDR_A_MA13 SB_MA[9] DDR_B_MA10
AG8 18 DDR_B_CAS# AC5 AB5
SA_MA[13] DDR_A_MA14 SB_CAS# SB_MA[10] DDR_B_MA11
T3 18 DDR_B_RAS# Y7 P3
SA_MA[14] DDR_A_MA15 SB_RAS# SB_MA[11] DDR_B_MA12
17 DDR_A_CAS# AE1 V9 18 DDR_B_WE# AC6 R3
SA_CAS# SA_MA[15] SB_WE# SB_MA[12] DDR_B_MA13
17 DDR_A_RAS# AB3 AF7
SA_RAS# SB_MA[13] DDR_B_MA14
17 DDR_A_WE# AE9 P5
SA_WE# SB_MA[14] DDR_B_MA15
N1
SB_MA[15]

IC,AUB_CFD_rPGA,R1P0
CONN@

IC,AUB_CFD_rPGA,R1P0
CONN@

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/03/13 Deciphered Date 2009/05/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cantiga(2/6)-DDR3 A/B CH
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 8 of 45
5 4 3 2 1
 5 4 3 2 1

+VCCP +GFX_CORE

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J
+VCC_CORE
1 1 1 1 1 1 1 1

C306

C307

C308

C309

C310

C311

C312

C313
JCPU1F
+GFX_CORE JCPU1G
2 2 2 2 2 2 2 2
AT21 VAXG1

22U_0805_6.3V6M

22U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M
RF request. RF request. AT19 AR22 VCC_AXG_SENSE
VAXG2 VAXG_SENSE VSS_AXG_SENSE VCC_AXG_SENSE 41

SENSE
LINES
AT18 AT22 VSS_AXG_SENSE 41
VAXG3 VSSAXG_SENSE

C987

C988

C989

C990
48A 18A +VCCP
1 1 1 1 AT16
VAXG4 15A
AR21
D VAXG5 D
AG35 AH14 AR19
VCC1 VTT0_1 VAXG6

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M
AG34 AH12 AR18
VCC2 VTT0_2 2 2 2 2 VAXG7 GFXVR_VID_0
AG33 AH11 AR16 AM22 GFXVR_VID_0 41
VCC3 VTT0_3 VAXG8 GFX_VID[0] GFXVR_VID_1
AG32 AH10 1 1 1 1 AP21 AP22 GFXVR_VID_1 41
VCC4 VTT0_4 VAXG9 GFX_VID[1]

C40

C41

C42

C43

GRAPHICS VIDs
AG31 J14 AP19 AN22 GFXVR_VID_2
VCC5 VTT0_5 VAXG10 GFX_VID[2] GFXVR_VID_2 41
AG30 J13 AP18 AP23 GFXVR_VID_3
VCC6 VTT0_6 VAXG11 GFX_VID[3] GFXVR_VID_4 GFXVR_VID_3 41
AG29 H14 AP16 AM23 GFXVR_VID_4 41
VCC7 VTT0_7 2 2 2 2 VAXG12 GFX_VID[4]

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
AG28 H12 AN21 AP24 GFXVR_VID_5
VCC8 VTT0_8 VAXG13 GFX_VID[5] GFXVR_VID_5 41

GRAPHICS
AG27 G14 AN19 AN24 GFXVR_VID_6
VCC9 VTT0_9 VAXG14 GFX_VID[6] GFXVR_VID_6 41

C991

C993

C994
AG26 G13 1 1 1 AN18
VCC10 VTT0_10 @ @ @ VAXG15 R43 1
AF35
VCC11 VTT0_11
G12 AN16
VAXG16 2 249_0402_1%

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M
AF34 G11 AM21 AR25 GFXVR_EN
VCC12 VTT0_12 VAXG17 GFX_VR_EN GFXVR_DPRSLPVR GFXVR_EN 41
AF33 VCC13 VTT0_13 F14 1 1 1 1 1 AM19 VAXG18 GFX_DPRSLPVR AT25 GFXVR_DPRSLPVR 41
2 2 2
AF32 VCC14 VTT0_14 F13 AM18 VAXG19 GFX_IMON AM24

C48

C49

C50

C51

C52
AF31 F12 AM16 2 @ 1 10K_0402_5%
VCC15 VTT0_15 VAXG20 R1176 GFXVR_IMON
AF30 VCC16 VTT0_16 F11 AL21 VAXG21 GFXVR_IMON 41
AF29 E14 2 2 @ 2 @ 2 2 AL19 @ R128 2 1 1K_0402_5%
VCC17 VTT0_17 VAXG22
AF28 VCC18 VTT0_18 E12 AL18 VAXG23
+VCCP

330U_D2_2VY_R9M

330U_D2_2VY_R7M
AF27 VCC19 VTT0_19 D14 AL16 VAXG24 1105_Chagne from 4.7K to 249 ohm.
AF26 VCC20 VTT0_20 D13 1 1 AK21 VAXG25 VDDQ1 AJ1 +1.5VS_CPU

C995

C996

1U_0603_10V4Z

1U_0603_10V4Z

1U_0603_10V4Z

1U_0603_10V4Z

1U_0603_10V4Z
1.1V RAIL POWER

AD35 VCC21 VTT0_21 D12 AK19 VAXG26 VDDQ2 AF1

AD34 D11 + + AK18 AE7

- 1.5V RAILS
VCC22 VTT0_22 VAXG27 VDDQ3 1 1 1 1 1

10U_0805_6.3V6M

10U_0805_6.3V6M

22U_0805_6.3V6M

C56

C57

C58

C59

C60
AD33 VCC23 VTT0_23 C14 AK16 VAXG28 VDDQ4 AE4
AD32 VCC24 VTT0_24 C13 1 1 1 AJ21 VAXG29 VDDQ5 AC1
2 2
AD31 VCC25 VTT0_25 C12 AJ19 VAXG30 VDDQ6 AB7
2 2 2 2 2

C61

C62

C63
AD30 VCC26 VTT0_26 C11 AJ18 VAXG31 VDDQ7 AB4
AD29 VCC27 VTT0_27 B14 AJ16 VAXG32 VDDQ8 Y1
AD28 B12 2 2 2 AH21 W7
VCC28 VTT0_28 VAXG33 VDDQ9

POWER
AD27 VCC29 VTT0_29 A14 AH19 VAXG34 3A VDDQ10 W4
+1.5VS_CPU
AD26 VCC30 VTT0_30 A13 AH18 VAXG35 VDDQ11 U1

22U_0805_6.3V6M

22U_0805_6.3V6M
220U_D2_2VY_R15M
AC35 VCC31 VTT0_31 A12 AH16 VAXG36 VDDQ12 T7
AC34 VCC32 VTT0_32 A11 VDDQ13 T4 1

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J
C C
AC33 VCC33 VDDQ14 P1 1 1
+VCCP

C64

C65

C66
AC32 N7 +
VCC34 VDDQ15 1 1 1 1
AC31 +VCCP N4
VCC35 VDDQ16

C327

C328

C329

C330
DDR3
AC30 VCC36 VTT0_33 AF10 VDDQ17 L1
AC29 AE10 J24 H1 2 2 2
VCC37 VTT0_34 VTT1_45 VDDQ18 2 2 2 2

FDI
10U_0805_6.3V6M

10U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
AC28 VCC38 VTT0_35 AC10 J23 VTT1_46
CPU CORE SUPPLY

AC27 VCC39 VTT0_36 AB10 1 1 H25 VTT1_47

AC26
VCC40 VTT0_37
Y10 1 1 RF request.
C67

C68

C69

C70
AA35 W10
VCC41 VTT0_38
AA34 U10 P10 +VCCP
VCC42 VTT0_39 2 2 VTT0_59

10U_0805_6.3V6M

10U_0805_6.3V6M
AA33 T10 N10
VCC43 VTT0_40 2 2 VTT0_60
AA32 J12 L10
VCC44 VTT0_41 VTT0_61
AA31 J11 K10 1 1
VCC45 VTT0_42 VTT0_62

C71

C72
AA30 J16 +VTT_43
VCC46 VTT0_43 +VTT_44 +VCCP
AA29 J15
VCC47 VTT0_44
AA28
VCC48 +VTT_44 R56 +VCCP 2 2
AA27 1 2 0_0603_5%
VCC49

1.1V
AA26 J22
VCC50 +VTT_43 R57 VTT1_63
Y35 1 2 0_0603_5% K26 J20
VCC51 VTT1_48 VTT1_64

22U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

22U_0805_6.3V6M
Y34 J27 J18
VCC52 VTT1_49 VTT1_65

PEG & DMI

Y33 1 1 1 1 J26 H21 +VCCP
VCC53 VTT1_50 VTT1_66

22U_0805_6.3V6M

22U_0805_6.3V6M
C73

C76
Y32 J25 H20
VCC54 VTT1_51 VTT1_67

C74

C75
Y31 H27 H19
VCC55 VTT1_52 VTT1_68
Y30 G28 1 1
VCC56 2 2 2 2 VTT1_53

C77

C78
Y29 G27
VCC57 VTT1_54
Y28 G26
VCC58 VTT1_55
Y27 F26
VCC59 to power VTT1_56 2 2
Y26 E26 L26
VCC60 VTT1_57 VCCPLL1

1.8V
V35 AN33 H_PSI# 40 E25 L27
VCC61 PSI# VTT1_58 VCCPLL2
V34 0.6A M26
POWER

VCC62 VCCPLL3
V33 H_VID[0..6] 40
VCC63 H_VID0
V32 AK35 +1.8VS
VCC64 VID[0]

10U_0805_6.3V6M
B B

1U_0603_10V4Z

1U_0603_10V4Z
to power

4.7U_0603_6.3V6K
H_VID1

2.2U_0603_6.3V4Z
V31 AK33
VCC65 VID[1] H_VID2
V30 AK34 1 1 1 1 1
VCC66 VID[2]

C79

C80

C81

C83
V29 AL35 H_VID3
VCC67 VID[3]
CPU VIDS

C82
V28 AL33 H_VID4
VCC68 VID[4] H_VID5
V27 AM33
VCC69 VID[5] 2 2 2 2 2
CPU

V26 AM35 H_VID6 IC,AUB_CFD_rPGA,R1P0

VCC70 VID[6] PM_DPRSLPVR_R R58
U35 AM34 1 2 0_0402_5% H_DPRSLPVR 40
CONN@
VCC71 PROC_DPRSLPVR
U34
VCC72 to power
U33
VCC73
U32
VCC74
U31 G15
U30
U29
VCC75
VCC76
VTT_SELECT VTT_SELECT 38
+1.5V to +1.5VS_CPU Transfer 1021_Change R1182
U28
VCC77
H_VTTVID1 = Low, 1.1V(Clarksfield) PJ1 PAD-OPEN 3x3m +1.5VS_CPU from 470 ohm to 220 ohm.
VCC78 +1.5V
U27 1 2
VCC79 B+ +1.5VS_CPU
U26
VCC80
H_VTTVID1 = High, 1.05V(Auburndale)
R35 U55
VCC81
R34 1
VCC82

1
10U_0805_10V4Z
R33 2
VCC83

10U_0805_10V4Z
0.1U_0402_16V4Z
R32 AN35 1 5 3 R1182
VCC84 ISENSE IMVP_IMON 40

C1355
R31 C331 1 2 0.1U_0402_10V6K R1183 1 1 220_0402_5%
VCC85 +1.5V +1.5VS_CPU

C1356

C1357
R30 to power
VCC86 C332
R29 1 2 0.1U_0402_10V6K 330K_0402_5% SI7326DN-T1-E3_PAK1212-8

2
VCC87 2
AJ34 VCCSENSE_R VCCSENSE

2N7002DW-7-F_SOT363-6
R59 0_0402_5%
SENSE LINES

R28 1 2 VCCSENSE 40

2
VCC88 VCC_SENSE 2 2
AJ35 VSSSENSE_R VSSSENSE

2N7002DW-7-F_SOT363-6
R27 R60 1 2 0_0402_5% C333 1 2 0.1U_0402_10V6K
VCC89 VSS_SENSE VSSSENSE 40
R26
VCC90

3
P35 C334 1 2 0.1U_0402_10V6K RUNON_1.5VS_CPU
VCC91

6
P34 B15 Q105B
VCC92 VTT_SENSE VTT_SENSE 38

1
P33 A15 VSS_SENSE_VTT R203 1 2 0_0402_5% Q105A
VCC93 VSS_SENSE_VTT SUSP
P32
VCC94 Near Processor R1184 5
P31 SUSP 2 1K_0402_5%
VCC95 33,39 SUSP
P30

4
A VCC96 A
P29

2
VCC97
P28 VCC98 1
P27 C1358
VCC99 0.1U_0402_16V4Z
P26 VCC100
Near Processor 2
+VCC_CORE

VCCSENSE R61 1 2 100_0402_1%

Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/03/13 Deciphered Date 2009/05/11 Title
VSSSENSE R62 1 2 100_0402_1%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Auburndale(4/5)-PWR
IC,AUB_CFD_rPGA,R1P0 Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
CONN@ DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 9 of 45
5 4 3 2 1
 5 4 3 2 1

JCPU1H JCPU1I
+VCC_CORE
CPU CORE
AT20 VSS1 VSS81 AE34

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M
AT17 VSS2 VSS82 AE33
AR31 VSS3 VSS83 AE32 K27 VSS161
AR28 VSS4 VSS84 AE31 K9 VSS162 1 1 1 1 1 1 1 1 1 1 1 1

C84

C85

C86

C87

C88

C89

C90

C91

C92

C93

C94

C95
AR26 AE30 K6
AR24
VSS5
VSS6
VSS85
VSS86
AE29 K3
VSS163
VSS164
Inside cavity
AR23 AE28 J32 @ @
VSS7 VSS87 VSS165 2 2 2 2 2 2 2 2 2 2 2 2
AR20 AE27 J30
D VSS8 VSS88 VSS166 D
AR17 AE26 J21
VSS9 VSS89 VSS167
AR15 AE6 J19
VSS10 VSS90 VSS168
AR12 AD10 H35
VSS11 VSS91 VSS169
AR9 AC8 H32
VSS12 VSS92 VSS170
AR6 AC4 H28
VSS13 VSS93 VSS171

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
AR3 AC2 H26
VSS14 VSS94 VSS172
AP20 AB35 H24
VSS15 VSS95 VSS173
AP17 AB34 H22
VSS16 VSS96 VSS174 1 1 1 1 1 1 1 1 1 1 1 1
between

C96

C97

C98

C99

C100

C101

C102

C103

C104

C105

C106

C107
AP13 AB33 H18
VSS17 VSS97 VSS175
AP10 AB32 H15
AP7
VSS18
VSS19
VSS98
VSS99
AB31 H13
VSS176
VSS177 2 2 2 2 2 2 2 2
@
2 2 2 2
Inductor and
AP4 AB30 H11
AP2
AN34
VSS20
VSS21
VSS100
VSS101 AB29
AB28
H8
H5
VSS178
VSS179 socket
VSS22 VSS102 VSS180
AN31 VSS23 VSS103 AB27 H2 VSS181
AN23 VSS24 VSS104 AB26 G34 VSS182
AN20 VSS25 VSS105 AB6 G31 VSS183

330U_D2_2VM_R9M

330U_D2_2VM_R9M

330U_D2_2VM_R9M

330U_D2_2VM_R9M
22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

22U_0805_6.3V6M

10U_0805_6.3V6M

22U_0805_6.3V6M
AN17 VSS26 VSS106 AA10 G20 VSS184

47P_0402_50V8J
AM29 VSS27 VSS107 Y8 G9 VSS185 1 1 1 1
AM27 VSS28 VSS108 Y4 G6 VSS186 1 1 1 1 1 1 1 1 1

C982

C114

C115

C116

C117

C118

C119

C120

C121

C108

C109

C110

C111
AM25 Y2 G3 + + + +
VSS29 VSS109 VSS187
AM20 VSS30 VSS110 W35 F30 VSS188
AM17 W34 F27 @ @
VSS31 VSS111 VSS189 2 2 2 2 2 2 2 2 2 2 2 2 2
AM14 VSS32 VSS112 W33 F25 VSS190
AM11 VSS33 VSS113 W32 F22 VSS191
AM8 VSS34 VSS114 W31 F19 VSS192
AM5 VSS35 VSS115 W30 F16 VSS193
AM2 VSS36 VSS116 W29 E35 VSS194
AL34 W28 E32
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
E29
E24
VSS195
VSS196
VSS197
VSS
AL20 VSS40 VSS120 W6 E21 VSS198
C C
AL17 VSS41 VSS121 V10 E18 VSS199
AL12 VSS42 VSS122 U8 E13 VSS200
AL9 VSS43 VSS123 U4 E11 VSS201
AL6 VSS44 VSS124 U2 E8 VSS202
AL3 T35 E5 +VCC_CORE
VSS45 VSS125 VSS203 VSS_NCTF1_R
AK29 VSS46 VSS126 T34 E2 VSS204 VSS_NCTF1 AT35
AK27 T33 D33 AT1 VSS_NCTF2_R
VSS47 VSS127 VSS205 VSS_NCTF2

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J
AK25 T32 D30 AR34 VSS_NCTF3_R
VSS48 VSS128 VSS206 VSS_NCTF3 VSS_NCTF4_R
AK20 T31 D26 B34 1 1 1 1
VSS49 VSS129 VSS207 VSS_NCTF4 VSS_NCTF5_R
AK17 T30 D9 B2

NCTF
VSS50 VSS130 VSS208 VSS_NCTF5

C314

C315

C316

C317
AJ31 T29 D6 B1 VSS_NCTF6_R
VSS51 VSS131 VSS209 VSS_NCTF6 VSS_NCTF7_R
AJ23 T28 D3 A35
VSS52 VSS132 VSS210 VSS_NCTF7 2 2 2 2
AJ20 T27 C34
VSS53 VSS133 VSS211
AJ17 T26 C32
VSS54 VSS134 VSS212
AJ14
VSS55 VSS135
T6 C29
VSS213 RF request.
AJ11 R10 C28
VSS56 VSS136 VSS214
AJ8 P8 C24
VSS57 VSS137 VSS215
AJ5 P4 C22
VSS58 VSS138 VSS216
AJ2 P2 C20
VSS59 VSS139 VSS217
AH35 N35 C19
VSS60 VSS140 VSS218
AH34 N34 C16
VSS61 VSS141 VSS219
AH33 N33 B31
VSS62 VSS142 VSS220
AH32 N32 B25
VSS63 VSS143 VSS221
AH31 N31 B21
VSS64 VSS144 VSS222
AH30 N30 B18
VSS65 VSS145 VSS223
AH29 N29 B17
VSS66 VSS146 VSS224
AH28 N28 B13
VSS67 VSS147 VSS225
AH27 N27 B11
VSS68 VSS148 VSS226
AH26 N26 B8
VSS69 VSS149 VSS227
AH20 N6 B6
VSS70 VSS150 VSS228
AH17 M10 B4
VSS71 VSS151 VSS229
AH13 L35 A29
B VSS72 VSS152 VSS230 B
AH9 L32 A27
VSS73 VSS153 VSS231
AH6 L29 A23
VSS74 VSS154 VSS232
AH3 L8 A9
VSS75 VSS155 VSS233
AG10 L5
VSS76 VSS156
AF8 L2
VSS77 VSS157
AF4 K34
VSS78 VSS158
AF2 K33
VSS79 VSS159
AE35 K30
VSS80 VSS160

IC,AUB_CFD_rPGA,R1P0 IC,AUB_CFD_rPGA,R1P0
CONN@ CONN@

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/03/13 Deciphered Date 2009/05/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Auburndale(5/5)-GND/Bypass
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 10 of 45
5 4 3 2 1
 5 4 3 2 1

ICH_RTCX1 +RTCVCC +3VS

R63 1 2 10M_0402_5% ICH_RTCX2

R65 1 2 1M_0402_5% SM_INTRUDER# R64 1 2 10K_0402_5% SIRQ

R66 1 2 330K_0402_5% PCH_INTVRMEN

@ R67 1 2 1K_0402_5% SB_SPKR


INTVRMEN

32.768KHZ_12.5PF_Q13MC14610002
H Integrated VRM enable LOW=Default
*
1

4
L Integrated VRM disable HIGH=No Reboot *
18P_0402_50V8J

18P_0402_50V8J
1 1
OSC

OSC
C122

C123
D D
U1A
2 2
Y1
NC

NC

1
+RTCVCC ICH_RTCX1 B13 D33
RTCX1 FWH0 / LAD0 LPC_AD0 24,31
C124 CLRP1 ICH_RTCX2 D13 B33 LPC_AD1 24,31
2

1U_0603_10V4Z SHORT PADS RTCX2 FWH1 / LAD1

C32 LPC_AD2 24,31

2
2 FWH2 / LAD2
FWH3 / LAD3 A32 LPC_AD3 24,31
R69 1 2 20K_0402_1% ICH_RTCRST# C14 RTCRST#
FWH4 / LFRAME# C34 LPC_FRAME# 24,31
R70 1 2 20K_0402_1% ICH_SRTCRST# D17 SRTCRST# LDRQ0#
1 A34 T13 PAD

RTC

LPC
LDRQ0#

1
SM_INTRUDER# A16 F34 LDRQ1# T14 PAD
C125 CLRP2 INTRUDER# LDRQ1# / GPIO23
1U_0603_10V4Z SHORT PADS PCH_INTVRMEN A14 AB9 SIRQ
SIRQ 31

2
2 INTVRMEN SERIRQ

R1161 1 2 33_0402_5% HDA_BIT_CLK A30

27 HDA_BITCLK_MDC HDA_BCLK
R73 1 2 33_0402_5% AK7 SATA_RXN0_C
27 HDA_BITCLK_CODEC SATA0RXN SATA_RXN0_C 23
R1162 33_0402_5% HDA_SYNC SATA_RXP0_C
27 HDA_SYNC_MDC
R75
1
1
2
2 33_0402_5%
D29 HDA_SYNC SATA0RXP AK6
AK11 SATA_TXN0_C C126 1 2 0.01U_0402_50V7K SATA_TXN0
SATA_RXP0_C 23 HDD
27 HDA_SYNC_CODEC SATA0TXN SATA_TXN0 23
SB_SPKR P1 AK9 SATA_TXP0_C C127 1 2 0.01U_0402_50V7K SATA_TXP0
27 SB_SPKR SPKR SATA0TXP SATA_TXP0 23
1 2 HDA_RST# C30
27 HDA_RST#_MDC HDA_RST#
R1163 1 2 33_0402_5% AH6 SATA_RXN1_C
27,31 HDA_RST#_CODEC SATA1RXN SATA_RXN1_C 23
R78 33_0402_5% AH5 SATA_RXP1_C
SATA1RXP SATA_RXP1_C 23
HDA_SDIN0 G30 AH9 SATA_TXN1_C C130 1 2 0.01U_0402_50V7K SATA_TXN1
27 HDA_SDIN0 HDA_SDIN0 SATA1TXN
AH8 SATA_TXP1_C C131 1 2 0.01U_0402_50V7K SATA_TXP1
SATA_TXN1 23 ODD
SATA1TXP SATA_TXP1 23
27 HDA_SDIN1 HDA_SDIN1 F30 HDA_SDIN1
SATA2RXN AF11
@ C53 1 2 22P_0402_50V8J HDA_BITCLK_CODEC E32 AF9

IHDA
HDA_SDIN2 SATA2RXP


SATA2TXN AF7
C @ C54 1 2 22P_0402_50V8J HDA_SDOUT_CODEC F32 AF6 C
HDA_SDIN3 SATA2TXP
SATA2 SATA3 don't
SATA3RXN AH3 support on HM55
27 HDA_SDOUT_MDC R81 1 2 33_0402_5% HDA_SDOUT B29 AH1
R82 HDA_SDO SATA3RXP
27 HDA_SDOUT_CODEC 1 2 33_0402_5% SATA3TXN AF3
SATA3TXP AF1
@ R670 1 2 100K_0402_5% ME_EN# H32

SATA
HDA_DOCK_EN# / GPIO33 SATA_RXN4_C
SATA4RXN AD9 SATA_RXN4_C 29
PAD T16 J30 AD8 SATA_RXP4_C
HDA_DOCK_RST# / GPIO13 SATA4RXP SATA_RXP4_C 29
AD6 SATA_TXN4_C C128 1 2 0.01U_0402_50V7K SATA_TXN4
SATA4TXN
AD5 SATA_TXP4_C C129 1 2 0.01U_0402_50V7K SATA_TXP4
SATA_TXN4 29 E SATA
SATA4TXP SATA_TXP4 29
PCH_JTAG_TCK M3 AD3 SATA_RXN5_C
JTAG_TCK SATA5RXN SATA_RXN5_C 23
AD1 SATA_RXP5_C
SATA5RXP SATA_RXP5_C 23
PCH_JTAG_TMS K3 AB3 SATA_TXN5_C C296 1 2 0.01U_0402_50V7K SATA_TXN5
JTAG_TMS SATA5TXN
AB1 SATA_TXP5_C C297 1 2 0.01U_0402_50V7K SATA_TXP5
SATA_TXN5 23 Multi Bay
SATA5TXP SATA_TXP5 23
PCH_JTAG_TDI K1 JTAG_TDI

JTAG
PCH_JTAG_TDO J2 AF16
JTAG_TDO SATAICOMPO
PCH_JTAG_RST# J4 AF15 R89 1 2 37.4_0402_1% +1.05VS
TRST# SATAICOMPI +3VALW +3VALW +3VALW +3VALW

+3VS

2
30 SPI_CLK_PCH SPI_CLK_PCH R654 1 2 15_0402_5% BA2 @
SPI_CLK R85 R87
R86 R84
R656 1 2 10K_0402_5% SPI_SB_CS# SPI_SB_CS# AV3 R91 1 2 10K_0402_1% +3VS @ 200_0402_5% @ 200_0402_5% 20K_0402_5% @ 20K_0402_5%
30 SPI_SB_CS# SPI_CS0#
AY3 T3 SATA_LED# 32

1
R657 SPI_SO_R SPI_CS1# SATALED# PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_RST#
1 2 10K_0402_5%

1
30 SPI_SI SPI_SI R655 1 2 15_0402_5% AY1 Y9 PCH_GPIO21 @
B SPI_MOSI SATA0GP / GPIO21 R685 R88 B
R684 R683
SPI

SPI_SO_R PCH_GPIO19 @ 100_0402_1% @ 100_0402_1% @ 10K_0402_5%

Reserve GPIO1921 PD for LPM enable power saving

30 SPI_SO_R AV1 SPI_MISO SATA1GP / GPIO19 V1 10K_0402_1%

SI

2
BD82HM55 QMNT B3_FCBGA1071

PCH_JTAG_TCK
+3VS HDA_SDO 1
R90
2
51_0402_5%
HDA_SYNC This signal has a weak internal pull down.
This signal can't PU
1

This signal has a weak internal pull down. PCH JTAG Enable PCH JTAG Disable
R1221 H=>On Die PLL is supplied by 1.5V Disable iTPM=No Stuff PCH Pin RefDes
L=>On Die PLL is supplied by 1.8V * Enable iTPM=Stuff ES1 ES2 ES1 ES2
100K_0402_5% * @ BATT1
R86 No Install 200ohm No Install No Install
2

ME_EN# PCH_JTAG_TDO
R684 No Install 100ohm No Install No Install
HDA_DOCK_EN#
1

D Q106 +RTCVCC +3VL BATT1.1

31 ME_EN 2 ME debug mode , this signal has a weak internal PU R84 200ohm 200ohm No Install No Install
G CR2032 RTC BATTERY PCH_JTAG_TMS
1

2N7002_SOT23-3 H=>security measures defined in the Flash D3 R683 100ohm 100ohm No Install No Install
S
*
3

R1222 2
Descriptor will be in effect (default) 1 JBATT1 R85 200ohm 200ohm 20Kohm No Install
100K_0402_5% W=20mils W=20mils 3 R94 1 2 1K_0402_5% 1 1
PCH_JTAG_TDI
L=>Flash Descriptor Security will be overridden W=20mils 2 R685 100ohm 100ohm 10Kohm No Install
2

DAN202U_SC70 2
1 3 GND
C132 4 PCH_JTAG_TCK R90 51ohm 51ohm 51ohm 51ohm
2.2U_0603_6.3V4Z GND
ACES_85205-02001 R87 20Kohm 20Kohm No Install No Install
A SPI_MOSI 2 Place near IBEX-M CONN@ PCH_JTAG_RST# A
This signal has a weak internal pull down. R88 10Kohm 10Kohm No Install No Install
Disable iTPM=No Stuff
* Enable iTPM=Stuff
+3VS

iTPM ENABLE/DISABLE
+3VS
PCH_GPIO21 R92 2 1 10K_0402_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/03/13 Deciphered Date 2009/05/11 Title
PCH_GPIO19 R93 2 1 10K_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IBEX-M(1/6)-HDA/JTAG/SATA
@ R68 1 2 1K_0402_5% SPI_SI Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 11 of 45
5 4 3 2 1
 5 4 3 2 1

EC_LID_OUT# R95 1 2 10K_0402_5% +3VALW

SMBCLK R96 1 2 2.2K_0402_5% +3VS

SMBDATA R97 1 2 2.2K_0402_5% +3VS

SML0CLK R98 1 2 2.2K_0402_5%

+3VS
SML0DATA R99 1 2 2.2K_0402_5%
R105 R106
SML0ALERT# R100 1 2 10K_0402_5% 2.2K_0402_5% 2.2K_0402_5%

2
SML1ALERT# R101 1 2 10K_0402_5% Q1A
D D
SML1CLK R103 1 2 2.2K_0402_5% SMBDATA 6 1 SMB_DATA_S3
SMB_DATA_S3 17,18,19,23


5

SML1DATA R104 1 2 2.2K_0402_5% Q1B 2N7002DW-7-F_SOT363-6 SODIMM Clock
SMBCLK 3 4 SMB_CLK_S3 gen G sensor
SMB_CLK_S3 17,18,19,23
U1B 2N7002DW-7-F_SOT363-6

24 PCIE_RXN1 PCIE_RXN1 BG30 B9 EC_LID_OUT# EC_LID_OUT# 31

PCIE_RXP1 PERN1 SMBALERT# / GPIO11
24 PCIE_RXP1 BJ30

WWANNew card
C133 1 PCIE_C_TXN1 PERP1 SMBCLK
WWAN 24 PCIE_TXN1 2 0.1U_0402_16V4Z BF29 PETN1 SMBCLK H14 SMBCLK 24
C134 1 2 0.1U_0402_16V4Z PCIE_C_TXP1 BH29 WLAN PCH
24 PCIE_TXP1 PETP1
C8 SMBDATA SMBDATA 24
PCIE_RXN2 SMBDATA
24 PCIE_RXN2 AW30 PERN2
24 PCIE_RXP2 PCIE_RXP2 BA30
C135 1 PCIE_C_TXN2 PERP2 SML0ALERT#
WLAN 24 PCIE_TXN2 2 0.1U_0402_16V4Z BC30 PETN2 SML0ALERT# / GPIO60 J14
C136 1 2 0.1U_0402_16V4Z PCIE_C_TXP2 BD30 SMBCLK
24 PCIE_TXP2 PETP2
C6 SML0CLK
PCIE_RXN3 SML0CLK
25 PCIE_RXN3 AU30 For Intel

SMBus
PERN3

2
25 PCIE_RXP3 PCIE_RXP3 AT30 G8 SML0DATA
C137 1 2 0.1U_0402_16V4Z GLAN_C_TXN PERP3 SML0DATA LAN only @ R501
LAN+Cardreader 25 PCIE_TXN3
C138 1
AU32 PETN3
25 PCIE_TXP3 2 0.1U_0402_16V4Z GLAN_C_TXP AV32 PETP3
2.2_0402_5%~D
M14 SML1ALERT#
PCIE_RXN4 SML1ALERT# / GPIO74
24 PCIE_RXN4 BA32

1
PCIE_RXP4 PERN4 SML1CLK R215 0_0402_5%
24 PCIE_RXP4 BB32 PERP4 SML1CLK / GPIO58 E10 SMB_EC_CK2 31
New Card C139 1 2 0.1U_0402_16V4Z PCIE_C_TXN4 BD32

12P_0402_50V8J
24 PCIE_TXN4 PETN4
C140 1 2 0.1U_0402_16V4Z PCIE_C_TXP4 BE32 G12 SML1DATA R231 0_0402_5% SMB_EC_DA2 31 1
24 PCIE_TXP4 PETP4 SML1DATA / GPIO75

PCI-E*
DTS , read from EC @

C326
BF33 PERN5
BH33 PERP5 CL_CLK1 T13
2

Controller
BG32 PETN5
C BJ32 T11 C
PETP5 CL_DATA1

Link
+3VS R677 1 2 10K_0402_5% CLKREQ_LAN# BA34 T9 RF
PERN6 CL_RST1#
AW34 PERP6
BC34 PETN6
request.
+3VALW R405 1 2 10K_0402_5% CLKREQ_WWAN#_R BD34 PETP6 PEG_CLKREQ# R102 1
PEG_A_CLKRQ# / GPIO47 H1 2 10K_0402_5%


AT34 PERN7
+3VS R411 1 2 10K_0402_5% CLKREQ_WLAN# AU34 PERP7
PCIE7 PCIE8 don't AU36 PETN7 CLKOUT_PEG_A_N AD43
support on HM55 AV36 PETP7 CLKOUT_PEG_A_P AD45
+3VALW R415 1 2 10K_0402_5% CLKREQ_EXP#_R
BG34 PERN8 CLKOUT_DMI_N AN4 CLK_EXP# 6

PEG
BJ34 PERP8 CLKOUT_DMI_P AN2 CLK_EXP 6 OK
BG36 PETN8
BJ36 PETP8
AT1 CLK_DP# T71 PAD
CLKOUT_DP_N / CLKOUT_BCLK1_N CLK_DP
CLKOUT_DP_P / CLKOUT_BCLK1_P AT3 T72 PAD
R107 1 2 0_0402_5% CLK_PCIE_WWAN#_R AK48
24 CLK_PCIE_WWAN# CLKOUT_PCIE0N
OK WWAN R108 1 2 0_0402_5% CLK_PCIE_WWAN_R AK47
24 CLK_PCIE_WWAN CLKOUT_PCIE0P

From CLK BUFFER

CLKIN_DMI_N AW24 CLK_DMI# 19
24 CLKREQ_WWAN# R80 1 2 100_0402_5% CLKREQ_WWAN#_R P9 BA24 OK
PCIECLKRQ0# / GPIO73 CLKIN_DMI_P CLK_DMI 19

R109 1 2 0_0402_5% CLK_PCIE_WLAN#_R AM43 AP3

24 CLK_PCIE_WLAN# CLKOUT_PCIE1N CLKIN_BCLK_N CLK_BUF_BCLK# 19
OK WLAN 24 CLK_PCIE_WLAN
R110 1 2 0_0402_5% CLK_PCIE_WLAN_R AM45 CLKOUT_PCIE1P CLKIN_BCLK_P AP1 CLK_BUF_BCLK 19 OK
24 CLKREQ_WLAN# U4 XTAL25_IN
PCIECLKRQ1# / GPIO18
CLKIN_DOT_96N F18 CLK_BUF_DOT96# 19
CLKIN_DOT_96P E18 CLK_BUF_DOT96 19 OK
R111 1 2 0_0402_5% CLK_PCIE_LAN#_R AM47 XTAL25_OUT R113 1 2 1M_0402_5%
25 CLK_PCIE_LAN# CLKOUT_PCIE2N
R112 1 2 0_0402_5% CLK_PCIE_LAN_R AM48
B 25 CLK_PCIE_LAN CLKOUT_PCIE2P B
LAN+Card reader CLKREQ_LAN# CLKIN_SATA_N / CKSSCD_N AH13 CLK_BUF_CKSSCD# 19
25 CLKREQ_LAN# N4 PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P AH12 CLK_BUF_CKSSCD 19 OK Y2
OK
1 2
R114 1 2 0_0402_5% CLK_PCIE_EXP#_R AH42 P41 OK
24 CLK_PCIE_EXP# CLKOUT_PCIE3N REFCLK14IN CLK_14M_PCH 19
OK 24 CLK_PCIE_EXP
R115 1 2 0_0402_5% CLK_PCIE_EXP_R AH41 CLKOUT_PCIE3P
New Card 25MHZ_20P_1BG25000CK1A
24 CLKREQ_EXP# R83 1 2 100_0402_5% CLKREQ_EXP#_R A8 PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK J42 CLK_PCI_FB 14 OK
1 1

AM51 AH51 XTAL25_IN C141 C142

CLKOUT_PCIE4N XTAL25_IN XTAL25_OUT 18P_0402_50V8J 18P_0402_50V8J
AM53 CLKOUT_PCIE4P XTAL25_OUT AH53
2 2
+3VALW R503 1 2 10K_0402_5% PCIECLKREQ4# M9 AF38 R116 1 2 90.9_0402_1% +1.05VS
PCIECLKRQ4# / GPIO26 XCLK_RCOMP

PAD T59 AJ50 CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64 T45

PAD T60 AJ52 CLKOUT_PCIE5P
1019_Stuff R113, Y2, C141 and change C142 from 0 ohm to 18pF.
+3VALW R757 1 2 10K_0402_5% PCIECLKREQ5# H6 P43
Clock Flex

PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65

PAD T61 AK53 CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66 T42

PAD T62 AK51 CLKOUT_PEG_B_P

+3VALW R606 1 2 10K_0402_5% PEG_B_CLKRQ# P13 N50

PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67

BD82HM55 QMNT B3_FCBGA1071

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/03/13 Deciphered Date 2009/05/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IBEX-M(2/6)-PCI-E/SMBUS/CLK
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 12 of 45
5 4 3 2 1
 5 4 3 2 1

R770 EDID_CLK and EDID_DATA single

end and keep 30 mil with other
1 2 ENBKL LVDS signal avoid noise
100K_0402_5%
U1C U1D
BA18 FDI_CTX_PRX_N0 31 ENBKL ENBKL T48 BJ46
FDI_RXN0 FDI_CTX_PRX_N0 7 L_BKLTEN SDVO_TVCLKINN
7 DMI_CTX_PRX_N0 DMI_CTX_PRX_N0 BC24 BH17 FDI_CTX_PRX_N1 I_ENAVDD T47 BG46
DMI0RXN FDI_RXN1 FDI_CTX_PRX_N1 7 21 I_ENAVDD L_VDD_EN SDVO_TVCLKINP
7 DMI_CTX_PRX_N1 DMI_CTX_PRX_N1 BJ22 BD16 FDI_CTX_PRX_N2
DMI1RXN FDI_RXN2 FDI_CTX_PRX_N2 7
7 DMI_CTX_PRX_N2 DMI_CTX_PRX_N2 AW20 BJ16 FDI_CTX_PRX_N3 R890 2 1 0_0402_5% DPST_PWM Y48 BJ48
DMI2RXN FDI_RXN3 FDI_CTX_PRX_N3 7 21,31 LVDS_INV_PWM L_BKLTCTL SDVO_STALLN
7 DMI_CTX_PRX_N3 DMI_CTX_PRX_N3 BJ20 BA16 FDI_CTX_PRX_N4 BG48
DMI3RXN FDI_RXN4 FDI_CTX_PRX_N4 7 SDVO_STALLP
BE14 FDI_CTX_PRX_N5 LVDS_EDID_CLK AB48
FDI_RXN5 FDI_CTX_PRX_N5 7 21 LVDS_EDID_CLK L_DDC_CLK
7 DMI_CTX_PRX_P0 DMI_CTX_PRX_P0 BD24 BA14 FDI_CTX_PRX_N6 21 LVDS_EDID_DATA LVDS_EDID_DATA Y45 BF45
DMI0RXP FDI_RXN6 FDI_CTX_PRX_N6 7 L_DDC_DATA SDVO_INTN
7 DMI_CTX_PRX_P1 DMI_CTX_PRX_P1 BG22 BC12 FDI_CTX_PRX_N7 BH45
DMI1RXP FDI_RXN7 FDI_CTX_PRX_N7 7 SDVO_INTP
7 DMI_CTX_PRX_P2 DMI_CTX_PRX_P2 BA20 +3VS 1 2 AB46
DMI2RXP L_CTRL_CLK

SDVO
7 DMI_CTX_PRX_P3 DMI_CTX_PRX_P3 BG20 BB18 FDI_CTX_PRX_P0 1 R771 2 10K_0402_5% V48
DMI3RXP FDI_RXP0 FDI_CTX_PRX_P0 7 L_CTRL_DATA
BF17 FDI_CTX_PRX_P1 R772 10K_0402_5%
FDI_RXP1 FDI_CTX_PRX_P1 7
D DMI_CRX_PTX_N0 BE22 BC16 FDI_CTX_PRX_P2 R7731 2 2.37K_0402_1% AP39 T51 D
7 DMI_CRX_PTX_N0 DMI0TXN FDI_RXP2 FDI_CTX_PRX_P2 7 LVD_IBG SDVO_CTRLCLK
DMI_CRX_PTX_N1 BF21 BG16 FDI_CTX_PRX_P3 AP41 T53
7 DMI_CRX_PTX_N1 DMI1TXN FDI_RXP3 FDI_CTX_PRX_P3 7 LVD_VBG SDVO_CTRLDATA
DMI_CRX_PTX_N2 BD20 AW16 FDI_CTX_PRX_P4 PAD T69
7 DMI_CRX_PTX_N2 DMI2TXN FDI_RXP4 FDI_CTX_PRX_P4 7

Display Port B
DMI_CRX_PTX_N3 BE18 BD14 FDI_CTX_PRX_P5 AT43
7 DMI_CRX_PTX_N3 DMI3TXN FDI_RXP5 FDI_CTX_PRX_P5 7 LVD_VREFH
BB14 FDI_CTX_PRX_P6 AT42 BG44
FDI_RXP6 FDI_CTX_PRX_P6 7 LVD_VREFL DDPB_AUXN
DMI_CRX_PTX_P0 BD22 BD12 FDI_CTX_PRX_P7 Close PCH and mini space 20mil BJ44
7 DMI_CRX_PTX_P0 DMI0TXP FDI_RXP7 FDI_CTX_PRX_P7 7 DDPB_AUXP
DMI_CRX_PTX_P1 BH21 AU38
7 DMI_CRX_PTX_P1 DMI1TXP DDPB_HPD

LVDS
DMI_CRX_PTX_P2 BC20 LVDS_ACLK- AV53
7 DMI_CRX_PTX_P2 DMI2TXP 21 LVDS_ACLK- LVDSA_CLK#
DMI_CRX_PTX_P3 BD18 BJ14 LVDS_ACLK+ AV51 BD42
7 DMI_CRX_PTX_P3 DMI3TXP FDI_INT FDI_INT 7 21 LVDS_ACLK+ LVDSA_CLK DDPB_0N
BC42

DMI
FDI
LVDS_A0- DDPB_0P
FDI_FSYNC0 BF13 FDI_FSYNC0 7 21 LVDS_A0- BB47 LVDSA_DATA#0 DDPB_1N BJ42
+1.05VS BH25 LVDS_A1- BA52 BG42

Digital Display Interface

DMI_ZCOMP 21 LVDS_A1- LVDSA_DATA#1 DDPB_1P
BH13 LVDS_A2- AY48 BB40
FDI_FSYNC1 FDI_FSYNC1 7 21 LVDS_A2- LVDSA_DATA#2 DDPB_2N
R118 1 2 49.9_0402_1% DMI_IRCOMP BF25 AV47 BA40
DMI_IRCOMP LVDSA_DATA#3 DDPB_2P
FDI_LSYNC0 BJ12 FDI_LSYNC0 7 DDPB_3N AW38
4mil width and place LVDS_A0+ BB48 BA38
21 LVDS_A0+ LVDSA_DATA0 DDPB_3P
BG14 LVDS_A1+ BA50
within 500mil of the PCH FDI_LSYNC1 FDI_LSYNC1 7 21 LVDS_A1+
LVDS_A2+ AY49
LVDSA_DATA1


21 LVDS_A2+ LVDSA_DATA2
AV48 LVDSA_DATA3 DDPC_CTRLCLK Y49
Checklist0.8 MEPWROK AB49
DDPC_CTRLDATA
can be connect to

Display Port C
PWROK if iAMT disable AP48 LVDSB_CLK#
AP47 LVDSB_CLK DDPC_AUXN BE44
DDPC_AUXP BD44
6 XDP_DBRESET# R119 1 2 0_0402_5% SYS_RST# T6 J12 ICH_PCIE_WAKE# AY53 AV40
SYS_RESET# WAKE# ICH_PCIE_WAKE# 24,25 LVDSB_DATA#0 DDPC_HPD
AT49 LVDSB_DATA#1
AU52 LVDSB_DATA#2 DDPC_0N BE40
19,40 VGATE R365 1 2 0_0402_5% M6 Y1 PM_CLKRUN# AT53 BD40
SYS_PWROK CLKRUN# / GPIO32 LVDSB_DATA#3 DDPC_0P
DDPC_1N BF41
31 PM_PWROK @ R373 1 2 0_0402_5% AY51 BH41
System Power Management LVDSB_DATA0 DDPC_1P
B17 PWROK AT48 LVDSB_DATA1 DDPC_2N BD38
R120 2 1 10K_0402_5% AU50 BC38
LVDSB_DATA2 DDPC_2P
AT51 LVDSB_DATA3 DDPC_3N BB36
R121 1 2 0_0402_5% K5 P8 PM_SUS_STAT# BA36
MEPWROK SUS_STAT# / GPIO61 T17 DDPC_3P
31 M_PWROK @ R379 1 2 0_0402_5%
C C
R122 1 2 10K_0402_5% A10 F3 SUS_CLK M_BLUE AA52 U50 HDMID_CTRLCLK
LAN_RST# SUSCLK / GPIO62 T18 20 M_BLUE CRT_BLUE DDPD_CTRLCLK HDMID_CTRLCLK 22
M_GREEN AB53 U52 HDMID_CTRLDATA
20 M_GREEN CRT_GREEN DDPD_CTRLDATA HDMID_CTRLDATA 22
M_RED AD53
20 M_RED CRT_RED
PM_DRAM_PWRGD D9 E4
6 PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 SLP_S5# 31

Display Port D
R_EC_RSMRST# BC46
DDPD_AUXN
20 I_DDCCLK V51 CRT_DDC_CLK DDPD_AUXP BD46
31 EC_RSMRST# R123 1 2 C16 H7 V53 AT38 TMDS_B_HPD#
RSMRST# SLP_S4# SLP_S4# 31 20 I_DDCDATA CRT_DDC_DATA DDPD_HPD TMDS_B_HPD# 22
100_0402_5%
R124 2 1 10K_0402_5% 0_0402_5% BJ40
DDPD_0N TMDSD_DATA0# 22
+3VALW 1 2 SUS_PWR_ACK M1 SUS_PWR_DN_ACK / GPIO30 SLP_S3# P12 SLP_S3# 31 20 CRT_HSYNC
CRT_HSYNC 1 R774 2 HSYNC Y53 CRT_HSYNC DDPD_0P BG40 TMDSD_DATA0 22
R151 10K_0402_5% CRT_VSYNC 1 2 VSYNC Y51 BJ38
20 CRT_VSYNC CRT_VSYNC DDPD_1N TMDSD_DATA1# 22
R775 0_0402_5% BG38
DDPD_1P TMDSD_DATA1 22

CRT
31 PWRBTN_OUT#
R125 1 2 0_0402_5% P5 PWRBTN# SLP_M# K8 Can be left NC when IAMT is DDPD_2N BF37 TMDSD_DATA2# 22
not support on the platfrom CRB0.9 change to 0 ohm AD48 DAC_IREF DDPD_2P BH37 TMDSD_DATA2 22
AB51 CRT_IRTN DDPD_3N BE36 TMDSD_CLK# 22

1
EC_ACIN P7 N2 BD36

1K_0402_0.5%
31 EC_ACIN ACPRESENT / GPIO31 TP23 DDPD_3P TMDSD_CLK 22
BD82HM55 QMNT B3_FCBGA1071

R126
LOW_BAT# A6 BJ10
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC 6

2
PM_RI# F14 F6 If not using integrated
RI# SLP_LAN# / GPIO29
LAN,signal may be left as NC.
D37
BD82HM55 QMNT B3_FCBGA1071 CRB0.9 change to 0 ohm
PM_PWROK 2 1 R_EC_RSMRST#

RB751V_SOD323
SUS_PWR_ACK M_BLUE 1 2
+3VS 31 SUS_PWR_ACK
R776 150_0402_1%
M_GREEN 1 2
SYS_RST# @ R133 1 2 10K_0402_5% R777 150_0402_1%
B M_RED 1 2 B
PM_CLKRUN# R129 1 2 8.2K_0402_5% R778 150_0402_1%

Place the 3 resistors close to IBEX

+3VALW

LOW_BAT# R134 1 2 8.2K_0402_5%

Check PM_SLP_LAN#
PM_RI# R136 1 2 10K_0402_5% R1215
ICH_PCIE_WAKE# R137 1 2 10K_0402_5% 1 2

EC_ACIN R138 2 1 8.2K_0402_5% 0_0402_5%

+RTCVCC

1021_Change R137 from 1K ohm to 10K ohm.

U58
36 +3_5V PWR_OK 1 IN+
VCC+ 5
2 GND
@ R1213 4 R_EC_RSMRST#
OUT
+RTCVCC 1 2 3 IN-
1K_0402_5% LMV331IDCKRG4_SC70-5
@
1

@ R1214
2.2K_0402_5%
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/03/13 Deciphered Date 2009/05/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IBEX-M(3/6)-DMI/GPIO/LVDS
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 13 of 45
5 4 3 2 1
 5 4 3 2 1

+3VS U1E U1F

GPIO8
RP3 H40 AY9 This signal has a weak internal
PCI_DEVSEL# AD0 NV_CE#0 R140 1
1 8 N34 AD1 NV_CE#1 BD1 pull up ,can't Pull low +3VS 2 1K_0402_1% PCH_GPIO0 Y3 BMBUSY# / GPIO0 CLKOUT_PCIE6N AH45 T19 PAD
PCI_SERR# 2 7 C44 AP15 AH46 T20 PAD
PCI_REQ0# AD2 NV_CE#2 PCH_GPIO1 CLKOUT_PCIE6P
3 6 A38 AD3 NV_CE#3 BD8 C38 TACH1 / GPIO1
PCI_PIRQB# 4 5 C36


AD4 PCH_GPIO6
J34 AD5 NV_DQS0 AV9 GPIO15 D37 TACH2 / GPIO6
8.2K_0804_8P4R_5% L Intel ME Crypto Transport
A40 AD6 NV_DQS1 BG8
* CLKOUT_PCIE7N AF48 T21 PAD

MISC
D45 Layer Security(TLS) chiper suite 31 EC_SCI# EC_SCI# J32 AF47 T22 PAD
RP4 AD7 TACH3 / GPIO7 CLKOUT_PCIE7P
E36 AP7


AD8 NV_DQ0 / NV_IO0 with no confidentiality
PCI_REQ1# 1 8 H48 AP6 31 EC_SMI# EC_SMI# F10
PCI_FRAME# AD9 NV_DQ1 / NV_IO1 GPIO8
2 7 E40 AD10 NV_DQ2 / NV_IO2 AT6 H Intel ME Crypto Transport
PCI_TRDY# 3 6 C40 AT9 Layer Security(TLS) chiper suite PCH_GPIO12 K9 U2 GATEA20
AD11 NV_DQ3 / NV_IO3 LAN_PHY_PWR_CTRL / GPIO12 A20GATE GATEA20 31
PCI_PIRQH# 4 5 M48 BB1 with confidentiality
AD12 NV_DQ4 / NV_IO4 PCH_GPIO15
M45 AD13 NV_DQ5 / NV_IO5 AV6 T7 GPIO15
D 8.2K_0804_8P4R_5% F53 BB3 D
AD14 NV_DQ6 / NV_IO6 PCH_GPIO16
M40 AD15 NV_DQ7 / NV_IO7 BA4 it have weak internal PU 20K AA2 SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N AM3 CLK_CPU_BCLK# 6
RP5

NVRAM
M43 AD16 NV_DQ8 / NV_IO8 BE4
PCI_REQ3# 1 8 J36 BB6 PCH_GPIO17 F38 AM1
AD17 NV_DQ9 / NV_IO9 TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_CPU_BCLK 6
PCI_PIRQF# 2 7 K48 BD6 Check list Rev0.8 section1.23.2 If not
PCI_PERR# AD18 NV_DQ10 / NV_IO10 CR_WAKE# PCH_PECI_R R144
3 6 F40 AD19 NV_DQ11 / NV_IO11 BB7 implemented, the Braidwood interface Y7 SCLOCK / GPIO22 PECI BG10 1 2 0_0402_5% H_PECI 6

GPIO
PCI_LOCK# 4 5 C42 BC8
AD20 NV_DQ12 / NV_IO12 signals can be left as No Connect (NC). XMIT_OFF KB_RST#
K46 AD21 NV_DQ13 / NV_IO13 BJ8 24 XMIT_OFF H10 GPIO24 RCIN# T1 KB_RST# 31
8.2K_0804_8P4R_5% M51 BJ6
AD22 NV_DQ14 / NV_IO14
J52 AD23 NV_DQ15 / NV_IO15 BG6 Internal VccVRM Option AB12 GPIO27 PROCPWRGD BE10 H_CPUPWRGD 6
+3VS

CPU
K51 AD24
RP6 L34 BD3 NV_ALE PCH_GPIO28 V13 BD10 H_THERMTRIP#_L 1 2 54.9_0402_1%
AD25 NV_ALE GPIO28 THRMTRIP# H_THERMTRIP# 6
PCI_PIRQA# 1 8 F42 AY6 NV_CLE R146
AD26 NV_CLE

1
PCI_PIRQD# 2 7 J40 +3VS R145 1 2 10K_0402_5% H_STP_PCI# M11
PCI_PIRQG# AD27 STP_PCI# / GPIO34 R147
3 6 G46 AD28
PCI_PIRQC# 4 5 F44 AU2 PCH_GPIO35 V6 56_0402_5%
AD29 NV_RCOMP SATACLKREQ# / GPIO35
M47 AD30
8.2K_0804_8P4R_5% PCH_GPIO36

PCI
H36 AV7 AB7 BA22

2
AD31 NV_RB# SATA2GP / GPIO36 TP1
+VCCP
RP7 J50 AY8 GPIO27 VGA_PRSNT_L# AB13 AW22
PCI_PIRQE# C/BE0# NV_WR#0_RE# SATA3GP / GPIO37 TP2
1 8 G42 C/BE1# NV_WR#1_RE# AY5 On-Die PLL Voltage Regulator
PCI_STOP# 2 7 H47 This signal has a weak internal pull up WWAN_DETECT# V3 BB22


C/BE2# 24 WWAN_DETECT# SLOAD / GPIO38 TP3
PCI_IRDY# 3 6 G34 AV11

On-Die
C/BE3# NV_WE#_CK0
PCI_REQ2# H On-Die voltage regulator enable HDDHALT_LED#
4 5
PCI_PIRQA# G38 PIRQA#
NV_WE#_CK1 BF5
* L PLL Voltage Regulator disable
32 HDDHALT_LED# P3 SDATAOUT0 / GPIO39 TP4 AY45
+3VS
8.2K_0804_8P4R_5% PCI_PIRQB# H51 PCIECLKREQ6# H3 AY46
PCI_PIRQC# PIRQB# USB20_N0 PCIECLKRQ6# / GPIO45 TP5
B37 PIRQC# USBP0N H18 USB20_N0 29
PCI_PIRQD# A44 J18 USB20_P0 ESATA PCH_DDR_RST F1 AV43 EC_SCI# R166 1 2 10K_0402_5%
PIRQD# USBP0P USB20_P0 29 6 PCH_DDR_RST PCIECLKRQ7# / GPIO46 TP6
A18 USB20_N1
USBP1N USB20_N1 29
PCI_REQ0# F51 C18 USB20_P1 MB PCHGPIO48 AB6 AV45 PCH_GPIO1 R167 1 2 10K_0402_5%
REQ0# USBP1P USB20_P1 29 SDATAOUT1 / GPIO48 TP7
PCI_REQ1# A46 N20 USB20_N2
REQ1# / GPIO50 USBP2N USB20_N2 29
PCI_REQ2# B45 P20 USB20_P2 MB USB PCH_TEMP_ALERT# AA4 AF13 KB_RST# R171 1 2 10K_0402_5%
C REQ2# / GPIO52 USBP2P USB20_P2 29 31 PCH_TEMP_ALERT# SATA5GP / GPIO49 TP8 C
PCI_REQ3# M53 J20 USB20_N3
REQ3# / GPIO54 USBP3N USB20_N3 26
L20 USB20_P3 Dock PCH_GPIO57 F8 M18 PCH_GPIO36 R172 1 2 10K_0402_5%
USBP3P USB20_P3 26 GPIO57 TP9
PCI_GNT0# F48 F20 USB20_N4
GNT0# USBP4N USB20_N4 21
PCI_GNT1# K45 G20 USB20_P4 USB Camera EHCI 1 N18 PCH_GPIO6 R173 1 2 10K_0402_5%
GNT1# / GPIO51 USBP4P USB20_P4 21 TP10
T70 PAD PCI_GNT2# F36 A20 USB20_N5
GNT2# / GPIO53 USBP5N USB20_N5 24
PCI_GNT3# H53 C20 USB20_P5 WLAN A4 AJ24 VGA_PRSNT_L# R175 1 2 10K_0402_5%
GNT3# / GPIO55 USBP5P USB20_P5 24 VSS_NCTF_1 TP11
M22 A49

NCTF
USBP6N VSS_NCTF_2

RSVD
PCI_PIRQE# B41 N22 USB port5, port6 don't A5 AK41 PCH_GPIO16 R176 1 2 10K_0402_5%
PCI_PIRQF# PIRQE# / GPIO2 USBP6P VSS_NCTF_3 TP12
K53 PIRQF# / GPIO3 USBP7N B21 support on HM55 A50 VSS_NCTF_4
R150 PCI_PIRQG# A36 D21 A52 AK42 WWAN_DETECT# R178 1 2 10K_0402_5%
ACCEL_INT PCI_PIRQH# PIRQG# / GPIO4 USBP7P USB20_N8 VSS_NCTF_5 TP13
23 ACCEL_INT 2 1 A48 PIRQH# / GPIO5 USBP8N H22 USB20_N8 24 A53 VSS_NCTF_6
0_0402_5% J22 USB20_P8 WWAN B2 M32 GATEA20 R180 1 2 10K_0402_5%
USBP8P USB20_P8 24 VSS_NCTF_7 TP14
USB

K6 E22 USB20_N9 B4
31 PCI_RST# PCIRST# USBP9N USB20_N9 24 VSS_NCTF_8
F22 USB20_P9 New Card B52 N32 PCH_TEMP_ALERT# R181 1 2 10K_0402_5%
USBP9P USB20_P9 24 VSS_NCTF_9 TP15
PCI_SERR# E44 A22 B53
31 PCI_SERR# SERR# USBP10N VSS_NCTF_10
PCI_PERR# E50 C22 BE1 M30 HDDHALT_LED# R169 1 2 10K_0402_5%
PERR# USBP10P USB20_N11 VSS_NCTF_11 TP16
USBP11N G24 USB20_N11 29 EHCI2 BE53 VSS_NCTF_12
GNT2 USBP11P H24 USB20_P11
USB20_P11 29 Finger printer BF1 VSS_NCTF_13 TP17 N30 PCHGPIO48 R170 1 2 10K_0402_5%
PCI_IRDY# A42 L24 USB20_N12 BF53
IRDY# USBP12N USB20_N12 29 VSS_NCTF_14
Default-Internal pull up USB20_P12 BT USB20_N4 CR_WAKE# R168 1 2 10K_0402_5%
* PCI_DEVSEL#
H44
F46
PAR
DEVSEL#
USBP12P
USBP13N
M24
A24
USB20_P12 29
USB20_P4
BH1
BH2
VSS_NCTF_15
VSS_NCTF_16
TP18 H12

Low=Configures DMI for ESI PCI_FRAME# C46 C24 BH52 AA23 PCH_GPIO17 R874 1 2 10K_0402_5%
FRAME# USBP13P VSS_NCTF_17 TP19
compatible operation(for BH53 VSS_NCTF_18
servers only.Not for PCI_LOCK# D49 @ 1 1 @ BJ1 AB45
PLOCK# USBRBIAS R155 1 VSS_NCTF_19 NC_1
mobile/desktops) USBRBIAS# B25 2 22.6_0402_1% C304 C305 BJ2 VSS_NCTF_20
PCI_STOP# D41 BJ4 AB38
PCI_TRDY# STOP# 47P_0402_50V8J 47P_0402_50V8J VSS_NCTF_21 NC_2
C48 TRDY# USBRBIAS D25 Within 500 2 2
BJ49 VSS_NCTF_22
BJ5 VSS_NCTF_23 NC_3 AB42 INIT3_3V
31 PCI_PME# M7 mils BJ50
PME# USB_OC#0 VSS_NCTF_24
OC0# / GPIO59 N16 BJ52 VSS_NCTF_25 NC_4 AB41 This signal has weak internal
PLT_RST# D5 J16 BT_OFF RF Close PCH BJ53 PU, can't pull low
24,25 PLT_RST# PLTRST# OC1# / GPIO40 BT_OFF 29 VSS_NCTF_26
F16 USB_OC#2 D1 T39
B OC2# / GPIO41 WXMIT_OFF# request. VSS_NCTF_27 NC_5 B
N52 CLKOUT_PCI0 OC3# / GPIO42 L16 WXMIT_OFF# 24 D2 VSS_NCTF_28
R_CLK_PCI_FB P53 E14 USB_OC#4 D53
R_CLK_PCI_EC CLKOUT_PCI1 OC4# / GPIO43 USB_OC#5 VSS_NCTF_29
P46 CLKOUT_PCI2 OC5# / GPIO9 G16 E1 VSS_NCTF_30 INIT3_3V# P6 T48 PAD
P51 F12 USB_OC#6 E53
R_CLK_DEBUG_PORT_1 CLKOUT_PCI3 OC6# / GPIO10 EXP_CPPE# VSS_NCTF_31
P48 CLKOUT_PCI4 OC7# / GPIO14 T15 EXP_CPPE# 24 TP24 C10

BD82HM55 QMNT B3_FCBGA1071 +3VALW

BD82HM55 QMNT B3_FCBGA1071
R158 1 2 22_0402_5% R_CLK_PCI_FB
12 CLK_PCI_FB
31 CLK_PCI_EC
R160 1 2 22_0402_5% R_CLK_PCI_EC PCI_GNT0# @ R163 1 2 1K_0402_5% Intel Anti-Theft Techonlogy EC_SMI# R157 1 2 10K_0402_5%

PCI_GNT1# @ R164 1 2 1K_0402_5% High=Endabled PCH_GPIO15 R159 1 2 1K_0402_5%

R162 1 2 22_0402_5% R_CLK_DEBUG_PORT_1 NV_ALE
24 CLK_DEBUG_PORT_1
Low=Disable(floating) PCH_GPIO12 R811 1 2 10K_0402_5%
Boot BIOS Strap *
NV_ALE PCIECLKREQ6# R812 1 2 10K_0402_5%


+3VALW PCI_GNT0# PCI_GNT1# Boot BIOS +1.8VS Enable Intel Anti-Theft
RP8 Technology 8.2K PU to +3VS PCH_DDR_RST R813 1 2 10K_0402_5%
USB_OC#0 4 5
Location NV_ALE @ R174 1 2 1K_0402_5%

Technologyfloating(internal PD)
WXMIT_OFF# 3 6 0 0 LPC Disable Intel Anti-Theft PCH_GPIO28 R814 1 2 10K_0402_5%
BT_OFF 2 7
USB_OC#2 1 8 0 1 Reserved(NAND) DMI Termination Voltage PCH_GPIO57 R182 1 2 10K_0402_5%
NV_CLE
10K_1206_8P4R_5% 1 0 PCI Set to Vcc when HIGH PCH_GPIO35 R165 2 1 10K_0402_5%
NV_CLE DMI termination voltage.
RP9 1 1 SPI Set to Vss when LOW
USB_OC#6 4 5 * weak internal PU, don't PD
USB_OC#5 3 6 Weak internal
USB_OC#4 2 7 PU,Do not pull low +3VS
EXP_CPPE# 1 8 R179 1 2 0_0402_5%
NV_CLE @ R184 1 2 1K_0402_5%
10K_1206_8P4R_5% +3VS
A A

PCI_GNT3# @ R183 1 2 1K_0402_5%

5

@U2
@U2
1 PLT_RST#
P

IN1
6 BUF_PLT_RST# 4 O
A16 swap overide Strap/Top-Block IN2 2
1

Swap Override jumper

@ SN74AHC1G08DCKR_SC70-5 Security Classification Compal Secret Data Compal Electronics, Inc.
3

Low=A16 swap R185

Issued Date 2008/03/13 Deciphered Date 2009/05/11 Title
override/Top-Block 100K_0402_5%
PCI_GNT3# Swap Override enabled IBEX-M(4/6)-PCI/USB/RSVD
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
High=Default * AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 14 of 45
5 4 3 2 1
 5 4 3 2 1

+1.05VS +VCCP_VCCA_CLK +3VS

@ R186 +1.05VS L45
1 2
U1G POWER 2 1
0_0603_5% AB24 AE50 MURATA_BLM18AG601SN1D_0603

1U_0402_6.3V6K
10U_0805_6.3V6M

10U_0805_6.3V6M
0.01U_0402_25V7K
VCCCORE[1] VCCADAC[1]

0.1U_0402_16V4Z
POWER AB26

1U_0402_6.3V6K

10U_0603_6.3V6M
U1J +1.05VS VCCCORE[2]
1 1 1 1 AB28 VCCCORE[3] 0.069A VCCADAC[2] AE52 1 1 1

C143

C144
AD26 VCCCORE[4] 1.524A

CRT
C145

C146

C147

C148

C149
AP51 V24 AD28 AF53

1U_0402_6.3V6K
@ @ VCCACLK[1] VCCIO[5] VCCCORE[5] VSSA_DAC[1]
2 2 0.052A VCCIO[6] V26 1 2 2
AF26 VCCCORE[6] 2 2 2

VCC CORE
AP53 VCCACLK[2] VCCIO[7] Y24 AF28 VCCCORE[7] VSSA_DAC[2] AF51

C150
VCCIO[8] Y26 AF30 VCCCORE[8]
D
DG1.1 no M3 2
AF31 VCCCORE[9] D
support and not AF23 VCCLAN[1] VCCSUS3_3[1] V28 AH26 VCCCORE[10] +3VS
Intel LAN, VCCLAN 0.344A VCCSUS3_3[2] U28 AH28 VCCCORE[11]
AF24 VCCLAN[2] VCCSUS3_3[3] U26 AH30 VCCCORE[12]
Source=>GND VCCSUS3_3[4] U24 AH31 VCCCORE[13] 0.030A VCCALVDS AH38
VCCSUS3_3[5] P28 AJ30 VCCCORE[14]
1 2 C152 Y20 DCPSUSBYP VCCSUS3_3[6] P26 AJ31 VCCCORE[15] VSSA_LVDS AH39
0.1U_0402_16V4Z N28
VCCSUS3_3[7] R779 1
VCCSUS3_3[8] N26 2 0_0603_5% +1.8VS
+1.05VS +1.05VS

0.01U_0603_16V7K

0.01U_0603_16V7K

10U_0805_6.3V6M
AD38 VCCME[1] VCCSUS3_3[9] M28 VCCTX_LVDS[1] AP43
+3VALW
VCCSUS3_3[10] M26 0.059A VCCTX_LVDS[2] AP45

C998

C999

C1000
AD39 L28 AT46 1 1 1

USB

LVDS
VCCME[2] VCCSUS3_3[11] VCCTX_LVDS[3]
1 L26 AK24 AT45

1U_0402_6.3V6K
VCCSUS3_3[12] +1.05VS_APLL VCCIO[24] VCCTX_LVDS[4]
AD41 J28

0.1U_0402_16V4Z

0.1U_0402_16V4Z
VCCME[3] VCCSUS3_3[13] @ R188
C153
VCCSUS3_3[14] J26 1 1 2 2 2

C157

C158
2
AF43 VCCME[4] VCCSUS3_3[15] H28 1 2 BJ24 VCCAPLLEXP0.042A
H26 AB34

10U_0805_6.3V6M
VCCSUS3_3[16] 0_0603_5% VCC3_3[2] +3VS
AF41 VCCME[5] 0.163AVCCSUS3_3[17] G28
2 2
VCCSUS3_3[18] G26 1 AN20 VCCIO[25] VCC3_3[3] AB35

C159
AF42 F28 AN22

HVCMOS

0.1U_0402_16V4Z
VCCME[6] VCCSUS3_3[19] VCCIO[26]
1.998A VCCSUS3_3[20] F26
@
AN23 VCCIO[27] VCC3_3[4] AD35
V39 VCCME[7] VCCSUS3_3[21] E28 AN24 VCCIO[28] 1
2

C160
E26 AN26

Clock and Miscellaneous

VCCSUS3_3[22] VCCIO[29]
V41 VCCME[8] VCCSUS3_3[23] C28 AN28 VCCIO[30]
C26 BJ26
1U_0402_6.3V6K
10U_0805_6.3V6M

10U_0805_6.3V6M

VCCSUS3_3[24] VCCIO[31] 2
1 1 1 V42 VCCME[9] VCCSUS3_3[25] B27 BJ28 VCCIO[32]
VCCSUS3_3[26] A28 AT26 VCCIO[33]
+1.05VS
C162

C163

C161

Y39 VCCME[10] VCCSUS3_3[27] A26 AT28 VCCIO[34]

AU26 +1.8VS
2 2 2 VCCIO[35]
Y41 VCCME[11] VCCSUS3_3[28] U23 AU28 VCCIO[36]
AV26

1U_0402_6.3V6K

1U_0402_6.3V6K
VCCIO[37]
Y42 VCCME[12] VCCIO[56] V23 +1.05VS 1 1 AV28 VCCIO[38] VCCVRM[2] AT24
AW26 VCCIO[39]
C ICH_V5REF_SUS C

C164

C165
>1mA V5REF_SUS F24 AW28 VCCIO[40] +VCCP

DMI
BA26 VCCIO[41] VCCDMI[1] AT16
C166 1 +VCCRTCEXT 2 2
2
0.1U_0402_16V4Z
V9 DCPRTC BA28 VCCIO[42] 0.061A
BB26 AU16

1U_0402_6.3V6K
VCCIO[43] VCCDMI[2]
BB28 VCCIO[44] 1
ICH_V5REF_RUN

C167
0.035A >1mA V5REF K49 BC26 VCCIO[45]

PCI E*
+1.8VS AU24 VCCVRM[3] BC28 VCCIO[46]
PCI/GPIO/LPC

BD26 VCCIO[47]
+3VS 2
0.072A J38 BD28

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M
VCC3_3[8] VCCIO[48]
BB51 VCCADPLLA[1] 1 1 1 BE26 AM16

0.1U_0402_16V4Z
+V1.05S_VCCA_A_DPL VCCIO[49] VCCPNAND[1]
BB53 VCCADPLLA[2] VCC3_3[9] L38 BE28 VCCIO[50] VCCPNAND[2] AK16

C168

C169

C170
1 BG26 VCCIO[51] VCCPNAND[3] AK20
+V1.05S_VCCA_B_DPL R671 2 0_0402_5%

C171
0.073A VCC3_3[10] M36
2 2 2
BG28 VCCIO[52] VCCPNAND[4] AK19 1 +1.8VS
BD51 0.357A BH27 0.156A AK15

0.1U_0402_16V4Z
+1.05VS VCCADPLLB[1] VCCIO[53] VCCPNAND[5]
BD53 VCCADPLLB[2] VCC3_3[11] N36 VCCPNAND[6] AK13 1
2 @ R672 2 0_0402_5%

C172
AN30 VCCIO[54] VCCPNAND[7] AM12 1 +3VS

NAND / SPI
AH23 VCCIO[21] VCC3_3[12] P36 AN31 VCCIO[55] VCCPNAND[8] AM13
AJ35 AM15
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

VCCIO[22] +3VS VCCPNAND[9] 2

1 1 1 AH35 VCCIO[23] VCC3_3[13] U35
+3VS AN35 VCC3_3[1]
C173

C174

C175

AF34 VCCIO[2] 3.208A C176 1

VCC3_3[14] AD13 2 0.1U_0402_16V4Z C682 1 2 0.1U_0402_16V4Z
2 2 2 +3VS
AH34 VCCIO[3] +1.8VS AT22 VCCVRM[1] 0.035A
+1.05VS_VCCAPLL +1.05VS +1.05VS_VCCFDIPLL
AF32 VCCIO[4]
0.1A@1.1V @ R189
BJ18 VCCFDIPLL 6mA VCCME3_3[1] AM8
AK3 AM9

0.1U_0402_16V4Z
VCCSATAPLL[1] VCCME3_3[2]

FDI
1 2 +VCCSST V12 0.032A AK1 1 2 +1.05VS AM23 0.085A AP11 1
0.1U_0402_16V4Z DCPSST VCCSATAPLL[2] 0_0603_5% VCCIO[1] VCCME3_3[3]

C178
AP9
1U_0402_6.3V6K
C177 VCCME3_3[4]
1

10U_0805_6.3V6M
1 2
+V1.1A_INT_VCCSUS
C180

C181
1 2 Y22 DCPSUS
0.1U_0402_16V4Z AH22 BD82HM55 QMNT B3_FCBGA1071
B C179 VCCIO[9] @ 2 @ B
+3VALW 2
0.2A@3.3V P18 VCCSUS3_3[29] VCCVRM[4] AT20 +1.8VS
@ R190
U19 +1.05VS 1 2 +1.05VS_VCCFDIPLL
SATA

VCCSUS3_3[30] +1.05VS 0_0603_5%

PCI/GPIO/LPC

1 2 AH19

10U_0805_6.3V6M
0.1U_0402_16V4Z VCCIO[10]
U20 VCCSUS3_3[31]
C182 AD20 1
VCCIO[11]

C183
U22
1U_0402_6.3V6K

VCCSUS3_3[32]
VCCIO[12] AF22 1
+3VS @
0.4A@3.3V 2
C184

VCCIO[13] AD19
V15 AF20 +1.05VS +1.05VS_L +V1.05S_VCCA_A_DPL_L
VCC3_3[5] VCCIO[14] 2 R191 R192 L6
VCCIO[15] AF19
1 2 V16 AH20 1 2 1 2 1 2 +V1.05S_VCCA_A_DPL
0.1U_0402_16V4Z VCC3_3[6] VCCIO[16] 0_0603_5% 0_0603_5% 10UH_LB2012T100MR_20%_0805 1

1U_0402_6.3V6K

220U_B_2.5VM_R15M
C185 Y16 AB19 2
VCC3_3[7] VCCIO[17] + +5VALW +3VALW +5VS +3VS

C186
VCCIO[18] AB20
+VCCP

C187
AB22 @
VCCIO[19]
0.1A@1.1V VCCIO[20] AD22 +1.05VS

2
1 2
AT18 V_CPU_IO[1]
AA34 +PCH_VCC1_1_20 R194 1 2 0_0402_5% D4 R197 D5
CPU
0.1U_0402_16V4Z

0.1U_0402_16V4Z
4.7U_0603_6.3V6K

VCCME[13] +PCH_VCC1_1_21 R195 0_0402_5% R196

1 1 1 VCCME[14] Y34 1 2 RB751V_SOD323 RB751V_SOD323
AU18 Y35 +PCH_VCC1_1_22 R198 1 2 0_0402_5% +V1.05S_VCCA_B_DPL_L 100_0402_5% 100_0402_5%
V_CPU_IO[2] VCCME[15] +PCH_VCC1_1_23 R200 0_0402_5% R201 L7
C188

C189

C190

AA35 1 2

1
VCCME[16] +V1.05S_VCCA_B_DPL ICH_V5REF_RUN
1 2 1 2
2 2 2 0_0603_5% 10UH_LB2012T100MR_20%_0805 ICH_V5REF_SUS

1U_0402_6.3V6K
+RTCVCC
RTC

A12 2mA 6mA L30 +3.3A_1.5A_VCCPAZSUS +3VALW 1 20 mils 20 mils

220U_B_2.5VM_R15M
VCCRTC VCCSUSHDA
HDA

1 1 1
+ C194 C195

C192

C191
1
1U_0402_6.3V6K

2mA@3.3V BD82HM55 QMNT B3_FCBGA1071 @ 1U_0402_6.3V6K 1U_0402_6.3V6K

C193
0.1U_0402_16V4Z

0.1U_0402_16V4Z

A 2 2 2 2 A
1 1 Close PCH 2
C196

C197

2 2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/03/13 Deciphered Date 2009/05/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IBEX-M(5/6)-PWR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 15 of 45
5 4 3 2 1
 5 4 3 2 1

U1I U1H
AY7 VSS[159] VSS[259] H49 AB16 VSS[0]
B11 VSS[160] VSS[260] H5
B15 VSS[161] VSS[261] J24 AA19 VSS[1] VSS[80] AK30
B19 VSS[162] VSS[262] K11 AA20 VSS[2] VSS[81] AK31
B23 VSS[163] VSS[263] K43 AA22 VSS[3] VSS[82] AK32
B31 VSS[164] VSS[264] K47 AM19 VSS[4] VSS[83] AK34
B35 VSS[165] VSS[265] K7 AA24 VSS[5] VSS[84] AK35
B39 VSS[166] VSS[266] L14 AA26 VSS[6] VSS[85] AK38
B43 VSS[167] VSS[267] L18 AA28 VSS[7] VSS[86] AK43
B47 VSS[168] VSS[268] L2 AA30 VSS[8] VSS[87] AK46
D B7 L22 AA31 AK49 D
VSS[169] VSS[269] VSS[9] VSS[88]
BG12 VSS[170] VSS[270] L32 AA32 VSS[10] VSS[89] AK5
BB12 VSS[171] VSS[271] L36 AB11 VSS[11] VSS[90] AK8
BB16 VSS[172] VSS[272] L40 AB15 VSS[12] VSS[91] AL2
BB20 VSS[173] VSS[273] L52 AB23 VSS[13] VSS[92] AL52
BB24 VSS[174] VSS[274] M12 AB30 VSS[14] VSS[93] AM11
BB30 VSS[175] VSS[275] M16 AB31 VSS[15] VSS[94] BB44
BB34 VSS[176] VSS[276] M20 AB32 VSS[16] VSS[95] AD24
BB38 VSS[177] VSS[277] N38 AB39 VSS[17] VSS[96] AM20
BB42 VSS[178] VSS[278] M34 AB43 VSS[18] VSS[97] AM22
BB49 VSS[179] VSS[279] M38 AB47 VSS[19] VSS[98] AM24
BB5 VSS[180] VSS[280] M42 AB5 VSS[20] VSS[99] AM26
BC10 VSS[181] VSS[281] M46 AB8 VSS[21] VSS[100] AM28
BC14 VSS[182] VSS[282] M49 AC2 VSS[22] VSS[101] BA42
BC18 VSS[183] VSS[283] M5 AC52 VSS[23] VSS[102] AM30
BC2 VSS[184] VSS[284] M8 AD11 VSS[24] VSS[103] AM31
BC22 VSS[185] VSS[285] N24 AD12 VSS[25] VSS[104] AM32
BC32 VSS[186] VSS[286] P11 AD16 VSS[26] VSS[105] AM34
BC36 VSS[187] VSS[287] AD15 AD23 VSS[27] VSS[106] AM35
BC40 VSS[188] VSS[288] P22 AD30 VSS[28] VSS[107] AM38
BC44 VSS[189] VSS[289] P30 AD31 VSS[29] VSS[108] AM39
BC52 VSS[190] VSS[290] P32 AD32 VSS[30] VSS[109] AM42
BH9 VSS[191] VSS[291] P34 AD34 VSS[31] VSS[110] AU20
BD48 VSS[192] VSS[292] P42 AU22 VSS[32] VSS[111] AM46
BD49 VSS[193] VSS[293] P45 AD42 VSS[33] VSS[112] AV22
BD5 VSS[194] VSS[294] P47 AD46 VSS[34] VSS[113] AM49
BE12 VSS[195] VSS[295] R2 AD49 VSS[35] VSS[114] AM7
BE16 VSS[196] VSS[296] R52 AD7 VSS[36] VSS[115] AA50
BE20 VSS[197] VSS[297] T12 AE2 VSS[37] VSS[116] BB10
BE24 VSS[198] VSS[298] T41 AE4 VSS[38] VSS[117] AN32
BE30 VSS[199] VSS[299] T46 AF12 VSS[39] VSS[118] AN50
BE34 VSS[200] VSS[300] T49 Y13 VSS[40] VSS[119] AN52
C BE38 T5 AH49 AP12 C
VSS[201] VSS[301] VSS[41] VSS[120]
BE42 VSS[202] VSS[302] T8 AU4 VSS[42] VSS[121] AP42
BE46 VSS[203] VSS[303] U30 AF35 VSS[43] VSS[122] AP46
BE48 VSS[204] VSS[304] U31 AP13 VSS[44] VSS[123] AP49
BE50 VSS[205] VSS[305] U32 AN34 VSS[45] VSS[124] AP5
BE6 VSS[206] VSS[306] U34 AF45 VSS[46] VSS[125] AP8
BE8 VSS[207] VSS[307] P38 AF46 VSS[47] VSS[126] AR2
BF3 VSS[208] VSS[308] V11 AF49 VSS[48] VSS[127] AR52
BF49 VSS[209] VSS[309] P16 AF5 VSS[49] VSS[128] AT11
BF51 VSS[210] VSS[310] V19 AF8 VSS[50] VSS[129] BA12
BG18 VSS[211] VSS[311] V20 AG2 VSS[51] VSS[130] AH48
BG24 VSS[212] VSS[312] V22 AG52 VSS[52] VSS[131] AT32
BG4 VSS[213] VSS[313] V30 AH11 VSS[53] VSS[132] AT36
BG50 VSS[214] VSS[314] V31 AH15 VSS[54] VSS[133] AT41
BH11 VSS[215] VSS[315] V32 AH16 VSS[55] VSS[134] AT47
BH15 VSS[216] VSS[316] V34 AH24 VSS[56] VSS[135] AT7
BH19 VSS[217] VSS[317] V35 AH32 VSS[57] VSS[136] AV12
BH23 VSS[218] VSS[318] V38 AV18 VSS[58] VSS[137] AV16
BH31 VSS[219] VSS[319] V43 AH43 VSS[59] VSS[138] AV20
BH35 VSS[220] VSS[320] V45 AH47 VSS[60] VSS[139] AV24
BH39 VSS[221] VSS[321] V46 AH7 VSS[61] VSS[140] AV30
BH43 VSS[222] VSS[322] V47 AJ19 VSS[62] VSS[141] AV34
BH47 VSS[223] VSS[323] V49 AJ2 VSS[63] VSS[142] AV38
BH7 VSS[224] VSS[324] V5 AJ20 VSS[64] VSS[143] AV42
C12 VSS[225] VSS[325] V7 AJ22 VSS[65] VSS[144] AV46
C50 VSS[226] VSS[326] V8 AJ23 VSS[66] VSS[145] AV49
D51 VSS[227] VSS[327] W2 AJ26 VSS[67] VSS[146] AV5
E12 VSS[228] VSS[328] W52 AJ28 VSS[68] VSS[147] AV8
E16 VSS[229] VSS[329] Y11 AJ32 VSS[69] VSS[148] AW14
E20 VSS[230] VSS[330] Y12 AJ34 VSS[70] VSS[149] AW18
E24 VSS[231] VSS[331] Y15 AT5 VSS[71] VSS[150] AW2
E30 VSS[232] VSS[332] Y19 AJ4 VSS[72] VSS[151] BF9
B E34 Y23 AK12 AW32 B
VSS[233] VSS[333] VSS[73] VSS[152]
E38 VSS[234] VSS[334] Y28 AM41 VSS[74] VSS[153] AW36
E42 VSS[235] VSS[335] Y30 AN19 VSS[75] VSS[154] AW40
E46 VSS[236] VSS[336] Y31 AK26 VSS[76] VSS[155] AW52
E48 VSS[237] VSS[337] Y32 AK22 VSS[77] VSS[156] AY11
E6 VSS[238] VSS[338] Y38 AK23 VSS[78] VSS[157] AY43
E8 VSS[239] VSS[339] Y43 AK28 VSS[79] VSS[158] AY47
F49 VSS[240] VSS[340] Y46
F5 P49 BD82HM55 QMNT B3_FCBGA1071
VSS[241] VSS[341]
G10 VSS[242] VSS[342] Y5
G14 VSS[243] VSS[343] Y6
G18 VSS[244] VSS[344] Y8
G2 VSS[245] VSS[345] P24
G22 VSS[246] VSS[346] T43
G32 VSS[247] VSS[347] AD51
G36 VSS[248] VSS[348] AT8
G40 VSS[249] VSS[349] AD47
G44 VSS[250] VSS[350] Y47
G52 VSS[251] VSS[351] AT12
AF39 VSS[252] VSS[352] AM6
H16 VSS[253] VSS[353] AT13
H20 VSS[254] VSS[354] AM5
H30 VSS[255] VSS[355] AK45
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]

BD82HM55 QMNT B3_FCBGA1071

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/03/13 Deciphered Date 2009/05/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IBEX-M(6/6)-GND
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 16 of 45
5 4 3 2 1
 5 4 3 2 1

+VREF_DQ_DIMMA +1.5V +1.5V

3A@1.5V
8 DDR_A_D[0..63] +1.5V
+V_DDR_CPU_REF
8 DDR_A_DM[0..7] +VREF_DQ_DIMMA

1
JDIMM1 CONN@
8 DDR_A_DQS[0..7]
+VREF_DQ_DIMMA 1 2 R884 1 2 V_DDR_CPU_REF R205
VREF_DQ VSS1 DDR_A_D4 0_0402_5% +V_DDR_CPU_REF0 1K_0402_1%
3 VSS2 DQ4 4 8 DDR_A_DQS#[0..7] +V_DDR_CPU_REF
0.1U_0402_10V6K

2.2U_0603_6.3V4Z
DDR_A_D0 5 6 DDR_A_D5
DQ0 DQ5
C1057

C1058
1 1 DDR_A_D1 7 8 8 DDR_A_MA[0..15]

2
DQ1 VSS3 DDR_A_DQS#0 @ R898 1
9 VSS4 DQS#0 10 2 0_0402_5%
DDR_A_DM0 11 12 DDR_A_DQS0
DM0 DQS0
13 VSS5 VSS6 14

1
2 2 DDR_A_D2 DDR_A_D6
15 DQ2 DQ6 16
D DDR_A_D3 17 18 DDR_A_D7 D
DQ3 DQ7 R206
19 VSS7 VSS8 20
DDR_A_D8 21 22 DDR_A_D12 1K_0402_1%
DDR_A_D9 DQ8 DQ12 DDR_A_D13
23 24

2
DQ9 DQ13
25 VSS9 VSS10 26
DDR_A_DQS#1 27 28 DDR_A_DM1
DDR_A_DQS1 DQS#1 DM1 DRAMRST#
29 DQS1 RESET# 30 DRAMRST# 6,18
31 VSS11 VSS12 32
DDR_A_D10 33 34 DDR_A_D14
DDR_A_D11 DQ10 DQ14 DDR_A_D15
35 DQ11 DQ15 36
37 VSS13 VSS14 38
DDR_A_D16 39 40 DDR_A_D20 1
DDR_A_D17 DQ16 DQ20 DDR_A_D21 @
41 DQ17 DQ21 42
43 44 C1441 1103_Add 0.1uF for DRAMRST#.
DDR_A_DQS#2 VSS15 VSS16 DDR_A_DM2 0.1U_0402_16V4Z
45 DQS#2 DM2 46
DDR_A_DQS2 2
47 DQS2 VSS17 48
49 50 DDR_A_D22
DDR_A_D18 VSS18 DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54
DQ19 VSS19 DDR_A_D28
55 VSS20 DQ28 56
DDR_A_D24 57 58 DDR_A_D29
DDR_A_D25 DQ24 DQ29
59 DQ25 VSS21 60
DDR_A_DQS#3
Layout Note:
61 VSS22 DQS#3 62
DDR_A_DM3 63 DM3 DQS3 64 DDR_A_DQS3 Place near JDIMM1
65 VSS23 VSS24 66
DDR_A_D26 67 68 DDR_A_D30
DDR_A_D27 DQ26 DQ30 DDR_A_D31
69 DQ27 DQ31 70
71 VSS25 VSS26 72

+1.5V
8 DDR_CKE0_DIMMA DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA
C CKE0 CKE1 DDR_CKE1_DIMMA 8 C
75 VDD1 VDD2 76
77 78 DDR_A_MA15
DDR_A_BS2 NC1 A15 DDR_A_MA14
8 DDR_A_BS2 79 80 1

47P_0402_50V8J

47P_0402_50V8J

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
BA2 A14
81 VDD3 VDD4 82 1 1 1 1 1 1 1 1 1 1 1

1
DDR_A_MA12 DDR_A_MA11 + C200

C44

C45

C212
83 A12/BC# A11 84
DDR_A_MA9 DDR_A_MA7 330U_D2_2V_Y

C201

C203

C204

C205

C206

C207

C208

C209

C210

C211
85 A9 A7 86
87 88 @ @

2
DDR_A_MA8 VDD5 VDD6 DDR_A_MA6 2 2 2 2 2 @ 2 2 @ 2 2 2 2 2
89 A8 A6 90
DDR_A_MA5 91 92 DDR_A_MA4
A5 A4
93 VDD7 VDD8 94
DDR_A_MA3 95 96 DDR_A_MA2
DDR_A_MA1 A3 A2 DDR_A_MA0
97 A1 A0 98
99 VDD9 VDD10 100
8 M_CLK_DDR0 M_CLK_DDR0 101 102 M_CLK_DDR1
CK0 CK1 M_CLK_DDR1 8
8 M_CLK_DDR#0 M_CLK_DDR#0 103 104 M_CLK_DDR#1
CK0# CK1# M_CLK_DDR#1 8
105 VDD11 VDD12 106
DDR_A_MA10 107 108 DDR_A_BS1
A10/AP BA1 DDR_A_BS1 8
8 DDR_A_BS0 DDR_A_BS0 109 110 DDR_A_RAS# Layout Note:
BA0 RAS# DDR_A_RAS# 8
111 VDD13 VDD14 112
8 DDR_A_WE# DDR_A_WE# 113 WE# S0# 114 DDR_CS0_DIMMA#
DDR_CS0_DIMMA# 8
Place near JDIMM1.203 & JDIMM1.204
8 DDR_A_CAS# DDR_A_CAS# 115 116 M_ODT0
CAS# ODT0 M_ODT0 8
117 VDD15 VDD16 118
DDR_A_MA13 119 120 M_ODT1
A13 ODT1 M_ODT1 8 +VREF_CA +V_DDR_CPU_REF
8 DDR_CS1_DIMMA# DDR_CS1_DIMMA# 121 122
S1# NC2 +0.75VS
123 VDD17 VDD18 124
125 126 +VREF_CA 1 2
NCTEST VREF_CA R877 0_0402_5%
127 VSS27 VSS28 128
DDR_A_D32 129 130 DDR_A_D36 1 1

2.2U_0402_6.3V6M
0.1U_0402_16V4Z
DDR_A_D33 DQ32 DQ36 DDR_A_D37
131 132

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0805_6.3V6M
DQ33 DQ37
C213

C214
133 VSS29 VSS30 134 1 1 1 1 1
DDR_A_DQS#4 135 136 DDR_A_DM4
DDR_A_DQS4 DQS#4 DM4 2 2

C215

C216

C217

C218

C202
137 DQS4 VSS31 138
B 139 140 DDR_A_D38 B
DDR_A_D34 VSS32 DQ38 DDR_A_D39 2 2 2 2 2
141 DQ34 DQ39 142
DDR_A_D35 143 144
DQ35 VSS33 DDR_A_D44
145 VSS34 DQ44 146
DDR_A_D40 147 148 DDR_A_D45
DDR_A_D41 DQ40 DQ45
149 DQ41 VSS35 150
151 152 DDR_A_DQS#5
DDR_A_DM5 VSS36 DQS#5 DDR_A_DQS5
153 DM5 DQS5 154
155 VSS37 VSS38 156
DDR_A_D42 157 158 DDR_A_D46
DDR_A_D43 DQ42 DQ46 DDR_A_D47
159 DQ43 DQ47 160
161 VSS39 VSS40 162
DDR_A_D48 163 164 DDR_A_D52
DDR_A_D49 DQ48 DQ52 DDR_A_D53
165 DQ49 DQ53 166
167 VSS41 VSS42 168
DDR_A_DQS#6 169 170 DDR_A_DM6
DDR_A_DQS6 DQS#6 DM6
171 DQS6 VSS43 172
173 174 DDR_A_D54
DDR_A_D50 VSS44 DQ54 DDR_A_D55
175 DQ50 DQ55 176
DDR_A_D51 177 178
DQ51 VSS45 DDR_A_D60
179 VSS46 DQ60 180
DDR_A_D56 181 182 DDR_A_D61
DDR_A_D57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDR_A_DQS#7
DDR_A_DM7 VSS48 DQS#7 DDR_A_DQS7
187 DM7 DQS7 188
189 VSS49 VSS50 190
DDR_A_D58 191 192 DDR_A_D62
DDR_A_D59 DQ58 DQ62 DDR_A_D63
193 DQ59 DQ63 194
1 R207 2 195 VSS51 VSS52 196
10K_0402_5% 197 198 PM_EXTTS#1_R
SA0 EVENT# PM_EXTTS#1_R 6,18
199 200 SMB_DATA_S3
+3VS VDDSPD SDA SMB_DATA_S3 12,18,19,23
201 202 SMB_CLK_S3
SMB_CLK_S3 12,18,19,23
2.2U_0402_6.3V6M

0.1U_0402_16V4Z

A SA1 SCL A
1 1 203 VTT1 VTT2 204 +0.75VS
1

10K_0402_5%

0.65A@0.75V
C219

C220

R208

205 206
2 2
G1 G2
+0.75VS
DDR3 SO-DIMM A
REVERSE
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/03/13 Deciphered Date 2009/05/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII-SODIMM SLOT1
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 17 of 45
5 4 3 2 1
 5 4 3 2 1

+1.5V +1.5V
8 DDR_B_DQS#[0..7]
3A@1.5V
8 DDR_B_D[0..63]
+VREF_DQ_DIMMB +VREF_DQ_DIMMB +V_DDR_CPU_REF
8 DDR_B_DM[0..7]
JDIMM2
+VREF_DQ_DIMMB 1 2
VREF_DQ VSS1 8 DDR_B_DQS[0..7] +V_DDR_CPU_REF1
3 4 DDR_B_D4 R885 1 2 0_0402_5%
2.2U_0402_6.3V6M

DDR_B_D0 VSS2 DQ4 DDR_B_D5

5 6 8 DDR_B_MA[0..15]
0.1U_0402_10V6K
DDR_B_D1 DQ0 DQ5
1 1 7 DQ1 VSS3 8
9 10 DDR_B_DQS#0 @ R899 1 2 0_0402_5%
DDR_B_DM0 VSS4 DQS#0 DDR_B_DQS0
C221

C1059

11 DM0 DQS0 12
13 VSS5 VSS6 14
2 2 DDR_B_D2 DDR_B_D6
15 DQ2 DQ6 16
D DDR_B_D3 17 18 DDR_B_D7 D
DQ3 DQ7
19 VSS7 VSS8 20
DDR_B_D8 21 22 DDR_B_D12
DDR_B_D9 DQ8 DQ12 DDR_B_D13
23 DQ9 DQ13 24
25 VSS9 VSS10 26
DDR_B_DQS#1 27 28 DDR_B_DM1
DDR_B_DQS1 DQS#1 DM1 DRAMRST#
29 DQS1 RESET# 30 DRAMRST# 6,17
31 VSS11 VSS12 32
DDR_B_D10 33 34 DDR_B_D14
DDR_B_D11 DQ10 DQ14 DDR_B_D15
35 DQ11 DQ15 36
37 VSS13 VSS14 38
DDR_B_D16 39 40 DDR_B_D20 1
DDR_B_D17 DQ16 DQ20 DDR_B_D21 @
41 DQ17 DQ21 42
43 44 C1442 1103_Add 0.1uF for DRAMRST#.
DDR_B_DQS#2 VSS15 VSS16 DDR_B_DM2 0.1U_0402_16V4Z
45 DQS#2 DM2 46
DDR_B_DQS2 2
47 DQS2 VSS17 48
49 50 DDR_B_D22
DDR_B_D18 VSS18 DQ22 DDR_B_D23
51 DQ18 DQ23 52
DDR_B_D19 53 54
DQ19 VSS19 DDR_B_D28
55 VSS20 DQ28 56
DDR_B_D24 57 58 DDR_B_D29
DDR_B_D25 DQ24 DQ29
59 DQ25 VSS21 60
61 62 DDR_B_DQS#3
DDR_B_DM3 VSS22 DQS#3 DDR_B_DQS3
63 DM3 DQS3 64
65 VSS23 VSS24 66
DDR_B_D26 67 68 DDR_B_D30
DDR_B_D27 DQ26 DQ30 DDR_B_D31
69 DQ27 DQ31 70
71 VSS25 VSS26 72

8 DDR_CKE2_DIMMB DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB Layout Note:

C CKE0 CKE1 DDR_CKE3_DIMMB 8 C
75 VDD1 VDD2 76
77 NC1 A15 78 DDR_B_MA15 Place near JDIMM2
8 DDR_B_BS2 DDR_B_BS2 79 80 DDR_B_MA14
BA2 A14
81 VDD3 VDD4 82
DDR_B_MA12 83 84 DDR_B_MA11
DDR_B_MA9 A12/BC# A11 DDR_B_MA7
85 A9 A7 86
87 VDD5 VDD6 88
DDR_B_MA8 89 90 DDR_B_MA6
DDR_B_MA5 A8 A6 DDR_B_MA4 +1.5V
91 A5 A4 92
93 VDD7 VDD8 94
DDR_B_MA3 95 96 DDR_B_MA2
DDR_B_MA1 A3 A2 DDR_B_MA0
97 A1 A0 98
99 100

47P_0402_50V8J

47P_0402_50V8J

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
M_CLK_DDR2 VDD9 VDD10 M_CLK_DDR3
8 M_CLK_DDR2 101 CK0 CK1 102 M_CLK_DDR3 8 1 1 1 1 1 1 1 1 1 1 1 1

1
M_CLK_DDR#2 M_CLK_DDR#3

C46

C47
8 M_CLK_DDR#2 103 CK0# CK1# 104 M_CLK_DDR#3 8

C223

C224

C225

C226

C227

C228

C229

C230

C231

C232

C233

C234
105 VDD11 VDD12 106
DDR_B_MA10 107 108 DDR_B_BS1 @ @
DDR_B_BS1 8

2
DDR_B_BS0 A10/AP BA1 DDR_B_RAS# 2 2 @ 2 2 2 2 2 2 2 2 2 2
8 DDR_B_BS0 109 BA0 RAS# 110 DDR_B_RAS# 8
111 VDD13 VDD14 112
8 DDR_B_WE# DDR_B_WE# 113 114 DDR_CS2_DIMMB#
WE# S0# DDR_CS2_DIMMB# 8
8 DDR_B_CAS# DDR_B_CAS# 115 116 M_ODT2
CAS# ODT0 M_ODT2 8
117 VDD15 VDD16 118
DDR_B_MA13 119 120 M_ODT3
A13 ODT1 M_ODT3 8 +VREF_CA
8 DDR_CS3_DIMMB# DDR_CS3_DIMMB# 121 122
S1# NC2
123 VDD17 VDD18 124
125 126 +VREF_CA
NCTEST VREF_CA
127 VSS27 VSS28 128
DDR_B_D32 129 130 DDR_B_D36 Layout Note:

0.1U_0402_16V4Z
DQ32 DQ36

2.2U_0603_6.3V4Z
DDR_B_D33 131 132 DDR_B_D37 1 1
DQ33 DQ37 Place near JDIMM2.203 & JDIMM2.204
C235

C1060
133 VSS29 VSS30 134
DDR_B_DQS#4 135 136 DDR_B_DM4
DDR_B_DQS4 DQS#4 DM4
137 DQS4 VSS31 138
B DDR_B_D38 2 2 B
139 VSS32 DQ38 140
DDR_B_D34 141 142 DDR_B_D39
DDR_B_D35 DQ34 DQ39 +0.75VS
143 DQ35 VSS33 144
145 146 DDR_B_D44
DDR_B_D40 VSS34 DQ44 DDR_B_D45
147 DQ40 DQ45 148
DDR_B_D41 149 150
DQ41 VSS35 DDR_B_DQS#5
151 152

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
DDR_B_DM5 VSS36 DQS#5 DDR_B_DQS5
153 DM5 DQS5 154 1 1 1 1
155 VSS37 VSS38 156
DDR_B_D42 DDR_B_D46

C237

C238

C239

C240
157 DQ42 DQ46 158
DDR_B_D43 159 160 DDR_B_D47
DQ43 DQ47 2 2 2 2
161 VSS39 VSS40 162
DDR_B_D48 163 164 DDR_B_D52
DDR_B_D49 DQ48 DQ52 DDR_B_D53
165 DQ49 DQ53 166
167 VSS41 VSS42 168
DDR_B_DQS#6 169 170 DDR_B_DM6
DDR_B_DQS6 DQS#6 DM6
171 DQS6 VSS43 172
173 174 DDR_B_D54
DDR_B_D50 VSS44 DQ54 DDR_B_D55
175 DQ50 DQ55 176
DDR_B_D51 177 178
DQ51 VSS45 DDR_B_D60
179 VSS46 DQ60 180
DDR_B_D56 181 182 DDR_B_D61
DDR_B_D57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDR_B_DQS#7
DDR_B_DM7 VSS48 DQS#7 DDR_B_DQS7
187 DM7 DQS7 188
189 VSS49 VSS50 190
DDR_B_D58 191 192 DDR_B_D62
DDR_B_D59 DQ58 DQ62 DDR_B_D63
193 DQ59 DQ63 194
1 R210 2 195 VSS51 VSS52 196
10K_0402_5% 197 198 PM_EXTTS#1_R
SA0 EVENT# PM_EXTTS#1_R 6,17
199 200 SMB_DATA_S3
+3VS VDDSPD SDA SMB_DATA_S3 12,17,19,23
R211 201 202 SMB_CLK_S3
SMB_CLK_S3 12,17,19,23
2.2U_0402_6.3V6M

0.1U_0402_16V4Z

A SA1 SCL A
1 2 203 204
1 1
10K_0402_5%
VTT1 VTT2
0.65A@0.75V
+0.75VS
DDR3 SO-DIMM B
C241

C242

205 206
2 2
G1
+0.75VS
G2
REVERSE
CONN@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/03/13 Deciphered Date 2009/05/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII-SODIMM SLOT2
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 18 of 45
5 4 3 2 1
 5 4 3 2 1

+1.05VS_CK505 +1.05VS_CK505

+3VS_CK505
+3VS_CK505

+1.5VS_CK505 CLK_14M_PCH @ C808 1

80mA 2 10P_0402_50V8J
+1.5VS_CK505
U3
250mA SMB_CLK_S3
1 VDD_DOT SCL 32 SMB_CLK_S3 12,17,18,23
2 31 SMB_DATA_S3
VSS_DOT SDA SMB_DATA_S3 12,17,18,23
CLK_BUF_DOT96 R213 2 1 33_0402_5% L_CLK_BUF_DOT96 3 30 REF_0/CPU_SEL R222 2 1 33_0402_5% CLK_14M_PCH
12 CLK_BUF_DOT96 CLK_BUF_DOT96# DOT_96 REF_0/CPU_SEL CLK_14M_PCH 12
OK R214 2 33_0402_5% L_CLK_BUF_DOT96# 14M OK
DOT96 DOT_96# 96MHz
12 CLK_BUF_DOT96# 1 4 29
VDD_REF CLK_XTAL_IN
5 28
D VDD_27 XTAL_IN CLK_XTAL_OUT D
6 27
27MHZ XTAL_OUT @ R226 1
NC 7
27MHZ_SS VSS_REF
26 2 0_0402_5%
8 25 R_CKPWRGD R237 1 2 0_0402_5% CKPWRGD VGATE 13,40
VSS_27 CKPWRGD/PD#
9 24
CLK_DMI R221 1 33_0402_5% L_CLK_DMI VSS_SATA VDD_CPU L_CLK_BUF_BCLK R224 1
12 CLK_DMI 2 10
SRC_1/SATA CPU_0
23 2 33_0402_5% CLK_BUF_BCLK 12
OK CLK_DMI# R223 1 33_0402_5% L_CLK_DMI# L_CLK_BUF_BCLK# R225 1 2 33_0402_5% BCLK OK
DMI12 SRC_1#/SATA#100MHz 133MHz CPU_0#
CLK_DMI# 2 11 22 CLK_BUF_BCLK# 12
12 21
CLK_BUF_CKSSCD R219 1 33_0402_5% L_CLK_BUF_CKSSCD VSS_SRC VSS_CPU
12 CLK_BUF_CKSSCD 2 13
SRC_2 CPU_1
20
OK CLK_BUF_CKSSCD# R220 1 33_0402_5% L_CLK_BUF_CKSSCD#
CKSSCD SRC_2# 100MHz
12 CLK_BUF_CKSSCD# 2 14 19
CPU_1#
15 18
CPU_STOP# VDD_SRC_IO VDD_CPU_IO Near pin5 Near pin29
16 CPU_STOP# VDD_SRC 17

TGND
ICS9LRS3197AKLFT MLF_QFN32_5X5 +3VS_CK505

33
+3VS 1 2

10U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
Number of Clock Outputs R212
250mA 0_0805_5%

 is GND (for DELLHP)

1 1 1

C245

C247

C250
Output
133MHz
Number
2
SLG8SP585
SLG8SP587  pin8
pin8 is 48MHz (For ABO or 030)
2 2 2

SRC(100MHz_SS) 1
SRC/SATA(100MHz) 1 CLK_XTAL_OUT Place close to
CLK_XTAL_IN +3VS_CK505
REF(14.318MHz) 1 Y3 U3
1 2 +1.05VS_CK505

1
DOT_CLK(96MHz) 1 +VCCP
1 1 14.318MHZ_16PF_7A14300083
C R607 R218 C
27MHz 1 C259 C260 10K_0402_5% 1 2

10U_0805_10V4Z
22P_0402_50V8J 22P_0402_50V8J

0.1U_0402_16V4Z

0.1U_0402_16V4Z
0_0805_5% Routing the trace at
27MHz_SS 1 2 2
1019_Change C259/C260 from 18pF to 22pF. 1 1 1 least 10mil

C252

C253

C254
CKPWRGD
Vendor

1
D 2 2 2
PIN 30 CPU_0 CPU_1 suggests 22pF CLK_EN# 2
40 CLK_EN# G
+3VS_CK505 S Q30

3
0(default) 133MHz 133MHz 2N7002_SOT23-3

CPU_STOP# R234 1 2 10K_0402_5%

1 100MHz 100MHz

+1.5VS_CK505
CPU_SEL During CK_PEWGD Latch Pin1 R228
0_0603_5%
+3VS +3VS 1 2
@
R244 1 2 10K_0402_5% REF_0/CPU_SEL
+1.5VS 1 2
R247 1 2 10K_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
@ R229
@R229
0_0603_5% 1 1 1

C248

C246

C249
2 2 2

B B

Near pin1 Near pin17 Near pin24

SI Reserve low power clock generator solution

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Clock Generator CK505
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 19 of 45

5 4 3 2 1
 A B C D E

BLUE
GREEN
RED
Place close to
D6 D7 D8
JCRT1

1
1 +5VS +RCRT_VCC +CRTVDD 1

DAN217T146_SC59-3

DAN217T146_SC59-3

DAN217T146_SC59-3
D9 F1
2 1 1 2 W=40mils
CRT Connector RB491D_SC59-3 1.1A_6VDC_FUSE
1

3
+3VS
0.1U_0402_16V4Z
C266 2
JCRT1
6
11
RED 1
26 RED
7
12
GREEN 2
26 GREEN
8
13
26 D_HSYNC BLUE 3
26 BLUE
9
26 D_VSYNC 14
+5VS +5VS 4 16
10 17
C267 C268 15
0.1U_0402_16V4Z 0.1U_0402_16V4Z 5 +CRTVDD
1 2 1 2
SUYIN_070546FR015S263ZR
R815 2 1 10K_0402_5% CONN@ +3VS

+CRTVDD +CRTVDD
5
1

U5

1
SN74AHCT1G125GW_SOT353-5
OE#
P

1
2 CRT_HSYNC HSYNC_G_A R269 1 D_HSYNC 2
13 CRT_HSYNC 2 A Y 4 2 0_0603_5% R272 R273
R270 R271 2.2K_0402_5% 2.2K_0402_5%
G

5
1

4.7K_0402_5% 4.7K_0402_5%

2
OE#
P
3

2
CRT_VSYNC 2 4 VSYNC_G_A R274 1 2 0_0603_5% D_VSYNC
13 CRT_VSYNC

2
A Y D_DDCDATA I_DDCDATA
6 1 I_DDCDATA 13
G

U6 1 1
SN74AHCT1G125GW_SOT353-5 @ C269 @ C270
3

Q2A

5
5P_0402_50V8C 5P_0402_50V8C
2N7002DW-7-F_SOT363-6
2 2 D_DDCCLK 3 4 I_DDCCLK
I_DDCCLK 13

Q2B
2N7002DW-7-F_SOT363-6

D_DDCDATA 26
D_DDCCLK 26

3 3

CRT Termination/EMI Filter

M_RED L8 1 2 HLC0603CSCCR11JT_0603 RED
13 M_RED

M_GRN L9 1 2 HLC0603CSCCR11JT_0603 GREEN

13 M_GREEN

M_BLU L10 1 2 HLC0603CSCCR11JT_0603 BLUE

13 M_BLUE
22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J
1

1
150_0402_1%

150_0402_1%

150_0402_1%

1 1 1 1 1 1
C271

C272

C273

C274

C275

C276
R275

R276

R277

@ @ @
2 2 2 2 2 2
2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/28 Deciphered Date 2006/07/26 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 20 of 45
A B C D E
 5 4 3 2 1

LVDS CONN & USB Camera +

Dig Mic

D D

+LCDVDD +3VS
+LCDVDD +LCDVDD +5VALW Q13
SI2301BDS-T1-E3_SOT23-3

1
1 3

S
D
+LCDVDD R278 1
INVPWR_B+ 22_0603_5% R279
1 1
RF RF C281 C282 1M_0402_5% C280 1

G
2
4.7U_0805_10V4Z

6 2

2
request. request. 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 C283
2 2
680P_0402_50V7K

680P_0402_50V7K
47P_0402_50V8J

47P_0402_50V8J

4.7U_0805_10V4Z
2
1 1 1
1
C278

C279

R280
C319

C318

RF 2 2 1
2

2 2 2 request. 2N7002DW-7-F_SOT363-6 100K_0402_5%

1
JLVDS1 Q3A C284
1 2 LVDS_A2- 2
1 2 LVDS_A2+ LVDS_A2- 13 0.047U_0402_16V7K
3 3 4 4 LVDS_A2+ 13
LVDS_A1-

2N7002DW-7-F_SOT363-6
5 6 C302
5 6 LVDS_A1- 13

3
7 8 LVDS_A1+ 5P_0402_50V8C Limited Current < 1A
7 8 LVDS_A0- LVDS_A1+ 13 1
9 9 10 10 LVDS_A0- 13 @

Q3B
11 12 LVDS_A0+
USB20_P4 11 12 LVDS_ACLK- LVDS_A0+ 13 I_ENAVDD
14 USB20_P4 13 13 14 14 LVDS_ACLK- 13 13 I_ENAVDD 5
USB20_N4 15 16 LVDS_ACLK+
14 USB20_N4 15 16 LVDS_ACLK+ 13

1
17 18 1

4
+3VS 17 18 C303 R283
19 19 20 20
21 22 @ 100K_0402_5%
21 22 DMIC_DAT 5P_0402_50V8C
23 23 24 24 DMIC_DAT 27
C
25 26 DMIC_CLK 2 C
DMIC_CLK 27

2
25 26 +3V_LOGO R281
27 27 28 28 1 2 +5VS
29 30 LVDS_INV_PWM 100_0805_5%
29 30 BKOFF# LVDS_INV_PWM 13,31
31 31 32 32 BKOFF# 31
33 34 DAC_BRIG
33 34 DAC_BRIG 31
35 35 36 36 +USB_CAM
37 38 LVDS_EDID_CLK
37 38 LVDS_EDID_CLK 13
39 40 LVDS_EDID_DATA
39 40 LVDS_EDID_DATA 13
41 42
GND GND
ACES_88242-4001 LVDS_INV_PWM
CONN@ 2 BKOFF#

1 1

2
@ R202
C294 C286 2.2_0402_5%~D @ R282
680P_0402_50V7K 10K_0402_5%
2 2 680P_0402_50V7K
1

1
12P_0402_50V8J

B+ INVPWR_B+
1 @
D22 EMI request.
C321

+5VALW 4 2 USB20_P4
VIN IO1
USB20_N4 3 1 2
IO2 GND L12 1 2
PRTR5V0U2X_SOT143-4 FBMA-L11-201209-221LMA30T_0805
+3VS
RF
request.
RF
request.
2

B B
R284 R285
2.2K_0402_5% 2.2K_0402_5%
1

LVDS_EDID_CLK
LVDS_EDID_DATA

USB Camera +USB_CAM

+5VS
U7

1
RF
1 5 R286
request. IN OUT

47P_0402_50V8J
215K_0603_1%

10U_0805_6.3V6M
47P_0402_50V8J
2
R288 GND
1 1 1

C289

C981
0_0402_5% 3 4
SHDN BYP

C320
1

1
C290 G916-390T1UF_SOT23-5 @

1
2 10U_0805_6.3V6M R287 2 2
100K_0402_1%
2

2
+USB_CAM is +3.9VS, R286:215K; R287:100Kohm
A
+USB_CAM=1.25(1+R1091/R1093) A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/28 Deciphered Date 2006/07/26 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LCD CONN.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 21 of 45
5 4 3 2 1
 5 4 3 2 1

Parade Asmedia
ST 8101T 8171 1442 TI C2 TMDS_CLK
13 TMDSD_CLK 1 2 0.1U_0402_10V6K
R833 C4 2 0.1U_0402_10V6K TMDS_CLK# R832
X X X X X 13 TMDSD_CLK# 1
+3VS 1 2 +3VS_LS
+3VS_LS +3VS_LS

10U_0805_6.3V6M
0.01U_0402_16V7K

0.1U_0402_10V6K

0.1U_0402_10V6K
R837 0 ohm 0 ohm 4.7K ohm 0 ohm 0 ohm C6 TMDS_DATA0
13 TMDSD_DATA0 1 2 0.1U_0402_10V6K 0_0603_5%
C7 2 0.1U_0402_10V6K TMDS_DATA0# TMDS_DATA0# TMDS_DATA1
R836 X 4.7K ohm X X 4.7K ohm 13 TMDSD_DATA0# 1
TMDS_DATA0 TMDS_DATA1#
2 1 1 1

C1048

C1049

C1050

C1051
R840 4.7K ohm X 4.7K ohm 4.7K ohm X C8 TMDS_DATA1 TMDS_CLK# TMDS_DATA2
13 TMDSD_DATA1 1 2 0.1U_0402_10V6K
C9 1 2 0.1U_0402_10V6K TMDS_DATA1# TMDS_CLK TMDS_DATA2# 1 2 2 2
R838 X X 4.7K ohm X 4.7K ohm 13 TMDSD_DATA1#

R842 X X X X X C10 TMDS_DATA2 +3VS_LS

13 TMDSD_DATA2 1 2 0.1U_0402_10V6K
D C11 TMDS_DATA2# D
R849 3.9K ohm499 ohm 499 ohm 3.9K ohm4.3K ohm 13 TMDSD_DATA2# 1 2 0.1U_0402_10V6K

48

47

46

45

44

43

42

41

40

39

38

37
1
R850 @ R833 U47
0 ohm X X 0 ohm X +3VS_LS 4.7K_0402_5%

IN_D4-

IN_D3-

IN_D2-

IN_D1-
IN_D4+

IN_D3+

IN_D2+

IN_D1+
VCC3V

VCC3V
GND

GND
@ R834 2 1 4.7K_0402_5% +3VS_LS
C1052 X X 2.2uF X X +3VS_LS

1
R853 0 ohm 0 ohm X 0 ohm 0 ohm R837 @ R835 2 1 4.7K_0402_5% +3VS_LS

2
@ R836 1 2 1 36
GND GND

1
R855 4.7K_0402_5% 0_0402_5%
X X 4.7K ohm X X @ R838
@R838 R839 2
+3VS_LS 2 35 1 0_0402_5%
4.7K_0402_5% R840 VCC3V FUNCTION4
R857 X X 4.7K ohm X X

2
1 2 3 FUNCTION1
PC0 FUNCTION3 34 R841 2 1 0_0402_5%
+3VS_LS @ R842 4.7K_0402_5%
R858 0 ohm 0 ohm X 0 ohm 0 ohm

2
1 2 4 PC1 33 R843 2 1 0_0402_5% +3VS_LS
0_0402_5% +3VS_LS FUCNTION2 VCC3V @ R844 0_0402_5%
R851 X X 4.7K ohm X X R849 R845
2 1
4.7K_0402_5%
5 GND DDC_EN 32 2 1 +3VS_LS

1
R854 0 ohm 0 ohm X 3.9K_0402_1% @ R846 2 1 0_0402_5%
0 ohm 0 ohm R847 R848 @R801
@ R801 2 1 6 31
2.2K_0402_5% 2.2K_0402_5% 10K_0402_5% ANALOG1(REXT) GND
R843 0 ohm 0 ohm X 0 ohm 0 ohm TMDS_B_HPD HDMI_DETECT
7 HPD_SOURCE HPD_SINK 30
R844 X X 4.7K ohm X X

2
8 29 HDMIDAT +3VS_LS
13 HDMID_CTRLDATA SDA_SOURCE SDA_SINK
R839 0 ohm X 4.7K ohm 0 ohm 0 ohm HDMICLK
9 SCL_SOURCE SCL_SINK 28
13 HDMID_CTRLCLK

1
R834 X X X X X R850 1 2 0_0402_5% 10 ANALOG2 GND 27 @ R851 2 14.7K_0402_5% +3VS_LS R852
R841 0 ohm X X 0 ohm 0 ohm 10K_0402_5%
1 2 +3VS_LS R853 1 2 0_0402_5% 11 26 +3VS_LS R854 1 2 0_0402_5%
@C1052
@C1052 VCC3V VCC3V
R835 X X 4.7K ohm X X

2
2.2U_0603_6.3V4Z @ R855 1 2 4.7K_0402_5% 12 25 R856 2 1 0_0402_5%
GND OE*
C667 0.1uF 1uF 1uF 0.1uF 1uF

OUT_D4+

OUT_D3+

OUT_D2+

OUT_D1+
OUT_D4-

OUT_D3-

OUT_D2-

OUT_D1-
49

VCC3V

VCC3V
C thm_pad C
R862 V X X X X

GND

GND

1
@ R857 1 D
+3VS_LS 2 4.7K_0402_5%
HDMI_DETECT
R867 V X X X X R859
2
1 2 0_0402_5% R858 1 2 0_0402_5% ASM1442 QFN 48P HDMI SHIFTER G

13

14

15

16

17

18

19

20

21

22

23

24
S

3
WCM-2012-900T_0805 Q31
HDMICLK- 1 1 HDMI_R_CLK- 2N7002_SOT23-3
2 2
EQUALIZATION SETTING: HDMI_TX_0- +3VS_LS
HDMICLK+ 4 3 HDMI_R_CLK+ @C1053
@C1053 @R860
@ R860 @ R861 @C1054
@C1054
[PC1,PC0]=00,8dB
@ 4 3 HDMICLK+ 1 2 1 2 HDMI_TX_0+
[PC1,PC0]=01,4dB (Recommanded)

1
L28 68_0402_5% 68_0402_5% @
[PC1,PC0]=10,12dB R866 1 2 HDMICLK- 0.5P_0402_50V8B +3VS_LS +3VS_LS 0.5P_0402_50V8B R862
[PC1,PC0]=11,0dB 0_0402_5% 20K_0402_5%
HDMI_TX_1-
R868 1 2 0_0402_5% @C1055
@C1055 @R863
@ R863 @ R864 @C1056
@C1056 R865

2
HDMI_TX_2+ 1 2 1 2 HDMI_TX_1+ 2 1 TMDS_B_HPD
WCM-2012-900T_0805 13 TMDS_B_HPD#
68_0402_5% 68_0402_5%

1
HDMI_TX_0- 1 2 HDMI_R_TX0- HDMI_TX_2- 0.5P_0402_50V8B 0.5P_0402_50V8B 0_0402_5%
1 2 @
R867
HDMI_TX_0+ 4 3 HDMI_R_TX0+ 7.5K_0402_1%
@ 4 3

2
L29
R869 1 2
0_0402_5%

R870 1 2 0_0402_5%
+5VS +5VS_HDMI
WCM-2012-900T_0805

HDMI Connector

22N_0402_16V7K
HDMI_TX_1- 1 2 HDMI_R_TX1-
1 2
B B
1
HDMI_TX_1+ 4 3 HDMI_R_TX1+
@ 4 3

C665
L30
R871 D34 @ 2
1 2
0_0402_5% RB411DT146_SOT23-3

1
R872 1 2 0_0402_5%
+5VS_HDMI
WCM-2012-900T_0805

22N_0402_16V7K

0.1U_0402_16V4Z
HDMI_TX_2- 1 2 HDMI_R_TX2- 1 1
1 2

1.5K_0402_5%

1.5K_0402_5%

C666

C667
2

2
HDMI_TX_2+ 4 3 HDMI_R_TX2+
@ 4 3 @ 2 2
L31

R577

R578
R873 1 2
0_0402_5%

1
JHDMI1
18
L32 HDMIDAT +5V
16 13
R579 FBML10160808121LMT_0603HDMICLK SDA CEC
15 14
HDMI_DETECT HDMI_HPD SCL Reserved
1 2 1 2 19
HP_DET
2
10K_0402_1% HDMI_R_CLK- GND
1 12 5
CK- GND

1
HDMI_R_CLK+ 10 8
C668 HDMI_R_TX0- CK+ GND
9 11
D35 R580 330P_0402_50V7K HDMI_R_TX0+ D0- GND
7 20
SKS10-04AT_TSMA 100K_0402_1% 2 HDMI_R_TX1- D0+ GND
6 21
HDMI_R_TX1+ D1- GND
4 22

2
HDMI_R_TX2- D1+ GND
3 D2- GND 23
A HDMI_R_TX2+ A
1 D2+ DDC/CEC_GND 17

SUYIN_100042MR019S153ZL
CONN@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI LS & Conn.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 22 of 45
5 4 3 2 1
 5 4 3 2 1

HDD Connector
JP3

1 +3VS_ACL
GND
A+
A-
2
3
SATA_TXP0
SATA_TXN0 SATA_TXP0 11
SATA_TXN0 11
ACCELEROMETER (ST)

10U_0805_6.3V6M
0.1U_0402_16V4Z
4
GND SATA_RXN0 C466 2 SATA_RXN0_C
B-
5 1 0.01U_0402_50V7K SATA_RXN0_C 11
D SATA_RXP0 C467 2 SATA_RXP0_C D
B+
6 1 0.01U_0402_50V7K SATA_RXP0_C 11 1 1
+3VS +3VS_ACL +3VS_ACL_IO

C468

C469
7 PA@
GND PA@ PA@
Near CONN side. PA@
D10 2 2
8 R364
V33 +3VS
9 2 1 1 2
V33 0_0603_5%
10
V33
GND
11
RB751V_SOD323 0.4mA
GND
12 Pleace near HDD CONN (JP3)
13 +5VS
GND
14
V5 +5VS
V5 15

10U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
V5 16
GND 17 1 1 1 1

C462

C463

C464

C465
Reserved 18
19 SMB_CLK_S3
GND SMB_CLK_S3 12,17,18,19
V12 20
2 2 2 2 PA@
21 0011101b

14
V12 U15
V12 22 VDDIO absolute man

SCL / SPC
SUYIN_127072FR022G523_RV
rating is VDD+0.1
CONN@
1 13 SMB_DATA_S3
+3VS_ACL_IO Vdd_IO SDA / SDI / SDO SMB_DATA_S3 12,17,18,19
PA@ PA@
R366 2 GND SDO 12 R367
1 2 3 Reserved Reserved 11 1 2

0_0402_5% 4 10 0_0402_5%
GND GND

C CD-ROM Connector 5 GND INT 2 9

C

+3VS_ACL 6 Vdd INT 1 8 ACCEL_INT 14

JP5

CS
13 HP302DLTR8_LGA14_3x5

7
GND SATA_TXP1
12 SATA_TXP1 11
A+ SATA_TXN1
11 SATA_TXN1 11
A- OPP@ R368 2 PA@
10 1
GND SATA_RXN1 C473 2 SATA_RXN1_C
B-
9 1 0.01U_0402_50V7K SATA_RXN1_C 11
10K_0402_5%
8 SATA_RXP1 C474 2 1 0.01U_0402_50V7K SATA_RXP1_C Must be placed in the center of the system.
B+ SATA_RXP1_C 11
7 OPP@ Placea caps. near ODD
GND +5VS
Near CONN side. CONN.
6
DP
5
V5

1U_0603_10V4Z

10U_0805_10V4Z

10U_0805_10V4Z
4 +5VS 0.1U_0402_16V4Z
V5
3 1 1 1 1
MD
C475

C476

C477

C478
2
GND
1
GND
2 2 2 2
SUYIN_127382FR013GX09ZR
CONN@
OPP@ OPP@ OPP@ OPP@

B B

Multi Bay
+5VS
Placea caps. near Multi
+5VS
JP12 Bay CONN.
2 1
VCC5 GND
150U_B_6.3VM_R40M

4 3 SATA_TXP5
VCC5 TX+ SATA_TXP5 11
6 5 SATA_TXN5
VCC5 TX- SATA_TXN5 11
220U_B_2.5VM_R15M
1U_0603_10V4Z

10U_0805_10V4Z

10U_0805_10V4Z
0.1U_0402_16V4Z

8 7 PA@ PA@ PA@ 1 1

VCC3 GND SATA_RXN5 C255 2 SATA_RXN5_C PA@ 1 PA@ 1 PA@
10 9 1 SATA_RXN5_C 11 1 1
VCC3 RX-
C1432

12 11 SATA_RXP5 C256 2 1 SATA_RXP5_C C261 C262 C263 C264 C265 + +

VCC3 RX+ SATA_RXP5_C 11
14 13 PA@
GND GND @
16 15
GND GND 0.01U_0402_16V7K 2 2 2 2 2 2
18 17 0.01U_0402_16V7K
GND GND
20 19
G2 G1

CONN@
TYCO_2023087-3

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD & CDROM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 23 of 45
5 4 3 2 1
 A B C D E

Mini Card 0--TV SIM card Connector

tuner/WWAN/Robson JP4 Mini Card
1

+3VALW +3VS_WWAN
UIM_PWR
UIM_DATA
UIM_CLK
2
3
4
1
2
3
2---WLAN +3VS_WLAN +3VALW +1.5VS_WLAN

RW26 UIM_RST 4 0.1U_0402_16V4Z 0.01U_0402_16V7K 4.7U_0805_10V4Z

+1.5VS +1.5VS_WWAN 5 5

0.1U_0402_16V4Z
0.01U_0402_16V7K 4.7U_0805_10V4Z 1 2 0_0805_5% UIM_VPP 6 8 1
6 G1 CW1 RW1 1 0_0805_5%
7 7 G2 9 1 1 1 1 1 +1.5VS 2 +1.5VS_WLAN
1 1 1 0.1U_0402_16V4Z CW2 CW3 1 CW4 CW5 CW6
0.1U_0402_16V4Z

1 1 1 1 CW14 CW12 CW13 ACES_88266-07001 CW19

CW7 CW8 CW9 CW10 CONN@ 2
@ 47P_0402_50V8J 2 2 47P_0402_50V8J 2 2 2 RW2 1 2 0_0805_5%
1 2 2 2 2 +3VS +3VS_WLAN 1
RF 4.7U_0805_10V4Z RF
2 2 2 2 0.01U_0402_16V7K 0.1U_0402_16V4Z
request. request.
0.1U_0402_16V4Z RF
+3VS_WWAN +3VS_WWAN @
request.
JP6 39P_0402_50V8J 39P_0402_50V8J
ICH_PCIE_WAKE# 1 2 1 1 1 1 JP7
1 2 ICH_PCIE_WAKE#
3 4 1 2 +3VS_WLAN
3 4 @ @ @ 1 2
5 6 +1.5VS_WWAN 3 4
CLKREQ_WWAN# 5 6 UIM_PWR CW15 CW16 CW17 CW18 3 4
12 CLKREQ_WWAN# 7 8 5 6 +1.5VS_WLAN
7 8 UIM_DATA 2 2 2 2 CLKREQ_WLAN# 5 6 RW3 0_0402_5% DEBUG@
9 9 10 10 12 CLKREQ_WLAN# 7 7 8 8 1 2 LPC_FRAME# 11,31
CLK_PCIE_WWAN# 11 12 UIM_CLK 9 10 RW4 1 2 0_0402_5% DEBUG@
12 CLK_PCIE_WWAN# 11 12 9 10 LPC_AD3 11,31
CLK_PCIE_WWAN 13 14 UIM_RST CLK_PCIE_WLAN# 11 12 RW5 1 2 0_0402_5% DEBUG@
12 CLK_PCIE_WWAN 13 14 UIM_VPP 12 CLK_PCIE_WLAN# CLK_PCIE_WLAN 11 12 LPC_AD2 11,31
15 16 47P_0402_50V8J 39P_0402_50V8J 13 14 RW6 1 2 0_0402_5% DEBUG@
15 16 12 CLK_PCIE_WLAN 13 14 LPC_AD1 11,31
17 18 15 16 RW7 1 2 0_0402_5% DEBUG@
17 18 M_WXMIT_OFF# PLT_RST# 15 16 LPC_AD0 11,31
19 19 20 20 17 17 18 18
0_0402_5% 21 22 PLT_RST# 19 20 XMIT_OFF#
21 22 14 CLK_DEBUG_PORT_1 19 20
12 PCIE_RXN1 RW8 1 2 PCIE_C_RXN1 23 23 24 24 @RW9
@ RW9 1 2 0_0805_5% +3VALW 21 21 22 22 PLT_RST#
12 PCIE_RXP1 1 2 PCIE_C_RXP1 25 26 RW11 1 2 0_0805_5% +3VS_WWAN 12 PCIE_RXN2 RW12 1 2 0_0402_5% PCIE_C_RXN2 23 24 @RW13
@ RW13 1 2 0_0805_5% +3VALW
RW10 0_0402_5% 25 26 RW14 1 PCIE_C_RXP2 23 24
27 27 28 28 +1.5VS_WWAN 12 PCIE_RXP2 2 0_0402_5% 25 25 26 26 RW15 1 2 0_0805_5% +3VS_WLAN
29 30 SMBCLK 27 28
29 30 27 28 +1.5VS_WLAN
PCIE_TXN1 31 32 SMBDATA 29 30 SMBCLK
12 PCIE_TXN1 PCIE_TXP1 31 32 PCIE_TXN2 29 30 SMBDATA
33 33 34 34 12 PCIE_TXN2 31 31 32 32
12 PCIE_TXP1 PCIE_TXP2
35 35 36 36 USB20_N8 14 33 33 34 34
WWAN_DETECT# 12 PCIE_TXP2
14 WWAN_DETECT# 37 37 38 38 USB20_P8 14 35 35 36 36 USB20_N5 14
+3VS_WWAN 1 2 39 40 37 38 USB20_P5 14
RW17 0_0603_5% 39 40 37 38
41 41 42 42 WW_LED# 32 39 39 40 40
43 43 44 44 +3VS_WLAN 41 41 42 42
45 45 46 46 43 43 44 44 WL_LED# 32
47 47 48 48 +1.5VS_WWAN 45 45 46 46
49 49 50 50 47 47 48 48 +1.5VS_WLAN
2 RW25 2
51 51 52 52 +3VS_WWAN 1 2 33_0402_5% 49 49 50 50
31 EC_UTX RW27 1 2 33_0402_5% 51 52 +3VS_WLAN
31 EC_URX 51 52
53 GND1 GND2 54
53 GND1 GND2 54
@ RW19
FOX_AS0B226-S40N-7F UIM_PWR 1 2 UIM_DATA
CONN@ 47K_0402_5% FOX_AS0B226-S40N-7F RF
CONN@ +3VS_WLAN
+3VS_WWAN request.
39P_0402_50V8J 39P_0402_50V8J
@ RW22 1 1 1 1
1 2
0_0603_5% @ @ @
DW1 +3VS
@ CW20 CW21 CW22 CW23
1 2 M_WXMIT_OFF# RW23 UIM_CLK 2 2 2 2
14 WXMIT_OFF# DW2
S

3 1 1 2
D

+3VALW 1
0_1206_5% CW11 @ 1 2 XMIT_OFF#
RB751V_SOD323 14 XMIT_OFF
QW1 18P_0402_50V8J 47P_0402_50V8J 39P_0402_50V8J
SI2305ADS-T1-GE3_SOT23-3
G
2

2 RB751V_SOD323
31 WWAN_POWER_OFF

Near to Express Card slot.

Close to
3 New Card JEXP +3VS_PEC 3
JEXP1
Express Card PA@ 1
PA@ +1.5VS R1108 USB9- GND
Power Switch 14 USB20_N9 1 2 0_0402_5% 2 1 1
C1308 R1109 USB9+ USB_D-
14 USB20_P9 1 PA@ 2 0_0402_5% 3 PA@ PA@
CPPE# USB_D+
1 2 0.1U_0402_16V4Z U53 4 C1309 C1310
CPUSB# 0.1U_0402_16V4Z 4.7U_0805_10V4Z
12 11 +1.5VS_PEC 5
+3VS 1.5Vin 1.5Vout RSV 2 2
14 13 6
1.5Vin 1.5Vout SMBCLK RSV
12 SMBCLK 7
PA@ SMBDATA SMB_CLK
12 SMBDATA 8
C1311 1 SMB_DATA
2 0.1U_0402_16V4Z 2 3 +3VS_PEC +1.5VS_PEC 9
PA@ 3.3Vin 3.3Vout R1110 PA@ +1.5V +1.5VS_PEC
4 5 +1.5VS_PEC 10
C1312 1 3.3Vin 3.3Vout PCIE_PME#_R +1.5V
2 0.1U_0402_16V4Z 13,25 ICH_PCIE_WAKE# 1 2 11
0_0402_5% WAKE#
+3VALW 17 15 +3V_PEC 12
AUX_IN AUX_OUT +3V_PEC PERST# +3.3VAUX
13 1 1
PLT_RST# PERST# PA@ PA@
14,25 PLT_RST# 6 19 +3VS_PEC 14
SYSRST# OC# +3.3V C1313 C1314
15
SYSON PERST# CLKREQ_EXP# +3.3V 0.1U_0402_16V4Z 4.7U_0805_10V4Z
31,32,33,37 SYSON 20 8 12 CLKREQ_EXP# 16
SHDN# PERST# CPPE# CLKREQ# 2 2
17
SUSP# CLK_PCIE_EXP# CPPE#
27,31,33,35,38,39 SUSP# 1 16 12 CLK_PCIE_EXP# 18
STBY# NC CLK_PCIE_EXP REFCLK-
12 CLK_PCIE_EXP 19
@ R1111 1 REFCLK+
+3VALW 2 100K_0402_5% 10 7 20
CPPE# GND PCIE_RXN4 GND
12 PCIE_RXN4 21
CPPE# PCIE_RXP4 PERn0
14 EXP_CPPE# 1 2 9 12 PCIE_RXP4 22
0_0402_5% CPUSB# PERp0
23
PA@ R1210 PCIE_TXN4 GND +3V_PEC
18 12 PCIE_TXN4 24
RCLKEN PCIE_TXP4 PETn0
12 PCIE_TXP4 25
PETp0
G577NSR91U_TQFN 20P 26
GND
27 29 PA@ 1 1 PA@
PA@ GND GND C1315 C1316
28 30
4 internal pull high to 3.3Vaux-in GND GND 0.1U_0402_16V4Z 4.7U_0805_10V4Z 4
SANTA_130801-5_LT
EC need setting at Hi-Z & output Low CONN@ 2 2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/28 Deciphered Date 2006/07/26 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WLAN, WWAN, New Card
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 24 of 45
A B C D E
 5 4 3 2 1

RTL8401 Combo(LAN + Card reader) +HV33 LAN Conn.

+DVDD33 JRJ45
RL2 +3V_LAN 13
300_0402_5% Yellow LED+
LAN_ACTIVITY# LANLED_ACT#

27

34
2 1 14 Yellow LED-
U9 1 16
C1261 1 SHLD1
2 27P_0402_50V8J CL13 8

HV33

DVDD3
0.1U_0402_16V4Z PR4-
DETECT PIN1 9

2
7 PR4+
ICH_PCIE_WAKE# XTAL1 Y8 2
13,24 ICH_PCIE_WAKE# 35 LANWAKEBPIN CKXTAL1 23
ISOLATEB 36 24 XTAL2 25MHz_20pF_6X25000017 26 RJ45_MIDI1- RJ45_MIDI1- 6
D CLK_PCIE_LAN ISOLATEBPIN CKXTAL2 PR2- D
12 CLK_PCIE_LAN 17

1
CLK_PCIE_LAN# REFCLK_P C1260 1
12 CLK_PCIE_LAN# 18 REFCLK_M 2 27P_0402_50V8J 5 PR3-
12 PCIE_RXP3 PCIE_RXP3 C1265 1 2 0.1U_0402_16V7K PCIE_PTX_IRX_P3_R 20 25 RSET/AVDD 2 1
PCIE_RXN3 C1264 HSOP IBREF(REST)
12 PCIE_RXN3 1 2 0.1U_0402_16V7K PCIE_PTX_IRX_N3_R 21 HSON
R1044 4 PR3+
12 PCIE_TXP3 PCIE_TXP3 15 2.49K_0402_1%
PCIE_TXN3 HSIP XDCE#_SDD1 RJ45_MIDI1+
12 PCIE_TXN3 16 HSIN XD_CE#/SD_D1 1 26 RJ45_MIDI1+ 3 PR2+
14,24 PLT_RST# PLT_RST# 37 8401 2 XDCLE_SDD0
CLKREQ_LAN# PERSTBPIN XD_CLE/SD_D0/MS_D7 XDALE_SDD7_MSD3 RJ45_MIDI0-
12 CLKREQ_LAN# 38 CLKREQBPIN XD_ALE/SD_D7/MS_D3 3 26 RJ45_MIDI0- 2 PR1-
4 XDWE#_SDCD# 10
XD_WE#/SD_CD# XDWP#_SDD6 RJ45_MIDI0+ DETCET PIN2
XD_WP#/SD_D6/MS_D6 5 2 26 RJ45_MIDI0+ 1 PR1+
LAN_ACTIVITY# 43 6 SD_CLK 1 R1179 20_0402_5% XDD0_SDCLK_MSD2 CL14 15
LAN_SK_LAN_LINK# LEDPIN0 XD_D0/SD_CLK/MS_D2 XDD1_SDD5_MSD0 0.1U_0402_16V4Z SHLD1
42 LEDPIN1/EESK XD_D1/SD_D5/MS_D0 7 +3V_LAN 11 Green LED+
LED2/EEDI 41 8 XDD2_SDCMD
CR_LED# LEDPIN2/EEDI XD_D2/SD_CMD XDD3_SDD4_MSD4 LAN_SK_LAN_LINK# 1 LANLED_LINK#
40 LEDPIN3/EEDO XD_D3/SD_D4/MS_D4 9 2 1 12 Green LED-
EECS 39 10 XDD4_SDD3_MSD1
EECSPIN XD_D4/SD_D3/MS_D1 XDD5_SDD2_MS_D5 RL4 FOX_JM36113-P1122-7F
XD_D5/SD_D2/MS_D5 11
+3VS 12 XDD6_MSBS 300_0402_5% CONN@
LAN_MDI0+ XD_D6/MS_BS XD_D7 LANLED_ACT#
28 MDIP0 XD_D7 13
LAN_MDI0- 29 46 XD_CD# LANGND
LAN_MDI1+ MDIN0 XD_CD# MS_CLK
31 MDIP1 XD_RDY/SD_WP#/MS_CLK 47 1 R1178 2 0_0402_5% XDDRY_SDWP_MSCLK LANLED_LINK# 1 1
1

LAN_MDI1- 32 48 XDRE#_MSINS# CL17 CL18

R1047 MDIN1 XD_RE#/MS_INS#

2
1K_0402_5% +VCC_4IN1_R 0.1U_0402_16V4Z 4.7U_0805_10V4Z
+EVDD 2 2
EVDD3 14
44 R1033 2 1 0_0603_5% +VCC_4IN1 D59
2 2

CARD_3V3

GND(GPO)
ISOLATEB 45 +D3V3 C322 1 2 0.1U_0402_16V4Z @ PACDN042_SOT23~D
VDD3_IN +EVDD12_8401 @ R823 1
19 2 0_0805_5%

GNDTX
VDDTX +3VALW

EPAD
R1048 33 CTRL12 C1272 1 2 0.1U_0402_16V4Z

1
CTRL12D CTRL12A C1258
15K_0402_5% CTRL12A 26 1 2 0.1U_0402_16V4Z 80 mils
1

49

22

30

S
EECS @ R1046 1 2 1K_0402_5% RTL8401-GR_QFN48_6X6 3

D
1 +3V_LAN
C C

100K_0402_5%

0.1U_0402_16V4Z
2
2
LED2/EEDI R1049 2 1 3.6K_0402_5%

R824

C485

G
+3V_LAN

2
Q15
@ @ SI2301BDS-T1-E3_SOT23-3
1

1
31 LAN_POWER_OFF R382 1 2 0_0402_5%
+EVDD12_8401 close pin 19 R1034 R1043
+3V_LAN 2 1 +HV33 close pin 27 +3V_LAN 2 1 +EVDD close pin 14
1 1
1U_0402_6.3V6K
0.1U_0402_16V4Z

0_0402_5% 0_0402_5%
C1273

C1274

1 1 1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
R369
C1250

C1251

C1259
300_0402_5%
2 2 LANLED_ACT# 1 2
2 2 2
1
C480
0.1U_0402_16V4Z

R1036 R1045 2
+3V_LAN 2 1 +D3V3 close pin 45 +3V_LAN 2 1 +DVDD33 close pin 34
0_0402_5% 1 1 0_0402_5% 1 1
DL2
1U_0402_6.3V6K
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C1253

C1254

C1262

C1263
+5VS RL16 1 2 1.2K_0402_5% 2 1 CR_LED#
2 2 2 2
HT-F196BP5_WHITE
White

B B

Card Reader Connector

10/100 Transformer
JREAD1
+VCC_4IN1 3 21 +VCC_4IN1 U17
XD-VCC SD-VCC
MS-VCC 28
XDD0_SDCLK_MSD2 32 LAN_MDI0+ 1 16 RJ45_MIDI0+
XDD1_SDD5_MSD0 XD-D0 XDD0_SDCLK_MSD2 LAN_MDI0- RD+ RX+ RJ45_MIDI0- R822
10 7 IN 1 CONN 20 2 15
10U_0805_6.3V6M

XDD2_SDCMD XD-D1 SD_CLK XDCLE_SDD0 C1042 1 RD- RX-

9 14 1 1 1 1 2 0.01U_0402_16V7K LAN_CT0 3 14 RJ45_CT0 75_0402_1%
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

XDD3_SDD4_MSD4 XD-D2 SD-DAT0 XDCE#_SDD1 CT CT C1041 1 2 0.01U_0603_100V7-M RJ45_CT0_C

C1062

8 XD-D3 SD-DAT1 12 4 NC NC 13 1 2
XDD4_SDD3_MSD1 XDD5_SDD2_MS_D5 C1039 1 2 0.01U_0603_100V7-M RJ45_CT1_C RJ45_GND
C323

C324

C325

7 XD-D4 SD-DAT2 30 5 NC NC 12 1 2
XDD5_SDD2_MS_D5 6 29 XDD4_SDD3_MSD1 C1046 1 2 0.01U_0402_16V7K LAN_CT1 6 11 RJ45_CT1
XDD6_MSBS XD-D5 SD-DAT3 XDD3_SDD4_MSD4 2 2 2 2 LAN_MDI1+ CT CT RJ45_MIDI1+ R821
5 XD-D6 SD-DAT4 27 7 TD+ TX+ 10 1
XD_D7 4 23 XDD1_SDD5_MSD0 LAN_MDI1- 8 9 RJ45_MIDI1- 75_0402_1% C1045
XD-D7 SD-DAT5 XDWP#_SDD6 TD- TX-
SD-DAT6 18
XDWE#_SDCD# 34 16 XDALE_SDD7_MSD3 1000P_1206_2KV7K
XDWP#_SDD6 XD-WE SD-DAT7 XDD2_SDCMD NS681680 2
33 XD-WP SD-CMD 25
XDALE_SDD7_MSD3 35 1 XDWE#_SDCD#
XD_CD# XD-ALE SD-CD-SW
40 XD-CD
XDDRY_SDWP_MSCLK39 2 XDDRY_SDWP_MSCLK
XDRE#_MSINS# XD-R/B SD-WP-SW
38 XD-RE
XDCE#_SDD1 37
A XDCLE_SDD0 XD-CE XDDRY_SDWP_MSCLK A
36 XD-CLE MS-SCLK 26
17 XDD1_SDD5_MSD0
MS-DATA0 XDD4_SDD3_MSD1
11 7IN1 GND MS-DATA1 15
31 19 XDD0_SDCLK_MSD2
7IN1 GND MS-DATA2 XDALE_SDD7_MSD3
MS-DATA3 24
22 XDRE#_MSINS#
MS-INS XDD6_MSBS
MS-BS 13
41
42
7IN1 GND
7IN1 GND
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/28 Deciphered Date 2006/10/06 Title
TAITW_R015-B10-LM
CONN@ THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB CardReader&CONN
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 25 of 45
5 4 3 2 1
 Atlas/ Saturn Dock

JDOCK1 +3VS
DOCK_PWR_ON Spec
0V = Notebook S4/S5, 20 RED
RED
GREEN
38
CRT_Red Digital gnd
39
20 GREEN 40 37
CRT_Green TV Luma

1
Dock off 20 BLUE
BLUE 34
CRT_Blue TV chroma
35 R1185 R1186
D_DDCDATA 36 33 10K_0402_5%
2.5V = Notebook S3, 20
20
D_DDCDATA
D_DDCCLK
D_DDCCLK 30
DDC_DATA TV composite
31 VGA_GND 10K_0402_5%
D_HSYNC DDC_Clock TV ground CIR_IN
32 29
Dock on 20 D_HSYNC D_VSYNC 26
Hsync CIR input
27 DOCK_PWRON CIR_IN 28,31
20 D_VSYNC

2
USB20_N3 Vsync PWR_ON D_MUTE_LED
4V = Notebook S0, 14 USB20_N3
USB20_P3
28
USB- Mute_LED
25
D_DOCK_SLP_BTN#
R1089 1 PA@
R1090 1 PA@
2 33_0402_5% MUTE_LED 31
14 USB20_P3 22
USB+ Sleep Botton
23 2 33_0402_5% DOCK_SLP_BTN# 31
Dock on 24
Digital gnd Jack Detect
21 JACK_DET#
JACK_DET# 27
PA@ 18 19 R_VOL_UP# R1091 1 PA@ 2 200_0402_5% DOCK_VOL_UP# DOCK_VOL_UP# 31
D45 MDI3- VOL_up R_VOL_DWN# R1092 1 PA@ DOCK_VOL_DWN#
20 17 2 200_0402_5% DOCK_VOL_DWN# 31
R1093 1 PA@ MDI3+ VOL_down SPDIFO_L
+5VS 2 1K_0402_5% 2 14 MD2I- SPDIF 15
1 DOCK_PWRON 16 13 AUDIO_OGND GNDA
R1094 1 RJ45_MIDI1- MDI2+ Audio Output gnd DOCK_LOUT_C_R
+3VALW 2 1K_0402_5% 3 25 RJ45_MIDI1- 10 MDI1- Right headphone 11 DOCK_LOUT_C_R 27
PA@ RJ45_MIDI1+ 12 9 DOCK_LOUT_C_L
25 RJ45_MIDI1+ MDI1+ Left headphone DOCK_LOUT_C_L 27
DAN202U_SC70 RJ45_MIDI0- 6 7 DOCK_MIC_R_C
25 RJ45_MIDI0- RJ45_MIDI0+ MDI0- Mic_Right DOCK_MIC_L_C
25 RJ45_MIDI0+ 8 MDI0+ Mic_Left 5
1

2 3 AUDIO_IGND GNDA
Battery out Mic gnd
1

D PA@ +V_BATTERY DOCK_PRESENT R1096 1

4 Battery out Dock_present 1 2 2K_0402_5%
2 R1095 @
33,39 SYSON# PJP902 +DOCKVIN
G 10K_0402_5% @ 41
PA@Q89 GND
S B+ 1 2 42
3

2N7002_SOT23-3 GND
45 GND GND 43
46 44 +DOCKVIN
PAD-OPEN 2x2m GND GND
C1296 1 2
CONN@ FOX_QL1122L-H212AR-7F @ 1000P_0402_50V7K
1 PA@
C1297 1 2
@ 1000P_0402_50V7K C1298
1000P_0402_50V7K
2

GNDA
Dock +3VL

PRESENT
2

R1097
10K_0402_5%
MIC_Dock R_VOL_UP# DOCK_LOUT_C_R
1

R_VOL_DWN# DOCK_LOUT_C_L
31 CONA#
Need 600 Ohm 500 mA 1 1

1000P_0402_50V7K

1000P_0402_50V7K

0.01U_0402_16V7K

0.01U_0402_16V7K
PA@ PA@
1

R1098 PA@ PA@ D

1 1
DOCK_PRESENT 1 2 2 L64 PA@ PA@ C1299 C1300
G Q90 FBM-11-160808-601-T_0603 PA@ 2 2
22_0402_5% S DMN5L06K-7_SOT23-3 27 DOCK_MIC_R 1 2 DOCK_MIC_R_C C1301 C1302
3
1

PA@ 2 2
R1099 1 2 DOCK_MIC_L_C
27 DOCK_MIC_L
2K_0402_5% L65 PA@
FBM-11-160808-601-T_0603 1 1 GNDA GNDA
PA@ PA@
2

C1303 C1304
220P_0402_50V7K 220P_0402_50V7K
2 2

GNDA GNDA
+3VS

SENSE_B# 27

2
PA@
2

PA@ R1100
R1101 10K_0402_5%
10K_0402_5% PA@

1
D

1
2 Q91
1

1 G 2N7002_SOT23-3 PA@
PA@ C S

3
PA@ Q94 2 PA@ C1305 PA@ R1103
MMBT3904_NL_SOT23-3 B PA@ R1106
1

R1104 C E GNDA SPDIFO_L 1 2 1 2 1 2 SPDIF_OUT 27

3

DOCK_MIC_L_C 1 2 2 Q92 0_0603_5% 220_0402_5%

10K_0402_5% B MMBT3904_NL_SOT23-3 0.1U_0402_16V7K
2

2 E
3

1
PA@ 1
PA@ C1306 PA@ PA@
R1105 C1307 R1107
47K_0402_5% 1 220P_0402_25V8J 110_0402_5%
1

2
1U_0603_10V6K

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DOCK CONN.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 26 of 45
 A B C D E

1102_Reserve LDO power for Codec. @ R431

+VREFOUT_EXTMIC 2 1 C546 1 2
+5VS 1 2 1K_0402_5%

1
1105_Reserve the others +5VS power for Codec. R1225 1U_0603_10V4Z
@ R1229 @ R1226
@R1226 +AVDD_CODEC 2 1
0_0805_5% 0_0805_5% 1K_0402_5% R434 R435
2 1 +VDDA_CODEC @ R1230 4.7K_0402_5% 4.7K_0402_5%
+3VS R437 +3VS_DVDD +VREFOUT_INMIC 2 1

2
BLM18BD601SN1D_0603 +AVDD_CODEC 1K_0402_5% MIC_EXT_R
2 1

0.1U_0402_16V4Z
C1443 R904 2 1 0_0805_5% 2 1 +5VS 1105_Reserve 1230. MIC_EXT_L

1U_0402_6.3V6K
1 1 1102_Reserve 4.7uF. 4.7U_0805_10V4Z
+3VS +3VS_HDA 2 1 R1227

C976

C553

1U_0402_6.3V6K
0.1U_0402_16V4Z
MCK2012102YZF_0805
R907 1 2 0_0603_5% 1 1 92HD80 port define
2 2

C1063

C1064
1 1
0.1U_0402_16V4Z

U22
1 Port A DOCK HP

10U_0805_10V4Z
1U_0402_6.3V6K
0.1U_0402_16V4Z
R438 1 2 2.49K_0402_1% +AVDD_CODEC
2 2
C551

C1065 2 1 10U_0805_10V4Z
1 27 1 1 1 PA@R439
PA@R439 1 2 39.2K_0402_1% JACK_DET# Port B HP
DVDD_CORE AVDD JACK_DET# 26

C1066

C1067

C1068
38 R598 1 2 20K_0402_1% HP_DET#
2 AVDD HP_DET# 28
9 R440 1 2 10K_0402_1% INTMIC_DET# Port C INT. MIC
DVDD SENSE_A INTMIC_DET# 28
39 C556 1 2 1000P_0402_50V7K
PVDD 2 2 2 SENSE_B
@ C554 @R441
@ R441 3
DVDD_IO PVDD
45 R254 1 2 2.49K_0402_1% +AVDD_CODEC Port D SPKR
2 1 2 1 PA@R257
PA@R257 1 2 39.2K_0402_1% SENSE_B# SENSE_B# 26
33P_0402_50V8K 47_0402_5% 13 SENSE_A R256 1 2 20K_0402_1% EXTMIC_DET# Port E DOCK MIC
HDA_BITCLK_CODEC SENSE_A SENSE_B EXTMIC_DET# 28
6 14 C555 1 2 1000P_0402_50V7K
11 HDA_BITCLK_CODEC HDA_BITCLK SENSE_B
R444 Port F EXT. MIC
11 HDA_SDIN0 1 2 HDA_SDIN0_CODEC 8 HDA_SDI
PA@ 150U_Y_6.3VM
33_0402_5% DOCK_LOUT_L C1330 Dock HP DM0 Digital MIC

+ +
HP0_PORT_A_L 28 1 2 DOCK_LOUT_C_L 26
HDA_SDOUT_CODEC 5 29 DOCK_LOUT_R C1331 1 2
11 HDA_SDOUT_CODEC DOCK_LOUT_C_R 26
HDA_SDO HP0_PORT_A_R
23 +VREFOUT_EXTMIC PA@ Jack
HDA_SYNC_CODEC VREFOUT_A_or_F 150U_Y_6.3VM DOCK_MICL_C
11 HDA_SYNC_CODEC 10 HDA_SYNC
31 HP_OUT_L DOCK_MICR_C
HDA_RST#_CODEC HP1_PORT_B_L HP_OUT_R HP_OUT_L 28
11,31 HDA_RST#_CODEC 11 HDA_RST# HP1_PORT_B_R 32 HP_OUT_R 28 HP Jack
OPP@
19 MIC_INL C1328 1 2 2.2U_0603_6.3V4Z MIC_IN_L
PORT_C_L MIC_IN_L 28

1
20 MIC_INR C1329 1 2 2.2U_0603_6.3V4Z MIC_IN_R Int. MIC PA@
PORT_C_R +VREFOUT_INMIC MIC_IN_R 28
24 OPP@ PA@R1116
PA@R1116 R1117
VREFOUT_C +VREFOUT_INMIC 28
R679 1 2 100_0603_5% 2 1.21K_0402_1%
21 DMIC_CLK DMIC_CLK/GPIO1 SPKL+
21 DMIC_DAT
R446 1 2 0_0603_5% 4 DMIC0/GPIO2 SPKR_PORT_D_L+ 40 SPKL+ 28
1.21K_0402_1% 1/10*Vin
41 SPKL-
SPKL- 28 need close to

2
SPKR_PORT_D_L-
31 EAPD_CODEC
R910 1 2 0_0402_5% 46 DMIC1/GPIO0/SPDIF_OUT_1 Internal SPKR
SPKR_PORT_D_R- 43 SPKR-
SPKR- 28 Codec
SPDIF_OUT 48 44 SPKR+
26 SPDIF_OUT SPDIF_OUT_0 SPKR_PORT_D_R+ SPKR+ 28
PA@1U_0603_10V6K
R908 1 2 10K_0402_5% 47 15 DOCK_MICL C1317 1 2 DOCK_MICL_C PA@ R1114 1 2 10K_0402_5% 92HD80 Resistor define
+3VS EAPD PORT_E_L DOCK_MIC_L 26
16 DOCK_MICR C1318 1 2 DOCK_MICR_C PA@ R1115 1 2 10K_0402_5% DOCK_MIC
2 EC_MUTE# PORT_E_R DOCK_MIC_R 26 2
28,31 EC_MUTE#
PA@ 1U_0603_10V6K Resistor SENSE_A SENSE_B
+3VS 17 MIC_EXTL C1326 1 2 2.2U_0603_6.3V4Z MIC_EXT_L
PORT_F_L MIC_EXTR MIC_EXT_R MIC_EXT_L 28
2 35 CAP- PORT_F_R 18 C1327 1 2 2.2U_0603_6.3V4Z MIC_EXT_R 28 Ext MIC 39.2K Port A HP1 Port E
0.1U_0402_16V4Z
1

C1069 12 MONO_INR 2 1 MONO_IN 20.2K Port B Port F

R1212 4.7U_0603_6.3V6M PC_BEEP C561
36 CAP+
1
4.7K_0402_5%
+3VS MONO_OUT 25 10.0K Port C DMIC0
7 5.11K SPDIFOUT0 SPDIFOUT1
2

DVSS
HDA_RST#_CODEC 1 33 22
AVSS CAP2
30
AVSS
1 C1434 26
AVSS VREFFILT
21 2.49K PU to AVDD PU to AVDD
100P_0402_50V8J
C1433 2 42 34
0.01U_0402_25V7K PVSS V-
2 +AVDD_CODEC

1U_0603_10V6K
10U_0805_10V4Z

10U_0805_10V4Z
49 37
DAP VREG
2 1 2

2
4.7U_0603_6.3V6M

2
C563

C564
92HD80B1X5NLGXYD38_QFN48_7X7~D

C1071

C1072
R909

1
1 2 1 10K_0402_5%

1
+5VALW +VDDA_CODEC MONO_IN R447 2 1 47K_0402_5% C1070 1 2 0.1U_0402_16V4Z
W=40Mil
U59
C1444 1 2 1
IN

1
0.1U_0402_16V4Z D
5
OUT SB_SPKR

0.1U_0402_16V4Z
2 1 2 SB_SPKR 11
GND
1

10K_0402_5%
C1445 2 Q38 G

2
24,31,33,35,38,39 SUSP# 3 4 @ 2N7002_SOT23-3 S

3
SHDN BYP

C562

R449
3 R1228 2.2U_0805_16V4Z 3
G9191-475T1U_SOT23-5 0_0402_5% 2
CODEC POWER 1
2

1
1
C1446 C983 2 0.1U_0402_16V4Z
(4.75V) 1

0.1U_0402_16V4Z C984 2 0.1U_0402_16V4Z

300mA 1102_Reserve CODEC LDO for Codec.
2
1

C985 1 2 0.1U_0402_16V4Z

C986 1 2 0.1U_0402_16V4Z

MDC 1.5 Conn. +3VS

R754 1

C1435 1
2 0_0603_5%

2 0.1U_0402_16V4Z
JP8 @ 1 2 +1.5VS
R475 0_0603_5% C1436 1 2 0.1U_0402_16V4Z
1 2 1 2 +3VS
GND1 RES0
1000P_0402_50V7K
C1332

C1333

C1334
0.1U_0402_16V4Z

4.7U_0805_10V4Z

HDA_SDOUT_MDC 3 4 R1130 0_0603_5% C1437 1 2 0.1U_0402_16V4Z

11 HDA_SDOUT_MDC IAC_SDATA_OUT RES1 GNDA 26,28
5 6 +3VS 1 1 1
GND2 3.3V
@

HDA_SYNC_MDC 7 8
11 HDA_SYNC_MDC IAC_SYNC GND3
11 HDA_SDIN1 1 2 HDA_SDIN1_MDC 9 10
R1131 33_0402_5% IAC_SDATA_IN GND4
11 HDA_RST#_MDC 11 12 HDA_BITCLK_MDC 11
IAC_RESET# IAC_BITCLK 2 2 2
2 1 1 2 GND GNDA
@ R1132 @C1335
@ C1335
GND
GND
GND
GND
GND
GND

10_0402_5% 10P_0402_25V8K
H12 H14
HOLEA HOLEA ACES_88018-124G
13
14
15
16
17
18

CONN@
4 4
Connector for MDC Rev1.5
1

MDC Standoff

Security Classification Compal Secret Data

Issued Date 2007/08/28 Deciphered Date 2006/07/26 Title
Codec_IDT92HD80
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 27 of 45
A B C D E
 A B C D E

1103_Reserve 0.1uF between GND and GNDA.

@ C1447
SPEAKER 0.1U_0402_16V4Z
1 1
1 2
JP60
6
GND2
5
GND1

27 SPKR- SPKR- R454 1 2 0_0603_5% SPK_R- 4

SPKR+ R455 0_0603_5% SPK_R+ 4
27 SPKR+ 1 2 3
SPKL- R456 0_0603_5% SPK_L- 3
27 SPKL- 1 2 2
2
SPKL+ R457 1 2 0_0603_5% SPK_L+ 1
27 SPKL+ 1

330P_0402_50V7K

330P_0402_50V7K

330P_0402_50V7K
330P_0402_50V7K
1 1 1 ACES_88231-04001 OPP@ OPP@ +AVDD_CODEC
CONN@ C1323
1 R1125 INTMIC IN

C570

C571

C572
1U_0603_10V4Z

C569
27 +VREFOUT_INMIC +VREFOUT_INMIC 2 1 1 2

2
2 2 2 OPP@

1
2 1K_0402_5% OPP@ R1126
R1127 R1128 10K_0402_5%
4.7K_0402_5% 4.7K_0402_5%

2
OPP@ R401

1
2 OPP@1 JP51

2
D15 @ D16 @ 1
PSOT24C_SOT23-3 PSOT24C_SOT23-3 0_0402_5% MIC_IN_L 1
27 MIC_IN_L 2 2
MIC_IN_R 3
27 MIC_IN_R 3
4

1
4
+3VS 2 OPP@ 1
R1129 10K_0402_5% 5 GND1
6 GND2

2N7002DW-7-F_SOT363-6
27 INTMIC_DET# OPP@ ACES_88231-04001

3
2N7002DW-7-F_SOT363-6
OPP@ Q20B CONN@

6
Q20A
MIC_IN_L
2 2
5
MIC_IN_R 2
Audio connector MIC_EXT_R

4
1
3

2
MIC_EXT_L
OPP@
D60

2
PACDN042_SOT23~D

2
@
HP de pop circuit HP_OUT_L HP_OUT_R D61 OPP@

1
PACDN042_SOT23~D D62
2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6
PACDN042_SOT23~D

1
+5VALW
6

Audio/B & CIR

Q28A

Q32A

2 2
1

JP49
R76 @ @ MIC_EXT_R 1
27 MIC_EXT_R
1

10K_0402_5% MIC_EXT_L 1
27 MIC_EXT_L 2
2
@ 3
HP_OUT_R 3
2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

27 HP_OUT_R 4
2

HP_OUT_L 4
27 HP_OUT_L 5
5
4

6
6
6

EXTMIC_DET#
2N7002DW-7-F_SOT363-6

5 5 27 EXTMIC_DET# 7
Q32B

7
Q28B

HP_DET# 8 15
27 HP_DET# 8 G1
Q39A

9 16
9 G2
27,31 EC_MUTE# 2 10
@ @ CIR_IN 10
26,31 CIR_IN 11
3

3 @ 11 3
+5VL 12
1

12
13
13
14
14
ACES_87213-1400G
CONN@

4 4

Security Classification Compal Secret Data

Issued Date 2007/08/28 Deciphered Date 2006/07/26 Title
AMP & Audio Jack
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 28 of 45
A B C D E
 5 4 3 2 1

Left\ side ESATA/USB combination +USB_VCCC

Connector R479 1 2 0_0402_5% USB20_N0_R

1
2
JP53
VBUS
USB

+5VALW Left side USB Power 14

14
USB20_N0
USB20_P0
R480 1 2 0_0402_5% USB20_P0_R 3
4
D-
D+
GND

Switch W=100mils
1
U24
8
+USB_VCCC
11 SATA_TXP4
SATA_TXP4
SATA_TXN4
5
6
7
GND
A+ ESATA
GND OUT 11 SATA_TXN4 A-
2 7 8
IN OUT GND

150U_B_6.3VM_R40M
D D

4.7U_0805_10V4Z

0.1U_0402_16V4Z
3
IN OUT
6 11 SATA_RXN4_C
C602 2 1 0.01U_0402_16V7K SATA_RXN4 9
B-
1 USB_EN# 4 5 1 1 1 C603 2 1 0.01U_0402_16V7K SATA_RXP4 10
EN# OC# 11 SATA_RXP4_C B+

C598

C600
11
C599 G547F2P81U_MSOP8 + C601 GND
1000P_0402_50V7K 12
2 2 2 GND
13
2 GND
14
GND
15
GND
TYCO_1759576-1
CONN@
R481 1 2 10K_0402_5% +5VALW

D21
+5VALW 4 2 SATA_TXP4
WCM-2012-900T_0805 VIN IO1
USB20_N0 1 1 SATA_TXN4
2 2 USB20_N0_R
3 IO2 GND 1

USB20_P0_R PRTR5V0U2X_SOT143-4
USB20_P0 4 3
4 3 D20
@ L11 +5VALW 4 2 USB20_P0_R
VIN IO1
USB20_N0_R 3 1
IO2 GND
PRTR5V0U2X_SOT143-4
Finger printer EMI request ESD request

C C

+3VS

1
R1113
2
0_0603_5%
BT CONN@
1
C301 <BOM Structure>
0.1U_0402_16V4Z Connector 9
ACES_87213-0800G
GND 1
1
2
+3VAUX_BT
2 JP24 2 USB20_P12_R R250
3 2 1 0_0402_5% USB20_P12 14
R248 3 USB20_N12_R R249
1
1 4
4 2 1 0_0402_5% USB20_N12 14
1 2 0_0402_5% USB20_N11_R 2 5
14 USB20_N11 USB20_P11_R 2 5 BT_LED 32
14 USB20_P11 1 2 0_0402_5% 3
3 6
6
R599 4 7 0911_Change Fingerprinter to port11.
4 7
3

@ R548 5 10 8
5 GND 8
1 2 6
6
0_0402_5% 7 JP57
@D46
@ D46 GND @ D47
8
PACDN042_SOT23-3~D GND USB20_P12_R
+5VALW 4 2
ACES_85201-06051 VIN IO1
1

CONN@ USB20_N12_R 3 1
IO2 GND
+3VS PRTR5V0U2X_SOT143-4
R1121
1 2

0_0603_5% Q40 +3VAUX_BT

SI2301BDS-T1-E3_SOT23-3

0.1U_0402_16V4Z

S
3 1

D
B
USB cable connector for Right B

G
1 1 1 1
side

2
JP55 @ C298 C299 C300
+5VALW 1 C293 R1123
1 100K_0402_5%
2
2 1U_0603_10V4Z 2 2 2 2
3

2
USB_EN# 3
31 USB_EN# 4
4 0.01U_0402_16V7K 4.7U_0805_10V4Z
5
14 USB20_N2 5
6
14 USB20_P2 6 C292
7
7 R1124 1
8 14 BT_OFF 2 10K_0402_5% 1 2
14 USB20_N1 8 0.1U_0402_16V4Z
9
14 USB20_P1 9
10
10

11
GND1
12
GND2
ACES_87213-1000G
CONN@

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/28 Deciphered Date 2006/07/26 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB, BT, eSATA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 29 of 45
5 4 3 2 1
 5 4 3 2 1

SPI ROM => 256K (EC code)

D D

+3VL &U25
U25
20mils 8 4
VCC VSS
1
C610 3
0.1U_0402_16V4Z W
Close to EC
2
7 HOLD MX25L8005M2C-15G SOP 8P
@
1 2 SPI_FSEL# 1
31 FSEL# S
R495 0_0402_5%
1 2 SPI_CLK_R 6
31 SPI_CLK C
R496 0_0402_5%
1 2 SPI_FWR# 5 2 SPI_SO 1 2 FRD#
31 FWR# D Q FRD# 31
R497 0_0402_5% R498 33_0402_5%
MX25L2005CMI-12G SOP 8P

SP07000F500 S SOCKET WIESON G6179-100000 8P

SPIFLASH
WIESO_G6179-100000_8P

* SA00003GK00 S IC FL 2M MX25L2005CMI-12G SOP 8P SPI_CLK_R 1

R233
2 1
C391
2
(MXIC)
SA00003GM00S IC FL 2M W25X20AVSNIG SOIC 8P 33_0402_5% 22P_0402_50V8J
(WINBOND)

C C

SPI ROM on PCH => 4M (ME code + System

BIOS) +3VS

+3VS &U31

1
R658 1 2 SPI_WP# C773
3.3K_0402_5% 0.1U_0402_16V4Z
2
32M AT25DF321-SU SOIC 8P
R659 1 2 SPI_HOLD# U31 @
3.3K_0402_5% 8 4
VCC VSS
Close to PCH SPI_WP# 3 W
SPI_HOLD# 7
R661 HOLD
SPI_SB_CS# 1 2 1
11 SPI_SB_CS# S
SPI_CLK_PCH 15_0402_5% 6
11 SPI_CLK_PCH C R662
SPI_SI 5 2 SPI_SO_L 1 2 SPI_SO_R SPI_SO_R 11
11 SPI_SI D Q
AT25DF321-SU SOIC 8P 15_0402_5%

B B

*  S IC FL 32M AT25DF321-SU SOIC 8P

SA000031Q00
(ATMEL)
SA000021A00 S IC FL 32M MX25L3205DM2I-12G SOP 8P
(MXIC)

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/28 Deciphered Date 2006/07/26 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BIOS ROM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 30 of 45
5 4 3 2 1
 +3VL_EC
+3VL_EC VCC 3.3V+/-5%

1
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K R1223 100K+/-5%
1 1 1 1 1 OPP@

+3VL +3VL_EC +EC_AVCC

R386 R1223 Board ID R386 V AD_BID min V AD_BID typ V AD_BID max
C613 C614 C615 C616 C617 100K_0402_5%
Blade UMA 0 0 0V 0V 0V

2
2 2 2 2 2 R511 BDID
0.1U_0402_16V4Z 1000P_0402_50V7K 1 2 Blade SG 1 8.2K+/-5% 0.216V 0.250V 0.289V

1
0_0805_5% PA@
18K_0402_1% R386 Bee. UMA 2 18K+/-5% 0.436V 0.503V 0.538V
0_0402_5%

111
125
+3VL_EC Bee. DIS 3 33K+/-5% 0.712V 0.819V 0.875V

22
33
96

67
9
U27

2
SMB_EC_DA1 R512 1 2 2.2K_0402_5%

VCC
VCC
VCC
VCC
VCC
VCC

AVCC
SMB_EC_CK1 R513 1 2 2.2K_0402_5%
+3VL_EC
@ 22_0402_5%
GATEA20 INV_PWM LVDS_INV_PWM R13
1 21 2 R505 1 LVDS_INV_PWM 13,21
14 GATEA20 KB_RST# GA20/GPIO00 INVT_PWM/PWM1/GPIO0F FAN_PWM INV_PWM
2 23 FAN_PWM 6 2 1
14 KB_RST# SIRQ KBRST#/GPIO01 BEEP#/PWM2/GPIO10 ME_EN
11 SIRQ 3 26 ME_EN 11
LPC_FRAME# SERIRQ# FANPWM1/GPIO12 ACOFF
11,24 LPC_FRAME# 4 27 ACOFF 35
@ C623 @ R516 LPC_AD3 LFRAME# ACOFF/FANPWM2/GPIO13 0.01U_0402_16V7K 100K_0402_5%
11,24 LPC_AD3 5
LPC_AD2 LAD3 ECAGND
1 2 1 2 11,24 LPC_AD2 7
LAD2 PWM Output C624 1 2 1020_Add R13 for ATE test.
33_0402_5% 11,24 LPC_AD1 LPC_AD1 8 63 BATT_TEMP
LPC_AD0 LAD1 BATT_TEMP/AD0/GPIO38 BATT_OVP BATT_TEMP 34 KSO15
LAD0 LPC & MISC
15P_0402_50V8J 11,24 LPC_AD0 10 64 @C618
@ C618 1 2 100P_0402_50V8J
BATT_OVP/AD1/GPIO39 ADP_I BATT_OVP 34
ADP_I/AD2/GPIO3A 65 ADP_I 35
CLK_PCI_EC 12 AD Input 66 ADP_ID KSO10 @C619
@ C619 1 2 100P_0402_50V8J
14 CLK_PCI_EC PCI_RST# PCICLK AD3/GPIO3B ADP_ID 34 BDID
14 PCI_RST# 13 PCIRST#/GPIO05 AD4/GPIO42 75
1 2 ECRST# 37 76 KSO11 @C620
@ C620 1 2 100P_0402_50V8J
+3VL_EC ECRST# SELIO2#/AD5/GPIO43
R517 47K_0402_5% 20
14 EC_SCI# SCI#/GPIO0E R1224 KSO14 @C621
@ C621 1
11,27 HDA_RST#_CODEC 1 2 38 2 100P_0402_50V8J
R518 CLKRUN#/GPIO1D DAC_BRIG
DAC_BRIG/DA0/GPIO3C 68 DAC_BRIG 21 1 2 SUS_PWR_ACK 13
1

2 1 J1 0_0402_5% 70 VCTRL KSO13 @C622

@ C622 1 2 100P_0402_50V8J
EN_DFAN1/DA1/GPIO3D IREF VCTRL 35
C630 0.1U_0402_16V4Z
+3VALW
DA Output IREF/DA2/GPIO3E 71
IREF 35
0_0402_5%
JOPEN +3VS KSI0 55 72 AC_SET KSO12 @C625
@ C625 1 2 100P_0402_50V8J
2

KSI1 KSI0/GPIO30 DA3/GPIO3F AC_SET 35

56 KSI1/GPIO31
KSI2 57 +5V_TP KSO3 @C626
@ C626 1 2 100P_0402_50V8J
KSI3 KSI2/GPIO32 EC_MUTE#
58 KSI3/GPIO33 PSCLK1/GPIO4A 83 EC_MUTE# 27,28

1
KSI4 59 84 USB_EN# R519 1 2 4.7K_0402_5% KSO6 @C627
@ C627 1 2 100P_0402_50V8J
KSI4/GPIO34 PSDAT1/GPIO4B USB_EN# 29
1

KSI5 60 85 I2C_INT R520 1 2 4.7K_0402_5%

KSI6 KSI5/GPIO35 PSCLK2/GPIO4C MUTE_LED I2C_INT 32 KSO8
R526 R525 61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86
MUTE_LED 26
@C628
@ C628 1 2 100P_0402_50V8J
SYSON SUSP# PCI_RST# 10K_0402_5% 10K_0402_5% KSI7 62 87 TP_CLK
KSO0 KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_DATA TP_CLK 32 KSO7 @C629
@ C629 1
39 88 2 100P_0402_50V8J
2 KSO1 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA 32
40
2

KSO1/GPIO21
2

KSO2 41 KSO4 @C631

@ C631 1 2 100P_0402_50V8J
R521 R522 R523 KSO3 KSO2/GPIO22 R524
42 KSO3/GPIO23 SDICS#/GPXOA00 97 1 2 0_0402_5%
8.2K_0402_5% 100K_0402_5% LID_SW# TP_BTN# KSO4 DOCK_VOL_UP# AC_LED# 34 KSO2 @C632
@ C632 1
8.2K_0402_5% 43 98 2 100P_0402_50V8J
KSO5 KSO4/GPIO24 SDICLK/GPXOA01 DOCK_VOL_DWN# DOCK_VOL_UP# 26
KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99 DOCK_VOL_DWN# 26 KSI0 @C633
@ C633 1
45 109 2 100P_0402_50V8J
KSO6/GPIO26 Matrix
1

KSO7 SDIDI/GPXID0
46 KSO7/GPIO27 SPI Device Interface
KSO8 47 KSO1 @C634
@ C634 1 2 100P_0402_50V8J
1.05VS_ON 1 @
@R385
R385 2 KSO9 KSO8/GPIO28 FRD#
33 1.05VS_ON 48 KSO9/GPIO29 SPIDI/RD# 119 FRD# 30
0_0402_5% KSO10 49 120 R527 1 2 33_0402_5% FWR# KSO5 @C635
@ C635 1 2 100P_0402_50V8J
KSO11 KSO10/GPIO2A SPIDO/WR# SPI_CLK FWR# 30
50
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
126 R528 1 2 33_0402_5%
SPI_CLK 30
KSO12 51 128 R529 1 2 33_0402_5% FSEL# KSI3 @C636
@ C636 1 2 100P_0402_50V8J
32 TP_BTN# KSO13 KSO12/GPIO2C SPICS# FSEL# 30
52
KSO14 KSO13/GPIO2D R530 KSI2
53 1 2 10K_0402_5% +5VL @C637
@ C637 1 2 100P_0402_50V8J
+3VL_EC +3VALW KSO15 KSO14/GPIO2E CIR_IN
54 73 CIR_IN 26,28
TP_BTN# KSO15/GPIO2F CIR_RX/GPIO40 PCH_TEMP_ALERT# KSO0 @C638
@ C638 1
81 74 PCH_TEMP_ALERT# 14 2 100P_0402_50V8J
CONA# KSO16/GPIO48 CIR_RLC_TX/GPIO41 FSTCHG
26 CONA# 82 89 FSTCHG 35
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 STD_ADP KSI5 @C639
@ C639 1
90 STD_ADP 35 2 100P_0402_50V8J
BATT_CHGI_LED#/GPIO52
2

91 CAPS_LED#
CAPS_LED#/GPIO53 CAPS_LED# 32
@ R531 R532 SMB_EC_CK1 77 GPIO 92 BAT_LED# C612 KSI4 @C640
@ C640 1 2 100P_0402_50V8J
10K_0402_5% 32,34 SMB_EC_CK1 SMB_EC_DA1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 ON/OFFBTN_LED# BAT_LED# 32
10K_0402_5% 78 93
32,34 SMB_EC_DA1 SMB_EC_CK2 SDA1/GPIO45 SUSP_LED#/GPIO55 SYSON ON/OFFBTN_LED# 32 BATT_OVP KSO9
12 SMB_EC_CK2 79
SCL2/GPIO46 SM Bus SYSON/GPIO56
95
SYSON 24,32,33,37
2 1 @C641
@ C641 1 2 100P_0402_50V8J
SMB_EC_DA2 80 121 VR_ON
12 SMB_EC_DA2 VR_ON 40
1

SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 AC_IN 100P_0402_50V8J KSI6 @C642

@ C642 1
127 2 100P_0402_50V8J
R533 1 EC_PME# AC_IN/GPIO59
2 2 1
14 PCI_PME# @ 0_0402_5% R534 10K_0402_5% KSI7 @C643
@ C643 1 2 100P_0402_50V8J
SLP_S3# 6 100 EC_RSMRST#
13 SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# 13
R537 1 2 EC_PME# SLP_S5# 14 101 R535 1 2 KSI1 @C644
@ C644 1 2 100P_0402_50V8J
32 WL_BLUE_BTN 13 SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_LID_OUT# 12
OPP@ 0_0402_5% EC_SMI# 15 102 EC_ON 0_0402_5%
14 EC_SMI# EC_SMI#/GPIO08 EC_ON/GPXO05 EC_ON 36 R536
LID_SW# 16 103 WL_BLUE_LED#
32 LID_SW# ESB_CLK_R LID_SW#/GPIO0A EC_SWI#/GPXO06 PM_PWROK_R WL_BLUE_LED# 32
17 104 1 2
ESB_DAT_R 18
SUSP#/GPIO0B
GPO
ICH_PWROK/GPXO06
105 BKOFF_R# 2 1 BKOFF# 100_0402_5% PM_PWROK 13 For EMI
EC_PME# PBTN_OUT#/GPIO0C BKOFF#/GPXO08 M_PWROK R504 22_0402_5% BKOFF# 21
19 GPIO 106
13 EC_ACIN
EC_ACIN 25
EC_PME#/GPIO0D
EC_THERM#/GPIO11
WL_OFF#/GPXO09
GPXO10
107 TP_LED# M_PWROK 13
TP_LED# 32 PV PWROK sequence issue 14" INT_KBD
PA@ 28 108
26 DOCK_SLP_BTN#
R595 1
0_0402_5%
2 ON/OFFBTN
24 WWAN_POWER_OFF
WWAN_POWER_OFF
EC_UTX
29
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
GPXO11
CON
24 EC_UTX 30
EC_URX EC_TX/GPIO16 SLP_S4# JP19
24 EC_URX 31 110 SLP_S4# 13
ON/OFFBTN EC_RX/GPIO17 PM_SLP_S4#/GPXID1 ENBKL KSO15
32 ON/OFFBTN 32 112 ENBKL 13
DIM_LED ON_OFF/GPIO18 ENBKL/GPXID2 EAPD_CODEC R543 KSO10 1
33 DIM_LED 34 114 EAPD_CODEC 27
NUM_LED# PWR_LED#/GPIO19 GPXID3 R_LAN_POWER_OFF KSO11 2
+3VL_EC R538 1 2 4.7K_0402_5%32 NUM_LED# 36
NUMLED#/GPIO1A GPI GPXID4
115 2 1 LAN_POWER_OFF 25 3
116 SUSP# 0_0402_5% KSO14
EC_PME# PCI_RST# C647 GPXID5 PWRBTN_OUT# SUSP# 24,27,33,35,38,39 KSO13 4
117 PWRBTN_OUT# 13
15P_0402_50V8J GPXID6 NMI_DBG# +3VL_EC KSO12 5
118 D24
CRY2 GPXID7 KSO3 6
1 1 1 2 122
XCLK1 7
123 124 +3VL_EC ADP_ID 2 1 KSO6
C645 C646 XCLK0 V18R KSO8 8
Y6 1 9
1

AGND

0.1U_0402_16V4Z 0.1U_0402_16V4Z KSO7

GND
GND
GND
GND
GND

RB751V_SOD323 10

1
2 2 3 4 @ C648 R540 KSO4
NC OSC R539 4.7U_0603_6.3V6K 10K_0402_5% KSO2 11
20M_0402_5% KB926QFB0_LQFP128_14X14 2 KSI0 12
2 1
11
24
35
94
113

69

NC OSC KSO1 13
D25
2

KSO5 14

2
32.768KHZ_12.5PF_Q13MC14610002 NMI_DBG# 15
1 2 PCI_SERR# PCI_SERR# 14
KSI3
16
1 2 CRY1 KSI2
+3VL_EC +3VL_EC KSO0 17
C649 RB751V_SOD323 KSI5 18
ECAGND

15P_0402_50V8J KSI4 19
20
1

1
R541 KSO9
+EC_AVCC L26 150K_0402_5% KSI6 21
0_0603_5% KSI7 22
KSI1 23
D26 24
L27
2

2
1 2 1 2 AC_IN 2 1 ACIN +3VL_EC

G1
G2
ACIN 35
C650 0.1U_0402_16V4Z 0_0603_5%

25
26
+3VL_EC RB751V_SOD323 KSO2 R388 1
1 2 2 47K_0402_5%
+3VS +3VS 1103_Move C652 to near JP59. C651 100P_0402_50V8J

KSO1 R389 1 2 47K_0402_5% CONN@

1

PA@ PA@ @ @ ACES_85201-2405

R1219 R1220 R544 R545
4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%

PA@
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/28 Deciphered Date 2006/07/26 Title
2

R546 1 2 0_0402_5% ESB_CLK_R

32
32
ESB_CLK
ESB_DAT
R547 1 2 0_0402_5% ESB_DAT_R
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC KB926/KB Conn.
PA@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 31 of 45
 A B C D E

System & Caps-Lock LED T/P Board (Inculde T/P_ON/OFF) TP ON/OFF

D50
White R1133 +5V_TP
31 CAPS_LED#
1 2 1 2 +5VS_LED
Cap lock TouchPAD ON/OFF LED

1
HT-F196BP5_WHITE 470_0402_5% +5VS_LED
R1139 @
10K_0402_5%
SW1
White

1
D51 R1134 TJG-533-V-T/R_6P
Battery

2
1 2 1 2 +5VALW_LED R1142 R1143 3 1 TP_BTN# 31
1 31 BAT_LED# 1
200_0402_5% 200_0402_5%
HT-F196BP5_WHITE 200_0402_5%
Charge LED 4 2

2
D52
PA OPP

5
6
QSMF-C16E_AMBER-WHITE
White R1136
200_0402_5%
White

2
+5VS_LED D54
11 SATA_LED#
1 2 1 2 +5VS_LED
PA@ AMBER White

Amber

White

Amber

White
HDD LED AMBER White D55

1
3 4 1 2 +3VS OPP@
14 HDDHALT_LED# R1137 R1150
AMBER
200_0402_5%

1
Amber 10K_0402_5%
QSMF-C16E_AMBER-WHITE

2
QSMF-C16E_AMBER-WHITE
TP_LED# TP_LED# 31
White

1
D53 R1138 D
ON/OFFBTN_LED# 1 2 1 2 +5VALW_LED System 2
G
HT-F196BP5_WHITE 200_0402_5%
Power LED Q98 S On (TP_LED#=L)-> White

3
2N7002_SOT23-3
Off (TP_LED#=H)-> Amber

+5VS_LED TP_DATA
Capacitor Sensor Conn +3VL +3VS
+5VALW_LED
@ R1158 @ C1344 T/P Board Conn
TP_CLK

2
ESB_DAT 2 1 2 1
PA@ D58
33_0402_5% 15P_0402_50V8J PSOT24C_SOT23-3

1
R1140

R1211
2 2
1103_Change R1448 from 0 ohm to bead. +5VALW +5V_TP
OPP@ R1175 R1141
Move C652 to near JP59.

@
10K_0402_5% 0_0805_5% R1159 1 2 0_0603_5%

1
0_0805_5%
OPP@ +5V_TP

0_0805_5%
2

S
OPP@ R1144 1 2 0_0402_5% 3 1

D
31 WL_BLUE_BTN
WL_BLUE_LED# OPP@ R1145 1 2 0_0402_5% JP59 1
1 Q100@ C1347
1

1
OPP@ R1146 0_0402_5% SI2301BDS-T1-E3_SOT23-3 0.1U_0402_16V4Z

G
31 ON/OFFBTN_LED# 1 2 2

2
SMB_EC_CK1 PA@ R1147 0_0402_5% 2 @ R1160
31,34 SMB_EC_CK1 1 2 3
ESB_CLK PA@ R1148 FBMA-10-100505-301T 0402 3 10K_0402_5% JP23 2
31 ESB_CLK 1 2 4
4
ENE ESB_DAT PA@ R1149 1 2 0_0402_5% 5 1
31 ESB_DAT 5 1
6 2 TP_CLK
31 I2C_INT TP_CLK 31

2
6 2 TP_DATA
7 5 3 TP_DATA 31
7 NUM_LED# I2C_INT G1 3
31 NUM_LED# 8 6 4
SMB_EC_DA1 R1151 8 G2 4
31,34 SMB_EC_DA1 1 PA@ 2 0_0402_5% 9
9

15P_0402_50V8J

0.1U_0402_16V4Z
OPP@ R1152 1 2 0_0402_5% 10 1 1 ACES_85201-04051
31 ON/OFFBTN 10

1
D
1 11 CONN@ 1 1
GND

C1339

C1340
Cypress 12 SYSON 2 @ Q101
GND 24,31,33,37 SYSON
@

C1341 1 G 2N7002_SOT23-3 @ C1348 @ C1349

2 2

@
@ R1153 C1342 15P_0402_50V8J 4.7U_0603_6.3V6K ACES_85201-1005N 100P_0402_50V8J 100P_0402_50V8J
@
S

3
ESB_CLK 2 CONN@ 2 2
2 1 2 1 2
C1343
33_0402_5% 15P_0402_50V8J 2
C652
33P_0402_50V8J 1

3 Mini card LED +3VS

3

ON/OFF Button Connector Keyboard backlight

1
R1154

Conn 10K_0402_5%

2
+5VALW_LED
@ R1155 JP9 WL_BLUE_LED# 31
JP10 +5VS_LED 1 2 1 Q99
1 2N7002_SOT23-3
1 2
1 2

1
ON/OFFBTN 0_0805_5% D
2 3 5
ON/OFFBTN_LED# 2 3 G1
3 5 4 6 29 BT_LED 2
3 G1 4 G2 G
4 6
4 G2

1
ACES_85201-04051 S

3
ACES_85201-04051 CONN@ R1156
CONN@ 100K_0402_5%

2
D56 RB751V_SOD323
24 WL_LED# 1 2

1 2 WL_BLUE_LED#
Lid Switch 24 WW_LED#
D57 RB751V_SOD323

Connector +3VALW

1
JP11
1
31 LID_SW# 2 2
4 4
3 3 G1 5
10P_0402_50V8J

0.1U_0402_16V4Z

1 1 4 4 G2 6
C1346

ACES_85201-04051
C1345

CONN@
2 2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/28 Deciphered Date 2006/07/26 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KBD, ON/OFF, SW, CIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 32 of 45
A B C D E
 5 4 3 2 1

+5VALW to +5VS +3VALW to +3VS +1.5V to +1.5VS

Transfer
+5VALW SI7326DN-T1-E3_PAK1212-8
U28
+5VS
B+ Transfer
+3VALW
SI7326DN-T1-E3_PAK1212-8
+3VS
+1.5V Transfer +1.5VS
1 U29 B+ SI7326DN-T1-E3_PAK1212-8
B+ 2 1 @ U30
5 3 2 1

10U_0805_10V4Z

10U_0805_10V4Z
0.1U_0402_16V4Z

0.1U_0402_16V4Z
5 3 2

1
10U_0805_10V4Z

10U_0805_10V4Z
0.1U_0402_16V4Z
R581 1 1 5 3
1

C681
10U_0805_10V4Z
1 1 C669 1 1 R596 1 1

C671

C672

C673

C674

C679

C680
D R583 330K_0402_5% D
1

4
C675 10U_0805_10V4Z 330K_0402_5%

4
330K_0402_5% 2 2

2
2 2 2 2 2 2
2

2 RUNON_3VS

1
@ RUNON_1.5VS

6
RUNON_5VS

2N7002DW-7-F_SOT363-6
1

1
2N7002DW-7-F_SOT363-6
Q9A R584 Q8A
@
6

470_0402_5% R650
@
R585 SUSP 2 SUSP 2 @ 1K_0402_5%@

2
470_0402_5% 1 @
SUSP 2

2
C676 1
Q10A 1 0.1U_0402_16V4Z C770
1

2N7002DW-7-F_SOT363-6 C677 2 0.1U_0402_16V4Z

4700P_0402_25V7K
2
@
2

+1.05V to +1.05VS
Transfer @
+VCCP +1.05VS
B+ SI7326DN-T1-E3_PAK1212-8
U54
+1.5VS_CPU PJ2 PAD-OPEN 3x3m +1.5VS 1

10U_0805_10V4Z
1 2 2

1
C C

10U_0805_10V4Z
0.1U_0402_16V4Z
@ 1 5 3

C1351
R1164 1 1

C1352

C1353
330K_0402_5% @

4
2

2
2 @ 2 @

2N7002DW-7-F_SOT363-6
+1.5VS_CPU PJ3 PAD-OPEN 3x3m +1.8VS
1 2 RUNON_1.05VS

1
@ Q103A @
R1165
1.05VS_ON 2 1K_0402_5%
31 1.05VS_ON

2
1 @
C1354
0.1U_0402_16V4Z
2

1021_Change R593 from 470 ohm to 22 ohm.

Discharge circuit 1105_Change R592 from 470 ohm to 22 ohm.
+5VS +3VS +1.5VS +VCCP +1.5V +0.75VS +1.05VS
1

1
R588 R589 @ R590 R591 R592 R593 @ R1166
B 22_0402_5% 22_0402_5% B
470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5%
2

2
2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6
3

3
Q11
Q9B @ Q8B Q7A Q7B @ Q103B
1

D
SUSP 5 SUSP 5 SUSP 5 SUSP 2 SYSON# 2 SUSP 5 1.05VS_ON 5
G
Q10B S 2N7002_SOT23-3
DIM LED
4

4
2N7002DW-7-F_SOT363-6 +5VS +5VS_LED +5VS
@ Q26
SI2301BDS-T1-E3_SOT23-3
@ J2

D
3 1 2 1

1
@ 1 PAD-OPEN 2x2m
+3VL +3VL R582 C670

G
2
10K_0402_5% 0.1U_0402_16V4Z
1

2
R586 R587 DIM_LED#

100K_0402_5% 100K_0402_5% +5VALW @ +5VALW_LED +5VALW

Q102

1
D
2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

@
2

DIM_LED 2 Q27 SI2301BDS-T1-E3_SOT23-3

26,39 SYSON# SUSP 9,39 31 DIM_LED
G 2N7002_SOT23-3 @ J3

S
3 1 2 1

D
S

3
6

Q6A Q6B 1 PAD-OPEN 2x2m

A C1350 A

G
2
2 5 0.1U_0402_16V4Z
24,31,32,37 SYSON SUSP# 24,27,31,35,38,39
2
1

DIM_LED#

H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 H15 H16 H17 H18 H19 H20 H11

HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEC HOLEC HOLEA FM1 FM2 Security Classification Compal Secret Data Compal Electronics, Inc.
1 1 Issued Date 2007/08/28 Deciphered Date 2006/07/26 Title

FM3 FM4 DC/DC Interface

1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1 1 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 33 of 45
5 4 3 2 1
 A B C D

+3VALW
PQ3

3
TP0610K-T1-E3_SOT23-3
+3VL
1 PR9 2
100K_0402_5% connect to KBC pin97 BATT
1 2 AC_LED# 31 1

340K_0402_1%
PR1 1
+5VALW
ADP_ID 31

0.01U_0402_25V7K
2 1

PC12

2
1

1
PC1
PR8 PD4 @1000P_0402_50V7K

499K_0402_1%
PR4 1
2K_0402_5% PR2
10K_0402_5%
VIN +DOCKVIN

2
1

2
ACES_88334-057N RLZ3.6B_LL34
ADP_SIGNAL 1 2

8
5 PR3 PR5
5 10K_0402_5% 10K_0402_5%
4 3

P
4 PL1 PL2 +
3 3 0 1 2 1 BATT_OVP 31
2 SMB3025500YA_2P SMB3025500YA_2P 2
2 -

G
ADPIN

105K_0402_1%
1 1 1 2 2 1

PR6 1
0.01U_0402_25V7K

4
1
PJP1 PU1A

PC6
LM358ADT_SO8
100P_0402_50V8J

1000P_0402_50V7K

2
2

100P_0402_50V8J

2
1

1
PC5
PC4
PD1 PC3
2

2
PC2

1000P_0402_50V7K
PJSOT24CW _SOT323
1

2 2

VMB
PL3 BATT
PJP2 HCB2012KF-121T50_0805
8 8 1 2
PL4
7 7
6 EC_SMD HCB2012KF-121T50_0805
PH1 under CPU botten side :
6 PD2
EC_SMC PJSOT24CW _SOT323
5 5
4 3
1 2 CPU thermal protection at 90 +-3 degree C
4
1

3 3 1
2 2 2
1 PC8 PC9
2

1 1000P_0402_50V7K 0.01U_0402_50V4Z PR7

GND 9
10 3 PD3 +5VS 604K_0402_1%
GND PJSOT24CW _SOT323
3 SUYIN_200275MR008GXOLZR 2
1
CPU 1 2
3
1
1

1
PR14 PH1
PR13 100_0402_5% 10K_TH11-3H103FT_0603_1%
100_0402_5%
2

EN0_TRIP 36
2

2
SMB_EC_DA1 SMB_EC_DA1 31,32 PR10

8
200K_0402_1%
D

1
1 2 5

P
SMB_EC_CK1 + PQ1
SMB_EC_CK1 31,32 0 7 2
+5VALW 1 2 6 G SSM3K7002FU_SC70-3
-

G
BAT_ID 35 PR11 PU1B S

3
1 150K_0402_1%

4
1

1
LM358ADT_SO8

1
PC10 PR12
PR16 2.37K_0402_1%
6.49K_0402_1% +3VL 0.22U_0603_10V7K PR15
2

1 2 150K_0402_1% PC11
2

2
1000P_0402_50V7K

2
1

PR17
1K_0402_5%
BATT_TEMP 31
2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/05/29 Deciphered Date 2008/05/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC Connector/CPU_OTP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 34 of 45
A B C D
 A B C D

P4 B+

BATT
VIN P2
PQ102
FDS6675BZ_SO8
1 8
PQ101 PQ103 PL101 2 7

@1000P_0402_50V7K
1
SI4835DDY-T1-E3_SO8 PR102 1
SI4459ADY HCB2012KF-121T50_0805 3 6

1
8 1 1 8 1 4 1 2 CHG_B+ 5
PR103

PC132
7 2 2 7

1
6 3 3 6 2 3 47K_0402_5%

1000P_0402_50V7K

2
PC133

PC129
5 5 1 2

470P_0402_50V7K

270P_0402_50V7K
4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
PR101 @470P_0402_50V7K VIN

PC134
2
0.012_2512_1%

1
47K_0402_5% PR104 ACDET

PC130
1 2
47P_0402_50V8J

1
0_0402_5%

PC103

PC104

PC105
1 2

0.1U_0603_25V7K
31 AC_SET 1 2 ACSET PC102

2
1

3
1U_0603_6.3V6M PR105
PC101

1
10K_0402_5%

0.1U_0603_25V7K

PC108
1

1
2

2
1
2 PC107 PR140 PC109 ACOFF#

200K_0402_5%

2
1

@0.01U_0402_16V7K 100K_0402_5% @0.1U_0603_25V7K

PC106

PR106

1
2

2
PR107 CHGEN# CHG_B+

2
47K_0402_1% PQ104 PR108
1 2 2 DTA144EUA_SC70-3 10_1206_5%
1

1
1 2 2 ACOFF 31

LPMD

ACN

CHGEN
LPREF

ACSET

ACDET

ACP
PQ105 29
TP
6

5
6
7
8
DTC115EUA_SC70-3 24,27,31,33,38,39 SUSP# PR110 PC110
3

0_0402_5% 1U_0805_25V6K

3
PQ109A PR109 PC128 1 2 8 28 1 2 PQ106
150K_0402_5% IADSLP PVCC DTC115EUA_SC70-3
2 1 2
2N7002KDW-2N_SOT363-6 PC111 PQ108

2
@180P_0402_50V8J 9 27 BST_CHG 1 2 4 AO4466L_SO8
1

AGND BTST
PC112 BQ24740VREF PU101 0.1U_0402_10V7K
PACIN_1 1 2 10 BQ24740RHDR_QFN28_5X5 26 DH_CHG BATT
VREF HIDRV PL102
PR112

3
2
1
3

1U_0603_6.3V6M +3VL 10U_LF919AS-100M-P3_5.3A_20%

PR111 11 25 LX_CHG 1 2 1 4
3K_0402_1% PQ109B VDAC PH

1
PACIN 1 2 5 PD102 2 3

5
6
7
8
2N7002KDW-2N_SOT363-6 PR113 VADJ 12 24 REGN 2 1 PR141
PD101 140K_0402_1% VADJ REGN 4.7_1206_5%
4

ACOFF# PR114 RLS4148_LL34-2 0.015_1206_1%

1 2

@1000P_0402_50V7K
2 2

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
43.2K_0402_1% 13 23 DL_CHG
2

2 2
EXTPWR LODRV

1
1SS355_SOD323-231 VCTRL 1 2

PC113

PC114

PC115

PC116

PC136

PC131
4
1

14 22 PC135

2
ISYNSET PGND
1

470P_0603_50V8J

DPMDET

1
1
PC117 PR115

IADAPT
1 2

SRSET

CELLS

1
0.1U_0603_16V7K 100K_0402_1% PC119

SRN

SRP
2

3
2
1
BAT
PR116 PQ110
2

15K_0402_1% 1U_0603_10V6K AO4468L_SO8 PC118

2
0.1U_0402_10V7K

15

16

17

18

19

20

21
PR117
100K_0402_5% BQ24740VREF

IADAPT
PR118
Charge Detector 1 2

1
10K_0402_5%
1 2
31 ADP_I 47K_0402_5%

1
D PR119

100P_0402_50V8J
0.22U_0603_10V7K
1

1
PQ111 2 BAT_ID 34

2
SSM3K7002FU_SC70-3
PC120

PC121
G
S

BATT
2

3
SRP
SRN

0.1U_0603_25V7K

@0.1U_0603_25V7K
VIN
PR120
2 1 IREF 31

PC122
133K_0402_1%

PC124
2

1
PC123
1

PD104 0.1U_0402_10V7K PR122

2
1SS355_SOD323-2 PR121 681K_0402_1%
200K_0402_1% 1 2
2

PR123
1

1M_0402_5%
3
1 2 3
1VIN_1

PR124
+3VL VIN 1K_0402_5%
VIN 1 2
PR125 +3VL ACIN 31

1
47_1206_5%
PR126
1

100K_0402_1% PR127
10K_0402_5%
2

VIN PR130 10K_0402_1%

1

8
+3VL 2.15K_0402_1% PU102B
PR128
10K_0402_1%

2
1 2 5

P
+
1

PACIN
PR129

7
2

O
1

PR131 6
100K_0402_5%

G
133K_0402_1% PC125 CHGEN#
2

1
0.1U_0603_25V7K PC126 LM393DG_SO8
PR132

PR133
2

4
6

1
0.047U_0402_16V7K 10K_0603_0.1%
2

PR134
2

2
3 PQ112A PD103 10K_0402_5%
P

2
+ RLZ4.3B_LL34
1 2
O
1

2 2N7002KDW-2N_SOT363-6

2
-
G

PU102A
PR135
1

LM393DG_SO8 FSTCHG#
4

10K_0603_0.1% PR136
3

60.4K_0402_1%
2

1 2 VIN_1
1.24VREF PQ112B
31 FSTCHG 5
2N7002KDW-2N_SOT363-6
STD_ADP 31
4

PU104

4 3 1.24VREF
ACDET REF CATHODE
1 2

1
PC127 2
PR137 NC
22P_0402_50V8J
1

4 4
20K_0402_1% 5 1
100K_0402_1%

2
ANODE NC
PR138

LMV431ACM5X_SOT23-5
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/05/29 Deciphered Date 2008/05/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Charger
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 35 of 45
A B C D
 A B C D E

2VREF_51125

1U_0603_16V7

1
1 1

PC302

2
PR301 PR302
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2

PR303 PR304
B+ B++
20K_0402_1% 20K_0402_1%
B++
PL301 1 2 1 2
HCB2012KF-121T50_0805

1 2 +3VLP

ENTRIP2

ENTRIP1
PR305 PR306
2200P_0402_50V7K
0.1U_0402_25V6

0.1U_0402_25V6
4.7U_0805_25V6-K

100K_0402_1% 140K_0402_1%

4.7U_0805_25V6-K

4.7U_0805_25V6-K
1

1
PC316

PC301

PC303

PC317
1 2 1 2

2200P_0402_50V7K
10U_0805_6.3V6M

1
PC304

PC305

PC313
2

2
PQ301

2
6

5
6
7
8
PU301

PC306

1
1 8 UG1_3V

ENTRIP2

VFB2

TONSEL

VFB1

ENTRIP1
VREF
D1 1G PQ302
2 D1 1S/2D 7 25 P PAD
2 3 6 AO4466L_SO8 2

2
G2 1S/2D
4 S2 1S/2D 5
7 VO2 VO1 24 4

UG1_5V
AO4932_2N_SO8 PR308 PC308
8 VREG3 PGOOD 23
PR307 2.2_0402_5% 0.1U_0402_10V7K
1 2 1 2 BST_3V 9 22 BST_5V 1 2 1 2

3
2
1
0_0402_5% VBST2 VBST1
PL302 PC307 UG_3V 10 21 UG_5V PL303
3.3UH_SIQB74B-4R7PF_5.9A_20% 0.1U_0402_10V7K DRVH2 DRVH1 10U_LF919AS-100M-P3_5.3A_20%
2 1 LX_3V 11 20 LX_5V 1 2
+3VALWP LL2 LL1

5
6
7
8
LG_3V 12 19 LG_5V +5VALWP
DRVL2 DRVL1

SKIPSEL

4.7_1206_5%
@4.7_1206_5%

VREG5

150U_D_6.3VM
1
1

1
VCLK
1

GND
B++

EN0

VIN
+ PR309
PC309
220U_6.3VM_R15

+
PR315

PR316

PC310
1 2 4
1M_0402_1%

13

14

15

16

17

18
2 RT8205AGQW
2

2
2

1
34 EN0_TRIP
@680P_0603_50V7K

680P_0603_50V8J

3
2
1
VL PQ304

191K_0402_1%
1

1
AO4712L_SO8
PC314

PC315
PR311
2

2
1

PC311
10U_0805_10V6K
2
3 3

1
PR318
6 ENTRIP1

B++
3ENTRIP2

1 2

0.1U_0603_25V7K
0_0805_5% +3_5V PWR_OK 13

2
PC312
2VREF_51125

PQ305A PQ305B
2 5
2N7002KDW -2N_SOT363-6 2N7002KDW -2N_SOT363-6
+5VL
1

VL
PJP304
2 1
PJP302 PAD-OPEN 2x2m
1 2 VL +5VALW P 1 2 +5VALW (4.5A,180mils ,Via NO.= 9)
PR313 +3VLP +3VL
PAD-OPEN 4x4m
100K_0402_5% PJP301
D
1

PQ307 PJP303
2 1
2 +3VALW P 1 2 +3VALW (3A,120mils ,Via NO.= 6)
G PAD-OPEN 2x2m
S SSM3K7002FU_SC70-3
EC_ON 31 PAD-OPEN 4x4m
3

4 4
100K_0402_5%
PR314
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/05/29 Deciphered Date 2008/05/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
3.3VALWP/5VALWP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 36 of 45
A B C D E
 5 4 3 2 1

D D

1.5V_B+ PL402 B+
HCB1608KF-121T30_0603
2 1

PR404
2 1
24,31,32,33 SYSON
0_0402_5% PC406

1
@0.1U_0402_10V7K

2200P_0402_50V7K
4.7U_0805_25V6-K

4.7U_0805_25V6-K

0.1U_0402_25V6
2

PC408
PC402

PC403

PC407
PR405 PC409

2
2.2_0402_5% 0.1U_0402_10V7K
BST_1.5V 1 2 1 2
UG1_1.5V 4

15

14
1
PU401 PQ401
PR406 PR407 AON7408L_DFN8-5

EN_PSV

TP

VBST

3
2
1
255K_0402_1% 0_0402_5% +1.5VP
1 2 2 13 UG_1.5V 1 2 PL401
C TON DRVH 2.2UH_PCMC063T-2R2MN_8A_20% C

+1.5VP 1 2 3 12 LX_1.5V 1 2
PR408 0_0402_5% VOUT LL
+5VALW 1 PR403 14.3K_0402_1%
+5VALW 2 4 V5FILT TRIP 11 1 2
PR409 PR401

5
6
7
8

1
+1.5VP 1 2 FB_1.5V 5 10 +5VALW +5VALW 1
316_0402_1% VFB V5DRV PQ402 PR410

220U_B2_2.5VM_R25M
1

1
10.2K_0603_0.1% LG_1.5V AO4712L_SO8 4.7_1206_5% +

PC401
6 PGOOD DRVL 9

2
PGND
PC411 PC410

GND
1
1U_0603_10V6K 4.7U_0805_10V6K PC405
2

1 2
PR402 4.7U_0805_6.3V6K 2
4

1
10K_0603_0.1%

8
TPS51117RGYR_QFN14_3.5x3.5
PC412

2
220P_0603_50V8J

3
2
1
B B

PJP401

+1.5VP 1 2 +1.5V (8A,320mils ,Via NO.= 16)

PAD-OPEN 4x4m

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/05/29 Deciphered Date 2008/05/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.5VP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 37 of 45
5 4 3 2 1
 A B C D

1 1

B+ PL702
HCB2012KF-121T50_0805
1 2 VCCP_B+

2200P_0402_50V7K
0.1U_0402_25V6

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
+3VS +VCCP
1

1
PC707

PC708 1 2
PR705 PR706 PR707

PC704

PC705

PC706

PC718
2

2
1K_0402_5% @1K_0402_5% 1 2 1 2 0_0603_5%
PR708
2.2_0603_5% PC709

BST_VCCP
2

DH_VCCP
LX_VCCP
0.22U_0603_16V7K
+5VALW
6 VCCP_POK

DH_VCCP1

5
6
7
8
PR709
0_0402_5% PR710 PQ701

17

16

15

14

13
PU701 2.2_0603_5% AO4474L_SO8
1 2

UG
GND

PGOOD

PHASE

BOOT
+6269_VCC

2
4
1 VIN PVCC 12 1 2 PC710
+6269_VCC 2.2U_0603_6.3V6K

3
2
1
2 11 DL_VCCP PL701
VCC LG 0.36UH_PCMC104T-R36MN1R17_30A_20%
1

PC711 PR711 ISL6269ACRZ-T_QFN16_4X4 1 2

2

2.2U_0603_6.3V6K 0_0402_5%
+1.05V_VCCP 2

1 2 3 10 +VCCP
2

FCCM PGND
1

220U_B2_2.5VM_R25M
5

330U 2V Y D2 LESR9M

330U 2V Y D2 LESR9M
PR712 +

PC701
1

330U 2V Y D2 LESR9M
SE_VCCP 1 4.7_1206_5%

PC703
1 2 4 9 2
24,27,31,33,35,39 SUSP# EN ISEN PR704 PQ702 +

PC702

PC719
PR713 1 1
COMP
2

FSET
10.5K_0402_1%
0_0402_5%

2
+ +

VO
4
FB
2
1

2
5

8
2 2
PC712 PC713
2

3
2
1

1
@0.1U_0402_10V7K +1.05V_VCCP S TR AON6718L 1N DFN 680P_0603_50V7K
FB_VCCP
22.6K_0402_1%

0.01U_0402_16V7K
1

1
PR714

49.9K_0402_1%
PR715

PC714
2
1

2
6800P_0603_50V7K

PC715
22P_0402_50V8J PJP701
2

+1.05V_VCCP 1 2 +VCCP (18A,720mils ,Via NO.= 36)

PAD-OPEN 4x4m
PC716
2

3
PJP702 3

1 2 1 2 1 2+1.05V_VCCP 1 2
9 VTT_SELECT PR701 PR702 PR716
35.7K_0402_1% 1.58K_0402_1% 10_0402_5% PAD-OPEN 4x4m
1

VTT_SELECT= Low, 1.1V PR703 PC717 1 2

1.96K_0402_1% PR717 VTT_SENSE 9
VTT_SELECT= High, 1.05V
2

0_0402_5%
2

@0.1U_0402_10V7K PJP703
+1.05V_VCCP 1 2 +1.05VS (8A,320mils ,Via NO.= 16)
PAD-OPEN 4x4m

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/09/15 Deciphered Date 2009/09/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.05V_VCCP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 38 of 45
A B C D
 5 4 3 2 1

+1.5V

PU601
1 VIN VCNTL 6 +5VALW +5VALW

@10U_0805_10V6K
D 2 5 +3VS D
GND NC

1
PC607

PC602

1
PC601 3 7 1U_0603_10V6K
VREF NC

1
10U_0805_10V6K

2
PR601 PC603
4 8

2
VOUT NC

1
1K_0402_1% 1U_0603_10V6K

2
9 PC608

2
TP

6
PU602 10U_0805_10V6K

2
G2992F1U_SO8 APL5930KAI-TRG SOP 8P 5

VCNTL
VIN
7 POK
VOUT 4
+3VALW
+0.75VSP

0.1U_0402_16V7K
+1.8VSP

1
VOUT 3

1
PR609 PQ601 PR602 SUSP# 1 2 8 2
24,27,31,33,35,38 SUSP# EN FB

1
10K_0402_1% SSM3K7002FU_SC70-3 PR605

GND
1K_0402_1%

1
D PC605 0_0402_5% 9

2
10U_0805_6.3V6M TP PC610

PC604
2

2
G PC609 22U_0805_6.3V6M

2
2

1
PQ602 S @0.1U_0402_10V7K

3
1

1
SSM3K7002FU_SC70-3 PR606

PR603

PR604
1
D PC606 15K_0402_1% PC611

2
6 1.5VSCPU_DRAM_PWRGD 1 2 2 150P_0402_50V8J

2
G

@0.1U_0402_10V7K
S

@0_0402_5%

@0_0402_5%
3
PR608
1

1
0_0402_5%

PR607
2

PC612 12K_0402_1%
@0.1U_0402_10V7K

2
C C
9,33 SUSP
26,33 SYSON#

PJP601

+0.75VSP 1 2 +0.75VS (2A,80mils ,Via NO.= 4)

PAD-OPEN 3x3m

PJP602
+1.8VSP 1 2 +1.8VS (1.5A,60mils ,Via NO.= 3)
PAD-OPEN 3x3m

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/11/23 Deciphered Date 2007/11/23 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
0.75VP/1.8VSP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 39 of 45
5 4 3 2 1
 8 7 6 5 4 3 2 1

+VCCP CPU_B+ PL203

HCB2012KF-121T50_0805
2 1 B+

1 PR201 2

1 PR204 2

2
PL204

1K_0402_1%
@1K_0402_1%

@1K_0402_1%

@1K_0402_1%

@1K_0402_1%

@1K_0402_1%
HCB2012KF-121T50_0805

1K_0402_1%
1PR202

1PR203

1PR205

1PR206

1PR207
2 1

100U_25V_M
@100U_25V_M
0.1U_0402_25V6
2200P_0402_50V7K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
1 1

PC209

PC210
1

1
H_VID0 + +

PC205

PC206

PC207

PC208

PC212
H 9 H_VID0 H

PC211
9 H_VID1 H_VID1

2
2 2

5
6
7
8
9 H_VID2 H_VID2
PQ202
9 H_VID3 H_VID3 AO4406AL 1N SO8

1 PR210 2
H_VID4

1K_0402_1%
9 H_VID4

1 PR208

1 PR209
4

1K_0402_1%
@1K_0402_1%
9 H_VID5 H_VID5

9 H_VID6 H_VID6

3
2
1
2

2
PR211 0_0402_5% PR215 PC213
2.2_0603_5% 0.22U_0603_10V7K

1 PR212

1 PR213

1 PR214
1 2

1K_0402_1%

1K_0402_1%

1K_0402_1%
@1K_0402_1%
31 VR_ON
BOOST_CPU2 PR218

1PR216
2<BOM Structure>
1 1 2
PR217 0_0603_5% 0.36UH +-20% MPO104F-R36H1
+VCCP 2 1 UGATE_CPU2 2 1 PL202
G 1K_0402_1% PR219 0_0402_5% G

9 H_DPRSLPVR 1 2 PHASE_CPU2 4 1 +VCC_CORE

2 PR220 1 LF2 3 2

5
@1K_0402_1% V2N

1
PQ204

10K_0402_1%
3.65K_0603_1%
1

1
+3VS 19 CLK_EN# PR222 TPCA8036-H_SOP-ADV8-5 PR221
1.91K_0402_1% 4.7_1206_5% PR225
CLK_EN# 1_0402_5%

PR224
1 2
1

LGATE_CPU2

PR223
4

2
PR227 PR226 VSUM-

680P_0603_50V7K
1
0_0402_5% 1.91K_0402_1%
2

3
2
1

PC214
1 2

2
13,19 VGATE PR228 @1K_0402_5% ISEN2
+VCCP 1 2
VSUM+
F PR229 0_0402_5% F

9 H_PSI# 1 2
PR230
2 1
1K_0402_1%
1 2
PR231 147K_0402_1%
PC215
1 PR232
2 1U_0603_10V6K
40
39
38
37
36
35
34
33
32
31

+VCCP
68_0402_5% PU201 1 2
CLK_EN#

VID6
VID5
VID4
VID3
VID2
VID1
VID0
DPRSLPVR
VR_ON

1 2
6 H_PROCHOT# 30
PR233 0_0402_5% BOOT2
29
UGATE2
1 28
PGOOD PHASE2
2 27
PSI# VSSP2
3 26
RBIAS LGATE2
4 25 +5VALW
VR_TT# VCCP
E 5 24 E
NTC PWM3
6 23
VW LGATE1
7 22
COMP VSSP1
8 21
FB PHASE1
1 2 9
ISEN3
UGATE1

10 ISL62883HRZ-T_QFN40_5X5
BOOT1
ISUM+

ISEN2
ISEN1

ISUM-
VSEN

IMON

PC216 1 2
8.06K_0402_1%

1U_0603_10V6K
1000P_0402_50V7K

VDD
RTN

VIN

22P_0402_50V8J 41
AGND
1

0_0402_5%
PC217

PC218

PR234
PR235

11
12
13
14
15
16
17
18
19
20
2

390P_0402_50V7K
1 PR236 2 1 2
2

562_0402_1%
PC219
PR238 0_0402_5%
1 2 1 2 1 2
PC220
10P_0402_50V8J PR237 PR239 0_0402_5% IMVP_IMON 9
D 3.01K_0402_1% 1 2 CPU_B+ D
1 2 1 2
0.22U_0603_25V7K

PC221
150P_0402_50V8J PR240 PR241 1_0402_5%
412K_0402_1% 1 2 CPU_B+
+5VALW
1

1
PC222

PC223

PC224
1U_0603_10V6K

0.22U_0603_25V7K

ISEN2
PR242
0.22U_0603_10V7K

0.22U_0603_10V7K

ISEN1 10.5K_0402_1%

0.1U_0402_25V6
2200P_0402_50V7K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
5
6
7
8
2

PQ201

1
VSSSENSE AO4406AL 1N SO8
BOOST_CPU1

PC201

PC202

PC203

PC204

PC228
PR243

PC227
1

0_0603_5%
PC225

PC226

2
UGATE_CPU1 2 1 4
2

VSUM-
PR244 PC229
C 2.2_0603_5% 0.22U_0603_10V7K C

3
2
1
VSUM+ 2<BOM Structure>
1 1 2 0.36UH +-20% MPO104F-R36H1 30A

PL201
1

PHASE_CPU1 4 1 +VCC_CORE
1

PR245
2.61K_0402_1%
0.047U_0603_16V7K

1
82.5_0402_1% LF1
PR246

3 2
0.22U_0603_10V7K

5
PR247 V1N
1

1
1 2 PQ203 4.7_1206_5%
0.01U_0402_25V7K
2

0.022U_0402_16V7K

1
TPCA8036-H_SOP-ADV8-5 PR251

10K_0402_1%
2

PR249 0_0402_5% 1_0402_5%

3.65K_0603_1%
VCCSENSE
2

2
1

PC230

PR248

PR250
1

PC233 LGATE_CPU1
PC231

PC232

2
330P_0402_50V7K
PC234
2

2
330P_0402_50V7K

680P_0603_50V7K
2

1
VSUM-
PC237

PC235
3
2
1

2
1

B PR253 B
11K_0402_1%
1

PC236 1.3K_0402_1% PH201

PR255

1000P_0402_50V7K 1 2
PR252 0_0402_5% 10KB_0603_5%_ERTJ1VR103J ISEN1
2

9 VSSSENSE 1 2
2

VSUM+

PC238 PR256
1 21 2 VSUM-

@1200P_0402_50V7K @100_0402_1%
0.1U_0402_16V7K
1

PC239
2

A A
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/05/29 Deciphered Date 2008/05/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+CPU_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Calpella_UMA_LA4106P 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 40 of 45
8 7 6 5 4 3 2 1
 5 4 3 2 1

D PL802 D
B+ HCB2012KF-121T50_0805
1 2 GFX_B+
PL803

2200P_0402_50V7K

0.1U_0402_25V6
4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

2
HCB2012KF-121T50_0805 PR833
1 2 PR802 0_0402_5%

1
0_0603_5% 2 1

PC805

PC806

0.22U_0603_25V7K

0.22U_0402_6.3V6K
PR801

PC801

PC802

PC803

PC804
+5VALW 2 1

22.6K_0402_1%
9 GFXVR_IMON

1 1

1
1_0603_5%

1
PC808

PR803

PC809
PC807

2
1U_0603_6.3V6M

2
PR804
10_0402_5% VSS_AXG_SENSE
1 2 ISUM+

5
6
7
8
ISUM- PQ801
1 2 BST_GFX 1 2 1 2 AO4474L_SO8
9 VSS_AXG_SENSE PC810
1

1000P_0402_50V7K PR805 PC811

PC813 2.2_0603_5% 0.22U_0603_16V7K 4
9 VCC_AXG_SENSE 330P_0402_50V7K

29

10

11

12

13

14
1 2
2

9
PR806
+GFX_CORE 10_0402_5% PC812

ISUM
AGND

RTN

VDD

VIN

IMON
ISUM+

BOOT
1 2 330P_0402_50V7K

3
2
1
PR807
0_0603_5%
C 7 15 DH_GFX 1 2 DH_GFX1 +GFX_CORE C
VSEN UGATE PL801
6 PU801 16 LX_GFX 1 4
FB ISL62881HRZ-T_QFN28_4X4 PHASE

5
5 COMP VSSP 17 2 3

1
4 VW LGATE 18 DL_GFX .56UH +-20% ETQP4LR56 W FC 21A
PR810
PR809

1
PR813 PR814 PC815 PR808 2 1 3 19 1 2 +5VALW 2.2_1206_5%
10.2K +-1% 0402 825K_0402_1% 1000P_0402_50V7K 47K_0402_1% RBIAS VCCP PR811 PR812
0_0603_5% 4

1
2 20 3.65K_0805_1% 0_0402_5%

2
PGOOD VID0
2 1 1 2 1 2 2 1
1 21 PC816 PH801

DPRSLPVR

2
CLK_EN# VID1

2
PC814 2.2U_0603_6.3V6K 1 2 1 2

3
2
1
100P_0402_50V8J +GFX_CORE PQ802

VR_ON
PR815
PC817 2.61K_0402_1% 10KB_0603_5%_ERTJ1VR103J

VID6

VID5

VID4

VID3

VID2

1
PC819 AON6718L 1N DFN 680P_0603_50V7K
22P_0402_50V8J
2 1 2 1 1 2 2 1

28

27

26

25

24

23

22
@10K_0402_1% PR818
1 2
@1.91K_0402_1%

11K_0402_1%
1

PC818 PR816 PR817

150P_0402_50V8J 17.8K_0402_1% 8.06K_0402_1% PC820
PR819

PR820

.1U_0402_16V7K
1 2
2

B B
GFXVR_PW RGD
1 2
PC821
GFXVR_CLKEN#

2
0_0402_5% 2 1 PR821 0.1U_0603_16V7K
0_0402_5% PR822 GFXVR_VID_0 9 PR825 PR823
2 1 GFXVR_VID_1 9
0_0402_5% 2 1 PR824 3.01K_0402_1% @100_0402_1%
0_0402_5% PR826 GFXVR_VID_2 9 PR829
2 1 GFXVR_VID_3 9
0_0402_5% 2 1 PR827 82.5_0402_1%

1
0_0402_5% PR828 GFXVR_VID_4 9
2 1 GFXVR_VID_5 9 1 2 1 2
0_0402_5% 2 1 PR830
GFXVR_VID_6 9

2
0_0402_5% 2 1 PR831 PC822
0_0402_5% PR832 GFXVR_EN 9 0.01U_0402_16V7K PC823
2 1 GFXVR_DPRSLPVR 9
@180P 50V J NPO 0402

1
ISUM+

ISUM-

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/10/31 Deciphered Date 2009/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VCCGFX
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Calpella_UMA_LA4106P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 41 of 45
5 4 3 2 1
 A B C D E

Version Change List ( P. I. R. List ) for Power Circuit

Item Page# Title Date Request Issue Description Solution Description Note
Owner
1 1 36 PWR-3.3VALWP/5VALWP 8/12 PWR all cap no more than 0805 Add PC313,PC305 from 1206 to 0805 and parallel PC313 DB to PV1 1

OCP & IMON ajustment and Change PR253 from 1.1K to 1.3K,Change PR242 from 8.25K to 10.5K
2 40 PWR-CPU_CORE 8/13 PWR Fixed LL to match INTEL Spec Change PR237 from 2.43K to 3.01K DB to PV1
3 40 PWR-CPU_CORE 8/17 PWR RF Solution 
Change PQ201 PQ202 from AO4474L to AO4406AL DB to PV1
4 39 PWR-0.75VP/1.8VSP 8/20 PWR Cost Down plan Change PU602 from APL5915 to APL5930 DB to PV1
5 35 PWR-Charger 8/20 PWR Smart Charger Change PR113 from 143K to 140K, Change PC117 from 1u to 0.1u, Add PR114 DB to PV1
Follow HW Suggestion Pull-up
6 38 PWR-1.05V_VCCP 8/24 PWR resistor connect to 3VS Add PR705 connect to 3VS, remove PR706 DB to PV1
7 37 PWR-1.5VP 8/24 PWR PU401 second source solution PR403 from 8.45K to 14.3K DB to PV1
8 38 PWR-1.05V_VCCP 8/24 PWR PU701 second source solution PR703 from 8.25K to 10.5K DB to PV1
9 40 PWR-CPU-CORE 8/28 PWR Improve transient response Add PC230 DB to PV1
10 38 PWR-1.05V_VCCP 9/2 PWR Cost down plan PQ702 from TPCA8028-H to AON6718L DB to PV1
2 2
11 38 PWR-1.05V_VCCP 9/3 PWR Improve VCCP Ripple Delet PC717 DB to PV1
12 41 GFX_CORE 9/11 PWR Let GFX IMON measure easily Add PR833 connet to GFXVR_IMON and PU801 13pin PV1 to PV2
For HW requirement add
13 39 PWR-0.75VP/1.8VSP 9/11 PWR 1.5VSCPU_DRAM_PWRGD 
Add 1.5VSCPU_DRAM_PWRGD add PR608 connect to PQ601 pin 2 and Delet PR604 PV1 to PV2

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Changed-List History-1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 42 of 45
A B C D E
 5 4 3 2 1

Item PAGE Fixed Issue Request by Modify List Date Note

01 22 HW Add R801 7/20. DB --> PV-1
02 26 Fix Volum up/down cannot work on Docking. HW Add R1185, R1186 and pull high to +3VS. 7/20. DB --> PV-1
03 31 Remove double pull high resistor. HW Delete R660. 7/20. DB --> PV-1
04 13 Per EMI request. EMI Change R679 from 33 ohm to 100 ohm. 7/20 DB --> PV-1
05 31 Modify correct pull high resistor value. HW Change R512 and R513 from 4.7K to 2.2K ohm. 7/20 DB --> PV-1
06 32 Modify LVDS PWM connection. HW Connect R890 to PCH and R505(reserve) to EC. 7/24 DB --> PV-1
D D
07 22 Fix cannot hot plug if use Asmedia level shifter. HW Remove R862 and R867. 8/13 DB --> PV-1
08 22 Add series for Express card delete signal
between Express card power swtich and PCH HW Add R1210 8/13 DB --> PV-1
09 31 For Board ID. HW Add R386 and pull low to GND. 8/13 DB --> PV-1
10 31 Change LAN power off control pin to U27 pin115. HW Connect U27 pin115 and add series resistor R543 to LAN power control circuit. 8/13 DB --> PV-1
11 31 Change LID switch power rail from +3VL to +3VALW. HW Pull high R526 to +3VALW. 8/13 DB --> PV-1
12 31 Delete useless parts. HW Delete R542 because already connect EC_UTX to MINI PCIE connector 8/13 DB --> PV-1
13 32 Change LID switch power rail from +3VL to +3VALW. HW Change JP11 pin 1 to +3VLALW. 8/13 DB --> PV-1
Reserve U30, R596, R650, R590, C681, C770, C679, C680, Q8;
14 33 For Cost down. HW add PJ2 to connect +1.5VS_CPU and +1.5VS power plan. 8/13 DB --> PV-1
15 33 Try to use +1.5VS to replace +1.8VS power rail. HW Add and reserve PJ3 to short +1.8VS and +1.5VS_CPU power plan. 8/13 DB --> PV-1
16 14 Modify prevent S3 leakage issue circuit. HW Connect PCH_DDR_RST from EC GPIO48 to PCH GPIO46. 8/13 DB --> PV-1
17 31 Modify prevent S3 leakage issue circuit. HW Delete R386 8/13 DB --> PV-1
18 21 Fix LCD panel no display issue. HW Connect JLVDS1 pin27 to +3VS. 8/13 DB --> PV-1
19 32 Change Cap. board power rail from +3VL to +3VS. HW Reserve R1211 and connect to +3VS. 8/13 DB --> PV-1
20 27 Swap Audio port A and F. HW Swap port A and port F. Detail please see audio circuit. 8/17 DB --> PV-1
21 6 Delete XDP connector HW Delete JP1, R13, R17, R18, R19, R22, R25, C1 8/17 DB --> PV-1
C C
22 25 Conecto Q15 to +3V_LAN. HW Delete R1031 and connect Q15 pin1 to +3V_LAN directly. 8/17 DB --> PV-1
23 26 Modify Audio circuit near docking side. HW Connect Q91 pin3 to GNDA and move it near Codec. 8/17 DB --> PV-1
24 27 Per EMI/ESD request. EMI/ESD Add R1212/C1433 for HDA_RST#_CODEC. Add C1434. Change R132/R135/R139 to C1435/C1436/C1437. 8/17 DB --> PV-1
Change U57 from reset IC to AND gate; add R1218 and reserve R383;
25 6 Modify prevent S3 leakage issue circuit. HW add voltage divider(R1216/R1217) for VTTPWRGOOD. 8/19 DB --> PV-1
26 25 Follow DIS. HW Change Y8 material. 8/19 DB --> PV-1
27 28 Per ESD request. ESD Add D61, D62 for OPP sku. 8/19 DB --> PV-1
28 32 Change cap. board power rail from +3VL to +3VS. HW Pull high R544 and R545 to +3VS power rail. 8/20 DB --> PV-1
29 14 Make sure PLT_RST# level is stable. HW Stuff R185. 8/20 DB --> PV-1
30 32 Reserve +3VL power rail for cap. board. HW Add and reserve R1219/R1220 to +3VL. 8/21 DB --> PV-1

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/02/13 Deciphered Date 2006/07/26 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Montevina Consumer Discrete 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 43 of 45
5 4 3 2 1
 5 4 3 2 1

Item PAGE Fixed Issue Request by Modify List Date Note

01 6 Make sure +1.5VS can ramp up early than +0.75VS. HW Connect 1.5VSCPU_DRAM_PWRGD to enable PU601. 9/11 PV-1 --> PV-2
02 11 ME fuction control enable/disable. SW/EC Add Q106, R1221, R1222 and connect to EC pin26. 9/11 PV-1 --> PV-2
03 13 For support ME function. SW/EC Connect SUS_PWR_ACK to EC pin76. 9/11 PV-1 --> PV-2
04 14 HM55 disable USB port6/port7. INTEL Change Bluetooth port6 to port12, change Fingerprinter port7 to port11. 9/11 PV-1 --> PV-2
05 27 To solve no Vref out when external MIC change from port A to port F. HW Reserve R431, add R and connect to +AVDD_CODEC. 9/11 PV-1 --> PV-2
06 27 Delete EC_BEEP from EC because useless. HW Delete EC_BEEP to EC.
D D
07 28 Delete ANA_MIC_DET net to EC.because useless. HW Delete ANA_MIC_DET to EC. 9/11 PV-1 --> PV-2
08 29 HM55 disable USB port6/port7. INTEL Change Bluetooth port6 to port12, change Fingerprinter port7 to port11. 9/11 PV-1 --> PV-2
09 31 Board ID is not enough when use pin81. EC Swap TP_BTN# and BDID, then add pull high resistor R1223 for BDID. 9/11 PV-1 --> PV-2
10 31 ME fuction control enable/disable. SW/EC Remove EC_BEEP and change to ME_EN, then connect ME_EN to Q106. 9/11 PV-1 --> PV-2
11 31 For support ME function. SW/EC Remove ANA_MIC_DET and change to SUS_PWR_ACK, then connect SUS_PWR_ACK to PCH. 9/11 PV-1 --> PV-2
12 31 Chagne ENE cap. board ESB bus power rail from +3VS to +3VL. HW Reserve R544/R545 and stuff R1219/R1220. 9/11 PV-1 --> PV-2
13 32 Chagnge Cap. board power rail from +3VS to +3VL. HW Reserve R1211 and stuff R1140. 9/11 PV-1 --> PV-2
14 9/11 PV-1 --> PV-2

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/02/13 Deciphered Date 2006/07/26 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Montevina Consumer Discrete 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 44 of 45
5 4 3 2 1
 5 4 3 2 1

Item PAGE Fixed Issue Request by Modify List Date Note

01 12 To solve RTL8401 cause BSOD 0xD1 issue. HW Change RTL8401 PCIE port from port3 to port5 (follow Rhett2.0), new add series resistor R506/0 ohm. 10/19 Delete this item in 10/26.
02 12 To solve HDMI signal jitter fail issue. Intel Add Y2, R131, C141. Change C142 from 0 ohm to 18pF. 10/19 PV-2 --> MV
03 19 To solve time too fast in DOS mode. HW Change R259 and R260 from 18pF to 22pF. 10/19 PV-2 --> MV
04 25 To solve RTL8401 cause BSOD 0xD1 issue. HW Change RTL8401 PCIE port from port3 to port5 (follow Rhett2.0) 10/19 Delete this item in 10/26.
05 31 To solve cannot power on when no CPU insert in ATE test. HW Add pull high resistro R13 to +3VL_EC for EC pin21. 10/20 PV-2 --> MV
06 33 To meet Intel power down sequence spec. HW Change R593 from 470 ohm to 22 ohm. 10/21 PV-2 --> MV
D D
07 09 To meet Intel power down sequence spec. HW Change R1182 from 470 ohm to 220 ohm. 10/21 PV-2 --> MV
08 13 Follow Intel schematic checklist rev2.0 change. HW Change R137 from 1K ohm to 10K ohm. 10/21 PV-2 --> MV
09 27 To solve audio noise issue. HW Add and reserve U59, R1228, C1443, C1444, C1445, C1446, R1226, R1227. 11/02 PV-2 --> MV
10 04 To solve ESD test fail. ESD Add and reserve C1438, C1439, C1440 near Q104. 11/03 PV-2 --> MV
11 17 To solve ESD test fail. ESD Add and reserve C1441 near JDIMM1. 11/03 PV-2 --> MV
12 18 To solve ESD test fail. ESD Add and reserve C1442 near JDIMM2. 11/03 PV-2 --> MV
13 28 To solve ESD test fail. ESD Add and reserve C1447 between GND and GNDA near internal MIC connector. 11/03 PV-2 --> MV
14 32 To solve EMI test fail. EMI Change R1148 from 0 ohm to bead (SM01000CY00), move C652 to near JP59. 11/03 PV-2 --> MV
15 32 To solve EMI test fail. EMI Move C652 to near JP59. 11/03 PV-2 --> MV
16 27 To solve audio noise issue. EMI Move C652 to near JP59. 11/03 PV-2 --> MV
17 27 Reserve ref. power for external MIC. HW Reserve R1230 to connect +VREFOUT_INMIC. 11/05 PV-2 --> MV
18 27 To solve GFX power spike when S0 to S3/S5. Intel Change R43 from 4.7K ohm to 249 ohm. 11/05 PV-2 --> MV
19 33 To meet Intel power down sequence spec. HW Change R592 from 470 ohm to 22 ohm. 11/05 PV-2 --> MV
20 6 To reduce powr noise from FAN. HW Add R597. 11/05 PV-2 --> MV

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/02/13 Deciphered Date 2006/07/26 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Montevina Consumer Discrete 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 45 of 45
5 4 3 2 1