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(3, 1, 4)
(Lec CHs, Lab CHs, Total CHs)
ABET Syllabus – Fall 2010 (Term-1, 1431/1432AH)
Textbook:
T. A. DeMassa and Z. Ciccone,” Digital Integrated Circuit,”, John
Wiley & Sons, 1996.
Revised by:
b. Student Outcomes Criterion 3 (a,….k) addressed by the Course:
All the specific outcomes of instructions listed above address the criterion 3
student outcome a, b, c, and e.
Specific Outcomes of Instruction 2, 3, 4, 5, and 6 listed above also concentrates
on the criterion 3 student outcome g and k.
List of Experiments:
Experiment 1 : Diode-Resistor Logic (DRL)
Experiment 2 : The BJT Inverter (RTL)
Experiment 3 : Diode-Transistor Logic (DTL)
Experiment 4 : Modified DTL NAND Gates
Experiment 5 : Transistor-Transistor Logic (TTL)
Experiment 6 : TTL Design Project
Experiment 7 : Resistor-loaded NMOS Inverter
Experiment 8 : CMOS Inverter
Grades
1. Hw : 5 pts
2. Quizzes : 10 pts
Revised by:
3. Midterm ; 20 pts
4. Lab : 20 pts
5. Final ; 45 pts
Revised by: