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IRFB3206PbF

IRFS3206PbF
IRFSL3206PbF
Applications HEXFET® Power MOSFET
l High Efficiency Synchronous Rectification VDSS
D 60V
2.4m:
in SMPS
l Uninterruptible Power Supply
RDS(on) typ.
l High Speed Power Switching max. 3.0m:
l Hard Switched and High Frequency Circuits G ID (Silicon Limited) 210A c
Benefits S ID (Package Limited) 120A
l Improved Gate, Avalanche and Dynamic
D
dV/dt Ruggedness D D
l Fully Characterized Capacitance and
Avalanche SOA
S S S
l Enhanced body diode dV/dt and dI/dt Capability D D D
G G G
l Lead-Free
l RoHS Compliant, Halogen-Free TO-220AB D2Pak TO-262
IRFB3206PbF IRFS3206PbF IRFSL3206PbF

G D S
Gate Drain Source

Standard Pack
Base Part Number Package Type Orderable Part Number
Form Quantity
IRFB3206PbF TO-220 Tube 50 IRFB3206PbF
IRFSL3206PbF TO-262 Tube 50 IRFSL3206PbF
Tube 50 IRFS3206PbF
IRFS3206PbF D2Pak Tape and Reel Left 800 IRFS3206TRLPbF
Tape and Reel Right 800 IRFS3206TRRPbF

Absolute Maximum Ratings


Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 210c
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 150c
A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 120
IDM Pulsed Drain Current d 840
PD @TC = 25°C Maximum Power Dissipation 300 W
Linear Derating Factor 2.0 W/°C
VGS Gate-to-Source Voltage ± 20 V
dv/dt Peak Diode Recovery f 5.0 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range
°C
Soldering Temperature, for 10 seconds 300
(1.6mm from case)
Mounting torque, 6-32 or M3 screw x
10lb in (1.1N m) x
Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy e 170 mJ
IAR Avalanche Current d See Fig. 14, 15, 22a, 22b, A
EAR Repetitive Avalanche Energy g mJ

Thermal Resistance
Symbol Parameter Typ. Max. Units
RθJC Junction-to-Case k ––– 0.50
RθCS Case-to-Sink, Flat Greased Surface , TO-220 0.50 –––
RθJA Junction-to-Ambient, TO-220 k ––– 62
°C/W

RθJA Junction-to-Ambient (PCB Mount) , D2 Pak jk ––– 40

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IRFB3206PbF/IRFS3206PbF/IRFSL3206PbF

Static @ TJ = 25°C (unless otherwise specified)


Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 60 ––– ––– V VGS = 0V, ID = 250μA
ΔV(BR)DSS/ΔTJ Breakdown Voltage Temp. Coefficient ––– 0.07 ––– V/°C Reference to 25°C, ID = 5mA d
RDS(on) Static Drain-to-Source On-Resistance ––– 2.4 3.0 mΩ VGS = 10V, ID = 75A g
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 150μA
IDSS Drain-to-Source Leakage Current ––– ––– 20 μA VDS =60V, VGS = 0V
––– ––– 250 VDS = 48V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
RG Internal Gate Resistance ––– 0.7 ––– Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 210 ––– ––– S VDS = 50V, ID = 75A
Qg Total Gate Charge ––– 120 170 nC ID = 75A
Qgs Gate-to-Source Charge ––– 29 ––– VDS =30V
Qgd Gate-to-Drain ("Miller") Charge ––– 35 VGS = 10V g
Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 85 ––– ID = 75A, VDS =0V, VGS = 10V
td(on) Turn-On Delay Time ––– 19 ––– ns VDD = 30V
tr Rise Time ––– 82 ––– ID = 75A
td(off) Turn-Off Delay Time ––– 55 ––– RG =2.7Ω
tf Fall Time ––– 83 ––– VGS = 10V g
Ciss Input Capacitance ––– 6540 ––– pF VGS = 0V
Coss Output Capacitance ––– 720 ––– VDS = 50V
Crss Reverse Transfer Capacitance ––– 360 ––– ƒ = 1.0MHz, See Fig.5
Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 1040 ––– VGS = 0V, VDS = 0V to 48V i, See Fig.11
Coss eff. (TR) Effective Output Capacitance (Time Related) ––– h 1230 ––– VGS = 0V, VDS = 0V to 48V h

Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 210 c A MOSFET symbol D

(Body Diode) showing the


ISM Pulsed Source Current ––– ––– 840 A integral reverse G

(Body Diode) d p-n junction diode.


S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 75A, VGS = 0V g
trr Reverse Recovery Time ––– 33 50 ns TJ = 25°C VR = 51V,
––– 37 56 TJ = 125°C IF = 75A
Qrr Reverse Recovery Charge ––– 41 62 nC TJ = 25°C di/dt = 100A/μs g
––– 53 80 TJ = 125°C
IRRM Reverse Recovery Current ––– 2.1 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Calculated continuous current based on maximum allowable junction „ ISD ≤ 75A, di/dt ≤ 360A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
temperature. Bond wire current limit is 120A. Note that current … Pulse width ≤ 400μs; duty cycle ≤ 2%.
limitations arising from heating of the device leads may occur with † Coss eff. (TR) is a fixed capacitance that gives the same charging time
some lead mounting arrangements. as Coss while VDS is rising from 0 to 80% VDSS .
‚ Repetitive rating; pulse width limited by max. junction ‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
temperature. Coss while VDS is rising from 0 to 80% VDSS .
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.023mH ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
RG = 25Ω, IAS = 120A, VGS =10V. Part not recommended for use mended footprint and soldering techniques refer to application note #AN-994.
above this value. ‰ Rθ is measured at TJ approximately 90°C

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IRFB3206PbF/IRFS3206PbF/IRFSL3206PbF

1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V

ID, Drain-to-Source Current (A)


ID, Drain-to-Source Current (A)

8.0V 8.0V
6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
4.8V 4.8V
BOTTOM 4.5V BOTTOM 4.5V

100 100
4.5V

4.5V ≤ 60μs PULSE WIDTH ≤ 60μs PULSE WIDTH


Tj = 25°C Tj = 175°C
10 10
0.1 1 10 100 0.1 1 10 100

VDS , Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics


1000 2.5
ID = 75A

RDS(on) , Drain-to-Source On Resistance


VGS = 10V
ID, Drain-to-Source Current(Α)

100 2.0
TJ = 175°C
(Normalized)

10
1.5
TJ = 25°C

1
1.0
VDS = 25V
≤ 60μs PULSE WIDTH
0.1
2.0 3.0 4.0 5.0 6.0 7.0 8.0 0.5
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature

12000 20
VGS = 0V, f = 1 MHZ ID= 75A
Ciss = Cgs + Cgd, Cds SHORTED
VDS = 48V
VGS, Gate-to-Source Voltage (V)

10000 Crss = Cgd


16 VDS= 30V
Coss = Cds + Cgd
VDS= 12V
C, Capacitance (pF)

8000
Ciss 12

6000
8
4000

4
2000 Coss

Crss 0
0
0 40 80 120 160 200
1 10 100
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage

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IRFB3206PbF/IRFS3206PbF/IRFSL3206PbF

1000 10000
OPERATION IN THIS AREA
LIMITED BY R DS (on)

ID, Drain-to-Source Current (A)


ISD, Reverse Drain Current (A)

1000
TJ = 175°C
100

1msec 100μsec
100

10
TJ = 25°C
10msec
10

1
1 Tc = 25°C
Tj = 175°C DC
VGS = 0V Single Pulse
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0.1 1 10 100

VSD , Source-to-Drain Voltage (V) VDS, Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area


Forward Voltage

V(BR)DSS , Drain-to-Source Breakdown Voltage


240 80
ID = 5mA
200 Limited By Package
75
ID, Drain Current (A)

160
70

120

65
80

60
40

0 55
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

T C , Case Temperature (°C) TJ , Junction Temperature (°C)


Fig 9. Maximum Drain Current vs. Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
2.0 800
EAS, Single Pulse Avalanche Energy (mJ)

I D
TOP 21A
33A
1.5 600 BOTTOM 120A
Energy (μJ)

1.0 400

0.5 200

0.0 0
0 10 20 30 40 50 60 25 50 75 100 125 150 175

VDS, Drain-to-Source Voltage (V) Starting TJ, Junction Temperature (°C)

Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
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IRFB3206PbF/IRFS3206PbF/IRFSL3206PbF

Thermal Response ( ZthJC ) D = 0.50

0.1 0.20
0.10
0.05
0.02
R1
R1
R2
R2
R3
R3 Ri (°C/W) τι (sec)
0.01 τJ τC
0.01
τJ
τ1
τ 0.106416 0.0001
τ2 τ3
τ1 τ2 τ3
0.201878 0.001262
Ci= τi/Ri
Ci= τi/Ri 0.190923 0.011922
SINGLE PULSE
0.001 ( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case


1000

Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche


pulsewidth, tav, assuming ΔTj = 150°C and
Avalanche Current (A)

100 Tstart =25°C (Single Pulse)


0.01

0.05
0.10
10

Allowed avalanche Current vs avalanche


pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 14. Typical Avalanche Current vs.Pulsewidth


200 Notes on Repetitive Avalanche Curves , Figures 14, 15:
TOP Single Pulse (For further info, see AN-1005 at www.irf.com)
BOTTOM 1% Duty Cycle 1. Avalanche failures assumption:
ID = 120A
EAR , Avalanche Energy (mJ)

160 Purely a thermal phenomenon and failure occurs at a temperature far in


excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
120
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
80 6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
40 tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
25 50 75 100 125 150 175 PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
Starting TJ , Junction Temperature (°C)
EAS (AR) = PD (ave)·tav

Fig 15. Maximum Avalanche Energy vs. Temperature

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IRFB3206PbF/IRFS3206PbF/IRFSL3206PbF

4.5 18
ID = 1.0A
16
VGS(th) Gate threshold Voltage (V)

4.0 ID = 1.0mA
ID = 250μA 14
3.5
ID = 150μA
12

IRRM - (A)
3.0
10

2.5 8

6
2.0 IF = 30A
4 VR = 51V
1.5 TJ = 125°C
2
TJ = 25°C
1.0 0
-75 -50 -25 0 25 50 75 100 125 150 175 100 200 300 400 500 600 700 800 900 1000

TJ , Temperature ( °C ) dif / dt - (A / μs)

Fig 16. Threshold Voltage Vs. Temperature Fig. 17 - Typical Recovery Current vs. dif/dt

18 350

16
300
14
250
12
QRR - (nC)
IRRM - (A)

10 200

8 150

6
IF = 45A 100 IF = 30A
4 VR = 51V VR = 51V
TJ = 125°C 50 TJ = 125°C
2
TJ = 25°C TJ = 25°C
0 0
100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 1000

dif / dt - (A / μs) dif / dt - (A / μs)

Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt

350

300

250
QRR - (nC)

200

150

100 IF = 45A
VR = 51V
50 TJ = 125°C
TJ = 25°C
0
100 200 300 400 500 600 700 800 900 1000

dif / dt - (A / μs)

Fig. 20 - Typical Stored Charge vs. dif/dt


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IRFB3206PbF/IRFS3206PbF/IRFSL3206PbF

Driver Gate Drive


P.W.
D.U.T P.W.
Period D=
Period
+

ƒ VGS=10V*
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
-
„ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG VDD Re-Applied


• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• I SD controlled by Duty Factor "D" - Inductor Current
Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices


Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

V(BR)DSS
15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
VGS
20V
tp 0.01Ω
I AS

Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms

LD
VDS VDS
90%
+
VDD -

D.U.T 10%
VGS VGS
Pulse Width < 1μs
Duty Factor < 0.1% td(on) tr td(off) tf

Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms
Current Regulator Id
Same Type as D.U.T. Vds

Vgs
50KΩ

12V .2μF
.3μF

+
V
D.U.T. - DS
Vgs(th)
VGS

3mA

IG ID
Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr

Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform
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IRFB3206PbF/IRFS3206PbF/IRFSL3206PbF

TO-220AB Package Outline


Dimensions are shown in millimeters (inches)

TO-220AB Part Marking Information

INTERNATIONAL PART NUMBER INTERNATIONAL PART NUMBER


RECTIFIER LOGO RECTIFIER LOGO

ASSEMBLY
IRFB3206
PYWW?
DATE CODE
P = LEAD-FREE
OR ASSEMBLY
IRFB3206
YWWP
DATE CODE
Y = LAST DIGIT OF YEAR
LOT CODE Y = LAST DIGIT OF YEAR LOT CODE WW = WORK WEEK
LC LC WW = WORK WEEK LC LC P = LEAD-FREE
? = ASSEMBLY SITE CODE

TO-220AB packages are not recommended for Surface Mount Application.

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

8 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback April 24, 2014
IRFB3206PbF/IRFS3206PbF/IRFSL3206PbF

D2Pak Package Outline (Dimensions are shown in millimeters (inches))

D2Pak Part Marking Information

INTERNATIONAL INTERNATIONAL
RECTIFIER LOGO PART NUMBER RECTIFIER LOGO PART NUMBER

ASSEMBLY
IRFS3206
PYWW?
OR ASSEMBLY
IRFS3206
YWWP
LOT CODE DATE CODE LOT CODE DATE CODE
LC LC P = LEAD-FREE LC LC Y = LAST DIGIT OF YEAR
Y = LAST DIGIT OF YEAR WW = WORK WEEK
WW = WORK WEEK P = LEAD-FREE
? = ASSEMBLY SITE CODE

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

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IRFB3206PbF/IRFS3206PbF/IRFSL3206PbF

TO-262 Package Outline (Dimensions are shown in millimeters (inches))

TO-262 Part Marking Information

INTERNATIONAL PART NUMBER INTERNATIONAL PART NUMBER


RECTIFIER LOGO FSL3206
OR RECTIFIER LOGO FSL3206
ASSEMBLY PYWW? ASSEMBLY YWWP
DATE CODE DATE CODE
LOT CODE LOT CODE Y = LAST DIGIT OF YEAR
P = LEAD-FREE
LC LC Y = LAST DIGIT OF YEAR LC LC WW = WORK WEEK
WW = WORK WEEK P = LEAD-FREE
? = ASSEMBLY SITE CODE

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

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IRFB3206PbF/IRFS3206PbF/IRFSL3206PbF

D2Pak Tape & Reel Information

TRR

1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161)
1.50 (.059) 0.368 (.0145)
3.90 (.153)
0.342 (.0135)

FEED DIRECTION 1.85 (.073) 11.60 (.457)


1.65 (.065) 11.40 (.449) 24.30 (.957)
15.42 (.609)
23.90 (.941)
15.22 (.601)
TRL
1.75 (.069)
10.90 (.429) 1.25 (.049)
10.70 (.421) 4.72 (.136)
16.10 (.634) 4.52 (.178)
15.90 (.626)

FEED DIRECTION

13.50 (.532) 27.40 (1.079)


12.80 (.504) 23.90 (.941)

330.00 60.00 (2.362)


(14.173) MIN.
MAX.

30.40 (1.197)
NOTES : MAX.
1. COMFORMS TO EIA-418. 26.40 (1.039) 4
2. CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)
3. DIMENSION MEASURED @ HUB.
3
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

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IRFB3206PbF/IRFS3206PbF/IRFSL3206PbF


Qualification information
Industrial
Qualification level ††
(per JEDEC JESD47F guidelines)
TO-220 N/A
Moisture Sensitivity Level D2Pak
MS L1
TO-262
RoHS compliant Yes

† Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/


†† Applicable version of JEDEC standard at the time of product release.

Revision History
Date Comment
• Updated data sheet with new IR corporate template.
4/24/2014 • Updated package outline & part marking on page 8, 9 & 10.
• Added bullet point in the Benefits "RoHS Compliant, Halogen -Free" on page 1.

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA


To contact International Rectifier, please visit http://www.irf.com/whoto-call/

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IMPORTANT NOTICE
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With respect to any examples, hints or any typical
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regarding the application of the product, Infineon WARNINGS
Technologies hereby disclaims any and all Due to technical requirements products may
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