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A B C D E

MODEL NAME : ZBW00


PCB NO :

1 1

Dell / Compal Confidential


2 Schematic Document 2

Intel Bay Trail M


OAK MLK UMA
X76@ : 76 level
46@ : 46 level
3VLP@For EC +3VLP
EMC@Pop EMC Component 2014-03-10 Rev: 2.0
3
ESD@Pop ESD Component 3

XDP@XDP Component

CONN@Connector Component BOM config


@Un-pop Component LM-43XXXXXXL01:N2910@/3VLP@/EMC@/ESD@/XDP@/3223@/JHP@
GCLK@For Green CLK func on LM-43XXXXXXL01:N2910@/3VLP@/EMC@/ESD@/XDP@/3234@/JHP@
JP@Jump Component
ZZZ R1@ ZZZ R3@

N3VLP@For EC +3VALW
NEMC@Un-pop EMC Component PCB ZBW00 LA-B481P LS-9101P/-9103P PCB ZBW00 LA-B481P LS-9101P/-9103P GOLD A31 !
NESD@Un-pop ESD Component DAZ16D00100 DAZ16D00101

TEST@Test Point USOC1 N2830R1@ USOC1 N2830R3@

4
TOUCH@For Touch Screen Func on S IC FH8065301729601 SR1UX C0 2.17G FCBGA 1170 S IC FH8065301729601 SR1UX C0 2.17G FCBGA 1170 A31 !
4

Part Number = SA00007QR1L Part Number = SA00007QR2L

N2910@CPU Component
N3510@CPU Component Compal Secret Data
Security Classification Compal Electronics, Inc.
R1@PCB Issued Date 2014/03/10 Deciphered Date 2015/03/31 Title

Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 1 of 42
A B C D E
5 4 3 2 1

204pin DDR3L-SO-DIMM X1
port 1 P.18
port 0
Memory BUS
XDP-SFF-26Pin Dual Channel
D RTD2132N HDMI Conn. Debug 1.35V DDR3L 1066/1333
D

Conn. P.16
P.19 P.21
DDI x2

LVDS Conn. USB2.0 x4


P.20 port 0 port 1 port 2 port 3

PCIE x4 Bay Trail-M


USB 2.0 USB 2.0 HD Camera USB HUB
port 1 Conn P.25 Conn P.25 Conn. FE1.1s(STT)
P.20 P.26
C

Mini Card SOC Debug Port


C

WLAN/BT4.0
Half P.26
FCBGA 1170 Pin Card Reader
SATA II x2 HD Audio
RTS5170
Port4 P.24

port 0
page 08~17

SATA HDD SM BUS LPC BUS SPI


Conn.
P.25 HDA Codec
ALC3223
SPI ROM P.23
B
EC 1.8V (8MB)
B

ENE KB9012 P.11


Speaker Int. MIC
P.32
P.23 P.23

RTC CKT.
P.10 Touch Pad Int.KBD Combo Jack
P.29 P.29 P.23

DC/DC Interface CKT.


P.29
A A

Power Circuit DC/DC LED/Power On/Off Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/03/10 Deciphered Date 2015/03/31 Title
P.27
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block diagram
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 2 of 42
5 4 3 2 1
A B C D E

Compal Confidential
Project Code : ZBW00
File Name : LA-B841P
1 1
LS-9101P (PWR/B)
UE5
Lid (SA00003VQ00)

SW1 4 pin-Hot Bar


(SN100004Y00)
PBATT
Battery

JMINI PJPDC
PWR-BTN FFC MINI Card
5 pin
4 pin JLVDS
40 pin

JKB
30 pin

2 2
JFAN
3 pin
HDMI
JHDMI JTP
6 pin
JTOUCH JPWR
6 pin 4 pin
XDP LA-B841P M/B
JXDP

JUSB1 USB Top Side JHDD


Bottom Side
TP-MB FFC
6 pin JUSB2 USB
(OAK MLK 15")
JRTC
2 pin
JSPK
3
4 pin JREAD 3

RTC
Card
TP-Module JHP HP Reader

Led1

TP-BTN FFC
4 pin
LS-9103P (TP-BTN/B)

4 pin
Hot Bar

SW2 SW3
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 Deciphered Date 2015/03/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DB block diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B481P
Date: Monday, March 10, 2014 Sheet 3 of 42
A B C D E
A B C D E

Voltage Rails Board ID / SKU ID Table for AD channel


Power Plane Description S0 S3 S4/S5 Vcc 3.3V +/- 5%
VIN 19V Adapter power supply ON ON ON Ra/Rc/Re 100K +/- 5%
BATT+ 12V Battery power supply ON ON ON Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
B+ AC or battery power rail for power circuit. (19V/12V) ON ON ON 0 0 0 V 0 V 0 V
1 1
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+RTCVCC RTC Battery Power ON ON ON 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+1.0VALW +1.0v Always power rail ON ON ON 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+1.8VALW +1.8v Always power rail ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+3VALW +3.3v Always power rail ON ON ON 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+5VALW +5.0v Always power rail ON ON ON 7 NC 2.500 V 3.300 V 3.300 V
+1.35V +1.35V power rail for DDR3L ON ON OFF
+SOC_VCC Core voltage for SOC ON OFF OFF BOARD ID Table
+SOC_VNN GFX voltage for SOC ON OFF OFF
Board ID PCB Revision BOM Option Table
+0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF
+1.0VS +1.0v system power rail ON OFF OFF
0 X01 Item BOM Structure
2
+1.05VS +1.05v system power rail ON OFF OFF
1 X02 Unpop @ 2

+1.35VS +1.35v system power rail ON OFF OFF


2 X03 Connector CONN@
+1.5VS +1.5v system power rail ON OFF OFF
3 A00 XDP (Debug Port) XDP@
+1.8VS +1.8v system power rail ON OFF OFF
4 EMC requirement EMC@
+3VS +3.3v system power rail ON OFF OFF
5 EMC requirement unpop @EMC@
+5VS +5.0v system power rail ON OFF OFF
6 TPM TPM@
7 Touch Screen TS@
R short RS@
Test Point TEST@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

3 3

EC SM Bus1 address EC SM Bus2 address 43 level BOM table


43 Level Description BOM Structure
Device Address Device Address
Smart Battery 0001 011X b SoC 0x9A
4319T731L01 SMT MB AB481 ZBW00 UMA BTM HDMI
N2830R1@/EMC@/ESD@/XDP@/3223@/JHP@/R1@
R1
MINI Card 0x98
SOC SM Bus address DDR 0x82

Device Address RTD2136 0x94

SO-DIMM A (JDIMM1) A0h

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/03/10 2015/03/31 Title
Issued Date Deciphered Date Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 4 of 42
A B C D E
5 4 3 2 1

2.2K 10K
SMBUS Address [0x9a]

2.2K
+3.3V_ALW_PCH 10K
+3VS

N-MOS
AP2 MEM_SMBCLK DDR_XDP_WLAN_TP_SMBCLK 202 DIMMA SMBUS Address [A0]
N-MOS
AH1 MEM_SMBDATA DDR_XDP_WLAN_TP_SMBDAT 200
D D
1K
202 DIMMB
+3.3V_ALW_PCH SMBUS Address [A4]
1K 200

AN1 SML0CLK
MCH 0 ohm
AK1 SML0DATA DDR_XDP_SMBCLK_R1 53 XDP1 SMBUS Address [TBD]
Shark bay 0 ohm
2.2K DDR_XDP_SMBDAT_R1 51

2.2K
+3.3V_ALW_PCH
30 JMINI SMBUS Address [TBD]
N-MOS 32
AN1 SML1_SMBCLK EC_SMB_CK2
N-MOS
AK1 SML1_SMBDATA EC_SMB_DA2
5 JTP SMBUS Address [TBD]
6

2.2K

C 2.2K
+3VALW C

0 ohm N-MOS 0 ohm LVDS


79 EC_SMB_CK2 CSCL CIICSCL 13 UV28 Translator SMBUS Address [TBD]
0 ohm N-MOS 0 ohm
80 EC_SMB_DA2 CSDA CIICSDA 14

2.2K

2.2K
+3VS_VGA

N-MOS
VGA_SMB_CK2 T4 UV28 GPU SMBUS Address [0xXX]
N-MOS
VGA_SMB_DA2 T3

2.2K

2.2K
+3VALW

0 ohm
77 EC_SMB_CK1 SCL 11 PU701 POWER SMBUS Address [0x12]
0 ohm Charger
KBC 78 EC_SMB_DA1 SDA 10

B
KB9012A4 100 ohm
B

3 PD1 4 BAT_ALERT 3 PBATT1 BATT SMBUS Address [0x16]


100 ohm CONN
1 6 BATT_PRS 5

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SMBus block diagram
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 5 of 42
5 4 3 2 1
5 4 3 2 1

D
S5->S0 S0->S3 S3->S0 S0->S5 D

ACIN
ACIN 2.267ms

+3VLP
+3VLP 800ns

EC_ON
EC_ON 697.9us

+3VALW
+3VALW 19.2us

+5VALW
+5VALW 13.58ms

SPOK
SPOK 7.875ms

+1.0VALW
+1.0VALW 1.53ms

+1.8VALW
+1.8VALW

ON/OFF
ON/OFF 102.6ms

101ms
EC_RSMRST#
EC_RSMRST#
PBTN_OUT#
C
PBTN_OUT# C
126ms
EC_SLP_S4#
EC_SLP_S5# 45us
7.76us
EC_SLP_S3#
EC_SLP_S3#
201.7ms 32.08ms 25.96ms
SYSON
SYSON 662.7us
4ms
+1.35V
+1.35V 4.035ms
4.39ms
28.65ms
DDR_PWROK
DDR_PWROK 8.504ms
152ms
VR_ON
VR_ON 2.407ms 36.81ms
11.29ms 2.425ms 4.994ms
+SOC_VCC
+SOC_VCC 34.24ms

+SOC_VNN
+SOC_VNN 224.4ms 26.33ms
223.9us 4.506ms
VGATE
VGATE
263ms 12.36ms 3.31ms 10.6ms 20.98ms
38.74us
SUSP#
SUSP# 31.53us
6.201ms 1.613ms
42.34us
+1.0VS
+1.0VS 634.2us
8.626ms 1.994ms
1.774ms
+1.05VS
+1.05VS 1.74ms
15.82ms 8.106ms
B
1.379ms
+1.35VS B
+1.35VS 1.355ms
22.2ms 12.49ms
2.838ms
+1.5VS
+1.5VS 2.712ms
14.99ms 12.2ms
+1.8VS
+1.8VS 3.447ms
23.98ms 3.459ms 15.62ms
+3VS
+3VS 4.175ms
28.91ms 4.324ms 21.51ms
+5VS
+5VS
9.797ms
+0.675VS
+0.675VS
51.46ms 22.2ms 51.95ms 12.96ms
KBRST#
KBRST#
61.19ms 5.647ms 60.81ms
PMC_CORE_PWROK
PMC_CORE_PWROK
7.321ms
DDR_CORE_PWROK
DDR_CORE_PWROK
584ms -290.3us
67.73ms
PMC_PLTRST#
PMC_PLTRST#

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date Power Sequence
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 6 of 42
5 4 3 2 1
5 4 3 2 1

D
S5->S0 S0->S3 S3->S0 S0->S5 D

ACIN
ACIN
+3VLP
+3VLP
EC_ON
EC_ON 531us
10.1ms
+3VALW
+3VALW 3.333us
-3.87ms
+5VALW
+5VALW 13.24ms
-6.494ms
SPOK
SPOK -6.69ms
6.744ms
+1.0VALW
+1.0VALW 1.457ms
-3.617ms
+1.8VALW
+1.8VALW

ON/OFF
ON/OFF 112.3ms

101ms
EC_RSMRST#
EC_RSMRST#
5.814us
PBTN_OUT#
C
PBTN_OUT# C
23ms
EC_SLP_S4#
EC_SLP_S5# 43.7us
7.76us
EC_SLP_S3#
EC_SLP_S3#
201.7ms 32.08ms 25.96ms
SYSON
SYSON 662.7us
4ms
+1.35V
+1.35V 4.035ms
4.39ms
28.65ms
DDR_PWROK
DDR_PWROK 8.504ms
152ms
VR_ON
VR_ON 2.407ms 36.81ms
11.29ms 2.425ms 4.994ms
+SOC_VCC
+SOC_VCC 34.24ms

+SOC_VNN
+SOC_VNN 224.4ms 26.33ms
223.9us 4.506ms
VGATE
VGATE
263ms 12.36ms 3.31ms 10.6ms 20.98ms
38.74us
SUSP#
SUSP# 31.53us
6.201ms 1.613ms
42.34us
+1.0VS
+1.0VS 634.2us
8.626ms 1.994ms
1.774ms
+1.05VS
+1.05VS 1.74ms
15.82ms 8.106ms
B
1.379ms
+1.35VS B
+1.35VS 1.355ms
22.2ms 12.49ms
2.838ms
+1.5VS
+1.5VS 2.712ms
14.99ms 12.2ms
+1.8VS
+1.8VS 3.447ms
23.98ms 3.459ms 15.62ms
+3VS
+3VS 4.175ms
28.91ms 4.324ms 21.51ms
+5VS
+5VS
9.797ms
+0.675VS
+0.675VS
51.46ms 22.2ms 51.95ms 12.96ms
KBRST#
KBRST#
61.19ms 5.647ms 60.81ms
PMC_CORE_PWROK
PMC_CORE_PWROK
7.321ms
DDR_CORE_PWROK
DDR_CORE_PWROK
584ms -290.3us
67.73ms
PMC_PLTRST#
PMC_PLTRST#

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date Power Sequence
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 7 of 42
5 4 3 2 1
5 4 3 2 1

D D

USOC1A USOC1B
<18> DDR_A_MA[0..15] DDR_A_D[0..63] <18>
DDR_A_MA0 K45 M36 DDR_A_D0 AY45 BG38
DDR_A_MA1 H47 DRAM0_MA_0 DRAM0_DQ_0 J36 DDR_A_D1 BB47 DRAM1_MA_0 DRAM1_DQ_0 BC40
DDR_A_MA2 L41 DRAM0_MA_1 DRAM0_DQ_1 P40 DDR_A_D2 AW41 DRAM1_MA_1 DRAM1_DQ_1 BA42
DDR_A_MA3 H44 DRAM0_MA_2 DRAM0_DQ_2 M40 DDR_A_D3 BB44 DRAM1_MA_2 DRAM1_DQ_2 BD42
DDR_A_MA4 H50 DRAM0_MA_3 DRAM0_DQ_3 P36 DDR_A_D4 BB50 DRAM1_MA_3 DRAM1_DQ_3 BC38
DDR_A_MA5 G53 DRAM0_MA_4 DRAM0_DQ_4 N36 DDR_A_D5 BC53 DRAM1_MA_4 DRAM1_DQ_4 BD36
DDR_A_MA6 H49 DRAM0_MA_5 DRAM0_DQ_5 K40 DDR_A_D6 BB49 DRAM1_MA_5 DRAM1_DQ_5 BF42
DDR_A_MA7 D50 DRAM0_MA_6 DRAM0_DQ_6 K42 DDR_A_D7 BF50 DRAM1_MA_6 DRAM1_DQ_6 BC44
DDR_A_MA8 G52 DRAM0_MA_7 DRAM0_DQ_7 B32 DDR_A_D8 BC52 DRAM1_MA_7 DRAM1_DQ_7 BH32
DDR_A_MA9 E52 DRAM0_MA_8 DRAM0_DQ_8 C32 DDR_A_D9 BE52 DRAM1_MA_8 DRAM1_DQ_8 BG32
DDR_A_MA10 K48 DRAM0_MA_9 DRAM0_DQ_9 C36 DDR_A_D10 AY48 DRAM1_MA_9 DRAM1_DQ_9 BG36
DDR_A_MA11 E51 DRAM0_MA_10 DRAM0_DQ_10 A37 DDR_A_D11 BE51 DRAM1_MA_10 DRAM1_DQ_10 BJ37
DDR_A_MA12 F47 DRAM0_MA_11 DRAM0_DQ_11 C33 DDR_A_D12 BD47 DRAM1_MA_11 DRAM1_DQ_11 BG33
DDR_A_MA13 J51 DRAM0_MA_12 DRAM0_DQ_12 A33 DDR_A_D13 BA51 DRAM1_MA_12 DRAM1_DQ_12 BJ33
DDR_A_MA14 B49 DRAM0_MA_13 DRAM0_DQ_13 C37 DDR_A_D14 BH49 DRAM1_MA_13 DRAM1_DQ_13 BG37
DDR_A_MA15 B50 DRAM0_MA_14 DRAM0_DQ_14 B38 DDR_A_D15 BH50 DRAM1_MA_14 DRAM1_DQ_14 BH38
DRAM0_MA_15 DRAM0_DQ_15 F36 DDR_A_D16 DRAM1_MA_15 DRAM1_DQ_15 AU36
<18> DDR_A_DM[0..7] DRAM0_DQ_16 DRAM1_DQ_16
DDR_A_DM0 G36 G38 DDR_A_D17 BD38 AT36
DDR_A_DM1 B36 DRAM0_DM_0 DRAM0_DQ_17 F42 DDR_A_D18 BH36 DRAM1_DM_0 DRAM1_DQ_17 AV40
DDR_A_DM2 F38 DRAM0_DM_1 DRAM0_DQ_18 J42 DDR_A_D19 BC36 DRAM1_DM_1 DRAM1_DQ_18 AT40
DDR_A_DM3 B42 DRAM0_DM_2 DRAM0_DQ_19 G40 DDR_A_D20 BH42 DRAM1_DM_2 DRAM1_DQ_19 BA36
DDR_A_DM4 P51 DRAM0_DM_3 DRAM0_DQ_20 C38 DDR_A_D21 AT51 DRAM1_DM_3 DRAM1_DQ_20 AV36
DDR_A_DM5 V42 DRAM0_DM_4 DRAM0_DQ_21 G44 DDR_A_D22 AM42 DRAM1_DM_4 DRAM1_DQ_21 AY42
DDR_A_DM6 Y50 DRAM0_DM_5 DRAM0_DQ_22 D42 DDR_A_D23 AK50 DRAM1_DM_5 DRAM1_DQ_22 AY40
DDR_A_DM7 Y52 DRAM0_DM_6 DRAM0_DQ_23 A41 DDR_A_D24 AK52 DRAM1_DM_6 DRAM1_DQ_23 BJ41
DRAM0_DM_7 DRAM0_DQ_24 C41 DDR_A_D25 DRAM1_DM_7 DRAM1_DQ_24 BG41
M45 DRAM0_DQ_25 A45 DDR_A_D26 AV45 DRAM1_DQ_25 BJ45
<18> DDR_A_RAS# DRAM0_RAS# DRAM0_DQ_26 DRAM1_RAS# DRAM1_DQ_26
M44 B46 DDR_A_D27 AV44 BH46
<18> DDR_A_CAS# H51 DRAM0_CAS# DRAM0_DQ_27 C40 BB51 DRAM1_CAS# DRAM1_DQ_27 BG40
DDR_A_D28
<18> DDR_A_WE# DRAM0_WE# DRAM0_DQ_28 DRAM1_WE# DRAM1_DQ_28
B40 DDR_A_D29 BH40
K47 DRAM0_DQ_29 B48 DDR_A_D30 AY47 DRAM1_DQ_29 BH48
<18> DDR_A_BS0 DRAM0_BS_0 DRAM0_DQ_30 DRAM1_BS_0 DRAM1_DQ_30
K44 B47 DDR_A_D31 AY44 BH47
<18> DDR_A_BS1 D52 DRAM0_BS_1 DRAM0_DQ_31 K52 BF52 DRAM1_BS_1 DRAM1_DQ_31 AY52
DDR_A_D32
<18> DDR_A_BS2 DRAM0_BS_2 DRAM0_DQ_32 K51 DRAM1_BS_2 DRAM1_DQ_32 AY51
C DDR_A_D33 C
P44 DRAM0_DQ_33 T52 DDR_A_D34 AT44 DRAM1_DQ_33 AP52
<18> DDR_A_CS0# DRAM0_CS_0# DRAM0_DQ_34 DRAM1_CS_0# DRAM1_DQ_34
T51 DDR_A_D35 AP51
P45 DRAM0_DQ_35 L51 DDR_A_D36 AT45 DRAM1_DQ_35 AW51
<18> DDR_A_CS2# DRAM0_CS_2# DRAM0_DQ_36 DRAM1_CS_2# DRAM1_DQ_36
L53 DDR_A_D37 AW53
DRAM0_DQ_37 R51 DDR_A_D38 DRAM1_DQ_37 AR51
C47 DRAM0_DQ_38 R53 DDR_A_D39 BG47 DRAM1_DQ_38 AR53
<18> DDR_A_CKE0 DRAM0_CKE_0 DRAM0_DQ_39 DRAM1_CKE_0 DRAM1_DQ_39
D48 T47 DDR_A_D40 BE46 AP47
F44 RESERVED_D48 DRAM0_DQ_40 T45 DDR_A_D41 BD44 RESERVED_BE46 DRAM1_DQ_40 AP45
<18> DDR_A_CKE2 DRAM0_CKE_2 DRAM0_DQ_41 DRAM1_CKE_2 DRAM1_DQ_41
E46 Y40 DDR_A_D42 BF48 AK40
RESERVED_E46 DRAM0_DQ_42 V41 DDR_A_D43 RESERVED_BF48 DRAM1_DQ_42 AM41
T41 DRAM0_DQ_43 T48 DDR_A_D44 AP41 DRAM1_DQ_43 AP48
<18> DDR_A_ODT0 DRAM0_ODT_0 DRAM0_DQ_44 DRAM1_ODT_0 DRAM1_DQ_44
T50 DDR_A_D45 AP50
P42 DRAM0_DQ_45 Y42 DDR_A_D46 AT42 DRAM1_DQ_45 AK42
<18> DDR_A_ODT2 DRAM0_ODT_2 DRAM0_DQ_46 DRAM1_ODT_2 DRAM1_DQ_46
AB40 DDR_A_D47 AH40
DRAM0_DQ_47 V45 DDR_A_D48 DRAM1_DQ_47 AM45
M50 DRAM0_DQ_48 V47 DDR_A_D49 AV50 DRAM1_DQ_48 AM47
<18> DDR_A_CLK0 DRAM0_CKP_0 DRAM0_DQ_49 DRAM1_CKP_0 DRAM1_DQ_49
M48 AD48 DDR_A_D50 AV48 AF48
<18> DDR_A_CLK0# DRAM0_CKN_0 DRAM0_DQ_50 DRAM1_CKN_0 DRAM1_DQ_50
AD50 DDR_A_D51 AF50
DRAM0_DQ_51 V48 DDR_A_D52 DRAM1_DQ_51 AM48
P50 DRAM0_DQ_52 V50 DDR_A_D53 DRAM1_DQ_52 AM50
<18> DDR_A_CLK2 DRAM0_CKP_2 DRAM0_DQ_53 DRAM1_DQ_53
P48 AB44 DDR_A_D54 AT50 AH44
<18> DDR_A_CLK2# DRAM0_CKN_2 DRAM0_DQ_54 DRAM1_CKP_2 DRAM1_DQ_54
Y45 DDR_A_D55 AT48 AK45
DRAM0_DQ_55 V52 DDR_A_D56 DRAM1_CKN_2 DRAM1_DQ_55 AM52
DRAM0_DQ_56 W51 DDR_A_D57 DRAM1_DQ_56 AL51
P41 DRAM0_DQ_57 AC53 DDR_A_D58 DRAM1_DQ_57 AG53
<18> DDR_A_RST#_CPU DRAM0_DRAMRST# DRAM0_DQ_58 DRAM1_DQ_58
AC51 DDR_A_D59 AT41 AG51
DRAM0_DQ_59 W53 DDR_A_D60 DRAM1_DRAMRST# DRAM1_DQ_59 AL53
DRAM0_DQ_60 Y51 DDR_A_D61 DRAM1_DQ_60 AK51
AF44 DRAM0_DQ_61 AD52 DDR_A_D62 DRAM1_DQ_61 AF52
+DDR_SOC_VREF DRAM_VREF 0.675V DRAM0_DQ_62 DRAM1_DQ_62
AD51 DDR_A_D63 AF51
DRAM0_DQ_63 DRAM1_DQ_63
100K_0402_5% 1 2 RC1 DDR_TERMN0 AF42 J38 DDR_A_DQS0 BF40
100K_0402_5% 1 2 RC2 DDR_TERMN1 AH42 ICLK_DRAM_TERMN_AF42 DRAM0_DQSP_0 K38 DDR_A_DQS#0 DRAM1_DQSP_0 BD40
ICLK_DRAM_TERMN_AH42 DRAM0_DQSN_0 C35 DDR_A_DQS1 DRAM1_DQSN_0 BG35
DRAM0_DQSP_1 B34 DDR_A_DQS#1 DRAM1_DQSP_1 BH34
DRAM0_DQSN_1 D40 DDR_A_DQS2
DRAM1_DQSN_1 BA38
AD42 DRAM0_DQSP_2 F40 DDR_A_DQS#2 DRAM1_DQSP_2 AY38
B <36> DDR_PWROK AB42 DRAM_VDD_S4_PWROK DRAM0_DQSN_2 B44 DRAM1_DQSN_2 BH44 B
DDR_A_DQS3
<11> DDR_CORE_PWROK DRAM_CORE_PWROK DRAM0_DQSP_3 DRAM1_DQSP_3
C43 DDR_A_DQS#3 BG43
DRAM0_DQSN_3 N53 DDR_A_DQS4 DRAM1_DQSN_3 AU53
23.2_0402_1% 1 2 RC3 DDR_RCOMP0 AD44 DRAM0_DQSP_4 M52 DDR_A_DQS#4 DRAM1_DQSP_4 AV52
29.4_0402_1% 1 2 RC4 DDR_RCOMP1 AF45 DRAM_RCOMP_0 DRAM0_DQSN_4 T42 DDR_A_DQS5 DRAM1_DQSN_4 AP42
162_0402_1% 1 2 RC5 DDR_RCOMP2 AD45 DRAM_RCOMP_1 DRAM0_DQSP_5 T44 DDR_A_DQS#5 DRAM1_DQSP_5 AP44
DRAM_RCOMP_2 DRAM0_DQSN_5 Y47 DDR_A_DQS6 DRAM1_DQSN_5 AK47
DRAM0_DQSP_6 Y48 DDR_A_DQS#6 DRAM1_DQSP_6 AK48
Follow CRB v1.15 DRAM0_DQSN_6 DRAM1_DQSN_6
AF40 AB52 DDR_A_DQS7 AH52
AF41 RESERVED_AF40 DRAM0_DQSP_7 AA51 DDR_A_DQS#7 DRAM1_DQSP_7 AJ51
AD40 RESERVED_AF41 DRAM0_DQSN_7 DRAM1_DQSN_7
AD41 RESERVED_AD40
RESERVED_AD41 DDR_A_DQS[0..7] <18>
1 OF 13 2 OF 13
DDR_A_DQS#[0..7] <18>
DDR_CORE_PWROK 1 2 FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170
CC1 EMC@
.1U_0402_16V7K @ @

0705:for ESD request

Close To SOC Pin

+1.35V +DDR_SOC_VREF

1 2
RC6 1
4.7K_0402_1%
CC2
1 2 .1U_0402_16V7K
RC7 2
4.7K_0402_1%

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date VLV-M SOC Memory DDR3L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 8 of 42
5 4 3 2 1
5 4 3 2 1

USOC1C

AV3 AG3
<21> HDMI_TX2+ DDI0_TXP_0 DDI1_TXP_0 EDP_CPU_LANE_P0 <19>
AV2 1.0V 1.0V AG1
<21> HDMI_TX2- AT2 DDI0_TXN_0 DDI1_TXN_0 AF3 EDP_CPU_LANE_N0 <19>
<21> HDMI_TX1+ AT3 DDI0_TXP_1 DDI1_TXP_1 AF2
<21> HDMI_TX1- DDI0_TXN_1 DDI1_TXN_1
AR3 AD3
<21> HDMI_TX0+ AR1 DDI0_TXP_2 DDI1_TXP_2 AD2
D <21> HDMI_TX0- DDI0_TXN_2 DDI1_TXN_2 D
AP3 AC3
<21> HDMI_CLK+ AP2 DDI0_TXP_3 DDI1_TXP_3 AC1 eDP to LVDS Panel
HDMI <21> HDMI_CLK- DDI0_TXN_3 DDI1_TXN_3
AL3 1.0V AK3
DDI0_AUXP DDI1_AUXP EDP_CPU_AUX <19> +3VS
AL1 1.0V AK2
DDI0_AUXN DDI1_AUXN EDP_CPU_AUX# <19>
D27 1.8V 1.8V K30
<21> HDMI_HPD# DDI0_HPD DDI1_HPD EDP_CPU_HPD <19>

1
C26 P30 DDI1_ENABLE RC8 1 2 2.2K_0402_5% +1.8VS R378
<21> HDMI_DDCDATA C28 DDI0_DDCDATA 1.8V 1.8V DDI1_DDCDATA
G30
+1.8VS
<21> HDMI_DDCCLK DDI0_DDCCLK 1.8V 1.8V DDI1_DDCCLK 10K_0402_5%

5
B28 1.8V N30 UC4

2
C27 DDI0_VDDEN DDI1_VDDEN J30 1
1.8V

P
B26 DDI0_BKLTEN DDI1_BKLTEN M30 DDI1_PWM NC 4
DDI0_BKLTCTL 1.8V DDI1_BKLTCTL Y EDP_BIA_PWM <19>
DDI1_PWM 2
A

G
AH3
1 RC9 2 DDI0_RCOMPP AK12 VSS_AH3 AH2 NL17SZ07DFT2G_SC70-5
Follow CRB v1.15 0ohm till to GND

3
402_0402_1% DDI0_RCOMPN AK13 DDI0_RCOMP_P VSS_AH2 SA00004BV00
AM14 DDI0_RCOMP_N AH14
AM13 RESERVED_AM14 RESERVED_AH14 AH13
AM3 RESERVED_AM13 RESERVED_AH13 AF14
AM2 VSS_AM3 RESERVED_AF14 AF13
Follow CRB v1.15 0ohm till to GND VSS_AM2 RESERVED_AF13
BA3
C VGA_RED C
AY2 DDI1_PWM
VGA_BLUE BA1

1
VGA_GREEN AW1
VGA_IREF AY3
VGA_IRTN RC67
3.3V BD2 100K_0402_5%
VGA_HSYNC BF2
3.3V No Support CRT

2
VGA_VSYNC
3.3V VGA_DDCCLK BC1 CRT_DDC_CLK 1 2
3.3V VGA_DDCDATA BC2 CRT_DDC_DATA R3791 2
10K_0402_5%
R380 10K_0402_5%
T2 T7
T3 RESERVED_T2 RESERVED_T7 T9
AB3 RESERVED_T3 RESERVED_T9 AB13
AB2 RESERVED_AB3 RESERVED_AB13 AB12
Y3 RESERVED_AB2 RESERVED_AB12 Y12
Y2 RESERVED_Y3 RESERVED_Y12 Y13
W3 RESERVED_Y2 RESERVED_Y13 V10
W1 RESERVED_W3 RESERVED_V10 V9
V2 RESERVED_W1 RESERVED_V9 T12
V3 RESERVED_V2 RESERVED_T12 T10
R3 RESERVED_V3 RESERVED_T10 V14
R1 RESERVED_R3 RESERVED_V14 V13
+1.8VS AD6 RESERVED_R1 RESERVED_V13 T14
B B
AD4 RESERVED_AD6 RESERVED_T14 T13
AB9 RESERVED_AD4 RESERVED_T13 T6
RESERVED_AB9 RESERVED_T6
1

AB7 T4
@ Y4 RESERVED_AB7 RESERVED_T4 P14
RC10 Y6 RESERVED_Y4 RESERVED_P14
10K_0402_5% V4 RESERVED_Y6 F34
V6 RESERVED_V4 GPIO_S0_NC_15 M32
2

GPIO_NC13 A29 RESERVED_V6 GPIO_S0_NC_16 D28


GPIO_NC14 C29 GPIO_S0_NC_13 GPIO_S0_NC_17 J28
T97 GPIO_S0_NC14 GPIO_S0_NC_18
1

AB14 K34
GPIO_NC12 B30 RESERVED_AB14 GPIO_S0_NC_19 D34
T98 C30 GPIO_S0_NC_12 GPIO_S0_NC_20 F32
RC11
10K_0402_5% RESERVED_C30 GPIO_S0_NC_21 F28
GPIO_S0_NC_22 K28
2

GPIO_S0_NC_23 J34
GPIO_S0_NC_24 N32
GPIO_S0_NC_25 D32
3 OF 10 GPIO_S0_NC_26
Follow CRB v1.15
FH8065301546401_FCBGA131170
@
GPIO_S0_NC[13]:
Multiplexed with Hardware Straps Pin:MDSI_DDCDATA
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date VLV-M SOC Display
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B481P
Date: Monday, March 10, 2014 Sheet 9 of 42
5 4 3 2 1
5 4 3 2 1

USOC1D
X@
BF6 AY7 PCIE_PTX_DRX_P0 CC3 1 2 0.1U_0402_10V7K
<27> SATA_PTX_DRX_P0_C BG7 SATA_TXP_0 PCIE_TXP_0 AY6 PCIE_PTX_DRX_N0 1 X@ 2 0.1U_0402_10V7K PCIE_PTX_C_DRX_P0 <22>
CC4
<27> SATA_PTX_DRX_N0_C SATA_TXN_0 PCIE_TXN_0 PCIE_PTX_C_DRX_N0 <22>
HDD PCIE LAN
AU16 AT14 PCIE_PRX_DTX_P0
D <27> SATA_PRX_DTX_P0_C AV16 SATA_RXP_0 PCIE_RXP_0 AT13 PCIE_PRX_DTX_N0 PCIE_PRX_DTX_P0 <22> D
<27> SATA_PRX_DTX_N0_C SATA_RXN_0 PCIE_RXN_0 PCIE_PRX_DTX_N0 <22>
BD10 AV6 PCIE_PTX_DRX_P1 CC5 1 2 0.1U_0402_10V7K
<27> SATA_PTX_DRX_P1_C BF10 SATA_TXP_1 PCIE_TXP_1 AV4 PCIE_PTX_DRX_N1 1 2 0.1U_0402_10V7K PCIE_PTX_C_DRX_P1 <28>
CC6
<27> SATA_PTX_DRX_N1_C SATA_TXN_1 PCIE_TXN_1 PCIE_PTX_C_DRX_N1 <28>
ODD WLAN
AY16 AT10 PCIE_PRX_DTX_P1
<27> SATA_PRX_DTX_P1_C BA16 SATA_RXP_1 PCIE_RXP_1 AT9 PCIE_PRX_DTX_N1 PCIE_PRX_DTX_P1 <28>
<27> SATA_PRX_DTX_N1_C SATA_RXN_1 PCIE_RXN_1 PCIE_PRX_DTX_N1 <28>
BB10 AT7
BC10 VSS_BB10 PCIE_TXP_2 AT6 +1.8VS
Follow CRB V1.15 0ohm till to GND VSS_BC10 PCIE_TXN_2 RP63
SOC_SCI# BA12 AP12 LAN_CLKREQ# 1 8
<17> SOC_SCI# DEVSLP_SOC AY14 SATA_GP0 / GPIO_S0_SC_0 PCIE_RXP_2 AP10 WLAN_CLKREQ# 2 7
SATA_LED#_SOC AY12 SATA_GP1 / SATA_DEVSLP_0 / GPIO_S0_SC_1 PCIE_RXN_2 PCIE_CLKREQ_2# 3 6
Follow CRB v1.15 SATA_LED# / GPIO_S0_SC_2 AP6 PCIE_CLKREQ_3# 4 5
1 RC12 2 SATA_RCOMPP AU18 PCIE_TXP_3 AP4
402_0402_1% SATA_RCOMPN AT18 SATA_RCOMP_P PCIE_TXN_3 10K_0804_8P4R_5%
SATA_RCOMP_N AP9
PCIE_RXP_3 AP7
@ AT22 PCIE_RXN_3
RC57 2 1 49.9_0402_1% MMC1_RCOMP MMC1_CLK / GPIO_S0_SC_16 BB7
AV20 VSS_BB7 BB5
MMC1_D0 / GPIO_S0_SC_17 VSS_BB5
Follow CRB V1.15 0ohm till to GND
RC59 2 @ 1 49.9_0402_1% SD3_RCOMP AU22 8411 Pin 36 O/D
AV22 MMC1_D1 / GPIO_S0_SC_18 BG3 LAN_CLKREQ#
C
AT20 MMC1_D2 / GPIO_S0_SC_19 PCIE_CLKREQ_0# / GPIO_S0_SC_3 BD7 LAN_CLKREQ# <22> C
WLAN_CLKREQ#
AY24 MMC1_D3 / GPIO_S0_SC_20 PCIE_CLKREQ_1# / GPIO_S0_SC_4 BG5 PCIE_CLKREQ_2# WLAN_CLKREQ# <28>
+3VS AU26 MMC1_D4 / GPIO_S0_SC_21 PCIE_CLKREQ_2# / GPIO_S0_SC_5 BE3 PCIE_CLKREQ_3#
AT26 MMC1_D5 / GPIO_S0_SC_22 PCIE_CLKREQ_3# / GPIO_S0_SC_6 BD5
AU20 MMC1_D6 / GPIO_S0_SC_23 SD3_WP / GPIO_S0_SC_7
RP54 MMC1_D7 / GPIO_S0_SC_24 AP14 PCIE_RCOMPP 1 RC13 2 HDA_BIT_CLK 2 1
PCIE_RCOMP_P HDA_BITCLK_AUDIO <23>
8 1 ODD_DA# AV26 AP13 PCIE_RCOMPN 402_0402_1% RC66
7 2 BT_ON# BA24 MMC1_CMD / GPIO_S0_SC_25 PCIE_RCOMP_N 33_0402_5% 1 2
6 3 WL_OFF# MMC1_RST# / SATA_DEVSLP_0 / GPIO_S0_SC_26 BB4 CC7 EMC@
RESERVED_BB4 EMC@
5 4 MMC1_RCOMP AY18 BB3 22P_0402_50V8J For EMI
MMC1_RCOMP RESERVED_BB3
+3VS 8.2K_8P4R_5% AV10
BA18 RESERVED_AV10 AV9
RC68 AY20 SD2_CLK / GPIO_S0_SC_27 RESERVED_AV9 HDA_SYNC 2 EMC@ 1
SD2_D0 / GPIO_S0_SC_28 HDA_SYNC_AUDIO <23>
10K_0402_5% BD20 BF20 HDA_RCOMP 49.9_0402_1% 1 2 RC14 RC69 33_0402_5%
1 2 ODD_DETECT# BA20 SD2_D1 / GPIO_S0_SC_29 HDA_LPE_RCOMP BG22 HDA_RST# HDA_SDOUT 2 EMC@ 1
SD2_D2 / GPIO_S0_SC_30 HDA_RST# / LPE_I2S0_CLK / GPIO_S0_SC_8 HDA_SDOUT_AUDIO <23>
BD18 BH20 HDA_SYNC RC70 33_0402_5%
BC18 SD2_D3_CD# / GPIO_S0_SC_31 HDA_SYNC / LPE_I2S0_FRM / GPIO_S0_SC_9 BJ21 HDA_BIT_CLK HDA_RST# 2 EMC@ 1
SD2_CMD / GPIO_S0_SC_32 HDA_CLK / LPE_I2S0_DATAOUT / GPIO_S0_SC_10 HDA_RST_AUDIO# <23>
BG20 HDA_SDOUT RC71 33_0402_5%
HDA_SDO / LPE_I2S0_DATAIN / GPIO_S0_SC_11 BG19 HDA_SDIN0
3.3V HDA_SDI0 / LPE_I2S1_CLK / GPIO_S0_SC_12 HDA_SDIN0 <23>
BG21 2014310 Change RP64 to RC69, RC70, RC71
ODD_DA# AY26 HDA_SDI1 / LPE_I2S1_FRM / GPIO_S0_SC_13 BH18 T100
<27> ODD_DA# BT_ON# AT28 SD3_CLK / GPIO_S0_SC_33HDA_DOCKRST# / LPE_I2S1_DATAOUT / GPIO_S0_SC_14 BG18 T101
<28> BT_ON# ODD_EN# BD26 SD3_D0 / GPIO_S0_SC_34 HDA_DOCKEN# / LPE_I2S1_DATAIN / GPIO_S0_SC_15 T102
B <27> ODD_EN# GPIO_S0_SC_63: GPIO_S0_SC_65: B
ODD_DETECT# AU28 SD3_D1 / GPIO_S0_SC_35 BF28
<27> ODD_DETECT# BA26 SD3_D2 / GPIO_S0_SC_36 LPE_I2S2_CLK / SATA_DEVSLP_1 / GPIO_S0_SC_62 BA30
BIOS/EFI Boot Strap (BBS) Security Flash Descriptors
WL_OFF# GPIO_S0_SC_63
<28,32> WL_OFF# BC24 SD3_D3 / GPIO_S0_SC_37 LPE_I2S2_FRM / GPIO_S0_SC_63 BD28 BIOS Boot Selection 0 = Override
AV28 SD3_CD# / GPIO_S0_SC_38 LPE_I2S2_DATAIN / GPIO_S0_SC_64 BC30 GPIO_S0_SC_65 0 = LPC 1 = Normal Operation
+1.8VS +3VS BF22 SD3_CMD / GPIO_S0_SC_39 LPE_I2S2_DATAOUT / GPIO_S0_SC_65
1 = SPI (Internal PU)
BD22 SD3_1P8EN / GPIO_S0_SC_40 P34 +1.8VS +1.8VS
SD3_PWREN# / GPIO_S0_SC_41 RESERVED_P34 N34 RC15
1

SD3_RCOMP BF26 RESERVED_N34 33.2_0402_1%


SD3_RCOMP

1
AK9 1 2
RESERVED_AK9 +1.0VS
RC53 AK7
RESERVED_AK7
5

UC10 4.7K_0402_5% RC16 RC17


1.8V 1 C24 10K_0402_5% 10K_0402_5%
P

H_PROCHOT# <32,34>
2

NC 4 4 OF 10 PROCHOT#
DEVSLP0 <27> Internal PD 2K EC programing :

2
DEVSLP_SOC 2 Y GPIO_S0_SC_63 GPIO_S0_SC_65
A 2 "High"for Flash BIOS
G

FH8065301546401_FCBGA131170 NEMC@

1
NL17SZ07DFT2G_SC70-5 CC8 D
3

SA00004BV00 10P_0402_50V8J 2
@ 1 TXE_DBG <32>
G
S QC1

3
MESS138W-G_SOT323-3
DEVSLP_SOC Buffer
+1.8VS

A RC18 A
10K_0402_5%
1 2
Pull High 10k at LED Page Security Classification Compal Secret Data Compal Electronics, Inc.
2
G

2014/03/10 2015/03/31 Title


Issued Date Deciphered Date VLV-M SOC SATA/PCI-E/HDA
1 3 SATA_LED#_SOC
<28> SOC_SATALED# THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
QC2 B 2.0
MESS138W-G_SOT323-3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 10 of 42
5 4 3 2 1
5 4 3 2 1

+1.8VALW +1.8VS

XTAL_25M_IN

1
@

1
R17 R15 +3VS +1.8VALW
RC19
YC1 1M_0402_5%
For GCLK 0_0402_5% 0_0402_5%

1
25MHZ_10PF_7V25000014 GCLK@

2
PCH_X1 1 2 XTAL_25M_IN
<31> PCH_X1

2
1 3 XTAL_25M_OUT RG10 0_0402_5% RC20 RC21
1 3

5
1 1 UC5 4.7K_0402_5% 2.2K_0402_5%
GND GND 1.8V 1 3.3V

2
CC9 CC10 NC 4 DC1
Change To 10pF for Vendor Suggest. Y PLT_RST# <22,28,32>
10P_0402_25V8K 2 4 10P_0402_25V8K PMC_PLTRST# 2 PMC_ACIN 2 1
0701 A ACIN <32,34,40>

G
2 2
NL17SZ07DFT2G_SC70-5 RB751V40_SC76-2

3
SA00004BV00
D D

USOC1E PLT_RST Buffer


XTAL_25M_IN AH12 AU34
XTAL_25M_OUT AH10 ICLK_OSCIN SIO_UART1_RXD / GPIO_S0_SC_70 AV34
ICLK_OSCOUT SIO_UART1_TXD / GPIO_S0_SC_71 BA34 +1.8VALW
AD9 SIO_UART1_RTS# / GPIO_S0_SC_72 AY34 RP65
RESERVED_AD9 SIO_UART1_CTS# / GPIO_S0_SC_73 PMC_PCIE_WAKE# 1 8
RC23 1 2 4.02K_0402_1% ICLK_ICOMP AD14 BF34 PMC_BATLOW# 2 7
RC22 1 2 47.5_0402_1% ICLK_RCOMP AD13 ICLK_ICOMP SIO_UART2_RXD / GPIO_S0_SC_74 BD34 GPIO_S5_14 3 6
ICLK_RCOMP SIO_UART2_TXD / GPIO_S0_SC_75 BD32 LS_OE 4 5
AD10 SIO_UART2_RTS# / GPIO_S0_SC_76 BF32
AD12 RESERVED_AD10 SIO_UART2_CTS# / GPIO_S0_SC_77 10K_0804_8P4R_5%
RESERVED_AD12
AF6
<22> CLK_PCIE_LAN# PCIE_CLKN_0
LAN AF4 D26
<22> CLK_PCIE_LAN PCIE_CLKP_0 PMC_SUSPWRDNACK / GPIO_S5_11 G24 PMC_SUSCLK T103 32.768k output
AF9 PMC_SUSCLK_0 / GPIO_S5_12 F18
<28> CLK_PCIE_WLAN# AF7 PCIE_CLKN_1 PMC_SLP_S0IX# / GPIO_S5_13 F22
WLAN PMC_SLP_S4#
<28> CLK_PCIE_WLAN PCIE_CLKP_1 PMC_SLP_S4# D22 PMC_SLP_S4# <17>
PMC_SLP_S3#
PMC_SLP_S3# PMC_SLP_S3# <17>
J20 GPIO_S5_14 0705:for ESD request
AK4 GPIO_S5_14 D20 PMC_ACIN
AK6 PCIE_CLKN_2 PMC_ACPRESENT F26 PMC_PCIE_WAKE#
PCIE_CLKP_2 PMC_WAKE_PCIE_0# / GPIO_S5_15 K26 PMC_BATLOW#
AM4 PMC_BATLOW# J26 PMC_PWRBTN#
+1.8VALW PCIE_CLKN_3 PMC_PWRBTN# / GPIO_S5_16 PMC_PWRBTN# <17>
Close To SOC <1000mil AM6 BG9 PMC_RSTBTN# 1 2
PCIE_CLKP_3 PMC_RSTBTN# XDP_RSTBTN# <16>
F20 PMC_PLTRST# RC24 XDP@ 0_0402_5%
PMC_PLTRST# PMC_PLTRST# <16>
RC65 1 2 51_0402_5% XDP_H_PRDY# AM9 J24 GPIO_S5_17 T104
RC64 1 2 51_0402_5% XDP_H_TDO AM10 RESERVED_AM9 GPIO_S5_17 G18
RC25 1 2 200_0402_5% XDP_H_PREQ_BUF# RESERVED_AM10 PMC_SUS_STAT# / GPIO_S5_18

RP66
4 5 XDP_H_TDI C11 RTC_TEST#
ILB_RTC_TEST# RTC_TEST# <16>
3 6 XDP_H_TMS BH7 C12 RTC_RST# PDG v1.2 update
2 7 XDP_H_TCK BH5 PMC_PLT_CLK_0 / GPIO_S0_SC_96 ILB_RTC_RST# EC_RSMRST# 1 2
1 8 XDP_H_TRST# BH4 PMC_PLT_CLK_1 / GPIO_S0_SC_97 RC26 100K_0402_5%
C BH8 PMC_PLT_CLK_2 / GPIO_S0_SC_98 B10 EC_RSMRST# C
PMC_PLT_CLK_3 / GPIO_S0_SC_99 PMC_RSMRST# EC_RSMRST# <16,32>
51_0804_8P4R_5% BH6 B7 PMC_CORE_PWROK
BJ9 PMC_PLT_CLK_4 / GPIO_S0_SC_100 PMC_CORE_PWROK
PMC_PLT_CLK_5 / GPIO_S0_SC_101 +1.0VS
RTC domain
C9 ILB_RTC_X1
XDP_H_TCK D14 ILB_RTC_X1 A9 ILB_RTC_X2
<16> XDP_H_TCK TAP_TCK ILB_RTC_X2

1
XDP_H_TRST# G12 B8 ILB_RTC_EXTPAD 1 2
<16> XDP_H_TRST# TAP_TRST# ILB_RTC_EXTPAD
XDP_H_TMS F14 P22 CC15 RC27
<16> XDP_H_TMS F12 TAP_TMS RTC_VCC_P22
XDP_H_TDI +RTCVCC .1U_0402_16V7K 73.2_0402_1%
<16> XDP_H_TDI TAP_TDI
XDP_H_TDO G16
<16> XDP_H_TDO TAP_TDO
XDP_H_PRDY# D18
<16> XDP_H_PRDY#

2
XDP_H_PREQ_BUF# F16 TAP_PRDY# B24 VR_SVID_ALERT#_SOC RC28 1 2 20_0402_1%
<16> XDP_H_PREQ_BUF# TAP_PREQ# SVID_ALERT# VR_SVID_ALERT# <39>
AT34 A25 VR_SVID_DATA_SOC RC29 1 2 16.9_0402_1%
RESERVED_AT34 SVID_DATA VR_SVID_DATA <39>
C25
SVID_CLK VR_SVID_CLK <39>
RP67 SOC_SPI_CS0# C23
SPI_CS0# 1 8 SOC_SPI_CS0# T105 C21 PCU_SPI_CS_0#
SPI_MISO 2 7 SOC_SPI_MISO SOC_SPI_MISO B22 PCU_SPI_CS_1# / GPIO_S5_21 AU32 PLT_RST# 1 2
2014307 Remove RG9, PCH_RTCX1 trace & off-page
SPI_MOSI 3 6 SOC_SPI_MOSI SOC_SPI_MOSI A21 PCU_SPI_MISO SIO_PWM_0 / GPIO_S0_SC_94 AT32 CC11 NEMC@
SPI_CLK 4 5 SOC_SPI_CLK SOC_SPI_CLK C22 PCU_SPI_MOSI SIO_PWM_1 / GPIO_S0_SC_95 For GCLK .1U_0402_16V7K
PCU_SPI_CLK PMC_CORE_PWROK 1 2
22_0804_8P4R_5% CC16 EMC@
EMC@ SOC_KBRST# B18 .1U_0402_16V7K
<17> SOC_KBRST# GPIO_S5_0
B16 K24 XDP_RSTBTN# 1 2
C18 GPIO_S5_1 / PMC_WAKE_PCIE_1 GPIO_S5_22 N24 CC12 EMC@
GPIO_S5_2 / PMC_WAKE_PCIE_2 GPIO_S5_23 XDP_OBSDATA_A0 <16>
A17 M20 ILB_RTC_X1 .1U_0402_16V7K
C17 GPIO_S5_3 / PMC_WAKE_PCIE_3 GPIO_S5_24 J18 XDP_OBSDATA_A1 <16> 1 2
SOC_LID_OUT# PMC_PLTRST#
<17> SOC_LID_OUT# GPIO_S5_4 GPIO_S5_25 XDP_OBSDATA_A2 <16>
C16 M18 ILB_RTC_X2 1 2 CC13 EMC@
GPIO_S5_5 / PMU_SUSCLK_1 GPIO_S5_26 XDP_OBSDATA_A3 <16>
B14 K18 RC31 .1U_0402_16V7K
SOC_SMI# C15 GPIO_S5_6 / PMU_SUSCLK_2 GPIO_S5_27 K20 10M_0402_5% EC_RSMRST# 1 2
<17> SOC_SMI# GPIO_S5_7 / PMU_SUSCLK_3 GPIO_S5_28 M22 CC14 EMC@
GPIO_S5_29 M24 32.768KHZ_12.5PF_Q13FC135000040 .1U_0402_16V7K
GPIO_S5_30
XDP Connector not ready
Need to Comfirm YC2 1 2 DDR_CORE_PWROK 1 2
C13 CC19 EMC@
A13 GPIO_S5_8 .1U_0402_16V7K
GPIO_S5_9 1 1
C19 AV32
GPIO_S5_10 SIO_SPI_CS# / GPIO_S0_SC_66 BA28 CC17 CC18
SIO_SPI_MISO / GPIO_S0_SC_67
0705:for ESD request
AY28 15P_0402_50V8J 15P_0402_50V8J
1 2 GPIO_RCOMP N26 SIO_SPI_MOSI / GPIO_S0_SC_68 AY30 2 2
B
RC32 49.9_0402_1% GPIO_RCOMP 5 OF 13 SIO_SPI_CLK / GPIO_S0_SC_69 B
+3VALW +1.35VS
FH8065301546401_FCBGA131170 Change To 15pF for Vendor Suggest.
0701

1
@
0529 update RC30
10K_0402_5%

5
UC7
3.3V 1 1.35V

2
NC 4
2 Y DDR_CORE_PWROK <8>
<16,32> PMC_CORE_PWROK A

G
NL17SZ07DFT2G_SC70-5

3
1 SA00004BV00
+RTCVCC
CC20
RC34 1U_0402_6.3V6K
+BIOS_SPI +1.8VALW 20K_0402_1% 2
1 2 RTC_TEST#
1 @ 2 1 2 RTC_RST#
+BIOS_SPI
SPI ROM ( 8MByte ) 1.8V RC99
CC21 1
0_0402_1%
2 .1U_0402_16V7K
RC35
20K_0402_1% 1
JP12
JP@
2 1
UC8 CC22 +CHGRTC 2 1 +3VLP
RC36 1 2 3.3K_0402_5% SPI_CS0# 1 8 RC37 1 2 3.3K_0402_5% 1U_0402_6.3V6K JUMP_43X39 +RTCBATT
SPI_MISO 2 CS# VCC 7 SPI_HOLD# 2
RC38 1 2 3.3K_0402_5% 3 DO(IO1) HOLD#(IO3) 6
SPI_WP#
WP#(IO2) CLK
SPI_CLK W=20mils
4 5 SPI_MOSI +CHGRTC +RTCBATT
GND DI(IO0)

1
+RTCVCC RC33
W25Q64DWSSIG_SO8 Reserve for EMI(Near SPI ROM) 1K_0402_5%

+
1 2

+RTCBATT_R
1 2 2 1 SPI_CLK CLR_CMOS 1 2 RTC_TEST# 1 20mil

3
CC24 NEMC@ RC39 NEMC@ R1088 0_0402_5%
10P_0402_50V8J 33_0402_5% 1 @ 2 RTC_RST# CC23 20mil
1

@ R1089 0_0402_5% .1U_0402_16V7K


A CLRP1 2 +RTCVCC A
SHORT PADS
2

DC3

1
BAV70W-7-F_SOT323-3 JBATT1 CONN@

-
Clear CMOS
Close to RAM door LOTES_AAA-BAT-054-K01

2
SP07000H700

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date VLV-M SOC CLK/PMU/SPI
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 11 of 42
5 4 3 2 1
5 4 3 2 1

USOC1F
D D
G2 M10
GPIO_S5_31 RESERVED_M10 M9
RESERVED_M9
M3 P6
L1 GPIO_S5_32 RESERVED_P6 P7
K2 GPIO_S5_33 RESERVED_P7
K3 GPIO_S5_34
M2 GPIO_S5_35 M7
N3 GPIO_S5_36 RESERVED_M7 M12 USB3_REXT0 1 2
P2 GPIO_S5_37 USB3_REXT0 RC40
L3 GPIO_S5_38 P10 1.24K_0402_1%
GPIO_S5_39 RESERVED_P10 P12
RESERVED_P12
M4
J3 RESERVED_M4 M6
P3 GPIO_S5_40 RESERVED_M6
H3 GPIO_S5_41 D4
GPIO_S5_42 USB3_RXP0 PCH_USB3_RX0_P <25>
B12 E3 PCH_USB3_RX0_N <25>
GPIO_S5_43 USB3_RXN0
K6
USB3 Port 0
USB3_TXP0 PCH_USB3_TX0_P <25>
M16 K7
<25> USB20_P0 USB_DP0 USB3_TXN0 PCH_USB3_TX0_N <25>
USB2 Port 0 (USB3.0 P0) K16
<25> USB20_N0 USB_DN0
J14
<25> USB20_P1 USB_DP1
USB2 Port 1 G14
<25> USB20_N1 USB_DN1
K12
<20> USB20_P2 USB_DP2
Camera J12
<20> USB20_N2 USB_DN2
USB20_CPU_P3 K10
<26> USB20_CPU_P3 USB_DP3
USB Hub USB20_CPU_N3 H10 H8
<26> USB20_CPU_N3 USB_DN3 RESERVED_H8 H7
RESERVED_H7
1K_0402_1% 1 2 RC41 ICLK_USB_TERMP D10
1K_0402_1% 1 2 RC42 ICLK_USB_TERMN F10 ICLK_USB_TERMP H4
ICLK_USB_TERMN RESERVED_H4 H5 +1.8VS
C
RESERVED_H5 C
USB_OC0# C20
<25> USB_OC0# USB_OC_0# / GPIO_S5_19

1
USB_OC1# B20 @
<25> USB_OC1# USB_OC_1# / GPIO_S5_20 RC43
+1.8VALW 10K_0402_5%

RC44 1 2 10K_0402_5% USB_OC0# RC45 1 2 USB_RCOMP D6 BD12 GPIO_S0_SC_56:

2
RC46 1 2 10K_0402_5% USB_OC1# 45.3_0402_1% C7 USB_RCOMPO GPIO_S0_SC_55 BC12 GPIO_S0_SC_56
USB_RCOMPI GPIO_S0_SC_56 A16 Swap Override
BD14 DBG_UART_TXD T106
GPIO_S0_SC_57 / PCU_UART_TXD 0 = Enable

1
BC14 @
RC47 1 @ 2 USB_PLL_MON M13 GPIO_S0_SC_58 BF14 RC48 1 = Disable
0_0402_5% USB_PLL_MON GPIO_S0_SC_59 BD16 Reference EDS Page 216
10K_0402_5%
GPIO_S0_SC_60 BC16 DBG_UART_RXD T107
GPIO_S0_SC_61 / PCU_UART_RXD

2
B4
B5 USB_HSIC0_DATA BH12 SOC_SPKR
USB_HSIC0_STROBE ILB_8254_SPKR / GPIO_S0_SC_54 SOC_SPKR <23>

E2
D2 USB_HSIC1_DATA
NOTE: Ref checklist rev1.0 p.25 USB_HSIC1_STROBE
USB_HSIC_RCOMP must NOT float if they are not being used. BH22
SIO_I2C0_DATA / GPIO_S0_SC_78 BG23
1 2 HSIC_RCOMP A7 SIO_I2C0_CLK / GPIO_S0_SC_79
RC49 45.3_0402_1% USB_HSIC_RCOMP
BG24
SIO_I2C1_DATA / GPIO_S0_SC_80 BH24
49.9_0402_1%1 2 RC50 LPC_RCOMP BF18 SIO_I2C1_CLK / GPIO_S0_SC_81
BH16 LPC_RCOMP / VGA_RCOMP
<32> LPC_AD0 BJ17 ILB_LPC_AD_0 / GPIO_S0_SC_42 BG25
<32> LPC_AD1 ILB_LPC_AD_1 / GPIO_S0_SC_43 SIO_I2C2_DATA / GPIO_S0_SC_82
ILB_LPC_CLK_0 : Output of 25MHz, BJ13 BJ25
<32> LPC_AD2 ILB_LPC_AD_2 / GPIO_S0_SC_44 SIO_I2C2_CLK / GPIO_S0_SC_83
Need Check with EC BG14
<32> LPC_AD3 ILB_LPC_AD_3 / GPIO_S0_SC_45
BG17
<32> LPC_FRAME# ILB_LPC_FRAME# / GPIO_S0_SC_46
22_0402_5% 1 EMC@ 2 RC51 LPC_CLK_0 BG15 BG26
<32> LPC_CLK_EC ILB_LPC_CLK_0 / GPIO_S0_SC_47 SIO_I2C3_DATA / GPIO_S0_SC_84
ILB_LPC_CLK_1 is for CLK_0 feedback.(Input) 22_0402_5% 1 EMC@ 2 RC52 LPC_CLK_1 BH14 BH26
T211 ILB_LPC_CLK_1 / GPIO_S0_SC_48 SIO_I2C3_CLK / GPIO_S0_SC_85
Set to Outpot for Normal Usage 1 @ 2 LPC_CLKRUN# BG16
RC60 10K_0402_5% BG13 ILB_LPC_CLKRUN# / GPIO_S0_SC_49
<17> SOC_SERIRQ ILB_LPC_SERIRQ / GPIO_S0_SC_50 BF27
SIO_I2C4_DATA / GPIO_S0_SC_86 BG27
B
LPC_CLKRUN# SIO_I2C4_CLK / GPIO_S0_SC_87 B
<32> LPC_CLKRUN#
BH28 SOC_I2C0_DATA T108
PCU_SMB_DATA BG12 SIO_I2C5_DATA / GPIO_S0_SC_88 BG28 SOC_I2C0_CLK T109
PCU_SMB_CLK BH10 PCU_SMB_DATA / GPIO_S0_SC_51 SIO_I2C5_CLK / GPIO_S0_SC_89
PCU_SMB_ALERT# BG11 PCU_SMB_CLK / GPIO_S0_SC_52
2 1 LPC_CLK_0 PCU_SMB_ALERT# / GPIO_S0_SC_53 BJ29
CC25 NEMC@ SIO_I2C6_DATA / GPIO_S0_SC_90 BG29
SIO_I2C6_CLK / GPIO_S0_SC_91 / SD3_WP
0705 : Reserved
10P_0402_50V8J

2 1 LPC_CLK_1 BH30 GPIO_S0_SC_92 T110


CC26 NEMC@ GPIO_S0_SC_092 BG30 GPIO_S0_SC_93 T111
GPIO_S0_SC_093
PDA (Platform Debug Assistant) Test Points
10P_0402_50V8J 6 OF 13

FH8065301546401_FCBGA131170

+1.8VS +1.8VS
RP68
5 4 PCU_SMB_CLK
6 3 PCU_SMB_DATA
7 2 PCU_SMB_ALERT#
8 1
Pull High at EC side
4.7K_0804_8P4R_5%
2
G

DDR(15)
RTD2132(16) <18,19,28,29,32> EC_SMB_CK2
1 3 PCU_SMB_CLK
QC3
D

Minicard(25)
2
G

MESS138W-G_SOT323-3
Touch Pad(26)
1 3 PCU_SMB_DATA
EC(29) - Reserve <18,19,28,29,32> EC_SMB_DA2
A QC4 A
D

MESS138W-G_SOT323-3

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date VLV-M SOC USB/LPC/SMBus
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 12 of 42
5 4 3 2 1
5 4 3 2 1

D D
Need to Confirm
Follow CRBv1.15
USOC1H +1.05VS
325mA 1000mA
U22 AC32 +1.05VS_SOC 1 @ 2
+1.0VALW UNCORE_V1P0_G3_U22 CORE_V1P0_S3_AC32
V22 Y32 RC100 0_0402_1%
C1034 1 2 1U_0402_6.3V6K C5 UNCORE_V1P0_G3_V22 CORE_V1P0_S3_Y32
UNCORE_V1P0_G3 1uF*4 C1035 1 2 1U_0402_6.3V6K B6 UNCORE_V1P0_G3_C5 AA33
C1036 1 2 1U_0402_6.3V6K UNCORE_V1P0_G3_B6 CORE_V1P05_S3_AA33 AF33
C1037 1 2 1U_0402_6.3V6K Y19 CORE_V1P05_S3_AF33 AG33 C1038 1 2 0.47U_0402_6.3V6K
C3 USB3_V1P0_G3_Y19 CORE_V1P05_S3_AG33 AG35
USB3_V1P0_G3 0.01uF*1 C1039 1 2 0.01U_0402_16V7K USB3_V1P0_G3_C3 CORE_V1P05_S3_AG35 U33 C1040 1 2 1U_0402_6.3V6K
CORE_V1P05_S3_U33 U35 C1041 1 2 1U_0402_6.3V6K CORE_V1P05_S3 1uF*3
CORE_V1P05_S3_U35 V33 C1042 1 2 1U_0402_6.3V6K
2750mA CORE_V1P05_S3_V33
V32
+1.0VS SVID_V1P0_S3_V32 +1.8VALW
BJ6
AD35 VGA_V1P0_S3_BJ6
AF35 DRAM_V1P0_S0iX_AD35 U24
C1043 1 2 1U_0402_6.3V6K AF36 DRAM_V1P0_S0iX_AF35 UNCORE_V1P8_G3_U24 V25
C1044 1 2 1U_0402_6.3V6K AA36 DRAM_V1P0_S0iX_AF36 PCU_V1P8_G3_V25 N20 C1045 1 2 1U_0402_6.3V6K PMC_V1P8_G3 1uF*1
DRAM_V1P0_S0iX 1uF*4 C1046 1 2 1U_0402_6.3V6K AJ36 DRAM_V1P0_S0iX_AA36 USB_V1P8_G3_N20 U25
DRAM_V1P0_S0iX_AJ36
65mA PMU_V1P8_G3_U25
C1047 1 2 1U_0402_6.3V6K AK35 AA18
C DRAM_V1P0_S0iX_AK35 UNCORE_V1P8_G3_AA18 C
AK36
Y35 DRAM_V1P0_S0iX_AK36 +1.8VS
C1048 1 2 1U_0402_6.3V6K Y36 DRAM_V1P0_S0iX_Y35
DRAM_V1P0_S0iX_Y36
10mA
C1049 1 2 1U_0402_6.3V6K AK19 AM30
DDI_V1P0_S0iX 1uF*4 C1050 1 2 1U_0402_6.3V6K AK21 DDI_V1P0_S0iX_AK19 UNCORE_V1P8_S3_AM30 AN32 C1051 1 2 1U_0402_6.3V6K UNCORE_V1P8_S3 1uF*4
C1052 1 2 1U_0402_6.3V6K AJ18 DDI_V1P0_S0iX_AK21 UNCORE_V1P8_S3_AN32 U38 C1053 1 2 1U_0402_6.3V6K
AM16 DDI_V1P0_S0iX_AJ18 UNCORE_V1P8_S3_U38 C1054 1 2 1U_0402_6.3V6K
AN29 DDI_V1P0_S0iX_AM16 C1055 1 2 1U_0402_6.3V6K +1.5VS
AN30 VIS_V1P0_S0iX_AN29
VIS_V1P0_S0iX_AN30
58mA
C1056 1 2 22U_0805_6.3V6M V24 AM32
UNCORE_V1P0_S0iX 22uF*3 C1057 1 2 22U_0805_6.3V6M Y22 VIS_V1P0_S0iX_V24 HDA_V1P5_S3_AM32 C1058 1 2 1U_0402_6.3V6K HDA_LPE_V1P5V1P8_S3 1uF*1
1uF*2 C1059 1 2 22U_0805_6.3V6M Y24 VIS_V1P0_S0iX_Y22 +3VALW
C1060 1 2 1U_0402_6.3V6K AF16 VIS_V1P0_S0iX_Y24
C1061 1 2 1U_0402_6.3V6K AF18 UNCORE_V1P0_S3_AF16 N22 +3VALW_SOC 1 2 For EVT measurement
UNCORE_V1P0_S3_AF18
Y18
UNCORE_V1P0_S3_Y18
50mA PCU_V3P3_G3_N22 R1022 0_0603_5%
PCIE_SATA_V1P0_S3 1uF*1 C1062 1 2 1U_0402_6.3V6K G1 N18 C1063 1 2 .1U_0402_16V7K USB_V3P3_G3 0.1uF*1
UNCORE_V1P0_S3 1uF*1 C1064 1 2 1U_0402_6.3V6K AK18 UNCORE_V1P0_S3_G1 USB_V3P3_G3_N18 P18 C1065 1 2 1U_0402_6.3V6K USB_ULPI_V1P8_S3 1uF*1
PCIE_V1P0_S3 1uF*1 C1066 1 2 1U_0402_6.3V6K AM18 PCIE_V1P0_S3_AK18 USB_V3P3_G3_P18 C1067 1 2 1U_0402_6.3V6K PCU_V3P3_G3 1uF*1
VGA_V1P0_S3 1uF*1 C1068 1 2 1U_0402_6.3V6K AM21 PCIE_V1P0_S3_AM18 +3VS
USB_V1P0_S3 0.1uF*1 C1069 1 2 .1U_0402_16V7K AN21 PCIE_V1P0_S3_AM21
PCIE_V1P0_S3_AN21
33mA
USB3DEV_V1P0_S3 0.01uF*1 C1070 1 2 0.01U_0402_16V7K AN18 AN24 +3VS_SOC 1 2 For EVT measurement
GPIO_V1P0_S3 1uF*1 C1071 1 2 1U_0402_6.3V6K AN19 PCIE_SATA_V1P0_S3_AN18 VGA_V3P3_S3_AN24 R1023 0_0603_5%
SVID_V1P0_S3 1uF*1 C1072 1 2 1U_0402_6.3V6K AF21 SATA_V1P0_S3_AN19 AN27
AG21 UNCORE_V1P0_S0iX_AF21 SD3_V1P8V3P3_S3_AN27
B B
M14 UNCORE_V1P0_S0iX_AG21 AM27 1 2 VGA_V3P3_S3 1uF*1
U18 USB_V1P0_S3_M14 LPC_V1P8V3P3_S3_AM27 C1073 1U_0402_6.3V6K
U19 USB_V1P0_S3_U18
AN25 USB_V1P0_S3_U19 +1.0VALW
GPIO_V1P0_S3_AN25
35mA
V18 USB_HSIC_V1P2_G3 1uF*1
USB_HSIC_V1P2_G3_V18 C1074 1 2 1U_0402_6.3V6K Disable HSIC
@ If the USB HSIC is not used, pin V18 can be connected
F1 AD16 Pop when use +1.2VALW
RESERVED_F1 VSS_AD16 AD18 to either +V1P2A or +V1P0A.
T195 TP_CORE_V1P05_S4 AF30 VSS_AD18
TP_CORE_V1P05_S4_AF30
8 OF 13
FH8065301546401_FCBGA131170

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 Deciphered Date 2015/03/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VLV-M SOC Power
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 13 of 42
5 4 3 2 1
5 4 3 2 1

+1.35V
12A +SOC_VCC USOC1G 20mil For EVT measurement JP14 JP@
AA27 AD38 DRAM_VDD_S4_CLK RC54 1 2 0_0402_5%
AA29 CORE_VCC_S0iX_AA27 DRAM_VDD_S4_AD38 AF38
AA30 CORE_VCC_S0iX_AA29 DRAM_VDD_S4_AF38 JUMP_43X118
D +SOC_VCC AC27 CORE_VCC_S0iX_AA30 A48 CC27 1 2 1U_0402_6.3V6K JP15 JP@ D
AC29 CORE_VCC_S0iX_AC27 DRAM_VDD_S4_A48 AK38 CC28 1 2 .1U_0402_16V7K
CORE_VCC_S0iX_AC29 DRAM_VDD_S4_AK38

330U_D2_2.5V_R6M
AC30 AM38
CORE_VCC_S0iX_AC30 DRAM_VDD_S4_AM38 AV41 JUMP_43X118
AD27 DRAM_VDD_S4_AV41 AV42
1 CORE_VCC_S0iX_AD27 DRAM_VDD_S4_AV42
1250mA
@ AD29 BB46
CORE_VCC_S0iX_AD29 DRAM_VDD_S4_BB46

CD32
+ AD30 BD49 +1.35V_SOC
AF27 CORE_VCC_S0iX_AD30 DRAM_VDD_S4_BD49 BD52
AF29 CORE_VCC_S0iX_AF27 DRAM_VDD_S4_BD52 BD53
2 AG27 CORE_VCC_S0iX_AF29 DRAM_VDD_S4_BD53 BF44 +1.35V_SOC
AG29 CORE_VCC_S0iX_AG27 DRAM_VDD_S4_BF44 BG51
AG30 CORE_VCC_S0iX_AG29 DRAM_VDD_S4_BG51 BJ48 CC29 2 1 2.2U_0402_6.3V6M
P26 CORE_VCC_S0iX_AG30 DRAM_VDD_S4_BJ48 C51 CC30 2 1 2.2U_0402_6.3V6M
P27 CORE_VCC_S0iX_P26 DRAM_VDD_S4_C51 D44 CC31 2 1 2.2U_0402_6.3V6M
U27 CORE_VCC_S0iX_P27 DRAM_VDD_S4_D44 F49 CC32 2 1 2.2U_0402_6.3V6M
U29 CORE_VCC_S0iX_U27 DRAM_VDD_S4_F49 F52
V27 CORE_VCC_S0iX_U29 DRAM_VDD_S4_F52 F53
V29 CORE_VCC_S0iX_V27 DRAM_VDD_S4_F53 H46
V30 CORE_VCC_S0iX_V29 DRAM_VDD_S4_H46 M41
Y27 CORE_VCC_S0iX_V30 DRAM_VDD_S4_M41 M42 CC33 1 2 10U_0603_6.3V6M
Y29 CORE_VCC_S0iX_Y27 DRAM_VDD_S4_M42 V38 CC34 1 2 10U_0603_6.3V6M
Y30 CORE_VCC_S0iX_Y29 DRAM_VDD_S4_V38 Y38
CORE_VCC_S0iX_Y30 DRAM_VDD_S4_Y38
C C
T112 TP2_CORE_VCC_S0iX AA22
TP2_CORE_VCC_S0iX
14A +SOC_VNN +1.35VS
420mA
AM22 AG18
AK32 UNCORE_VNN_S3_AM22 ICLK_V1P35_S3_F2_AG18 AJ19
AK30 UNCORE_VNN_S3_AK32 ICLK_V1P35_S3_F1_AJ19
AK29 UNCORE_VNN_S3_AK30 @
AK27 UNCORE_VNN_S3_AK29 BD1 VGA_V1P35_S3_F1 1 2
UNCORE_VNN_S3_AK27 VGA_V1P35_S3_F1_BD1
0708:Change Size
AK25 L1 BLM15AG601SN1D_2P
AK24 UNCORE_VNN_S3_AK25
AK22 UNCORE_VNN_S3_AK24 CC35 1 2 10U_0603_6.3V6M
UNCORE_VNN_S3_AK22
0705 : For CRT Flicker
AJ24 AD36
AJ22 UNCORE_VNN_S3_AJ24 DRAM_V1P35_S0iX_F1_AD36
+SOC_VNN +SOC_VCC AG24 UNCORE_VNN_S3_AJ22 AG32 CC36 1 2 22U_0805_6.3V6M
AG22 UNCORE_VNN_S3_AG24 UNCORE_V1P35_S0iX_F2_AG32 V36 @
AF24 UNCORE_VNN_S3_AG22 UNCORE_V1P35_S0iX_F3_V36 U36
AF22 UNCORE_VNN_S3_AF24 UNCORE_V1P35_S0iX_F4_U36
UNCORE_VNN_S3_AF22
1

AD22 AA25
AC24 UNCORE_VNN_S3_AD22 UNCORE_V1P35_S0iX_F5_AA25
RC55 RC56 AC22 UNCORE_VNN_S3_AC24
100_0402_1% 100_0402_1% AA24 UNCORE_VNN_S3_AC22
AD24 UNCORE_VNN_S3_AA24
2

UNCORE_VNN_S3_AD24
B B
AF19 CC38 1 2 22U_0805_6.3V6M
BB8 UNCORE_V1P35_S0iX_F6_AF19 AG19 CC39 1 2 1U_0402_6.3V6K
<39> VGFX_VSNS P28 UNCORE_VNN_SENSE UNCORE_V1P35_S0iX_F1_AG19 1 2
CC40 1U_0402_6.3V6K
<39> VCORE_VSNS N28 CORE_VCC_SENSE_P28 7 OF 13 1 2
CC41 1U_0402_6.3V6K
<39> VCORE_GSNS CORE_VSS_SENSE_N28 1 2
CC42 1U_0402_6.3V6K
1

CC43 1 2 1U_0402_6.3V6K
FH8065301546401_FCBGA131170 CC44 1 2 1U_0402_6.3V6K
RC58 CC45 1 2 1U_0402_6.3V6K
100_0402_1% CC46 1 2 1U_0402_6.3V6K
@
CC47 1 2 1U_0402_6.3V6K
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/03/10 2015/03/31 Title
Issued Date Deciphered Date VLV-M SOC Power
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 14 of 42
5 4 3 2 1
5 4 3 2 1

D D

USOC1I USOC1J USOC1K USOC1L USOC1M

A11 AC36 AG38 AH47 AT24 AY36 BF30 E8 K9 U3


A15 VSS_A11 VSS_AC36 AC38 AH4 VSS_AG38 VSS_AH47 AH48 AT27 VSS_AT24 VSS_AY36 AY4 BF36 VSS_BF30 VSS_E8 F19 L13 VSS_K9 VSS_U3 U30
A19 VSS_A15 VSS_AC38 AD19 AH41 VSS_AH4 VSS_AH48 AH50 AT30 VSS_AT27 VSS_AY4 AY50 BF4 VSS_BF36 VSS_F19 F2 L19 VSS_L13 VSS_U30 U32
A23 VSS_A19 VSS_AD19 AD21 AH45 VSS_AH41 VSS_AH50 AH51 AT35 VSS_AT30 VSS_AY50 AY9 BG31 VSS_BF4 VSS_F2 F24 L27 VSS_L19 VSS_U32 U40
A27 VSS_A23 VSS_AD21 AD25 AH7 VSS_AH45 VSS_AH51 AH6 AT38 VSS_AT35 VSS_AY9 BA14 BG34 VSS_BG31 VSS_F24 F27 L35 VSS_L27 VSS_U40 U42
A31 VSS_A27 VSS_AD25 AD32 AH9 VSS_AH7 VSS_AH6 AM44 AT4 VSS_AT38 VSS_BA14 BA19 BG39 VSS_BG34 VSS_F27 F30 M19 VSS_L35 VSS_U42 U43
A35 VSS_A31 VSS_AD32 AD33 AJ1 VSS_AH9 VSS_AM44 AM51 AT47 VSS_AT4 VSS_BA19 BA22 BG42 VSS_BG39 VSS_F30 F35 M26 VSS_M19 VSS_U43 U45
A39 VSS_A35 VSS_AD33 AD47 AJ16 VSS_AJ1 VSS_AM51 AM7 AT52 VSS_AT47 VSS_BA22 BA27 BG45 VSS_BG42 VSS_F35 F5 M27 VSS_M26 VSS_U45 U46
A43 VSS_A39 VSS_AD47 AD7 AJ21 VSS_AJ16 VSS_AM7 AN1 AU1 VSS_AT52 VSS_BA27 BA32 BG49 VSS_BG45 VSS_F5 F7 M34 VSS_M27 VSS_U46 U48
A47 VSS_A43 VSS_AD7 AE1 AJ25 VSS_AJ21 VSS_AN1 AN11 AU24 VSS_AU1 VSS_BA32 BA35 BJ11 VSS_BG49 VSS_F7 G10 M35 VSS_M34 VSS_U48 U49
AA1 VSS_A47 VSS_AE1 AE11 AJ27 VSS_AJ25 VSS_AN11 AN12 AU3 VSS_AU24 VSS_BA35 BA40 BJ15 VSS_BJ11 VSS_G10 G20 M38 VSS_M35 VSS_U49 U5
C VSS_AA1 VSS_AE11 VSS_AJ27 VSS_AN12 VSS_AU3 VSS_BA40 VSS_BJ15 VSS_G20 VSS_M38 VSS_U5 C
AA16 AE12 AJ29 AN14 AU30 BA53 BJ19 G22 M47 U51
AA19 VSS_AA16 VSS_AE12 AE14 AJ3 VSS_AJ29 VSS_AN14 AN22 AU38 VSS_AU30 VSS_BA53 BB19 BJ23 VSS_BJ19 VSS_G22 G26 M51 VSS_M47 VSS_U51 U53
AA21 VSS_AA19 VSS_AE14 AE3 AJ30 VSS_AJ3 VSS_AN22 AN3 AU51 VSS_AU38 VSS_BB19 BB27 BJ27 VSS_BJ23 VSS_G26 G28 N1 VSS_M51 VSS_U53 U6
AA3 VSS_AA21 VSS_AE3 AE4 AJ32 VSS_AJ30 VSS_AN3 AN33 AV12 VSS_AU51 VSS_BB27 BB35 BJ31 VSS_BJ27 VSS_G28 G32 N16 VSS_N1 VSS_U6 U8
AA32 VSS_AA3 VSS_AE4 AE40 AJ33 VSS_AJ32 VSS_AN33 AN35 AV13 VSS_AV12 VSS_BB35 BC20 BJ35 VSS_BJ31 VSS_G32 G34 N38 VSS_N16 VSS_U8 U9
AA35 VSS_AA32 VSS_AE40 AE42 AJ35 VSS_AJ33 VSS_AN35 AN36 AV14 VSS_AV13 VSS_BC20 BC22 BJ39 VSS_BJ35 VSS_G34 G42 N51 VSS_N38 VSS_U9 V12
AA38 VSS_AA35 VSS_AE42 AE43 AJ38 VSS_AJ35 VSS_AN36 AN38 AV18 VSS_AV14 VSS_BC22 BC26 BJ43 VSS_BJ39 VSS_G42 H19 P13 VSS_N51 VSS_V12 V16
AA53 VSS_AA38 VSS_AE43 AE45 AJ53 VSS_AJ38 VSS_AN38 AN40 AV19 VSS_AV18 VSS_BC26 BC28 BJ47 VSS_BJ43 VSS_H19 H27 P16 VSS_P13 VSS_V16 V19
AB10 VSS_AA53 VSS_AE45 AE46 AK10 VSS_AJ53 VSS_AN40 AN42 AV24 VSS_AV19 VSS_BC28 BC32 BJ7 VSS_BJ47 VSS_H27 H35 P19 VSS_P16 VSS_V19 V21
AB4 VSS_AB10 VSS_AE46 AE48 AK14 VSS_AK10 VSS_AN42 AN43 AV27 VSS_AV24 VSS_BC32 BC34 C14 VSS_BJ7 VSS_H35 J1 P20 VSS_P19 VSS_V21 V35
AB41 VSS_AB4 VSS_AE48 AE50 AK16 VSS_AK14 VSS_AN43 AN45 AV30 VSS_AV27 VSS_BC34 BC42 C31 VSS_C14 VSS_J1 J16 P24 VSS_P20 VSS_V35 V40
AB45 VSS_AB41 VSS_AE50 AE51 AK33 VSS_AK16 VSS_AN45 AN46 AV35 VSS_AV30 VSS_BC42 BD19 C34 VSS_C31 VSS_J16 J19 P32 VSS_P24 VSS_V40 V44
AB47 VSS_AB45 VSS_AE51 AE53 AK41 VSS_AK33 VSS_AN46 AN48 AV38 VSS_AV35 VSS_BD19 BD24 C39 VSS_C34 VSS_J19 J22 P35 VSS_P32 VSS_V44 V51
AB48 VSS_AB47 VSS_AE53 AE6 AK44 VSS_AK41 VSS_AN48 AN49 AV47 VSS_AV38 VSS_BD24 BD27 C42 VSS_C39 VSS_J22 J27 P38 VSS_P35 VSS_V51 V7
AB50 VSS_AB48 VSS_AE6 AE8 AM12 VSS_AK44 VSS_AN49 AN5 AV51 VSS_AV47 VSS_BD27 BD30 C45 VSS_C42 VSS_J27 J32 P4 VSS_P38 VSS_V7 Y10
AB51 VSS_AB50 VSS_AE8 AE9 AM19 VSS_AM12 VSS_AN5 AN51 AV7 VSS_AV51 VSS_BD30 BD35 C49 VSS_C45 VSS_J32 J35 P47 VSS_P4 VSS_Y10 Y14
AB6 VSS_AB51 VSS_AE9 AF10 AM24 VSS_AM19 VSS_AN51 AN53 AW13 VSS_AV7 VSS_BD35 BE19 D12 VSS_C49 VSS_J35 J40 P52 VSS_P47 VSS_Y14 Y16
AC16 VSS_AB6 VSS_AF10 AF12 AM25 VSS_AM24 VSS_AN53 AN6 AW19 VSS_AW13 VSS_BE19 BE2 D16 VSS_D12 VSS_J40 J53 P9 VSS_P52 VSS_Y16 Y21
AC18 VSS_AC16 VSS_AF12 AF25 AM29 VSS_AM25 VSS_AN6 AN8 AW27 VSS_AW19 VSS_BE2 BE35 D24 VSS_D16 VSS_J53 K14 T40 VSS_P9 VSS_Y21 Y25
AC19 VSS_AC18 VSS_AF25 AF32 AM33 VSS_AM29 VSS_AN8 AN9 AW3 VSS_AW27 VSS_BE35 BE8 D30 VSS_D24 VSS_K14 K22 U1 VSS_T40 VSS_Y25 Y33
AC21 VSS_AC19 VSS_AF32 AF47 AM35 VSS_AM33 VSS_AN9 AP40 AW35 VSS_AW3 VSS_BE8 BF12 D36 VSS_D30 VSS_K22 K32 U11 VSS_U1 VSS_Y33 Y41
AC25 VSS_AC21 VSS_AF47 AG16 AM36 VSS_AM35 VSS_AP40 AT12 AY10 VSS_AW35 VSS_BF12 BF16 D38 VSS_D36 VSS_K32 K36 U12 VSS_U11 VSS_Y41 Y44
AC33 VSS_AC25 VSS_AG16 AG25 AM40 VSS_AM36 VSS_AT12 AT16 AY22 VSS_AY10 VSS_BF16 BF24 E19 VSS_D38 VSS_K36 K4 U14 VSS_U12 VSS_Y44 Y7
AC35 VSS_AC33 VSS_AG25 AG36 M28 VSS_AM40 VSS_AT16 AT19 AY32 VSS_AY22 VSS_BF24 BF38 E35 VSS_E19 VSS_K4 K50 U21 VSS_U14 VSS_Y7 Y9
B B
B2 VSS_AC35 9 OF 13VSS_AG36 B52 VSS_M28 10 OF 13 VSS_AT19 VSS_AY32 11 OF 13
VSS_BF38 VSS_E35 12 OF 13 VSS_K50 VSS_U21 13 OF 13 VSS_Y9
A6 VSS_B2 VSS_B52 B53
A52 VSS_A6 VSS_B53 BE1 FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170
A51 VSS_A52 VSS_BE1 BE53
A5 VSS_A51 VSS_BE53 BG1
VSS_A5 VSS_BG1 @ @ @ @
A49 BJ2
A3 VSS_A49 VSS_BJ2 BJ3
BH53 VSS_A3 VSS_BJ3 BJ5
BH52 VSS_BH53 VSS_BJ5 BJ49
BH2 VSS_BH52 VSS_BJ49 BJ51
BH1 VSS_BH2 VSS_BJ51 BJ52
BG53 VSS_BH1 VSS_BJ52 C1
E53 VSS_BG53 VSS_C1 C53
VSS_E53 VSS_C53 E1
VSS_E1
U16
AN16 USB_VSSA_U16
VSSA_AN16

FH8065301546401_FCBGA131170

@
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/03/10 2015/03/31 Title
Issued Date Deciphered Date VLV-M SOC GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 15 of 42
5 4 3 2 1
5 4 3 2 1

+1.8VALW

1
XDP@
D RC61 D
200_0402_5%

2
XDP_H_PREQ_BUF#

0625 update
XDP_RSTBTN#

1 @ 2 1 2
+1.8VALW
RC62 CC49 XDP@
1K_0402_5% .1U_0402_16V7K

+1.8VALW
@
RC63 1 2 51_0402_5% XDP_H_TDO

TDO Close To XDP Conn >250 mil

C C

XDP-SFF-26Pin
CONN@
JDB1

XDP_H_PREQ_BUF# 1
<11> XDP_H_PREQ_BUF# 2 1
XDP_H_PRDY#
<11> XDP_H_PRDY# 3 2
XDP_OBSDATA_A0 4 3
<11> XDP_OBSDATA_A0 5 4
XDP_OBSDATA_A1
<11> XDP_OBSDATA_A1 6 5
XDP_OBSDATA_A2 7 6
<11> XDP_OBSDATA_A2 XDP_OBSDATA_A3 8 7
<11> XDP_OBSDATA_A3 9 8
B B
EC_RSMRST# 10 9
<11,32> EC_RSMRST# 11 10
PMC_CORE_PWROK 12 11
<11,32> PMC_CORE_PWROK RTC_TEST# 13 12
<11> RTC_TEST# 14 13 1 2 1 2
XDP_H_PREQ_BUF# PMC_PLTRST#
15 14 CC50 EMC@ CC51 EMC@
16 15 .1U_0402_16V7K .1U_0402_16V7K
+1.8VALW 16
PMC_PLTRST# 17 XDP_H_PRDY# 1 2 XDP_RSTBTN# 1 2 EC_RSMRST# 1 2
<11> PMC_PLTRST# XDP_RSTBTN# 18 17 CC52 EMC@ CC53 NEMC@ CC54 NEMC@
<11> XDP_RSTBTN# 19 18 .1U_0402_16V7K .1U_0402_16V7K .1U_0402_16V7K
XDP_H_TDO 20 19 XDP_OBSDATA_A0 1 2 XDP_H_TDO 1 2 PMC_CORE_PWROK 1 2
<11> XDP_H_TDO 20
XDP_H_TRST# 21 CC55 EMC@ CC56 EMC@ CC57 NEMC@
<11> XDP_H_TRST# 22 21
XDP_H_TDI .1U_0402_16V7K .1U_0402_16V7K .1U_0402_16V7K
<11> XDP_H_TDI XDP_H_TMS 23 22 XDP_OBSDATA_A1 1 2 XDP_H_TRST# 1 2
<11> XDP_H_TMS 24 23 CC58 EMC@ CC59 EMC@
25 24 27 .1U_0402_16V7K .1U_0402_16V7K
XDP_H_TCK 26 25 G1 28 XDP_OBSDATA_A2 1 2 XDP_H_TDI 1 2
<11> XDP_H_TCK 26 G2 CC60 EMC@ CC61 EMC@
.1U_0402_16V7K .1U_0402_16V7K
MOLEX_52435-2671_26P_P0.5 XDP_OBSDATA_A3 1 2 XDP_H_TMS 1 2 0708:for ESD request
PCB Footprint = MOLEX_52435-2671_26P-T CC62 EMC@ CC63 EMC@
.1U_0402_16V7K .1U_0402_16V7K
RTC_TEST# 1 2 XDP_H_TCK 1 2
A CC64 EMC@ CC65 EMC@ A
.1U_0402_16V7K .1U_0402_16V7K

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/03/10 2015/03/31 Title
Issued Date Deciphered Date VLV-M SOC Debug
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 16 of 42
5 4 3 2 1
5 4 3 2 1

+1.8VALW
PIR Item 62
+3VS +1.8VS

1
+3VS
D 1 D
C182

1
R8 0.1U_0402_16V7K
4.7K_0402_5% ESD@
2

5
U66 R7

2
1 4.7K_0402_5%

P
NC

5
4 SOC_SCI# U65
SOC_SCI# <10>

2
EC_SCI# 2 Y 1

P
<32> EC_SCI# A NC

G
4 SOC_SMI#
Y SOC_SMI# <11>
NL17SZ07DFT2G_SC70-5 EC_SMI# 2

3
<32> EC_SMI# A

G
SA00004BV00
NL17SZ07DFT2G_SC70-5

3
SA00004BV00

+3VLP +3VALW_EC
+3VLP +3VALW_EC PIR Item 47
1

1
R21 R20 +3VALW
@ R19 R18 +3VALW
0_0402_5% 0_0402_5% PIR Item 82

1
@ 0_0402_5% 0_0402_5%

1
PIR Item 82
2

R14

2
4.7K_0402_5% R13
5

U57 4.7K_0402_5%

5
1 U54
P

2
C
NC 4 SIO_SLP_S5# 1 C

P
Y SIO_SLP_S5# <32> NC
PMC_SLP_S4# 2 4 SIO_SLP_S3#
<11> PMC_SLP_S4# A Y SIO_SLP_S3# <32>
G

PMC_SLP_S3# 2
<11> PMC_SLP_S3# A
1

G
NL17SZ07DFT2G_SC70-5
3

1
R1033 SA00004BV00 NL17SZ07DFT2G_SC70-5
PIR Item 47

3
R1024 SA00004BV00
10K_0402_5% PIR Item 82 10K_0402_5%
2

PIR Item 82

2
+3VALW_EC +1.8VALW
1

R3
4.7K_0402_5%
5

U61
2

1
P

NC 4 SOC_KBRST#
Y SOC_KBRST# <11>
KB_RST# 2
<32> KB_RST# A
G

NL17SZ07DFT2G_SC70-5
3

SA00004BV00 +3VALW_EC +1.8VALW

1
PIR Item 22 R6
4.7K_0402_5%
B B

5
U63

2
1

P
NC 4 PMC_PWRBTN#
Y PMC_PWRBTN# <11>
PBTN_OUT# 2
<32> PBTN_OUT# A

G
NL17SZ07DFT2G_SC70-5

3
SA00004BV00

+3VALW_EC +1.8VALW
1

R4
4.7K_0402_5%
5

U62
2

1
P

NC 4 SOC_LID_OUT#
Y SOC_LID_OUT# <11>
EC_LID_OUT# 2
<32> EC_LID_OUT# A
G

+1.8VALW +3VALW_EC
NL17SZ07DFT2G_SC70-5
3

SA00004BV00

U64 SA00007CX00
1 6
PIR Item 40 2 VCCA VCCB 5 R5 1 2 4.7K_0402_5%
GND EO +1.8VALW
A 3 4 SERIRQ A
PIR Item 47 <12> SOC_SERIRQ A4 B4 SERIRQ <32>
G2129TL1U_SC70-6

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date VLV-M SOC Level Shifter
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 17 of 42
5 4 3 2 1
5 4 3 2 1

+1.35V

H=4mm @

1
+DIMM1_VREF_DQ
RD3
+1.35V +1.35V 470_0402_5%

1
JDIMM1 CONN@
2
2-3A to 1 DIMMs/channel

2
3 VREF_DQ VSS1 4 DDR_A_D4
VSS2 DQ4

2.2U_0402_6.3V6M

0.1U_0402_10V7K
D DDR_A_D0 5 6 DDR_A_D5 DDR_A_RST# 1 2 D
DQ0 DQ5 DDR_A_RST#_CPU <8>
DDR_A_D1 7 8
9 DQ1 VSS3 10 @
Populate RD1, De-Populate RD7 for Intel DDR3 1 1 VSS4 DQS#0
DDR_A_DQS#0

CD1

CD2
DDR_A_DM0 11 12 DDR_A_DQS0 RD5
VREFDQ multiple methods M1 13 DM0 DQS0 14 0_0402_1%
DDR_A_D2 15 VSS5 VSS6 16 DDR_A_D6
Populate RD7, De-Populate RD1 for Intel DDR3 2 2 17 DQ2 DQ6 18
DDR_A_D3 DDR_A_D7
VREFDQ multiple methods M3 19 DQ3 DQ7 20
DDR_A_D8 21 VSS7 VSS8 22 DDR_A_D12
DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13
25 DQ9 DQ13 26
DDR_A_DQS#1 27 VSS9 VSS10 28 DDR_A_DM1
DDR_A_DQS1 29 DQS#1 DM1 30 DDR_A_RST#
<8> DDR_A_DM[0..7] DQS1 RESET# +1.35V +DIMM1_VREF_DQ
31 32
DDR_A_D10 33 VSS11 VSS12 34 DDR_A_D14 ESD@
<8> DDR_A_DQS#[0..7] DQ10 DQ14 1
DDR_A_D11 35 36 DDR_A_D15 CD3 1 2
37 DQ11 DQ15 38 0.1U_0402_10V7K R1027
<8> DDR_A_D[0..63] All VREF traces should
DDR_A_D16 39 VSS13 VSS14 40 DDR_A_D20 4.7K_0402_1%
have 10 mil trace width DQ16 DQ20 2
1
DDR_A_D17 41 42 DDR_A_D21 1 2
<8> DDR_A_DQS[0..7] DQ17 DQ21
43 44 R1028 C1076
DDR_A_DQS#2 45 VSS15 VSS16 46 DDR_A_DM2 4.7K_0402_1%
<8> DDR_A_MA[0..15] .1U_0402_16V7K
DDR_A_DQS2 47 DQS#2 DM2 48 2
49 DQS2 VSS17 50 DDR_A_D22
DDR_A_D18 51 VSS18 DQ22 52 DDR_A_D23
Layout Note: Note: DDR_A_D19 53 DQ18 DQ23 54 CAD NOTE
55 DQ19 VSS19 56 DDR_A_D28
Place near JDIMM1 Check voltage tolerance of DDR_A_D24 57 VSS20 DQ28 58 DDR_A_D29
PLACE THE CAP NEAR TO +1.35V +DIMM1_VREF_CA
59 DQ24 DQ29 60
DDR_A_D25
DQ25 VSS21 DIMM RESET PIN
VREF_DQ at the DIMM socket DDR_A_DM3
61
63 VSS22 DQS#3
62
64
DDR_A_DQS#3
DDR_A_DQS3
1
R1029
2

65 DM3 DQS3 66 4.7K_0402_1%


VSS23 VSS24 1
DDR_A_D26 67 68 DDR_A_D30 1 2
+1.35V DDR_A_D27 69 DQ26 DQ30 70 DDR_A_D31 R1030 C1078
71 DQ27 DQ31 72 4.7K_0402_1% .1U_0402_16V7K
VSS25 VSS26 2
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

C 1 1 1 1 1 1 1 1 DDR_A_CKE0 73 74 DDR_A_CKE2 C
<8> DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE2 <8>
75 76
VDD1 VDD2
CD4

CD5

CD6

CD7

CD8

CD9

CD10

CD11

77 78 DDR_A_MA15
DDR_A_BS2 79 NC1 A15 80 DDR_A_MA14
2 2 2 2 2 2 2 2 <8> DDR_A_BS2 BA2 A14
81 82 M_ODT0 1 @ 2 DDR_A_ODT0
VDD3 VDD4 DDR_A_ODT0 <8>
DDR_A_MA12 83 84 DDR_A_MA11 RD8 0_0402_1%
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7 M_ODT1 1 @ 2 DDR_A_ODT2
A9 A7 DDR_A_ODT2 <8>
87 88 RD9 0_0402_1%
DDR_A_MA8 89 VDD5 VDD6 90 DDR_A_MA6
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
93 A5 A4 94
DDR_A_MA3 95 VDD7 VDD8 96 DDR_A_MA2
DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
+1.35V 99 A1 A0 100
DDR_A_CLK0 101 VDD9 VDD10 102 DDR_A_CLK2
<8> DDR_A_CLK0 CK0 CK1 DDR_A_CLK2 <8>
DDR_A_CLK0# 103 104 DDR_A_CLK2#
<8> DDR_A_CLK0# CK0# CK1# DDR_A_CLK2# <8>
105 106
VDD11 VDD12
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

330U_D2_2.5V_R6M

DDR_A_MA10 107 108 DDR_A_BS1


A10/AP BA1 DDR_A_BS1 <8>
DDR_A_BS0 109 110 DDR_A_RAS#
<8> DDR_A_BS0 BA0 RAS# DDR_A_RAS# <8>
1 111 112
113 VDD13 VDD14 114
1 1@ 1 1 1@ 1 1 1 <8> DDR_A_WE#
DDR_A_WE#
WE# S0#
DDR_A_CS0#
DDR_A_CS0# <8>
CD16

CD17

CD12

CD18

CD19

CD20

CD13

CD14

CD15

+ DDR_A_CAS# 115 116 M_ODT0


<8> DDR_A_CAS# CAS# ODT0
117 118
DDR_A_MA13 119 VDD15 VDD16 120 M_ODT1
2 2 2 2 2 2 2 2 2 DDR_A_CS2# 121 A13 ODT1 122 +DIMM1_VREF_CA
<8> DDR_A_CS2# S1# NC2
123 124
125 VDD17 VDD18 126 1 2
NCTEST VREF_CA

2.2U_0402_6.3V6M

0.1U_0402_10V7K
127 128
DDR_A_D32 129 VSS27 VSS28 130 DDR_A_D36 @
DDR_A_D33 131 DQ32 DQ36 132 DDR_A_D37 RD4
DQ33 DQ37 1 1

CD21

CD22
133 134 0_0402_1%
DDR_A_DQS#4 135 VSS29 VSS30 136 DDR_A_DM4
DDR_A_DQS4 137 DQS#4 DM4 138
139 DQS4 VSS31 140 DDR_A_D38 2 2
DDR_A_D34 141 VSS32 DQ38 142 DDR_A_D39
Layout Note: DQ34 DQ39
DDR_A_D35 143 144
Place near JDIMM1.203,204 145 DQ35 VSS33 146 DDR_A_D44
DDR_A_D40 147 VSS34 DQ44 148 DDR_A_D45
B B
DDR_A_D41 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDR_A_DQS#5
DDR_A_DM5 153 VSS36 DQS#5 154 DDR_A_DQS5
155 DM5 DQS5 156
DDR_A_D42 157 VSS37 VSS38 158 DDR_A_D46
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47
+0.675VS 161 DQ43 DQ47 162
DDR_A_D48 163 VSS39 VSS40 164 DDR_A_D52
DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53
167 DQ49 DQ53 168
DDR_A_DQS#6 169 VSS41 VSS42 170 DDR_A_DM6
DQS#6 DM6
0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

10U_0603_6.3V6M

10U_0603_6.3V6M

DDR_A_DQS6 171 172


173 DQS6 VSS43 174 DDR_A_D54
1 1 1 1 1 1 VSS44 DQ54
CD24

CD25

CD26

CD27

CD28

CD29

DDR_A_D50 175 176 DDR_A_D55


DDR_A_D51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDR_A_D60
2 2 2 2 2 2 DDR_A_D56 181 VSS46 DQ60 182 DDR_A_D61
DDR_A_D57 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDR_A_DQS#7
DDR_A_DM7 187 VSS48 DQS#7 188 DDR_A_DQS7
189 DM7 DQS7 190
DDR_A_D58 191 VSS49 VSS50 192 DDR_A_D62
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
195 DQ59 DQ63 196
RD6 1 2 10K_0402_5% 197 VSS51 VSS52 198
199 SA0 EVENT# 200
+3VS VDDSPD SDA EC_SMB_DA2 <12,19,28,29,32>
1 2 201 202
SA1 SCL EC_SMB_CK2 <12,19,28,29,32>
2.2U_0402_6.3V6M

RD7 10K_0402_5% 1 1 203 204 +0.675VS


VTT1 VTT2
0.1U_0402_10V7K

@ +0.675VS
Need to Confirm
CD30

CD31

205 206
G1 G2
2 2 LCN_DAN06-K4406-0102

Channel A
A A

+3VS +1.35V <Address: SA1:SA0=00 (A0H)>


CD62
1 2

22U_0603_6.3V6M
DIMM_1 STD H:4mm
ESD@
Security Classification Compal Secret Data Compal Electronics, Inc.
ESD solution 2014/03/10 2015/03/31 Title
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII DIMMA
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 18 of 42
5 4 3 2 1
5 4 3 2 1

+AVCC33
10U_0603_6.3V6M

0.1U_0402_16V7K

0.1U_0402_16V7K
1 1 1
Power Consumption:
CT1

CT3

CT2
D D
2 2 2
Pin22 (DPV33) < 20mA
Pin 11 (DP_V12) < 100mA
Close to LT2 Close to 3 pin
Pin 15 (SWR_VCCK) < 100mA (layout trace > 60 mil)
Pin 17 (SWR_LX) < 600mA (layout trace > 60 mil)
Pin 18 (SWR_VDD) < 200mA (layout trace > 40 mil)
+DVCC33
Pin 22 (PVCC) < 50 mA
+3VS +3VS_RT
10U_0603_6.3V6M

0.1U_0402_16V7K

10U_0603_6.3V6M

22U_0805_6.3V6M

0.1U_0402_16V7K

0.1U_0402_16V7K Pin 43 (VCCK) < 50mA


CX50

1 1 1 1 1 1
+DVCC33 +DVCC33
30mil 30mil
CT4

CT5

CT6

CT7

CT8 1 @ 2

2
2 2 2 2 2 2 RT1 0_0805_1% @
+3VS_RT RT2 RT20
4.7K_0402_5% EEPROM 4.7K_0402_5%
UT2
Close to LT1 Close to 18 pin Close to 13 pin 19 LVDS_ACLK+
LVDS_ACLK+ <20>

1
LT2 2 1 +AVCC33 3 TXEC+ 20 LVDS_ACLK- MIIC_SCL MIIC_SDA
DP_V33 TXEC- LVDS_ACLK- <20>
FBMA-L11-201209-221LMA30T_0805
LT1 2 1 +DVCC33 40 mils 13 21 LVDS_A2+
SWR_VDD TXE2+ LVDS_A2+ <20>

2
Power
FBMA-L11-201209-221LMA30T_0805 18 22 LVDS_A2-

LVDS
+DVCC33 PVCC TXE2- LVDS_A2- <20>
60 mils RT3 RT12
+SWR_V12 @ LT3 1 2 +SW_LX 60 mils 12 23 LVDS_A1+ 4.7K_0402_5% ROMLESS 4.7K_0402_5%
SWR_LX TXE1+ LVDS_A1+ <20>
+SWR_V12 4.7UH_PG031B-4R7MS_1.1A_20% 60 mils 11 24 LVDS_A1- 1:RevD W EEPROM @
SWR_VCCK TXE1- LVDS_A1- <20>
27
0:RevE W/O EEPROM

1
VCCK
10U_0603_6.3V6M

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

+SWR_V12 1 2 +SW_LX 7 25 LVDS_A0+


DP_V12 TXE0+ LVDS_A0+ <20>
1 1 1 1 RT331 0_0603_5% 26 LVDS_A0-
TXE0- LVDS_A0- <20>
CT9

CT10

CT11

CT12

2 2 2 2 RTD2132S
C EDP_CPU_AUX CX43 1 2 0.1U_0402_10V7K CPU_EDP_AUX_C 2 C
<9> EDP_CPU_AUX AUX_P

DP-IN
EDP_CPU_AUX# CX44 1 2 0.1U_0402_10V7K CPU_EDP_AUX#_C 1 14 TL_INVT_PWM

GPIO
<9> EDP_CPU_AUX# AUX_N GPIO(PWM OUT) TL_INVT_PWM <20>
15 TL_ENVDD
GPIO(Panel_VCC) TL_ENVDD <20>
Close to LT3 Close to 27 pin Close to 7 pin EDP_CPU_LANE_P0 CX42 1 2 0.1U_0402_10V7K CPU_EDP_P0_C 5 16 EDP_BIA_PWM
<9> EDP_CPU_LANE_P0 LANE0P GPIO(PWM IN) EDP_BIA_PWM <9>
EDP_CPU_LANE_N0 CX46 1 2 0.1U_0402_10V7K CPU_EDP_N0_C 6 17 TL_BKOFF#_R Pin47 MIIC_SDA
<9> EDP_CPU_LANE_N0 LANE0N GPIO(BL_EN)

RT9
@
1 ShortPad 2 0_0402_5% 9 29
0 1
CSCL CIICSCL LVDS EDID_CLK EDID_CLK <20>
CSDA RT11 1 ShortPad 2 0_0402_5% CIICSDA 10 CIICSCL1 MIICSCL1 28 EDID_DATA
CIICSDA1 EDID MIICDA1 EDID_DATA <20> Pin48 0 x EP MODE

Other
@ MIIC_SCL 1 ROM EEPROM
EDP_HPD 32 ROM 31 MIIC_SCL
HPD MIICSCL0 30 MIIC_SDA
RX5 1 2 12K_0402_1% 8 MIICSDA0
+1.8VS 4 DP_REXT 33
DP_GND GND
1

RTD2132N-CGT_QFN32_5X5
R377
10K_0402_5%

TL_BKOFF#_R
2

<9> EDP_CPU_HPD
6

1
D
Q2309B G 2 EDP_HPD
DMN66D0LDW-7_SOT363-6 S RT19 @
100K_0402_5%
RTD2132R : SA000069200
1

2
RTD2132N : SA00007A300

B B

+3VS_RT EDP_HPD
Vendor advise reserve it +3VS_RT
1
1

@ QX6B

2
RT16 RT14 1 2 0_0402_5% @
ENBAKL <32>
RT17 100K_0402_5%

G
100K_0402_5% CSDA 1 6 EC_SMB_DA2 EC_SMB_DA2 <12,18,28,29,32>
2

D
2

@ DMN66D0LDW-7_SOT363-6

5
EDP_CPU_AUX# TL_BKOFF#_R RT15 1 2 0_0402_5% TL_BKOFF#
TL_BKOFF# <20>
EDP_CPU_AUX

G
EDP_BIA_PWM CX10 CSCL 4 3 EC_SMB_CK2
EC_SMB_CK2 <12,18,28,29,32>

1
+DVCC33 0.1U_0402_10V7K @

D
+3VS_RT
1

1 2 QX6A
RX33 DMN66D0LDW-7_SOT363-6
5

RT18 @ RX36 @ 100K_0402_5%


100K_0402_5% 100K_0402_5% CSDA 1 8 @
VCC

2
CSCL 2 7 1 1 2
IN1
2

@ EDID_CLK 3 6 4 @ RT21 0_0402_5%


EDID_DATA 4 5 2 OUT 1 2
GND

<32> BKOFF# IN2 @ RT22 0_0402_5%


AUX termination RP56 UX2
2.2K_8P4R_5% MC74VHC1G08DFT2G_SC70-5
3

Pull-Low 100K

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eDP to LVDS converter
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 19 of 42
5 4 3 2 1
5 4 3 2 1

LCD PWR CTRL

+LCDVDD +LCDVDD_CONN
+3VS +3VS_LCDIN
UX1 @
W=60mils
W=60mils
1 @ 2 +3VS_LCDIN 5 VOUT
1 1 2 +LCDVDD_CONN
FBMA-L11-201209-221LMA30T_0805
LVDS Connector
D D
RV299 0_0805_5% VIN LX1 @

0.1U_0402_10V7K
CX11

4.7U_0805_10V4Z
CX8
2 JLVDS
4 GND LVDS_A0- 1
SS 1 1 <19> LVDS_A0- 1
1 1 @
<19> LVDS_A0+ LVDS_A0+ 2 41
DX1 2 G1
3 3 42
CX7 CX9 @ EN 2 1 DISPOFF# LVDS_A1- 4 3 G2 43
2 2 <19> TL_BKOFF# <19> LVDS_A1- 4 G3
4.7U_0805_10V4Z 0.1U_0402_10V7K APL3512ABI-TRG_SOT23-5 <19> LVDS_A1+ LVDS_A1+ 5 44
5 G4

1
2 2 6 45
RB751V-40_SOD323-2 LVDS_A2- 7 6 G5 46
APL3512 PIN 4 tire to VIN 10K_0402_5% <19> LVDS_A2-
8 7 G6
<19> LVDS_A2+ LVDS_A2+
RX9 9 8
SS table <19> LVDS_ACLK- LVDS_ACLK- 10 9

2
LVDS_ACLK+ 11 10
<19> LVDS_ACLK+ 11
2 1 ENVDD_R 12
<19> TL_ENVDD 12
RX7 @ 0_0402_5% Css Tss 13
2 1 14 13
<32> EC_ENVDD 14
RX8 @ 0_0402_5% 0.1uF 100mS 15
WCM-2012HS-900T_4P 16 15
4 3 USB20_CAM_P7_R 17 16
10nF 10mS <12> USB20_P2 4 3 17
CE_EN_R 18
19 18
1nF 1mS 19
W=60mils 1 2 USB20_CAM_N7_R 20
<12> USB20_N2 1 2 20
Open or 1mS DBC_EN_R 21
LX6 22 21
tied to 22
TL_ENVDD 1 2 +LCDVDD_CONN NEMC@ 23
RV300 0_0805_5%
VIN 24 23
1 2 25 24
W=60mils +LCDVDD_CONN 25
1

1@ RX22 0_0402_5%
+3VS
26
CX20 USB20_CAM_P7_R 27 26
3.3K_0402_5% 4.7U_0805_10V4Z 1 2 USB20_CAM_N7_R 28 27
RX6 RX21 0_0402_5% 29 28
+3VS_CAM 29
2 MIC_CLK 30
<23> MIC_CLK
2

31 30
MIC_DATA 32 31
<23> MIC_DATA 32
<32> LCD_TEST LCD_TEST 33
34 33
C LCD backlight PWR CTRL <19> EDID_CLK
<19> EDID_DATA 35
36
34
35 C

CE_EN_R only for reserve. <19> TL_INVT_PWM


DISPOFF# 37
38
36
37

1
QX2 39 38
60mil SI3457CDV-T1-GE3_TSOP6 60mil 60mil RX26
+INV_PWR_SRC
40 39
40
+INV_PWR_SRC_R 1 2 +INV_PWR_SRC +INV_PWR_SRC 100K_0402_5% W=60mils
B+ 6 RV301 0_0805_5% CE_EN 1 @ 2 CE_EN_R STARC_107K40-000001-G2
<32> CE_EN
5 RX18 0_0402_5% CONN@

2
2 DBC_EN 1 @ 2 DBC_EN_R
<32> DBC_EN
4 1 RX19 0_0402_1%
S

1 Short Pad

1
2.2U_0402_25V7K
CX4

100K_0402_5%
RX2
1

CX5 @ @
G

1
0.1U_0603_25V7K RX20 RX23
3

2 0_0402_1% 0_0402_5%
Short Pad

2
2
2 +3VS +LCDVDD
2

PWR_SRC_ON

0.1U_0402_10V7K

0.1U_0402_10V7K

10U_0805_10V6K
1

1 1 1

CX1

CX2

CX3
RX3
100K_0402_5%
2 2 2
2
1

RV31 D
+LCDVDD_CONN 1 2+LCDVDD_CONN_R 2 QX1 Place close to JLVDS
G 2N7002KW_SOT323-3
0_0402_5%
RV32 S
3

<32> EN_INVPWR
1 2
@
0_0402_5%
B B

BOM Structure
TOUCH@
NEMC@
* Touch Screen Panel
+5VS +5VS_TOUCH

1 2 +5VS_TOUCH
Webcam PWR CTRL RX28
TOUCH@
0_0603_5%

Short pad list +3VS 1


CX6
2
0.1U_0402_16V7K
+3VS +3VS_CAM
RX19 RX29
1 @ 2
0_0603_5%
TOUCH@

1 @ 2
RX27 For AUO eTP only JTOUCH
ACES_88460-00601-P01
RX27 0_0603_1% 1
USB20_Hub_N2 2 1
Short Pad +5VS_TOUCH <26> USB20_Hub_N2
3 2
To Hub USB20_Hub_P2
<26> USB20_Hub_P2 3
4
5 4 7
1 2 TOUCH_RST_R 6 5 G1 8
RX24 100K_0402_5% 6 G2
TOUCH@ CONN@

1 2
<32> TOUCH_RST
RX1 0_0402_5% SP010013W00
TOUCH@
A A

OAK 15 only

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS/webcam/touch
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 20 of 42
5 4 3 2 1
5 4 3 2 1

W=40mils
D Place close to JHDMI1 D

+VDISPLAY_VCC

WCM-2012HS-900T_4P
TMDS_TXCN 1 2 TMDS_L_TXCN +5VS
2 1
1 2

10U_0603_6.3V6M
0.1U_0402_16V7K
1 1

CX21
CX12 2 1 0.1U_0402_10V7K TMDS_TXCN R1071 1 2 619_0402_1% FX1
<9> HDMI_CLK-
CX13 2 1 0.1U_0402_10V7K TMDS_TXCP R1072 1 2 619_0402_1% TMDS_TXCP 4 3 TMDS_L_TXCP 1.5A_6V_1206L150PR~D CX22
<9> HDMI_CLK+ 4 3
CX14 2 1 0.1U_0402_10V7K TMDS_TX0N R1073 1 2 619_0402_1% LX2 EMC@ +3VS 2 2
<9> HDMI_TX0-
CX15 2 1 0.1U_0402_10V7K TMDS_TX0P R1074 1 2 619_0402_1%
<9> HDMI_TX0+

HDMI_GND
CX16 2 1 0.1U_0402_10V7K TMDS_TX1N R1075 1 2 619_0402_1%
<9> HDMI_TX1-
CX17 2 1 0.1U_0402_10V7K TMDS_TX1P R1076 1 2 619_0402_1%
<9> HDMI_TX1+

1
CX18 2 1 0.1U_0402_10V7K TMDS_TX2N R1077 1 2 619_0402_1% RX12
<9> HDMI_TX2- WCM-2012HS-900T_4P
CX19 2 1 0.1U_0402_10V7K TMDS_TX2P R1078 1 2 619_0402_1% 10K_0402_5%
<9> HDMI_TX2+
TMDS_TX0N 1 2 TMDS_L_TX0N
1 2

2
JHDMI

3
TMDS_TX0P 4 3 TMDS_L_TX0P HDMI_HPLUG 19
5 G
D
Q14A 4 3 18 HP_DET
+3VS +5V
S DMN66D0LDW-7_SOT363-6 LX3 EMC@ 17
CPU_DPB_CTRLDAT_R 16 DDC/CEC_GND
SDA

4
CPU_DPB_CTRLCLK_R 15

1
@ 14 SCL
+1.8VS R122 13 Reserved
100K_0402_5% TMDS_L_TXCN 12 CEC 20
11 CK- GND 21
1

WCM-2012HS-900T_4P TMDS_L_TXCP 10 CK_shield GND 22


CK+ GND

2
R376 TMDS_TX1N 1 2 TMDS_L_TX1N TMDS_L_TX0N 9 23
1 2 8 D0- GND
10K_0402_5%
TMDS_L_TX0P 7 D0_shield
TMDS_TX1P 4 3 TMDS_L_TX1P TMDS_L_TX1N 6 D0+
4 3 D1-
2

<9> HDMI_HPD#
5
LX4 EMC@ TMDS_L_TX1P 4 D1_shield
C C
D1+
6

TMDS_L_TX2N 3
Q14B
D
G 2 HDMI_HPLUG 2 D2-
DMN66D0LDW-7_SOT363-6 S TMDS_L_TX2P 1 D2_shield
1

D2+
1

R121 LOTES_ABA-HDM-022-K01
100K_0402_5% CONN@

LX5 EMC@
2

TMDS_TX2P 4 3 TMDS_L_TX2P
4 3

TMDS_TX2N 1 2 TMDS_L_TX2N
1 2
WCM-2012HS-900T_4P

TMDS_L_TXCN NEMC@ CX23 1 2 3.3P_0402_50V8C

TMDS_L_TXCP NEMC@ CX24 1 2 3.3P_0402_50V8C

TMDS_L_TX0N NEMC@ CX25 1 2 3.3P_0402_50V8C

TMDS_L_TX0P NEMC@ CX26 1 2 3.3P_0402_50V8C


+1.8VS
RP15
TMDS_L_TX1N NEMC@ CX27 1 2 3.3P_0402_50V8C
HDMI_DDCDATA 5 4 +VDISPLAY_VCC
HDMI_DDCCLK 6 3 TMDS_L_TX1P NEMC@ CX28 1 2 3.3P_0402_50V8C
CPU_DPB_CTRLDAT_R 7 2
B CPU_DPB_CTRLCLK_R 8 1 TMDS_L_TX2N NEMC@ CX29 1 2 3.3P_0402_50V8C B

2.2K_0804_8P4R_5% TMDS_L_TX2P NEMC@ CX30 1 2 3.3P_0402_50V8C

+1.8VS
2
G

3 1 CPU_DPB_CTRLCLK_R
<9> HDMI_DDCCLK
Q57
S

D
2
G

MESS138W-G_SOT323-3

3 1 CPU_DPB_CTRLDAT_R
<9> HDMI_DDCDATA
Q58
S

MESS138W-G_SOT323-3

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 21 of 42
5 4 3 2 1
5 4 3 2 1

JP5 --> Short


W=40mils JP3 --> Open
+3VALW +3VALW_UL2
JP3 @
2 1
W=40mils
2
JP5 JP@
1 2MM
+LAN_IO rising time : >1ms and <100ms
+LAN_IO
2MM +3VALW_UL2 W=40mils 1.5A
UL2
1 1 2
5 VOUT

0.1U_0402_10V7K

0.1U_0402_10V7K
RL28 0_0805_5%

D
JP4, JP6 --> Open VIN
2
X@ 1 1 1@
CX51 D
+3VALW +3VALW_UL3 4 GND CL15 CL19 4.7U_0805_10V4Z
X@ SS
CL39
1 1
@
EN
3 SS table X@ 2 X@ 2 2
Reserve 4.7uF capacitor close UL1 Pin 32 RL19
JP4 @ CL38 X@ 75_0603_5%
2 1 1U_0402_6.3V6K 0.1U_0603_25V7K APL3512ABI-TRG_SOT23-5 MCT0 1 2
2 2 X@ Css Tss
2MM APL3512 PIN 4 tire to VIN
+LAN_IO +LAN_IO_UL3 MCT1 X@ 1 2
0.1uF 100mS
These caps close to Pin 23,32 RL20
10nF 10mS 1
2
JP6 @
1
<32> WOL_EN
WOL_EN 1nF 1mS For 8106E pop the capacitor close pin 23,32 75_0603_5% XEMC@
CL33
10P_1206_2KV8J
2MM 2
Open or 1mS
Hi Active

2
X@
RL27
100K_0402_5%
tied to
VIN
+LAN_VDD Place close to TCT pin
+LAN_IO_UL3 +3VALW_UL3

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K
1
UL3 X@
5
1 1 1 SP050006H00-->SSI Phase
+3VALW OUT IN CL20 CL22 CL26 TL1 X@
2 +LAN_IO
RL40 GND 2 2 2
X@ X@ X@ MDI1- 1 16 MDO1-
1 2 3 4 WOL_EN RL38 10K_0402_5% MDI1+ 2 RD+ RX+ 15 MDO1+
10K_0402_5% OC EN WOL_EN 1 2 3 RD- RX- 14 MCT0
X@ @ 4 CT CT 13
SY6288C20AAC_SOT23-5 5 NC NC 12
These caps close to Pin 8,30 MDI0-
6
7
NC
CT
NC
CT
11
10
MCT1
MDO0-
Cose down solution 11/05 add Reserve 10K pull LAN_IO For 8106E pop capacitor close to pin 8,30 MDI0+ 8 TD+
TD-
TX+
TX-
9 MDO0+

C 2 C
NS681610_16P
CL41
X@ 0.01U_0402_16V7K
1 Change CPN to SP050007J00 only
Need CIS symbol

CL30, CL31 close to UL1 Pin 17, 18


UL1
X@
CL30 1 2 0.1U_0402_10V7K PCIE_PRX_C_DTX_P0 17 1 MDI0+ For GCLK
<10> PCIE_PRX_DTX_P0 HSOP MDIP0
CL31 1 X@ 2 0.1U_0402_10V7K PCIE_PRX_C_DTX_N0 18 4 MDI1+ GCLK@
<10> PCIE_PRX_DTX_N0 HSON MDIP1 2 MDI0- XTLI_L 1 2 XTLI
MDIN0 <31> XTLI_L
5 MDI1- RG11 0_0402_5%
PCIE_PTX_C_DRX_P0 13 MDIN1
<10> PCIE_PTX_C_DRX_P0 HSIP
PCIE_PTX_C_DRX_N0 14
<10> PCIE_PTX_C_DRX_N0 HSIN 8
AVDD10 +LAN_VDD
30
19 AVDD10 32 CL36 X@
<11,28,32> PLT_RST# PERSTB AVDD33 +LAN_IO
23 1 2 XTLI
ISOLATEB 20 DVDD33
ISOLATEB 15 10P_0402_50V8J YL2 X@
REFCLK_P CLK_PCIE_LAN <11>
PCIE_WAKE# 21 16 1 2
<32> PCIE_WAKE# LANWAKEB REFCLK_N CLK_PCIE_LAN# <11> OSC GND
GPO 26 12 3 4
GPO CLKREQB 28 LAN_CLKREQ# <10> OSC GND
XTLO
CKXTAL1 29 XTLI CL37 X@ 25MHZ_10PF_7V25000014
3 CKXTAL2 LAN_CLKREQ# pull high 10K to +1.8VS at SOC 1 2 XTLO
6 NC 27 @ T94 PAD~D
7 NC LED0 25 @ T95 PAD~D 10P_0402_50V8J
+LAN_IO 9 NC LED1
10 NC 31 RL31 2 1 2.49K_0402_1%
11 NC RSET X@
W=20mils
B B
22 NC 33 +LAN_VDD
1 @ 2 PCIE_WAKE# 24 NC GND
RL34 10K_0402_5% NC
RTL8106E-CG_QFN32_4X4
1 2

0.1U_0402_10V7K

1U_0402_6.3V6K
@ GPO X@
RL36 10K_0402_5% 1 1
JLAN
CL34 CL35
X@ X@ 8
2 2 PR4-
7
PR4+
MDO1- 6
+3VS PR2-
5
PR3-
1

4
RL33 PR3+
X@ 1K_0402_5% MDO1+ 3
PR2+
MDO0- 2
2

PR1-
ISOLATEB MDO0+ 1
PR1+
9
SHLD1
2

10
RL35 SHLD2
X@ 15K_0402_5%
SANTA_130456-311
CONN@
1

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 Deciphered Date 2015/03/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN RTL8106E
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 22 of 42
5 4 3 2 1
5 4 3 2 1

Reserve for HDA issue


+A_VCC

+3VS +1.5VS +CODEC_AVDD2


3234@ 2
+3VALW
1
RA10 0_0402_5% RA8 1 2 0_0402_5%
Line1-VREFO-L
Line1-VREFO-R
JACK_PLUG Delay circutis
1
@ 2 +3VS +3VS
+RTCVCC CA71, CA51 place close to Pin 26

1
RA12 0_0402_5% RA9 1 @ 2 0_0402_5%
RA165 RA166
4.7K_0402_5% 4.7K_0402_5%

1
+5V_PVDD +5V_PVDD +5VA JACK_SENSE#
RA1
JHP@ JHP@
RA2

2
+5V_PVDD +5VS
100K_0402_5% 100K_0402_5%

4.7U_0603_6.3V6K
CA55

4.7U_0603_6.3V6K
CA53

4.7U_0603_6.3V6K
CA71
CA53, CA55 change Value 1 1 1
1 1 1 LINE1-L CA67 1 2 1 2 Line-IN-L
from 10U_0603_6.3V6M~D to

2
0.1U_0402_16V7K
CA56

0.1U_0402_16V7K
CA54

0.1U_0402_16V7K
CA51
D 2 @ 1 4.7U_0603_6.3V6K RA80 1K_0402_1% D

3
4.7U_0603_6.3V6K RV54 0_0603_1% LINE1-R CA68 1 2 1 2 Line-IN-R JHP@
2 2 2 +5VA +5VS 4.7U_0603_6.3V6K RA82 1K_0402_1% 5
D
QA5A
2 2 2 Short Pad G

JHP@ S DMN66D0LDW-7_SOT363-6
QA5B

4
2 @ 1 DMN66D0LDW-7_SOT363-6 D
RV59 0_0603_1% JACK_PLUG# 1 2 2 G
+3VS
UA1
Short Pad JHP@
RA3
S

PCB trace width of SLEEVE &

1
10K_0402_5% 1
CA57,CA58 close 1 1 1
0.1U_0402_16V7K
CA58

4.7U_0603_6.3V6K
CA57

12 CA65 1 2 RA79 1 2
26 PCBEEP 0.1U_0402_16V7K 1K_0402_1%
PC_BEEP
RING2 are required at least 40
to UA1 pin1 AVDD1 JHP@ JHP@
2 2 +3VS
41
46 PVDD1 MONO-OUT
16
CA69 1
@
2 100P_0402_50V8J
mil and its length should be CA1
10U_0603_6.3V6M 2
CA2
2 10U_0603_6.3V6M
1 1 PVDD2
CA59
4.7U_0603_6.3V6K
CA60
0.1U_0402_16V7K 1 LINE2-L(PORT-E-L)
24
23
as short as possible.
36 DVDD LINE2-R(PORT-E-R) RA81 2 1 10K_0402_5%
2 2 CPVDD 22 LINE1-L
9 LINE1-L(PORT-C-L) 21 LINE1-R
Digital power for HDA link +CODEC_AVDD2 1 40 DVDD-IO LINE1-R(PORT-C-R)
CA61 AVDD2
(Bay Trail M -- Pin9 -->1.5VS) 4.7U_0603_6.3V6K 20 +A_VCC_R +A_VCC_R
3234@
1 2
MIC1-R(PORT-B-R) +A_VCC
19 MIC1-L 1 2 RA28 0_0402_5%
RA130 1 2 22_0402_5% 2 8 MIC1-L(PORT-B-L) CA74 10U_0603_6.3V6M
<10> HDA_SDIN0 SDATA-IN
5 18 MIC_IN
<10>
<10>
HDA_SDOUT_AUDIO
HDA_BITCLK_AUDIO
6 SDATA-OUT MIC2-R(PORT-F-R) 17 RING2 RA155 Reserve for ESD Request @
10 BCLK MIC2-L(PORT-F-L) 1
<10> HDA_SYNC_AUDIO
11 SYNC 3234@ 2 +3VS JACK_PLUG# RA4 1 2 0_0402_5% JACK_SENSE#
<10> HDA_RST_AUDIO# RESETB 3234@ RA155 100K_0402_5%
1 2

CA23 1 2 2.2U_0603_6.3V6K 28 SENSE B


14
13
RA34
RA51 1
200K_0402_1%
2 39.2K_0402_1%
Reserve for cancel Delay circutis
100K is used to speed up the discharge VREF SENSE A
JACK_SENSE#
RA153 1 2 20K_0402_1% 15 3223@
for LDO1. It could solve the pop sound 3223@
JDREF
during system boot up and reboot. 37 45 INT-SPK-R+ RA51, RA33 place close to UA1
CA24 1 2 1U_0402_6.3V6K 35 CBP SPK-OUT-R+ 44 INT-SPK-R-
RA154 place close to Pin 26 CA25 1 2 1U_0402_6.3V6K 34 CBN SPK-OUT-R- 43 INT-SPK-L-
CPVEE SPK-OUT-L- 42 INT-SPK-L+ Change to 0 ohm from short pad
Line1-VREFO-L 31 SPK-OUT-L+
C C
Line1-VREFO-R 30 MIC1-VREFO-L
+MIC2-VREFO 29 MIC1-VREFO-R 33 HPOUT-R RA29 1 2 0_0603_5%
+MIC2-VREFO MIC2-VREFO HPOUT-R(PORT-I-R)
1 2 32 HPOUT-L
RA154 Reserve for ESD Request RA154 100K_0402_5% HPOUT-L(PORT-I-L) RA30 1 2 0_0603_5%
CA62 1 2 10U_0603_6.3V6M 27
NEMC@ CA63 1 2 10U_0603_6.3V6M 39 LDO1-CAP 48 RA31 1 2 0_0603_5%
R2355 CA64 1 2 10U_0603_6.3V6M 7 LDO2-CAP SPDIF-OUT/GPIO2
0_0402_5% LDO3-CAP 2 RA32 1 2 0_0603_5%
GPIO0/DMIC-DATA MIC_DATA <20>
HDA_BITCLK_AUDIO 1 2 4 3 MIC_CLK_C
25 DVSS GPIO1/DMIC-CLK
38 AVSS1 47 EC_MUTE#
1 AVSS2 PDB EC_MUTE# <32>
NEMC@
CA21 49
22P_0402_50V8J Thermal PAD GNDA GND
2

ALC3223-CG_MQFN48_6X6~D
Place on the moat between GND & GNDA.
+MIC2-VREFO

LA1 EMC@
MIC_CLK_C 1 2 MIC_CLK DA8
MIC_CLK <20>
BLM15BB221SN1D_2P 2 1 MIC_IN 2
RA53 2.2K_0402_5% EC Beep <32> BEEP#
+RTCVCC 1 PC_BEEP
SM01000BV00 1
NEMC@ 2 1 RING2
CA22 RA1109 2.2K_0402_5% 3
need CIS symbol MCU Beep <12> SOC_SPKR

1
3223@ 22P_0402_50V8J
1

MIC_IN 2 BAT54C-7-F_SOT23-3 @
RA5 RA19
470K_0402_5% 10K_0402_5%

2
2

3223@ 3223@
PC Beep
3

B D B
QA6B 5 G
QA6A
3223@ DMN66D0LDW-7_SOT363-6 S DMN66D0LDW-7_SOT363-6
6

Close to UA1
4

D
HDA_RST_AUDIO# 1 2 2 G

RA6 10K_0402_5% S
Pin11,13,14,16
1

EC_MUTE# 1 2
RA7 10K_0402_5% close to Codec JSPK
@ INT-SPK-R- EMC@ LA3 1 2 0_0603_5% SPK_R1-_CONN 1
INT-SPK-R+ EMC@ LA4 1 2 0_0603_5% SPK_R2+_CONN 2 1
INT-SPK-L- EMC@ LA5 1 2 0_0603_5% SPK_L1-_CONN 3 2 5
INT-SPK-L+ EMC@ LA6 1 2 0_0603_5% SPK_L2+_CONN 4 3 GND 6
4 GND
E&T_3703-Q04N-11R
Trace width for SPK-L+/SPK-L-/SPK-R+/SPK-R- CONN@

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K
1 1 1 1
Speaker 4 ohm : 40mil

CA29

EMC@ CA30

EMC@ CA31

EMC@ CA32
Speaker 8 ohm : 20mil 2 2 2 2

EMC@
RA57, RA58 Reserve for ESD Request iPhone type Combo Jack
EMC@ JHP CONN@
MIC_IN LA7 2 1 NBQ100505T-800Y-N_2P 40mil MIC_IN_R MIC_IN_R 3
EMC@
RING2 LA10 2 1 NBQ100505T-800Y-N_2P 40mil RING2_R RING2_R 6
EMC@
HPOUT-L 1 2 Line-IN-L LA8 2 1 NBQ100505T-800Y-N_2P AUD_HP_OUT_L_CN AUD_HP_OUT_L_CN 1
RA55 8.2_0402_1% EMC@
HPOUT-R 1 2 Line-IN-R LA9 2 1 NBQ100505T-800Y-N_2P AUD_HP_OUT_R_CN AUD_HP_OUT_R_CN 2
RA56 8.2_0402_1% JACK_PLUG# 4
1

@ @
RA84 RA83 5
10K_0402_5% 10K_0402_5%

A SINGA_2SJ-E960-001F A
2

2
AZ5125-02S.R7G_SOT23-3
DA10
ESD@

AZ5125-02S.R7G_SOT23-3
DA12
ESD@

1 1 1 1
DC230007Y00
100P_0402_50V8J
CA39 @

100P_0402_50V8J
CA33 @

100P_0402_50V8J
CA38 EMC@

100P_0402_50V8J
CA40 EMC@

DC021103300 (OLD)
2 2 2 2
1

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Audio Codec ALC3223
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 23 of 42
5 4 3 2 1
5 4 3 2 1

D D

SD_CD# MS_INS#

1 1
CR9 ESD@ CR10 ESD@

22P_0402_50V8J 22P_0402_50V8J
+3VS +VCC_3IN1 2 2

Trace width:40mil For EMI request. Place close to UR1

5
UR1

3V3_IN

CARD_3V3
RR1 2 1 6.19K_0402_1% RREF 1 22 MS_BS
EMC@ RREF SP14 21 SD_D2
LR2 SP13 20 MS_D1_SD_D3
<26> USB20_Hub_P4
USB20_Hub_P4 4
4 3
3 USB20_CR_P3_R USB20_CR_N3_R 2
DM
SP12
SP11
19 close to chip side
USB20_CR_P3_R 3 18 SD_CMD
DP SP10 16 MS_D0
<26> USB20_Hub_N4
USB20_Hub_N4 1
1 2
2 USB20_CR_N3_R SP9
SP8
15 MS_D2_SD_CLK_R 1 EMC@
RR2
2
22_0402_5%
MS_D2_SD_CLK 拉MS_D2_SD_CLK到Conn pin 14 SD_CLK
WCM-2012HS-900T_4P
RTS5179-GR_QFN24 再打Via拉到pin 10 MS_D2
2014310 Change USB20_Hub_P4/N4 trace & off-page back 14
7 SP7 13 SD_CD#
23 XD_CD# SP6 12 MS_D3
17 XD_D7 SP5 11 SD_D0
GPIO0 SP4 10

Thermal pad
SD_D1
6 SP3 9 MS_INS#
C V18 24 SDREG
V18
SP2
SP1
8 MS_CLK_SD_WP_R 1 EMC@
RR3
2
22_0402_5%
MS_CLK_SD_WP 拉MS_CLK_SD_WP到Conn pin 5 MS_CLK C

再打Via拉到pin 22 SD_W

CR5

CR6
1 1
2 2
RTS5170-GR_QFN24_4X4 EMC@ EMC@

25
1U_0402_6.3V6K
CR3

1U_0402_6.3V6K
CR4

5P_0402_50V8C

5P_0402_50V8C
2 2
1 1

+3VS

1 1
CR1 CR2
+VCC_3IN1
0.1U_0402_10V7K 4.7U_0603_6.3V6K
2 2

+VCC_3IN1
JREAD
SD_D2 1
2 SD-DAT2
MS_D1_SD_D3 3 MS-VSS1
4 SD-CD/DAT3 MMC-RSV
MS_CLK_SD_WP 5 MS-VCC
SD_CMD 6 MS-SCLK
1 1 SD-CMD MMC-CMD
CR8 CR7 MS_D3 7
MS_INS# 8 MS-DATA3
4.7U_0603_6.3V6K 0.1U_0402_10V7K 9 MS-INS
2 2 MS_D2_SD_CLK 10 SD-VSS MMC-VSS1
11 MS-DATA2
B B
MS_D0 12 SD-VDD MMC-VDD
MS_D1_SD_D3 13 MS-DATA0
MS_D2_SD_CLK 14 MS-DATA1
MS_BS 15 SD-CLK MMC-CLK
16 MS-BS
17 MS-VSS2
Close to JREAD SD_D0
SD_D1
18
19
SD-VSS MMC-VSS2
SD-DAT0 MMC-DAT
SD_CD# 20 SD-DAT1
21 SD-CD 23
MS_CLK_SD_WP 22 SD-GND GND1 24
SD-WP(SW) GND2
T-SOL_143-2300302602_RV
SD_CMD CONN@

1
CR11 ESD@

22P_0402_50V8J
2

For EMI request.


Place close to JREAD

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Card Reader RTS5179
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 24 of 42
5 4 3 2 1
5 4 3 2 1

LI1 NEMC@
PCH_USB3_RX0_N 1 2 USB3RN2_JUSB1_R
<12> PCH_USB3_RX0_N
+5VALW
3.0A +5V_USB_PWR1_R2 +5V_USB_PWR1 +5V_USB_PWR1_R1

PCH_USB3_RX0_P 4 3 USB3RP2_JUSB1_R UI1


<12> PCH_USB3_RX0_P
DLW21SN670HQ2L_4P 5 OUT
1
RI1
1 @ 2
0_0805_5%
USB connector1
IN
+5VALW USB_EN# 4
EN
GND
2
+5V_USB_PWR1_R2 USB20 port0
3 USB_OC0#

@ LI3 NEMC@
OCB
SY6288D20AAC_SOT23-5 1 2
USB30 port1
PCH_USB3_TX0_N 2 1 PCH_USB3_TX0_N_C 1 2 USB3TN2_JUSB1_R 1 1 1 @ RI4 @ 0_0805_5%
<12> PCH_USB3_TX0_N
CI3 0.1U_0402_10V7K CI18 CI12 CI14
@
<12> PCH_USB3_TX0_P PCH_USB3_TX0_P 2 1 PCH_USB3_TX0_P_C 4 3 USB3TP2_JUSB1_R 47U_0805_6.3V4Z
2
4.7U_0805_10V4Z 0.1U_0402_16V7K 2.0A
CI4 0.1U_0402_10V7K @ @ 2 @ 2 +5V_USB_PWR1_R1 +5V_USB_PWR1
D DLW21SN670HQ2L_4P D
UI3
1 8 +5V_USB_PWR1
GND VOUT 80mil

10U_0603_6.3V6M

0.1U_0402_16V7K
2 7
3 VIN VOUT 6 JUSB1
VIN VOUT 1

EPAD
EMC@ USB_EN# 4 5 USB_OC0# 1
<32> USB_EN# EN FLG USB_OC0# <12> 1 1 VBUS
LI2 CI1 + USB20_JUSB1_N0_R 2
D-

CI40

CI2
USB20_N0 1 2 USB20_JUSB1_N0_R 1 1 USB20_JUSB1_P0_R 3
<12> USB20_N0 1 2 D+
CI13 CI15 220U_6.3V_M 4

9
@ @ AP2301MPG-13_MSOP8 2 2 2 5 GND
GND

0.1U_0402_16V7K
USB20_P0 4 3 USB20_JUSB1_P0_R @ 0.1U_0402_16V7K 6
<12> USB20_P0 4 3 2 2 GND
7
WCM-2012HS-900T_4P 8 GND
GND
ACON_UARBG-4K1926

3
CONN@

DI2
L30ESDL5V0C3-2_SOT23-3
NESD@ ESD@
DI1
USB3RN2_JUSB1_R 1 10 USB3RN2_JUSB1_R
T113
USB3RP2_JUSB1_R 2 9 USB3RP2_JUSB1_R
T114

1
USB3TN2_JUSB1_R 4 7 USB3TN2_JUSB1_R
T115
USB3TP2_JUSB1_R 5 6 USB3TP2_JUSB1_R
T116 +5V_USB_PWR1 +5V_USB_PWR2
3

8 JP8 JP@
2 1
IP4292CZ10-TBR_XSON10_2.5X1~D
80mil 2MM 80mil

C C

+5V_USB_PWR2 +5V_USB_PWR2_R1

3.0A +5V_USB_PWR2_R2 1 2
+5VALW
UI4
RI2 0_0805_5% USB connector2
+5V_USB_PWR2_R2

+5VALW
5
IN
OUT
1
USB20 port1(Debug Port)
2
USB_EN# 4 GND 1 2
EN 3 USB_OC0# RI5 @ 0_0805_5%
EMC@ OCB
LI5 SY6288D20AAC_SOT23-5 +5V_USB_PWR2
1 1
USB20_N1 1 2 USB20_JUSB2_N1_R CI6 CI7 @
<12> USB20_N1 1 2 JUSB8
4.7U_0805_10V4Z
2 2
0.1U_0402_16V7K 2.0A +5V_USB_PWR2_R1
+5V_USB_PWR2 1
VBUS
USB20_P1 4 3 USB20_JUSB2_P1_R USB20_JUSB2_N1_R 2
<12> USB20_P1 4 3 D-
USB20_JUSB2_P1_R 3
WCM-2012HS-900T_4P UI2 4 D+
GND

10U_0603_6.3V6M

0.1U_0402_16V7K
1 8 5
80mil

3
2 GND VOUT 7 6 GND
VIN VOUT 1 GND
3 6 1 1 7
VIN VOUT GND

EPAD
USB_EN# 4 5 USB_OC0# CI8 + DI9 8
EN FLG GND

CI43

CI9
1 1 220U_6.3V_M L30ESDL5V0C3-2_SOT23-3 ACON_UARBG-4K1926
CI26 CI17 2 2 2 CONN@

9
AP2301MPG-13_MSOP8 ESD@
0.1U_0402_16V7K 0.1U_0402_16V7K
2 2

1
B B

+5V_USB_PWR3 +5V_USB_PWR3_R1

+5VALW
3.0A +5V_USB_PWR3_R2

+5VALW
UI5
1 RI3
1
X@
2
0_0805_5%
USB connector3
OUT
XEMC@
5
IN 2 +5V_USB_PWR3_R2 USB20 Hub port3
LI6 X@ X@ USB_EN# 4 GND
1 1 EN
USB20_Hub_N3 1 2 USB20_JUSB3_N3_R CI11 CI10 3 USB_OC1#
<26> USB20_Hub_N3 1 2 OCB +5V_USB_PWR3
1 2
4.7U_0805_10V4Z
2 2
0.1U_0402_16V7K 2.0A +5V_USB_PWR3_R1
SY6288D20AAC_SOT23-5
+5V_USB_PWR3
RI6 @ 0_0805_5%
USB20_Hub_P3 4 3 USB20_JUSB3_P3_R X@ JUSB7
<26> USB20_Hub_P3 4 3 1
WCM-2012HS-900T_4P UI6 USB20_JUSB3_N3_R 2 VBUS
1 8 USB20_JUSB3_P3_R 3 D-
GND VOUT 80mil D+

10U_0603_6.3V6M

0.1U_0402_16V7K
2 7 4
3 VIN VOUT 6 X@ X@ X@ 5 GND
1

3
VIN VOUT GND
EPAD

USB_EN# 4 5 USB_OC1# 1 1 6
EN FLG USB_OC1# <12> GND
CI33 + 7
GND

CI45

CI34
1 1 DI8 8
X@ CI29 X@ CI28 220U_6.3V_M GND
9

X@ AP2301MPG-13_MSOP8 2 2 2 L30ESDL5V0C3-2_SOT23-3 ACON_UARBG-4K1926


0.1U_0402_16V7K

0.1U_0402_16V7K CONN@
2 2 XESD@

A A

1
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB3.0
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 25 of 42
5 4 3 2 1
5 4 3 2 1

+5VALW +5V_HUB +3V_HUB


HUB@
1 2 +5V_HUB C1119
D R1045 D
1 1 1 Vonder suggest Voltage up 10V
1 0_0603_5% HUB@ HUB@
HUB@ C1117 C1118 C1119
C1120 .1U_0402_16V7K .1U_0402_16V7K 10U_0603_10V6M +5V_HUB +3V_HUB
2 2 2 HUB@
10U_0603_6.3V6M
2

1
HUB@ @HUB@ HUB@

19
20
25
U58 R1046 R1051
10K_0402_5% 10K_0402_5%

VD33F
VDD5

VSS
USB20_Hub_P1 12
<28> USB20_Hub_P1

2
USB20_Hub_N1 11 DP1 1 HUB_OVCJ
To BT <28> USB20_Hub_N1 DM1 OVCJ
USB20_Hub_P2 10 2 1
<20> USB20_Hub_P2 USB20_Hub_N2 9 DP2 TESTJ 3 HUB_XOUT
To Touch HUB@
<20> USB20_Hub_N2 DM2 XOUT
USB20_Hub_P3 8 4 HUB_XIN C1121
<25> USB20_Hub_P3 7 DP3 XIN 5
To USB Conn USB20_Hub_N3 USB20_Hub_N4 0.01U_0402_16V7K
<25> USB20_Hub_N3 18 DM3 DM4 6 2
HUB_BUSJ USB20_Hub_P4
HUB_VBUSM 17 BUSJ DP4 21
HUB_XRSTJ 16 VBUSM DRV 22
XRSTJ LED1
2014310 Add back USB20_Hub_P4/N4 trace
USB20_CPU_P3 15 23
<12> USB20_CPU_P3 14 DPU LED2 24
USB20_CPU_N3
<12> USB20_CPU_N3 13 DMU PWRJ
REXT
2014310 Add back USB20_CPU_P3/N3 trace & off-page

1
C
+3V_HUB FE1.1S-BQFN24B_WQFN24_4X4 C

R1047 1 HUB@ 2 100K_0402_5% HUB_XRSTJ 2.7K_0402_1% HUB@ USB20_Hub_N4


R1048 USB20_Hub_P4 USB20_Hub_N4 <24>
USB20_Hub_P4 <24>
To CardReader
R1049 1 HUB@ 2 100K_0402_5% HUB_BUSJ

2
R1050 1 HUB@ 2 10K_0402_5% HUB_VBUSM
2014310 Add back USB20_Hub_P4/N4 trace & off-page
C1122 1 2 0.01U_0402_16V7K

HUB@ HUB@
Y9
4 3 HUB_XIN
HUB_XOUT 1 2
+5VALW
12MHZ_12PF_5YEA12000122IFA2Q3
R1053 1 2 10K_0402_5% HUB_VBUSM
@HUB@
R1054 1 2 100K_0402_5%
@HUB@

2014310 Reserve RES


B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 Deciphered Date 2015/03/31 Title
USB Conn & Hub FE1.1S
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 26 of 42
5 4 3 2 1
A B C D E F G H

SATA HDD Connector


JHDD
1 23
CS105 2 1 0.01U_0402_16V7K SATA_PTX_DRX_P0 2 GND GND 24
<10> SATA_PTX_DRX_P0_C A+ GND
<10> SATA_PTX_DRX_N0_C
CS106 2 1 0.01U_0402_16V7K SATA_PTX_DRX_N0 3
4 A-
CS109 2 1 0.01U_0402_16V7K SATA_PRX_DTX_N0 5 GND
<10> SATA_PRX_DTX_N0_C B-
CS108 2 1 0.01U_0402_16V7K SATA_PRX_DTX_P0 6
<10> SATA_PRX_DTX_P0_C B+
7
GND
+3VS
1 1
RS7 1 2 0_0402_5% 8
9 VCC3.3
RS8 1 @ 2 0_0402_5% JHDD_P10 10 VCC3.3
<10> DEVSLP0 VCC3.3
11
12 GND

+5V_HDD Source 13
14
15
GND
GND
VCC5
+5V_HDD VCC5
16
17 VCC5
+5V_HDD JP@ +5VS 18 GND
JP13 19 RESERVED
1 2 20 GND
1 2 21 VCC12
JUMP_43X79 22 VCC12
VCC12
SANTA_193202-1
CONN@
SHORT DEFAULT

+5V_HDD

1000P_0402_50V7K

0.1U_0402_25V6K

10U_0805_10V6K
1 1 1
CS5 CS6 CS7

2 2 2

2 2

ODD Power Control SATA ODD Connector


@ JP7
1 2 +5VS_ODD
1 2 Pleace near ODD Connector
JUMP_43X79

1000P_0402_50V7K

0.1U_0402_25V6K

10U_0805_10V6K
+5VS
+5VS_ODD_R2 QS2 +5VS_ODD_R1
+5VS 1 1 1
D

CS11
CS10

CS12
UI7 6 S
1 5 4 X@ X@ X@
1U_0402_6.3V6K

5 OUT X@ 2 2 2 2
3
IN 1 3
2 1
ODD_EN# 4 GND CS13 SI3456BDV-T1-E3 1N TSOP6
G

EN 3 1 2
OCB
3

RS9 X@ 100K_0402_5% B+ 2 X@ JODD


SY6288D20AAC_SOT23-5
X@ 1
2

CS8 X@ 2 1 0.01U_0402_16V7K SATA_PTX_DRX_P1 2 GND


<10> SATA_PTX_DRX_P1_C A+
RS6 <10> SATA_PTX_DRX_N1_C CS9 X@ 2 1 0.01U_0402_16V7K SATA_PTX_DRX_N1 3
X@ 4 A-
+5VS_ODD +5VS_ODD_R2 470K_0402_5%
CS14 X@ 2 1 0.01U_0402_16V7K SATA_PRX_DTX_N1 5 GND
<10> SATA_PRX_DTX_N1_C B-
CS15 X@ 2 1 0.01U_0402_16V7K SATA_PRX_DTX_P1 6
<10> SATA_PRX_DTX_P1_C B+
1

ODD_EN 7
1 2 GND
RS11 @ 0_0805_5% X@
ODD_DETECT# 1 2 8
+5VS_ODD_R1 <10> ODD_DETECT# DP
1

D 1 RS09 0_0402_5% 9
ODD_EN# 2 QS3 CS16 10 +5V 14
<10> ODD_EN# +5V GND
G 2N7002KW_SOT323-3 0.1U_0603_25V7K ODD_DA# 1 2 11 15
<10> ODD_DA# MD GND
1 2 X@ RS10 0_0402_5% 12 16
RS12 0_0805_5% S 2 13 GND NPTH1 17
Low Active X@
3

X@ X@ GND NPTH2
1
CS17 SANTA_202801-1
0.1U_0402_25V6K CONN@
XESD@
2

Place CS17 close to JODD

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/ODD
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 27 of 42
A B C D E F G H
5 4 3 2 1

+3V_WLAN CC47靠近wlan connector

0.047U_0402_16V4Z

0.1U_0402_10V7K

0.1U_0402_10V7K

4.7U_0603_6.3V6K
0.1U_0402_10V7K
@ CM47
1 1 2 2 1

CM40

CM46

CM48

CM43
2 2 1 1 2

D
Mini WLAN/WIMAX H=6.7 D

+3V_WLAN +3V_WLAN

JMINI +1.5VS
1 2 +3VS
3 1 2 4
5 3 4 6 +3VS
5 6

1
WLAN_CLKREQ# 7 8
<10> WLAN_CLKREQ# 7 8
9 10 RM110
CLK_PCIE_WLAN# 11 9 10 12 QM30
<11> CLK_PCIE_WLAN# 10K_0402_5%

2
CLK_PCIE_WLAN 13 11 12 14 2N7002K_SOT23-3
<11> CLK_PCIE_WLAN 13 14
15 16

G
2
17 15 16 18
19 17 18 20 WLAN_RADIO_DIS#_R 1 3 WL_OFF#
19 20 WL_OFF# <10,32>
21 22 PLT_RST#

S
21 22 PLT_RST# <11,22,32>
PCIE_PRX_DTX_N1 23 24
<10> PCIE_PRX_DTX_N1 23 24
PCIE_PRX_DTX_P1 25 26
<10> PCIE_PRX_DTX_P1 25 26
27 28
29 27 28 30 EC_SMB_CK2_R R432 1 2 0_0402_5% EC_SMB_CK2
29 30 EC_SMB_CK2 <12,18,19,29,32>
<10> PCIE_PTX_C_DRX_N1 PCIE_PTX_C_DRX_N1 31 32 EC_SMB_DA2_R R434 1 2 0_0402_5% EC_SMB_DA2
31 32 EC_SMB_DA2 <12,18,19,29,32>
<10> PCIE_PTX_C_DRX_P1 PCIE_PTX_C_DRX_P1 33 34
35 33 34 36 USB20_Hub_N1
35 36 USB20_Hub_N1 <26>
37 38 USB20_Hub_P1
37 38 USB20_Hub_P1 <26>
39 40
41 39 40 42
43 41 42 44 WL_LED#
45 43 44 46 BT_LED#
47 45 46 48
EC_TX 49 47 48 50
<32> EC_TX 49 50
EC_RX 51 52 Short Pad
<32> EC_RX 51 52
+3VS
1 2 +3V_WLAN
BT_ON# RM13 2 1 1K_0402_1% 53 54 RM25 @ 0_0805_1%
<10> BT_ON#

2
GND1 GND2
C C
RM11
CONCR_525B01BE17A
100K_0402_5% CONN@ Short Pad
1 2
1

RM26 @ 0_0805_1%

10mils, All pins

+3VS +5VALW

RD45, RD47 close to JMINI Conn


HDD LED

1
@ @ WL_BT_LED#_EC 1 @ 2 WL_BT_LED#
RD47 RD45 @ RD46 RD51 0_0402_5%

2
100K_0402_5% 100K_0402_5% 100K_0402_5%

G
2

2
Reserve for WLAN module modified
<10> SOC_SATALED# SOC_SATALED# 1 @ 2 1 2 +5VS WL_LED# 3 1 WL_BT_LED#_EC
WL_BT_LED#_EC <32>
RD15 390_0402_5%

D
3

QD18 @

2
@ LED2 2N7002K_SOT23-3

G
WHITE

BT_LED# 3 1
Wireless LED
12-21C-T3D-CM2P1B18X-2C_WHITE

D
B @ LED4 B
QD19 @ WHITE
2N7002K_SOT23-3
WL_BT_LED# 1 @ 2 1 2 +5VALW
RD18

3
WL_LED# 1 @ 2 WL_BT_LED#_EC2 680_0402_1%
WL_BT_LED#_EC2 <32>

1
RD48 0_0402_5%
D QD20
WL_BT_LED 2 2N7002K_SOT23-3
<32> WL_BT_LED
BT_LED# 1 @ 2 WL_BT_LED#_EC G
RD49 0_0402_5% S @

3
@
RD50
100K_0402_5%

2
+3VS
CD63 @
0.1U_0402_10V7K
1 2

UD1 @
MC74VHC1G08DFT2G_SC70-5 WL_BT_LED 1 @ 2 WL_BT_LED#
5

RD53 0_0402_5%
VCC

WL_LED# 1
IN1 4 WL_BT_LED#_EC
OUT Reserve for WLAN module modified
BT_LED# 2
Power / Battery LED
GND

IN2
1

RD52 @
3

100K_0402_5%
White
2

A <32> PWR_PWM_LED# PWR_PWM_LED# 1 2 2 A


RD14 680_0402_1%
1 +5VALW Reserve for WLAN module LED control
<32> BATT_LOW_LED# BATT_LOW_LED# 1 2 3
RD17 390_0402_5%

Amber

LED1
HT-210UD5-BP5_AMBER-WHITE
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Mini Card/LED
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 28 of 42
5 4 3 2 1
5 4 3 2 1

+FAN_POWER
D D
40mil
FAN Control circuit
POWER/B

2.2U_0603_6.3V6K

1000P_0402_50V7K
1 1
CE22 CE23
+5VS
+3VALW 2 2 CE25
2.2U_0603_6.3V6K
JPWR 1 2
1
LID_SW# 2 1
<32> LID_SW# 2
ON/OFFBTN# 3 UE3
4 3 1 8
4 2 VEN GND 7
5 3 VIN GND 6
GND 6 EN_DFAN1 4 VO GND 5
GND <32> EN_DFAN1 VSET GND
HB_A090420-SAHR21 APE8873M SOP 8P
CONN@

+3VS

1
+FAN_POWER

Power ON Circuit RE50


10K_0402_5%

40mil JFAN

2
+3VLP 1
2 1
ON/OFF switch <32> FAN_SPEED1
3 2
3

2
1 4
RE49 5 GND
C TOP Side 100K_0402_5% CE24 GND C

0.01U_0402_16V7K ACES_85204-0300N
SW1 2 CONN@

1
SMT1-05-A_4P
1 3
ON/OFFBTN# <32>
2 4 1
CE20
6
5

0.1U_0402_16V7K
2
@

Bottom Side

SW2
SMT1-05-A_4P
1 3

2 4
INT_KBD Connector
6
5

@
JKB CONN@
HB_A823020-SBHR21

Pop only before MP 30 32


KSI7 29 30 GND 31
KSI6 28 29 GND
KSI4 27 28
KSI2 26 27
B B
KSI5 25 26
KSI1 24 25
KSI3 23 24
KSI[0..7] KSI0 22 23
<32> KSI[0..7] 22
KSO5 21
KSO[0..16] KSO4 20 21
<32> KSO[0..16] 20
KSO7 19
KSO6 18 19
KSO8 17 18
KSO3 16 17

Touch pad KSO1


KSO2
15
14
13
16
15
14
KSO0
KSO12 12 13
KSO16 11 12
+3VS KSO15 10 11
KSO13 9 10
JTP KSO14 8 9
1 KSO9 7 8
TP_CLK 2 1 +5VS KSO11 6 7
<32> TP_CLK 2 6
TP_DATA 3 RE60 KSO10 5
<32> TP_DATA 3 5
4 1 2 KB_CAPS_PWR 4
TL_SMB_CK 5 4 7 3 4
<12,18,19,28,32> EC_SMB_CK2 5 G1 3
TL_SMB_DA 6 8 240_0402_1% 2
<12,18,19,28,32> EC_SMB_DA2 6 G2 2
1
<32> CAPS_LED 1
3

2
PESD5V0U2BT_SOT23-3~D
DE3

PS_HPF10052-06M000R
CONN@
NEMC@

2nd: SP01001BG00
Main: SP01000R910
1

Change CONN symbol for DFB


A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FAN/TP/PWR SW
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 29 of 42
5 4 3 2 1
A B C D E

+5VS and +3VS Switch


+3VALW
VIH=1.2~5.5V Rise Time:
1 2 +3VALW +5VALW +5VS +3VS
3.3V@100k/0.1uF=3.538ms C1143 @ U11 JP36 JP@
3.3V@330pF = 889.68us
3.3V@120k/0.1uF=4.272ms 1U_0402_6.3V6K 1 14 +3VS_OUT 5.0V@330pF = 1348us
VIN1 VOUT1 +3VS
R927 2 13
100K_0402_5% VIN1 VOUT1 C976 JUMP_43X118
1 1
SUSP# 2 1 3VS_ON 3 12 2 1 330P_0402_50V7K
<32,36,37,38> SUSP# ON1 CT1

C2316

10U_0603_6.3V6M

C2318

10U_0603_6.3V6M

C2306

10U_0603_6.3V6M

C2305

10U_0603_6.3V6M

C2307

10U_0805_10V4Z

C2308

10U_0603_6.3V6M

C2324

10U_0603_6.3V6M

C2323

10U_0603_6.3V6M
C1138 2 1@ .1U_0402_16V7K
C980 2 1 +5VALW
4 11 1 1 1 1 1 1 1 1
.1U_0402_16V7K VBIAS GND C1139 2 1@ .1U_0402_16V7K
10mil 1 2 5VS_ON 5
ON2 CT2
10 2 1
R926 330P_0402_50V7K @ @
0701 update 120K_0402_5% 6 9 C967 JP37 JP@ 2 2 2 2 2 2 2 2
+5VALW VIN2 VOUT2
1 2 7 8 +5VS_OUT +5VS
C979 VIN2 VOUT2
.1U_0402_16V7K 1 2 15 JUMP_43X118
C1144 @ GPAD
1U_0402_6.3V6K TPS22966DPUR_SON14_2X3

+1.8VS and +1.35VS Switch


+1.8VALW
VIH=1.2~5.5V Rise Time:
1 2
3.3V@82k/0.1uF=3.042ms 1.8V@330pF = 485.28us +1.8VS +1.35VS
C1145 @ U59 JP38 JP@
3.3V@47k/0.1uF=1.893ms 1U_0402_6.3V6K 1 14 +1.8VS_OUT 1.35V@330pF = 363.96us
VIN1 VOUT1 +1.8VS
R1055 2 13
82K_0402_5% VIN1 VOUT1 C1123 JUMP_43X79
SUSP# 2 1 1.8VS_ON 3 12 2 1 330P_0402_50V7K 1 1
ON1 CT1 C1124 2 1@ .1U_0402_16V7K @ @
C1125 1 2 +5VALW
4 11 C1147 C1148
.1U_0402_16V7K VBIAS GND C1126 2 1@ .1U_0402_16V7K 1U_0402_6.3V6K 1U_0402_6.3V6K
2 0701 update 2
2 1 1.35VS_ON 5 10 2 1 2 2
R1056 ON2 CT2 330P_0402_50V7K
47K_0402_5% +1.35V 6 9 C1127 JP39 JP@
1 2 7 VIN2 VOUT2 8 +1.35VS_OUT
VIN2 VOUT2 +1.35VS
C1128
.1U_0402_16V7K 1 2 15 JUMP_43X79
C1146 @ GPAD
1U_0402_6.3V6K TPS22966DPUR_SON14_2X3

+1.0VALW TO +1.0VS
+5VALW

0708:Change to SB00000PZ00 / need apply footprint


+1.0VALW U60 +1.0VS

1
ME4856_SO8
8 1 +0.675VS +1.05VS
2 7 2 2 R10
C1129 6 3 C1130 100K_0402_5%

1
4.7U_0603_6.3V6K 5 4.7U_0603_6.3V6K

2
R2314 R2315 SUSP
1 1 22_0603_5% 470_0603_5%
4

1
@
@ D
1 2

1 2
R1052 SUSP# 2 Q8
470_0603_5% G 2N7002K_SOT23-3
+5VALW D D S
1

1
3 2 SUSP 2 SUSP 3

3
2 1 1.0VS_GATE +1.0VS_R G G R16
1

0618 update R1061 S Q2307 S Q2308 100K_0402_5%


10K_0402_5% 1@ D 2N7002K_SOT23-3 2N7002K_SOT23-3
1

3
C1131 2 SUSP @

2
D .1U_0402_16V7K G
SUSP 2 S Q71 @
G 2 2N7002K_SOT23-3
3

Q70 S
2N7002K_SOT23-3
3

For Intel S3 Power Reduction

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC/DC Interface
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 30 of 42
A B C D E
5 4 3 2 1

D D

SLG3NB3374VTR is for DIS by output 24M*1,25M*1, 27M*1, 32K*1


SLG3NB3375VTR is for UMA by output 24M*1, 25M*1, 32K*1
SLG3NB244VTR is for UMA by output 25M*2, 32K*1

+RTCBATT

+RTCVCC

1
RG1 GCLK@

1
330_0402_5%
+1.8VGS +1.05VS +LAN_IO +3VLP +3VALW RG2 @
0_0402_5%

2
GCLK@ 1 1 GCLK@ 1 GCLK@ 1 GCLK@ 1 GCLK@

2
Depop if GCLK

2.2U_0603_6.3V6K
CG1 CG2 CG3 CG4 CG10
0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

C with UMA 0.1U_0402_10V7K 1 C


CG5 1
2 2 2 2 2 22U_0805_6.3V6M

CG6
GCLK@
GCLK@ 2
UG1 2

GCLK_VRTC 10 14 RTC_VOUT
VBAT VDD_RTC_OUT
Place close +3VLP
15 CPU_RTC 32.768k(P.8)
+V3.3A
to UG1.8 2
Place RG3 close to YC1
+3VALW VDD
2014307 Remove RG3, PCH_RTCX1_R
9 VGA 27M(P.29)
32kHz & PCH_RTCX1 trace & off-page
Place RG7 close to YV1
+1.8VGS
11 12
VDDIO_27M 27MHz
+LAN_IO
8 6 LAN_X1_R RG5 1 2 33_0402_5% XTLI_R 1 2
VDDIO_25M_A 25MHz_A XTLI_L <22>
GCLK@ RG8 GCLK@ 0_0402_5%
+1.05VS
3 5 PCH_X1_R RG6 1 2 0_0402_5%
VDDIO_25M_B 25MHz_B PCH_X1 <11>
GCLK@ 1 LAN 25M(P.21)
CLK_X1 1 GCLK@
16 XTAL_IN Place RG8 close to YL2
CLK_X2 CPU_CLK 24M(P.9) CG7
XTAL_OUT

GND1
GND2
GND3

GND4
5P_0402_50V8C
Place RG6 close to YC2 2

SLG3NB244VTR _TQFN16_2X3 RG3,RG8,RG6 0ohm_0402

4
7
13

17
for isolated CLK tail
GCLK@

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
GCLK
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 31 of 42
5 4 3 2 1
5 4 3 2 1

SD028000080 0_0402_5%
SD034120280 12K_0402_1%
SD034100300 27K_0402_1%
+3VALW_EC
Board ID SD034430280 43K_0402_1%
SD034560280 56K_0402_1%

2
EMC@ RE3
+3VALW
1 2 LE1 +EC_VCCA
Ra 100K_0402_1% SD034750280 75K_0402_1%
RE6 0_0805_5% FBMA-L11-160808-800LMT_0603
SD034100380 100K_0402_1%

1
1 2 +3VALW_EC 1 2 +EC_VCCA AD_BID0
+3VLP
RE4 0_0805_5% 1 1 2 2
SD034130380 130K_0402_1%
CE1 CE2 NEMC@ NEMC@
@ 1 1 SD034160380 160K_0402_1%

2
0.1U_0402_10V7K 0.1U_0402_10V7K CE5 CE6 +3VLP CE7
D D
1000P_0402_50V7K 1000P_0402_50V7K 0.1U_0402_10V7K Rb RE5 CE8
2 2 1 1 33K_0402_1% 0.1U_0402_10V7K SD034200380 200K_0402_1%
2 2
ECAGND SD000001B80 240K_0402_1%
ECAGND <34>

1
SD00000G280 270K_0402_1%
SD034330380 330K_0402_1%

111
125
22
33
96

67
9
UE1
SD028430380 430K_0402_1%

EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC

EC_VDD/VCC

EC_VDD/AVCC
EC_VDD0
PLT_RST#
1 "KB_LED_PWM" for OAK 17 only
SD034330280 33K_0402_1%
CE36 ESD@
WL_BT_LED 1 21 KB_LED_PWM T192
<28> WL_BT_LED GATEA20/GPIO00 GPIO0F
0.047U_0402_16V4Z KB_RST# 2 23 BEEP#
2 <17> KB_RST# KBRST#/GPIO01 BEEP#/GPIO10 BEEP# <23>
SERIRQ 3 26 USB_EN# +3VS
<17> SERIRQ SERIRQ GPIO12 USB_EN# <25>
LPC_FRAME# 4 27 ACOFF
<12> LPC_FRAME# LPC_FRAME# ACOFF/GPIO13 ACOFF <40>
Place CC30 LPC_LAD3 5
<12> LPC_AD3 LPC_AD3
LPC_LAD2 7 PWM Output CE9 2 1 100P_0402_50V8J ECAGND TP_CLK 2 1
close to RC51.1 <12> LPC_AD2 LPC_AD2
NEMC@ LPC_LAD1 8 63 BATT_TEMP 4.7K_0402_5% RE9
<12> LPC_AD1 LPC_AD1 BATT_TEMP/GPIO38 BATT_TEMP <34,40>
CE12 0.1U_0402_10V7K LPC_LAD0 10 LPC & MISC 64 WL_BT_LED#_EC TP_DATA 2 1
<12> LPC_AD0 LPC_AD0 GPIO39 WL_BT_LED#_EC <28>
2 1 1 NEMC@ 2 65 ADP_I 4.7K_0402_5% RE10
ADP_I/GPIO3A ADP_I <34,40>
R2354 0_0402_5% LPC_CLK_EC 12 AD Input 66 2 @ 1 PCH_HOT#
<12> LPC_CLK_EC CLK_PCI_EC GPIO3B T207
PLT_RST# 13 75 AD_BID0 RE7 0_0402_5%
<11,22,28> PLT_RST# PCIRST#/GPIO05 GPIO42
+3VALW_EC RE8 2 1 47K_0402_5% EC_RST# 37 76 ENBAKL
EC_RST# IMON/GPIO43 ENBAKL <19>
EC_SCI# 20
<17> EC_SCI# EC_SCII#/GPIO0E
CE11 2 1 0.1U_0402_10V7K TOUCH_RST 38
+3VALW_EC <20> TOUCH_RST GPIO1D 68 EN_INVPWR
DAC_BRIG/GPIO3C EN_INVPWR <20>
"TOUCH_RST" for OAK 15 only 70 EN_DFAN1
EN_DFAN1/GPIO3D EN_DFAN1 <29>
LPC_CLKRUN# 1 @ 2 TOUCH_RST DA Output 71 EC_ENVDD
<12> LPC_CLKRUN# IREF/GPIO3E EC_ENVDD <20>
RX4 0_0402_5% KSI0 55 72 LCD_TEST
KSI0/GPIO30 CHGVADJ/GPIO3F LCD_TEST <20>
1 2 LID_SW# KSI1 56
RE71 10K_0402_5% KSI[0..7] KSI2 57 KSI1/GPIO31
<29> KSI[0..7] KSI2/GPIO32
KSI3 58 83 EC_MUTE# VR_ON
+3VALW_EC KSI3/GPIO33 EC_MUTE#/GPIO4A EC_MUTE# <23>
KSO[0..16] KSI4 59 84 SIO_SLP_S4# T194 1 VR_ON
<29> KSO[0..16] KSI4/GPIO34 USB_EN#/GPIO4B
KSI5 60 85 CE34 ESD@
KSI6 61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 VCCST_PG_EC
C
KSI6/GPIO36 PS2 Interface EAPD/GPIO4D C
R488 1 @ 2 10K_0402_5% EC_SMI# KSI7 62 87 TP_CLK TP_CLK <29>
0.1U_0402_10V7K
R489 1 @ 2 10K_0402_5% EC_SCI# KSO0 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA 2
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <29>
KSO1 40

2
KSO2 41 KSO1/GPIO21
42 KSO2/GPIO22 97
Place CE34
KSO3 VGATE

2
KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 VGATE <39> between DE1 and RE12
KSO4 43 98 WOL_EN
KSO4/GPIO24 WOL_EN/GPXIOA01 WOL_EN <22>
KSO5 44 99 TXE_DBG
+3VALW_EC KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH
TXE_DBG <10>
DE1
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH <34>
VCCST_PG_EC
KSO7/GPIO27 SPI Device Interface Place T199, T200, T201, T202 close to
+3VS RP36 KSO8 47 NESD@
KSO8/GPIO28 PCH_SPI_MOSI_1 1

1
5 4 EC_SMB_CK1 KSO9 48 119 EC_SPI_MOSI_1 CE35 ESD@
6 3 EC_SMB_DA1 KSO10 49 KSO9/GPIO29 SPIDI/GPIO5B 120 EC_SPI_MISO_1 PCH_SPI_MISO_1
KSO10/GPIO2A SPIDO/GPIO5C

1
7 2 EC_SMB_CK2 KSO11 50 SPI Flash ROM 126 EC_SPI_CLK_R PCH_SPI_CLK_R 220P_0402_50V8J L03ESDL5V0CG3-2_SOT-523-3
8 1 EC_SMB_DA2 KSO12 51 KSO11/GPIO2B SPICLK/GPIO58 128 EC_SPI_CS0# 2
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A PCH_SPI_CS0#
2.2K_0804_8P4R_5% KSO14 53 KSO13/GPIO2D near UC8
54 KSO14/GPIO2E 73
Place CE35
KSO15
81 KSO15/GPIO2F ENBKL/GPIO40 74
ERP_LOT6
ERP_LOT6 <34>
between DE1 and UE1 Place DE1 close to UE1
KSO16 WL_BT_LED#_EC2
KSO16/GPIO48 PECI_KB930/GPIO41 WL_BT_LED#_EC2 <28>
2 @ 1 PMC_CORE_PWROK 1 @ 2 82 89 SIO_SLP_S0# T196
T212 KSO17/GPIO49 FSTCHG/GPIO50
RE18 10K_0402_5% RE37Short Pad 0_0402_1% 90
BATT_CHG_LED#/GPIO52 91 CAPS_LED
CAPS_LED#/GPIO53 CAPS_LED <29>
EC_SMB_CK1 77 GPIO 92 PWR_PWM_LED#
<34,40> EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 PWR_PWM_LED# <28>
Charger EC_SMB_DA1 78 93 BATT_LOW_LED# BATT_LOW_LED# <28>
<34,40> EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55
EC_SMB_CK2_EC 79 SM Bus 95 SYSON
EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON <36>
EC_SMB_DA2_EC 80 121 VR_ON_EC 1 2 VR_ON
EC_SMB_DA2/GPIO47 VR_ON/GPIO57 VR_ON <39>
EC_SMB_CK2 1 @ 2 EC_SMB_CK2_EC 127 CPU_DETECT# 1
<12,18,19,28,29> EC_SMB_CK2 PM_SLP_S4#/GPIO59 T215

2
DDR, MINI, TP, SOC, 2136 EC_SMB_DA2 1
RE15 2
0_0402_5% EC_SMB_DA2_EC 1 2 +3VALW_EC RE12 0_0402_5% @
<12,18,19,28,29> EC_SMB_DA2
RE16 @ 0_0402_5% RE11 @ 100K_0402_5% RE1 CE26
SIO_SLP_S3# 6 100 EC_RSMRST# 10K_0402_5% 0.1U_0402_10V7K
<17> SIO_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_RSMRST# <11,16> 2
SIO_SLP_S5# 14 101 EC_LID_OUT#
<17> SIO_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# <17>
EC_SMI# 15 102 VCIN1_PROCHOT
<17> EC_SMI# VCIN1_PROCHOT <34>

1
PS_ID 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103 VCOUT1_PH
<34> PS_ID GPIO0A H_PROCHOT#_EC/GPXIOA06 VCOUT1_PH <34>
CE_EN 17 104 PWR_OTP#
<20> CE_EN GPIO0B VCOUT0_PH/GPXIOA07 PWR_OTP# <35>
@ SPOK 18 GPO 105 BKOFF#
<35,37,38> SPOK GPIO0C BKOFF#/GPXIOA08 BKOFF# <19>
Reserve for ESD 1 2 WL_OFF#_EC 19 GPIO 106 PBTN_OUT#
<10,28> WL_OFF# GPIO0D PBTN_OUT#/GPXIOA09 PBTN_OUT# <17>
RE14 0_0402_5% DBC_EN 25 107 2 1 ESD@
<20> DBC_EN EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 T218
B FAN_SPEED1 28 108 ACIN_65W RE36 43_0402_1% EC_SPI_MOSI_1 1 2 LID_SW# 1 2 B
<29> FAN_SPEED1 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 T221 T199
2 1 SIO_SLP_S3# PCIE_WAKE# 29 EC_SPI_MISO_1 RE17 1 20_0402_5% CE30
0.1U_0402_10V7K
<22> PCIE_WAKE# EC_PME#/GPIO15 T200
<28> EC_TX EC_TX 30 EC_SPI_CLK_R RE19 1 20_0402_5% ESD@
EC_TX/GPIO16 T201
CE27 ESD@ EC_RX 31 110 ACIN EC_SPI_CS0# RE20 1 20_0402_5% PMC_CORE_PWROK 1 2
<28> EC_RX EC_RX/GPIO17 AC_IN/GPXIOD01 ACIN <11,34,40> T202
0.1U_0402_10V7K PMC_CORE_PWROK 32 112 EC_ON RE21 0_0402_5% CE31 0.1U_0402_10V7K
<11,16> PMC_CORE_PWROK PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON <35>
ME_SUS_PWR_ACK 34 114 ON/OFFBTN#
T204 SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFFBTN# <29>
2 1 SIO_SLP_S5# RUNPWROK 36 GPI 115 LID_SW# For EC Test
T216 NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# <29>
116 SUSP#
SUSP#/GPXIOD05 SUSP# <30,36,37,38>
CE28 ESD@ 117 65W/90W# ESD@
GPXIOD06 T220
0.1U_0402_10V7K 118 PECI_KB9012 1 2 CPU_DETECT# 1 2
PECI_KB9012/GPXIOD07
AGND/AGND T203
Please close to EC +1.05V_PGOOD 122 RE43 @ 43_0402_1% CE33 0.1U_0402_10V7K
T210 XCLKI/GPIO5D
123 124
GND/GND
GND/GND
GND/GND
GND/GND

VCCST_PG_EC +V18R
T209 XCLKO/GPIO5E V18R
1
GND0

CE16
Place CE30,CE31,CE32,CE33 close to UE1
FAN_SPEED1 4.7U_0805_10V4Z
KB9012QF-A4_LQFP128_14X14 2
11
24
35
94
113

69

1
CE29 LE2 @
ECAGND 2 1 ACIN 2 1
220P_0402_50V8J FBMA-L11-160808-800LMT_0603 CE18 100P_0402_50V8J
2

20mil
+3VS +3VALW_EC
0.1U_0402_10V7K

Please close to EC
VR_HOT#
ME_FWP PCH has internal 20K PD.
1
(suspend power rail)
CE15
1

KB9012A3 change to

2
Short Pad @
RE44 2 @ @
0_0402_1% R696 R697
5

KB9012A4 SA00004OB30 10K_0402_5% 10K_0402_5%


2

UE2
P

1
H_PROCHOT# 4 2 VCOUT1_PH VCIN0_PH
Y A
NC

VCIN1_PROCHOT
2
G

A SN74LVC1G06DCKR_SC70-5
1 RE47 A
1

100K_0402_5% 1 @ 2 H_PROCHOT# <10,34>


<39> VR_HOT#
CE19
1

47P_0402_50V8J RE13 0_0402_5%


1

2 D @
VCOUT1_PH 2 Q50
G 2N7002K_SOT23-3
S
3

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE-KB9012
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 32 of 42
5 4 3 2 1
5 4 3 2 1

D D

Screw Hole
H2 H4 H5 H8 H9 H11 H12
H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8
@ @ @ @ @ @ @
1

1
C C
H16 H17 H18 H35
H_2P8 H_2P8 H_3P3 H_3P7X3P2N
@ @ @ @
1

1
H31 H32 H33 H34
H_3P7 H_3P7 H_3P7 H_3P7
@ @ @ @ CPU bracket
1

H6 H7
H_3P3 H_3P3
@ @ VGA stand-off
1

H10
H_3P3
@ FAN stand-off
1

FD1 FD2 FD3 FD4


B @ FIDUCAL @ FIDUCIAL @ FIDUCAL @ FIDUCIAL B
1

FD7 FD5 FD6 FD8


@ FIDUCAL @ FIDUCIAL @ FIDUCAL @ FIDUCIAL
1

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Screw Hole
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 33 of 42
5 4 3 2 1
A B C D

PL1
VIN PR1
FBMJ4516HS720NT_2P 33_0402_5%
ADPIN 1 2 1 3 PSID-3 1 2 PS_ID <32>

S
PQ1
FDV301N_G 1N SOT23-3

1000P_0402_50V7K

1000P_0402_50V7K

G
2

1
@ PJPDC1

100K_0402_1%
100P_0402_50V8J

100P_0402_50V8J
PR3

2
1 @ PL2 PR4
1 2 FBMJ4516HS720NT_2P 2 1

PC1

PC2

PC3

PC4

PR2
PSID-2 +5VALW 2.2K_0402_5%
2 3 1 2
3

2
4
@ PJP1

2
4 5 10K_0402_1%
5 +3VALW

1
1 1 2 C 1

6 PSID-1 2 PQ2
GND 7 MMST3904-7-F_SOT323~D

15K_0402_1%
B
PAD-OPEN 1x3m

2
GND E

3
ACES_50299-00501-003

PR5
PL3
FCM1005KF-102T03 0402

1
PSID 1 2

BATT+ BATT++
BATT+

PL4
FBMJ4516HS720NT_2P
1 2 BATT++
1

1000P_0402_50V7K
0.01U_0402_25V7K
1

PC6

1
PC5

PD1 PD2
2

TVNST52302AB0_SOT523-3 TVNST52302AB0_SOT523-3

3
SMART
@ PBATT1 BATT_TEMP <32,40>
Battery:
1
01.GND1 1 2
2 3 PR7
02.GND2 3
BAT_ALERT PR6
2
4 SYS_PRES 100_0402_5% 10K_0402_1% 2

03.BAT_ALERT 4 5 BATT_PRS 1 2 1 2
5 6 +3VALW
04.SYS_PRES 6 7
DAT_SMB
CLK_SMB
05.BATT_PRS 7 8
8 9 PR8
06.DAT_SMB 9 10 100_0402_5%
07.CLK_SMB GND 11 1 2 EC_SMB_CK1 <32,40>
GND
08.BATT1+ SUYIN_200028MR009G502ZL PR9
09.BATT2+ 100_0402_5% CPU thermal protection at 93 degree C ( shutdown )
1 2 EC_SMB_DA1 <32,40>

Other component (37.1)


+EC_VCCA ADP_I <32,40>

1
Erp lot6 Circuit VIN

1
PR11
PR10 3.01K_0402_1%
Delay adaptor OC H_PROCHOT# PR13 12.1K_0402_1%
3.3K_1206_5%~D

0_0402_5%
2ms while hybrid power

2
2 1
1

ERP_LOT6 <32>

2
<32> VCIN0_PH
transition
PR12

H_PROCHOT# H_PROCHOT# <10,32>

PR14
2

ACIN <11,32,40>
1 2
3 2

1M_0402_1% VCIN1_PROCHOT <32>


PR15
6

PR17 0_0402_5%
L2N7002DW1T1G_SC88-6
PQ3B

160K_0402_1%
1

L2N7002DW1T1G_SC88-6

5 H_PROCHOT#_EC change net name to VCOUT1_PH


PQ4A

@ PR16 VCOUT1_PH 1 2 2 1 2 VCOUT1_PH <32>


6

@ PR18
L2N7002DW1T1G_SC88-6

0.01U_0402_25V7K
4

200K_0402_1%
10K_0402_1%
1

1
PQ3A

1
PR19
PC9
2

3 3
2

1
1M_0402_1% 2013/5/13
10K_0402_1%

@ PC7 PR20
1

PR18 add @
2

@ PC8 10K_0402_1%
PH1 1000P_0402_50V7K
1

2
PR21

100K_0402_1%_NCP15WF104F03RC

2
0.1U_0402_25V6
2

ECAGND <32>

Adapter protection:
if battery removed, adaptor only,
then trigger the H_PROCHOT#,
keep @ in BOM since battery can not
be removed by end user

H_PROCHOT#
3

PC11
.1U_0402_16V7K
L2N7002DW1T1G_SC88-6
PQ4B

BATT_PRS 1 2 5
100K_0402_1%
1

4
PR26

4 4
2

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/03/10 Deciphered Date 2015/03/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P31-PWR_DCIN/BATT CONN/OTP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B481P
Date: Monday, March 10, 2014 Sheet 34 of 42
A B C D
A B C D E

H/S main Rds(on) :typ:23.2mOhm, max:27.8mOhm H/S main Rds(on) :typ:23.2mOhm, max:27.8mOhm 5VALWP
3VALWP 2nd Rds(on) :typ:27mOhm , max:34mOhm 2nd Rds(on) :typ:27mOhm , max:34mOhm TDC 4.91A
TDC 4.5A Peak Current 8.63A
Peak Current 7.09A L/S main Rds(on) :typ:19.7mOhm, max:23.7mOhm OCP current 10.36A
OCP current 8.51A L/S main Rds(on) :typ:19.7mOhm, max:23.7mOhm
2nd Rds(on) :typ:19mOhm , max:23.5mOhm 2nd Rds(on) :typ:19mOhm , max:23.5mOhm
+3VLP
PC105
1U_0603_10V6K
1 2
1 1

Output capacitor ESR need follow


@ PC106 @ PC107
100P_0402_50V8J 100P_0402_50V8J below equation to make sure feed back
1 2 1 2 loop stability
PR100 PR101
ESR=20mV*L*fsw/2V
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2
VFB=2V VFB=2V

PR102 PR103
20K_0402_1% 20K_0402_1%
1 2 1 2

B+_3/5V
PR104 PR105
187K_0402_1% 210K_0402_1%
PL102 POK need pull high, it 1 2 1 2
1UH_6.6A_20%_5X5X3_M
B+ 1 2 B+_3/5V will pull high on VS

10U 25V K X5R 0805


transfer circuit

1
FB_3V

FB_5V

PC108
CS2

CS1
2200P_0402_50V7K
0.1U_0402_25V6

10U 25V K X5R 0805

2
1

1
@ PC109

PC110

PC111

PU100

5
5

1
2 PR106 2
2

100K_0402_5%

CS2

VFB2

VREG3

VFB1

CS1
+3VALWP 1 2
PAD
21
EN_3V 6
EN2 20 EN_5V
PQ101 PQ102
4 EN1 4
MDV1528URH_PDFN33-8-5 7 MDV1528URH_PDFN33-8-5
<32,37,38> SPOK PGOOD 19
VCLK
LX_3V 8 TPS51225CRUKR_QFN20_3X3

3
2
1
1
2
3

PL100 PC112 PR107 SW2 18 LX_5V


4.7UH_5.5A_20%_7X7X3_M 0.1U_0603_25V7K 0_0603_5% SW1 PR108 PC113 PL101
1 2 1 2 1 2 BST_3V 9 0_0603_5% 0.1U_0603_25V7K 4.7UH_5.5A_20%_7X7X3_M
+3VALWP VBST2 17 BST_5V 1 2 1 2 1 2
VBST1 +5VALWP
1

UG_3V 10
4.7_1206_5%

4.7_1206_5%
DRVH2

1
16 UG_5V
@ PR109

@ PR110
VREG5
DRVL2

DRVL1
DRVH1

VO1
5

5
VIN
220U_6.3V_M

220U_6.3V_M
PQ103 PQ104

ESR=17m ohm
2
ESR=17m ohm

1 1

11

12

13

14

15

1SNB_5V 2
MDV1527URH_POWERDFN33-8-5 MDV1527URH_POWERDFN33-8-5
1SNB_3V

+ +
PC102

PC103
680P_0603_50V8J
4 LG_3V LG_5V 4
680P_0603_50V8J

2 2
@ PC114

@ PC115
PR111
2.2_1206_1% +5VALWP
1
2
3

3
2
1
2

2
B+_3/5V 1 2
VL

1U_0603_25V6K

1U_0603_10V6K
1

1
3 3

@ PC116

PC117
2

2
PR112
0_0402_5%
EN_5V 1 2
OVP=Vout*(112.5%~117.5%)

EN PR113 OCP=Vtrip/Rdson+Iripple/2
0_0402_5%
Rising=1.6~0.3V EN_3V 1 2 Vtrip=Ics(min)*Rcs/8+1mV
PR114 Vcs=Ics*vcs should be in the range of 0.2~2V
0_0402_5%
1 2
<32> PWR_OTP# Vout=VFB*(1+Rtop/Rbot)
PR115
2.2K_0402_5% VFB=2V
1 2 EN_5V3V
<32> EC_ON
Vos=√SQU(Vomax)+L*SQU(I)/C) @PJP100
JUMP_43X118
+5VALWP 1 2 +5VALW
1 2
4.7U_0805_25V6-K
402K_0402_1%
1

@ PJP101
@ PR116

@ PC118

JUMP_43X118
4 +3VALWP 1 2 +3VALW 4
2

1 2
2

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/03/10 Deciphered Date 2015/03/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P32-PWR-3.3VALWP/5VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 2.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: LA-B481P
Monday, March 10, 2014 Sheet 35 of 42
A B C D E
A

H/S main Rds(on) :typ:23.2mOhm, max:27.8mOhm


1.35VP 2nd Rds(on) :typ:27mOhm , max:34mOhm
TDC 6.87A
Peak Current 9.81A
OCP current 11.77A L/S main Rds(on) :typ:19.7mOhm, max:23.7mOhm
2nd Rds(on) :typ:19mOhm , max:23.5mOhm

Pin19 need pull separate from +1.35VP.


If you have +1.35V and +0.675V sequence question, 0.675Volt +/- 5%
@ PJP200 you can change from +1.35VP to +1.35VS. TDC 0.84A
JUMP_43X118
1 2 B+_1.35VP PR200 Peak Current 1.2A
B+ 1 2 2.2_0603_5%
BST_1.35VP 1 2 BOOT_1.35VP

2200P_0402_50V7K
0.1U_0402_25V6
+1.35VP

10U 25V K X5R 0805

10U 25V K X5R 0805


1

1
@ PC203

PC204

PC205

PC206
2 DH_1.35VP +0.675VSP

2
SW_1.35VP

10U_0805_6.3V6K

10U_0805_6.3V6K
1

1
PC207

PC208

PC209
5
0.1U_0603_25V7K

16

17

18

19

20
2
PU200

2
PHASE

UGATE

BOOT

VLDOIN

VTT
21
PAD
PQ201 4 DL_1.35VP 15 1
MDV1528URH_PDFN33-8-5 LGATE VTTGND

14 2
PL200 PR201 PGND VTTSNS

1
2
3
1UH_11A_20%_7X7X3_M 21K_0402_1%
1 2 1 2 CS_1.35VP 13 3
+1.35VP PC210 CS RT8207MZQW_WQFN20_3X3 GND
1

1U_0603_10V6K

5
1 2 12 4 VTTREF_1.35VP
@ PR202 PR203 VDDP VTTREF
1
330U_2.5V_M

4.7_1206_5% 5.1_0603_5%
ESR=17m ohm

+ 1 2 VDD_1.35VP 11 5
PC201

1 2

+5VALW VDD VDDQ +1.35VP

1
PGOOD
PC212

2
4

TON
1
1
2 @ PC211 PC213 PR209 0.033U_0402_16V7K
1

FB
S5

S3

2
680P_0402_50V7K 2.2_0603_5%
2

PQ203 1U_0603_10V6K

10

6
1
1
2
3

MDV1527URH_POWERDFN33-8-5

FB_1.35VP
TON_1.35VP
+5VALW

EN_1.35VP

EN_0.675VSP
PR204
<8> DDR_PWROK 8.06K_0402_1%
PR205 1 2 +1.35VP
1 2 887K_0402_1%
+1.35VP B+_1.35VP 1 2
PR210

1
10K_0402_5%

PR207 PR206
0_0402_5% 10K_0402_1%
1 2

2
Mode Level +0.75VSP VTTREF_1.5V <32> SYSON
S5 L off off

1
@ PC214
S3 L off on 0.1U_0402_10V7K
S0 H on on

2
Note: S3 - sleep ; S5 - power off PR208
0_0402_5% @ PJP201
1 2 JUMP_43X118
<30,32,37,38> SUSP# +1.35VP 1 2 +1.35V
1 2

1
@ PC215
0.1U_0402_10V7K

2
@ PJP202
JUMP_43X39
1 2
+0.675VSP 1 2 +0.675VS

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/03/10 Deciphered Date 2015/03/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P33-PWR-1.35VP/0.675VSP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B481P
Date: Sheet 36 of 42
A
5 4 3 2 1

PC300
22U_0603_6.3V6M
change PL300 from 1UH_PH041H-1R0MS_3.8A (SH00000MN00) @ PJP301

1 2
to 1UH_1239AS-H-1R0M-P2_3A(SH00000X300) +1.05VSP
1
1 2
2
+1.05VS
@ PJP300 PU300 PL300
JUMP_43X39
1UH_1239AS-H-1R0M-P2_3A_20%
+5VALW 1 2 4 3 LX_1.05VSP 1 2
1 2 IN LX +1.05VSP
5 2

68P_0402_50V8J
JUMP_43X39 PG GND

1
6 1

PC301

22U_0603_6.3V6M

22U_0603_6.3V6M
FB EN

1
SY8032ABC_SOT23-6 @ PR301

PC302

PC303
2
D PR300 4.7_0603_5% PR302 +1.05VSP D

2
2.55K_0402_1% 15K_0402_1%
1 2 +1.05VSP_ON
Imax= 2A, Ipeak= 3A TDC 0.7A
<30,32,36,38> SUSP#

2
Rup FB=0.6V Peak Current 1A

1
EN rising threshold =1.5V @ OCP current 3.5A

1
R=10k PR303 PC304 FB_1.05VSP
1M_0402_1% .1U_0402_16V7K
C=0.1uF

2
T= 0.606 ms

1
2

1
@ PC305 PR304
680P_0402_50V7K 20K_0402_1%
VFB=0.6V
Rdown

2
Vout=0.6V* (1+Rup/Rdown)

2
C C

PC307
22U_0603_6.3V6M
change PL301 from 1UH_PH041H-1R0MS_3.8A (SH00000MN00)
1 2
to 1UH_1239AS-H-1R0M-P2_3A(SH00000X300)
@ PJP302 PU301 PL301
1UH_1239AS-H-1R0M-P2_3A_20%
+3VALW 1 2 4 3 LX_1.0VALWP 1 2
1 2 IN LX +1.0VALWP
5 2

68P_0402_50V8J
JUMP_43X39 PG GND

1
6 1

PC310

22U_0603_6.3V6M

22U_0603_6.3V6M
FB EN

1
SY8032ABC_SOT23-6 @ PR306

PC311

PC308
2
PR308 4.7_0603_5% PR307

2
10K_0402_5% 13.7K_0402_1%
1 2 +1.0VALWP_ON Imax= 2A, Ipeak= 3A
<32,35,38> SPOK

2
Rup FB=0.6V
1

EN rising threshold =1.5V @


1

R=10k PR305 PC309 FB_1.0VALWP


1M_0402_1% .1U_0402_16V7K
C=0.1uF
@ PJP303
2

T= 0.606 ms

1
B 1 2 B
+1.0VALWP
2

+1.0VALW
1

1 2
@ PC306 PR309 JUMP_43X79
680P_0402_50V7K 20K_0402_1%
VFB=0.6V
Rdown
2

Vout=0.6V* (1+Rup/Rdown)

2
+1.0VALWP
TDC 2.15A
Peak Current 3.08A
OCP current 3.5A

A A

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/03/10 Deciphered Date 2015/03/31 Title
P34-PWR-1.05VSP/1.0VALWP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Custom
LA-B481P 2.0

Date: Sheet 37 of 42
5 4 3 2 1
A B C D

change PL400 from 1UH_PH041H-1R0MS_3.8A (SH00000MN00)


PC400 to 1UH_1239AS-H-1R0M-P2_3A(SH00000X300)
22U_0603_6.3V6M

1 2 @ PJP401
PU400 PL400
1UH_1239AS-H-1R0M-P2_3A_20%
need re-link FB R 1 2
+5VALW 1 2 4 3 LX_+1.8VSP 1 2 +1.8VALWP 1 2 +1.8VALW
1 2 IN LX +1.8VALWP
5 2 JUMP_43X39
@ PJP400 JUMP_43X39

68P_0402_50V8J
PG GND
1 1

1
6 1

PC401

22U_0603_6.3V6M

22U_0603_6.3V6M
1

1
FB EN
SY8032ABC_SOT23-6 @ PR401

PC402

PC403
2
PR400 4.7_0603_5% PR402

2
20K_0402_1% 40.2K_0402_1%
1 2 +1.8VSP_ON
<32,35,37> SPOK +1.8VALWP

2
Rup TDC 0.08A

1
EN rising threshold =1.5V Imax= 2A, Ipeak= 3A

1
R=10k @ PR403 PC404 FB_+1.8VSP Peak Current 0.11A
C=0.1uF 1M_0402_1% .1U_0402_16V7K FB=0.6V OCP current 3.5A
T= 0.606 ms

1
2

1
@ PC405 PR404
680P_0402_50V7K 20K_0402_1%
VFB=0.6V
Rdown

2
Vout=0.6V* (1+Rup/Rdown)

2
2013/5/13
Change PR400 from 100K to 0 ohm Vout=1.806V
PR403 add @

2 2

+1.8VALW +5VALW
1

PC411
1

1U_0402_6.3V6K
JUMP_43X39
2
2

@ PJP404
Ultra Low Dropout 0.23V(typical) at 3A Output Current
2

change input cap from 0805 to 0603


PC412 PU402
1

APL5930KAI-TRG_SO8
4.7U_0603_6.3V6K 6
5 VCNTL 3 @ PJP405
2

PR409 9 VIN VOUT 4


51.1K_0402_1% VIN VOUT +1.5VSP +1.5VSP 1 2 +1.5VS

1
1 2 8 1 2

17.8K_0402_1%
<30,32,36,37> SUSP# EN

1
7 2
GND

POK FB PC413 JUMP_43X39

PR410
1

0.01U_0402_25V7K
Rup

2
.1U_0402_16V7K

1
3 3
PC414
PC415

2
@ PR411 22U_0603_6.3V6M
2

100K_0402_1%

2
2

1
+1.5VSP
2013/5/13
Change PR716 from 47kto 100k
TDC 0.18A
PR412
Rdown 20K_0402_1% Peak Current 0.26A
OCP current 4.2A
2

Vout=0.8V* (1+Rup/Rdown)
Vout=1.512V

4 4

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/03/10 2015/03/31 Title
Deciphered Date
PWR-1.8VALW/1.5VSP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
LA-B481P
Monday, March 10, 2014 Sheet 38 of 42
A B C D
5 4 3 2 1

+SOC_VNN

1
2013/04/12 @ PC502
Change the PR805 from 2.61kOhm to 1.47kOhm. 1000P_0402_50V7K Imax = 9.8A

2
( Droop_VNN: 5.9mOhm )
<14> VGFX_VSNS
Ipeak = 14A
Iocp(minimum) = 21A

1
2013/04/12 PC503
Change the PR808 from @ to 21kOhm. 0.01UF_0402_25V7K

2
( Freq: 450kHz ) VCORE_GSNS
Change the PR807 from 422 Ohm to 158 Ohm.
CPU_B+
( OCP_VNN: 15A )
D
Change the PC815 from 0.047uF to 0.033uF. PC504 PC505 D
( RC Match ) 120P_0402_50V8J
470P_0402_50V7K
PC506 1 2 1 2 1 2
6800P_0402_25V7K PR501

10U 25V K X5R 0805


PC507 499_0402_1%

10U 25V K X5R 0805


1 2 1000P_0402_50V8-J

2200P_0402_50V7K
1

1
1 2 1 2 1 2

2K_0402_1%

PC509

PC510
1
PR503 PR504 PR506

@ PC508
PR502

1
137K_0402_1% 2.05K_0402_1% 0_0603_5%
Close GFX choke

2
2
UGATEG1-1 1 UGATEG1

2
PH500 PR507

21K_0402_1%
PR505

1
10K_0402_1%_ERTJ0EG103FA 226_0402_1%

PR508
2K_0402_1% PC515
VSUMG- 1 2

1 2
1
0.1U_0603_25V7K 0.22uH DCR= 0.98+-5% m ohm, Idc~Isat= 25~34A

1
2 1 2 1 BOOTG
PC511 PR511 PL500
+3VALW

D1

D1

D1

G1
2
2.2_0603_5% +SOC_VNN

0.033U 25V K X7R 0402


.1U_0402_16V7K 820PF_0402_50V7K

2
0.22UH_PCME064T-R22MS_28A_20%
1
PC512

11K_0402_1%
1 2

0.1U_0603_25V7K
10 9 PHASEG 1 4

2.61K_0402_1%

1.91K_0402_1%
D1 D2/S1

1
PC514
PR509

PC513
2

2 3
PR500 BOOTG PQ501

G2
S2

S2

S2
2

1
AON7934_DFN3X3A-8-10

2
2 UGATEG1

1
LGATEG PR512 @
VSUMG+ PHASEG 4.7_0603_5%
3.65K_0603_1%

PR510

1 2
PR513
Close GFX L/S MOS LGATEG +5VALW

2
PU500 PC516 @

33

32

31

30

29

28

27

26

25
PR514 680P_0402_50V7K

2
61.9K_0402_1%

VSUMG+

VSUMG-
PAD

ISUMPG

ISUMNG

RTNG

FBG

COMPG

PGOODG

BOOTG

UGATEG
C C
1 2

1U_0603_10V6K
PR515

1
3.83K_0402_1%

1
1 2
PH501 NTCG_1 1 2 NTCG 1 24 PR519

PC517
NTCG PHASEG 1_0603_5%
PR518
PR516 1 2 0_0402_5%470K_0402_5%_TN05-4R474JR VR_ON_R 2 23
<32> VR_ON 0_0603_5%

2
VR_ON LGATEG

2
1 PR520 2 VR_SVID_CLK_R 3 22
<11> VR_SVID_CLK SCLK VCCP
20_0402_1%
PR521 VR_SVID_ALERT# 4 ISL95833HRTZ-T_TQFN32_4X4 21
<11> VR_SVID_ALERT# ALERT# VDD
16.9_0402_1% @ PR522 1.91K_0402_1% PL502

1U_0603_10V6K
1 2 VR_SVID_DATA_R 5 20 1 2 HCB2012KF-121T50_0805

PC518
<11> VR_SVID_DATA SDA PWM2

1
CPU_B+ 1 2 B+
6 19 LGATE1
<32> VR_HOT# VR_HOT# LGATE1
1

0.1U_0402_25V6
2

10U 25V K X5R 0805

10U 25V K X5R 0805


NTC 7 18 PHASE1
3.83K_0402_1%

NTC PHASE1
1

For VR_HOT#, already +

100U_25V_M
1

1
PGOOD
1 2 8 17
PR523

PC522

PC519

PC501
BOOT1

PC521
ISUMN
ISUMP

COMP
pull high at power side. ISEN2 UGATE1
ISEN1

RTN
1

@ PC520 PR524 2

FB
499_0402_1%

2
73.2_0402_1%

73.2_0402_1%
1

47P_0402_50V8J 0_0402_5%
2

@
470K_0402_5%_TN05-4R474JR

UGATE1
PR525

PR526

PR527
2

10

11

12

13

14

15

16
NTC_1
+5VALW BOOT1 PR528
61.9K_0402_1%

0_0603_5%
UGATE1-1 2 1 UGATE1
2

@ 0.22uH DCR= 0.98+-5% m ohm, Idc~Isat= 25~34A


VGATE <32>
PH502

PR529

2.2_0603_5%
+1.0VS 1 2 +3VALW PC524 PR531

1
2 1 2 1 BOOT1
2

2
1

1.91K_0402_1% PR530
PL501

D1

D1

D1

G1
B B
@ PC523 0.1U_0603_25V7K +SOC_VCC
0.22UH_PCME064T-R22MS_28A_20%
0.1U_0402_16V7K 2013/04/12
2

2013/04/12 10 9 PHASE1 1 4
Change the PR839 from 422 Ohm to 240 Ohm. D1 D2/S1
Change the PR833 from 42.2kOhm Close CPU L/S MOS

1
( OCP_VCC: 22.5A ) 2 3

680P_0402_50V7K 4.7_0603_5%
to 64.9kOhm. ( Boost voltage: 1.1V ) Change the PC832 from 0.047uF to 0.033uF. PQ503

G2

@ PR532
S2

S2

S2
( RC Match ) AON7934_DFN3X3A-8-10

8
PC525 PR533 PR534

2
820PF_0402_50V7K 2K_0402_1% 64.9K_0402_1% VSUM+ LGATE1

1
1 2 1 2 1 2

2.61K_0402_1%
1

PC526 @
1
3.65K_0603_1%

PR535
PR536

11K_0402_1%
PC527 PC528
2K_0402_1%

2
1

0.033U 25V K X7R 0402

470P_0402_50V7K 180P_0402_50V8J
PR539

2
1

1
0.1U_0603_25V7K

1 2 1 2 1 2
PC529
191_0402_1%

PR538
PR540

PC530

499_0402_1% 1
2

PH503 VSUM+
PR541

Close CPU choke


2

PR542 PC531
6800P_0402_25V7K
1

1.78K_0402_1% 1000P_0402_50V8-J 10K_0402_1%_ERTJ0EG103FA


PC532

1 2 1 2 1 2
2

PR543 +SOC_VCC VSUM-


2

137K_0402_1%
2013/04/12 VSUM- Imax = 8.4A
@ PC533
Change the PR841 from 1.91kOhm to 2.21kOhm. Ipeak = 12A
.1U_0402_16V7K

330P_0402_50V7K
1

( Droop_VCC: 5.9mOhm ) 1 2
PC534

Change the PC828 from 470pF to 330pF. Iocp(minimum) = 18A


A A
( FB RC to GND )
2

<14> VCORE_VSNS
1 2

PC535
DELL CONFIDENTIAL/PROPRIETARY
0.01UF_0402_25V7K
<14> VCORE_GSNS Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/03/10 Deciphered Date 2015/03/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P38-PWR-CPU_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B481P
Date: Sheet 39 of 42
5 4 3 2 1
A B C D

VIN PQ705 Iada=0~3.34A(65W)


PQ704 SI4483ADY_SO8 P3
AO4407AL_SO8 P2
8 1 1 8 ADP_I = Iadapter*Rsense*Current sense amplifier vlotage gain
7 2 2 7
6 3 3 6
5 5
PR700 B+ PQ706
0.01_1206_1% AO4407AL_SO8

4
1 8
1 4 2 7

1
3 6

0.1U_0603_25V7K
3

1
PQ707 2 3 CSIN 5

200K_0402_1%
PDTA144EU PNP_SOT323

PC700

PR701

5600P_0402_25V7K
1 1
1

CSIP

4
2
2

PC701
200K_0402_1%

2
PL701 CHG_B+
PR702

1UH_2.8A_30%_4X4X2_F

1
1 2
2

2200P_0402_25V7K
1

0.1U_0603_25V7K
PQ708

4.7U_0805_25V6-K

4.7U_0805_25V6-K
DDTC115EUA-7-F_SOT323

PC702

PC703
10_0402_5%

10_0402_5%
@

1
V1 2 VIN
1

1
PR704

PR705

PC704

PC705
PR703

2
0.1U_0603_25V7K
150K_0402_1%
PR706

DMN66D0LDW-7 2N SOT363-6
3

0.1U_0603_25V7K
3
200K_0402_1%
2

2
1 2

2
PR707 VIN

PQ710B
3

2
BATT_TEMP 5 10_1206_1%

PC706

PC707
DMN66D0LDW-7 2N SOT363-6
6

2
1 2 PC709

1
0.1U_0402_10V7K
1

2
PQ709B 0.047U_0603_25V7M PC710
PQ709A

PC708

ISL88731_ICREF
4

1
1
5 DMN66D0LDW-7 2N SOT363-6 1 2 1U_0603_10V6K PR708

1
2 PC711 47K_0402_1%

2
@ 1U_0603_25V6K PR709
VDDP_LDO
4

2
4.7_0603_5%
1

1 1
2 1
VIN

232K_0402_1%
PC712 PR713 PC713

2
0.01U_0402_50V7K 0_0603_5% 0.1U_0603_25V7K

28

27

DDTC115EUA-7-F_SOT323
100K_0402_1%

PR714

1
1

1 2 PU700 2 1 BST_CHGA 1 2

PQ711
PR711
2 1 2 V1
PR710

ICREF

CSSP

CSSN
2 DCIN 22 26 2

PR715 DCIN ICOUT

1
1 2 ACSETIN 2 100K_0402_1%
ACIN
2

5
6
7
8
PR712 25 BST 1 2
BOOT

3
200K_0402_5% ACIN 49.9K_0402_1% 13
ACIN 1 <11,32,34>
2 ACIN +5VALW ACOK PC714
1

11 1U_0603_10V6K
158K_0402_1%

VDDSMB
PR716

PR717
0.1U_0402_10V7K

10 4
DDTC115EUA-7-F_SOT323

0_0402_5%
1

<32,34> EC_SMB_CK1 SCL


1

1 2
PC715

9 21 VDDP_LDO PQ701
SDA VDDP
2

PR719 MDS1525URH_SO8 PR720


2

ACOFF <32> 14
PR718 0_0402_5% PL700
NC

3
2
1
1 2 2 <32,34> EC_SMB_DA1 1 2 24 DH_CHG 0.01_1206_1%
PQ712

UGATE
8
VICM 23 LX_CHG
10UH_3.5A_20%_7X7X3_M
1 2 1 4
BATT+
CHG
10K_0402_5% 6 PHASE

4.7_1206_5%
FBO 2 3
3

1
5
DMN66D0LDW-7 2N SOT363-6

EAI
6

5
6
7
8

PR721
4 20 DL_CHG
PQ710A

4.7K_0402_5%

2ISL88731_VREF

EAO LGATE
2

10U 25V K X5R 0805

10U 25V K X5R 0805

10U 25V K X5R 0805

10U 25V K X5R 0805


2 @

10_0402_5%
1 2

1
PR722 SNB_CHG
PR723

PC717

PC718

PC719

PC720
100_0402_1% ISL88731_VREF 3 19 4

680P_0402_50V7K
> BATT_TEMP VREF PGND
1

18

PC716

PR724
CSOP

2
@
221K_0402_1%

PQ703
1

2
7 17
CE CSON

2
MDS1525URH_SO8 @
PR725

3
2
1
15 VFB 1 PR726 2
287K_0402_1%

VFB BATT+
2

12
<32,34> ADP_I
2200P_0402_25V7K

GND 16 100_0402_5%
PR727
1

NC
0.1U_0402_10V7K

3 3
1

29 PC722
PC721

TP 1 2
1
PC723
2

ISL88731_ICREF ISL88731CHRTZ-T TQFN 28P PWM 0.22U_0603_25V7K


@ PC726
63.4K_0402_1%

2
2

@ 1 2
28.7K_0402_1%
2

PR729
0.01U_0402_25V7K

PC725 0.1U_0603_25V7K
PR728
1

0.1U_0402_16V7K
PC727
1

@
2

For DT Mode
VIN
3.3K_1206_5%~D

1
PR730

V1
3 2

4 4
DMN66D0LDW-7 2N SOT363-6
DMN66D0LDW-7 2N SOT363-6
6

PQ713B
PQ713A

ACOFF 5
BATT_TEMP 2 DELL CONFIDENTIAL/PROPRIETARY
4

Security Classification Compal Secret Data Compal Electronics, Inc.


1

Issued Date 2014/03/10 2015/03/31 Title


Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P37-PWR-Charger
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
LA-B481P
Monday, March 10, 2014 Sheet 40 of 42
A B C D
5 4 3 2 1

D D

+SOC_VNN
+SOC_VCC +1.35V
PC913 1 2 22U_0603_6.3V6M
PC901 1 2 22U_0603_6.3V6M PC914 1 2 22U_0603_6.3V6M PC902 1 2 22U_0805_6.3V6M
PC903 1 2 22U_0603_6.3V6M PC915 1 2 22U_0603_6.3V6M PC904 1 2 22U_0805_6.3V6M
PC905 1 2 22U_0603_6.3V6M PC916 1 2 22U_0603_6.3V6M PC906 1 2 22U_0805_6.3V6M
PC907 1 2 22U_0603_6.3V6M PC908 1 2 22U_0805_6.3V6M

PC917 2 1220U_D2_2VY_R15M
PC909 2 1220U_D2_2VY_R15M

+
PC918 2 1220U_D2_2VY_R15M

+
PC911 2 1220U_D2_2VY_R15M

+
PC919 2 1220U_D2_2VY_R15M

+
+SOC_VCC +SOC_VNN
C C
PC920 1 2 22U_0603_6.3V6M
PC929 1 2 22U_0603_6.3V6M PC921 1 2 22U_0603_6.3V6M
PC922 1 2 22U_0603_6.3V6M
PC930 1 2 10U_0603_6.3V6M
PC923 1 2 1U_0402_6.3V6K
PC931 1 2 22U_0603_6.3V6M PC924 1 2 1U_0402_6.3V6K
PC932 1 2 22U_0603_6.3V6M PC925 1 2 1U_0402_6.3V6K

PC933 1 2 2.2U_0402_6.3V6M @ PC926 1 2 0.1U_0402_16V7K


PC934 1 2 2.2U_0402_6.3V6M @ PC927 1 2 0.1U_0402_16V7K
@ PC928 1 2 0.1U_0402_16V7K

B B

A A

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/03/10 Deciphered Date 2015/03/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P38-PWR-CPU_CORE_CAP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B481P
Date: Sheet 41 of 42
5 4 3 2 1
5 4 3 2 1

Version change list (P.I.R. List) Page 1of 2


for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase

1
D D

C
4 C

B B

A A
7

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/03/10 Deciphered Date 2015/03/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-PIR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 2.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Sheet 42 of 42
5 4 3 2 1
www.s-manuals.com

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