An ISFET based sensing array with sensor offset

compensation and pH sensitivity enhancement

Yan Liu∗† ,and Chris Toumazou†
∗ Dept.
of Electrical and Electronic Engineering, † Institute of Biomedical Engineering,
Imperial College of Science, Technology and Medicine, London, UK SW7 2AZ United Kingdom
Email: {yan.liu06, c.toumazou}@imperial.ac.uk

Abstract—In this paper, a novel chemical sensor system

utilizing an Ion-Sensitive Field Effect Transistor (ISFET) for Offset
pH measurement is presented. Compared to other interface cancellation

circuits, this system uses auto-zero amplifiers with a pingpong +

control scheme and array of Programmable-Gate Ion-Sensitive Φ1
Field Effect Transistor (PG-ISFET). By feedback controlling the Vchem -
programable gates of ISFETs, the intrinsic sensor offset can Vout
Voffset1
be compensated for uniformly. Furthermore the chemical signal
sensitivity can be enhanced due to the feedback system on the +
sensing node. A pingpong structure and operation protocol has Vref -
Φ2
been developed to realize the circuit, reducing the error and
achieve continuous measurement. This system has been designed Voffset2
Offset
and fabricated in AMS 0.35μm, to compensate for a threshold cancellation
voltage variation of ±5V and enhance the pH sensitivity to
100mV/pH.

I. I NTRODUCTION Fig. 1. Entire structure of readout circuitry

Technologies to implement chemical sensors in cheap and

reliable micro-fabrication have been developed in last several
decades. Among many devices,the Ion-Sensitive Field Effect
Transistor (ISFET) [1], invented by Bergvald in 1970s, has
been proved to be a established one. Originally the ISFET
device was fabricated by etching the MOSFET devices from
passivation layer to the polysilicon gate, and depositing sens-
ing membrane on the gate area, such as aluminium oxide or
titatium oxide.
Since its invention, numerous effort has been made to im-
plement this device into a standard semiconductor fabrication
technology, CMOS [2]–[4]. Experiments results showed that
these CMOS based ISFETs sensors had a reasonable pH
sensitivity and processing circuitry integration ability, since
the passivation material used in CMOS process is silicon
nitride, which is pH sensitive. However, these devices suffered
from nonlinear effects, such as DC offset, drift, and unstable
pH sensitivity [1], [5]. Both post-fabrication process [6] and
circuity techniques [1], [7], [8] have been studied and unitized
to minimize non-ideal charactristic. Post-processing needs
extra steps and material to characterize and correct the offset,
which is time consuming and non cost-efficient. In [7], the
Programmable Gate ISFET(PG-ISFET) with extra program
node was introduced to modulate the offset voltage and drift.
In [8], an auto-offset-removal circuit based on PG-ISFET and
feedback was adopted to compensate the offset. However, the
latter one needed complex opamps and the area efficiency is
low, furthermore the duty cycle of measurement is not 100%,
hereby the leakage during the non-measurement period will
degrade the results accuracy.
In this paper, we developed a readout system based on PG-
ISFETs array and a pingpong control scheme shown in Fig 1,
to cancel out sensor offset due to trapped charge or MOSFET
threshold mismatch in addition to enhancing pH sensitivity.
This paper is organized as follows: Section II gives detail about
the theory and structure of PG-ISFET; Section III describes
readout circuitry, which bias and controls the programmable
gates. Section IV describes pingpong control scheme to cancel
out the offset and readout the signal for two sensors in one
pair continuously. Finally, simulation results and the system
fabrication are discussed in Section V.
II. CMOS ISFET AND PG-ISFET OPERATION PRINCIPLE
The CMOS based ISFET is a normal MOSFET device, with
a stack of metal layers connecting top passivation and gate
polysilicon [2]. The overall chemical potential drop through
the reference electrode-electrolyte-insulator interface is given
by [1], [4]:
Qox + Qss
Vchem = Eref − ψo + ψl j + χsol − (1)
Cox
where Eref is the contribution of the reference electrode
relative to vacuum; χsol is the surface dipole potential.ψo
and ψlj are the potential drops in the insulator/electrolyte and
reference electrode/electrolyte surface. Qox and Qss are the
charge density in the oxide and the surface state citeberg. ψo is

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 ISFET SENSORS Offset cancellation node Readout node

a
Cstore Cstore
Φ1 Φ2

VOUT 1 VOUT 2
Cs Cs

Ce Ce
I1 I2
Cpass Cpass

P3 P4
+

+
-

-
Ref
P5 P6

Vref I d1 I d2
I bias I bias Vref

b
Fig. 2. (a) PG-ISFET with 2 capacitive coupled programmable nodes and sensing membrane and (b) readout schematic

the only pH dependent term and therefore the potential which
needs to be monitored [1].
The sensitivity is defined as the chemical potential change
due to unit pH change, which theoretically should in ac-
cordance with Nernstian equation (59mV/pH). However due
to the double layer model of the sensing surface, which
describe the exchange and bond of ions between the solid-
liquid junction and diffusion of ion in the electrolyte [3], the
sensitivity is reduced to sub-Nernstian.
In the CMOS process, the passivation layer has an unstable
quality and the floating metal stack is susceptible to trapped
charge. These properties result in a non-ideal characteristic,
such as threshold variation, drift and noise. In [6], the threshold
variation was shifted by UV illumination, which removed
trapped charge in either the surface insulator or the floating
layer. In [5], the ISFET drift was described as a dispersive
effect due to surface passivation change, and analytical method
to cancel this drift was provided.
In [7], a PG-ISFET was introduced that has ability to cancel
effect of trapped charge by adding an extra capacitor to the
floating gate to scale down the voltage. However, the total pH
sensitivity is scaled down due to capacitance divider ratio.
In [8], a auto offset cancelation circuity was developed to
compensate offset in one PG(programmabel gate) with large
capacitance and readout the chemical signal via the other PG
with small capacitance. Thus by including both evaluation and
sense nodes and grouping constant terms in κ, the floating gate
voltage of the metal stack become:
Cpass Cs QT C Ce
VF G = Vchem + Vo + + Ve + κ
CT CT CT CT
where QT C models the trapped charge, Cpass is the capac-
itance of passivation layer; CT is the total capacitance of
the floating gate note; Cs is the sensing capacitor; Ce is the
evaluation capacitor; Ve is the voltage applied at Ce and Vo
is the voltage applied at Cs ; The pH sensitivity of the entire
device becomes:
kT Cpass
S = 2.3 α .pH (3)
q Co
where α represent double layer model.
Assuming the ISFET operating in the saturation region,
similar to the MOSFET, the drain current is defined as:

k W
(VF G − VS − Vth )2 (1 + λVDS )
ID = (4)
2 L
In order to have the voltage output, we can fix five of six
variables: VG , VS , VD , Ve and ID , and tracking the remaining
voltage change due to chemical potential variation. In [8],
after the offset was compensated by the evaluation node, the
current and drain source voltage were fixed by source drain
follower configuration [9], and the chemical potential change
are counterbalanced by the readout node voltage, which is
feedback controlled by tracking the source voltage change.
However, this circuit did not utilize entire duty cycle, and a
large passive component was needed to reduce leakage effect.
Furthermore, in order to handle the fast operation frequency,
high gain and high speed opamps were adopted, making the
circuit more complex with low hardware efficiency.
III. R EADOUT CIRCUITRY WITH PINGPONG CONTROL
Fig. 1 shows the entire structure of proposed scheme. A
pair of two ISFETs, will readout and compensate at different
(2) phases: in Φ1 , offset in ISFET1, Vof f set1 will be sensed and
compensated for by cancelation circuit, while ISFET2 will
track the chemical signal, pH value, and readout simultane-
ously, in Φ2 the ISFET2 will counterbalance the offset and
ISFET1 will readout the chemical change. A pingpong control

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 TABLE I
Clk
D ESIGN TARGET SPECIFICATION
Reset Term Values
Technology AMS 0.35 μm CMOS 2P3M
ISFET1
evaluation Supply voltage 3.3V
φ1
Entire readout size 650 μm× 500 μm
ISFET 2 φ2 Single readout size 120 μm× 120 μm
evaluation
Storage capacitor 0.1pF
ISFET1 Sense area 30 μm× 100 μm
sensing Vt compensation range ±5 V
ISFET 2
External clock frequency 200 KHz - 1MHz
sensing Biasing current for ISFET Adjustable with weak inversion ability
ISFET readout pairs 4
ISFET1
Output φ4

ISFET 2
φ3
Output
Total output
Fig. 3. A typical operation procedure with pingpong control
scheme [10] is used to operate these two readouts, and realize
continuous monitoring.
The biasing of ISFET is provided by two transistor and
current source, called [H + ] cell [11]. The VD of ISFET
was fixed due to a feedback loop consisting two transistors.
Thereby gate voltage change due to ion concentration change
will modulate the drain current of ISFET, and hence the VG of
biasing transistor will be modulated to give the output. Fig. 2
shows the entire circuit and a pair of PG-ISFETs. The current
of ISFET I1 and PMOS P4 is given by: For strong inversion:

k W1
ID = − (VF G − Vth − VS1 )2 (1 − λVDS1 )
2 L1

k W5
=− (VG5 − VD1 − Vth )2 (1 − λVDS5 )
2 L5
Thus any ion concentration change will vary the chemical
potential, and consequently change drain current depending
the inversion regions the two transistors are biased. Since VD1
and VS5 are fixed by the feedback through P3 and P5, the
feedback amplifier will sense the voltage difference between
VG5 and Vref , and control the evaluation node or the sensing
node to compensate trapped charge effect or chemical potential
change.
IV. O PERATION AND CIRCUIT IMPLEMENTATION
Depending on the operation principle of this circuit, Id of
I1, VD1 and VS1 will be fixed to a constant value biasing
the transistor into designated region. The feedback signal will
control the evaluation node to cancel the offset and the sensing
node to readout while keeping the floating gate of metal stack.
In order to operate these configuration, we need a control
scheme and switches to make both of ISFET programmable
gates working in different time. Thus the entire measurement
for a single sensor will be divided into two major phases,
the evaluation phase and sensing phase. In the evaluation
phase, the offset due to trapped charge or modified surface
condition will be sensed and compensated for; in sensing part,
the chemical potential will be tracked and readout through the
sensing node.
In order to make the measurement continuous and unitize
100 % duty cycle, a pair of ISFETs will operate in different
phasesΦ1 and Φ2, and the switches will decide which ISFET
output will be chosen. The operation procedure is as follows:
after reset is low, in φ1 : evaluation node of ISFET1 will be
connected to the feedback loop and compensate the offset by
feedback voltage VF B , according to Eq. (7); in φ2 : the sensing
node of ISFET2 will be set to a reference level Voref , which is
mid-level of supply voltage to enable upward and downward
sensing; in φ3 , while ISFET1 is evaluating the offset, ISFET 2
will track the chemical signal via the sensing node, however,
since the offset has not been compensated, the output might
hit the limit of supply voltage; in φ4 , the correct chemical
signal will be available form ISFET1, whose offset and signal
change has been compensated in previous stage Eq. (8), and
at the same time the ISFET2 is in evaluation phase; These
(5) phases will perform alternatively and continuously.
φ1 : VE = (k + Voref CS + Vchem Cpass )/CE + QT C /CE
(6)         
Constant Compressed Compensation
(7)
φ4 : Vo = (k + QT C + VE CE )/CS + Vchem Cpass /CS (8)
     
Compensated and Constant Sensing
where 
−ID L
k = VG Cpass − − Vth − VS
k W
Therefore measurements are executed continuously when
the reset signal is low. In all, one ISFET will measure the
ion concentration change, while the other will track the offset
due to trapped charge or crackdown of passivation and signal
swing, and compress these signals into the storage capacitor.
The output of each ISFETs will be selected during different
phases, and reconstructed by external data processing. Hereby,
the differential pH change is monitored rather than the absolute
value, and the dynamic range and sensitivity of input signal
is enhanced.
Since the two ISFET working alternatively, the signal loss
due to leakage of the storage capacitor is negligible. Hereby,
the passive components size can be dramatically reduced,
moreover, the signal can be driven in arbitrary clock frequency

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 4.0
Vout1
1 2 Current and
voltage Control circuit
source

−.5
3.5
3.0
Single
Sense2

2.5 1 2
2.0 readout
1.5 Output stage pair
1.0
.5
0.0 Entire readout circuit
1.55

1.5
Fig. 5. Circuit layout measuring 650μm × 850μm in AMS 0.35μmCMOS
Vout2

1.45
1 2
1.4

1.35
1.53
of 100mV/pH. Although there are a lot of spikes due to switch,
1.5

1.48 the clean signal can be obtained by low pass the output.
Vout

1.45
1.43
The layout of the readout is shown in Fig. 5, and the array
1.4
of PG-ISFET can be found in Fig. 1. Four readout pairs and
1.78
eight PG-ISFETs were used to construct a linear array.
Vout Normalized

1
1.71
1.64

1.57
VI. C ONCLUSION
1.5 ΔVout ≈ 400mV This paper proposed a novel readout for CMOS ISFET
1.43
1.36 interface. Using PG-ISFET with two external capacitively
1.29

10
coupled terminals, the readout can cancel out the chemical
9.0

8.0
offset due to trapped charge or the drift and amplify pH
ΔpH = 4 signal. Moreover, the pingpong control scheme operate the
pH

7.0
6.0
5.0
4.0
0 .250 .500
Time(ms )
Fig. 4. pH change response, Vout1 , Vout2 , Vout and control signals Sense2.
and relax the opamp requirement. In this circuit, we designed
a opamp with folded cascode structure, with amplification of
63dB, GBW(gain bandwidt)h of 16.8MHz, phase margin of
72o and slew rate of 9.7V/μs.
V. S IMULATION AND DISCUSSION
The circuit has been designed and fabricated in AMS
0.35μm according to the specifications shown in Table I. It
can compensate for offsets caused by trapped charge in the
range of ±5V .
Simulation results are shown in Fig. 4. The offset are
modelled using DC voltage −5V and pH change are modeled
using sinusoid wave with amplitude of 100mV, corresponding
to pH change amplitude of 2, ranging from 7 to 9 then to 5
[2]. The sensitivity enhancement was set by adjusting the ratio
of Cpass /Cs , giving a pH sensitivity of 100mV/pH.
In Fig. 4, we can see that after reset is clear, In φ1,the
ISFET1 will sense the chemical change, however, due to large
offset out of range 3.3V, the output signal hit the limit of
supply voltage, at the same time the ISFET2 evaluated the
offset, compressed and stored in Cstore ; In φ2, chemical
change is tracked and amplified through sensing node of
ISFET2, within a range around mid-level of supply voltage.
The total output voltage is a mixture of Vout1 and Vout2 . The
signal was reconstructed by summing up all the differential
signal. Simulation results showed that it has a pH sensitivity
feedback systems alternatively, hereby implement continuous
.750 1.0
measurement with low hardware requirement. This circuit was
fabricated in AMS 0.35μm technology, providing an efficient
solution for large CMOS based chemical sensor arrays.
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