School of Electrical Engineering, Electronics Engineering, and Computer

Engineering

Laboratory Experiment Report Rubric

NAME OF STUDENT: DATE SUBMITTED:

Kim Andrew Soliman October 8,2021

EXPERIMENT TITLE EVALUATOR:

DC and AC Analysis of a Common Emitter Amplifier ENGR. ERNESTO M.
VERGARA JR.
 Poor Fair Good Very Good Excellent
Criteria Score
(1) (2) (3) (4) (5)
A. Completeness The laboratory report The laboratory report is The laboratory report is The laboratory report is The laboratory report is
is untidy, did not follow untidy, followed the neat, followed the neat, followed the very neat, well
and organization the given format, given format, some given format, some given format, no presented, followed
of the Experiment some parts are parts are missing, parts are missing, missing parts, and the given format,
Laboratory missing, most most questions are not mostly questions are only a few questions organized, and the
Report questions are not answered. not answered. are not answered. required content is
answered. complete.

The result, gathered The result is correct, The result and The result and The result, gathered
data, and answers to however, gathered gathered data were gathered data were all data, and answers to
questions were all data, and answers to correct, however, correct, and most of questions are all
incorrect. If data questions were all answers to questions the answers to correct. If data sheets
sheets are required incorrect. If data were all incorrect. If questions are all are required
B. Correctness of in the experiment, sheets are required in the experiment,
data sheets are correct. If data sheets
the gathered data they are not used. in the experiment, required in the are required data sheets are
and answers to data sheets are experiment, data in the experiment, fully consulted
questions. used but wrong data sheets are consulted data sheets are and correct
are used in the but some of the data consulted but with few data are used in the
computation or wrong tabulation or

tabulated. used are wrong. data used in the computation.

computation or
tabulation.

The interpretation of The interpretation of The interpretation of The interpretation of The interpretation of
data and discussion data and discussion data and discussion data and discussion data and discussion
were not based on the were based on the were based on the were based on the were based on the
C result and data result and data result and data result and data result and data

. Interpretation of
data and

discussion gathered during the gathered during the gathered during the gathered during the gathered during the
experiment. experiment, but does experiment, and experiment, and experiment and are

not present clarity. somehow presents mostly presents clarity. presented very clearly.
clarity.

The conclusion was The conclusion was The conclusion was The conclusion was The conclusion was
not based on the based on the based on the based on the objectives based on the
objectives and all objectives but not all objectives and few of and most of objectives and all of
D. Conclusion
ideas are not coherent of the ideas are the ideas are coherent the ideas are coherent the ideas are coherent
or clear. coherent nor clear. but not too clear. and clear. and presented very
clearly.

The words used were The words used were The words used were The words used were The words used were
not appropriate, had somehow appropriate, appropriate, had good appropriate, had very appropriate, had
poor grammar, had bad had good grammar, grammar, had good good grammar, had very excellent grammar,
sentence had good sentence sentence construction good sentence had excellent
E. Use of Language
construction and ideas construction and not and few of the ideas construction and sentence construction
were not clearly all ideas were clearly were clearly almost all of the ideas and all of the ideas
expressed. expressed. expressed. were clearly were clearly
expressed. expressed.
 The laboratory report The laboratory report The laboratory report The laboratory report The laboratory report
was submitted two or was submitted one was submitted three to was submitted beyond was submitted on
F. Promptness
more weeks late. week late. six days late the time assigned to time.
two days late.

AVERAGE: (A+B+C+D+E+F)/6
 DC and AC Analysis of a Common Emitter
Amplifier
Course – Section : _ ECE20L-2 – E05

Group Number :

Group Members : SOLIMAN, KIM ANDREW

Date : October 8,2021

Grade :

Remarks :

Course Instructor : Engr. Ernesto Vergara JR.

Figure 1. Common Emitter with Bypass Capacitor
Figure 2. Common Emitter without Bypass Capacitor
Figure 3. Common Emitter with Bypass Capacitor and Load resistor (R5)
Figure 4. Common Emitter with load resistor (R5) and without Bypass Capacitor
Answer the following and include it in your written report. (Use MAT-02 transistor)

1. Run a DC simulation in LTSPICE using Figure 1 circuit. Measure the following

operating voltages:

Collector voltage (VC) = 9.14189

Base voltage (VB) = 2.34036
Emitter voltage (VE) = 1.76112

Collector current (IC) = 0.00292906

Base current (IB) = 6.14775e-006
Emitter current (IE) = -0.0029352

Based on the measured DC voltages, answer the following questions. Briefly explain
your every answer.
1.1. How much is the voltage across the base-emitter junction (VBE) of the transistor?
How is the base-emitter junction of the transistor biased?
The voltage is 0.57924V, and since the base voltage is higher than the producer voltage,
this shows that the base-producer is forward-one-sided
1.2. How much is the voltage across the base-collector junction (VBC) of the transistor?
How is the base-collector junction of the transistor biased?
The voltage is 6.80153, and since the collector voltage is greater than the base voltage,
this indicates that the base-collector junction is forward biased

1.3. Based on the conditions of BE and BC junctions, what is the operating condition of
the transistor? What is the impact of this condition to the amplifying action of the
transistor?
The BE intersection and the BC intersection are forward one-sided, which implies that
the semiconductor is in the immersion state

2. Run the transient simulations in LTSPICE using Figure 1 to Figure 4 and place their
respective output waveforms in the space provided below each circuit / Figure #.
Use .tran 0 1m 0. Fill out Table 1 using the 4 circuits that you have simulated.

Table 1. AC Output of a Common Emitter Amplifer

Figure No. Vin Vou Input Output Freq. Voltage Gain

t Freq.
0.00199997 0.413191 9999.2 10000.1 206.599
1
0.00199749 0.00653099 9999.79 N/A 3.2696
2
0.00199997 0.298529 9999.2 9999.77 149.267
3
0.00199969 0.00465881 10001.5 N/A 2.32977
4
3. Aside from the voltage divider bias, enumerate and draw the other biasing
techniques used to bias a bipolar junction transistor.
a. Fixed Base Biasing a Transistor
The circuit shown is called a "fixed base bias circuit" because the base
current IB of the transistor remains constant for given values of Vcc.
Therefore, the operating point of the transistor must also remain fixed.
This bias network of two resistors is used to establish the initial operating
range of the transistor using a fixed current bias.
b. Collector Feedback Biasing a Transistor
This self-biasing collector feedback configuration is another beta-
dependent biasing method that requires two resistors to provide the
required DC bias for the transistor.
The feedback configuration of the collector-base ensures that the
transistor is always biased in the active region regardless of the value of
Beta (β). The DC base bias is derived from the collector voltage VC,
which provides good stability.
c. Dual Feedback Transistor Biasing
Adding an additional resistor to the base bias network of the above
setup further improves stability with respect to variations in beta (β) by
increasing the current flowing through the base bias resistors.
 d. Transistor Biasing with Emitter Feedback
This type of transistor bias configuration, often referred to as self-
emitter bias, uses feedback from both the emitter and the base collector
to further stabilize the collector current. This is because resistors RB1 and
RE, as well as the base-emitter junction of the transistor, are all
effectively connected in series with the supply voltage VCC.

4. Discuss thoroughly the effect of the bypass capacitor as well as the load resistor
with respect to the output of the given circuit. Analyze the data that you have
gathered from table 1 and discuss it.

On the off chance that the bypass capacitor is eliminated, the voltage won't increment,
expanding voltage. On the off chance that the bypass capacitor is available, the voltage
rises, in this manner a higher voltage rise. In case there is a load resistance, the output
voltage comes around about half.
 Interpretation of Data

For area 1 in this preliminary, the voltage commitments of figures 1,2,3, and
4 contacts the upper and lower line subsequently have a more lengthy out voltage
range (occurring to a higher voltage examining). Interestingly, the voltage yields of
figures 1 to 4 don't contact the upper, and as far as possible/line as needs be has a
more restricted voltage range (happening to a lower voltage scrutinizing).

For area 2 number 1, I got the characteristics to get the potential gains of
Collector Voltage, Base Voltage, Emitter Voltage, Collector Current, Base Current,
in the wake of doing the circuits through getting the SPICE ERROR LOG. After
which, I figured for the V(BC) and V(CE) independently. To get the V(BC), I
deducted the value of Collector Voltage from the Base Voltage esteem. For the
V(CE), I eliminated the expense of the Emitter Voltage from the Collector Voltage to
procure the result.

For area 2, number 2, I finished the table off from the characteristics I got in
the SPICE ERROR LOG, which are the Input Voltage, Output Voltage, Input
Frequency, Output Frequency, and Voltage Gain independently.

For area 2, number 3, I have researched that there are four unique systems
other than the Voltage Divider Bias techniques. These are the Fixed Base Biasing
A Transistor, Collector Feedback Biasing A Transistor, Dual Feedback Transistor
Biasing, Transistor Biasing With Emitter Feedback.

For area 2, number 4, I have seen that the load resistor and evade capacitor
being accessible and missing in circuits independently per situation adds to
different results.
Conclusion

All in all, I can infer that the voltage acquire is high when sidestep capacitors
are essential for the circuits. At the point when later eliminated, the voltage acquire
is insignificant. I likewise tracked down that the yield recurrence won't be perused in
case there is no detour capacitor. For load opposition, if present in the circuit, the
voltage yield is split.

Along these lines, in case Vbase is more prominent than the producer voltage,
the base-producer will be forward one-sided. At the point when the authority
voltage is higher than the base voltage, the base-gatherer intersection is ahead
one-sided. Also that intersections BC and BE are forward one-sided, which implies
that the semiconductor is immersed.

References

https://resources.pcb.cadence.com/blog/2020-bjt-amplifiers-common-emitters-and-dc-analysis
https://www.electronics-tutorials.ws/amplifier/transistor-biasing.html
https://studylib.net/doc/18086895/ac-analysis-of-a-common-emitter-amplifier
https://www.elprocus.com/common-emitter-amplifier-circuit-working/
Results with selfie

Figure #1

Figure #2
Figure #3

Figure #4

• Do not forget to attach the 4 LTspice files that you

have simulated. Take a picture of yourself showing
the results of your simulations and include it in your
written report. Strictly follow the requirements.
Points will be significantly deducted for non-
compliance.