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8-1
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THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D Table of Contents D
PEBBLE
Page. 1 COVER
Page. 2~7 INFORMATION
Page. 8 CLOCK GENERATOR (CK-505M)
g
Page. 9 THERMAL SENSOR
Page. 10~11 DIAMONDVILLE (N270)
un al
Page. 12~15 CALISTOGA (INTEL945GSE)
Page. 16~19 ICH7-M
CPU : INTEL DIAMONDVILLE Page. 20 BIOS CODE
Page. 21 DDR2 SODIMM
Chip Set : INTEL 945GSE Page. 22 GRAPHIC I/F
ms nti
Page. 23~26 AUDIO
C Remarks : Page. 27 LAN C
Page. 28 SATA HDD
Page. 29 MINI-CARD (Wireless/HSDPA
Page. 30~31 USB
Model Name : PEBBLE Page. 32 MMC
Sa de
Page. 33~34 MICOM & GLUE LOGIC
- This Document can not be used without Samsung's authorization -

PCB Part No : BA41-01066A (GCE)


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

Page. 35 LED-Switch
BA41-01067A (NY) Page. 36~42 POWER
8. Block Diagram and Schematic

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Page. 43 SUB-BOARD (SIM CARD)
BA41-XXXXXX (HS) Page. 44 MOUNT HOLE
Page. 45 Test Points
Dev. Step : PV
Revision : 0.3
Co
B B
T.R. Date : 2009.02.12
DRAW CHECK APPROVAL
A A A
SAMSUNG
ELECTRONICS

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4 3 2 1

N310
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
OPERATION BLOCK DIAGRAM
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
437 uFCBGA Type
THERMAL
CPU MONITOR
CLOCK DIAMONDVILLE
CPU2_THERMDA/DC EMC2102
GENERATOR TFT_LCD Page8(block)
Page11~12
CK-505 8.9"/10.2" WIDE
g
Page26
Page8(block)
533MHz FSB
LVDS 998 uFCBGA Type
option
un al
VGA P3 Bluetooth
GMCH 533 MHz
200P
DDR2-SODIMM
Module
CRT MAX 1 GB
Page8(block) 945GSE Page9(block)
P0 USB (1):debug port
ms nti
Page 13~16
P4
C USB (2) C
P5
652 FCBGA Type
USB (3)
HDD SATA P7
Sa de
1.3M Camera
2.5inch
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

ICH USB2.0 P1
ICH7-M CardBus
8. Block Diagram and Schematic

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3in1 B’d
AU6371
82801 GBM
Page 17~20 P2
MINI CARD1
HDAUDIO PCI_ EXP PCI_ EXP1
High Definition Audio Wireless LAN
Co
Page9(block)
B Aud. Audio SPI B
AMP
ALC272 RTC P6
Batt. PCI_ EXP2
MINI CARD2
Page 22~25 option HSDPA/Wibro
SIMM Card
SPI ROM
Page9(block)
2P
Page 21
HP Page
PCI_ EXP3

RJ45
MIC-IN 2P 2P Power S/W LAN CONTROLLER LAN
LPC 88E8040 Transformer
MICOM SYNAPTICS
SPKR R
H8S-2110B P/S2 TOUCHPAD
A SPKR L A
Space bar
SAMSUNG
ELECTRONICS
KEYBOARD

8-2
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8-3
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SAMSUNG PROPRIETARY
BOARD INFORMATION
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION D
PCI Devices
Voltage Rails
Devices IDSEL# REQ/GNT# Interrupts
Power Rail Descriptions
PRTC_BAT 3.3V (can drop to 2.0V min. in G3 state) supply for the RTC well.
g
USB AD29(internal) VDC Primary DC system power supply (9 to 19V)
Hub to PCI AD30(internal) P1.05V(VCCP) VTT for CPU, Calistoga & ICH7-M
LPC Bridge/IDE/AC97/SMBUS AD31(internal) Programable P3.3V_MICOM 3.3V always power rail(for Micom)
Internal MAC AD24(internal) P1.5V 1.5V switched power rail (off in S3-S5)
P1.8V_AUX 1.8V power rail for DDR (off in S4-S5)
un al
P0.9V 0.9V power rail for DDR (off in S4-S5)
P5V_AUX 5.0V power rail (off in S4-S5)
P3.3V_AUX 3.3V power rail (off in S4-S5)
P5V 5.0V switched power rail (off in S3-S5)
P3.3V 3.3V switched power rail (off in S3-S5)
CPU_CORE Core voltage for Atom CPU
I2C / SMB Address
ms nti
Devices Address Hex Bus
ICH7M Master SMBUS Master
C CK-505M (Clock Generator) 1101 001X D2h Clock, Unused Clock Output Disable
C
SODIMM0 1010 000X A0h -
CPU Thermal Sensor 0111 101X 7Ah Thermal Sensor
Sa de
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

USB PORT Assign


8. Block Diagram and Schematic

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Port Number ASSIGNED TO Port Number ASSIGNED TO
0 USB PORT 4 USB PORT
UHCI_0 UHCI_2
1 3-IN-1 5 USB PORT
2 Wireless LAN 6 HSDPA
UHCI_1 3 BLUETOOTH UHCI_3 7 CAMERA
Co
B B
PCI Express Assign
Port Number ASSIGNED TO
1 Mini Card 1(Wireless LAN)
2 Mini Card 2 (HSDPA/Wibro)
3 LOM
A A
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ELECTRONICS

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THIS DOCUMENT CONTAINS CONFIDENTIAL
POWER DIAGRAM
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. Rev 0.1
D
KBC3_SUSPWR KBC3_PWRON D
(CHP3_S4_STATE*) (CHP3_SLPS3*) VCCP3_PWRGD
AC Adapter DIAMONDVILLE
P1.05V CALISTOGA CPU_CORE DIAMONDVILLE
ICH7-M
g
Battery DC VDC
un al
P1.8V_AUX SODIMM (DDR III)
CALISTOGA
DDR II-Termination
P0.9V
ms nti
C C
ICH7-M HDD
USB M_PCI
P3.3V_MICOM P5.0V CRT FAN CIRCUIT
P5V_AUX MICOM AUX DISPLAY
MICOM
Sa de
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

8. Block Diagram and Schematic

CRESTLINE
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P1.5V ICH8-M
P3.3V_AUX
ICH7-M LAN
MDC BT Thermal Sensor MICOM
Co
ICH7-M SODIMM
B P5.0V_ALW P3.3V SPI PCMCIA B
LCD LEDs
M_PCI
ICH7-M
P1.2V_LAN P2.5V
P12.0V_ALW
LAN
Power On/Off Table by S-state P1.8V_LAN
Rail P2.5V_LAN
State S0 S3 S4 S5 LAN
+V*A(LWS)
ON ON ON ON
+V*LAN ON ON S5-S4 S3 S0
+1.8V_AUX ON ON
+0.9V
A +V*AUX
A
ON ON
+V ON
SAMSUNG
ELECTRONICS
+V* (CORE) ON

8-4
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8-5
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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
POWER RAILS ANALYSIS
EXCEPT AS AUTHORIZED BY SAMSUNG.
220V
Rev. 0.6 (060920)
D D
Adapter Battery
5.0V_AUX ( TBD A )
3.3V_AUX ( TBD A )

MICOM 3V ( TBD A )
g
1.05V
0.1 A (TBD) ITP
un al
CPU CORE MICOM 3V
CPU CORE ( TBD A )
1.05V (VCCP)
2.2 A Diamondville 3.3V
0.75 A (TBD)
Thermal
3.3V
0.08 A (TBD)
0.08 A (TBD)
KBC
1.05V ( TBD A ) 2.5 A Sensor
1.5V ( TBD A )
1.5V
0.13 A ( 2.5 W )
2.5V ( TBD A )
3.3V ( TBD A ) MICOM 3V
5.0V ( TBD A )
0.1 A (TBD) PWR LED
1.05V (MCH CORE)
1.8V_AUX ( TBD A ) 3.72 A
ms nti
2.5V
0.9V( TBD A )
1.5V
0.14 A Calistoga
0.78 A
GMCH 3.3V
0.25 A (TBD) CLOCK
VGA CORE (TBD A)
VDC INV ( TBD A )

C 3.3V 0.16 A C
1.8V_AUX (4 W )
PEX IO (TBD A)

RTC_Battery

3.3V
0.2 A (TBD) KeyBoard 3.3V_AUX
0.6 A (TBD) LAN
1.05V
1.5V 0.95 A
Sa de
3.3V
1.6A
0.421 A
ICH7-M 3.3V 0.01 A (TBD) KBD LED 3.3V_AUX
- This Document can not be used without Samsung's authorization -

SD Card
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

3.3V_AUX 0.1 A (TBD)


0.209 A (TBD)
5V
5V_AUX 0.001 A (TBD)
0.001 A (TBD) ( 1.5 W )
RTC_Battery 3.3V SPI
8. Block Diagram and Schematic

0.006 A (TBD) 0.015 A (TBD)


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1.8V_AUX 1.5A
3.3V
5V
0.06 A (TBD)
0.07 A (TBD)
HD Audio 3.3V
1.5 A (TBD)
3.3V_AUX
1.5V
0.5 A (TBD) Mini Card X 2
0.75A (TBD)
Co
1.8V_AUX
B 0.9V
3.1 A (TBD) DDR-2 5V
0.22 A (TBD) SATA HDD B
1 A (TBD)
( ~ 5.0 W )
5V
0.16 A (TBD) FAN
3.3V (LCD 3V)
P5.0V_LED (VDC INV)
0.35 A LCD 5V
1.5 A (TBD) Audio AMP
0.6 A
P3.3V_AUX 5V
0.08 A (TBD) 2 A (TBD) USB (x 3)
P1.2V_LAN
P1.8V/2.5V_LAN
0.29 A (TBD) LAN (88E8057)
0.15 A (TBD)
5V 0.2 A (TBD) Touch Pad
A A
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ELECTRONICS

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THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
POWER SEQUENCE BLOCK DIAGRAM
EXCEPT AS AUTHORIZED BY SAMSUNG.
PAGE 18
CLOCK 18-0) VRM3_CPU_PWRGD
1-0) PRTC_BAT RTC
Battery CHIP PAGE 6
D D
19-0) VRM3_CPU_PWRGD
2-1) MICOM_P3V 2-0) VDC
P5V_AUX & P3V_AUX VDC
4-0) KBC3_SUSPWR 11.1V
POWER
4-2) P3.3_AUX
TPS51120 Battery Mode
1-1) CHP3_RTCRST 15-0) KBC3_VRON 18-0) VRM3_CPU_PWRGD
(1) 5-0) AUX5_PWRGD
S/W 16-0) VCCP_PWRGD
CPU VRM
17-1) VCC_CORE
g
PAGE 39
PAGE 44
SC454
un al
PAGE 43
20-0) KBC3_CPUPWRGD_D
3-0) KBC3_CHKPWRSW*

19-0) VRM3_CPU_PWRGD VRMPWRGD 25-0) INIT# 25-0) INIT#


24-0) A20M#/IGNNE#/INTR/NMI 24-0) A20M#/IGNNE#/INTR/NMI
LAN_RESET*
22-0) PLT3_RST* 21-0) CPU1_PWRGDCPU 21-0) CPU1_PWRGDCPU CPU
23-0) KBC3_CPURST* 22-0) PLT3_RST* 14-2) P1.5V
ms nti
RCIN* 26-0) CPU BIST
12-1) CHP3_SLPS5*/S3* 15-2) VCCP
C 12-0) KBC3_PWRBTN*
ICH7-M C

23-0) CPU1_CPURST*
KBC 8-1) P3.3V_AUX 14-1) P3.3V
15-1) P2.5V 15-1) P2.5V
15-0) KBC3_PWRON 14-2) P1.5V 14-2) P1.5V
Sa de
23-0) PLT3_RST*
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

15-0) KBC3_VRON
GMCH
8. Block Diagram and Schematic

8-3) P1.5V 14-3) P0.9V


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P1.5V_AUX & VCCP
PAGE 26
Thermal 15-2) VCCP 15-2) VCCP
Monitor SC415 16-0) VCCP_PWRGD
PAGE 9
PAGE 41
P5V_AUX & P3V_AUX
4-0) KBC3_SUSPWR 5-1)P5V_AUX
4-1) P3.3V_LAN TPS51120 2-1) P5.0V_ALW
DDR2 POWER 8-2) P1.8V_AUX 8-2) P1.8V_AUX
DDR2
Co
(2) SC486
13-1) P0.9V 14-3) P0.9V
B
PAGE 40
13-1) MEM_VREF 13-1) MEM_VREF Memory B
PAGE 40
22-0) PLT3_RST#
6-1) P5V_AUX 14-2) P3.3V MINI PCIE
14-1)P5V
14-0) KBC3_PWRON SI3433 14-2) P1.5V Devices
PAGE 44
4-1) P3.3V_AUX 5-1) P3.3V_AUX
14-2) P3.3V
14-0) KBC3_PWRON SI3433 14-1)P5V AUDIO
PAGE 44
4-3) P1.2V_LAN
BCP69-16
5-1) P3.3V_AUX AMP
88E8057 PAGE 28 15-0) KBC3_PWRON
MIC5219 15-1) P2.5V
GIGABIT TRANSFORMER 15-2) 1.5V_PWRGD
LFE9261 PAGE 44
14-2) P5.0V
PAGE 27 4-2) P1.8V_P2.5V_LAN
PAGE 29 HDD
A A
SAMSUNG
ELECTRONICS

8-6
4 3 2 1
8-7
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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
CLOCK DISTRIBUTION
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CLK0_HCLK0
CPU
1205-002574

D CLK0_HCLK0# D
133 MHz
CLK0_HCLK1
CLK1_MCLK0/0#
133 MHz CLK0_HCLK1#
CLK1_MCH3GPLL CLK1_MCLK1/1# SODIMM
g
133 MHz CLK1_MCH3GPLL#
CLK1_DREFSSCLK GMCH 533 MHz
133 MHz CLK1_DREFSSCLK#
un al
CLK1_DREFCLK
96 MHz CLK1_DREFCLK#
CLK1_PCIEICH
ms nti
CLOCK GENERATOR

HDA3_AUD_BCLK
133 MHz CLK1_PCIEICH# AUDIO CODEC
C
12.288 MHz C
33 MHz CLK3_PCLKICH
IDTCV179BNLG

14.318 MHz CLK3_ICH14


ICH
RTC Clock
CLK3_SMBCLK SMB3_CLK 32.786KHz
Sa de
CLK3_USB48 RTC Clock
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

12 MHz AU6371
CK-505M

CLK1_SATA
100 MHz CLK1_SATA#
8. Block Diagram and Schematic

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CLK1_MINIPCIE
100 MHz CLK1_MINIPCIE# MINI PCIE(WLAN)
CLK1_MIN3PCIE
100 MHz CLK1_MIN3PCIE#
MINI PCIE(HSDPA)
Co
B B
33 MHz CLK3_PCLKMICOM KBC5_TCLK TOUCHPAD
KBC
32.768KHz KBC3_SMCLK
BATTERY
100 MHz CLK1_PCIELOM
100 MHz CLK1_PCIELOM# 88E8057
33 MHz CLK3_PCLKCB CARDBUS
CONTROLLER
A A
33 MHz CLK3_PCLKMIN
MINIPCI
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ELECTRONICS

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THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS P3.3V P1.5V
EXCEPT AS AUTHORIZED BY SAMSUNG.
P3.3V
B10
B504
B506 BLM18PG181SN1
BLM18PG181SN1 BLM18PG181SN1
D FSA FSB FSC VDD_SRC_IO VDD_CPU_IO VDD_PLL3_IO VDD_IO VDD_REF VDD_48 VDD_PCI VDD_PLL3 VDD_SRC VDD_CPU D
HOST CLK nostuff
BSEL0 BSEL1 BSEL2
10V

10V

10V

10V

10V

10V

10V

10V

10V

10V

10V

10V
0 0 0 266 MHz

4700nF-X7R

4700nF-X7R
6.3V
10000nF

10000nF

10000nF

10000nF

0 0 1 333 MHz
6.3V

6.3V

6.3V

6.3V
6.3V
100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF
0 1 0 200 MHz
0 1 1 400 MHz
C94

C586

C93

C112

C67

C64

C585

C550

C584

C65

C66

C92
C611
C113

C68

C553

C63

C111
1 0 0 133 MHz
g
1 0 1 100 MHz CLK3_VDD_SRC_IO_MN CLK3_VDD_REF_MN
1 1 0 166 MHz
1 1 1 RSVD
un al
For EMI P3.3V
C551
0.012nF
50V
1%

1%

U9
nostuff IDTCV179BNLG
nostuff
10K

10K

19 4
ms nti
VDD_IO VDD_REF
33 16
VDD_SRC_IO1 VDD_48
43 9
VDD_SRC_IO2 VDD_PCI
R113 33 1% 52 23
CLK3_FM48 56
VDD_SRC_IO3 VDD_PLL3
R139

R137
C CLK3_USB48 R547 33 1% 27
VDD_CPU_IO
46
C
VDD_PLL3_IO VDD_SRC
R112 2.2K 62
CLK1_BSEL0 55
VDD_CPU
CLK1_BSEL1 R587 10K 1%
NC
61
CLK1_BSEL2 CLK3_48MHZ_R 17
CPU0
60
CLK0_HCLK0
USB_FS_A CPU0# CLK0_HCLK0#
R586 33 1% 64
CLK3_ICH14 5
FSB_TESTMODE
58
REF_FS_C_TEST_SEL CPU1_MCH CLK0_HCLK1
Sa de
CLK3_14MHZ_R 57
44
CPU1_MCH# CLK0_HCLK1#
CHP3_CPUSTP# CPUSTOP#
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

45 40
CHP3_PCISTP# PCISTOP# SRC11_CLKREQH#
39
63
SRC11#_CLKREQG# LOM3_CLKREQ#
VRM3_CPU_PWRGD CLKPWRGD_PWRDN#
41
CLK3_PCIF_R SRC10
R584
8. Block Diagram and Schematic

22 5% 14 42
CLK3_PCLKICH PCIF_5_ITP_EN SRC10#
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R585 22 5% CLK3_PCI4_R 13 37
CLK3_DBGLPC PCI_4_SEL_LCDCLK# SRC9
38
CLK1_PCIELOM
12
SRC9# CLK1_PCIELOM#
PCI_3
54
SRC8_ITP CLK1_MINI3PCIE
R583 22 5% CLK3_PCI2_R 11 53
CLK3_PCLKMICOM PCI_2 SRC8#_ITP# CLK1_MINI3PCIE#
R135 475 1% MCH3_CLKREQ#_R_MN 10 51
MCH3_CLKREQ# PCI_1_CLKREQ_B# SRC7_CLKREQF#
50 EXP3_CLKREQ#
SRC7#_CLKREQE# MIN3_CLKREQ#
R136 475 1% 8
CHP3_SATACLKREQ#_R_MN
CHP3_SATACLKREQ# PCI_0_CLKREQ_A#
48
7
SRC6
47
CLK1_MINIPCIE
SMB3_CLK_S 6
SCL SRC6# CLK1_MINIPCIE#
Co
SMB3_DATA_S SDA
34
B 3
SRC4
35
CLK1_MCH3GPLL B
CLK3_XTAL_IN_14_MN XTAL_IN SRC4# CLK1_MCH3GPLL#
CLK3_XTAL_OUT_14_MN 2
XTAL_OUT
31

1%
1%
SRC3_CLKREQC# CLK1_PCIEICH

50V

50V

50V
18 32
59
VSS_48 SRC3#_CLKREQD# CLK1_PCIEICH#
VSS_CPU

10K

10K
22 28
VSS_IO SRC2 CLK1_SATA

0.033nF

0.033nF

0.033nF
15 29
VSS_PCI SRC2# CLK1_SATA#

2
26
VSS_PLL3
1 24

THERM_GND
2801-004518
30
VSS_REF LCDCLK_27M
25
CLK1_DREFSSCLK
Y2

R138

R111
36
VSS_SRC1 LCDCLK#_27M_SS CLK1_DREFSSCLK#

C582

C583

C581
C91 14.31818MHz VSS_SRC2
C90 49
VSS_SRC3 SRC0_DOT96
20
CLK1_DREFCLK
0.018nF 0.018nF 21
50V 50V For EMI SRC0#_DOT96# CLK1_DREFCLK#
1205-003159

65
This part is 64pin QFN package.
Place 14.318MHz within P1.05V R649 1K 1%
500mils of CK-505 CLK1_BSEL0 R650 1K 1% MCH1_BSEL0
CLK1_BSEL1 MCH1_BSEL1
CLK REQ DEVICE SRC PORT R646 1K 1%
CLK1_BSEL2 MCH1_BSEL2

1%
1%

1%
1K

1K
56
CLK REQ A SATA SRC2
CLK REQ B GMCH SRC4

R175

R177

R179
CLK REQ E MINI CARD SRC6
A R174 0
A
CPU1_BSEL0 CLK1_BSEL0
CLK REQ F LOM3_CLKREQ# SRC8 R176 0
CPU1_BSEL1 R178 0 CLK1_BSEL1
CPU1_BSEL2 CLK1_BSEL2

1%
1K
SAMSUNG

0
SEL_LCDCLK* Pin 20/21 Pin 24/25
LOW DOT_96/DOT_96# PEG_CLK/PEG_CLK# ELECTRONICS

R701
R700
R699
HIGH SRC_0/SRC_0# 27M & 27M_SS

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8-9
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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
THERMAL SENSOR & FAN CONTROL
D D
g
P5.0V P3.3V_AUX P3.3V P3.3V_AUX
R120
un al 10K 1%
10K 1%
10K 1%

10K 1%

49.9
1%
C109 C110 C107 THM3_VDD_3V_MN
10000nF
100nF 100nF
6.3V
10V 10V
R128
R129
R127

R126

U7
EMC2102
ms nti
1 22
VDD_3V SMDATA KBC3_THERM_SMDATA
24 23
VDD_5V_1 SMCLK KBC3_THERM_SMCLK
27
VDD_5V_2
19
C 14
ALERT#
12
THM3_ALERT# C
KBC3_PWRGD 16
POWER_OK SYS_SHDN# THM3_STP#
RESET#
2
10
DN1
3 C79 CPU2_THERMDC
FAN_MODE DP1
25 1nF
FAN5_VDD 26
FAN_1
4 50V
CPU2_THERMDA 10mil width and 10mil spacing.
FAN_2 DN2
28 5
FAN3_FDBACK# TACH DP2
Sa de
THM3_SHDN_SEL_MN 13 6 THM3_THERMDN_MN
THERMTRIP# DN3
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

7 THM3_THERMDP_MN
DP3 2
R123 0 9
SHDN_SEL
P3.3V
P3.3V_AUX 11
TRIP_SET CLK_SEL
17 C80 MMBT3904
18 2.2nF 1 Q511
CLK_IN
8. Block Diagram and Schematic

8 50V
3
NC_1 THM3_CLK_IN_MN
Line Width = 20 mil
nfi
R125 15 20 R686
NC_2 GND
R1 200K 21 29 10K
NC_3 THRM_PAD
1% 1%
1209-001718
Opposite side of CPU. J505
THM3_TRIP_SET_MN HDR-4P-1R-SMD
R124 SMBUS Address 7Ah
FAN5_VDD 1
R2 51.1K 2
1%
FAN3_FDBACK# 3
93 degree C 4
5
THM3_TRIP_SET_R_MN MNT1
6
C694 MNT2
R122 10000nF
C135
Co
20K 0.033nF 3711-000456
6.3V
1% 50V
B For EMI
B
TRIP_SET pin voltage = (T-75)/21
3.3 * [R2/(R1+R2)] = (T-75)/21
M501 M500 M502
HEAD HEAD HEAD
DIA DIA DIA
LENGTH LENGTH LENGTH
BA61-01090A BA61-01090A BA61-01090A
A A
SAMSUNG
ELECTRONICS

N310
4 3 2 1
N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
DIAMONDVILLE (N270)
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
P1.05V P1.05V
U13-1 R690 R663
CPU1_A#(16:3) AU80586GE025D 1 /4 56.2
1%
330
3 P21 V19
CPU1_IERR#_MN

A3# ADS# CPU1_ADS#


U13-2
g
4 H20 Y19
A4# BNR# CPU1_BNR#
AU80586GE025D 2 /4
5 N20 U21
6 R20
A5# BPRI# CPU1_BPRI# CPU1_D#(15:0) CPU1_D#(47:32)
A6#
7 J19 T21 0 Y11 R3 32
8 N19
A7# DEFER#
T19
CPU1_DEFER# 1 W10
D0# D32#
R2 33
un al
9 G20
A8# DRDY#
Y18
CPU1_DRDY# 2 Y12
D1# D33#
P1 34
10 M19
A9# DBSY# CPU1_DBSY# 3 AA14
D2# D34#
N1 35
A10# TP18068 D3# D35#
ADDR GROUP0

11 H21 T20 4 AA11 M2 36


12 L20
A11# BR0# CPU1_BREQ# 5 W12
D4# D36#
P2 37
A12# D5# D37#
13 M20 F16 6 AA16 J3 38
CONTROL

A13# IERR# D6# D38#


14 K19
A14# INIT#
V16 R662 1K 1%
CPU1_INIT#
7 Y10
D7# D39#
N3 39
15 J20 8 Y9 G3 40

DATA GRP0

DATA GRP2
A15# CPU1_INIT#_R_MN D8# D40#
16 L21 W20 9 Y13 H2 41
CPU1_ADSTB0# K20
A16# LOCK# CPU1_LOCK# 10 W15
D9# D41#
N2 42
ms nti
ADSTB0# D10# D42#
D17 D15 11 AA13 L2 43
CPU1_REQ#(4:0) 0 N21
AP#0 RESET#
W18
CPU1_CPURST# 12 Y16
D11# D43#
M3 44
1 J21
REQ0# RS0#
Y17 CPU1_RS0# 13 W13
D12# D44#
J2 45
2 G19
REQ1# RS1#
U20
CPU1_RS1# 14 AA9
D13# D45#
H1 46
C 3 P20
REQ2# RS2#
W19
CPU1_RS2# 15 W9
D14# D46#
J1 47
C
4 R19
REQ3# TRDY# CPU1_TRDY# Y14
D15# D47#
K2
REQ4#
AA17
CPU1_DSTBN0# Y15
DSTBN0# DSTBN2#
K3
CPU1_DSTBN2#
CPU1_A#(31:17) 17 C19
HIT#
V20 CPU1_HIT# CPU1_DSTBP0# W16
DSTBP0# DSTBP2#
L1 CPU1_DSTBP2#
18 F19
A17# HITM# CPU1_HITM# CPU1_DBI0# V9
DINV0# DINV2#
M4
CPU1_DBI2#
19 E21
A18#
K17
DP#0 DP#2 CPU1_D#(63:48)
20 A16
A19# BPM0#
J18
CPU1_D#(31:16) 16 AA5 C2 48
A20# BPM1# D16# D48#
Sa de
21 D19 H15 17 Y8 G2 49
A21# BPM2# D17# D49#
XDP/ITP SIGNALS

P1.05V P1.05V 22 C14 J15 P1.05V 18 W3 F1 50


A22# BPM3# D18# D50#
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

23 C18 K18 19 U1 D3 51
A23# PRDY# D19# D51#
24 C20
A24# PREQ#
J16 CPU1_PREQ#_MN R691 54.9 1% 20 W7
D20# D52#
B4 52
ADDR GROUP1

25 E20
A25# TCK
M17 CPU1_TCK_MN R682 54.9 1% 21 W6
D21# D53#
E1 53
COMP0/2 (COMP1/3) should be
26 D20
A26# TDI
N16 CPU1_TDI_MN R677 54.9 1% 22 Y7
D22# D54#
A5 54
P1.05V connected with Zo=27.4ohm(55ohm)
8. Block Diagram and Schematic

27 B18 M16 CPU1_TDO_MN 23 AA6 C3 55


A27# TDO D23# D55#
R678 trace shorter than 0.5" to their
nfi
28 C15 L17 CPU1_TMS_MN 54.9 1% 24 Y3 A6 56

DATA GRP1

DATA GRP3
A28# TMS D24# D56#
29 B16
A29# TRST#
K16 CPU1_TRST#_MN R679 54.9 1% 25 W2
D25# D57#
F2 57 respective Banias socket pins.
30 B17 V15 ITP3_DBRRESET#_R_MN R680 26 V3 C6 58
31 C16
A30# BR1#
R689 0 27 U2
D26# D58#
B6 59 COMP0/2 : Stripline=14mils / Microstrip=18mils
R681R676 A31# ITP3_DBRRESET# 56.2 D27# D59#
1K 1K R189 1K A17 G17 CPU1_PROCHOT#_MN 1% 28 T3 B3 60 COMP1/3 : Stripline=4mils / Microstrip=5mils
A32# PROCHOT# D28# D60#
R187 1K B14 E4 29 AA8 C4 61
A33# THRMDA CPU2_THERMDA USE PROCHOT* D29# D61#

THERM
R188 1K B15
A34# THRMDC
E5
CPU2_THERMDC
30 V2
D30# D62#
C7 62
R186 1K A14 P1.05V 56ohm --> 68ohm 31 W4 D2 63
A35# D31# D63#
B19 H17 Y4 E2
CPU1_ADSTB1# M18
ADSTB1# THERMTRIP# CPU1_THRMTRIP# CPU1_DSTBN1# Y5
DSTBN1# DSTBN3#
F3 TP18106
CPU1_DSTBN3#
AP#1 CPU1_DSTBP1# Y6
DSTBP1# DSTBP3#
C5 TP18105 CPU1_DSTBP3#
R182CPU1_DBI1# DINV1# DINV3# CPU1_DBI3#
U18 V11 1K R4 D4 TP18104

HCLK
CPU1_A20M# T16
A20M# BCLK0
V12
CLK0_HCLK0 DP#1 DP#3
Co
1%
CPU1_FERR# FERR# BCLK1 CLK0_HCLK0# TP18103
J4 CPU1_GTLREF_MN A7 T1 CPU1_COMP0_MN
B CPU1_IGNNE# IGNNE# GTLREF COMP0
B
R16 R675 1K U5
1% MISC T2 CPU1_COMP1_MN 1% 27.4 R671
CPU1_STPCLK# T15
STPCLK#
R661 1K 1%
V5
ACLKPH COMP1
F20 54.9 R672
CPU1_INTR LINT0 R183 DCLKPH COMP2 CPU1_COMP2_MN 1%
R15 P1.05V 2K C151 T17 F21 CPU1_COMP3_MN 1% 27.4 R692
CPU1_NMI U17
LINT1 1% 100nF CPU1_ACLKPH_MN R6
BINIT# COMP3 1% 54.9 R693
CPU1_SMI# SMI# 10V CPU1_DCLKPH_MN M6
EDM
R18
D6 C21 N15
EXTBGREF DPRSTP#
R17
CPU1_DPRSTP#
NC1 RSVD3 R673 CPU1_EXTBGREF_MN FORCEPR# DPSLP# CPU1_DPSLP#
CPU1_A32#_MN G6 NC C1 1K N6 U4
CPU1_A33#_MN H6
NC2 RSVD2
A3 1% P17
HPPLL DPWR#
V17
CPU1_DPWR#
CPU1_A34#_MN K4
NC3 RSVD1
T6
MCERR# PWRGOOD
N18 CPU1_PWRGDCPU
CPU1_A35#_MN K5
NC4
J6
RSP# SLP#
A13
CPU1_SLP#
M15
NC5 CPU1_BSEL0 H5
BSEL0 CORE_DET
B7
NC6 R674 CPU1_BSEL1 BSEL1 CMREF
L16 2K C677 G5 P1.05V
NC7 1% 100nF
CPU1_BSEL2 BSEL2
0902-002366 10V 0902-002366
GTLREF : Keep the Voltage divider within 0.5" R180
CPU1_CMREF_MN 1K
of the First GTLREF0 with Z0= 55 ohm trace 1%
Minimize coupling of any switching signals to this net
C150 R181
GTLREF : Keep the Voltage divider within 0.5" 100nF 2K
of the First EXTBGREF with Z0= 55 ohm trace 10V 1%
Minimize coupling of any switching signals to this net
GTLREF : Keep the Voltage divider within 0.5"
of the First CMREF with Z0= 55 ohm trace
A Minimize coupling of any switching signals to this net A A
SAMSUNG
ELECTRONICS

8-10
4 3 2 1
8-11
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. DIAMONDVILLE (N270)
U13-4
D 4/4
AU80586GE025D D
A2 AA20
VSS1 VSS145
A4 AA19
VSS2 VSS144
A8 AA18
VSS3 VSS143
A15 AA15
VSS4 VSS142
A18 AA12
VSS5 VSS141
A19 AA10
VSS6 VSS140
P1.05V
U13-3 A20
VSS7 VSS139
AA7
3/4
AU80586GE025D
B1
B2
VSS8
VSS9
VSS138
VSS137
AA4
AA3
g
V10 C9 B5 AA2
VCCF VTT1 VSS10 VSS136
D9 B8 Y21
C640 A9
VTT2
E9 B13
VSS11 VSS135
Y20
100nF B9
VCCQ1 VTT3
F8 B20
VSS12 VSS134
Y2
10V
CPU_CORE VCCQ2 VTT4 VSS13 VSS133
F9 B21 Y1
un al
VTT5 VSS14 VSS132
A10 G8 C8 W21
VCCP1 VTT6 VSS15 VSS131
A11 G14 C17 W17
VCCP2 VTT7 P1.05V VSS16 VSS130
A12 H8 D1 W14
VCCP3 VTT8 VSS17 VSS129
B10 H14 D5 W11
VCCP4 VTT9 VSS18 VSS128
B11 J8 D8 W8
VCCP5 VTT10 VSS19 VSS127
B12 J14 D14 W5
VCCP6 VTT11 C691 C703 C690 VSS20 VSS126
C10 K8 C676 D18 W1
C11
VCCP7 VTT12
K14
100nF 100nF
1000nF 1000nF
D21
VSS21 VSS125
V21
VCCP8 VTT13 10V 6.3V 6.3V VSS22 VSS124
C12 L8 10V E3 V18
ms nti
VCCP9 VTT14 VSS23 VSS123
D10 L14 E6 V14
VCCP10 VTT15 VSS24 VSS122
D11 M8 E7 V13
VCCP11 VTT16 VSS25 VSS121
D12 M14 E8 V8
VCCP12 VTT17 VSS26 VSS120
E10 N8 E15 V7
C E11
VCCP13 VTT18
N14 E16
VSS27 VSS119
V6
C
VCCP14 VTT19 VSS28 VSS118
E12 P8 E19 V4
VCCP15 VTT20 VSS29 VSS117
F10 P14 F4 V1
VCCP16 VTT21 VSS30 VSS116
F11 R8 F5 U19
VCCP17 VTT22 VSS31 VSS115
F12 R14 F6 U16
VCCP18 VTT23 VSS32 VSS114
G10 T8 F7 U15
VCCP19 VTT24 VSS33 VSS113
G11 T14 F17 U7
VCCP20 VTT25 VSS34 VSS112
Sa de
G12 U8 F18 U6
VCCP21 VTT26 VSS35 VSS111
H10 U9 G1 U3
VCCP22 VTT27 VSS36 VSS110
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

H11 U10 G4 T18


VCCP23 VTT28 VSS37 VSS109
H12 U11 G7 T13
VCCP24 VTT29 VSS38 VSS108
J10 U12 G9 T12
VCCP25 VTT30 VSS39 VSS107
J11 U13 G13 T11
VCCP26 VTT31 VSS40 VSS106
8. Block Diagram and Schematic

J12 U14 G21 T10


VCCP27 VTT32 VSS41 VSS105
nfi
K10 H3 T9
VCCP28 VSS42 VSS104
K11 F14 H4 T7
VCCP29 VCCP_C6_4 VSS43 VSS103
K12 F13 H7 T5
VCCP30 VCCP_C6_3 VSS44 VSS102
L10 E14 H9 T4
VCCP31 VCCP_C6_2 P1.5V VSS45 VSS101
L11 E13 H13 R21
VCCP32 VCCP_C6_1 VSS46 VSS100
L12 H16 R13
VCCP33 VSS47 VSS99
M10 D7 H18 R9
VCCP34 VCCA VSS48 VSS98
M11 H19 R7
M12
VCCP35
F15 CPU1_VID(6:0) C702 C701 J5
VSS49 VSS97
R5
VCCP36 VID0 VSS50 VSS96
N10 D16 100nF 10000nF-X5R J7 R1
VCCP37 VID1 VSS51 VSS95
N11 E18 10V 6.3V J9 P19
VCCP38 VID2 VSS52 VSS94
N12 G15 J13 P18
VCCP39 VID3 VSS53 VSS93
P10 G16 J17 P16
Co
VCCP40 VID4 Placed as close as VSS54 VSS92
P11 E17 possible to VCCA pins. K1 P15
VCCP41 VID5 VSS55 VSS91
B P12
VCCP42 VID6
G18 K6
VSS56 VSS90
P13 B
R10 K7 P9
VCCP43 VSS57 VSS89
R11 C13 K9 P7
R12
VCCP44 VCCSENSE CPU1_VCCSENSE K13
VSS58 VSS88
P6
VCCP45 VSS59 VSS87
D13 K15 P5
VSSSENSE CPU1_VSSSENSE K21
VSS60 VSS86
P4
VSS61 VSS85
0902-002366 L3 P3
VSS62 VSS84
L4 N17
VSS63 VSS83
L5 N13
VSS64 VSS82
L6 N9
VSS65 VSS81
L7 N7
VSS66 VSS80
L9 N5
VSS67 VSS79
L13 N4
VSS68 VSS78
L15 M21
VSS69 VSS77
L18 M13
VSS70 VSS76
C688 C689 C686 C687 C714 C715 C712 C713 C717 C716 C704 C732 L19
VSS71 VSS75
M9
10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R M1 M7
VSS72 VSS74
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V M5
VSS73
0902-002366
CPU_CORE
20mils R185 100 1%
CPU1_VCCSENSE
C678 C709 C707 C705 C708 C711 C710 C706
1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
A R184 100 1%
A
CPU1_VSSSENSE
SAMSUNG
C682 C679 C733 C680 C681 C685 C684 C683
1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF
ELECTRONICS
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V

N310
4 3 2 1
N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CALISTOGA (945GSE)
D P1.05V D
U12-1 R657
221
CPU1_D#(63:0) 945GSE CPU1_A#(31:3)
MCH1_HYSWING
1%
0.327V
0 C4 F8 3
HD0* HA3*
1 F6
HD1* HA4*
D12 4 C636 R656
2 H9 C13 5 100nF 100
g
HD2* HA5*
3 H6 A8 6 10V 1%
HD3* HA6*
4 F7 E13 7
HD4* HA7*
5 E3 E12 8
HD5* HA8*
6 C2
HD6* HA9*
J12 9 within 20mil
7 C3 B13 10
un al
HD7* HA10*
8 K9 A13 11
HD8* HA11*
9 F5 G13 12
HD9* HA12*
10 J7 A12 13
HD10* HA13*
11 K7 D14 14
HD11* HA14*
12 H8 F14 15
1/5
HD12* HA15*
13 E5 J13 16
HD13* HA16* P1.05V
14 K8 E17 17
HD14* HA17*
15 J8 H15 18
HD15* HA18*
16 J2 0904-002420 G15 19
ms nti
HD16* HA19*
17 J3 G14 20 R653
HD17* HA20*
18 N1 A15 21 221
HD18* HA21*
19 M5 B18 22 1%
HD19* HA22*
C 20
21
K5
J5
HD20* HA23*
B15
E14
23
24
MCH1_HXSWING 0.327V C
HD21* HA24*
22 H3
HD22* HA25*
H13 25 C631 R652
23 J4 C14 26 100nF 100
HD23* HA26*
24 N3 A17 27 10V 1%
HD24* HA27*
25 M4 E15 28
HD25* HA28*
26 M3 H17 29
HD26* HA29*
27 N8 D17 30 within 20mil
HD27* HA30*
Sa de
28 N6 G17 31
29 K3
HD28* HA31*
7-C4
CPU1_REQ#(4:0)
HD29*
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

30 N9 G9 0
HD30* HREQ0*
31 M1 E9 1
HD31* HREQ1*
32 V8 G12 2
HD32* HREQ2*
33 V9 B8 3
HD33* HREQ3*
8. Block Diagram and Schematic

34 R6 F12 4
HD34* HREQ4* P1.05V
nfi
35 T8
HD35*
36 R2 C12
37 N5
HD36* HADSTB0*
H16
CPU1_ADSTB0#
38 N2
HD37* HADSTB1* CPU1_ADSTB1#
HD38* R658
39 R5 E1 100
40 U7
HD39* HVREF1
E2
MCH1_HVREF 1%
HD40* HVREF0 HVREF2
41
42
R8
T4
HD41*
AA6
MCH1_HVREF 0.7V
43 T7
HD42* HCLKN
AA5 CLK0_HCLK1# C635 R655
44 R3
HD43* HCLKP CLK0_HCLK1 nearby Pin J13 100nF 200
HD44* 1%
45 T5 H5 10V
46 V6
HD45* HDINV0*
J6
CPU1_DBI0# Layout Note
HD46* HDINV1* CPU1_DBI1#
Co
47 V3 T9
48 W2
HD47* HDINV2*
U6
CPU1_DBI2# Place 100nF
B 49 W1
HD48* HDINV3* CPU1_DBI3# within 100mils B
HD49*
50 V2 F3 near HVREF pin
51 W4
HD50* HDSTBN0*
M8
CPU1_DSTBN0#
52 W7
HD51* HDSTBN1*
T1 CPU1_DSTBN1#
53 W5
HD52* HDSTBN2*
AA3
CPU1_DSTBN2#
54 V5
HD53* HDSTBN3*
F4
CPU1_DSTBN3#
55 AB4
HD54* HDSTBP0*
M7
CPU1_DSTBP0#
56 AB8
HD55* HDSTBP1*
T2
CPU1_DSTBP1#
57 W8
HD56* HDSTBP2*
AB3 CPU1_DSTBP2#
58 AA9
HD57* HDSTBP3* CPU1_DSTBP3#
HD58*
59 AA8 F10
60 AB1
HD59* HADS*
B9
CPU1_ADS#
P1.05V 61 AB7
HD60* HBNR*
C7
CPU1_BNR#
62 AA2
HD61* HBPRI*
G8
CPU1_BPRI#
63 AB5
HD62* HBREQ0* CPU1_BREQ#
HD63*
C10
C15
HDBSY*
C6
CPU1_DBSY#
MCH1_HXSWING H1
HXSWING HDEFER*
E6
CPU1_DEFER#
MCH1_HYSWING HYSWING HDRDY* CPU1_DRDY#
R659 54.9 1% MCH1_HXSCOMP_MN A6
HXSCOMP HHIT*
C8
CPU1_HIT#
R654 54.9 1% MCH1_HYSCOMP_MN K1 B4
R660 24.9 1% A10
HYSCOMP HHITM*
C5 CPU1_HITM#
MCH1_HXRCOMP_MN HXRCOMP HLOCK* CPU1_LOCK#
R670 24.9 1% MCH1_HYRCOMP_MN J1 E10
HYRCOMP HTRDY* CPU1_TRDY#
width: 10mil, within 20mil A5 G7
CPU1_RS0# B6
HRS0* HDPWR*
B10
CPU1_DPWR#
CPU1_RS1# G10
HRS1* HCPURST*
E8
CPU1_CPURST#
CPU1_RS2# HRS2* HSLPCPU* CPU1_SLP#
A A
C811
0.1nF HSLPCPU* - GMCH : Enhanced mode (def.)
50V
HSLPCPU* - ICH : Legacy mode SAMSUNG
ELECTRONICS

8-12
4 3 2 1
8-13
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
CALISTOGA (945GSE)
EXCEPT AS AUTHORIZED BY SAMSUNG. P1.5V
U12-2 R668
U12-3
945GSE 24.9
1% MEM1_ADM(7:0) 945GSE MEM1_ADQ(63:0)
A27 R28 0 AB30 AC31 0
D CLK1_DREFCLK# A26
DREF_CLKN EXP_ACOMPI
M28 1 AL31
SA_DM0 SA_DQ0
AB28 1
D
CLK1_DREFCLK DREF_CLKP EXP_AICOMPO MCH1_EXP_ACOMP_MN SA_DM1 SA_DQ1
J33 2 AF30 AE33 2
CLK1_DREFSSCLK# H33
DREF_SSCLKN
Y29 3 AK26
SA_DM2 SA_DQ2
AF32 3
CLK1_DREFSSCLK DREF_SSCLKP DMI_RXN0
Y32 DMI1_TXN0 4 AL9
SA_DM3 SA_DQ3
AC33 4
Y26
DMI_RXN1
Y28
DMI1_TXN1 5 AG7
SA_DM4 SA_DQ4
AB32 5
CLK1_MCH3GPLL# AA26
GCLKN DMI_RXP0
Y31 DMI1_TXP0 6 AK5
SA_DM5 SA_DQ5
AB31 6
CLK1_MCH3GPLL GCLKP DMI_RXP1
V28
DMI1_TXP1 7 AH3
SA_DM6 SA_DQ6
AE31 7
P1.5V A21
DMI_TXN0
V31
DMI1_RXN0 MEM1_ADQS(7:0) SA_DM7 SA_DQ7
AH31 8
C20
TVDACA_OUT DMI_TXN1
V29
DMI1_RXN1 0 AC28
SA_DQ8
AK31 9
E20
TVDACB_OUT DMI_TXP0
V32
DMI1_RXP0 1 AJ30
SA_DQS0 SA_DQ9
AL28 10
DMI1_RXP1
g
TVDACC_OUT DMI_TXP1 SA_DQS1 SA_DQ10
G23 2 AK33 AK27 11
TV_IREF_REFSET SA_DQS2 SA_DQ11
B21 AF33 3 AL25 AH30 12
CLK1_MCLK0
2/5 3/5
TV_IRTNA SM_CLK0 SA_DQS3 SA_DQ12
C21 AG33 4 AN9 AL32 13
D21
TV_IRTNB SM_CLK0*
AG1
CLK1_MCLK0# 5 AH8
SA_DQS4 SA_DQ13
AJ28 14
G26
TV_IRTNC SM_CLK1
AF1
CLK1_MCLK1 6 AM2
SA_DQS5 SA_DQ14
AJ27 15
un al
J26
TV_DCONSEL0 SM_CLK1*
AJ1
CLK1_MCLK1# 7 AE3
SA_DQS6 SA_DQ15
AH32 16
TV_DCONSEL1 SM_CLK2
AK1
MEM1_ADQS#(7:0) SA_DQS7 SA_DQ16
AF31 17
SM_CLK2* 0904-002420 SA_DQ17
H20 0904-002420 AM30 0 AC29 AH27 18
CRT3_DDCCLK H22
CRT_DDCCLK SM_CLK3
AN30 1 AK30
SA_DQS0* SA_DQ18
AF28 19
CRT3_DDCDATA R644 40.2 1% F27
CRT_DDCDATA SM_CLK3*
2 AJ33
SA_DQS1* SA_DQ19
AJ32 20
CRT3_VSYNC CRT3_VSYNC_R_MN CRT_VSYNC SA_DQS2* SA_DQ20
CRT3_HSYNC R640 40.2 1% CRT3_HSYNC_R_MN D27
CRT_HSYNC SM_CKE0
AN21
MEM1_CKE0
3 AM25
SA_DQS3* SA_DQ21
AG31 21
C25 AN22 4 AN8 AG28 22
CRT3_RED E25
CRT_RED SM_CKE1
AF26
MEM1_CKE1 5 AJ8
SA_DQS4* SA_DQ22
AG27 23
CRT3_GREEN A24
CRT_GREEN SM_CKE2
AF25 6 AM3
SA_DQS5* SA_DQ23
AN27 24
ms nti
CRT3_BLUE R598 150 1% D25
CRT_BLUE SM_CKE3
7 AE2
SA_DQS6* SA_DQ24
AM26 25
CRT_RED* SA_DQS7* SA_DQ25
R645 150 1% F25 AG14 AJ26 26
CRT_GREEN* SM_CS0* MEM1_CS0# SA_DQ26
0.033nF 5%50V
0.033nF 5%50V
0.033nF 5%50V

R643 150 1% A23 AF12 AK12 AJ25 27


H25
CRT_BLUE* SM_CS1*
AK14
MEM1_CS1# MEM1_ABS0 AH11
SA_BS0 SA_DQ27
AL27 28
C R635 249 1%
CRT_IREF SM_CS2*
AH12
MEM1_ABS1 AG17
SA_BS1 SA_DQ28
AN26 29
C
J27
SM_CS3* MEM1_ABS2 SA_BS2 SA_DQ29
AH25 30
SDVO_CTRLCLK SA_DQ30
MCH3_CRT_IREF_MN H27 AE12 AJ17 AG26 31
T30
SDVO_CTRLDATA SM_ODT0
AF14 MEM1_ODT0 MEM1_ACAS# AK18
SA_CAS* SA_DQ31
AM12 32
T29
SDVO_FLDSTALL SM_ODT1
AJ14
MEM1_ODT1 MEM1_ARAS# AH17
SA_RAS* SA_DQ32
AL11 33
SDVO_FLDSTALL* SM_ODT2 MEM1_AWE# SA_WE* SA_DQ33
C630
C610
C609

M30 AJ12 AH9 34


SDVO_TVCLKIN SM_ODT3 P1.8V_AUX SA_DQ34
N30 AN28 AK9 35
SDVO_TVCLKIN* SA_RCVENIN* SA_DQ35
Sa de
AN12 MCH2_SMRCOMPN_MN R173 80.6 1% AM28 AM11 36
P30
SMRCOMPN
AN14 R172 80.6 1%
MEM1_AMA(13:0) SA_RCVENOUT* SA_DQ36
AK11 37
SDVOB_INT SMRCOMPP MCH2_SMRCOMPR_MN SA_DQ37
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

R30 AJ21 0 AJ15 AM8 38


SDVOB_INT* SMOCDCOMP0 MEM1_VREF SA_MA0 SA_DQ38
AF11 1 AM17 AK8 39
SMOCDCOMP1 SA_MA1 SA_DQ39
N28 2 AM15 AG9 40
SDVOB_RED SA_MA2 SA_DQ40
P28
SDVOB_RED* SMVREF0
AA33 C700 100nF 10V 3 AH15
SA_MA3 SA_DQ41
AF9 41
P3.3V C126
8. Block Diagram and Schematic

M32 AE1 100nF 10V 4 AK15 AF8 42


SDVOB_GREEN SMVREF1 SA_MA4 SA_DQ42
nfi
N32 5 AN15 AK6 43
SDVOB_GREEN* SA_MA5 SA_DQ43
P33 W27 PLT3_RST#_R_MN R669 100 1% 6 AJ18 AF7 44
P32
SDVOB_BLUE RSTIN*
AB29
PLT3_RST# 7 AF19
SA_MA6 SA_DQ44
AG11 45
nostuff SDVOB_BLUE* PWROK
G21 KBC3_PWRGD 8 AN17
SA_MA7 SA_DQ45
AJ6 46
nostuff
R633 R634 PM_BMBUSY* MCH3_BMBUSY# SA_MA8 SA_DQ46
10K 10K T32 J15 9 AL17 AH6 47
R32
SDVOB_CLKN PM_THRMTRIP*
F26
CPU1_THRMTRIP# 10 AG16
SA_MA9 SA_DQ47
AN6 48
SDVOB_CLKP PM_EXTTS*_0
H26
MCH3_EXTTS0# 11 AL18
SA_MA10 SA_DQ48
AM6 49
H30
PM_EXTTS*_1 MCH3_EXTTS1# 12 AG18
SA_MA11 SA_DQ49
AK3 50
LCD3_BRIT G29
L_BKLTCRTL
E31 13 AL14
SA_MA12 SA_DQ50
AL2 51
MCH3_LCD_BKLTEN K30
L_BKLTEN ICHSYNC*
J22
MCH3_ICHSYNC# SA_MA13 SA_DQ51
AM5 52
MCH3_LCD_VDDEN F28
L_VDDEN CLKREQ* MCH3_CLKREQ# AH21
SA_DQ52
AL5 53
MCH3_L_CTLA_CLK_MN L_CTLA_CLK SB_BS0 SA_DQ53
MCH3_L_CTLB_DATA_MN E28 C18 AJ20 AJ3 54
L_CTLB_DATA CFG0 MCH1_BSEL0 SB_BS1 SA_DQ54
Co
E18 AE27 AJ2 55
D30
CFG1
G20
MCH1_BSEL1 SB_BS2 SA_DQ55
AG2 56
B LCD1_ACLK# C30
LA_CLKN CFG2
G18
MCH1_BSEL2 AG19
SA_DQ56
AF3 57 B
LCD1_ACLK LA_CLKP CFG3 MCH3_CFG3_MN SB_CAS* SA_DQ57
G31 J20 MCH3_CFG6_MN AG21 AE7 58
LCD1_ADATA0# H31
LA_DATAN0 CFG5
J18 Internal P.U. P3.3V AG20
SB_RAS* SA_DQ58
AF6 59
LCD1_ADATA0 F32
LA_DATAP0 CFG6
K28 R639 1K nostuff
SB_WE* SA_DQ59
AH5 60
LCD1_ADATA1# G32
LA_DATAN1 CFG19
MCH3_CFG19_MN 1% nostuff AN20
SA_DQ60
AG3 61
LCD1_ADATA1 LA_DATAP1 R651 R647 SB_MA0 SA_DQ61
D31 K25 nostuff 2.2K 2.2K AL21 AG5 62
LCD1_ADATA2# C31
LA_DATAN2 RSVD_1
K26 MCH3_CFG5_MN AK21
SB_MA1 SA_DQ62
AF5 63
LCD1_ADATA2 LA_DATAP2 RSVD_2
K32 AK22
SB_MA2 SA_DQ63
RSVD_3 R648 SB_MA3
A30 K31 2.2K AL22 K15
LB_CLKN RSVD_4 SB_MA4 RSVD_20
A29 R24 AH22 K21
LB_CLKP RSVD_5 SB_MA5 RSVD_21
F33 T24 AG22 K19
D33
LB_DATAN_0 RSVD_6
M10 CFG[0:2] = BSEL[0:2] = "100" AF21
SB_MA6 RSVD_22
K20
LB_DATAN_1 RSVD_7 SB_MA7 RSVD_23
F30 A18 Page 6 AM21 K24
LB_DATAN_2 RSVD_8 SB_MA8 RSVD_24
E33 AB10 AE21 Y25
LB_DATAP_0 RSVD_9 SB_MA9 RSVD_25
D32 AA10 AL20 Y24
F29
LB_DATAP_1 RSVD_10
C17 MCH_CFG5 : LOW=DIMX2 AE22
SB_MA10 RSVD_26
AB22
LB_DATAP_2 RSVD_11 VSS_NCTF SB_MA11 RSVD_27
MCH1_L_IBG_MN K27
RSVD_12
A33
K22
HIGH=DIMX4 AE26
AE20
SB_MA12 RSVD_28
AB21
AB19
L_IBG RSVD_13 SB_MA13 RSVD_29
J29 J17 AB16
L_VBG RSVD_14 RSVD_30
R638 J30 K23 AB18 AB14
K29
L_VREFH RSVD_15
K17 Current Setting (def. : default Option) AB15
RSVD_37 RSVD_31
AA12
1.5K L_VREFL RSVD_16 RSVD_38 RSVD_32
1% K12 CFG# Low High AB13 W24
RSVD_17 RSVD_39 RSVD_33
G28 K13 AB12 AA24
LCD3_EDID_CLK H28
LDDC_CLK RSVD_18
K16
CFG(5) DMIx2 (default) DMIx4 AB17
RSVD_40 RSVD_34
AB24
LCD3_EDID_DATA LDDC_DATA RSVD_19 CFG(6) Reserved F18
RSVD_41 RSVD_35
AB20
RSVD_42 RSVD_36
CFG(19) DMI Lane Normal DMI Lane Reversal
A P3.3V A
R641 10K
SAMSUNG
MCH3_EXTTS0# nostuff ELECTRONICS
R636 10K R637 0
MCH3_EXTTS1# MCH3_EXTTS1# CHP3_DPRSLPVR
R642 10K

N310
MCH3_CLKREQ#
4 3 2 1
N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY. P1.05V
CALISTOGA
U12-4 (945GSE) P1.8V_AUX P1.8V_AUX
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. 270uF * 2ea 945GSE
T26
VCC_1 VCCSM_1
AB33 C125 1000nF-X5R EC10 C730 C731
R26 AM32 C697 1000nF-X5R 220uF C148
C638 C639 C672 C674 C673 P26
VCC_2 VCCSM_2
AN29 6.3V 1000nF-X7R
4700nF 4700nF
2.5V
10000nF 10000nF 100nF 100nF 100nF N26
VCC_3 VCCSM_3
AM29 MCH2_VCCSM_1_MN 6.3V AD 6.3V
6.3V 6.3V
6.3V 6.3V 10V 10V 10V VCC_4 VCCSM_4
M26 AL29 MCH2_VCCSM_2_MN
VCC_5 VCCSM_5
V19 AK29
D U19
VCC_6 VCCSM_6
AJ29
D
VCC_7 VCCSM_7
T19 AH29
VCC_8 VCCSM_8
W18 AG29
VCC_9 VCCSM_9
V18 AF29
VCC_10 VCCSM_10
T18 AE29
VCC_11 VCCSM_11
R18 AN24
VCC_12 VCCSM_12
W17 AM24
VCC_13 VCCSM_13
U17 AL24
R17
W16
VCC_14
VCC_15 4/5 VCCSM_14
VCCSM_15
AK24
AJ24
g
VCC_16 VCCSM_16
V16 Y10 Y9 AH24
VCC_17 NC_1 NC_37 VCCSM_17
T16 W33 J19 AG24
VCC_18 NC_2 NC_38 VCCSM_18 P3.3V
R16 AM33 H19 AF24
VCC_19 NC_3 NC_39 VCCSM_19
V15 AL33 G19 AE24 MCH2_VCCSM_21_MN
VCC_20 NC_4 NC_40 VCCSM_20
U15 C33 F19 AN18 C147 1000nF-X5R
un al
VCC_21 NC_5 NC_41 VCCSM_21
T15 B33 E19 AN16 6.3V
P1.05V VCC_22
AN32
NC_6 NC_42
D19
VCCSM_22
AM16
C628 C621
MCH1_VTT_1_MN NC_7 NC_43 VCCSM_23 100nF 10000nF
C632 470nF A14
VTT_1
A32
NC_8 NC_44
C19
VCCSM_24
AL16
10V 6.3V
16V D10 W10 B19 AK16
VTT_2 NC_9 NC_45 VCCSM_25
P9 AN31 A19 AJ16
EC7 C128 C634 C675 L9
VTT_3
W28
NC_10 NC_46
Y8
VCCSM_26
AN13
220uF 10000nF 100nF 100nF D9
VTT_4
V27
NC_11 NC_47
K18
VCCSM_27
AM13
2.5V AD 6.3V 10V 10V VTT_5 NC_12 NC_48 VCCSM_28
P8 W25 G16 AL13
VTT_6 NC_13 NC_49 VCCSM_29 P1.5V
L8 V24 F16 AK13
ms nti
VTT_7 NC_14 NC_50 VCCSM_30
D8 U24 E16 AJ13
VTT_8 NC_15 NC_51 VCCSM_31
P7 W29 D16 AH13
VTT_9 NC_16 NC_52 VCCSM_32
L7 V10 C16 AG13
MCH1_VTT_12_MN D7
VTT_10
J24
NC_17 NC_53
B16
VCCSM_33
AF13
C627 C626
C C637 470nF A7
VTT_11
H24
NC_18 NC_54
AN2
VCCSM_34
AE13
100nF 10000nF C
VTT_12 NC_19 NC_55 VCCSM_35 10V 6.3V
16V P6 W32 A16 AN10
VTT_13 NC_20 NC_56 VCCSM_36
L6 G24 Y7 AM10
VTT_14 NC_21 NC_57 VCCSM_37
G6 F24 AM4 AL10
VTT_15 NC_22 NC_58 VCCSM_38
D6 E24 AF4 AK10
VTT_16 NC_23 NC_59 VCCSM_39
U5 D24 AD4 AJ10
VTT_17 NC_24 NC_60 VCCSM_40 P2.5V
P5 K33 AL4 AH10
VTT_18 NC_25 NC_61 VCCSM_41
Sa de
L5 U10 AK4 AG10
VTT_19 NC_26 NC_62 VCCSM_42
G5 A31 W31 AF10
VTT_20 NC_27 NC_63 VCCSM_43
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

D5 E21 AJ4 AE10


VTT_21 NC_28 NC_64 VCCSM_44
Y4 C23 AH4 AN7
U4
VTT_22
AN19
NC_29 NC_65
AG4
VCCSM_45
AM7
C622 C625
P1.5V P1.5V P4
VTT_23
AM19
NC_30 NC_66
AE4
VCCSM_46
AL7
10nF 100nF
VTT_24 NC_31 NC_67 VCCSM_47 MCH2_VCCSM_51_MN 25V 10V
8. Block Diagram and Schematic

L4 AL19 AM1 AK7


VTT_25 NC_32 NC_68 VCCSM_48 MCH2_VCCSM_52_MN
nfi
G4 AK19 W30 AJ7
VTT_26 NC_33 NC_69 VCCSM_49
D4 AJ19 Y6 AH7 6.3V
MMZ1608S121AT MMZ1608S121AT VTT_27 NC_34 NC_70 VCCSM_50
B13 B14 Y3
VTT_28
AH19
NC_35 NC_71
AL1
VCCSM_51
AN4 C149 1000nF-X5R
U3 AN3 Y5 AH1 C699 1000nF-X5R P2.5V
VTT_29 NC_36 NC_72 VCCSM_52
P3 6.3V
VTT_30
L3 AN33 E26
C140 C141 C139 C143 C142 C138 G3
VTT_31
AA25
VSS_NCTF_1
AA16
VCCHV_1
D26
10000nF 10000nF 100nF 10000nF 10000nF 100nF D3
VTT_32
V25
VSS_NCTF_2 VSS_NCTF_11
AA15
VCCHV_2
C26
C623 C863
6.3V 6.3V 10V 6.3V 6.3V 10V
Y2
VTT_33
U25
VSS_NCTF_3 VSS_NCTF_12
AA14
VCCHV_3 100nF 4700nF
VTT_34 VSS_NCTF_4 VSS_NCTF_13 10V 6.3V
U2 AA22 AA13 C28
VTT_35 VSS_NCTF_5 VSS_NCTF_14 VCCDLVDS_1
P2 AA21 A4 B28
VTT_36 VSS_NCTF_6 VSS_NCTF_15 VCCDLVDS_2
L2 AA20 A3 A28
VTT_37 VSS_NCTF_7 VSS_NCTF_16 VCCDLVDS_3
Co
G2 AA19 B2 B31
VTT_38 VSS_NCTF_8 VSS_NCTF_17 VCCA_LVDS
MCH1_VTT_40_MN D2 AA18 AN1 B32
P1.5V VTT_39 VSS_NCTF_9 VSS_NCTF_18 VSSA_LVDS
B C127 470nF AA1
VTT_40
AA17
VSS_NCTF_10 VSS_NCTF_19
C1 B
P1.5V P1.5V P1.5V 16V Y1 D29
VTT_41 VCCTX_LVDS_1
U1 0904-002420 C29

BLM18PG181SN1
VTT_42 VCCTX_LVDS_2
P1 B20
VTT_43 VCCA_TVDACA_1 P1.5V
L1 A20
B507 B509 G1
VTT_44 VCCA_TVDACA_2
B22
MMZ1608S121AT MMZ1608S121AT C633 470nF F1
VTT_45 VCCA_TVDACB_1
A22
VTT_46 VCCA_TVDACB_2
16V D22
VCCA_TVDACC_1
MCH1_VTT_46_MN AE5 C22
VCCD_HMPLL_1 VCCA_TVDACC_2

B12
AD5
VCCD_HMPLL_2
MCH2_VCCA_HPLL_MN AD2 F20
VCCA_HPLL VCCDTVDAC
MCH2_VCCA_MPLL_MN AD1 F22
VCCA_MPLL VCCDQTVDAC
MCH2_VCCA_DPLLA_MN B26 D23
VCCA_DPLLA VCCA_TVBG
MCH2_VCCA_DPLLB_MN J32 E23
EC502 C629 V26
VCCA_DPLLB VSSA_TVBG
100nF C624 MCH2_VCCA_3GPLL_MN
330uF EC504 VCCA_3GPLL
2.5V AL 10V 330uF 100nF C136 C137 C24 U33
2.5V AL 10V 10000nF 100nF B24
VCCA_CRTDAC_1 VCC3G_1
T33 MCH2_VCC3G_MN
6.3V 10V VCCA_CRTDAC_2 VCC3G_2
B25 N33
VSSA_CRTDAC VCCA_3GBG P1.5V
J23 M33
VCC_SYNC VSSA_3GBG P2.5V
C670 C124 EC507
P1.05V P2.5V 220uF B508
C671 10000nF 10000nF
BLM18PG181SN1
2.5V
MCH1_P3.3V_HV_R_MN 100nF 6.3V 6.3V
AD
B505 BLM18PG181SN1 10V
1 3 R632 10
1% MCH2_VCCA_CRTDAC_MN
A BAT54 EC503 C608
C607
A
D508 47uF 100nF 22nF
C620 C603 6.3V AD 10V 50V
100nF
10V
10000nF
6.3V
SHORT507
MCH2_VSSA_CRTDAC_MN SAMSUNG
INSTPAR ELECTRONICS
nostuff

8-14
4 3 2 1
8-15
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CALISTOGA (945GSE)
P1.5V U12-5 P1.05V
D
945GSE D
AD33 T25
VCCAUX_1 VCC_NCTF_1
AD32 R25
C698 AD31
VCCAUX_2 VCC_NCTF_2
P25
100nF AD30
VCCAUX_3 VCC_NCTF_3
N25
10% VCCAUX_4 VCC_NCTF_4
10V AD29 AH33 G25 M25
VCCAUX_5 VSS_1 VSS_78 VCC_NCTF_5
AD28 Y33 A25 P24
VCCAUX_6 VSS_2 VSS_79 VCC_NCTF_6
AD27 V33 H23 N24
VCCAUX_7 VSS_3 VSS_80 VCC_NCTF_7
AC27 R33 F23 M24
VCCAUX_8 VSS_4 VSS_81 VCC_NCTF_8
AD26 G33 B23 Y22
VCCAUX_9 VSS_5 VSS_82 VCC_NCTF_9
AC26 AK32 AM22 W22
g
VCCAUX_10 VSS_6 VSS_83 VCC_NCTF_10
AB26 AG32 AJ22 V22
VCCAUX_11 VSS_7 VSS_84 VCC_NCTF_11
AE19 AE32 AF22 U22
VCCAUX_12 VSS_8 VSS_85 VCC_NCTF_12
AE18 AC32 G22 T22
VCCAUX_13 VSS_9 VSS_86 VCC_NCTF_13
AF17 AA32 E22 R22
VCCAUX_14 VSS_10 VSS_87 VCC_NCTF_14
5/5
AE17 U32 J21 P22
un al
VCCAUX_15 VSS_11 VSS_88 VCC_NCTF_15
AF16 H32 H21 N22
VCCAUX_16 VSS_12 VSS_89 VCC_NCTF_16
AE16 E32 F21 M22
VCCAUX_17 VSS_13 VSS_90 VCC_NCTF_17
AF15 C32 AM20 Y21
VCCAUX_18 VSS_14 VSS_91 VCC_NCTF_18
AE15 AM31 0904-002420 AK20 W21
VCCAUX_19 VSS_15 VSS_92 VCC_NCTF_19
J14 AJ31 AH20 V21
VCCAUX_20 VSS_16 VSS_93 VCC_NCTF_20
J10 AA31 AF20 U21
VCCAUX_21 VSS_17 VSS_94 VCC_NCTF_21
H10 U31 D20 T21
VCCAUX_22 VSS_18 VSS_95 VCC_NCTF_22
AE9 T31 W19 R21
VCCAUX_23 VSS_19 VSS_96 VCC_NCTF_23
AD9 R31 R19 P21
ms nti
VCCAUX_24 VSS_20 VSS_97 VCC_NCTF_24
U9 P31 AM18 N21
VCCAUX_25 VSS_21 VSS_98 VCC_NCTF_25
AD8 N31 AH18 M21
VCCAUX_26 VSS_22 VSS_99 VCC_NCTF_26
AD7 M31 AF18 Y20
P1.5V VCCAUX_27 VSS_23 VSS_100 VCC_NCTF_27
AD6 J31 U18 W20
C VCCAUX_28
F31
VSS_24 VSS_101
H18
VCC_NCTF_28
V20
C
VSS_25 VSS_102 VCC_NCTF_29
AD25 AL30 D18 U20
VCCAUX_NCTF_1 VSS_26 VSS_103 VCC_NCTF_30
AC25 AG30 AK17 T20
VCCAUX_NCTF_2 VSS_27 VSS_104 VCC_NCTF_31
AB25 AE30 V17 R20
VCCAUX_NCTF_3 VSS_28 VSS_105 VCC_NCTF_32
AD24 AC30 T17 P20
VCCAUX_NCTF_4 VSS_29 VSS_106 VCC_NCTF_33
AC24 AA30 F17 N20
VCCAUX_NCTF_5 VSS_30 VSS_107 VCC_NCTF_34
AD22 Y30 B17 M20
VCCAUX_NCTF_6 VSS_31 VSS_108 VCC_NCTF_35
Sa de
AD21 V30 AH16 Y19
VCCAUX_NCTF_7 VSS_32 VSS_109 VCC_NCTF_36
AD20 U30 U16 P19
VCCAUX_NCTF_8 VSS_33 VSS_110 VCC_NCTF_37
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

AD19 G30 J16 N19


VCCAUX_NCTF_9 VSS_34 VSS_111 VCC_NCTF_38
AD18 E30 AL15 M19
VCCAUX_NCTF_10 VSS_35 VSS_112 VCC_NCTF_39
AD17 B30 AG15 Y18
VCCAUX_NCTF_11 VSS_36 VSS_113 VCC_NCTF_40
AD16 AA29 W15 P18
VCCAUX_NCTF_12 VSS_37 VSS_114 VCC_NCTF_41
8. Block Diagram and Schematic

AD15 U29 R15 N18


VCCAUX_NCTF_13 VSS_38 VSS_115 VCC_NCTF_42
nfi
AD14 R29 F15 M18
VCCAUX_NCTF_14 VSS_39 VSS_116 VCC_NCTF_43
K14 P29 D15 Y17
VCCAUX_NCTF_15 VSS_40 VSS_117 VCC_NCTF_44
AD13 N29 AM14 P17
VCCAUX_NCTF_16 VSS_41 VSS_118 VCC_NCTF_45
Y13 M29 AH14 N17
VCCAUX_NCTF_17 VSS_42 VSS_119 VCC_NCTF_46
W13 H29 AE14 M17
VCCAUX_NCTF_18 VSS_43 VSS_120 VCC_NCTF_47
V13 E29 H14 Y16
VCCAUX_NCTF_19 VSS_44 VSS_121 VCC_NCTF_48
U13 B29 B14 P16
VCCAUX_NCTF_20 VSS_45 VSS_122 VCC_NCTF_49
T13 AK28 F13 N16
VCCAUX_NCTF_21 VSS_46 VSS_123 VCC_NCTF_50
R13 AH28 D13 M16
VCCAUX_NCTF_22 VSS_47 VSS_124 VCC_NCTF_51
P13 AE28 AL12 Y15
VCCAUX_NCTF_23 VSS_48 VSS_125 VCC_NCTF_52
N13 AA28 AG12 P15
VCCAUX_NCTF_24 VSS_49 VSS_126 VCC_NCTF_53
M13 U28 H12 N15
VCCAUX_NCTF_25 VSS_50 VSS_127 VCC_NCTF_54
Co
AD12 T28 B12 M15
VCCAUX_NCTF_26 VSS_51 VSS_128 VCC_NCTF_55
Y12 J28 AN11 Y14
VCCAUX_NCTF_27 VSS_52 VSS_129 VCC_NCTF_56
B W12
VCCAUX_NCTF_28
D28
VSS_53 VSS_130
AJ11
VCC_NCTF_57
W14 B
V12 AM27 AE11 V14
VCCAUX_NCTF_29 VSS_54 VSS_131 VCC_NCTF_58
U12 AF27 AM9 U14
VCCAUX_NCTF_30 VSS_55 VSS_132 VCC_NCTF_59
T12 AB27 AJ9 T14
VCCAUX_NCTF_31 VSS_56 VSS_133 VCC_NCTF_60
R12 AA27 AB9 R14
VCCAUX_NCTF_32 VSS_57 VSS_134 VCC_NCTF_61
P12 Y27 W9 P14
VCCAUX_NCTF_33 VSS_58 VSS_135 VCC_NCTF_62
N12 U27 R9 N14
VCCAUX_NCTF_34 VSS_59 VSS_136 VCC_NCTF_63 P1.05V
M12 T27 M9 M14
VCCAUX_NCTF_35 VSS_60 VSS_137 VCC_NCTF_64
AD11 R27 J9
VCCAUX_NCTF_36 VSS_61 VSS_138
AD10 P27 F9 T10
VCCAUX_NCTF_37 VSS_62 VSS_139 VTT_NCTF_1
K10 N27 C9 R10
VCCAUX_NCTF_38 VSS_63 VSS_140 VTT_NCTF_2
M27 A9 P10
VSS_64 VSS_141 VTT_NCTF_3
G27 AL8 N10
VSS_65 VSS_142 VTT_NCTF_4
AE6 E27 AG8 L10
VSS_155 VSS_66 VSS_143 VTT_NCTF_5
AB6 C27 AE8 D1
VSS_156 VSS_67 VSS_144 VTT_NCTF_6
W6 B27 U8
VSS_157 VSS_68 VSS_145
T6 AL26 AA7 AD3
VSS_158 VSS_69 VSS_146 VSS_172
M6 AH26 V7 W3
VSS_159 VSS_70 VSS_147 VSS_173
K6 W26 R7 T3
VSS_160 VSS_71 VSS_148 VSS_174
AN5 U26 N7 B3
VSS_161 VSS_72 VSS_149 VSS_175
AJ5 AN25 H7 AK2
VSS_162 VSS_73 VSS_150 VSS_176
B5 AK25 E7 AH2
VSS_163 VSS_74 VSS_151 VSS_177
AA4 AG25 B7 AF2
VSS_164 VSS_75 VSS_152 VSS_178
V4 AE25 AL6 AB2
VSS_165 VSS_76 VSS_153 VSS_179
R4 J25 AG6 M2
VSS_166 VSS_77 VSS_154 VSS_180
N4 K2
VSS_167 VSS_181
K4 H2
VSS_168 VSS_182
H4 F2
A E4
VSS_169 VSS_183
V1
A
VSS_170 VSS_184
AL3 R1
VSS_171 VSS_185
SAMSUNG
ELECTRONICS

N310
4 3 2 1
N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D ICH7-M B0 Stepping : QK65 D
PRTC_BAT
Internal VR Strap
Enable Pull up
(VccSus1_05 : NC)
R118 R82
Disable Pull down 680K 1M
1% 5%
LPC3_LAD(3:0)
g
CHP3_XTALIN_MN AB1 AA6 0
RTXC1 LAD0
CHP3_XTALOUT_MN AB2 AB5 1
RTCX2 LAD1
AC4 2
LAD2
R24 10M
CHP3_RTCRST# AA3
RTCRST* LAD3
Y6 3
un al
Y5 AC3
0.032768MHz INTRUDER* LDRQ0*
W4 AA5
INTVRMEN LDRQ1*_GPIO23
1 4 CHP3_INTRUDER#_MN
W1 AB3
CHP3_INTVRMEN_MN Y1
EE_CS LFRAME* LPC3_LFRAME#
2 3 EE_SHCLK
C47 Y1 C9 Y2
EE_DOUT A20GATE
AE22
KBC3_A20G
0.007nF 0.007nF W3 AH28
EE_DIN A20M* CPU1_A20M# P1.05V
V3 AG27 R70 0
ms nti
LAN_CLK CPUSLP* CPU1_SLP#
CPU1_SLP#_R_MN
U3 AF24 nostuff R15
LAN_RSTSYNC TP1_DPRSTP*
AH25 CPU1_DPRSTP# 56.2
U5
TP2_DPSLP* CPU1_DPSLP# 1%
C C72 V4
LAN_RXD0
AG26
C
0.022nF T5
LAN_RXD1 FERR* 7-B3
CPU1_FERR#
LAN_RXD2 49-C3
50V AG24
U7
GPIO49_CPUPWRGD CPU1_PWRGDCPU
LAN_TXD0
V6 AG22
V7
LAN_TXD1 IGNNE*
AG21
CPU1_IGNNE#
LAN_TXD2 INIT3_3V*
ICH500-1 INIT*
AF22
CPU1_INIT#
Sa de
x1 / x2 Docking R114 33 5%
HDA3_BCLK_R_MN U1 AF25
P3.3V HDA3_AUD_BCLK ACZ_BIT_CLK INTR CPU1_INTR
ACZ_SYNC PORT X Line PU PD HDA3_AUD_SYNC
R116 33 5%
HDA3_SYNC_R_MN R6
ACZ_SYNC 82801GBM
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

AG23
RCIN* KBC3_RCIN#
1 1x2 / 2x1 STUFF NO_STUFF HDA3_AUD_RST#
R115 33 5%
HDA3_RST#_R_MN R5
ACZ_RST* 1/5 P1.05V
AH24
NMI CPU1_NMI
0 4x1 NO_STUFF STUFF T2 AF23
HDA3_AUD_SDI0 ACZ_SDIN0 SMI* CPU1_SMI#
R16
8. Block Diagram and Schematic

R80 T3
ACZ_SDIN1
nfi
10K T1 AH22 56.2
ACZ_SDIN2 STPCLK* CPU1_STPCLK# 1%
R117 33 5%
HDA3_SDO_R_MN T4 AF26 CPU1_THRMTRIP#_R_MN R17 27.4
HDA3_AUD_SDO ACZ_SDOUT THERMTRIP* 1% CPU1_THRMTRIP#
AF18
CHP3_SATALED# SATALED*
DD0
AB15 C810
SAT1_HDD_RXN C517 10nF 25V SAT1_HDD_RXN_C_MN AF3
SATA0RXN DD1
AE14 0.1nF
C518 10nF 25V SAT1_HDD_RXP_C_MN AE3 AG13 50V
SAT1_HDD_RXP C515 10nF 25V AG2
SATA0RXP DD2
AF13 *Layout Note
SAT1_HDD_TXN SAT1_HDD_TXN_C_MN SATA0TXN DD3
C516 10nF 25V SAT1_HDD_TXP_C_MN AH2 AD14 27.4ohm resistor needs
SAT1_HDD_TXP SATA0TXP DD4
AC13 to placed within 2" of ICH7-M
DD5
AF7 AD12
SATA2RXN DD6 56.2ohm must be placed
AE7 AC12
Co
SATA2RXP DD7 to placed within 2" of 27.4ohm w/o stub
AG6 AE12
SATA2TXN DD8
B AH6
SATA2TXP DD9
AF12 B
AB13
DD10
AF1 AC14
CLK1_SATA# AE1
SATA_CLKN DD11
AF14
CLK1_SATA SATA_CLKP DD12
AH13
DD13
AH10 AH14
P3.3V SATARBIASN DD14
CHP3_SATARBIAS_MN AG10 AC15
SATARBIASP DD15
P3.3V_MICOM AF15 AH17
DIOR* DA0
AH15 AE17
DIOW* DA1
AF16 AF17
DDACK* DA2
R23 8.2K CHP3_IDEIRQ_MN AH16
IDEIRQ
PRTC_BAT R22 4.7K CHP3_IORDY_MN AG16 AE16
IORDY DCS1*
AE15 AD16
DDREQ DCS3*
C161 R81 0904-002053
1000nF 24.9

1
1%
D13

3
3711-000541 BAT54C
R207
20K Place near to the ICH7

2
MNT2
4 RTC1_BATT_R_MN 1%
MNT1
3
2 CHP3_RTCRST#
1 R206 1K
1%
A HDR-2P-SMD C162 A
J504 1000nF-X5R R208 CMOS
25V 1M
RESET
RTC Battery nostuff SAMSUNG
PLACE TO BOTTOM
BA39-00534A ARROUND WIBRO DOOR ELECTRONICS
BA39-00598A (New)

8-16
4 3 2 1
8-17
4 3 2 1
SAMSUNG PROPRIETARY P3.3V CHP3_GPIO21_SATA0GP_MN
THIS DOCUMENT CONTAINS CONFIDENTIAL P3.3V CHP3_GPIO19_SATA1GP_MN AC caps : PCIE need to be within 250mils of the driver
PROPRIETARY INFORMATION THAT IS CHP3_GPIO36_SATA2GP_MN Resistor for Test : Place Stuffing Option to minimize stubs
SAMSUNG ELECTRONICS CO’S PROPERTY. CHP3_GPIO37_SATA3GP_MN
ICH7-M
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. P3.3V_AUX R79 10K AF19 F26
R164 GPIO21_SATA0GP PERN1 PEX1_MINIRXN1
10K R20 10K AH18
GPIO19_SATA1GP PERP1
F25
PEX1_MINIRXP1
R78 10K AH19 WIRELESS LAN PETN1 E28 C590 100nF 10V
R77 10K AE19
GPIO36_SATA2GP
E27 C587 100nF 10V
PEX1_MINITXN1
CHP3_GPIO1_REQ5#_MN GPIO37_SATA3GP PETP1 PEX1_MINITXP1
P3.3V_AUX
E18 D7 C22 H26
C18
AD0 REQ0*
E7
PCI3_REQ0# SMB3_CLK B22
SMBCLK PERN2
H25
PEX1_MINRXN2
D A16
AD1 GNT0*
C16
SMB3_DATA A26
SMBDATA
HSDPA
PERP2
G28 C588 100nF 10V
PEX1_MINRXP2 D
AD2 REQ1* PCI3_REQ1# SMB3_LINKALERT# LINKALERT* PETN2 PEX1_MINTXN2
F18
AD3 GNT1*
D16
CHP3_SMLINK0 B25
SMLINK0 PETP2
G27 C589 100nF 10V
PEX1_MINTXP2
E16 C17 A25
A18
AD4 REQ2*
D17 PCI3_REQ2# CHP3_SMLINK1 SMLINK1
K26
AD5 GNT2* R606 R599 PERN3 PEX1_LAN_RXN3
E17 E13 10K 10K 5% CHP3_RT#_MN A28 K25
A17
AD6 REQ3*
F13 PCI3_REQ3# RI* GIGABIT LAN PERP3 J28 C592 100nF 10V
PEX1_LAN_RXP3
AD7 GNT3* PCI3_GNT3# PETN3 PEX1_LAN_TXN3
A15
AD8 GPIO22_REQ4*
A13
CHP3_BIOSWP# AUD3_SPKR A19
SPKR PETP3
J27 C591 100nF 10V
PEX1_LAN_TXP3
C14 A14 A27
E14
AD9 GPIO48_GNT4*
C8
CHP3_SUSSTAT# A22
SUS_STAT*
M26
D14
AD10 GPIO1_REQ5*
D8
ITP3_DBRRESET# SYS_RST* PERN4
M25 PEX1_MINITXN1_C_MN
AD11 SPI BOOT GPIO17_GNT5* PERP4
g
B12 AB18 L28 PEX1_MINITXP1_C_MN
AD12 CHP3_GPIO17_GNT5#_MN MCH3_BMBUSY# GPIO0_BM_BUSY* PETN4
C13
AD13 C_BE0*
B15 R151 PETP4
L27
G15
G13
AD14 ICH500-2 C_BE1*
C12
D12
1K
5%
SMB3_ALERT#
B23
SMBALERT*_GPIO11 ICH500-3 P26
PEX1_MINITXN2_C_MN
PEX1_MINITXP2_C_MN
AD15 C_BE2* PERN5
E12
82801GBM C15 AC20 82801GBM P25
un al
C11
AD16 C_BE3* CHP3_PCISTP# AF21
GPIO18_STPPCI* PERP5
N28 PEX1_LAN_TXN3_C_MN
D11
AD17
AD18 2/5 IRDY*
A7
PCI3_IRDY#
CHP3_CPUSTP# GPIO20_STPCPU* 3/5 PETN5
PETP5
N27 PEX1_LAN_TXP3_C_MN
A11 E10 A21
AD19 PAR GPIO26
A10 B18 T25
AD20 PCIRST* P3.3V_AUX PERN6
F11 0904-002053 A12 B21 0904-002053 T24
F10
AD21 DEVSEL*
C9
PCI3_DEVSEL# E23
GPIO27 PERP6
R28
E9
AD22 PERR*
E11
PCI3_PERR# GPIO28 PETN6
R27
D9
AD23 PLOCK*
B10
PCI3_PLOCK# AG18
PETP6
B9
AD24 SERR*
F15
PCI3_SERR# PCI3_CLKRUN# GPIO32_CLKRUN*
V26
R145
ms nti
A8
AD25 STOP*
F14 PCI3_STOP# AC19
DMI0RXN
V25 DMI1_RXN0
AD26 TRDY* PCI3_TRDY# 1K GPIO33_AZ_DOCK_EN* DMI0RXP DMI1_RXP0
A6 F16 U2 U28
C7
AD27 FRAME* PCI3_FRAME# GPIO34_AZ_DOCK_RST* DMI0TXN
U27 DMI1_TXN0
B6
AD28
C26 CHP3_WAKE#_MN F20
DMI0TXP DMI1_TXP0
C E6
AD29 PLTRST*
A9
PLT3_RST_ORG# AH21
WAKE*
Y26
C
D6
AD30 PCICLK
B19 CLK3_PCLKICH CHP3_SERIRQ AF20
SERIRQ DMI1RXN
Y25 DMI1_RXN1
AD31 PME*
F21
THM3_ALERT# THRM* DMI1RXP
W28
DMI1_RXP1
A3
TP3
AD22
DMI1TXN
W27 DMI1_TXN1
PCI3_INTA# B4
PIRQA* VRM3_CPU_PWRGD VRMPWRGD DMI1TXP DMI1_TXP1
PCI3_INTB# C5
PIRQB*
G8 AB26
PCI3_INTC# B5
PIRQC* GPIO2_PIRQE*
F7
PCI3_INTE# AC1
DMI2RXN
AB25
PCI3_INTD# PIRQD* GPIO3_PIRQF* PCI3_INTF# CLK3_ICH14 CLK14 DMI2RXP
Sa de
F8 B2 AA28
AE5
GPIO4_PIRQG*
G7 PCI3_INTG# CLK3_USB48 CLK48 DMI2TXN
AA27
SATA1RXN GPIO5_PIRQH* PCI3_INTH# DMI2TXP
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

AD5 C20
SATA1RXP SUSCLK
AG4 AD25
SATA1TXN DMI3RXN
AH4 B24 AD24
AD9
SATA1TXP CHP3_SLPS3# D23
SLP_S3* DMI3RXP
AC28
SATA3RXN Internallly ANDed with the PWROK input CHP3_SLPS4# SLP_S4* DMI3TXN
8. Block Diagram and Schematic

AE9 F22 AC27


SATA3RXP CHP3_SLPS5# SLP_S5* DMI3TXP
nfi
AG8 AH20
AH8
SATA3TXN MCH_SYNC* MCH3_ICHSYNC# AA4 AE28
SATA3TXP KBC3_PWRGD PWROK DMI_CLKN CLK1_PCIEICH#
R84 10K AE27
AC22
DMI_CLKP CLK1_PCIEICH
CHP3_DPRSLPVR GPIO16_DPRSLPVR
C25 P1.5V_PCIE
P3.3V_AUX DMI_ZCOMP
R607 10K CHP3_TP0_BATLOW#_MN C21 TP0_BATLOW* DMI_IRCOMP
D25 R143 24.9 CHP2_DMICOMP_MN
ICH7 BOOT BIOS SELECT R602 1K
1%
KBC3_PWRBTN# KBC3_PWRBTN#_R_MN C23 PWRBTN* OC0*
D3
C4 P3.3V_AUX
SPI PCI LPC OC1*
R162 0 PLT3_RST#_R2_MN C19 D5
PLT3_RST# LAN_RST* OC2*
GNT5* 0 1 1 OC3*
D4 R154 1K 5% CHP3_OC1_MN
Y4 E5
P3.3V_AUX GNT4* 1 0 1 KBC3_RSMRST# RSMRST* OC4*
R83 100K 1% C3 R155 1K
Co
5% CHP3_OC2_MN
GPIO29_OC5*
AC21 A2
Default : LPC Boot P3.3V P3.3V_AUX GPIO6 GPIO30_OC6*
B nostuff
KBC3_RUNSCI#
AC18
GPIO7 GPIO31_OC7*
B3 B
nostuff U10 (0 : Pull Down / 1 : Default) E21
1
5 7SZ08 KBC3_EXTSMI# E20
GPIO8
F1
PLT3_RST_ORG# + GPIO9 USBP0N USB3_P0-
4 A20 F2
2
PLT3_RST# F19
GPIO10 USBP0P
G4
USB3_P0+
- GPIO12 USBP1N USB3_MINIPCIE1-
3 R147
100K
Memory Size Setting R74
10K
KBC3_WAKESCI#
E19
R4
GPIO13 USBP1P
G3
H1
USB3_MINIPCIE1+
GPIO14 USBP2N USB3_P2-
1% 1% R144 10K CHP3_GPIO25_MN E22 H2
GPIO39 R3
GPIO15 USBP2P
J4 USB3_P2+
GPIO24 USBP3N USB3_MINIPCIE2-
256MB 0 (R108) R146 1K D20
GPIO25 BIOS RESET
J3
5%
AD21
USBP3P
K1 USB3_MINIPCIE2+
CHP3_SATACLKREQ# GPIO35_SATACLKREQ* USBP4N USB3_MMC-
R163 0 512MB 1 (R107) nostuff AD20
GPIO38 USBP4P
K2
USB3_MMC+
AE20 L4
GPIO39 USBP5N
L5
USB3_BLUETOOTH-
R2
USBP5P
M1
USB3_BLUETOOTH+
P3.3V P3.3V SPI3_CLK P6
SPI_CLK USBP6N
M2 USB3_P6-
SPI3_CS0# P1
SPI_CS* USBP6P
N4
USB3_P6+
SPI_ARB USBP7N
N3
USB3_CAMERA-
USBP7P USB3_CAMERA+ USB CONFIG.
P2 D2
SPI3_MISO P5
SPI_MISO USBRBIAS*
D1
USB 0 : USB #1
R794 R795 SPI3_MOSI SPI_MOSI USBRBIAS CHP3_USBRBIAS_MN USB 1 : WLAN / WIMAX
2.2K 2.2K USB 2 : USB #2(chargerble)
R156 USB 3 : HSDPA
USB 4 : MultiCard(3 in 1)
22.6

G
USB 5 : Bluetooth

1
Q520 1% USB 6 : USB #3
RHU002N06 USB 7 : CAMERA
SMB3_CLK SMB3_CLK_S

D
P3.3V

3
A A

G
1
Q521
RHU002N06
SMB3_DATA SMB3_DATA_S
SAMSUNG

D
R588 10K

2
CHP3_PCISTP#

3
ELECTRONICS
R160 0 R141 10K
CHP3_CPUSTP#
R161 0

N310
4 3 2 1
N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. AD17 L11
CHP3_P5.0V_V5REF_MN V5REF_1 VCC1_05_1 P1.05V
G10 L12
V5REF_2 VCC1_05_2
F6 L14
ICH7-M
V5REF_SUS VCC1_05_3
L16
VCC1_05_4
AA22 L17
VCC1_5_B_1 VCC1_05_5
AA23 L18 EC6
P5.0V_AUX P3.3V_AUX P5.0V P3.3V VCC1_5_B_2 VCC1_05_6 C98
D AB22
VCC1_5_B_3 VCC1_05_7
M11 C70 C71 1000nF 330uF D
AB23 M18 100nF 100nF 6.3V 2.5V
VCC1_5_B_4 VCC1_05_8 AL
AC23 P11 10V 10V
1 1 VCC1_5_B_5 VCC1_05_9
R165 D11 R150 D10 AC24 P18
AC25
VCC1_5_B_6 VCC1_05_10
T11 within 100 mils
10 BAT54 100 BAT54 VCC1_5_B_7 VCC1_05_11 nearby Pin M18, U18
1% 3 1% 3 AC26 T18
VCC1_5_B_8 VCC1_05_12
AD26 U11
VCC1_5_B_9 VCC1_05_13
CHP3_P5.0VAUX_VREF_SUS_MN AD27 U18
VCC1_5_B_10 VCC1_05_14
AD28 V11
VCC1_5_B_11 VCC1_05_15
nearby F6 C104 nearby G10 C102 D26
VCC1_5_B_12 VCC1_05_16
V12
100nF 100nF D27 V14
VCC1_5_B_13 VCC1_05_17
g
10V 10V D28 V16
VCC1_5_B_14 VCC1_05_18 P3.3V
E24 V17
VCC1_5_B_15 VCC1_05_19
E25
E26
VCC1_5_B_16 ICH500-4 VCC1_05_20
V18
VCC1_5_B_17
F23 82801GBM V1 C77 within 100 mils
un al
VCC1_5_B_18 VCCSUS3_3_VCCLAN3_3_1
F24
VCC1_5_B_19 VCCSUS3_3_VCCLAN3_3_2
V5 100nF nearby Pin V5
P1.5V P1.5V_PCIE
G22
VCC1_5_B_20 4/5 VCCSUS3_3_VCCLAN3_3_3
W2 10V
P3.3V_AUX P3.3V
G23 W7
VCC1_5_B_21 VCCSUS3_3_VCCLAN3_3_4
B9 H22
VCC1_5_B_22 0904-002053
BLM18PG181SN1 H23 R7
CHP3_P1.5V_5_B_MN VCC1_5_B_23 VCCSUS3_3_VCCSUSHDA
J22 U6
VCC1_5_B_24 VCC3_3_VCCHDA
J23
VCC1_5_B_25 P1.05V
EC501 K22
VCC1_5_B_26 V_CPU_IO_1
AE23 C73 C74
220uF C95 C34 C69 K23 AE26 100nF 100nF
ms nti
VCC1_5_B_27 V_CPU_IO_2
2.5V 100nF 100nF 100nF L22 AH26 10V 10V
AD VCC1_5_B_28 V_CPU_IO_3
10V 10V 10V L23
M22
VCC1_5_B_29
AB12 C37 C35 C36
VCC1_5_B_30 VCC3_3_3 4700nF
within 100mils M23 AB20 100nF 100nF
C N22
VCC1_5_B_31 VCC3_3_4
AC16 10V 10V
6.3V C
nearby D28, T28, AD28 N23
VCC1_5_B_32 VCC3_3_5
AD13
P22
VCC1_5_B_33 VCC3_3_6
AD18
within 100 mils
P23
VCC1_5_B_34 VCC3_3_7
AG12 nearby Pin AE23, AH26 P3.3V
VCC1_5_B_35 VCC3_3_8
R22 AG15
VCC1_5_B_36 VCC3_3_9
R23 AG19
VCC1_5_B_37 VCC3_3_10
R24 AH11
VCC1_5_B_38 VCC3_3_11
Sa de
R25
VCC1_5_B_39 VCC3_3_12
B13 C100 C40 C101 C39 C38
R26 B16 100nF 100nF 100nF 100nF 100nF
- This Document can not be used without Samsung's authorization -

VCC1_5_B_40 VCC3_3_13
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

T22 B27 10V 10V 10V 10V 10V


VCC1_5_B_41 VCC3_3_14
T23 B7
VCC1_5_B_42 VCC3_3_15
T26
VCC1_5_B_43 VCC3_3_16
C10 Distribute in PCI section
T27 D15
VCC1_5_B_44 VCC3_3_17
8. Block Diagram and Schematic

P3.3V T28 F9
VCC1_5_B_45 VCC3_3_18
nfi
U22 G11
VCC1_5_B_46 VCC3_3_19
U23 G12
VCC1_5_B_47 VCC3_3_20 PRTC_BAT
V22 G16
VCC1_5_B_48 VCC3_3_21
C114 V23
within 100 mils W22
VCC1_5_B_49
W5
B3 100nF
VCC1_5_B_50 VCCRTC
BLM18PG181SN1 10V W23
CHP3_P1.5V_VCCDMIPLL_R_MN VCC1_5_B_51
Y22
VCC1_5_B_52 VCCSUS3_3_1
A24 C45 C44
Y23 C24 100nF 100nF
P1.5V VCC1_5_B_53 VCCSUS3_3_2
L1 D19 10V 10V
within 100 mils A5
VCCSUS3_3_3
D22
1uH nearby AG28 VCC3_3_1 VCCSUS3_3_4
R13 2.2 AG28
VCCDMIPLL VCCSUS3_3_5
E3
R12 2.2 CHP3_P1.5V_VCCDMIPLL_MN G19 P3.3V_AUX
C32 VCCSUS3_3_6
C33 A1 K3
Co
10000nF
P1.5V VCC1_5_A_1 VCCSUS3_3_7
10nF AB10 K4
6.3V VCC1_5_A_2 VCCSUS3_3_8
B 25V AB17
VCC1_5_A_3 VCCSUS3_3_9
K5 B
AB7
VCC1_5_A_4 VCCSUS3_3_10
K6 C96 C76 C97 C105 within 100 mils
AB8
VCC1_5_A_5 VCCSUS3_3_11
L1 100nF 100nF 100nF 100nF nearby Pin C24, G19, K5, M6
within 100 mils C48 AB9
VCC1_5_A_6 VCCSUS3_3_12
L2 10V 10V 10V 10V
100nF AC10 L3
VCC1_5_A_7 VCCSUS3_3_13
10V AC17 L6
VCC1_5_A_8 VCCSUS3_3_14
AC6 L7
P3.3V VCC1_5_A_9 VCCSUS3_3_15
M6
VCCSUS3_3_16
AD2 M7
VCCSATAPLL VCCSUS3_3_17 P1.5V
AA7 N7
VCC3_3_2 VCCSUS3_3_18
within 100 mils C46 AC7
VCC1_5_A_10 VCC1_5_A_19
AF9
100nF P1.5V AC8 AG5
within 100 mils VCC1_5_A_11 VCC1_5_A_20
10V
nearby AC10 AD10
VCC1_5_A_12 VCC1_5_A_21
AG9 C43 C99 within 100 mils
AD6
VCC1_5_A_13 VCC1_5_A_22
AH5 100nF 100nF nearby Pin AG9, F17
AE10 AH9 10V 10V
VCC1_5_A_14 VCC1_5_A_23
C41 C42 AE6
VCC1_5_A_15 VCC1_5_A_24
F17
1000nF 100nF AF10 G17
VCC1_5_A_16 VCC1_5_A_25
25V 10V AF5
P3.3V_AUX VCC1_5_A_17
AF6 C28
VCC1_5_A_18 VCCSUS1_05_1
G20
VCCSUS1_05_2 P1.5V
P7 K7
VCCSUS3_3_19 VCCSUS1_05_3
within 100 mils C75 C1
VCCUSBPLL VCC1_5_A_26
H6
100nF P1.5V H7
VCC1_5_A_27
10V AA2
VCCSUS1_05_VCCLAN1_05_1 VCC1_5_A_28
J6 C103 within 100 mils
Y7
VCCSUS1_05_VCCLAN1_05_2 VCC1_5_A_29
J7 100nFnearby Pin J7
T7 10V
A C106
VCC1_5_A_30 A
within 100 mils
100nF
10V
SAMSUNG
ELECTRONICS

8-18
4 3 2 1
4 3 2 1

8-19
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
ICH7-M
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

M12
M13
M14
M15
M16
M17
M24
H27
H28

K24
K27
K28
L13
L15
L24
L25
L26
J24
J25
J26
H3
H4
H5
J1
J2

J5
A23 M27

VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_1 VSS_124
A4 M28
D AA1
VSS_2 VSS_125
M3
D
VSS_3 VSS_126
AA24 M4
VSS_4 VSS_127
AA25 M5
P3.3V_AUX VSS_5 VSS_128
AA26 N1
VSS_6 VSS_129
AB11 N11
VSS_7 VSS_130
AB14 N12
VSS_8 VSS_131
R600 10K
CHP3_SMLINK0 AB16
VSS_9 VSS_132
N13
R601 10K AB19 N14
CHP3_SMLINK1 AB21
VSS_10 VSS_133
N15
VSS_11 VSS_134
R603 10K AB24 N16
SMB3_ALERT# VSS_12 VSS_135
g
AB27 N17
VSS_13 VSS_136
R605 2.2K AB28 N18
R604 2.2K SMB3_DATA AB4
VSS_14 VSS_137
N2
SMB3_CLK AB6
VSS_15 VSS_138
N24
VSS_16 VSS_139
AC11 N25
ICH500-5
un al
VSS_17 VSS_140
AC2 N26
P3.3V_AUX VSS_18 VSS_141
AC5 N5
AC9
VSS_19 82801GBM VSS_142
N6
VSS_20 VSS_143
R540 1K 1%
AD1
AD11
VSS_21 5/5 VSS_144
P12
P13
PEX3_WAKE# AD15
VSS_22 VSS_145
P14
VSS_23 VSS_146
AD19 0904-002053 P15
VSS_24 VSS_147
Wake on PCI-E, OD, Pull-up to ALWAYS power AD23
VSS_25 VSS_148
P16
AD3 P17
ms nti
VSS_26 VSS_149
AD4 P24
VSS_27 VSS_150
AD7 P27
VSS_28 VSS_151
AD8 P28
VSS_29 VSS_152
AE11 P3
C P3.3V AE13
VSS_30 VSS_153
P4
C
VSS_31 VSS_154
AE18 R1
VSS_32 VSS_155
AE2 R11
VSS_33 VSS_156
R142 10K AE21 R12
SMB3_LINKALERT# AE24
VSS_34 VSS_157
R13
VSS_35 VSS_158
R21 10K AE25 R14
PCI3_CLKRUN# AE4
VSS_36 VSS_159
R15
VSS_37 VSS_160
Sa de
R617 10K AE8 R16
R615 10K PCI3_PERR# AF11
VSS_38 VSS_161
R17
PCI3_PLOCK# VSS_39 VSS_162
R614 10K AF2 R18
- This Document can not be used without Samsung's authorization -

PCI3_DEVSEL# VSS_40 VSS_163


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

R149 10K AF27 T12


PCI3_FRAME# VSS_41 VSS_164
R610 10K
PCI3_STOP# AF28
VSS_42 VSS_165
T13
R616 10K AF4 T14
PCI3_SERR# VSS_43 VSS_166
R620 10K
PCI3_IRDY# AF8
VSS_44 VSS_167
T15
8. Block Diagram and Schematic

R611
nfi
10K AG1 T16
PCI3_TRDY# AG11
VSS_45 VSS_168
T17
VSS_46 VSS_169
AG14 T6
VSS_47 VSS_170
R625 10K AG17 U12
PCI3_INTA# VSS_48 VSS_171
R624 10K
PCI3_INTB# AG20
VSS_49 VSS_172
U13
R623 10K AG25 U14
PCI3_INTC# VSS_50 VSS_173
R622 10K
PCI3_INTD# AG3
VSS_51 VSS_174
U15
AG7 U16
VSS_52 VSS_175
AH1 U17
VSS_53 VSS_176
R619 10K AH12 U24
R152 10K PCI3_INTE# AH23
VSS_54 VSS_177
U25
PCI3_INTF# VSS_55 VSS_178
R618 10K
PCI3_INTG# AH27
VSS_56 VSS_179
U26
R153 10K AH3 U4
Co
PCI3_INTH# AH7
VSS_57 VSS_180
V13
VSS_58 VSS_181
B B1
VSS_59 VSS_182
V15 B
R621 10K B11 V2
PCI3_REQ0# VSS_60 VSS_183
R608 10K B14 V24
R609 10K PCI3_REQ1# B17
VSS_61 VSS_184
V27
PCI3_REQ2# VSS_62 VSS_185
R612 10K
PCI3_REQ3# B20
VSS_63 VSS_186
V28
B26 W24
VSS_64 VSS_187
B28 W25
VSS_65 VSS_188
B8 W26
VSS_66 VSS_189
R19 10K C2 W6
CHP3_SERIRQ C27
VSS_67 VSS_190
Y24
VSS_68 VSS_191
C6 Y27
VSS_69 VSS_192
D10 Y28
VSS_70 VSS_193

VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
R18 10K D13 Y3
KBC3_RCIN# VSS_71 VSS_194
R72 10K
KBC3_A20G
R613 1K

D18
D21
D24
E1
E15
E2
E4
E8
F12
F27
F28
F3
F4
F5
G1
G14
G18
G2
G21
G24
G25
G26
G5
G6
G9
H24
PCI3_GNT3#
A A
SAMSUNG
ELECTRONICS

N310
4 3 2 1
N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
02 VERIFY REAL MODE 66 CONFIGURE ADVANCE CACHE REG.
03 DISABLE NMI 6A DISPLAY EXTERNAL CACHE SIZE
04 GET CPU TYPE 6C DISPLAY SHADOW MESSAGE
06 INIT. SYSTEM H/W 6E DISPLAY NON-DISPOSABLE SEGMENT
D 08 INIT. CHIPSET REG. 70 DISPLAY ERROR MESSAGE D
09 SET IN POST FLAG 72 CHECK FOR CONFIGURATION ERROR
0A INIT CPU.REG 74 TEST REAL-TIME CLOCK
0B CPU CACHE ON 76 CHECK FOR KEYBOARD EERROR
0C INIT.CACHE TO POST 7C SETUP HARDWARE INTERRUPT VECTOR
OE INIT. I/O VALUE 7E TEST COPROCESSER IF PRESENT
0F ENABLE THE L-BUS IDE 80 DISABLE ON-BOARD I/O PORT
10 INIT. POWER MANAGER 82 DETECT AND INSTALL EXT.RS232C
11 LOAD ALTERNATE REG. 84 DETECT AND INSTALL EXT.PARALLEL
13 PCI BUS MASTER RESET 86 RE-INIT. ON-BOARD I/O PORT
88 INIT. BIOS DATA ROM
g
WITH INITIAL POST VALUE 8A INIT.EXTENDED BIOS DATA AREA
14 INIT. KEYBOARD CONTROLLER 8C INIT. FDD CONTROLLER
16 CHECK CHECKSUM 9A SHADOW OPTION ROMS
18 8254 TIMER INIT. 9C SETUP POWER MANAGEMENT
1A 8237 DMA CONTROLLER INIT. 9E ENABLE H/W INTERRUPT
un al
1C RESET INTERRUP CONTROLLER A0 SET TIME OF DAY
20 TEST DRAM REFRESH A4 INIT. TYPEMATIC RATE
22 TEST 8742 KEYBOARD CONTROLLER A8 ERASE F2 PROMPT
24 SET ES SEGMENT REG. TO 4GB AA SCAN FOR F2 KEY STROKE
26 ENABLE A20 AC ENTER SETUP
28 AUTO SIZING DRAM AE CLEAR IN POST FLAG
SPI_BIOS_ROM
32 COMPUTE THE CPU SPEED B0 CHECK FOR ERRORS
34 TESET CMOS RAM B2 POST DONE-PREPARE TO BOOT O/S
38 SHADOW SYSTEM BIOS ROM B4 ONE BEEP
ms nti
3A AUTO SIZING CACHE B6 CHECK PASSWORD (OPTION)
3C CONFIGURE ADVANCED CHIPSET REG. B7 ACPI INIT
3D LOAD ALTER REG. WITH CMOS VALUE BA DMI INIT
C 42 INIT. INTERRUPT VECTOR BE CLEAR SCREEN C
44 INIT. BIOS INTERRUPT C0 TRY BOOT WITH INT19
P3.3V 46 CHECK ROM COPYRIGHT NOTICE D0 INTERRUPT HANDLER ERROR
47 INIT. I20 SUPPORT IF INSTALLED D2 UNKNOWN INTERRUPT ERROR
48 CHECK VIDEO CONFIGURE AGAINST CMOS D4 PENDING INTERRUPT ERROR
49 INIT. PCI BUS AND DEVICE D6 SHUTDOWN 5
4A INIT. ALL VIDEO BIOS ROM D8 SHUTDOWN ERROR
VSS SI SPI3_MOSI 4C SHADOW VIDEO BIOS ROM DA EXTENDED BLOCK MOVE
Sa de
CHP3_BIOSWP#
R87 0 CHP3_BIOSWP#_R_MN 4
WP* SCK
5
SPI3_CLK 50 DISPLAY CPU TYPE AND SPEED DC SHUTDOWN 10
R119 12.1 SPI3_MISO_R_MN 3 6 SPI3_HOLD#_MN R88 52 TEST KEYBOARD 89 ENABLE NMI
- This Document can not be used without Samsung's authorization -

SPI3_MISO SO HOLD*
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

1% 2 7 10K 54 SET KEYCLICK IF ENABLED 90 INIT. HDD CONTROLLER


SPI3_CS0# CE* VDD
1 8 1% 56 ENABLE KEYBOARD 91 INIT. LOCAL BUS HDD CONTROLLER
MX25L1605D 58 TEST FOR UNEXPECTED INTERRUPTS 92 JUMP TO USER PATCH 2
U6 C49 5A DISPLAY " PRESS ...... SETUP" 94 DISABLE A20 ADDRESS LINE
8. Block Diagram and Schematic

R86 1107-001709
100nF
5C TEST RAM GETWEEN 512K AND 640K 96 CLEAR HUGE ES SEGMENT REG.
nfi
10K 10V
60 TEST EXTENDED MEMORY 98 SEARCH FOR OPTION ROMS
1% 62 TEST EXTENDED MEMORY ADDRESS LINE
64 JUMP TO USER PATCH 1
80H DECODER CONNECTOR
Co
B B
P3.3V
J20
HDR-10P-SMD
1
2
PLT3_RST# 3
CLK3_DBGLPC 4
LPC3_LFRAME# 5
LPC3_LAD(3) 6
LPC3_LAD(2) 7
LPC3_LAD(1) 8
LPC3_LAD(0) 9
10
11 MNT1
12
MNT2
3711-002050
A A
SAMSUNG
ELECTRONICS

8-20
4 3 2 1
8-21
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS DDR SO-DIMM #0
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
Array resistors & Single resistors used to improve layout & routing.
ME POWER RAIL UNDER ME ENABLE
D D
MEM1_ADQ(63:0) P1.8V_AUX P0.9V
DDR1-2
DDR2-SODIMM-200P-RVS MEM1_AMA(13:0)
2/2
DDR1-1 112
VDD1 VSS16
18
DDR2-SODIMM-200P-RVS 111
VDD2 VSS17
24 0 R755 56
g
117 41 1 R753 56
MEM1_AMA(13:0)
1/2 96
VDD3
VDD4
VSS18
VSS19
53 2 R752 56
0 102
A0 DQ0
5 0 95
VDD5 VSS20
42 3 R754 56
1 101 7 1 118 54
A1 DQ1 VDD6 VSS21
2 100 17 2 81 59
un al
A2 DQ2 VDD7 VSS22
3 99
A3 DQ3
19 3 82
VDD8 VSS23
65 4 R751 56
4 98 4 4 P3.3V_M for AMT 87 60 5 R727 56
A4 DQ4 VDD9 VSS24
5 97
A5 DQ5
6 5 103
VDD10 VSS25
66 6 R749 56
6 94 14 6 P3.3V 88 127 7 R748 56
A6 DQ6 VDD11 VSS26
7 92 16 7 104 139
A7 DQ7 VDD12 VSS27
8 93 23 8 128
A8 DQ8 VSS28
9 91
A9 DQ9
25 9 199
VDDSPD VSS29
145 8 R726 56
10 105
A10_AP DQ10
35 10
C791 VSS30
165 9 R725 56
11 90 37 11 C792 83 171 10 R728 56
ms nti
A11 DQ11 100nF NC1 VSS31
12 89
A12 DQ12
20 12
10V
2200nF 120
NC2 VSS32
172 11 R750 56
13 116 22 13 10V 50 177
A13 DQ13 NC3 VSS33
86 36 14 69 187
A14 DQ14 NC4 VSS34
C 84
A15 DQ15
38 15 163
NCTEST VSS35
178 12 R723 56
C
MEM1_ABS2
85
A16_BA2 DQ16
43 16
MCH3_EXTTS0# VSS36
190 13 R761 56
45 17 1 9
DQ17 MEM1_VREF VREF VSS37
107 55 18 21
MEM1_ABS0
106
BA0 DQ18
57 19 C751 C752 201
VSS38
33
MEM1_ABS1 BA1 DQ19 100nF GND0 VSS39
44 20 2200nF 202 155
DQ20 10V GND1 VSS40
110 46 21 10V 34
MEM1_CS0# S0* DQ21 VSS41
115 56 22 47 132
MEM1_CS1# S1* DQ22 VSS1 VSS42
Sa de
DQ23
58 23 133
VSS2 VSS43
144
MEM1_CS0#
R759 56
CLK1_MCLK0
30
CK0 DQ24
61 24 183
VSS3 VSS44
156
MEM1_CS1#
R731 56
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

32 63 25 77 168
CLK1_MCLK0# CK0* DQ25 VSS4 VSS45
CLK1_MCLK1
164
CK1 DQ26
73 26 12
VSS5 VSS46
2
MEM1_CKE0
R722 56
CLK1_MCLK1#
166
CK1* DQ27
75 27 48
VSS6 VSS47
3 MEM1_CKE1 R747 56
79 62 28 184 15
MEM1_CKE0 CKE0 DQ28 VSS7 VSS48
8. Block Diagram and Schematic

MEM1_CKE1
80
CKE1 DQ29
64 29 78
VSS8 VSS49
27 MEM1_ODT0 R758 56
R732
nfi
74 30 71 39 56
DQ30 VSS9 VSS50 MEM1_ODT1
113 76 31 72 149
MEM1_ACAS# CAS* DQ31 VSS10 VSS51
**NOTE AMT MODEL MEM1_ARAS# 108
RAS* DQ32
123 32 121
VSS11 VSS52
161
MEM1_ABS0
R730 56
MEM1_AWE#
109
WE* DQ33
125 33 122
VSS12 VSS53
28
MEM1_ABS1
R760 56
SMB3_CLK/DATA_M 135 34 196 40 R724 56
DQ34 VSS13 VSS54 MEM1_ABS2
R763 10K 1% MEM3_CHA_SA0_MN 198
SA0 DQ35
137 35 193
VSS14 VSS55
138
R762 10K 1% MEM3_CHA_SA1_MN 200
SA1 DQ36
124 36 8
VSS15 VSS56
150 MEM1_ACAS# R756 56
SMB3_CLK_S
197
SCL DQ37
126 37
VSS57
162
MEM1_ARAS#
R757 56
SMB3_DATA_S
195
SDA DQ38
134 38
MEM1_AWE#
R729 56
136 39
DQ39
114 141 40 3709-001550
MEM1_ODT0 ODT0 DQ40
119 143 41
MEM1_ODT1 ODT1 DQ41
151
Co
42
MEM1_ADM(7:0) DQ42
0 10 153 43
DM0 DQ43
B 1 26
DM1 DQ44
140 44 B
2 52 142 45
DM2 DQ45
3 67 152 46
DM3 DQ46
4 130 154 47
DM4 DQ47
5 147 157 48
DM5 DQ48
6 170 159 49
DM6 DQ49 ME POWER RAIL UNDER ME ENABLE
7 185 173 50
DM7 DQ50
175 51
MEM1_ADQS(7:0)
0 13
DQ51
158 52 Place one cap close to every 2 pull-up resistors terminated to P0.9V
DQS0 DQ52 P0.9V
1 31
DQS1 DQ53
160 53 Place near SO-DIMM0
2 51 174 54 P1.8V_AUX
DQS2 DQ54
3 70 176 55
DQS3 DQ55
4 131 179 56 nostuff
DQS4 DQ56
5 148 181 57 EC509 C777 C757 C788 C753 C785 C780 C778 C789 C787 C754 C783 C761 C781 nostuff
DQS5 DQ57
6 169
DQS6 DQ58
189 58 220uF C759 C760 C755 C758 C756 C786 C779 C782 C784 nostuff
7 188 191 59 2.5V 2200nF 2200nF 2200nF 2200nF 2200nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF nostuff
DQS7 DQ59 AD
180 60 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V nostuff
MEM1_ADQS#(7:0) DQ60
0 11 182 61 nostuff
DQS*0 DQ61
1 29 192 62
DQS*1 DQ62
2 49 194 63
DQS*2 DQ63
3 68
DQS*3
4 129
DQS*4
5 146
DQS*5
6 167
DQS*6
7 186
DQS*7
3709-001550
A A
SAMSUNG
ELECTRONICS

N310
4 3 2 1
N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
CRT LCD
EXCEPT AS AUTHORIZED BY SAMSUNG.
LCD_VDD3.3V P3.3V VDC_LED P3.3V
D506
VCC_CRT MMBD4148 P5.0V
C26

BLM18PG181SN1
3 1
1000nF
C511
P3.3V

B8
100nF
D C559
6.3V
10V
D
100nF VDC_LED_B_MN
U504
10V
SN74AHCT1G125DCKR J6
HDR-30P-2R-SMD-MNT

2.2K
2.2K
5
2 + 4 R565 40.2 5%
CRT3_HSYNC OE*
- CRT5_HSYNC 1 2
3 CRT5_HSYNC_R_MN 3 4
1 LCD3_BRIT 5 6
7 8

R60
R61
9 10
g
11 12
13 14
15 16
VCC_CRT LCD1_ACLK 17 18 LCD1_ADATA2
un al
LCD1_ACLK# 19 20 LCD1_ADATA2#
LCD1_ADATA1 21 22 LCD1_ADATA0
C560 LCD1_ADATA1# 23 24 LCD1_ADATA0#
U505 25 26 LCD3_EDID_CLK
100nF
SN74AHCT1G125DCKR 27 28 LCD3_EDID_DATA
10V
29 30
5 31
MNT1
2 + 4 R566 40.2 5% 32
CRT3_VSYNC OE*
- CRT5_VSYNC MNT2
3 CRT5_VSYNC_R_MN
ms nti
1
3711-006896
P3.3V
C C
5 VDC P5.0V VDC_LED
1 + LCD3_BKLTON_R1_MN
KBC3_BKLTON
R541 1K 1%
LCD3_BKLTON
P3.3V P3.3V VCC_CRT 2 4
MCH3_LCD_BKLTEN - nostuff
U501 R536 R537
Sa de
3
R543 R544 7SZ08 0 0 Q16
R564 R534 100K 100K SI2307BDS-T1-E3
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

1% 1%
G

2.2K 2.2K
1

3
2

D
S
CRT3_DDCDATA CRT5_DDCDATA
S

LCD3_BKLTON_Q3_MN
R516
2

1
C510 C60

G
3

RHU002N06 C61
8. Block Diagram and Schematic

150K 100nF 100nF


Q509
nfi
1% 1000nF-X5R
R517 25V 25V
25V
LCD3_BKLTON_Q2_MN 51.1K 1%
P3.3V P3.3V VCC_CRT LCD3_BKLTON_QR_MN
R539
43.2K
P5.0V 1%
When source is VDC : 43.2K
R132 R133 LCD3_BKLTON_Q1_MN When source is P5.0V : 0 ohm
G

2.2K 2.2K
1

1 D 3
MMBD4148 Q503
CRT3_DDCCLK CRT5_DDCCLK
S

D503 3 R542 10K G1% RHU002N06


2

LCD3_BKLTON
3

RHU002N06
Co
CRT3_P5.0V_D_MN 1
Q23 LCD3_BKLTON_R2_MN S 2
B BLM18PG181SN1 B
B502
C536 For EBL.
CRT CONNECTOR CRT5_DDCDATA_CLK_D_MN
100nF
10V J9 P5.0V_STB P3.3V_AUX LCD_VDD3.3V
DSUB-15-3R-F
L500 82nH CRT3_RED_L_MN Q2
1 SI2315BDS-T1
CRT3_RED 6 R4
11

3
200K

2
L501 82nH CRT3_GREEN_L_MN 2 1%

D
S
CRT3_GREEN 7

1
C7

G
12 MCH3_LCD_VDDEN_Q_MN C25

1%
R797

1%

1%
L502 82nH CRT3_BLUE_L_MN 3
330nF
100nF
CRT3_BLUE 8
51.1K 1% 10V

0.022nF

0.022nF

0.022nF

0.022nF

0.022nF

150

150

150
0.022nF
13

1
50V

50V
4

50V

50V

50V

50V

PGB1010603NR
D500

PGB1010603NR
D505

PGB1010603NR
D504
MCH3_LCD_VDDEN_QR_MN
9 D 3
14 MCH3_LCD_VDDEN_R_MN Q3

2
5 16 R6 10K RHU002N06

C507

C533

C535
G

R515

R532

R533
C509

C508
C534
10 17
MCH3_LCD_VDDEN 1% 1
15 S 2
R7

nostuff
nostuff
nostuff
100K
3701-001403 1%
CRT5_DDCDATA
CRT5_DDCCLK
A CRT5_HSYNC A
CRT5_VSYNC
50V 50V 50V 50V
SAMSUNG

270pF

270pF

0.1nF

0.1nF
ELECTRONICS

C538

C561

C537

C562

8-22
4 3 2 1
8-23
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
P3.3V
D D
Codec Pin9 Setting
S/B with Low Voltage IO S/B without Low Voltage IO C669 C667 C668
10000nF-X5R
100nF 100nF
Pin9 : 1.5V Pin9 : 3.3V 10V
10V 10V
U516
ALC272-GR
1 36
9
DVDD LOUT1-R_PORT-D-R
35
AUD5_LINE_O_RIGHT
DVDD-IO LOUT1-L_PORT-D-L AUD5_LINE_O_LEFT
g
39
P4.75V_AUD LOUT2-L_PORT-A-L
5 41
HDA3_AUD_SDO 6
SDATA-OUT LOUT2-R_PORT-A-R
HDA3_AUD_BCLK BCLK
R631 22 HDA3_AUD_SDI0_R_MN 8 32
un al
HDA3_AUD_SDI0 10
SDATA-IN HPOUT-R_PORT-I-R
33
AUD5_HP_O_RIGHT
R590 HDA3_AUD_SYNC SYNC HPOUT-L_PORT-I-L AUD5_HP_O_LEFT
20K 11
1% HDA3_AUD_RST# RESET#
29 AUD5_CBP_MN C665 2200nF-X5R10V
CBP
AUD3_SPKR_Q_MN C865 1000nF-X5R 6.3V AUD3_SPKR_C_MN 12 30 AUD5_CBN_MN R626 4.7K5%
2203-006399|n_c1005-h0055 PC_BEEP CBN
R627 4.7K5% AUD5_MIC1_VREF_RIGHT
Q510 AUD5_MIC1_VREF_LEFT
C598 46
DMIC-CLK1_2 CPVEE
31 C664 2200nF-X5R10V
RHU002N06 D 3 44 AUD5_CPVEE_MN
R591 4.7nF DMIC-CLK3_4 2203-006399|n_c1005-h0055
1K 25V
2
GPIO0_DMIC01_2 MIC1-R_PORT-B-R
22 AUD5_MIC1_RIGHT_C_MN C616 1000nF-X5R 6.3V
AUD5_MIC1_RIGHT
R592 1K 1% G 1% 3 21 AUD5_MIC1_LEFT_C_MN C617 1000nF-X5R 6.3V
ms nti
AUD3_SPKR AUD3_GPIO1# GPIO1_DMIC-3_4 MIC1-L_PORT-B-L AUD5_MIC1_LEFT
1 2203-006399|n_c1005-h0055
AUD3_SPKR_R_MN 47 28 AUD5_MIC1_VREF_MN Do not make a testpoint in these nets
S 2 EAPD MIC1-VREFO
2203-006399|n_c1005-h0055
45 17 AUD5_MIC2_RIGHT_C_MN C618 1000nF-X5R 6.3V
C 48
SPDIFO2 MIC2-R_PORT-F-R
16 AUD5_MIC2_LEFT_C_MN C864 1000nF-X5R 6.3V
AUD5_MIC2_INT C
SPDIFO1 MIC2-L_PORT-F-L 2203-006399|n_c1005-h0055
G_AUD G_AUD 43 19 Do not make a testpoint in these nets
NC MIC2-VREFO AUD5_MIC2_VREF
R665 20K 1% AUD5_JDREF_R_MN 40
JDREF LINE1-R_PORT-C-R
24 3
23 2 1
1% 20K R630 AUD5_SENS_MIC_R_MN 13
LINE1-L_PORT-C-L AUD5_MIC1_VREF_LEFT AUD5_MIC1_VREF_RIGHT
AUD5_SENS_MIC# SENSEA
Sa de
1% 5.1K R664 AUD5_SENS_HP_R_MN 34 18 BAT54A
AUD5_SENS_HP# SENSEB LINE1-VREFO
- This Document can not be used without Samsung's authorization -

D507
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

4 15
DVSS_1 LINE2-R_PORT-E-R G_AUD
7 14
DVSS_2 LINE2-L_PORT-E-L
P4.75V_AUD
8. Block Diagram and Schematic

25 20
G_AUD AVDD1 LINE2-VREFO
38
AVDD2
nfi
37
MONO-OUT
C615 C666 26
AVSS1
100nF 100nF 42 27 AUD5_VREF_MN
10V 10V
AVSS2 VREF
1205-003526
SHORT509 RGND-SHORT C614
10000nF-X5R C613
100nF
10V 10V
SHORT508 RGND-SHORT
Co
G_AUD
G_AUD
B B
SHORT506 R1608-SHORT
P5.0V_AUD P4.75V_AUD SHORT505 R1608-SHORT
U511
MIC5252-4.75BM5 G_AUD
1 5
IN OUT
2
GND
3 4 AUD5_LDO_BYPASS_MN
C597 EN BYPASS C594 C866
C596 100nF 100nF 10000nF-X5R
10000nF-X5R SHORT502 1203-003344 10V 10V
10V 10V
R1608-SHORT
2nd Vendor : 1203-005579
(G916-475T1UF)
C593
SHORT501 1000nF
R1608-SHORT 6.3V
A G_AUD G_AUD G_AUD G_AUD A
SAMSUNG
ELECTRONICS

N310
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N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
P5.0V_AMP
P5.0V_AUD P5.0V_AMP
g
SHORT504 R1608-SHORT
SHORT503 R1608-SHORT
un al
C568 C539
C569 100nF 10000nF-X5R C595 C601
100nF
10V 6.3V 10000nF-X5R
C599 10000nF-X5R
10V 100nF
10V 10V
10V
Do not make testpoint in these nets
U507
TPA6020A2RGWR
C564 220nF 10V AUD5_SPKAMP_LP_C_MN R572 15K 1% AUD5_SPKAMP_LP_R_MN 12 LIN+ 7 G_AUD
LVDD
C563 220nF 10V AUD5_SPKAMP_LN_C_MN R573 15K 1% AUD5_SPKAMP_LN_R_MN 13 19
ms nti
AUD5_LINE_O_LEFT LIN- RVDD
G_AUD G_AUD
C567 220nF 10V AUD5_SPKAMP_RP_C_MN R574 15K 1% AUD5_SPKAMP_RP_R_MN 16 4
C600 220nF 10V AUD5_SPKAMP_RN_C_MN R593 15K 1% AUD5_SPKAMP_RN_R_MN 17
RIN+ LOUT+
6 SPK5_L_P
AUD5_LINE_O_RIGHT RIN- LOUT- SPK5_L_M
C C565 220nF 10V AUD5_SPKAMP_LBYPASS_MN 11 1
C
C566 220nF 10V 15
LBYPASS ROUT+
3 SPK5_R_P
RBYPASS ROUT- SPK5_R_M
AUD5_SPKAMP_RBYPASS_MN
2 9 R568 0
GND1
5 GND2
L_SD#
14
AUD3_SHDN#
R_SD#
R567 0
G_AUD 8 NC1 18
NC3
Sa de
10 20
NC2 NC4
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

21
THERM
G_AUD
1201-002810
8. Block Diagram and Schematic

nfi
G_AUD G_AUD G_AUD
P3.3V
Co
R571
10K
B 1% J11 B
HDR-4P-1R-SMD
10K R570 R575 0
AUD3_SHDN# 1% AUD3_GPIO1# SPK5_R_M R576 0
1
SPK5_R_P 2
SPK5_L_M R577 0
3
3 D R578 0 SMD_A : 3711-000922
D512 SPK5_L_P 5
4
RHU002N06 G 1K R569 6
MNT1 SMD_S : 3711-000456
1% KBC3_SPKMUTE MNT2
1
2 S
KBC3_SPKMUTE_AMP_R_MN 3711-000456
G_AUD
G_AUD
It can be added bead(BLM18PG181SN1) for EMI.
A A
SAMSUNG
ELECTRONICS

8-24
4 3 2 1
8-25
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
g
un al
ms nti
C C
AUD5_MIC2_VREF
R628
Mono Mic Ass’y : Place inside Audio Analog Plane
2.2K
J10
Sa de
HDR-2P-1R
B503
- This Document can not be used without Samsung's authorization -

1
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

R629 330 AUD5_MIC2_INT_J_MN


AUD5_MIC2_INT 3
2
AUD5_MIC2_INT_B_MN MNT1 SMD_A : 3711-000541
BLM18PG181SN1 4
MNT2
C619 C541 SMD_S : 3711-002162
8. Block Diagram and Schematic

47nF 0.1nF 3711-002162


nfi
50V 50V
C59 10nF 25V
G_AUD G_AUD
G_AUD
Co
B B
A A
SAMSUNG
ELECTRONICS

N310
4 3 2 1
N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D HEADPHONE D
5 3722-002903
AUD5_SENS_HP#
4
g
R706 56 AUD5_HP_RIGHT_R_MN B512 BLM18PG181SN1 AUD5_HP_RIGHT_B_MN 3 R
AUD5_HP_O_RIGHT 6
R694 56 AUD5_HP_LEFT_R_MN B513 BLM18PG181SN1 AUD5_HP_LEFT_B_MN 2 L
AUD5_HP_O_LEFT 1

0.1nF 50V

0.1nF 50V

0.1nF 50V
un al
R707 R705
20K G4
20K
G3
P3.3V

nostuff
G2
G1
JACK-PHONE-6P
J18

C736

C737

C763
P3.3V G_AUD
R666
10K
ms nti
1% 2
Q512 3
DTA114YUA R684 AUD3_ANTIPOP_R_MN
KBC3_SPKMUTE_Q_MN 1K 1% 1 Q515 G_AUD
1 MMBT3904
C C
3 2 3
D 3 R683 Connect to Mount-hole.
Q513 1K 1% AUD3_ANTIPOP_L_MN 1 Q514
R667 1K 1% KBC3_SPKMUTE_HP_R_MN G RHU002N06 MMBT3904
KBC3_SPKMUTE AUD3_ANTIPOP_Q_MN
1 2
S 2
Sa de
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

G_AUD
8. Block Diagram and Schematic

nfi
MIC JACK
5 3722-002903
AUD5_SENS_MIC#
4
R695 330 AUD5_MIC1_RIGHT_B_MN B511 BLM18PG181SN1 AUD5_MIC1_RIGHT_J_MN 3
AUD5_MIC1_RIGHT R
AUD5_MIC1_LEFT_J_MN
6
R685 330 AUD5_MIC1_LEFT_B_MN B510 BLM18PG181SN1 2 L
AUD5_MIC1_LEFT 1
Co

50V

50V

50V
G4
B G3 B
G2

0.1nF

0.1nF

0.1nF

nostuff
G1
JACK-PHONE-6P
J15

C721

C720

C722
C693 10nF 25V G_AUD
C540 10nF 25V Connect to Mount-hole.
C762 10nF 25V
G_AUD
A A
SAMSUNG
ELECTRONICS

8-26
4 3 2 1
8-27
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
Marvell 88E8040 D
g
P3.3V
un al
P3.3V_AUX
P2.5V_LAN
10K

J5
JACK-LAN-8P
U508
ms nti
LAN1_CABLE_TERMINATION2_MN 8
88E8040-A0-NNC-1-C00 TRD4-
7
R579

TRD4+
5 30 6
PLT3_RST# 6
PERST# NC10
31 LAN1_CABLE_TERMINATION1_MN 5
TRD2-
C PEX3_WAKE# 55
WAKE# NC11
26 4
TRD3- C
CLK1_PCIELOM 56
REFCLKP NC12
27 LT500 3
TRD3+
CLK1_PCIELOM# REFCLKN NC13 LFE8423 TRD2+
C576 100nF 10V PEX1_LAN_RXP3_C_MN 49 20 LAN1_MDI1P_MN 2
PEX1_LAN_RXP3 C579 100nF 10V PEX1_LAN_RXN3_C_MN 50
PCIE_TXP RXP
21 LAN1_MDI1N_MN 1 16 LAN1_RXP_MN 1
TRD1-
PEX1_LAN_RXN3 54
PCIE_TXN RXN
17 LAN1_MDI0P_MN 3
RD+ RX+
14 LAN1_RXCT_MN
TRD1+
PEX1_LAN_TXP3 53
PCIE_RXP TXP
18 LAN1_MDI0N_MN 2
RDCT RXCT
15 LAN1_RXN_MN 9
PEX1_LAN_TXN3 PCIE_RXN TXN RD- RX-
10
MNT1
MNT2
Sa de
42 59 7 10 LAN1_TXP_MN
LOM3_CLKREQ# R580 10K 43
CLKREQ# LED_ACT#
60 6
TD+ TX+
11 LAN1_TXCT_MN
PU_VDDO_TTL LED_SPEED# TDCT TXCT 0225083000
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

62 8 9 LAN1_TXN_MN
LAN3_PU_VDDO_R_MN NC14 TD- TX-
37 63
NC1 LED_LINK#
35
NC2
34 3

1%
PD_12

1%
1%
1%
NC3 P3.3V
8. Block Diagram and Schematic

36 4
P3.3V_AUX NC4 PD_25 P3.3V_AUX
nfi
38 9
VPD_CLK SWITCH_VAUX
41 11
VPD_DATA SWITCH_VCC

75
75
75
75
C23

C24
45 12
VDDO_TTL1 VAUX_AVLBL
40
VDDO_TTL2
C573 C574 1
VDDO_TTL3 VMAIN_AVLBL
47

100nF

100nF
100nF 100nF P3.3V_AUX 61

R59
R58
R56
R57
VDDO_TTL4
10V 10V
LOM_DISABLE#
10 R538 10K LAN1_GND_C_MN
8 LAN3_DISABLE#_R_MN
VDDO_TTL5
C544 15

10V

10V
100nF 48
XTALI LAN3_XTALI_MN
C22
VDD1 1nF
44 14
Co
10V
VDD2 XTALO 3KV
39 LAN3_XTALO_MN
P1.2V_LAN VDD3
B 33
VDD4
B
13 46
VDD5 TESTMODE
7 29
VDD6 TSTPT
2 24
VDD7 HSDACP Y501
C575 C572 C602 C62 C545 58
VDD8 HSDACN
25
100nF 100nF 4700nF-X5R 1nF 1nF 16 R535 2K 25MHz
RSET
10V 10V 10V 50V 50V 32 1%
NC5
Place nearby 28 1 2
For EMI 22
NC6
Pin39 NC7 LAN3_RSET_MN
19
AVDDL
C543 C542
57 0.015nF 0.015nF
NC8
52 65 50V 50V
P2.5V_LAN AVDD1 THERMAL
51
AVDD2
23
NC9
Place crystal within 0.75inches from LAN chip.
C578 C577 C546 C570 C571 64
VDD25
100nF 100nF 4700nF-X5R 1nF 1nF
10V 10V 10V 50V 50V 1205-003399
Place nearby For EMI
Pin64
A A
SAMSUNG
ELECTRONICS

N310
4 3 2 1
N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
SATA I/F CONN
D D
g
un al
SATA HDD CONN
FREE FALL SENSOR
ms nti
JHDD1
HDD-22P-SMD P3.3V
S1
GND1
S2
C SAT1_HDD_TXP S3
A+ C
SAT1_HDD_TXN S4
A-
S5
GND2 C555 C556
SAT1_HDD_RXN S6
B- 10000nF-X5R 100nF
SAT1_HDD_RXP S7
B+ 6.3V 10V
GND3
P3.3V P1
V3.3_1
Sa de
P2
V3.3_2
P3

16
15
14
V3.3_3
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

P4
nostuff C129 C133 C131 P5
GND4

GND_4
RESERVED_2
VDD
10000nF GND5 P3.3V
nostuff 100nF 100nF P6
6.3V GND6
nostuff 10V 10V P7
V5_1 U503
LIS331DL
8. Block Diagram and Schematic

P8
V5_2
nfi
P9 1 13
V5_3 VDD_IO GND_3
P10 2 12
GND7 NC_1 GND_2
P11 3 11
P12
RESERVE
4
NC_2 INT1
10 PCI3_INTH#
GND8 SMB3_CLK SCL_SPC RESERVED_1

SDA_SDI_SDO
P13 5 9
V12_1 GND_1 INT2
P14
P5.0V V12_2
P15
V12_3
M1

SDO
CS
M2
C121 C132 C123 C122
100nF 10000nF

6
7
8
100nF 100nF 0214086100
10V 6.3V
Co
10V 10V 3710-002798
SMB3_DATA

10K
10K
B FFL3_SDO_MN FFL3_CS_MN B
nostuff

R792
R793
nostuff
nostuff
P3.3V
A A
SAMSUNG
ELECTRONICS

8-28
4 3 2 1
8-29
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
WLAN, 5.2mm
EXCEPT AS AUTHORIZED BY SAMSUNG.
Mini PCI Express Card
P3.3V
P3.3V P3.3V 30.00 mm

50.95 mm

48.05 mm
D Top
D
R550
10K
1% Pin 1
J13 P3.3V P3.3V
MINICARD-52P
1 2 Odd Pins : Top side
WAKE* P3.3V_1
3 4 Even Pins : Bottom Side
RSVD_1 GND_1
5 6
RSVD_2 P1.5V_1 C116 C108
MIN3_CLKREQ# 7
CLKREQ* SIM_VCC_C1
8 10000nF
C115 C78 10000nF
C117
9 10 100nF 100nF 100nF
GND_2 SIM_DATAIO_C7
g
6.3V 6.3V
11 12
CLK1_MINIPCIE# 13
REFCLK- SIM_CLK_C3
14
CLK1_MINIPCIE 15
REFCLK+ SIM_RESET_C2
16
GND_3 SIM_VPP_C6
C557
0.012nF 17 18
un al
SIM_RSVD_C8 GND_4
50V 19 20
21
SIM_RSVD_C4 W_DISABLE*
22
KBC3_RFOFF#
23
GND_5 PERST*
24 PLT3_RST#
PEX1_MINIRXN1 25
PERN0 P3.3V_AUX
26
PEX1_MINIRXP1 27
PERP0 GND_6
28
GND_7 P1.5V_2
29 30
GND_8 SMB_CLK
31 32
PEX1_MINITXN1 33
PETN0 SMB_DATA
34
PEX1_MINITXP1 35
PETP0 GND_9
36
ms nti
37
GND_10 USB_D-
38 USB3_MINIPCIE1- WLON_LED#
39
RSVD_11 USB_D+
40
USB3_MINIPCIE1+
RSVD_12 GND_11 3
41 42 MIN3_LED_WWAN1#_MN
D
RSVD_13 LED_WWAN* Q20
43 44 MIN3_LED_WLAN1#_MN
C 45
RSVD_14 LED_WLAN*
46 G RHU002N06 C
47
RSVD_15 LED_WPAN*
48 KBC3_RFOFF#
RSVD_16 P1.5V_3 1
49 50 S 2
51
RSVD_17 GND_12
52 PEM for Half length card
RSVD_18 P3.3V_2 M3 M2
53 HEAD HEAD
MNT1 DIA DIA
54
MNT2
Sa de
LENGTH LENGTH
BA61-01102A|screw-118-1_b BA61-01102A|screw-118-1_b
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

3709-001470
nostuff
8. Block Diagram and Schematic

nfi
HSDPA / WIBRO, 5.2mm
P3.3V
P3.3V P3.3V
C558
10000nF
C54 C81
P3.3V
Co
100nF 100nF
6.3V
P3.3V
B B
R559 P1.5V
10K J7
MINICARD-52P R101
1 2 10K
WAKE* P3.3V_1
3 4
RSVD_1 GND_1
5 6
RSVD_2 P1.5V_1
7 8
EXP3_CLKREQ# 9
CLKREQ* SIM_VCC_C1
10 SIM3_C1VCC
11
GND_2 SIM_DATAIO_C7
12
SIM3_C7DATA
CLK1_MINI3PCIE# 13
REFCLK- SIM_CLK_C3
14 SIM3_C3CLK
CLK1_MINI3PCIE 15
REFCLK+ SIM_RESET_C2
16
SIM3_C2RST
GND_3 SIM_VPP_C6 SIM3_C6VPP
17 18 nostuff
SIM_RSVD_C8 GND_4
19 20 KBC3_RFOFF#_R_MN R100 0
21
SIM_RSVD_C4 W_DISABLE*
22 KBC3_RFOFF#
GND_5 PERST* PLT3_RST#_R3_MN PLT3_RST#
23 24
PEX1_MINRXN2 25
PERN0 P3.3V_AUX
26 R99 0
PEX1_MINRXP2 27
PERP0 GND_6
28
GND_7 P1.5V_2
29 30
31
GND_8 SMB_CLK
32 SMB3_CLK
PEX1_MINTXN2 33
PETN0 SMB_DATA
34
SMB3_DATA
PEX1_MINTXP2 35
PETP0 GND_9
36
P3.3V 37
GND_10 USB_D-
38
USB3_MINIPCIE2-
39
RSVD_11 USB_D+
40
USB3_MINIPCIE2+
RSVD_12 GND_11
41 42 MIN3_LED_WWAN2#_MN Mini PCI Express Card
RSVD_13 LED_WWAN*
43 44 MIN3_LED_WLAN2#_MN BA61-01102A|screw-118-1_b
RSVD_14 LED_WLAN* 30.00 mm
45 46
A 47
RSVD_15 LED_WPAN*
48
SIM3_C4DET M1 A
RSVD_16 P1.5V_3 HEAD
49 50
RSVD_17 GND_12 DIA
51 52
RSVD_18 P3.3V_2
SAMSUNG

50.95 mm

48.05 mm
LENGTH Top
53
MNT1
MNT2
54
Pin 1
ELECTRONICS

N310
3709-001470
Odd Pins : Top side
Even Pins : Bottom Side
4 3 2 1
N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
1 PORT USB CONNECTOR
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
g
P5.0V_ALW P5.0V_ALW
un al
U11 U1
100nF 10V 2
TPS2062ADRBR
1
Need 4A Routing 100nF 10V 2
TPS2062ADRBR
1 Need 2A Routing
IN GND IN GND
C118 TPS3_P5.0VAUX_USBPWR1_MN C4 TPS3_P5.0VAUX_USBPWR2_MN
8 7 8 7
OC1# OUT1 OC1# OUT1
KBC3_USBPWRON#_R2_MN
5 6 EC9 nostuff 5 6 EC1
OC2# OUT2 OC2# OUT2
C134 100uF C152 C153 C3 100uF C2 C1
3 100nF 6.3V 100nF 0.033nF R3 0 3 100nF 6.3V 100nF 0.033nF
ms nti
KBC3_USBPWRON# EN1# 10V AD 10V 50V KBC3_USBPWRON# EN1# 10V AD 10V 50V
4 9 nostuff 4 9 nostuff
EN2# T_GND nostuff EN2# T_GND nostuff
C 1205-003683 R1 0 1205-003683 C
J17
JACK-USB-4P
KBC5_USBCHG#
2 3 USB3_P0-_R_MN
PWR
USB3_P0- USB3_P0+_R_MN
D- J2
USB3_P0+ D+ JACK-USB-4P
GND
PWR
Sa de
1 4 5 1 4 USB3_P2-_R_MN
B15 6
MNT1 USB3_P2- D-
- This Document can not be used without Samsung's authorization -

USB3_P2+_R_MN
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

7
MNT2 USB3_P2+ D+
ACM2012-900-2P-T MNT3 GND
8
MNT4
2 3 5
B1 MNT1
6
8. Block Diagram and Schematic

MNT2
3722-002002 ACM2012-900-2P-T 7
MNT3
nfi
8
MNT4
3722-002002
Charging USB
J14
JACK-USB-4P
PWR
1 4 USB3_P6-_R_MN
USB3_P6- D-
Co
USB3_P6+_R_MN
USB3_P6+ D+
GND
B B
2 3 5
B11 MNT1
6
MNT2
ACM2012-900-2P-T 7
MNT3 P5.0V_STB
8
MNT4
3722-002002 R2
nostuff 200K
1%
KBC5_USBCHG#
D 3
Q1
G RHU002N06
KBC3_USBCHG nostuff
1
S 2
for sleep in charge
A A
SAMSUNG
ELECTRONICS

8-30
4 3 2 1
8-31
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
USB I/F Devices
D D
g
Bluetooth Interface CAMERA
un al
ms nti
P3.3V P5.0V
C C
C57 C56
100nF 100nF
Sa de
C156 10V 10V
100nF
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

10V
J8
HDR-6P-SMD
B7 1
ACM2012-900-2P-T
8. Block Diagram and Schematic

J502 2
nfi
2 3 USB3_CAMERA-_B_MN
HDR-4P-SMD USB3_CAMERA- USB3_CAMERA+_B_MN
3
USB3_CAMERA+ 4
1 5
USB3_BLUETOOTH- 2
1 4 7
6
USB3_BLUETOOTH+ 3
8
MNT1
4 MNT2
5
MNT1
6
MNT2 3711-003057|head-btob-6p-2_ng
3711-000922
Co
B B
A A
SAMSUNG
ELECTRONICS

N310
4 3 2 1
N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D 3 IN 1 CARD D
P3.3V_MCD distance between R5U880 and socket should be less than 2 inches
g
P3.3V_MCD
P3.3V
P3.3V_MCD 40mil pattern
un al
C154
At least 200mA R733 1000nF-X5R
100K 6.3V
C793 R771
C869 150K
C870 C769 1000nF-X5R
C764 100nF 1%
4700nF-X5R 100nF 100nF 10V
6.3V
10V 10V 10V U521
AU6336C52-MWF
2 15
ms nti
VD33P SD_V33 JMULTI1
9
VDDHM EDGE-SD-9P
14 24
VDD33C SDDATA0
17 MCD3_SDDATA0 R720 49.9 1% 1
SDDATA1 MCD3_SDDATA1 MCD3_SDDATA3 MCD3_SDDATA3_R_MN CD_DAT3
B514 MCD3_VDD_MN 28 19 2
C ACM2012-900-2P-T 8
VDD SDDATA2
21
MCD3_SDDATA2 MCD3_SDCMD 3
CMD C
1 4
VDDU SDDATA3
22 MCD3_SDDATA3 4
VSS1
USB3_MMC+ USB3_MMC_R_MN 3
SDDATA4
23 5
VDD
USB3_MMC#_R_MN 4
DP SDDATA5
12 MCD3_SDCLK 6
CLK
DM SDDATA6 VSS2
USB3_MMC- SDDATA7
11
MCD3_SDDATA0 R735 49.9 1% MCD3_SDDATA0_R_MN 7
DAT0
2 3 20 R734 49.9 1% MCD3_SDDATA1_R_MN 8
CLED MCD3_SDDATA1 DAT1
TRIST
10
MCD3_SDDATA2 R721 49.9 1% MCD3_SDDATA2_R_MN 9
DAT2
Sa de
MCD3_RSTN_MN 27 13 10
CLK3_FM48_R_MN 25
RSTN SDCDN
18 MCD3_SDCD# MCD3_SDCD# 11
CARD_DETECT
CLK3_FM48 EXTCLK SDWP MCD3_SDWP MCD3_SDWP WRITE_PROTECT
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

R772 0 16
6
SDCMD
26 MCD3_SDCLK_R_MN R800 33 MCD3_SDCMD 12
C867 NC1 SDCLK MCD3_SDCLK MNT1
C765 C768 470nF
7
NC2
5% 13
MNT2
0.018nF 0.018nF 1 MCD3_REXT_MN
16V REXT
8. Block Diagram and Schematic

nostuff 50V 50V 5


nostuff VS33P 3709-001492
nfi
29

330
GND TRIST
PD : Normal mode
0904-002453
SDCD# : Low power mode

R738
C872 C873
0.022nF 0.022nF
50V 50V
nostuff nostuff
EMC Solution(’07.10.18)
Co
B B
CLKSEL
NC, 1 : External 48M
0 : 12M Crystal
A A
SAMSUNG
ELECTRONICS

8-32
4 3 2 1
8-33
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
MICOM RESET
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. P3.3V_MICOM
P5.0V P3.3V_AUX
P5.0V KBC3_RST#
100 1%

VDC P3.3V_MICOM D 3
D Q12 D
G RHU002N06
P3.3V_MICOM 1
R44
1203-002364
10K 1%
10K 1%

S 2
RESET* R48 Q11 R102
C86 C87 C55 VDD
2 KBC3_RST_R4_MN 330K R43 4.7K
100nF 100nF 100nF 3 47K BSS84
C18 GND R42
1
100nF TPS3809 THM3_STP#_QR_MN 47K THM3_STP#_Q_MN

2
10V
U4 C19

S
R47
R109
R110

THM3_STP#_R_MN
g
100nF 100K
D 3

1
G
25V 1% Q13
G RHU002N06 THM3_STP#
R104 THM3_STP#_VDC_R1_MN 1 R41 10kohm pull-up to P3.3V_AUX
10K R45 2 C15 100K should be at the thermal sensor side.
un al
S
KBC3_RST# 1% 1% 10nF 1%
KBC3_CHKPWRSW# 150K
10K 1% 25V
KBC3_MD THM3_STP#_VDC_R2_MN
R105
KBC3_VCC_R1_MN
100

36
37
59
7
1

6
5

4
9

8
NMI
RES*
RESO*

VCC_1
VCC_2
VCC_3

MD0
MD1

VCCB
VCL

STBY*

nostuff nostuff nostuff nostuff nostuff


ms nti
48 49 nostuff
47
PA0 P40
50
KBC3_RSMRST# nostuff
31
PA1 P41
51 KBC3_SUSPWR
KBC5_TCLK 30
PA2 P42
52
KBC3_THERM_SMDATA
C KBC5_TDATA 21
PA3 P43
53
KBC3_BKLTON C
KBC3_SCLED# 20
PA4 P44
54 KBC3_PWRBTN#
KBC3_NUMLED# 11
PA5 P45
55
KBC3_VRON
KBC3_CAPSLED# 10
PA6 P46
56 KBC3_BLCKPWRSW#
91
PA7 P47
14
KBC3_RCIN#
FOR MICOM UPDATE
KBC3_EXTSMI# 90
PB0 P50
13
KBC3_LED_ACIN# POWER SWITCH BLOCK WHILE MICOM UPDATE
KBC3_RUNSCI# PB1 P51 KBC3_LED_CHARGE#
Sa de
81 12 P3.3V_MICOM
KBC3_USBPWRON# 80
PB2 P52 KBC3_SMCLK# P3.3V_MICOM
KBC3_CHG4.2V PB3
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

69 26
KBC3_RFOFF# 68
PB4 P60
27 VRM3_CPU_PWRGD
KBC3_LED_POWER# 58
PB5 P61
28
LID3_SWITCH#
KBC3_PWRGD PB6 P62 KBC3_PRECHG R131 R49
57 U8 29 300K 10K
KBC3_PWRON PB7 P63 KBC3_USBCHG
8. Block Diagram and Schematic

32 1% R46 R562 1%
KBC5_KSI(0:7) H8S-2110B P64 KBC3_CHGEN
nfi
0 79 33 100K 10K
1 78
P10 P65
34 BAT3_DETECT# 1% 1% KBC3_CHKPWRSW#
P11 P66 CHP3_SLPS3#
2 77 0903-001439 35 C88
3 76
P12 P67 PEX3_WAKE# 100nF D 3 C20
75
P13
38
KBC5_KSO(8:15) 330nF
4
P14 P70
8 10V Q14 10V
5 74 39 9 G RHU002N06
6 73
P15 P71
40 10
KBC3_BLCKPWRSW#
P16 P72 1
7 72 41 11 S 2
P17 P73
42 12
KBC5_KSO(0:7) 0 67
P74
43 13
KBC3_PWRSW#
P20 P75 P3.3V
1 66 44 14
P21 P76
2 65 45 15
P22 P77
64
Co
3
P23
4 63 93 R103
B 5 62
P24 P80
94
KBC3_WAKESCI# B
P25 P81 KBC3_A20G 10K
6 61 95 1%
7 60
P26 P82
96
PCI3_CLKRUN#
P27 P83 KBC3_P3.3V_PU_R_MN
97
LPC3_LAD(0:3) 0 82
P84
98
KBC3_TX P3.3V_MICOM J501
1 83
P30 P85
99
KBC3_RX_CHG2000 TP22196 HDR-4P-1R-SMD
2 84
P31 P86 KBC3_THERM_SMCLK 1
3 85
P32
25
R108 10K KBC3_MD 2
MODE0 KBC3_MD 1
P33 P90 KBC3_P3.3VMICOM_PU_R_MN KBC3_TX TX KBC3_TX 2
86 24 3
LPC3_LFRAME# 87
P34 P91
23
KBC3_CHKPWRSW# KBC3_RX_CHG2000 4
RX KBC3_RX_CHG2000 3
PLT3_RST# 88
P35 P92
22 ADT3_SEL# GND
5
4
CLK3_PCLKMICOM 89
P36 P93
19
KBC3_SPKMUTE 6
MNT1
CHP3_SERIRQ P37 P94 CHP3_SUSSTAT# For Production MNT2
18
2
P95
17
CHP3_SLPS5#

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
XTAL P96 CHP3_SLPS4# 3711-000456
3 16
EXTAL P97 KBC3_SMDATA# nostuff
Y500

15
46
70
71
92
2801-004200

2
CLK3_MICOM_XTALIN_MN CLK3_MICOM_EXTAL_MN
10MHz
C16 C17
0.018nF 0.018nF
P3.3V_MICOM
R107 4.7K
KBC3_SMDATA#
R106 4.7K
A KBC3_SMCLK# A
CHP3_SLPS3#
R561 0
KBC3_PWRON SAMSUNG
nostuff
nostuff ELECTRONICS
R563 0
CHP3_SLPS4# KBC3_SUSPWR

N310
Place near to Micom
4 3 2 1
N310
4 3 2 1
SAMSUNG PROPRIETARY
Micom Glue Logic
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
KEYBOARD Power Switch Button TOUCHPAD
g
P5.0V
P3.3V_MICOM D1 C804
un al
BAV99LT1 100nF
10V
P3.3V 2 1
P3.3V 3
J19
J4 TP for R&D stage CONN-6P-FPC
1%
1%
1%
1%
1%
1%
1%
1%

HDR-3P-1R-SMD (POWER ON) TPD5_L_BUTTON# 1


ms nti
KBC3_PWRSW#
10K
10K
10K
10K
10K
10K
10K
10K

1 2
2 TPD5_R_BUTTON# 3
C21
nostuff when 2111b(144p) is used 3
4 100nF
KBC5_TDATA 4
MNT1
5 10V
KBC5_TCLK 5
C MNT2
7
6 C
MNT1
3711-002613 8
KBC5_KSI(0:7) MNT2
R558
R557
R556
R555
R554
R553
R552
R551

C799 3708-002402
C803 C801 C800 0.01nF
0.1nF 0.1nF 0.1nF 0.5pF
50V 50V 50V 50V
Sa de
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

J12
KBC5_KSO(0:15) FPC-KBD-25P
8. Block Diagram and Schematic

1
nfi
2
3
4
5
6
7
8 SW501
9 SW-TACT-4P
1 3
10 TPD5_R_BUTTON#
11
2 4
12 P5.0V
13
LID Switch
Co
3
14 2 1
3404-001311
15
B 16
B
BAV99LT1
17 nostuff D15
18 P3.3V_MICOM
19
20
21
22 P3.3V_MICOM
23 R201
U3 20K
24 A3212ELH/HED55XXU12 1%
KBC3_TX 26
25
1
MNT1 C868 SUPPLY SW500
27 2 SW-TACT-4P
MNT2 1000nF-X5R
3
OUTPUT LID3_SWITCH# 1 3
6.3V GND TPD5_L_BUTTON#
3708-002166 1009-001010 2 4
P5.0V
3
3404-001311
2 1
BAV99LT1
nostuff D14
A A
SAMSUNG
ELECTRONICS

8-34
4 3 2 1
8-35
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
LED SWITCH LOGIC
D D
g
Function Key LEDS ADAPTERIN/CHARGING LED
un al
ms nti
P3.3V
LED500
C LTST-C193TBKT-AC C
TCH1_LED1_MN R773 475
KBC3_NUMLED# 1% BSS84
2

P3.3V_MICOM Q30 LED505


P3.3V_MICOM_LED_ACIN#_R_MN LTST-C195KGJRKT
R192 475 1% KBC3_LED_ACIN#_Q_MN 1 G 3

3
2

D
S
Sa de
R801 KBC3_LED_CHARGE#_QLED 2 4
LED501

1
nostuff

G
100K R202 R
LTST-C193TBKT-AC
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

10K 1%
TCH1_LED2_MN R779 475 KBC3_LED_ACIN#
KBC3_CAPSLED# KBC3_LED_ACIN#_R_MN
1%
2

1 BSS84
P3.3V_MICOM
8. Block Diagram and Schematic

Q31
P3.3V_MICOM_LED_CHARGE#_R_MN
nfi
R193 475 1%

3
2

D
S
LED502 R802
LTST-C193TBKT-AC

1
nostuff

G
100K R203
TCH1_LED3_MN R783 475 10K 1%
KBC3_SCLED# 1%
KBC3_LED_CHARGE#

1
KBC3_LED_CHARGE#_R_MN
LED503
LTST-C193TBKT-AC
R784 475
Co
TCH1_LED4_MN
CHP3_SATALED# 1% P3.3V_AUX

1
B B
U15
5 7SZ14 KBC3_LED_POWER#_U_MN
LED504 2 + 4 R205 475 1% 1 2
KBC3_LED_POWER# -
LTST-C193TBKT-AC
3 KBC3_LED_POWER#_R_MN
TCH1_LED5_MN R785 475 LED506
WLON_LED# R204 LTST-C193TBKT-AC
1% 1M

1
1%
C160
1000nF
6.3V
A A
SAMSUNG
ELECTRONICS

N310
4 3 2 1
N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
CPU VRM POWER
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D VCCA P5.0V P3.3V D
VDC
R195
10
1%
C718 EC8
C157 3 C719
68uF
g
2 1 4700nF
1000nF 1nF
25V R197 25V 50V 25V
BAT54A 10K AL
D12 1%
CPUVR_BST_RCD_NS_MN

nostuff
R194 Q516-2
un al
D1 5 6
10K R198 SI4804BDY-T1-E3 D2
1% 2K
CPUVR_CLKEN_MN

L503 CPU_CORE
1000nF

1% CPUVR_TG_NS_MN G
2.2uH
4 S
3
25V

PCMC063T-2R2MN
CPUVR_VRTT_MN

2703-003191
R196

CPUVR_PHASE_NS_MN R702 0.003


C159

1W 1%
CPUVR_BST_NS_MN

EC11
Q516-1 D1 7 8 C734 470uF
ms nti
SI4804BDY-T1-E3 D2
R703 R704 100nF 2V
0

CPUVR_BG_NS_MN G 25V AL
10 10
2 S
1 1% 1%
C C

CPUVR_CS+_RRL_MN
CPUVR_PHASE_RRC_NS_MN
VRM3_CPU_PWRGD nostuff
R200 0
KBC3_VRON
CPUVR_EN_MN C735
R199 0
32
31
30
29
28
27
26
25

1nF
VCCP3_PWRGD 50V
Sa de
VRTT*
BST
TG
DRN
BG
V5
CLKEN*
PWRGD

CPUVR_REMP_MN
C158 1000nF-X5R
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

CPU1_VID(6:0) 6.3V
nostuff nostuff
nostuff
1 24
VID6 EN
2
VID5 RAMP
23 R214 20K
3 22 CPUVR_DPRSL_MN 1% G_CPU
8. Block Diagram and Schematic

VID4 U529 DPRSL CHP3_DPRSLPVR


4
VID3 TTRIP
21 R213 499 1%
R766
nfi
5 20 CPUVR_CS+_MN 100
VID2 SC454MLTRT CS+
6 19 1%
VID1 1203-004072 CS-
7 18
VID0 FB+ R764

CPUVR_TTRIP_MN
8 17

ERROUT
CPU1_DPRSTP# DPRSTP* FB- 392

CLSET

AGND
1%

VCCA
VREF
GND CPUVR_CS-_MN R765 100

DAC
HYS

SS
1%
R210 C790 C809
0.047nF 0.047nF CPU_CORE

33

9
10
11
12
13
14
15
16
100K 50V 50V
1%
nostuff
R791

CPUVR_ERROUT_MN
G_CPU G_CPU
Co
10
VCCA G_CPU 1%
B R209 CPUVR_FB+_MN R790 0 B

CPUVR_DAC_MN

CPUVR_SS_MN
10K CPU1_VCCSENSE
1% CPUVR_FB-_MN R211 0
CPU1_VSSSENSE

CPUVR_ERROUT_RC_MN
CPUVR_HYS_MN C163 R212
10
0.47nF 1%
CPUVR_VREF_MN 50V
C164

CPUVR_CLSET_MN
0.015nF
50V
G_CPU
R788 C806 R789
1nF INSTPAR
130K 13K
1% 50V
1% SHORT4
C807
R786 R787 C805 C808
C802 1nF
22nF
0.1nF 30.1K 5.11K 0.1nF 50V
50V 1% 1% 50V C165 50V
1000nF G_CPU
25V
G_CPU
A A
SAMSUNG
ELECTRONICS

8-36
4 3 2 1
8-37
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CHIPSET POWER(P1.5V_AUX & P1.05V)
D D
g
VDC P5.0V_AUX VDC
un al
C726 C750 EC12
C725 C729 C728
1nF 100nF 68uF
4700nF-X5R 10V
1nF 4700nF-X5R
25V
25V 50V
50V 25V
AL
3
CHSETVR_BST_P1.5V_RCD_NS_MN 2 1 CHSETVR_BST_P1.05V_RCD_NS_MN
D509
ms nti
BAT54A C746
C739 C749 100nF
C738 10000nF-X5R
Q518-2
100nF 10000nF-X5R 6.3V
10V
6 5 D1 10V
6.3V U517 2203-006890 D1 5 6 SI4804BDY-T1-E3
C Q517-2 C
(3A) P1.5V P1.05V (6.5A)
D2 2203-006890 D2
L6 SI4804BDY-T1-E3 C723 SC415MLTRT C748
G_P1.05V L5
3.3uH G
100nF 3
VDD1 VDD2
16 100nF G
2.2uH
PCMC063T-3R3MN G_P1.05V 25V
3 S 4 25V CHSETVR_BST_P1.5V_NS_MN CHSETVR_BST_P1.05V_NS_MN 4 S
3 PCMC063T-2R2MN
2703-003170 CHSETVR_PHASE_P1.5V_NS_MN R710 3.3 2 17 R716 3.3 CHSETVR_PHASE_P1.05V_NS_MN
BST1 BST2
CHSETVR_TG_P1.5V_NS_MN 24 19 CHSETVR_TG_P1.05V_NS_MN 2703-003191
8 7 D1 DH1 DH2 D1 7 8
CHSETVR_PHASE_P1.5V_RC_NS_MN

1 18
R687
D2 Q517-1 4
LX1 LX2
15 CHSETVR_BG_P1.05V_NS_MN
D2
CHSETVR_BG_P1.5V_NS_MN R688 EC506
Sa de
EC505 DL1 DL2
4.7 G SI4804BDY-T1-E3 R696 CHSETVR_ILIM1_MN 23
ILIM1 ILIM2
20 CHSETVR_ILIM2_MN R698 Q518-1 G
4.7 330uF
220uF 20K 1%
- This Document can not be used without Samsung's authorization -

20K 1%
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

SI4804BDY-T1-E3

CHSETVR_PHASE_P1.05V_RC_NS_MN
1 S 2 2 S
1 2.5V
2.5V CHSETVR_FB1_MN 8 11 CHSETVR_FB2_MN C727 AL
AD C695 FB1 FB2 C696 2402-001168
2409-001159 C724 7 12 nostuff 1nF
0.035OHM 0.47nF 1nF
VOUT1 VOUT2
50V 0.47nF 15mohm
50V 50V C767 C766 R711 CHSETVR_EN1_MN 5 14 CHSETVR_EN2_MN C744 50V
R715
8. Block Diagram and Schematic

1nF 20K EN1 EN2 C743 100nF


100nF 22 21 3.01K 4.7nF 10V
50V 1% PGD1 PGD2
nfi
10V CHSETVR_SS1_MN 6 13 CHSETVR_SS2_MN 1% 25V
SS1 SS2
10
RDSon Max = 30mohm TON
C741 9
RTN PAD
25 C747 RDSon Max = 30mohm
G_P1.05V 10nF 10nF G_P1.05V
R712 25V
R739
25V
20K 1203-004685
7.5K
1% 1%
G_P1.05V G_P1.05V G_P1.05V
G_P1.05V
nostuff G_P1.05V
VDC
Co
R708
0
B B

CHSETVR_TON_RR_MN
KBC3_PWRON R713
0

CHSETVR_TON_MN
R709 KBC3_PWRON
10K C740 R717
1% 100nF 20K
10V 1%
R714
1M KBC3_VRON
1% C745 R718
G_P1.05V
100nF 1K
C742 10V nostuff
1nF
P3.3V 50V
G_P1.05V
R697 G_P1.05V
2K
1%
VCCP3_PWRGD
SHORT2
R1608-SHORT
A A
G_P1.05V
SAMSUNG
ELECTRONICS

N310
4 3 2 1
COM-22C-015(1996.6.5) REV. 3 D:/users/mobile59/mentor/pebble/PBLL_pv_090212_final
N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
DDR2 Power
D D
R798
0
AUX5_PWRGD
g
0 R782 DDR2_VTTEN_MN
CHP3_SLPS4#
nostuff
0 R781
un al
KBC3_PWRON
P5.0V_AUX
R774 C794
20K 1nF
P1.8V_AUX VDC P5.0V_AUX 1% 50V VDC

DDR2_BST_NS_RCD_MN
nostuff

DDR2_PGD_MN
R776 R777

1
R742 R741 R775 100K 470K
10 715K 10 1% C145 EC13
ms nti
C144

3
1% nostuff
5% U519 1nF 4700nF-X5R 68uF
D511 25V
50V
SC486IMLTRT BAT54A 25V
AL
R719

2
G_DDR 11 7
C DDR2_VDDQS_MN VTTEN PGD 10 C
3
VDDQS
DDR2_TON_MN 2 1 DDR2_EN_PSV_MN
TON EN_PSV
DDR2_FB_MN 6 C774
FB R743
8 100nF
REF 3.3 D1 5 6 P1.8V_AUX
C771 DDR2_COMP_MN 9
COMP BST
24 D2
1000nF DDR2_VTTS_MN 10 25V Q29-2
6.3V VTTS DDR2_BST_NS_MN
DDR2_VCCA_MN 5 DDR2_TG_NS_MN G
SI4804BDY-T1-E3 L504
VCCA
Sa de
4 23 4 S
3 3.3uH
VSSA DH
21 R745 13K R744 5.11K (321 ~ 359KHz)
ILIM
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

C773 C772 15
VTT_1 LX
22 1% 1% DDR2_PHASE_NS_MN PCMC063T-3R3MN
G_DDR D1 7 8
1nF 1000nF 14 DDR2_ILIM_MN 2703-003170
VTT_2 D2
50V 6.3V
C796 DDR2_ILIM_RR_MN Q29-1 EC508
1nF P1.8V_AUX 13 19 DDR2_BG_NS_MN G 220uF
VTTIN_1 DL SI4804BDY-T1-E3
8. Block Diagram and Schematic

50V
12 20 DDR2_VDDP_MN 2 S
1 2.5V
nostuff VTTIN_2 VDDP AD
nfi
C798 R171

DDR2_PHASE_RC_NS_MN
G_DDR G_DDR G_DDR 17 18
1000nF PGND_2 PGND_1 C775 4.7
R780 6.3V 16
PGND_3 THERM
25
1000nF
C155
10 6.3V 1nF
50V C146
1203-003765 1nF
MEM1_VREF 50V
P0.9V nostuff
MEM1_REF_RC_MN

R778 nostuff
10 R799 0
5%
C797
C795 1nF
Co
1000nF 50V
6.3V nostuff nostuff
B B
D510
MMBD4148
P0.9V G_DDR G_DDR 1 3
DDR2_EN_PSV_RRRD_MN
1K R737 0
1% R740 CHP3_SLPS4#
C862 C776
10000nF-X5R 10000nF-X5R
C770
1nF
6.3V 6.3V
2203-006890
50V
R736 0
AUX5_PWRGD
G_DDR nostuff
INSTPAR
SHORT3
G_DDR
A A
SAMSUNG
ELECTRONICS

8-38
4 3 2 1
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4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
P3.3V_AUX & P5.0V_AUX
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
P5.0V_FILT
D nostuff nostuff
nostuff D
R509 R505 C503
C504 R508 0.1nF
0.047nF R511 0
0
30.1K 50V
50V 27.4K 1%
1%
SYSVR_VFB1_MN
VDC R506 R507 VDC
SYSVR_VFB2_MN

R510 7.5K 1M
1% 1%
11.8K
g
1% nostuff
G_P3.3V
for EMI nostuff
C554 for EMI C549 EC5
4700nF-X5R
C813 G_P3.3V G_P3.3V
C812 4700nF-X5R 15uF
25V 100nF 100nF 25V
un al
25V
10V 10V AL
TONSEL VREF2 SYSVR_TOSEL_MN
5 6 7 8
P5.0V_STB C8
5V / 3.3V : 280KHz / 430KHz
SYSVR_TG_P3.3V_NS_MN

D1 D2 D3 D4

8
7
6
5
4
3
2
1
1nF

SYSVR_TG_P5.0V_NS_MN
50V Q506

VO2
COMP2
VFB2
GND
VREF2
VFB1
COMP1
VO1
Q507-1 G Si4894BDY
P3.3V_AUX (3.5A) SI4804BDY-T1-E3 33 4
8 7 D1 PAD G_P3.3V L3 P5.0V_ALW (8A)
9 S1 S2 S3
L4
D2 EN5 SYSVR_SKIPSEL_MN
1 2 3 3.3uH
10 32 R9 0
ms nti
3.3uH G
C30 11
EN3 SKIPSEL
31 PCMC063T-3R3MN
PCMC063T-3R3MN 100nF PGOOD2 TONSEL G_P3.3V C28 SYSVR_PHASE_P5.OV_NS_MN 2703-003170
1S 2 SYSVR_BST_P3.3V_RC_NS_MN 12 U5 30
2703-003170 25V EN2 PGOOD1 100nF
SYSVR_PHASE_P3.3V_NS_MN SYSVR_BST_P3.3V_NS_MN 13 29SYSVR_BST_P5.0V_NS_MN
VBST2 EN1
R67 3.3 14 28SYSVR_BST_P5.0V_RC_NS_MN 25V
C 6 5 D1 DRVH2 TPS51120RHBR VBST1 R63
5 6 7 8 R545 C
15 1203-004687 27 3.3 D1 D2 D3 D4
4.7
LL2 DRVH1 EC2

SYSVR_PHASE_P5.0V_RC_NS_MN
D2
EC500 EC3 R548 SYSVR_BG_P3.3V_NS_MN 16 26 C27
C31
DRVL2 LL1
25 SYSVR_BG_P5.0V_NS_MN 330uF
100uF 330uF 4.7 G
DRVL1 Q504 100nF
6.3V
SYSVR_PHASE_P3.3V_RC_NS_MN

C547

PGND2

PGND1
VREG3

VREG5
Si4894BDY 10V

V5FILT
6.3V 6.3V 100nF S 4 AL
3 G
AD AL 2402-001120
10V Q507-2 4 1nF

CS2

CS1
VIN
2402-001120 C552 50V 18 mohm
18 mohm SI4804BDY-T1-E3 RdsOn 16.5mohm S1 S2 S3
1nF 1 2 3 nostuff
Sa de
50V nostuff nostuff

17
18
19
20
21
22
23
24
nostuff RdsOn 30mohm
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

SYSVR_CS1_MN
SYSVR_CS2_MN
R66 R65 P5.0V_STB
8.2K 100K
8. Block Diagram and Schematic

R520 R521 5% 1%
nfi
100K 13K
1% 1%
P5.0V_FILT R519 C512
P3.3V_MICOM 5.1 10000nF-X5R
1%
6.3V
2203-006890
KBC3_USBCHG
C514
1000nF
6.3V

1
C513

BAT54C
D501
10000nF-X5R SYSVR_EN1_MN

3
6.3V
Co
2203-006890 G_P3.3V
R518
B 47K B

2
G_P3.3V
P5.0V_ALW P5.0V_AUX SYSVR_EN2_MN R10 0
P5V OCP(Typ) : 10.3A KBC3_SUSPWR
P5.0V_ALW P5.0V_AUX Q6 P3.3V OCP(Typ) : 6.8A C29
R68 100nF
SI3433BDV 47K 25V
R501 0

D1 D2 D3 D4
1 2 5 6
C501 P5.0V_FILT
R500 0 R502

4
10nF C500

S
100K R504 16V 4700nF-X7R
1% 10K

3
G
6.3V G_P3.3V
KBC3_SYSPWR_RCQ_RRQ_MN R64
1% 100K
D 3 KBC3_SYSPWR_RCQ_RRQ_RCQ_MN 1%
KBC3_SYSPWR_RCQ_MN Q500
R503 10K G RHU002N06 AUX5_PWRGD
KBC3_SUSPWR 1% INSTPAR
1
SHORT500
S 2
C502
10nF
25V
A A
G_P3.3V
SAMSUNG
ELECTRONICS

N310
4 3 2
COM-22C-015(1996.6.5) REV. 3 D:/users/mobile59/mentor/pebble/PBLL_pv_090212_final
N310
4 3 2 1
SAMSUNG PROPRIETARY
CHARGER & POWER MANAGEMENT
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. VDC_ADPT
D4
B340A nostuff VDC
1 2
Q21-2
J1 VDC_ADPT_RCCCQB_BJ_MN AP4957AGM
D2

D2
5 6

D HDR-4P-1R VDC_ADPT_RCCCQB_MN CHGVR_CSIP_RRRQD_MN R514 0.033 1 8


D
3

1
D1 7

1 S1 D1
1W 2 7
D1

nostuff
S

2 B2 C6 1% S2 D2
C5 R54 C58 R51 EC4 3 6
4

C524 C525 C526


G

3 HU-1M2012-121JT 100nF S3 D3
10nF 100K 1000nF 300K R94 R93 68uF 4 5
4 25V 25V 25V 4700nF-X5R 4700nF-X5R 100nF G D4
5 1% 1% 2.2 22 25V
MNT1 25V 25V 25V
6 AL
MNT2 Q19
VDC_ADPT_RRCQ_MN Q21-1 P3.3V_MICOM C53 100nF AO4435L
3711-007003 R55 AP4957AGM R52
CHGVR_SGATE_RRRQ_MN

100K 43.2K
ADT3_SEL#_RQ_MN

1% 1% 25V
P3.3V_MICOM_RQ_MN
g
R50 BGATE
3 10K
VCHG=8.7V for 2950mAh Cell EMI D
VCHG=8.413V for other Cells G
un al
IPRECHG=0.27A C528 1
ICHG=3.145A for 3P2S Config 100nF 2 S Q15
25V
ICHG=2.42A for 2P2S Config RHU002N06
ACSET: Vth,rise=15.06V / Vth,fall=14.04V ADT3_SEL#
DCSET: Vth,rise=9.23V / Vth,fall=8.55V D 3

CHGVR_CSIN_MN
Q502 R527 R53
BSS84 0 0
ms nti
G
1 S
2 nostuff Q501-1 D1 7 8 To enhance
SI4804BDY-T1-E3 HU-1M2012-121JT
D2 2703-003654 R91 DMB performance (060310)
B501
C L2 0.02 C
CHGVR_SGATE_MN

G 3711-006827
10uH 1W BATT_IN_BJ_MN
2 S
1 SIQ1048-R100 1% CHGVR_PHASE_RRL_RRCCCCCQBB_NS_MN 7
Q501-2 6
C529 SI4804BDY-T1-E3 D1 CHGVR_PHASE_RRL_NS_MN 5
VREF BGATE VDC_ADPT VDC 5 6 HU-1M2012-121JT

4700nF-X5R
4700nF-X5R

4700nF-X5R
R512 R513

4700nF-X5R
100nF D2
B500 4
nostuff 25V 10 10 R523 R524 3

100nF 25V
D502 G 10 10
2
Sa de

CHGVR_BST_RCD_NS_MN

BAT3_DETECT#_BJ_MN
R96 R95 BAT54A
4 1% 1%
R32 R92 S
3

CHGVR_PHASE_RRC_NS_MN
1

25V
300K 300K CHGVR_CSIP_MN

25V

25V

25V
470K
270K 200K
- This Document can not be used without Samsung's authorization -

1% 1%
CHGVR_DCIN_MN

G_CHG
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

1% 1% C506 C505 BATT-CONN-7P

2
1nF 1nF J3
CHGVR_VDDP_MN 50V 50V C527

BAT3_SMDATA#_BJ_MN
C531 15.15V@1.264V
100nF
R33 R530 R30

R522
C523
C522

C521

C520

C519
10nF 10V
8. Block Diagram and Schematic

300K 31.6K 27.4K C11 B6

CHGVR_PHASE_NS_MN
16V
U500
nfi
1% 1% 1% 1000nF

1
ISL6256AHRZ-T BLM18PG181SN1

CHGVR_TG_NS_MN

CHGVR_BG_NS_MN
25V
19 20
BAT3_DETECT#
CSIP CSIN

BAT3_SMCLK#_BJ_MN
C52
G_CHG G_CHG 18 17 0.1nF
G_CHG SGATE BGATE
25
DCIN
C10 50V
CHGVR_ACSET_MN (1.26V) 27 100nF nostuff
CHGVR_DCSET_MN ACSET
28 CHGVR_BST_NS_MN 25V
DCSET
14 3.3 R25 BAT3_SMDATA#
C530 BOOT B5
1000nF UGATE
15 BLM18PG181SN1 C51

G_CHG
25V R528 5.1 13
VDDP PHASE
16 0.1nF
50V
1% CHGVR_VDD_MN 26 12
VDD LGATE
11
Co
nostuff
PGND VREF ( 2.39V )
CHGVR_CHLIM_MN 7
B CHGVR_VADJ_MN 9
CHLIM
21
BAT3_SMCLK# B
VADJ CSOP CHGVR_CSOP_MN B4
R37 CHGVR_ACLIM_MN 8
ACLIM CSON
22 CHGVR_CSON_MN BLM18PG181SN1 C50
10K CHGVR_ICM_MN 5 0.1nF
ICM 50V
1% 6
KBC3_RX_CHG2000_RQ_RQ_MN VREF
1 CHGVR_EN_MN nostuff
KBC3_PRECHG_RQ_RQ_MN VREF VREF EN
Q9 3 CHGVR_ICOMP_MN 3
RHU002N06
D 2 CHGVR_CELLS_MN
CHGVR_VCOMP_MN 4
ICOMP CELLS
R28 10 R531
R38 10K VCOMP GND

CHGVR_VCOMP_RC_MN
G R31 R29 100 1K

CHGVR_ICM_RC_MN
KBC3_PRECHG 1%
C14 23 29 1% P3.3V_MICOM
1 24.3K 150K 10nF ACPRN THERM
KBC3_PRECHG_RQ_MN S 2 1% C13 24 R529
0.1%
16V DCPRN KBC3_CHGEN

CHGVR_DCPRN_MN
6.8nF 0
50V 1203-004471 C532

BAV99LT1

BAV99LT1
R39 R34 R26 R27 1nF

2
C12 R526 50V
475K 200K 47K 100nF 10K
1% 1% 1% 0 nostuff nostuff
G_CHG 25V
0.1%

3
D3

D2
G_CHG
Q10 D 3

1
10K RHU002N06 G_CHG G_CHG G_CHG G_CHG G_CHG P3.3V_MICOM G_CHG G_CHG
R40 G
KBC3_RX_CHG2000
1 R35
KBC3_RX_CHG2000_RQ_MN S 2 30.1K R525
1% 20K
1% R90 100 1%
BAT3_SMDATA# KBC3_SMDATA#
G_CHG ADT3_SEL#
CHGVR_VADJ_RQ_MN R89 100 1%
(ACTIVE LOW) BAT3_SMCLK# KBC3_SMCLK#
A D 3 A
Q8 SHORT1
R36 10K 1% G RHU002N06 INSTPAR
KBC3_CHG4.2V
CHGVR_VADJ_RQ_RQ_MN
1
S 2
SAMSUNG
ELECTRONICS
G_CHG
G_CHG

8-40
4 3 2 1
8-41
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
Load Switch Control(P5.0V)
D D
LDO Power (P2.5V)
P5.0V_ALW P5.0V
Q28
D1 D2 D3 D4
1 2 5 6

SI3433BDV
P3.3V_AUX P2.5V
4

g
S

C119 U512
3
G

R167 100nF RT9179GB


KBC3_PWRON_2.5_R_MN
100K 10V 1 5
R597 IN OUT
1% 10K 3
un al
KBC3_PWRON 1% EN
R166 2
GND ADJ
4 R594

P2.5V_OUT_R_MN
KBC3_PWRON_5_RQ_MN 150K
1203-005591 1%
10K KBC3_PWRON_5_RQR_MN C130

P2.5V_ADJ_MN
1% 10K R582 C604
2200nF VCCP3_PWRGD 1% C605 C606 10000nF-X5R
D 3 10V 100nF
4700nF
6.3V
nostuff 6.3V R595
KBC3_PWRON_5_R_MN Q27 10V
20K
G RHU002N06 1%
KBC3_PWRON 40-A4
1
ms nti
R168 10K
1% C120
S 2 nostuff R596
10nF
16V
C871 150K
1nF 1%
C 50V C
Sa de
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

8. Block Diagram and Schematic

nfi
Load Switch Control(P3.3V) AUDIO POWER
P5.0V P5.0V_AUD
Co
B P3.3V_AUX P3.3V B
Q505 INSTPAR SHORT512

D1 D2 D3 D4
1 2 5 6
SI3433BDV
INSTPAR SHORT511

4 S
INSTPAR SHORT510

3
G
R581 C580
100K 100nF C692
1% 10V 2200nF-X5R
KBC3_PWRON_3.3_RQ_MN R546 10V
10K KBC3_PWRON_3.3_RQR_MN C548
1% 2200nF
D 3 10V
KBC3_PWRON_3.3_R_MN Q22
KBC3_PWRON
G RHU002N06
1 40-C4
R134 10K
1% S 2
C89
10nF
25V
A A
SAMSUNG
ELECTRONICS

N310
4 3 2 1
N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
POWER DISCHARGER
g
un al
P5.0V_STB P5.0V_ALW P5.0V_AUX P1.8V_AUX P3.3V_AUX
R62 R8 R746 R5

P3.3V_AUX_RQ_MN
R11

P5.0V_AUX_RQ_MN

P1.8V_AUX_RQ_MN
100K 1K 49.9 10

P5.0V_ALW_RQ_MN
100K 1% 1% 1% 1%
ms nti
1% nostuff nostuff nostuff nostuff
nostuff
P5.0V_STB_RQQQQQ1_MN
C C
D 3 D 3 D 3 D 3 D 3
KBC3_SUSPWR_RQ_MN
Q17 Q7 Q5 Q519 Q4
R69 10K G RHU002N06 G RHU002N06 G RHU002N06 G RHU002N06 G RHU002N06
KBC3_SUSPWR
1% 1 1 1 1 1
S 2 nostuff
S 2 S 2 S 2 S 2
nostuff nostuff nostuff nostuff nostuff
Sa de
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

8. Block Diagram and Schematic

nfi
P5.0V_STB P5.0V P3.3V P1.5V P1.05V
R549 R159 R157 R158 R71
100K 1K 10 10 10
1% 1% 1% 1% 1%
Co

P1.5V_RQ_MN

P1.05V_RQ_MN
P3.3V_RQ_MN
P5.0V_RQ_MN
nostuff nostuff nostuff nostuff nostuff
B B
P5.0V_STB_RQQQQQ2_MN
KBC3_PWRON_RQ_MN
D 3 D 3 D 3 D 3 D 3
Q508 Q26 Q24 Q25 Q18
R796 10K G RHU002N06 G RHU002N06 G RHU002N06 G RHU002N06 G RHU002N06
KBC3_PWRON
1% 1 1 1 1 1
S 2 S 2 S 2 S 2 S 2
nostuff nostuff nostuff nostuff nostuff nostuff
A A
SAMSUNG
ELECTRONICS

8-42
4 3 2 1
8-43
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
g
P3.3V
SIM CARD CONN.
un al
R130
10K
J500
EDGE-SIM-8P-MNT
C1 C5
SIM3_C1VCC C2
C1 C5
C6
ms nti
SIM3_C2RST C3
C2 C6
C7 SIM3_C6VPP
SIM3_C3CLK C3 C7 SIM3_C7DATA
C4 1
SIM3_C4DET C8
CD_U MNT1
2
C CD_L MNT2 C

1
nostuff
3709-001478 nostuff
C85

2
0.01nF
0.5pF
50V

0.01nF 0.5pF

0.01nF 0.5pF
10%
1000nF-X5R
Sa de
nostuff
1

1
nostuff
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

nostuff

2
6.3V
8. Block Diagram and Schematic

C84
50V 50V

C82

C83
nfi

PGB1010603NR
D5
PGB1010603NR
D8
PGB1010603NR
D9
PGB1010603NR
D7
PGB1010603NR
D6
Co
B B
A A
SAMSUNG
ELECTRONICS

N310
4 3 2 1
N310
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL MT14 MT13 MT4 MT11 MT12 MT16 MT18
PROPRIETARY INFORMATION THAT IS RMNT-25-60-1P RMNT-25-60-1P RMNT-25-60-1P RMNT-25-60-1P RMNT-25-60-1P RMNT-25-60-1P RMNT-25-60-1P
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
MOUNT holes
D MT3 MT17 MT9 MT6 MT10 MT7 MT15 D
RMNT-25-60-1P RMNT-25-60-1P RMNT-25-60-1P RMNT-25-60-1P RMNT-25-60-1P RMNT-25-90-1P RMNT-25-90-1P
g
un al
VDC VDC P3.3V P5.0V_ALW P5.0V_AUD
C814 100nF C825 100nF C829 100nF C847 100nF C874 1nF
10V 10V 10V 10V 50V
ms nti
C816 100nF C827 100nF C831 100nF C849 100nF C876 1nF
10V 10V 10V 10V 50V
C815 100nF C826 100nF C830 100nF C848 100nF C875 1nF
10V 10V 10V 10V 50V
C C817 100nF C828 100nF C833 100nF C850 100nF C877 1nF
C
10V 10V 10V 10V 50V
C835 100nF C851 100nF
10V 10V
C834 100nF
VDC VDC 10V
C832 100nF
Sa de
C818 100nF C859 100nF 10V
10V 10V C838 100nF P1.5V
- This Document can not be used without Samsung's authorization -

C820 C860
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

100nF 100nF 10V


10V 10V C837 100nF C852 100nF
C819 100nF 10V 10V
10V C836 100nF C854 100nF
C822 VDC
8. Block Diagram and Schematic

100nF 10V 10V


C839 C853
nfi
10V 100nF 100nF
C824 100nF C861 100nF 10V 10V
10V 10V C841 100nF C855 100nF
C823 100nF 10V 10V
10V C843 100nF C856 100nF
C821 100nF 10V 10V
10V C842 100nF C857 100nF
10V 10V
C840 100nF C858 100nF
10V 10V
C846 100nF
10V
C845
Co
100nF
10V
B C844 100nF B
10V
FOR EMI
(When the EMI decap need, they will be updated in this sheet)
BOTTOM SIDE EMI CLIP
PCB REVISION CONTROL ( ICT ) EMI502 EMI504
NO CONNECTION DATE(YY/MM/DD) REVISION STEP
EMI EMI
1 N.C. EXF-0023-02 EXF-0023-02
REV500
1 2 1-2 EMI501 EMI503
3 2-3
EMI EMI
2 3
4 3-1 EXF-0023-02 EXF-0023-02
A 5 1-2-3 A
6 N.C.
7 1-2 SAMSUNG
8 2-3 ELECTRONICS
9 3-1
10 1-2-3

8-44
4 3 2 1
4 3 2 1

8-45
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
TP22875 KBC3_SUSPWR TP22964 CHP3_SATACLKREQ# TP23039 KBC3_WAKESCI# TP22870 BGATE TP23110 BGATE TP23142 BGATE
TP22876 P5.0V_STB_RQQQQQ1_MN TP22965 CHP3_SATALED# TP23040 KBC5_KSI(0) TP22892 CPU_CORE TP23135 CPU_CORE TP23167 CPU_CORE TP23199 CPU_CORE TP23231 CPU_CORE
TP22877 CHSETVR_PHASE_P1.5V_NS_MN TP23041 KBC5_KSI(1) TP22895 G_AUD TP23138 G_AUD TP23170 G_AUD TP23202 G_AUD TP23234 G_AUD
TP22967 CHP3_SLPS4# TP23042 KBC5_KSI(2) TP22888 G_CHG TP23131 G_CHG TP23163 G_CHG TP23195 G_CHG TP23227 G_CHG
TP22896 KBC3_PWRON TP22968 CHP3_SMLINK0 TP23043 KBC5_KSI(3) TP22887 G_CPU TP23130 G_CPU TP23162 G_CPU TP23226 G_CPU
PLT3_RST# CHP3_SMLINK1 KBC5_KSI(4) G_DDR G_DDR G_DDR G_DDR G_DDR
g
TP22897 TP22969 TP23044 TP22901 TP23123 TP23155 TP23187 TP23219
TP22908 ADT3_SEL# TP22970 CLK1_BSEL0 TP23045 KBC5_KSI(5) TP22886 G_P1.05V TP23129 G_P1.05V TP23161 G_P1.05V TP23193 G_P1.05V TP23225 G_P1.05V
TP22971 CLK1_BSEL1 TP23046 KBC5_KSI(6) TP22885 G_P3.3V TP23128 G_P3.3V TP23160 G_P3.3V TP23192 G_P3.3V TP23224 G_P3.3V
TP22910 AUD3_ANTIPOP_Q_MN TP22972 CLK1_BSEL2 TP23047 KBC5_KSI(7) TP22871 LCD_VDD3.3V TP23111 LCD_VDD3.3V TP23143 LCD_VDD3.3V TP23175 LCD_VDD3.3V TP23207 LCD_VDD3.3V
TP22911 AUD3_ANTIPOP_R_MN TP22973 CLK3_DBGLPC TP23048 KBC5_KSO(0) TP22902 MEM1_VREF TP23124 MEM1_VREF TP23156 MEM1_VREF TP23188 MEM1_VREF TP23220 MEM1_VREF
un al
TP22912 AUD3_GPIO1# TP22974 CLK3_FM48 TP23049 KBC5_KSO(1) TP22893 P0.9V TP23136 P0.9V TP23168 P0.9V TP23200 P0.9V TP23232 P0.9V
TP22913 AUD3_SHDN# TP22975 CLK3_ICH14 TP23050 KBC5_KSO(10) TP22899 P1.05V TP23140 P1.05V TP23172 P1.05V TP23204 P1.05V TP23236 P1.05V
TP23107 AUD3_SPKR TP23051 KBC5_KSO(11) TP22878 P1.2V_LAN TP23115 P1.2V_LAN TP23147 P1.2V_LAN TP23179 P1.2V_LAN TP23211 P1.2V_LAN
TP23052 KBC5_KSO(12) TP22881 P1.5V_PCIE TP23117 P1.5V_PCIE TP23149 P1.5V_PCIE TP23181 P1.5V_PCIE TP23213 P1.5V_PCIE
TP23109 AUD3_SPKR_Q_MN TP23053 KBC5_KSO(13) TP22890 P1.8V_AUX TP23133 P1.8V_AUX TP23165 P1.8V_AUX TP23197 P1.8V_AUX TP23229 P1.8V_AUX
TP23006 AUD3_SPKR_R_MN TP22979 CPU1_PWRGDCPU TP23054 KBC5_KSO(14) TP22903 P2.5V_LAN TP23125 P2.5V_LAN TP23157 P2.5V_LAN TP23189 P2.5V_LAN TP23221 P2.5V_LAN
TP22980 CPU1_SLP# TP23055 KBC5_KSO(15) TP22900 P3.3V TP23141 P3.3V TP23173 P3.3V TP23205 P3.3V TP23237 P3.3V
ms nti
TP22981 CPU1_SMI# TP23056 KBC5_KSO(2) TP22894 P3.3V_AUX TP23137 P3.3V_AUX TP23169 P3.3V_AUX TP23201 P3.3V_AUX TP23233 P3.3V_AUX
TP22982 CPU1_THRMTRIP# TP23057 KBC5_KSO(3) TP22879 P3.3V_MCD TP23116 P3.3V_MCD TP23148 P3.3V_MCD TP23180 P3.3V_MCD TP23212 P3.3V_MCD
TP22917 AUD5_HP_LEFT_B_MN TP22983 CPU1_VCCSENSE TP23058 KBC5_KSO(4) TP22882 P4.75V_AUD TP23118 P4.75V_AUD TP23150 P4.75V_AUD TP23182 P4.75V_AUD TP23214 P4.75V_AUD
C TP22918 AUD5_HP_LEFT_R_MN TP22984 CPU1_VSSSENSE TP23059 KBC5_KSO(5) TP22891 P5.0V TP23134 P5.0V TP23166 P5.0V TP23198 P5.0V TP23230 P5.0V C
TP22919 AUD5_HP_O_LEFT TP22985 CRT3_BLUE TP23060 KBC5_KSO(6) TP22889 P5.0V_ALW TP23132 P5.0V_ALW TP23164 P5.0V_ALW TP23196 P5.0V_ALW TP23228 P5.0V_ALW
TP22920 AUD5_HP_O_RIGHT TP22986 CRT3_DDCCLK TP23061 KBC5_KSO(7) TP22907 P5.0V_AMP TP23122 P5.0V_AMP TP23154 P5.0V_AMP TP23186 P5.0V_AMP TP23218 P5.0V_AMP
TP22921 AUD5_HP_RIGHT_B_MN TP22987 CRT3_DDCDATA TP23062 KBC5_KSO(8) TP22904 P5.0V_AUD TP23126 P5.0V_AUD TP23158 P5.0V_AUD TP23190 P5.0V_AUD TP23222 P5.0V_AUD
TP22922 AUD5_HP_RIGHT_R_MN TP22988 CRT3_GREEN TP23063 KBC5_KSO(9) TP22884 P5.0V_FILT TP23127 P5.0V_FILT TP23159 P5.0V_FILT TP23191 P5.0V_FILT TP23223 P5.0V_FILT
TP22989 CRT3_HSYNC TP22883 P5.0V_STB TP23119 P5.0V_STB TP23151 P5.0V_STB TP23183 P5.0V_STB TP23215 P5.0V_STB
CRT3_RED VCCA VCCA VCCA VCCA
Sa de
TP22990 TP22872 TP23112 TP23176 TP23208
TP22925 AUD5_LINE_O_LEFT TP22991 CRT3_VSYNC TP23066 LAN3_RSET_MN TP23120 VCC_CRT TP23216 VCC_CRT
TP22992 CRT5_DDCCLK TP22898 VDC TP23139 VDC TP23171 VDC TP23203 VDC TP23235 VDC
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

TP22927 AUD5_MIC1_LEFT TP22993 CRT5_DDCDATA TP22906 VDC_ADPT TP23121 VDC_ADPT TP23153 VDC_ADPT TP23185 VDC_ADPT TP23217 VDC_ADPT
TP22928 AUD5_MIC1_LEFT_B_MN TP22994 CRT5_HSYNC TP23069 LCD3_BKLTON TP22873 VDC_LED TP23113 VDC_LED TP23145 VDC_LED TP23177 VDC_LED TP23209 VDC_LED
TP22995 CRT5_VSYNC TP23070 LCD3_EDID_CLK TP22874 VREF TP23114 VREF TP23146 VREF TP23210 VREF
8. Block Diagram and Schematic

TP22930 AUD5_MIC1_LEFT_J_MN TP22996 FAN3_FDBACK# TP23071 LCD3_EDID_DATA


nfi
TP22931 AUD5_MIC1_RIGHT TP22997 FAN5_VDD TP23072 LID3_SWITCH# TP19836 PRTC_BAT
TP22932 AUD5_MIC1_RIGHT_B_MN TP22998 HDA3_AUD_BCLK TP23073 LOM3_CLKREQ#
TP22999 HDA3_AUD_RST# TP23074 MCD3_SDWP
TP22934 AUD5_MIC1_RIGHT_J_MN TP23000 KBC3_A20G TP23075 MCH1_HVREF
TP23001 KBC3_BKLTON TP23076 MCH1_HYSWING
TP23007 KBC3_BLCKPWRSW# TP23077 MCH3_LCD_BKLTEN
TP23008 KBC3_CAPSLED# TP23078 MCH3_LCD_VDDEN
TP22938 AUD5_MIC2_INT TP23009 KBC3_CHGEN TP23079 MIN3_CLKREQ#
TP22939 AUD5_MIC2_INT_B_MN TP23010 KBC3_EXTSMI# TP23080 PCI3_CLKRUN#
TP22940 AUD5_MIC2_INT_J_MN TP23011 KBC3_LED_ACIN#
Co
TP23012 KBC3_LED_CHARGE# TP23082 PCI3_FRAME#
B TP23013 KBC3_LED_POWER# TP23083 PEX3_WAKE# B
TP23014 KBC3_NUMLED# TP23084 PLT3_RST#
TP22944 AUD5_SENS_HP# TP23015 KBC3_PRECHG
TP23016 KBC3_PWRBTN# TP23086 SIM3_C1VCC
TP23017 KBC3_PWRGD TP23087 SIM3_C2RST
TP23088 SIM3_C3CLK
TP23019 KBC3_PWRSW# TP23089 SIM3_C6VPP
TP22949 AUD5_SPKAMP_LN_C_MN TP23020 KBC3_RCIN# TP23090 SIM3_C7DATA
TP23021 KBC3_RFOFF# TP23091 SMB3_ALERT#
TP22951 AUD5_SPKAMP_LP_C_MN TP23022 KBC3_RSMRST# TP23092 SPI3_CLK
TP23023 KBC3_RST#
TP23024 KBC3_RUNSCI# TP23094 SPI3_MISO
TP23025 KBC3_RX_CHG2000 TP23095 SPI3_MOSI
TP23026 KBC3_SCLED# TP23096 SPK5_L_M
TP23027 KBC3_SMCLK# TP23097 SPK5_L_P
TP23028 KBC3_SMDATA# TP23098 SPK5_R_M
TP23029 KBC3_SPKMUTE TP23099 SPK5_R_P
TP22959 AUX5_PWRGD TP23100 THM3_ALERT#
TP22960 BAT3_DETECT# TP23031 KBC3_SPKMUTE_HP_R_MN TP23101 THM3_STP#
TP22961 BAT3_SMCLK# TP23032 KBC3_SPKMUTE_Q_MN TP23102 TPD5_L_BUTTON#
TP22962 BAT3_SMDATA# TP23033 KBC3_SUSPWR TP23103 TPD5_R_BUTTON#
TP22963 CHP3_BIOSWP# TP23034 KBC3_THERM_SMCLK TP23104 VCCP3_PWRGD
TP23002 CHP3_CPUSTP# TP23035 KBC3_THERM_SMDATA TP23105 VRM3_CPU_PWRGD
A TP23003 CHP3_DPRSLPVR TP23036 KBC3_USBCHG TP23106 WLON_LED# A
TP23004 CHP3_PCISTP# TP23037 KBC3_USBPWRON#
TP23005 CHP3_RTCRST# TP23038 KBC3_VRON
SAMSUNG
ELECTRONICS

N310
4 3 2 1
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8. Block Diagram and Schematic

8-46 N310

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