A B C D E

1 1

Compal Confidential
2 2

HTW20 LA-3171P Schematics Document

Intel Yonah/Merom with 945PM/GM + DDRII + ICH7M
(+VGA/B ATi M52P/M54P/56P)

2006-04-26
3 3

REV: 1.0

4 4

Compal Electronics, Inc.

2006/04/22 2009/04/22
Security Classification Compal Secret Data Cover Sheet
Issued Date Title
Deciphered Date 1.0
HTW20 M/B LA-3171P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Friday, April 28, 2006 1 44
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com
A B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C D
Date:
E
Sheet of
 A B C D E

Compal confidential
Model:HTW20 Fan Control
page 4
Yonah/Merom Thermal Sensor Clock Generator Accelerometer
File Name : LA-3171P uFCPGA-479 CPU ICS9LPRS325AKLFT LIS3L02AQ3TR
ADM1032AR
NAPA Platform page 4,5,6 page 4 page 15 page 27
1 1
H_A#(3..31)
FSB
H_D#(0..63)
LCD Conn. CRT & TV-out 533/667MHz
page 17 page 16

Intel Calistoga GMCH DDR2 -400/533/667 DDR2-SO-DIMM X2

BANK 0, 1, 2, 3 page 13,14

945PM/GM
ATI M52/M54/M56 Dual Channel
VGA/B Conn. PCBGA 1466
page 7,8,9,10,11,12
with 64/128/256MB page 17 PCI-Express
VRAM page 17 x16
PCI-E BUS 2.5GHz

New Card/B USB conn USB2.0

DMI x 4 Conn page 25 page 30
Bluetooth Conn
page 31
(port 1) (port 2)

2 USB 3.3V 48MHz PCI Express 2.5GHz 2

10/100/1000 LAN Mini Express Card (port 3)

USB port 6 USB port 2, 3, 4 USB port 7
RTL8111B/RTL8101E page 25 USB port 1 USB 3.3V 48MHz
3.3V 33 MHz
page 26 PCI BUS Azalia 3.3V 24.576MHz/48Mhz
MDC1.5
Intel ICH7-M SATA 1.5GHz
page 28

RJ45/11 CONN mBGA-652

page 26 VIA 1394 CardBus Controller PATA 3.3V ATA-100 Audio CKT AMP & Audio Jack
VT6311S ENE CB714 page 18,19,20,21 ALC861 page 28 TPA0232 page 29
page 24 page 22

SATA HDD Connector HTW20 Sub-board

SATA Master
1394 port Slot 0 5in1 Slot page 19 New Card/B
page 24 page 23 page 23
LED LS-2872P
PATA Slave
3
page 33
LPC BUS PATA ODD Connector 3

3.3V 33 MHz page 19 New Card/FPC

RTC CKT. LF-2873P
page 19
SW/B
Power On/Off CKT. TPM1.2 LS-2865P
page 33
SLB9635TT1.2
page 27 ENE KB910QF VGA/B
DC/DC Interface CKT. page 31
LS-3171P
page 34 LS-3172P

Power Circuit DC/DC TP/B

Page 35,36,37,38,39,40,41
LS-3173P
Touch Pad Int.KBD BIOS
4
page 32 page 33 page 32 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HTW20 M/B LA-3171P
Date: Friday, April 28, 2006 Sheet 2 of 44
A B C D E
 A B C D E

Voltage Rails Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%
Power Plane Description S1 S3 S5 Ra 100K +/- 5%
Board ID Rb V AD_BID min V AD_BID typ V AD_BID max
VIN Adapter power supply (19V) N/A N/A N/A
B+ AC or battery power rail for power circuit. N/A N/A N/A
0 0 0 V 0 V 0 V
1
+CPU_CORE Core voltage for CPU ON OFF OFF
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V 1

+0.9VS 0.9V switched power rail for DDR terminator ON OFF OFF
2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+VCCP 1.05V switched power rail ON OFF OFF
3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+1.5VS 1.5V switched power rail ON OFF OFF
4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+1.8V 1.8V power rail for DDR ON ON OFF
5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+1.8VS 1.8V switched power rail ON OFF OFF
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+2.5VS 2.5V switched power rail ON OFF OFF
7 NC 2.500 V 3.300 V 3.300 V
+3VALW 3.3V always on power rail ON ON ON*
+3VS 3.3V switched power rail ON OFF OFF
BOARD ID Table BTO Option Table
+5VALW 5V always on power rail ON ON ON*
+5VS 5V switched power rail ON OFF OFF Board ID PCB Revision BTO Item BOM Structure
+VSB +VSB always on power rail ON ON ON* 0 0.1 GM@
VGA PM@
+RTCVCC RTC power ON ON ON 1 0.2
New Card NEWCARD@
2 0.3
Giga LAN 100M@
3 1000M@
4 KILL SW WLAN@
2 2
5 BlueTooth BT@
6 5IN1 5IN1@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
7

External PCI Devices SKU ID Table

DEVICE PCI Device ID IDSEL # REQ/GNT # PIRQ
SKU ID SKU
1394 D0 AD16 0 E 0
CARD BUS D4 AD20 2 A ,B 1
5IN1 D4 AD20 2 A ,B 2
3
4
5
6
KB910 I2C / SMBUS ADDRESSING 7
DEVICE HEX ADDRESS
3 3

SM1 24C16 A0H 1010000Xb

SM1 SMART BATTERY 16H 0001011Xb
SM2 ADM0132 98H 1001100Xb
CPU THERMAL MONITOR

ICH7-M SM Bus address

DEVICE HEX ADDRESS
DDR SO-DIMM 0 A0 10100000
DDR SO-DIMM 1 A4 10100100
CLOCK GENERATOR (EXT.) D2 11010010

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HTW20 M/B LA-3171P
Date: Friday, April 28, 2006 Sheet 3 of 44
A B C D E
 5 4 3 2 1

Place close to CPU within 500mil

+VCCP
7 H_A#[3..31] H_D#[0..63] 7
JP18A

H_A#3 J4 E22 H_D#0 XDP_TDI R56 1 2 56_0402_5%

H_A#4
H_A#5
L4
A3#
A4#
YONAH D0#
D1# F24 H_D#1
H_D#2 XDP_TMS R55 56_0402_5%
M3 A5# D2# E26 1 2
H_A#6 K5 H22 H_D#3
H_A#7 A6# D3# H_D#4 XDP_TDO R54
M1 F23 1 2 @ 56_0402_5%
H_A#8
H_A#9
N2
J1
A7#
A8#
D4#
D5# G25
E25
H_D#5
H_D#6
Thermal Sensor ADM1032ARM XDP_BPM#5 R53 1 2 56_0402_5%
D H_A#10 A9# D6# H_D#7 D
N3 A10# D7# E23
H_A#11 P5 K24 H_D#8 +3VS XDP_TRST# R57 1 2 56_0402_5%
H_A#12 A11# D8# H_D#9
P2 A12# D9# G24
H_A#13 L1 J24 H_D#10 XDP_TCK R47 1 2 56_0402_5%
H_A#14 A13# D10# H_D#11
P4 A14# D11# J23
H_A#15 P1 H26 H_D#12
H_A#16 A15# D12# H_D#13
R1 A16# D13# F26 1

1
H_A#17 Y2 K22 H_D#14
H_A#18 A17# D14# H_D#15 C209 R113
U5 A18# D15# H25
H_A#19 R3 N22 H_D#16 0.1U_0402_16V4Z @ 10K_0402_5%
H_A#20 A19# D16# H_D#17 2
W6 A20# D17# K25 1
H_A#21 U4 P26 H_D#18 C212

2
H_A#22 A21# D18# H_D#19 U8
Y5 A22# D19# R23
H_A#23 U2 L25 H_D#20 2200P_0402_50V7K H_THERMDA 2 1
H_A#24 A23# D20# H_D#21 2 D+ VDD1
R4 A24# D21# L22
H_A#25 T5 ADDR GROUP DATA GROUP L23 H_D#22 H_THERMDC 3 6
H_A#26 A25# D22# H_D#23 D- ALERT#
T3 A26# D23# M23
H_A#27 W3 P25 H_D#24 8 4
A27# D24# 31 EC_SMB_CK2 SCLK THERM#
H_A#28 W5 P22 H_D#25
H_A#29 A28# D25# H_D#26
Y4 A29# D26# P23 31 EC_SMB_DA2 7 SDATA GND 5
H_A#30 W2 T24 H_D#27
H_A#31 A30# D27# H_D#28
7 H_REQ#[0..4] Y1 A31# D28# R24
L26 H_D#29 ADM1032ARM_RM8
H_REQ#0 D29# H_D#30
K3 REQ0# D30# T25
H_REQ#1 H2 N24 H_D#31
H_REQ#2 REQ1# D31# H_D#32
K2 REQ2# D32# AA23
H_REQ#3 J3 AB24 H_D#33
H_REQ#4 REQ3# D33# H_D#34
L5 REQ4# D34# V24
V26 H_D#35 +5VS
H_ADSTB#0 D35# H_D#36
7 H_ADSTB#0 L2 ADSTB0# D36# W25
H_ADSTB#1 V4 U23 H_D#37
7 H_ADSTB#1 ADSTB1# D37#
U25 H_D#38
C D38# H_D#39 C
D39# U22 1

1
AB25 H_D#40 C596
D40#

1
W22 H_D#41 5 C D36

P
D41# 31 EN_DFAN1 +
Y23 H_D#42 7 FAN1_ON 1 2 2 Q40 10U_0805_10V4Z
CLK_CPU_BCLK A22 D42# H_D#43 0 R429 100_0402_5% B 2
FMMT619_SOT23 1SS355_SOD323
15 CLK_CPU_BCLK BCLK0 D43# AA26 1 2 6 -

G
CLK_CPU_BCLK# A21 HOST CLK Y26 H_D#44 R430 1 E

2
15 CLK_CPU_BCLK# BCLK1 D44# H_D#45 10K_0402_5% @ PU5B LM358DT_SO8
Y22

4
D45# H_D#46 C601
D46# AC26

1
AA24 H_D#47 0.1U_0402_16V4Z
H_ADS# D47# H_D#48 2 D37
7 H_ADS# H1 ADS# D48# AC22
H_BNR# E2 AC23 H_D#49 1 2 1N4148_SOT23
7 H_BNR# BNR# D49#
H_BPRI# G5 AB22 H_D#50 R431 8.2K_0402_5%
7 H_BPRI# BPRI# D50#
H_BR0# F1 AA21 H_D#51 JP4
7 H_BR0#

2
H_DEFER# BR0# D51# H_D#52 +FAN1_VOUT
7 H_DEFER# H5 DEFER# D52# AB21 1
H_DRD Y# F21 AC25 H_D#53
7 H_DRDY# DRDY# D53# 2
R94 H_HIT# G6 AD20 H_D#54
7 H_HIT# HIT# D54# 3
56_0402_5% H_HITM# E4 CONTROL AE22 H_D#55 +3VS 1 2
7 H_HITM# HITM# D55#
1 2 H_IERR# D20 AF23 H_D#56 R432 10K_0402_5% ACES_85205-0300
+VCCP H_LOCK# IERR# D56# H_D#57
7 H_LOCK# H4 LOCK# D57# AD24
H_RESET# B1 AE21 H_D#58 1
7 H_RESET# RESET# D58# 31 FAN_SPEED1
AD21 H_D#59 1 @
D59# H_D#60 C597
7 H_RS#[0..2] D60# AE25
H_RS#0 F3 AF25 H_D#61 C598 1000P_0402_50V7K
H_RS#1 RS0# D61# H_D#62 1000P_0402_50V7K 2
F4 RS1# D62# AF22
H_RS#2 H_D#63 2
G3 RS2# D63# AF26
H_TRDY# G2
7 H_TRDY# TRDY#
J26 H_DINV#0
DINV0# H_DINV#0 7
M26 H_DINV#1
DINV1# H_DINV#1 7
AD4 V23 H_DINV#2
BPM0# DINV2# H_DINV#2 7
AD3 AC20 H_DINV#3
BPM1# DINV3# H_DINV#3 7
AD1 BPM2#
B B
AC4 BPM3# H_DSTBN#[0..3] 7
H23 H_DSTBN#0
DBRESET# DSTBN0# H_DSTBN#1
20 DBRESET# C20 DBR# DSTBN1# M24
H_DBSY# E1 W24 H_DSTBN#2 Close to Fan Conn.
7 H_DBSY# DBSY# DSTBN2#
H_DPSLP# B5 AD23 H_DSTBN#3
19 H_DPSLP# DPSLP# DSTBN3# H_DSTBP#[0..3] 7
H_DPRSTP# E5 G22 H_DSTBP#0 Placement near to ICH7
19,41 H_DPRSTP# DPRSTP# DSTBP0#
H_DPWR# D24 N25 H_DSTBP#1
7 H_DPWR# DPWR# DSTBP1#
AC2 MISC Y25 H_DSTBP#2 H_FERR# 2 1
R95 XDP_BPM#5 AC1 PRDY# DSTBP2# H_DSTBP#3 C211 @ 180P_0402_50V8J
PREQ# DSTBP3# AE24
1 2 H_PROCHOT# D21
+VCCP 56_0402_5% PROCHOT#
19 H_PWRGOOD H_PW RGOOD D6
H_CPUSLP# PWRGOOD
7 H_CPUSLP# D7 SLP#
XDP_TCK AC5
XDP_TDI TCK H_A20M# H_SMI#
AA6 TDI A20M# A6 H_A20M# 19 2 1
XDP_TDO AB3 A5 H_FERR# C202 @ 180P_0402_50V8J
TDO FERR# H_FERR# 19
R85 1 2 @ 1K_0402_5% TEST1 C26 C4 H_IGNNE# H_INIT# 2 1
TEST1 IGNNE# H_IGNNE# 19
R84 1 2 51_0402_5% TEST2 D25 B3 H_INIT# C162 @ 180P_0402_50V8J
TEST2 INIT# H_INIT# 19
XDP_TMS AB5 C6 H_INTR H_NMI 2 1
TMS LINT0 H_INTR 19
XDP_TRST# AB6 B4 H_NMI C203 @ 180P_0402_50V8J
TRST# LINT1 H_NMI 19
LEGACY CPU H_A20M# 2 1
THERMAL C210 @ 180P_0402_50V8J
H_THERMDA A24 D5 H_STPCLK# H_INTR 2 1
H_THERMDC THERMDA DIODE STPCLK# H_SMI#
H_STPCLK# 19
C173 @ 180P_0402_50V8J
A25 THERMDC SMI# A3 H_SMI# 19
H_THERMTRIP# C7 H_IGNNE# 2 1
7,19 H_THERMTRIP# THERMTRIP# C161 @ 180P_0402_50V8J
H_THERMDA, H_THERMDC routing together. H_STPCLK# 2 1
FOX_PZ47903-2741-42_YONAH C172 @ 180P_0402_50V8J
Trace width / Spacing = 10 / 10 mil H_PW RGOOD 2 1
C171 @ 180P_0402_50V8J
H_CPUSLP# 2 1
C169 @ 180P_0402_50V8J
A +VCCP A

+VCCP
Placement near to CPU side
1

R98
R89 H_DPSLP# 1 2

@ 56_0402_5% @ 56_0402_5%
R97 Security Classification Compal Secret Data Compal Electronics, Inc.
2 2

H_DPRSTP# 1 2 2006/04/22 2009/04/22 Title

Issued Date Deciphered Date
B

@ 56_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Yonah CPU in mFCPGA479
E

H_PROCHOT# 3 1 OCP# AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
OCP# 20

WWW.AliSaler.Com
C

Q12 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
@ MMBT3904_SOT23 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 4 of 44
5 4 3 2 1
 5 4 3 2 1

+VCCP +CPU_CORE
Length match within 25 mils JP18B JP18C
D D
The trace width 18 mils space

1
41 VCCSENSE VCCSENSE AF7 AB26 AE18 K1
VCCSENSE VSS VCC VSS
+CPU_CORE 7 mils 41 VSSSENSE VSSSENSE AE7 VSSSENSE VSS AA25 AE17 VCC VSS J2
R67 R52 AD25 AB15 M2
+V_CPU_GTLREF 1K_0402_1% 100_0402_1% VSS VCC VSS
VSS AE26 AA15 VCC VSS N1
1 2 VCCSENSE B26 AB23 AD15 T1
2
+1.5VS VCCA VSS VCC VSS

0.01U_0402_16V7K
VSS AC24 AC15 VCC VSS R2

10U_0805_10V4Z
R51 K6 AF24 AF15 V2
100_0402_1% +VCCP VCCP VSS VCC VSS
J6 VCCP VSS AE23 AE15 VCC VSS W1
1

1 2 VSSSENSE 1 1 M6 AA22 AB14 A26

VCCP VSS VCC VSS

C164

C163
N6 AD22 AA13 D26
R58
2K_0402_1%
T6
VCCP
VCCP
YONAH VSS
VSS AC21 AD14
VCC
VCC
VSS
VSS C25
R6 VCCP VSS AF21 AC13 VCC VSS F25
2 2
K21 AB19 AF14 B24
2

VCCP VSS VCC VSS

J21 VCCP VSS AA19 AE13 VCC VSS A23
M21 VCCP VSS AD19 AB12 VCC VSS D23
Close to CPU pin N21
T21
VCCP VSS AC19
AF19
AA12
AD12
VCC YONAH VSS E24
B21
Close to CPU pin AD26 VCCP VSS VCC VSS
within 500mils. R21 VCCP VSS AE19 AC12 VCC VSS C22
within 500mils. V21 VCCP VSS AB16 AF12 VCC VSS F22

POWER, GROUNG, RESERVED SIGNALS AND NC

W21 VCCP VSS AA16 AE12 VCC VSS E21
V6 VCCP VSS AD16 AB10 VCC VSS B19
G21 VCCP VSS AC16 AB9 VCC VSS A19
VSS AF16 AA10 VCC VSS D19
VSS AE16 AA9 VCC VSS C19
41 H_PSI# H_PSI# AE6 AB13 AD10 F19
PSI# VSS VCC VSS
VSS AA14 AD9 VCC VSS E19
CPU_VID0 AD6 AD13 AC10 B16
41 CPU_VID0 VID0 VSS VCC VSS
CPU_VID1 AF5 AC14 AC9 A16
41 CPU_VID1 VID1 VSS VCC VSS
CPU_VID2 AE5 AF13 AF10 D16
41 CPU_VID2 VID2 VSS VCC VSS
CPU_VID3 AF4 AE14 AF9 C16
41 CPU_VID3 VID3 VSS VCC VSS
CPU_BSEL CPU_BSEL2 CPU_BSEL1 CPU_BSEL0 CPU_VID4 AE3 AB11 AE10 POWER, GROUND F16
C 41 CPU_VID4 VID4 VSS VCC VSS C
CPU_VID5 AF2 AA11 AE9 E16
41 CPU_VID5 VID5 VSS VCC VSS
CPU_VID6 AE2 AD11 AB7 B13
41 CPU_VID6 VID6 VSS VCC VSS
VSS AC11 AA7 VCC VSS A14
133 0 0 1 VSS AF11 AD7 VCC VSS D13
+V_CPU_GTLREF AD26 GTLREF VSS AE11 AC7 VCC VSS C14
VSS AB8 B20 VCC VSS F13
CPU_BSEL0 B22 AA8 A20 E14
15 CPU_BSEL0 BSEL0 VSS VCC VSS
166 0 1 CPU_BSEL1
1 15 CPU_BSEL1
CPU_BSEL2
B23
C21
BSEL1 VSS AD8
AC8
F20
E20
VCC VSS B11
A11
15 CPU_BSEL2 BSEL2 VSS VCC VSS
VSS AF8 B18 VCC VSS D11
COMP0 R26 AE8 B17 C11
COMP1 COMP0 VSS VCC VSS
U26 COMP1 VSS AA5 A18 VCC VSS F11
COMP2 U1 AD5 A17 E11
COMP3 COMP2 VSS VCC VSS
V1 COMP3 VSS AC6 D18 VCC VSS B8
VSS AF6 D17 VCC VSS A8
VSS AB4 C18 VCC VSS D8
+CPU_CORE E7 VCC VSS AC3 C17 VCC VSS C8
AB20 VCC VSS AF3 F18 VCC VSS F8
AA20 VCC VSS AE4 F17 VCC VSS E8
AF20 VCC VSS AB1 E18 VCC VSS G26
Resistor placed within AE20 VCC VSS AA2 E17 VCC VSS K26
27.4_0402_1%

54.9_0402_1%

27.4_0402_1%

54.9_0402_1%

AB18 AD2 B15 J25

0.5" of CPU pin.Trace VCC VSS VCC VSS
1

AB17 VCC VSS AE1 A15 VCC VSS M25

should be at least 25 AA18 VCC VSS B6 D15 VCC VSS N26
R68

R65
R324

R325

AA17 C5 C15 T26

mils away from any AD18
VCC VSS
F5 F15
VCC VSS
R25
VCC VSS VCC VSS
other toggling signal. AD17 E6 E15 V25
2

VCC VSS VCC VSS

AC18 VCC VSS H6 B14 VCC VSS W26
AC17 VCC VSS J5 A13 VCC VSS H24
AF18 VCC VSS M5 D14 VCC VSS G23
AF17 VCC VSS L6 C13 VCC VSS K23
VSS P6 F14 VCC VSS L24
B B
VSS R5 E13 VCC VSS P24
D2 RSVD VSS V5 B12 VCC VSS N23
F6 RSVD VSS U6 A12 VCC VSS T23
D3 RSVD VSS Y6 D12 VCC VSS U24
C1 RSVD VSS A4 C12 VCC VSS Y24
AF1 RSVD VSS D4 F12 VCC VSS W23
D22 RSVD VSS E3 E12 VCC VSS H21
C23 RSVD VSS H3 B10 VCC VSS J22
C24 RSVD VSS G4 B9 VCC VSS M22
AA1 RSVD VSS K4 A10 VCC VSS L21
AA4 RSVD VSS L3 A9 VCC VSS P21
AB2 RSVD VSS P3 D10 VCC VSS R22
AA3 RSVD VSS N4 D9 VCC VSS V22
M4 RSVD VSS T4 C10 VCC VSS U21
N5 RSVD VSS U3 C9 VCC VSS Y21
T2 RSVD VSS Y3 F10 VCC
V3 RSVD VSS W4 F9 VCC
B2 RSVD VSS D1 E10 VCC
C3 RSVD VSS C2 E9 VCC
T22 RSVD VSS F2 B7 VCC
B25 RSVD VSS G1 A7 VCC
F7 VCC

FOX_PZ47903-2741-42_YONAH FOX_PZ47903-2741-42_YONAH

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Yonah CPU in mFCPGA479
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 28, 2006 Sheet 5 of 44
5 4 3 2 1
 5 4 3 2 1

D +CPU_CORE D

1 1 1 1 1 1 1 1
C533 C135 C136 C137 C138 C139 C140 C152

10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M

2 2 2 2 2 2 2 2

+CPU_CORE

1 1 1 1 1 1 1 1
C146 C147 C544 C148 C149 C150 C151 C206

10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M

2 2 2 2 2 2 2 2

+CPU_CORE

1 1 1 1 1 1 1 1
C207 C205 C204 C543 C546 C545 C125 C124

10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M

2 2 2 2 2 2 2 2

C C
+CPU_CORE

1 1 1 1 1 1 1 1
C127 C529 C528 C548 C547 C532 C531 C530

10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M Mid Frequence Decoupling
2 2 2 2 2 2 2 2
10uF X32 PCS

+CPU_CORE

330U_D_2VM 330U_D_2VM 330U_D_2VM

South Side Secondary North Side Secondary

1 1 1 1 1 1 1 ESR <= 1.5m ohm
C550 + C121 + C122 + C537 + C536 + C208 + + C144
Capacitor > 1980uF
330U_D_2VM @ 330U_D_2VM
2 2 2 2 2 2 2
B B

330U_D_2VM 330U_D_2VM
330uF ESR 7m ohm X 6 PCS

+VCCP

1
330U_D2E_2.5VM_R9

1 1 1 1 1 1 Place these inside socket

C134 + C539 C534 C540 C535 C541 C538 cavity on Bottom layer (North
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
side Secondary)
2 2 2 2 2 2 2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU Bypass capacitors
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 6 of 44
5 4 3 2 1
 5 4 3 2 1

4 H_D#[0..63] H_A#[3..31] 4 Description at page11.

U6A U6B
H_D#0 F1 H9 H_A#3
H_D#1 HD0# HA3# H_A#4 DMI_TXN0 MCH_CLKSEL0
J1 HD1# HA4# C9 20 DMI_TXN0 AE35 DMIRXN0 CFG0 K16 MCH_CLKSEL0 15
H_D#2 H1 E11 H_A#5 DMI_TXN1 AF39 K18 MCH_CLKSEL1
HD2# HA5# 20 DMI_TXN1 DMIRXN1 CFG1 MCH_CLKSEL1 15
H_D#3 J6 G11 H_A#6 DMI_TXN2 AG35 J18 MCH_CLKSEL2
HD3# HA6# 20 DMI_TXN2 DMIRXN2 CFG2 MCH_CLKSEL2 15
H_D#4 H3 F11 H_A#7 DMI_TXN3 AH39 F18
HD4# HA7# 20 DMI_TXN3 DMIRXN3 CFG3
H_D#5 K2 G12 H_A#8 E15
D H_D#6 HD5# HA8# H_A#9 CFG4 CFG5 D
G1 HD6# HA9# F9 CFG5 F15 CFG5 11
H_D#7 G2 H11 H_A#10 DMI_TXP0 AC35 E18
HD7# HA10# 20 DMI_TXP0 DMIRXP0 CFG6
H_D#8 K9 J12 H_A#11 DMI_TXP1 AE39 D19 CFG7
HD8# HA11# 20 DMI_TXP1 DMIRXP1 CFG7 CFG7 11
H_D#9 K1 G14 H_A#12 DMI_TXP2 AF35 D16
HD9# HA12# 20 DMI_TXP2 DMIRXP2 CFG8

DMI
H_D#10 K7 D9 H_A#13 DMI_TXP3 AG39 G16 CFG9
HD10# HA13# 20 DMI_TXP3 DMIRXP3 CFG9 CFG9 11
H_D#11 J8 J14 H_A#14 E16
H_D#12 HD11# HA14# H_A#15 CFG10 CFG11
H4 HD12# HA15# H13 CFG11 D15 CFG11 11
H_D#13 J3 J15 H_A#16 DMI_RXN0 AE37 G15 CFG12
HD13# HA16# 20 DMI_RXN0 DMITXN0 CFG12 CFG12 11
H_D#14 K11 F14 H_A#17 DMI_RXN1 AF41 K15 CFG13
HD14# HA17# 20 DMI_RXN1 DMITXN1 CFG13 CFG13 11

CFG
H_D#15 G4 D12 H_A#18 DMI_RXN2 AG37 C15
HD15# HA18# 20 DMI_RXN2 DMITXN2 CFG14
H_D#16 T10 A11 H_A#19 DMI_RXN3 AH41 H16
HD16# HA19# 20 DMI_RXN3 DMITXN3 CFG15
H_D#17 W11 C11 H_A#20 G18 CFG16
HD17# HA20# CFG16 CFG16 11
H_D#18 T3 A12 H_A#21 H15
H_D#19 HD18# HA21# H_A#22 DMI_RXP0 CFG17 CFG18
U7 HD19# HA22# A13 20 DMI_RXP0 AC37 DMITXP0 CFG18 J25 CFG18 11
H_D#20 U9 E13 H_A#23 DMI_RXP1 AE41 K27 CFG19
HD20# HA23# 20 DMI_RXP1 DMITXP1 CFG19 CFG19 11
H_D#21 U11 G13 H_A#24 DMI_RXP2 AF37 J26 CFG20
HD21# HA24# 20 DMI_RXP2 DMITXP2 CFG20 CFG20 11
H_D#22 T11 F12 H_A#25 DMI_RXP3 AG41
HD22# HA25# 20 DMI_RXP3 DMITXP3
H_D#23 W9 B12 H_A#26
H_D#24 HD23# HA26# H_A#27
T1 HD24# HA27# B14 G_CLKP AG33 CLK_MCH_3GPLL CLK_MCH_3GPLL 15
H_D#25 T8 C12 H_A#28 M_CLK_DDR0 AY35 AF33 CLK_MCH_3GPLL#
HD25# HA28# 13 M_CLK_DDR0 SM_CK0 G_CLKN CLK_MCH_3GPLL# 15
H_D#26 T4 A14 H_A#29 M_CLK_DDR1 AR1
HD26# HA29# 13 M_CLK_DDR1 SM_CK1
H_D#27 W7 C14 H_A#30 M_CLK_DDR2 AW7 A27

CLK
HD27# HA30# 14 M_CLK_DDR2 SM_CK2 D_REF_CLKN CLK_MCH_DREFCLK# 15
H_D#28 U5 D14 H_A#31 M_CLK_DDR3 AW40 A26
HD28# HA31# 14 M_CLK_DDR3 SM_CK3 D_REF_CLKP CLK_MCH_DREFCLK 15
H_D#29 T9
H_D#30 HD29# M_CLK_DDR#0
W6 HD30# 13 M_CLK_DDR#0 AW35 SM_CK0# D_REF_SSCLKN C40 CLK_PCIE_GMCH# 15
H_D#31 T5 M_CLK_DDR#1 AT1 D41
H_D#32 AB7
HD31#
HD32#
HOST HREQ#0 D8 H_REQ#0
H_REQ#[0..4] 4 13
14
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#2 AY7
SM_CK1#
SM_CK2#
D_REF_SSCLKP CLK_PCIE_GMCH 15
H_D#33 AA9 G8 H_REQ#1 M_CLK_DDR#3 AY40 H32 MCH_CLKREQ#
HD33# HREQ#1 14 M_CLK_DDR#3 SM_CK3# CLK_REQ# MCH_CLKREQ# 15
H_D#34 W4 B8 H_REQ#2
H_D#35 HD34# HREQ#2 H_REQ#3 DDR_CKE0_DIMMA
W3 HD35# HREQ#3 F8 13 DDR_CKE0_DIMMA AU20 SM_CKE0

DDR MUXING
H_D#36 Y3 A8 H_REQ#4 DDR_CKE1_DIMMA AT20
HD36# HREQ#4 13 DDR_CKE1_DIMMA SM_CKE1
H_D#37 Y7 DDR_CKE2_DIMMB BA29 A3
C HD37# 14 DDR_CKE2_DIMMB SM_CKE2 NC0 C
H_D#38 W5 DDR_CKE3_DIMMB AY29 A39
HD38# 14 DDR_CKE3_DIMMB SM_CKE3 NC1
H_D#39 Y10 B9 H_ADSTB#0 A4
HD39# HADSTB#0 H_ADSTB#0 4 NC2
H_D#40 AB8 C13 H_ADSTB#1 DDR_CS0_DIMMA# AW13 A40
HD40# HADSTB#1 H_ADSTB#1 4 13 DDR_CS0_DIMMA# SM_CS0# NC3
H_D#41 W2 DDR_CS1_DIMMA# AW12 AW1
HD41# 13 DDR_CS1_DIMMA# SM_CS1# NC4
H_D#42 AA4 AG1 CLK_MCH_BCLK# DDR_CS2_DIMMB# AY21 AW41
HD42# HCLKN CLK_MCH_BCLK# 15 14 DDR_CS2_DIMMB# SM_CS2# NC5
H_D#43 AA7 AG2 CLK_MCH_BCLK DDR_CS3_DIMMB# AW21 AY1
HD43# HCLKP CLK_MCH_BCLK 15 14 DDR_CS3_DIMMB# SM_CS3# NC6
H_D#44 AA2 BA1

NC
HD44# H_DSTBN#[0..3] 4 NC7
H_D#45 AA6 K4 H_DSTBN#0 AL20 BA2
H_D#46 HD45# HDSTBN#0 H_DSTBN#1 SM_OCDCOMP0 NC8
AA10 HD46# HDSTBN#1 T7 AF10 SM_OCDCOMP1 NC9 BA3
H_D#47 Y8 Y5 H_DSTBN#2 BA39
H_D#48 HD47# HDSTBN#2 H_DSTBN#3 M_ODT0 NC10
AA1 HD48# HDSTBN#3 AC4 H_DSTBP#[0..3] 4 13 M_ODT0 BA13 SM_ODT0 NC11 BA40
H_D#49 H_DSTBP#0 +1.8V M_ODT1
AB4 HD49# HDSTBP#0 K3 13 M_ODT1 BA12 SM_ODT1 NC12 BA41
H_XSCOMP/H_YSCOMP trace H_D#50 AC9 T6 H_DSTBP#1 M_ODT2 AY20 C1
L width and spacing is 5/20. H_D#51 AB11
HD50#
HD51#
HDSTBP#1
HDSTBP#2 AA5 H_DSTBP#2
14
14
M_ODT2
M_ODT3
M_ODT3 AU21
SM_ODT2
SM_ODT3
NC13
NC14 AY41
H_D#52 AC11 AC5 H_DSTBP#3 B2
H_D#53 HD52# HDSTBP#3 R319 1 SMRCOMPN NC15
AB3 HD53# 2 80.6_0402_1% AV9 SM_RCOMPN NC16 B41
+VCCP H_D#54 AC2 1 2 SMRCOMPP AT9 C41
H_D#55 HD54# H_DINV#0 R318 80.6_0402_1% SM_RCOMPP NC17
AD1 HD55# HDINV#0 J7 H_DINV#0 4 NC18 D1
H_D#56 AD9 W8 H_DINV#1 +SM_VREF0 AK1
HD56# HDINV#1 H_DINV#1 4 SM_VREF0
H_D#57 AC1 U3 H_DINV#2 +SM_VREF1 AK41
HD57# HDINV#2 H_DINV#2 4 SM_VREF1
54.9_0402_1%

54.9_0402_1%

H_D#58 AD7 AB10 H_DINV#3 T32

HD58# HDINV#3 H_DINV#3 4 RESERVED1
1

H_D#59 AC6 R32

HD59# RESERVED2
R59

R63

H_D#60 AB5 20 PM_BMBUSY# PM_BMBUSY# G28 F3

H_D#61 HD60# H_RESET# R28 1 0_0402_5% PM_EXTTS#0 PM_BMBUSY# RESERVED3
AD10 HD61# HCPURST# B7 H_RESET# 4 13,14 DDR_TS 2 F25 PM_EXTTS0# RESERVED4 F7

RESERVED
PM
H_D#62 AD4 E8 H_ADS# 20,41 DPRSLPVR R287 1 2 0_0402_5% PM_EXTTS#1 H26 AG11
HD62# HADS# H_ADS# 4 PM_EXTTS1# RESERVED5
H_D#63 AC8 E7 H_TRDY# 4,19 H_THERMTRIP# H_THERMTRIP# G6 AF11
H_TRDY# 4
2

HD63# HTRDY# H_DPWR# PWROK PM_THERMTRIP# RESERVED6

HDPWR# J9 H_DPWR# 4 20,31 PWROK AH33 PWROK RESERVED7 H7
H8 H_DRD Y# 2 1 PLTRST_R# AH34 J19
HDRDY# H_DRDY# 4 17,18,20,25,26,27 PLT_RST# RSTIN# RESERVED8
J13 C3 H_DEFER# R9 100_0402_1% A41
HVREF0 HDEFER# H_DEFER# 4 RESERVED9 +3VS
H_VREF K13 D4 H_HITM# 18 MCH_ICH_SYNC# K28 A34
HVREF1 HHITM# H_HITM# 4 ICH_SYNC# RESERVED10
H_XRCOMP E1 D3 H_HIT# D28
HXRCOMP HHIT# H_HIT# 4 RESERVED11
H_XSCOMP E2 B3 H_LOCK# D27
B HXSCOMP HLOCK# H_LOCK# 4 RESERVED12 B
H_YRCOMP Y1 C7 H_BR0# A35 R292
HYRCOMP HBREQ0# H_BR0# 4 RESERVED13
H_YSCOMP U1 C6 H_BNR# PM_EXTTS#0 2 1
HYSCOMP HBNR# H_BNR# 4
H_SWNG0 E4 F6 H_BPRI# CALISTOGA_FCBGA1466~D 10K_0402_5%
HXSWING HBPRI# H_BPRI# 4
H_SWNG1 W1 A7 H_DBSY# PM@
HYSWING HDBSY# H_DBSY# 4
E3 H_CPUSLP# R288
HCPUSLP# H_CPUSLP# 4
24.9_0402_1%

24.9_0402_1%

PM_EXTTS#1 2 1
1

@ 10K_0402_5%
R64

R60

B4 H_RS#0 Layout Note:

HRS0# H_RS#1
HRS1# E6 +SM_VREF0 & +SM_VREF1
D6 H_RS#2
HRS2# trace width and
H_RS#[0..2] 4
2

spacing is 20/20.
CALISTOGA_FCBGA1466~D

PM@
+1.8V +1.8V

Layout Note:

1
H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 / R62 R425
H_SWNG1 trace width and spacing is 18/20.
+SM_VREF0 1K_0402_1% +SM_VREF1 1K_0402_1%

2
+VCCP +VCCP

0.1U_0402_16V4Z

0.1U_0402_16V4Z
15mils 15mils

1
+VCCP
221_0603_1%

221_0603_1%

1 R61 1 R426
1

1
100_0402_1%
1

R69
R321

C129

C595
1K_0402_1% 1K_0402_1%
R313

2
2 2
A A
2

H_SWNG0 H_SWNG1
2

H_VREF
0.1U_0402_16V4Z

0.1U_0402_16V4Z
1

1
100_0402_1%

100_0402_1%
0.1U_0402_16V4Z

1 1
1

200_0402_1%

R66
R320

1
R314

C503

C514

C128

2 2 Security Classification Compal Secret Data Compal Electronics, Inc.

2

2
Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Calistoga (1/6)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 28, 2006 Sheet 7 of 44
5 4 3 2 1
 5 4 3 2 1

D D

U6D U6E
DDR_A_D[0..63] 13 DDR_B_D[0..63] 14
DDR_A_BS#0 AU12 AJ35 DDR_A_D0 DDR_B_BS#0 AT24 AK39 DDR_B_D0
13 DDR_A_BS#0 SA_BS0 SA_DQ0 14 DDR_B_BS#0 SB_BS0 SB_DQ0
DDR_A_BS#1 AV14 AJ34 DDR_A_D1 DDR_B_BS#1 AV23 AJ37 DDR_B_D1
13 DDR_A_BS#1 SA_BS1 SA_DQ1 14 DDR_B_BS#1 SB_BS1 SB_DQ1
DDR_A_BS#2 BA20 AM31 DDR_A_D2 DDR_B_BS#2 AY28 AP39 DDR_B_D2
13 DDR_A_BS#2 SA_BS2 SA_DQ2 14 DDR_B_BS#2 SB_BS2 SB_DQ2
AM33 DDR_A_D3 AR41 DDR_B_D3
SA_DQ3 DDR_A_D4 SB_DQ3 DDR_B_D4
SA_DQ4 AJ36 SB_DQ4 AJ38
13 DDR_A_DM[0..7] AK35 DDR_A_D5 14 DDR_B_DM[0..7] AK38 DDR_B_D5
DDR_A_DM0 SA_DQ5 DDR_A_D6 DDR_B_DM0 SB_DQ5 DDR_B_D6
AJ33 SA_DM0 SA_DQ6 AJ32 AK36 SB_DM0 SB_DQ6 AN41
DDR_A_DM1 AM35 AH31 DDR_A_D7 DDR_B_DM1 AR38 AP41 DDR_B_D7
DDR_A_DM2 SA_DM1 SA_DQ7 DDR_A_D8 DDR_B_DM2 SB_DM1 SB_DQ7 DDR_B_D8
AL26 SA_DM2 SA_DQ8 AN35 AT36 SB_DM2 SB_DQ8 AT40
DDR_A_DM3 AN22 AP33 DDR_A_D9 DDR_B_DM3 BA31 AV41 DDR_B_D9
DDR_A_DM4 SA_DM3 SA_DQ9 DDR_A_D10 DDR_B_DM4 SB_DM3 SB_DQ9 DDR_B_D10
AM14 SA_DM4 SA_DQ10 AR31 AL17 SB_DM4 SB_DQ10 AU38
DDR_A_DM5 AL9 AP31 DDR_A_D11 DDR_B_DM5 AH8 AV38 DDR_B_D11
DDR_A_DM6 SA_DM5 SA_DQ11 DDR_A_D12 DDR_B_DM6 SB_DM5 SB_DQ11 DDR_B_D12
AR3 SA_DM6 SA_DQ12 AN38 BA5 SB_DM6 SB_DQ12 AP38
DDR_A_DM7 AH4 AM36 DDR_A_D13 DDR_B_DM7 AN4 AR40 DDR_B_D13
SA_DM7 SA_DQ13 DDR_A_D14 SB_DM7 SB_DQ13 DDR_B_D14
SA_DQ14 AM34 SB_DQ14 AW38
AN33 DDR_A_D15 AY38 DDR_B_D15
SA_DQ15 DDR_A_D16 SB_DQ15 DDR_B_D16
SA_DQ16 AK26 SB_DQ16 BA38
13 DDR_A_DQS[0..7] AL27 DDR_A_D17 14 DDR_B_DQS[0..7] AV36 DDR_B_D17
DDR_A_DQS0 SA_DQ17 DDR_A_D18 DDR_B_DQS0 SB_DQ17 DDR_B_D18
AK33 SA_DQS0 SA_DQ18 AM26 AM39 SB_DQS0 SB_DQ18 AR36
DDR_A_DQS1 AT33 AN24 DDR_A_D19 DDR_B_DQS1 AT39 AP36 DDR_B_D19
DDR_A_DQS2 SA_DQS1 SA_DQ19 DDR_A_D20 DDR_B_DQS2 SB_DQS1 SB_DQ19 DDR_B_D20
AN28 AK28 AU35 BA36

DDR SYS MEMORY A

DDR SYS MEMORY B

DDR_A_DQS3 SA_DQS2 SA_DQ20 DDR_A_D21 DDR_B_DQS3 SB_DQS2 SB_DQ20 DDR_B_D21
AM22 SA_DQS3 SA_DQ21 AL28 AR29 SB_DQS3 SB_DQ21 AU36
C DDR_A_DQS4 DDR_A_D22 DDR_B_DQS4 DDR_B_D22 C
AN12 SA_DQS4 SA_DQ22 AM24 AR16 SB_DQS4 SB_DQ22 AP35
DDR_A_DQS5 AN8 AP26 DDR_A_D23 DDR_B_DQS5 AR10 AP34 DDR_B_D23
DDR_A_DQS6 SA_DQS5 SA_DQ23 DDR_A_D24 DDR_B_DQS6 SB_DQS5 SB_DQ23 DDR_B_D24
AP3 SA_DQS6 SA_DQ24 AP23 AR7 SB_DQS6 SB_DQ24 AY33
DDR_A_DQS7 AG5 AL22 DDR_A_D25 DDR_B_DQS7 AN5 BA33 DDR_B_D25
SA_DQS7 SA_DQ25 DDR_A_D26 SB_DQS7 SB_DQ25 DDR_B_D26
SA_DQ26 AP21 SB_DQ26 AT31
13 DDR_A_DQS#[0..7] AN20 DDR_A_D27 14 DDR_B_DQS#[0..7] AU29 DDR_B_D27
DDR_A_DQS#0 SA_DQ27 DDR_A_D28 DDR_B_DQS#0 SB_DQ27 DDR_B_D28
AK32 SA_DQS0# SA_DQ28 AL23 AM40 SB_DQS0# SB_DQ28 AU31
DDR_A_DQS#1 AU33 AP24 DDR_A_D29 DDR_B_DQS#1 AU39 AW31 DDR_B_D29
DDR_A_DQS#2 SA_DQS1# SA_DQ29 DDR_A_D30 DDR_B_DQS#2 SB_DQS1# SB_DQ29 DDR_B_D30
AN27 SA_DQS2# SA_DQ30 AP20 AT35 SB_DQS2# SB_DQ30 AV29
DDR_A_DQS#3 AM21 AT21 DDR_A_D31 DDR_B_DQS#3 AP29 AW29 DDR_B_D31
DDR_A_DQS#4 SA_DQS3# SA_DQ31 DDR_A_D32 DDR_B_DQS#4 SB_DQS3# SB_DQ31 DDR_B_D32
AM12 SA_DQS4# SA_DQ32 AR12 AP16 SB_DQS4# SB_DQ32 AM19
DDR_A_DQS#5 AL8 AR14 DDR_A_D33 DDR_B_DQS#5 AT10 AL19 DDR_B_D33
DDR_A_DQS#6 SA_DQS5# SA_DQ33 DDR_A_D34 DDR_B_DQS#6 SB_DQS5# SB_DQ33 DDR_B_D34
AN3 SA_DQS6# SA_DQ34 AP13 AT7 SB_DQS6# SB_DQ34 AP14
DDR_A_DQS#7 AH5 AP12 DDR_A_D35 DDR_B_DQS#7 AP5 AN14 DDR_B_D35
SA_DQS7# SA_DQ35 DDR_A_D36 SB_DQS7# SB_DQ35 DDR_B_D36
SA_DQ36 AT13 SB_DQ36 AN17
AT12 DDR_A_D37 AM16 DDR_B_D37
SA_DQ37 DDR_A_D38 SB_DQ37 DDR_B_D38
13 DDR_A_MA[0..13] SA_DQ38 AL14 14 DDR_B_MA[0..13] SB_DQ38 AP15
DDR_A_MA0 AY16 AL12 DDR_A_D39 DDR_B_MA0 AY23 AL15 DDR_B_D39
DDR_A_MA1 SA_MA0 SA_DQ39 DDR_A_D40 DDR_B_MA1 SB_MA0 SB_DQ39 DDR_B_D40
AU14 SA_MA1 SA_DQ40 AK9 AW24 SB_MA1 SB_DQ40 AJ11
DDR_A_MA2 AW16 AN7 DDR_A_D41 DDR_B_MA2 AY24 AH10 DDR_B_D41
DDR_A_MA3 SA_MA2 SA_DQ41 DDR_A_D42 DDR_B_MA3 SB_MA2 SB_DQ41 DDR_B_D42
BA16 SA_MA3 SA_DQ42 AK8 AR28 SB_MA3 SB_DQ42 AJ9
DDR_A_MA4 BA17 AK7 DDR_A_D43 DDR_B_MA4 AT27 AN10 DDR_B_D43
DDR_A_MA5 SA_MA4 SA_DQ43 DDR_A_D44 DDR_B_MA5 SB_MA4 SB_DQ43 DDR_B_D44
AU16 SA_MA5 SA_DQ44 AP9 AT28 SB_MA5 SB_DQ44 AK13
DDR_A_MA6 AV17 AN9 DDR_A_D45 DDR_B_MA6 AU27 AH11 DDR_B_D45
DDR_A_MA7 SA_MA6 SA_DQ45 DDR_A_D46 DDR_B_MA7 SB_MA6 SB_DQ45 DDR_B_D46
AU17 SA_MA7 SA_DQ46 AT5 AV28 SB_MA7 SB_DQ46 AK10
DDR_A_MA8 AW17 AL5 DDR_A_D47 DDR_B_MA8 AV27 AJ8 DDR_B_D47
DDR_A_MA9 SA_MA8 SA_DQ47 DDR_A_D48 DDR_B_MA9 SB_MA8 SB_DQ47 DDR_B_D48
AT16 SA_MA9 SA_DQ48 AY2 AW27 SB_MA9 SB_DQ48 BA10
DDR_A_MA10 AU13 AW2 DDR_A_D49 DDR_B_MA10 AV24 AW10 DDR_B_D49
DDR_A_MA11 SA_MA10 SA_DQ49 DDR_A_D50 DDR_B_MA11 SB_MA10 SB_DQ49 DDR_B_D50
AT17 SA_MA11 SA_DQ50 AP1 BA27 SB_MA11 SB_DQ50 BA4
DDR_A_MA12 AV20 AN2 DDR_A_D51 DDR_B_MA12 AY27 AW4 DDR_B_D51
DDR_A_MA13 SA_MA12 SA_DQ51 DDR_A_D52 DDR_B_MA13 SB_MA12 SB_DQ51 DDR_B_D52
AV12 SA_MA13 SA_DQ52 AV2 AR23 SB_MA13 SB_DQ52 AY10
AT3 DDR_A_D53 AY9 DDR_B_D53
B SA_DQ53 DDR_A_D54 SB_DQ53 DDR_B_D54 B
SA_DQ54 AN1 SB_DQ54 AW5
AL2 DDR_A_D55 AY5 DDR_B_D55
DDR_A_CAS# SA_DQ55 DDR_A_D56 DDR_B_CAS# SB_DQ55 DDR_B_D56
13 DDR_A_CAS# AY13 SA_CAS# SA_DQ56 AG7 14 DDR_B_CAS# AR24 SB_CAS# SB_DQ56 AV4
13 DDR_A_RAS# DDR_A_RAS# AW14 AF9 DDR_A_D57 DDR_B_RAS# AU23 AR5 DDR_B_D57
SA_RAS# SA_DQ57 14 DDR_B_RAS# SB_RAS# SB_DQ57
DDR_A_WE# AY14 AG4 DDR_A_D58 DDR_B_WE# AR27 AK4 DDR_B_D58
13 DDR_A_WE# SA_WE# SA_DQ58 14 DDR_B_WE# SB_WE# SB_DQ58
AK23 AF6 DDR_A_D59 AK16 AK3 DDR_B_D59
SA_RCVENIN# SA_DQ59 DDR_A_D60 SB_RCVENIN# SB_DQ59 DDR_B_D60
AK24 SA_RCVENOUT# SA_DQ60 AG9 AK18 SB_RCVENOUT# SB_DQ60 AT4
AH6 DDR_A_D61 AK5 DDR_B_D61
SA_DQ61 DDR_A_D62 SB_DQ61 DDR_B_D62
SA_DQ62 AF4 SB_DQ62 AJ5
AF8 DDR_A_D63 AJ3 DDR_B_D63
SA_DQ63 SB_DQ63

CALISTOGA_FCBGA1466~D CALISTOGA_FCBGA1466~D
PM@
PM@

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Calistoga (2/6)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 28, 2006 Sheet 8 of 44
5 4 3 2 1
 5 4 3 2 1

PCIE_MTX_C_GRX_N[0..15]
17 PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
17 PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
17 PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
D 17 PCIE_GTX_C_MRX_P[0..15] D

+3VS

R293 2.2K_0402_5% GMCH_LCD_CLK L PEGCOMP trace width

2 1 +1.5VS_PCIE
GM@ and spacing is 18/25 mils. R280
R295 2 1 2.2K_0402_5% GMCH_LCD_DATA U6C 24.9_0402_1%
GM@ H27 D40 PEGCOMP 1 2
R296 1 2.2K_0402_5% GMCH_CRT_CLK SDVOCTRL_DATA EXP_COMPI
2 H28 SDVOCTRL_CLK EXP_COMPO D38

R297 1 2 2.2K_0402_5% GMCH_CRT_DATA F34 PCIE_GTX_C_MRX_N0

GMCH_TXOUT0+ EXP_RXN0 PCIE_GTX_C_MRX_N1
17 GMCH_TXOUT0+ B37 LA_DATA0 EXP_RXN1 G38
R283 1 2 10K_0402_5% LCTLB_DATA GMCH_TXOUT1+ B34 H34 PCIE_GTX_C_MRX_N2
17 GMCH_TXOUT1+ LA_DATA1 EXP_RXN2
@ GMCH_TXOUT2+ A36 J38 PCIE_GTX_C_MRX_N3
17 GMCH_TXOUT2+ LA_DATA2 EXP_RXN3
R284 1 2 10K_0402_5% LCTLA_CLK L34 PCIE_GTX_C_MRX_N4
@ GMCH_TXOUT0- EXP_RXN4 PCIE_GTX_C_MRX_N5
17 GMCH_TXOUT0- C37 LA_DATA#0 EXP_RXN5 M38
GMCH_TXOUT1- B35 N34 PCIE_GTX_C_MRX_N6
17 GMCH_TXOUT1- LA_DATA#1 EXP_RXN6
GMCH_TXOUT2- A37 P38 PCIE_GTX_C_MRX_N7
17 GMCH_TXOUT2- LA_DATA#2 EXP_RXN7
R34 PCIE_GTX_C_MRX_N8
EXP_RXN8 PCIE_GTX_C_MRX_N9
F30 LB_DATA0 EXP_RXN9 T38
PCIE_GTX_C_MRX_N10

LVDS
D29 LB_DATA1 EXP_RXN10 V34
F28 W38 PCIE_GTX_C_MRX_N11
LB_DATA2 EXP_RXN11 PCIE_GTX_C_MRX_N12
EXP_RXN12 Y34
G30 AA38 PCIE_GTX_C_MRX_N13
R286 1 100K_0402_5% GMCH_ENBKL LB_DATA#0 EXP_RXN13 PCIE_GTX_C_MRX_N14
2 D30 LB_DATA#1 EXP_RXN14 AB34
F29 AC38 PCIE_GTX_C_MRX_N15
R282 1 1.5K_0402_1% LIBG LB_DATA#2 EXP_RXN15
2
GMCH_TXCLK+ A32 D34 PCIE_GTX_C_MRX_P0
C 17 GMCH_TXCLK+ LA_CLK EXP_RXP0 C
R44 1 2 75_0402_1% GMCH_TV_COMPS GMCH_TXCLK- A33 F38 PCIE_GTX_C_MRX_P1
17 GMCH_TXCLK- LA_CLK# EXP_RXP1
E26 G34 PCIE_GTX_C_MRX_P2
R41 150_0402_1% GMCH_TV_LUMA LB_CLK EXP_RXP2 PCIE_GTX_C_MRX_P3
1 2 E27 LB_CLK# EXP_RXP3 H38
J34 PCIE_GTX_C_MRX_P4

PCI-EXPRESS GRAPHICS
R37 150_0402_1% GMCH_TV_CRMA EXP_RXP4 PCIE_GTX_C_MRX_P5
1 2 D32 LBKLT_CTL EXP_RXP5 L38
31 GMCH_ENBKL GMCH_ENBKL J30 M34 PCIE_GTX_C_MRX_P6
R289 1 100K_0402_5% GMCH_ENVDD LCTLA_CLK LBKLT_EN EXP_RXP6 PCIE_GTX_C_MRX_P7
2 H30 LCTLA_CLK EXP_RXP7 N38
LCTLB_DATA H29 P34 PCIE_GTX_C_MRX_P8
GMCH_LCD_CLK LCTLB_DATA EXP_RXP8 PCIE_GTX_C_MRX_P9
17 GMCH_LCD_CLK G26 LDDC_CLK EXP_RXP9 R38
GMCH_LCD_DATA G25 T34 PCIE_GTX_C_MRX_P10
17 GMCH_LCD_DATA LDDC_DATA EXP_RXP10
GMCH_ENVDD F32 V38 PCIE_GTX_C_MRX_P11
17 GMCH_ENVDD LVDD_EN EXP_RXP11
LIBG B38 W34 PCIE_GTX_C_MRX_P12
LIBG EXP_RXP12 PCIE_GTX_C_MRX_P13
C35 LVBG EXP_RXP13 Y38
C33 AA34 PCIE_GTX_C_MRX_P14
LVREFH EXP_RXP14 PCIE_GTX_C_MRX_P15
C32 LVREFL EXP_RXP15 AB38

F36 PCIE_MTX_GRX_N0 C449 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N0

GMCH_TV_COMPS EXP_TXN0 PCIE_MTX_GRX_N1 C433 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N1
A16 TVDAC_A EXP_TXN1 G40
GMCH_TV_LUMA C18 H36 PCIE_MTX_GRX_N2 C447 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N2
16 GMCH_TV_LUMA TVDAC_B EXP_TXN2
GMCH_TV_CRMA A19 J40 PCIE_MTX_GRX_N3 C431 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N3
16 GMCH_TV_CRMA TVDAC_C EXP_TXN3

TV
L36 PCIE_MTX_GRX_N4 C445 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N4
TV_REFSET EXP_TXN4 PCIE_MTX_GRX_N5 C429 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N5
2 1 J20 TV_IREF EXP_TXN5 M40
R308 4.99K_0402_1% N36 PCIE_MTX_GRX_N6 C443 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N6
EXP_TXN6 PCIE_MTX_GRX_N7 C427 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N7
B16 TV_IRTNA EXP_TXN7 P40
B18 R36 PCIE_MTX_GRX_N8 C441 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N8
TV_IRTNB EXP_TXN8 PCIE_MTX_GRX_N9 C425 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N9
B19 TV_IRTNC EXP_TXN9 T40
V36 PCIE_MTX_GRX_N10 C439 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N10
EXP_TXN10 PCIE_MTX_GRX_N11 C423 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N11
J29 TV_DCONSEL1 EXP_TXN11 W40
K30 Y36 PCIE_MTX_GRX_N12 C437 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N12
TV_DCONSEL0 EXP_TXN12 PCIE_MTX_GRX_N13 C421 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N13
EXP_TXN13 AA40
AB36 PCIE_MTX_GRX_N14 C435 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N14
EXP_TXN14 PCIE_MTX_GRX_N15 C419 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N15
EXP_TXN15 AC40
B GMCH_CRT_CLK B
16 GMCH_CRT_CLK C26 DDCCLK

CRT
GMCH_CRT_DATA C25 D36 PCIE_MTX_GRX_P0 C450 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P0
16 GMCH_CRT_DATA DDCDATA EXP_TXP0
F40 PCIE_MTX_GRX_P1 C434 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P1
EXP_TXP1 PCIE_MTX_GRX_P2 C448 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P2
16 GMCH_CRT_VSYNC H23 VSYNC EXP_TXP2 G36
G23 H40 PCIE_MTX_GRX_P3 C432 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P3
16 GMCH_CRT_HSYNC HSYNC EXP_TXP3
E23 J36 PCIE_MTX_GRX_P4 C446 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P4
16 GMCH_CRT_B BLUE EXP_TXP4
2 1 D23 L40 PCIE_MTX_GRX_P5 C430 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P5
R299 150_0402_1% BLUE# EXP_TXP5 PCIE_MTX_GRX_P6 C444 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P6
16 GMCH_CRT_G C22 GREEN EXP_TXP6 M36
2 1 B22 N40 PCIE_MTX_GRX_P7 C428 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P7
R302 150_0402_1% GREEN# EXP_TXP7 PCIE_MTX_GRX_P8 C442 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P8
16 GMCH_CRT_R A21 RED EXP_TXP8 P36
2 1 B21 R40 PCIE_MTX_GRX_P9 C426 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P9
R36 150_0402_1% RED# EXP_TXP9 PCIE_MTX_GRX_P10 C440 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P10
EXP_TXP10 T36
V40 PCIE_MTX_GRX_P11 C424 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P11
EXP_TXP11 PCIE_MTX_GRX_P12 C438 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P12
1 2 J22 CRT_IREF EXP_TXP12 W36
R298 255_0402_1% Y40 PCIE_MTX_GRX_P13 C422 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P13
EXP_TXP13 PCIE_MTX_GRX_P14 C436 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P14
EXP_TXP14 AA36
AB40 PCIE_MTX_GRX_P15 C420 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P15
EXP_TXP15

CALISTOGA_FCBGA1466~D
PM@

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Calistoga (3/6)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 28, 2006 Sheet 9 of 44
5 4 3 2 1
 5 4 3 2 1

+2.5VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1 1 1 1

C454

C461

C483

C462
U6H
+VCCP H22
VCC_SYNC +2.5VS 2 2 2 2 +3VS_TVDACB +3VS +3VS_TVDACA +3VS
AC14 R304 R35
VTT0
AB14 VTT1 VCCTX_LVDS0 B30 +2.5VS 2 1 2 1

2200P_0402_50V7K

2200P_0402_50V7K
W14 C30 0_0805_5% 0_0805_5%
VTT2 VCCTX_LVDS1 +1.5VS_PCIE

0.1U_0402_16V4Z

0.1U_0402_16V4Z
V14 A30 R281
VTT3 VCCTX_LVDS2 0_0805_5%
T14
D
R14
VTT4
VTT5 VCC3G0 AB41 W=40 mils 10U_0805_6.3V6M 2 1 +1.5VS
1 1 1 1
D

C64
C488

C481

C493
P14 VTT6 VCC3G1 AJ41
N14 VTT7 VCC3G2 L41 1 1 2 2 2 2

220U_D2_4VM
M14 VTT8 VCC3G3 N41 1 C455 1 C457
L14 R41 + C453 + C451
VTT9 VCC3G4 @
AD13 VTT10 VCC3G5 V41
AC13 Y41 10U_0805_6.3V6M
VTT11 VCC3G6 2 2 2 2
AB13 VTT12
1 AA13 VTT13 VCCA_3GPLL AC33 +1.5VS_3GPLL

330U_D2E_2.5VM_R9
Y13 VTT14 VCCA_3GBG G41 +2.5VS
C523 + W13 H41 220U_D2_4VM
VTT15 VSSA_3GBG
V13 VTT16
U13 L29 2.2_0603_5%
2 VTT17 +2.5VS_CRTDAC
T13 VTT18 VCCA_CRTDAC0 E21 1 2 +2.5VS

2200P_0402_50V7K
R13 VTT19 VCCA_CRTDAC1 F21

0.1U_0402_16V4Z
N13 VTT20 VSSA_CRTDAC2 G21
+3VS_TVBG +3VS +3VS_TVDACC +3VS

22U_0805_6.3V6M
M13 VTT21 1 1 1
L13 C498 R307 R34
VTT22

C485

C484
AB12 VTT23 VCCA_DPLLA B26 +1.5VS_DPLLA 2 1 2 1

2200P_0402_50V7K
AA12 C39 +1.5VS_DPLLB 0.5_0805_1% 0_0805_5%
VTT24 VCCA_DPLLB 2 2 2

2200P_0402_50V7K

0.1U_0402_16V4Z

0.1U_0402_16V4Z
22U_0805_6.3V6M

22U_0805_6.3V6M
Y12 VTT25 VCCA_HPLL AF1 +1.5VS_HPLL
W12 VTT26 1 1 1 1 1 1
V12 VTT27

C57
C494

C491
U12 VTT28 VCCA_LVDS A38 +2.5VS

C599

C495

C600
T12 VTT29 VSSA_LVDS B39
2 2 2 2 2 2
R12 VTT30
P12 VTT31
N12 AF2
M12
VTT32
VTT33
P O W E R VCCA_MPLL +1.5VS_MPLL
4.7U_0805_10V4Z

2.2U_0805_16V4Z

L12 VTT34 VCCA_TVBG H20 +3VS_TVBG

R11 VTT35 VSSA_TVBG G20
1 1 P11 VTT36
C507

C524

C C
N11 VTT37
M11 VTT38 VCCA_TVDACA0 E19 +3VS_TVDACA
R10 VTT39 VCCA_TVDACA1 F19
2 2
P10 VTT40 VCCA_TVDACB0 C20 +3VS_TVDACB
N10 VTT41 VCCA_TVDACB1 D20
M10 E20
P9
N9
VTT42
VTT43
VCCA_TVDACC0
VCCA_TVDACC1 F20
+3VS_TVDACC
PCI-E/MEM/FSB PLL decoupling
VTT44
M9 VTT45
R8 AH1 +1.5VS KC FBM-L11-201209-221LMAT_0805
VTT46 VCCD_HMPLL0 KC FBM-L11-201209-221LMAT_0805
P8 VTT47 VCCD_HMPLL1 AH2
N8 +1.5VS_3GPLL +1.5VS +1.5VS_TVDAC +1.5VS
VTT48 R18 R19 R40
M8 VTT49
P7 A28 1 2 2 1 0.022U_0402_16V7K 2 1
VTT50 VCCD_LVDS0

0.1U_0402_16V4Z

0.1U_0402_16V4Z
N7 B28 0.5_0805_1%
VTT51 VCCD_LVDS1
M7 VTT52 VCCD_LVDS2 C28
R6 VTT53 1 1 1 1 1 1
P6 D21 +1.5VS_TVDAC C40 C492 C84 C83
VTT54 VCCD_TVDAC

C458

C41
M6 VTT55 VCCDQ_TVDAC H19
MCH_A6 A6 0.022U_0402_16V7K
VTT56 +3VS_VCCHV 2 2 2 2 2 2
R5 VTT57 VCCHV0 A23 1 2 +3VS
P5 B23 L36 0_0603_5% @ 10U_0805_6.3V6M
VTT58 VCCHV1
0.1U_0402_16V4Z
1 N5 B25 @
VTT59 VCCHV2 10U_0805_6.3V6M
M5 VTT60 1 1
C513 P4 AK31
0.47U_0402_6.3V6K VTT61 VCCAUX0 C477
N4 VTT62 VCCAUX1 AF31
2
C476

M4 AE31 22U_0805_6.3V6M
VTT63 VCCAUX2 2 2
R3 VTT64 VCCAUX3 AC31
P3 VTT65 VCCAUX4 AL30
+1.5VS_MPLL KC FBM-L11-201209-221LMAT_0805 +1.5VS_HPLL KC FBM-L11-201209-221LMAT_0805
N3 VTT66 VCCAUX5 AK30
0.22U_0603_10V7K

M3 AJ30 R322 R323

VTT67 VCCAUX6 +1.5VS
B
R2 VTT68 VCCAUX7 AH30 45mA Max. 2 1 +1.5VS 45mA Max. 2 1 +1.5VS B
P2 VTT69 VCCAUX8 AG30
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1 M2 VTT70 VCCAUX9 AF30
C505

MCH_D2 D2 AE30
VTT71 VCCAUX10
AB1 VTT72 VCCAUX11 AD30 1 1 1 1 1
0.22U_0603_10V7K

R1 AC30 C521 C522

2 VTT73 VCCAUX12
C463

C515

C517
1 P1 AG29
MCH_AB1

VTT74 VCCAUX13
C518

N1 AF29 10U_0805_6.3V6M 10U_0805_6.3V6M

VTT75 VCCAUX14 2 2 2 2 2
M1 VTT76 VCCAUX15 AE29
VCCAUX16 AD29
2
VCCAUX17 AC29
1 VCCAUX18 AG28
VCCAUX19 AF28
C519 AE28
0.47U_0402_6.3V6K VCCAUX20
VCCAUX21 AH22
2
VCCAUX22 AJ21
AG14 VCCAUX32 VCCAUX23 AH21
AF14 VCCAUX33 VCCAUX24 AJ20
AE14 VCCAUX34 VCCAUX25 AH20
Y14 VCCAUX35 VCCAUX26 AH19
AF13 P19 +1.5VS_DPLLB KC FBM-L11-201209-221LMAT_0805 +1.5VS_DPLLA
VCCAUX36 VCCAUX27 KC FBM-L11-201209-221LMAT_0805
AE13 VCCAUX37 VCCAUX28 P16
+1.5VS AF12 AH15 R279 R303
VCCAUX38 VCCAUX29
AE12 VCCAUX39 VCCAUX30 P15 40mA Max. 2 1 +1.5VS 40mA Max. 2 1 +1.5VS
AD12 VCCAUX40 VCCAUX31 AH14

0.1U_0402_16V4Z

0.1U_0402_16V4Z

330U_D2E_2.5VM_R9
1 1

330U_D2E_2.5VM_R9
CALISTOGA_FCBGA1466~D 1 1

C452

C469
PM@ C456 + +

C472
GM@ GM@
2 2 2 2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Calistoga (4/6)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 10 of 44
5 4 3 2 1
 5 4 3 2 1

Strap Pin Table

CFG[3:17] have internal pull up

U6F CFG[19:18] have internal pull down

+VCCP +1.5VS +VCCP U6G +1.8V

AD27 VCC_NCTF0 VCCAUX_NCTF0 AG27 AA33 VCC0 VCC_SM0 AU41 011 = 667MT/s FSB
AC27 AF27 W33 AT41 VCCSM_LF4 CFG[2:0] 001 = 533MT/s FSB
VCC_NCTF1 VCCAUX_NCTF1 VCC1 VCC_SM1 VCCSM_LF5
AB27 VCC_NCTF2 VCCAUX_NCTF2 AG26 P33 VCC2 VCC_SM2 AM41
AA27 VCC_NCTF3 VCCAUX_NCTF3 AF26 N33 VCC3 VCC_SM3 AU40 0 = DMI x 2
Y27 VCC_NCTF4 VCCAUX_NCTF4 AG25 L33 VCC4 VCC_SM4 BA34 CFG5 1 = DMI x 4 *(Default)

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K
W27 VCC_NCTF5 VCCAUX_NCTF5 AF25 J33 VCC5 VCC_SM5 AY34
V27 VCC_NCTF6 VCCAUX_NCTF6 AG24 AA32 VCC6 VCC_SM6 AW34 1 1 0 = Reserved

C38

C39
D D
U27 VCC_NCTF7 VCCAUX_NCTF7 AF24 Y32 VCC7 VCC_SM7 AV34 CFG7 1 = Mobile Yonah CPU*(Default)
T27 VCC_NCTF8 VCCAUX_NCTF8 AG23 W32 VCC8 VCC_SM8 AU34
0.22U_0603_10V7K

0.22U_0603_10V7K

0.22U_0603_10V7K

R27 VCC_NCTF9 VCCAUX_NCTF9 AF23 V32 VCC9 VCC_SM9 AT34

2 2 0 = Lane Reversal Enable
AD26 VCC_NCTF10 VCCAUX_NCTF10 AG22 P32 VCC10 VCC_SM10 AR34 CFG9 1 = Normal Operation (Default)*
1 1 1 AC26 VCC_NCTF11 VCCAUX_NCTF11 AF22 N32 VCC11 VCC_SM11 BA30
AB26 VCC_NCTF12 VCCAUX_NCTF12 AG21 M32 VCC12 VCC_SM12 AY30 0 = Reserved
C496

C460

C482

AA26 VCC_NCTF13 VCCAUX_NCTF13 AF21 L32 VCC13 VCC_SM13 AW30

2 2 2
Y26 VCC_NCTF14 VCCAUX_NCTF14 AG20 J32 VCC14 VCC_SM14 AV30 CFG11 1 = Calistoga *
W26 VCC_NCTF15 VCCAUX_NCTF15 AF20 AA31 VCC15 VCC_SM15 AU30
V26 VCC_NCTF16 VCCAUX_NCTF16 AG19 W31 VCC16 VCC_SM16 AT30
U26 VCC_NCTF17 VCCAUX_NCTF17 AF19 V31 VCC17 VCC_SM17 AR30 Place near pin AT41 & AM41
T26 VCC_NCTF18 VCCAUX_NCTF18 R19 T31 VCC18 VCC_SM18 AP30 00 = Reserved
R26 VCC_NCTF19 VCCAUX_NCTF19 AG18 R31 VCC19 VCC_SM19 AN30 CFG[13:12] 01 = XOR Mode Enabled
AD25 VCC_NCTF20 VCCAUX_NCTF20 AF18 P31 VCC20 VCC_SM20 AM30 10 = All Z Mode Enabled
AC25 VCC_NCTF21 VCCAUX_NCTF21 R18 N31 VCC21 VCC_SM21 AM29
+1.8V
11 = Normal Operation *(Default)
AB25 VCC_NCTF22 VCCAUX_NCTF22 AG17 M31 VCC22 VCC_SM22 AL29
AA25 VCC_NCTF23 VCCAUX_NCTF23 AF17 AA30 VCC23 VCC_SM23 AK29 0 = Dynamic ODT Disabled
Y25 VCC_NCTF24 VCCAUX_NCTF24 AE17 Y30 VCC24 VCC_SM24 AJ29 CFG16 1 = Dynamic ODT Enabled *(Default)
W25 VCC_NCTF25 VCCAUX_NCTF25 AD17 W30 VCC25 VCC_SM25 AH29

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
V25 VCC_NCTF26 VCCAUX_NCTF26 AB17 V30 VCC26 VCC_SM26 AJ28 0 = 1.05V *(Default)
10U_0805_6.3V6M U25 AA17 U30 AH28 CFG18 1 = 1.5V
VCC_NCTF27 VCCAUX_NCTF27 VCC27 VCC_SM27
1U_0603_10V4Z

T25 W17 T30 AJ27

P O W E R
VCC_NCTF28 VCCAUX_NCTF28 VCC28 VCC_SM28 1 1 1 1
R25 VCC_NCTF29 VCCAUX_NCTF29 V17 R30 VCC29 VCC_SM29 AH27 0 = Normal Operation * (Default)

C480

C512

C471

C497
1 1 1 AD24 VCC_NCTF30 VCCAUX_NCTF30 T17 P30 VCC30 VCC_SM30 BA26 CFG19 1 = DMI Lane Reversal Enable
C487 C468 AC24 R17 N30 AY26
VCC_NCTF31 VCCAUX_NCTF31 VCC31 VCC_SM31 2 2 2 2
C459

AB24 VCC_NCTF32 VCCAUX_NCTF32 AG16 M30 VCC32 P O W E R VCC_SM32 AW26 0 = No SDVO Device Present *
2 2 2
AA24 VCC_NCTF33 VCCAUX_NCTF33 AF16 L30 VCC33 VCC_SM33 AV26 (Default)
Y24 VCC_NCTF34 VCCAUX_NCTF34 AE16 AA29 VCC34 VCC_SM34 AU26 SDVO_CTRLDATA
W24 VCC_NCTF35 VCCAUX_NCTF35 AD16 Y29 VCC35 VCC_SM35 AT26 1 = SDVO Device Present
V24 VCC_NCTF36 VCCAUX_NCTF36 AC16 W29 VCC36 VCC_SM36 AR26
10U_0805_6.3V6M U24 AB16 V29 AJ26
VCC_NCTF37 VCCAUX_NCTF37 VCC37 VCC_SM37
C
T24 VCC_NCTF38 VCCAUX_NCTF38 AA16 U29 VCC38 VCC_SM38 AH26 0 = Only PCIE or SDVO is C
R24 VCC_NCTF39 VCCAUX_NCTF39 Y16 R29 VCC39 VCC_SM39 AJ25 CFG20 operational. *(Default)
AD23 VCC_NCTF40 VCCAUX_NCTF40 W16 P29 VCC40 VCC_SM40 AH25
V23 VCC_NCTF41 VCCAUX_NCTF41 V16 M29 VCC41 VCC_SM41 AJ24 (PCIE/SDVO select) 1 = PCIE/SDVO are operating
U23 U16 L29 AH24
VCC_NCTF42 VCCAUX_NCTF42 VCC42 VCC_SM42 simu.
330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9 T23 T16 AB28 BA23

VCC_NCTF43 VCCAUX_NCTF43 VCC43 VCC_SM43
R23 VCC_NCTF44 VCCAUX_NCTF44 R16 AA28 VCC44 VCC_SM44 AJ23
AD22 VCC_NCTF45 VCCAUX_NCTF45 AG15 Y28 VCC45 VCC_SM45 BA22
V22 VCC_NCTF46 VCCAUX_NCTF46 AF15 V28 VCC46 VCC_SM46 AY22
1 1 U22 VCC_NCTF47 VCCAUX_NCTF47 AE15 U28 VCC47 VCC_SM47 AW22 1
T22 VCC_NCTF48 VCCAUX_NCTF48 AD15 T28 VCC48 VCC_SM48 AV22
C473 + C511 + R22 AC15 R28 AU22 C478
@ VCC_NCTF49 VCCAUX_NCTF49 VCC49 VCC_SM49 0.47U_0402_6.3V6K
AD21 VCC_NCTF50 VCCAUX_NCTF50 AB15 P28 VCC50 VCC_SM50 AT22
2 R311
V21 VCC_NCTF51 VCCAUX_NCTF51 AA15 N28 VCC51 VCC_SM51 AR22 7 CFG5 1 2 @ 2.2K_0402_5%
2 2
U21 VCC_NCTF52 VCCAUX_NCTF52 Y15 M28 VCC52 VCC_SM52 AP22
T21 W15 L28 AK22 R306 1 2 @ 2.2K_0402_5%
VCC_NCTF53 VCCAUX_NCTF53 VCC53 VCC_SM53 7 CFG7
R21 VCC_NCTF54 VCCAUX_NCTF54 V15 P27 VCC54 VCC_SM54 AJ22
AD20 U15 N27 AK21 R309 1 2 @ 2.2K_0402_5%
VCC_NCTF55 VCCAUX_NCTF55 VCC55 VCC_SM55 7 CFG9
V20 VCC_NCTF56 VCCAUX_NCTF56 T15 M27 VCC56 VCC_SM56 AK20 Place near pin BA23
U20 R15 L27 BA19 R312 1 2 @ 2.2K_0402_5%
VCC_NCTF57 VCCAUX_NCTF57 VCC57 VCC_SM57 7 CFG11
T20 VCC_NCTF58 P26 VCC58 VCC_SM58 AY19
R20 N26 AW19 R316 1 2 @ 2.2K_0402_5%
VCC_NCTF59 VCC59 VCC_SM59 7 CFG12
AD19 VCC_NCTF60 VSS_NCTF0 AE27 L26 VCC60 VCC_SM60 AV19
V19 AE26 N25 AU19 1 1 R315 1 2 @ 2.2K_0402_5%
VCC_NCTF61 VSS_NCTF1 VCC61 VCC_SM61 7 CFG13
U19 AE25 M25 AT19 C117 C42
VCC_NCTF62 VSS_NCTF2 VCC62 VCC_SM62 R310
T19 VCC_NCTF63 VSS_NCTF3 AE24 L25 VCC63 VCC_SM63 AR19 7 CFG16 1 2 @ 2.2K_0402_5%
1 AD18 VCC_NCTF64 VSS_NCTF4 AE23 P24 VCC64 VCC_SM64 AP19
C467 2 2 10U_0805_6.3V6M
AC18 VCC_NCTF65 VSS_NCTF5 AE22 N24 VCC65 VCC_SM65 AK19
+ AB18 AE21 M24 AJ19 10U_0805_6.3V6M
VCC_NCTF66 VSS_NCTF6 VCC66 VCC_SM66
AA18 VCC_NCTF67 VSS_NCTF7 AE20 AB23 VCC67 VCC_SM67 AJ18
Y18 VCC_NCTF68 VSS_NCTF8 AE19 AA23 VCC68 VCC_SM68 AJ17
2
W18 VCC_NCTF69 VSS_NCTF9 AE18 Y23 VCC69 VCC_SM69 AH17
330U_D2E_2.5VM_R9 V18 AC17 P23 AJ16
B VCC_NCTF70 VSS_NCTF10 VCC70 VCC_SM70 +3VS B
U18 VCC_NCTF71 VSS_NCTF11 Y17 N23 VCC71 VCC_SM71 AH16
T18 VCC_NCTF72 VSS_NCTF12 U17 M23 VCC72 VCC_SM72 BA15
L23 VCC73 VCC_SM73 AY15
+VCCP AC22 AW15 R294 1 2 @ 1K_0402_5%
+1.8V VCC74 VCC_SM74 7 CFG18
M19 AB22 AV15 R291 1 2 @ 1K_0402_5%
VCC100 VCC75 VCC_SM75 7 CFG19
L19 AR6 Y22 AU15 1 R290 1 2 @ 1K_0402_5%
VCC101 VCC_SM100 VCC76 VCC_SM76 7 CFG20
N18 VCC102 VCC_SM101 AP6 W22 VCC77 VCC_SM77 AT15
M18 AN6 P22 AR15 C501
VCC103 VCC_SM102 VCC78 VCC_SM78 0.47U_0402_6.3V6K
L18 VCC104 VCC_SM103 AL6 N22 VCC79 VCC_SM79 AJ15
2
P17 VCC105 VCC_SM104 AK6 M22 VCC80 VCC_SM80 AJ14
N17 VCC106 VCC_SM105 AJ6 L22 VCC81 VCC_SM81 AJ13
M17 VCC107 VCC_SM106 AV1 VCCSM_LF2 AC21 VCC82 VCC_SM82 AH13
N16 VCC108 VCC_SM107 AJ1 VCCSM_LF1 AA21 VCC83 VCC_SM83 AK12
M16 VCC109 W21 VCC84 VCC_SM84 AJ12
L16 VCC110 N21 VCC85 VCC_SM85 AH12
0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

M21 VCC86 VCC_SM86 AG12 Place near pin BA15

1 1 L21 VCC87 VCC_SM87 AK11
C516

C520

CALISTOGA_FCBGA1466~D AC20 BA8

PM@ VCC88 VCC_SM88
AB20 VCC89 VCC_SM89 AY8
Y20 VCC90 VCC_SM90 AW8
2 2
W20 VCC91 VCC_SM91 AV8
P20 VCC92 VCC_SM92 AT8
N20 VCC93 VCC_SM93 AR8
M20 VCC94 VCC_SM94 AP8
L20 VCC95 VCC_SM95 BA6
AB19 VCC96 VCC_SM96 AY6
Place near pin AV1 & AJ1 AA19 VCC97 VCC_SM97 AW6
Y19 VCC98 VCC_SM98 AV6
N19 VCC99 VCC_SM99 AT6

CALISTOGA_FCBGA1466~D
A PM@ A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Calistoga (5/6)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 11 of 44
5 4 3 2 1
 5 4 3 2 1

U6I U6J
AC41 VSS0 VSS100 AE34 AN21 VSS200 VSS280 AG10
AA41 VSS1 VSS101 AC34 AL21 VSS201 VSS281 AC10
W41 VSS2 VSS102 C34 AB21 VSS202 VSS282 W10
T41 VSS3 VSS103 AW33 Y21 VSS203 VSS283 U10
P41 VSS4 VSS104 AV33 P21 VSS204 VSS284 BA9
M41 VSS5 VSS105 AR33 K21 VSS205 VSS285 AW9
D D
J41 VSS6 VSS106 AE33 J21 VSS206 VSS286 AR9
F41 VSS7 VSS107 AB33 H21 VSS207 VSS287 AH9
AV40 VSS8 VSS108 Y33 C21 VSS208 VSS288 AB9
AP40 VSS9 VSS109 V33 AW20 VSS209 VSS289 Y9
AN40 VSS10 VSS110 T33 AR20 VSS210 VSS290 R9
AK40 VSS11 VSS111 R33 AM20 VSS211 VSS292 G9
AJ40 VSS12 VSS112 M33 AA20 VSS212 VSS291 E9
AH40 VSS13 VSS113 H33 K20 VSS213 VSS293 A9
AG40 VSS14 VSS114 G33 B20 VSS214 VSS294 AG8
AF40 VSS15 VSS115 F33 A20 VSS215 VSS295 AD8
AE40 VSS16 VSS116 D33 AN19 VSS216 VSS296 AA8
B40 VSS17 VSS117 B33 AC19 VSS217 VSS297 U8
AY39 VSS18 VSS118 AH32 W19 VSS218 VSS298 K8
AW39 VSS19 VSS119 AG32 K19 VSS219 VSS299 C8
AV39 VSS20 VSS120 AF32 G19 VSS220 VSS300 BA7
AR39 VSS21 VSS121 AE32 C19 VSS221 VSS301 AV7
AN39 VSS22 VSS122 AC32 AH18 VSS222 VSS302 AP7
AJ39 VSS23 VSS123 AB32 P18 VSS223 VSS303 AL7
AC39 VSS24 VSS124 G32 H18 VSS224 VSS304 AJ7
AB39 VSS25 VSS125 B32 D18 VSS225 VSS305 AH7
AA39 VSS26 VSS126 AY31 A18 VSS226 VSS306 AF7
Y39 VSS27 VSS127 AV31 AY17 VSS227 VSS307 AC7
W39 VSS28 VSS128 AN31 AR17 VSS228 VSS308 R7
V39 AJ31 AP17 G7
T39
VSS29
VSS30
VSS129
VSS130 AG31 AM17
VSS229
VSS230
P O W E R VSS309
VSS310 D7
R39 VSS31 VSS131 AB31 AK17 VSS231 VSS311 AG6
P39 VSS32 VSS132 Y31 AV16 VSS232 VSS312 AD6
N39 VSS33 VSS133 AB30 AN16 VSS233 VSS313 AB6
M39 E30 AL16 Y6
L39
VSS34
VSS35
P O W E R VSS134
VSS135 AT29 J16
VSS234
VSS235
VSS314
VSS315 U6
J39 VSS36 VSS136 AN29 F16 VSS236 VSS316 N6
H39 VSS37 VSS137 AB29 C16 VSS237 VSS317 K6
C C
G39 VSS38 VSS138 T29 AN15 VSS238 VSS318 H6
F39 VSS39 VSS139 N29 AM15 VSS239 VSS319 B6
D39 VSS40 VSS140 K29 AK15 VSS240 VSS320 AV5
AT38 VSS41 VSS141 G29 N15 VSS241 VSS321 AF5
AM38 VSS42 VSS142 E29 M15 VSS242 VSS322 AD5
AH38 VSS43 VSS143 C29 L15 VSS243 VSS323 AY4
AG38 VSS44 VSS144 B29 B15 VSS244 VSS324 AR4
AF38 VSS45 VSS145 A29 A15 VSS245 VSS325 AP4
AE38 VSS46 VSS146 BA28 BA14 VSS246 VSS326 AL4
C38 VSS47 VSS147 AW28 AT14 VSS247 VSS327 AJ4
AK37 VSS48 VSS148 AU28 AK14 VSS248 VSS328 Y4
AH37 VSS49 VSS149 AP28 AD14 VSS249 VSS329 U4
AB37 VSS50 VSS150 AM28 AA14 VSS250 VSS330 R4
AA37 VSS51 VSS151 AD28 U14 VSS251 VSS331 J4
Y37 VSS52 VSS152 AC28 K14 VSS252 VSS332 F4
W37 VSS53 VSS153 W28 H14 VSS253 VSS333 C4
V37 VSS54 VSS154 J28 E14 VSS254 VSS334 AY3
T37 VSS55 VSS155 E28 AV13 VSS255 VSS335 AW3
R37 VSS56 VSS156 AP27 AR13 VSS256 VSS336 AV3
P37 VSS57 VSS157 AM27 AN13 VSS257 VSS337 AL3
N37 VSS58 VSS158 AK27 AM13 VSS258 VSS338 AH3
M37 VSS59 VSS159 J27 AL13 VSS259 VSS339 AG3
L37 VSS60 VSS160 G27 AG13 VSS260 VSS340 AF3
J37 VSS61 VSS161 F27 P13 VSS261 VSS341 AD3
H37 VSS62 VSS162 C27 F13 VSS262 VSS342 AC3
G37 VSS63 VSS163 B27 D13 VSS265 VSS343 AA3
F37 VSS64 VSS164 AN26 B13 VSS264 VSS344 G3
D37 VSS65 VSS165 M26 AY12 VSS263 VSS345 AT2
AY36 VSS66 VSS166 K26 AC12 VSS266 VSS346 AR2
AW36 VSS67 VSS167 F26 K12 VSS267 VSS347 AP2
AN36 VSS68 VSS168 D26 H12 VSS268 VSS348 AK2
AH36 VSS69 VSS169 AK25 E12 VSS269 VSS349 AJ2
B B
AG36 VSS70 VSS170 P25 AD11 VSS270 VSS350 AD2
AF36 VSS71 VSS171 K25 AA11 VSS271 VSS351 AB2
AE36 VSS72 VSS172 H25 Y11 VSS272 VSS352 Y2
AC36 VSS73 VSS173 E25 J11 VSS273 VSS353 U2
C36 VSS74 VSS174 D25 D11 VSS274 VSS354 T2
B36 VSS75 VSS175 A25 B11 VSS275 VSS355 N2
BA35 VSS76 VSS176 BA24 AV10 VSS276 VSS356 J2
AV35 VSS77 VSS177 AU24 AP10 VSS277 VSS357 H2
AR35 VSS78 VSS178 AL24 AL10 VSS278 VSS358 F2
AH35 VSS79 VSS179 AW23 AJ10 VSS279 VSS359 C2
AB35 VSS80 VSS180 AT23 VSS360 AL1
AA35 VSS81 VSS181 AN23
Y35 AM23 CALISTOGA_FCBGA1466~D
VSS82 VSS182
W35 VSS83 VSS183 AH23
V35 VSS84 VSS184 AC23 PM@
T35 VSS85 VSS185 W23
R35 VSS86 VSS186 K23
P35 VSS87 VSS187 J23
N35 VSS88 VSS188 F23
M35 VSS89 VSS189 C23
L35 VSS90 VSS190 AA22
J35 VSS91 VSS191 K22
H35 VSS92 VSS192 G22
G35 VSS93 VSS193 F22
F35 VSS94 VSS194 E22
D35 VSS95 VSS195 D22
AN34 VSS96 VSS196 A22
AK34 VSS97 VSS197 BA21
AG34 VSS98 VSS198 AV21
AF34 VSS99 VSS199 AR21

CALISTOGA_FCBGA1466~D
A A

PM@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Calistoga (6/6)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 28, 2006 Sheet 12 of 44
5 4 3 2 1
 5 4 3 2 1

+1.8V +1.8V +DDR_VREF

8 DDR_A_DQS#[0..7]

8 DDR_A_D[0..63] JP15

2.2U_0805_16V4Z

0.1U_0402_16V4Z
1 VREF VSS 2
DDR_A_D7 +1.8V
8 DDR_A_DM[0..7] 3 VSS DQ4 4 1 1

C36

C35
DDR_A_D0 5 6 DDR_A_D1
DDR_A_D4 DQ0 DQ5
8 DDR_A_DQS[0..7] 7 DQ1 VSS 8

1
9 10 DDR_A_DM0
DDR_A_DQS#0 VSS DM0 2 2 R427
8 DDR_A_MA[0..13] 11 DQS0# VSS 12
DDR_A_DQS0 13 14 DDR_A_D5
DQS0 DQ6 DDR_A_D6 1K_0402_1%
15 VSS DQ7 16
DDR_A_D2 17 18

2
D DDR_A_D3 DQ2 VSS DDR_A_D12 D
19 DQ3 DQ12 20 +DDR_VREF
21 22 DDR_A_D13
VSS DQ13

1
DDR_A_D8 23 24 15mils
DDR_A_D14 DQ8 VSS DDR_A_DM1 R428
Layout Note: 25 DQ9 DM1 26
27 VSS VSS 28
Place near JP27 DDR_A_DQS#1 29 30 M_CLK_DDR0
M_CLK_DDR0 7
1K_0402_1%
DDR_A_DQS1 DQS1# CK0 M_CLK_DDR#0
31 32 M_CLK_DDR#0 7

2
DQS1 CK0#
33 VSS VSS 34
DDR_A_D10 35 36 DDR_A_D9
DDR_A_D11 DQ10 DQ14 DDR_A_D15
37 DQ11 DQ15 38
39 VSS VSS 40

+1.8V 41 42
DDR_A_D21 VSS VSS DDR_A_D20
43 DQ16 DQ20 44
DDR_A_D17 45 46 DDR_A_D16
DQ17 DQ21
47 VSS VSS 48
2.2U_0805_16V4Z

2.2U_0805_16V4Z

2.2U_0805_16V4Z

2.2U_0805_16V4Z

2.2U_0805_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
DDR_A_DQS#2 49 50 DDR_TS DDR_TS 7,14
DDR_A_DQS2 DQS2# NC DDR_A_DM2
1 1 1 1 1 1 1 1 1 51 DQS2 DM2 52
C110

C107
C62

C58

C96

C79

C73

C97

C88
53 VSS VSS 54
DDR_A_D22 55 56 DDR_A_D18
DDR_A_D19 DQ18 DQ22 DDR_A_D23
57 DQ19 DQ23 58
2 2 2 2 2 2 2 2 2
59 VSS VSS 60
DDR_A_D25 61 62 DDR_A_D29
DDR_A_D24 DQ24 DQ28 DDR_A_D28
63 DQ25 DQ29 64
65 VSS VSS 66
DDR_A_DM3 67 68 DDR_A_DQS#3
DM3 DQS3# DDR_A_DQS3
69 NC DQS3 70
71 VSS VSS 72
DDR_A_D27 73 74 DDR_A_D26
DDR_A_D30 DQ26 DQ30 DDR_A_D31
75 DQ27 DQ31 76
77 VSS VSS 78
C DDR_CKE0_DIMMA DDR_CKE1_DIMMA C
7 DDR_CKE0_DIMMA 79 CKE0 NC/CKE1 80 DDR_CKE1_DIMMA 7
81 VDD VDD 82
83 NC NC/A15 84
DDR_A_BS#2 85 86
8 DDR_A_BS#2 BA2 NC/A14
Layout Note: DDR_A_MA12
87 VDD VDD 88
DDR_A_MA11
89 A12 A11 90
Place one cap close to every 2 pullup DDR_A_MA9 91 92 DDR_A_MA7
DDR_A_MA8 A9 A7 DDR_A_MA6
resistors terminated to +0.9VS 93 A8 A6 94
95 VDD VDD 96
DDR_A_MA5 97 98 DDR_A_MA4
DDR_A_MA3 A5 A4 DDR_A_MA2
99 A3 A2 100
DDR_A_MA1 101 102 DDR_A_MA0
A1 A0
103 VDD VDD 104
DDR_A_MA10 105 106 DDR_A_BS#1
A10/AP BA1 DDR_A_BS#1 8
DDR_A_BS#0 107 108 DDR_A_RAS#
8 DDR_A_BS#0 BA0 RAS# DDR_A_RAS# 8
DDR_A_WE# 109 110 DDR_CS0_DIMMA#
+0.9VS 8 DDR_A_WE# WE# S0# DDR_CS0_DIMMA# 7
111 VDD VDD 112
DDR_A_CAS# 113 114 M_ODT0
8 DDR_A_CAS# CAS# ODT0 M_ODT0 7
DDR_CS1_DIMMA# 115 116 DDR_A_MA13
7 DDR_CS1_DIMMA# NC/S1# NC/A13
117 VDD VDD 118
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

7 M_ODT1 M_ODT1 119 120

NC/ODT1 NC
121 VSS VSS 122
1 1 1 1 1 1 1 1 1 1 1 1 1 DDR_A_D35 123 124 DDR_A_D36
DDR_A_D32 DQ32 DQ36 DDR_A_D37
125 DQ33 DQ37 126
127 VSS VSS 128
DDR_A_DQS#4 129 130 DDR_A_DM4
2 2 2 2 2 2 2 2 2 2 2 2 2 DDR_A_DQS4 DQS4# DM4
131 DQS4 VSS 132
C104

C103

C114

C115

C119
C55

C56

C68

C67

C81

C80

C92

C95

133 134 DDR_A_D34

DDR_A_D39 VSS DQ38 DDR_A_D38
135 DQ34 DQ39 136
DDR_A_D33 137 138
DQ35 VSS DDR_A_D40
139 VSS DQ44 140
DDR_A_D45 141 142 DDR_A_D44
B DDR_A_D41 DQ40 DQ45 B
143 DQ41 VSS 144
145 146 DDR_A_DQS#5
DDR_A_DM5 VSS DQS5# DDR_A_DQS5
147 DM5 DQS5 148
149 VSS VSS 150
DDR_A_D42 151 152 DDR_A_D47
DDR_A_D43 DQ42 DQ46 DDR_A_D46
153 DQ43 DQ47 154
155 VSS VSS 156
DDR_A_D52 157 158 DDR_A_D48
DDR_A_D53 DQ48 DQ52 DDR_A_D49
159 DQ49 DQ53 160
161 VSS VSS 162
163 164 M_CLK_DDR1
+0.9VS NC,TEST CK1 M_CLK_DDR1 7
Layout Note: 165 166 M_CLK_DDR#1
VSS CK1# M_CLK_DDR#1 7
DDR_A_DQS#6 167 168
RP10 RP2 56_0404_4P2R_5%
Pla ce these resistor DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 DQS6 DM6 170
DDR_A_MA8 1 4 4 1 DDR_A_BS#2 closely JP27,all 171 172
DDR_A_MA5 VSS VSS
2 3 3 2 DDR_CKE0_DIMMA trace length Max=1.5" DDR_A_D51 173 DQ50 DQ54 174 DDR_A_D50
DDR_A_D55 175 176 DDR_A_D54
RP12 56_0404_4P2R_5% RP9 56_0404_4P2R_5% DQ51 DQ55
177 VSS VSS 178
DDR_A_MA1 1 4 4 1 DDR_A_MA7 DDR_A_D56 179 180 DDR_A_D60
DDR_A_MA3 DQ56 DQ60
2 3 3 2 DDR_A_MA6 DDR_A_D61 181 DQ57 DQ61 182 DDR_A_D57
183 VSS VSS 184
RP22 56_0404_4P2R_5% RP6 56_0404_4P2R_5% DDR_A_DM7 185 186 DDR_A_DQS#7
DDR_CS0_DIMMA# 1 DM7 DQS7#
4 4 1 DDR_A_MA9 187 VSS DQS7 188 DDR_A_DQS7
DDR_A_RAS# 2 3 3 2 DDR_A_MA12 DDR_A_D58 189 190
DDR_A_D59 DQ58 VSS DDR_A_D62
191 DQ59 DQ62 192
RP17 56_0404_4P2R_5% RP11 56_0404_4P2R_5% 193 194 DDR_A_D63
DDR_A_BS#0 VSS DQ63
1 4 4 1 DDR_A_MA2 14,15 CLK_SMBDATA
CLK_SMBDATA 195 SDA VSS 196
DDR_A_MA10 2 3 3 2 DDR_A_MA4 CLK_SMBCLK 197 198
14,15 CLK_SMBCLK SCL SAO
+3VS 199 VDDSPD SA1 200
RP21 56_0404_4P2R_5% RP18 56_0404_4P2R_5%

1
10K_0402_5%

10K_0402_5%
DDR_A_CAS# 1 4 4 1 DDR_A_MA0 1
DDR_A_WE# 2 3 3 2 DDR_A_BS#1 C133 PTI_A5652D-A0G16-P

R75

R76
A A
RP25 56_0404_4P2R_5% RP26 56_0404_4P2R_5%
DDR_CS1_DIMMA# 2 3 4 1 DDR_A_MA13
0.1U_0402_16V4Z
2 DIMM0 RVS H:5.2mm (BOT)

2
M_ODT1 1 4 3 2 M_ODT0

56_0404_4P2R_5% RP5 56_0404_4P2R_5%

4 1 DDR_CKE1_DIMMA
3 2 DDR_A_MA11 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRII-SODIMM SLOT1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 28, 2006 Sheet 13 of 44
5 4 3 2 1
 5 4 3 2 1

+1.8V +1.8V
8 DDR_B_DQS#[0..7] +DDR_VREF
8 DDR_B_D[0..63]

8 DDR_B_DM[0..7] JP16

2.2U_0805_16V4Z

0.1U_0402_16V4Z
8 DDR_B_DQS[0..7] 1 VREF VSS 2
3 4 DDR_B_D4 1 1
DDR_B_D0 VSS DQ4 DDR_B_D1
8 DDR_B_MA[0..13] 5 DQ0 DQ5 6

C37

C34
DDR_B_D5 7 8
DQ1 VSS DDR_B_DM0
9 VSS DM0 10
DDR_B_DQS#0 2 2
11 DQS0# VSS 12
DDR_B_DQS0 13 14 DDR_B_D6
DQS0 DQ6 DDR_B_D2
15 VSS DQ7 16
D DDR_B_D7 D
17 DQ2 VSS 18
Layout Note: DDR_B_D3 19 20 DDR_B_D12
DQ3 DQ12 DDR_B_D13
21 VSS DQ13 22
Place near JP26 DDR_B_D8 23 24
DDR_B_D9 DQ8 VSS DDR_B_DM1
25 DQ9 DM1 26
27 VSS VSS 28
DDR_B_DQS#1 29 30 M_CLK_DDR3
DQS1# CK0 M_CLK_DDR3 7
DDR_B_DQS1 31 32 M_CLK_DDR#3
DQS1 CK0# M_CLK_DDR#3 7
33 VSS VSS 34
DDR_B_D10 35 36 DDR_B_D14
DDR_B_D11 DQ10 DQ14 DDR_B_D15
37 DQ11 DQ15 38
+1.8V 39 40
VSS VSS

41 VSS VSS 42
2.2U_0805_16V4Z

2.2U_0805_16V4Z

2.2U_0805_16V4Z

2.2U_0805_16V4Z

2.2U_0805_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
DDR_B_D21 43 44 DDR_B_D16
DDR_B_D17 DQ16 DQ20 DDR_B_D20
1 1 1 1 1 1 1 1 1 1 1 45 DQ17 DQ21 46
C59

C113

C60

C90

C109

C74

C89

C99

C70

220U_D2_4VM

220U_D2_4VM
47 VSS VSS 48
+ C126 + C43 DDR_B_DQS#2 49 50 DDR_TS
DQS2# NC DDR_TS 7,13
DDR_B_DQS2 51 52 DDR_B_DM2
2 2 2 2 2 2 2 2 2 DQS2 DM2
53 VSS VSS 54
2 2 DDR_B_D22 DDR_B_D18
55 DQ18 DQ22 56
DDR_B_D23 57 58 DDR_B_D19
DQ19 DQ23
59 VSS VSS 60
DDR_B_D24 61 62 DDR_B_D26
DDR_B_D25 DQ24 DQ28 DDR_B_D28
63 DQ25 DQ29 64
65 VSS VSS 66
DDR_B_DM3 67 68 DDR_B_DQS#3
DM3 DQS3# DDR_B_DQS3
69 NC DQS3 70
71 VSS VSS 72
DDR_B_D30 73 74 DDR_B_D29
DDR_B_D31 DQ26 DQ30 DDR_B_D27
75 DQ27 DQ31 76
C C
77 VSS VSS 78
DDR_CKE2_DIMMB 79 80 DDR_CKE3_DIMMB
7 DDR_CKE2_DIMMB CKE0 NC/CKE1 DDR_CKE3_DIMMB 7
81 VDD VDD 82
Layout Note: DDR_B_BS#2
83 NC NC/A15 84
8 DDR_B_BS#2 85 BA2 NC/A14 86
Place one cap close to every 2 pullup 87 88
DDR_B_MA12 VDD VDD DDR_B_MA11
resistors terminated to +0.9VS 89 A12 A11 90
DDR_B_MA9 91 92 DDR_B_MA7
DDR_B_MA8 A9 A7 DDR_B_MA6
93 A8 A6 94
95 VDD VDD 96
DDR_B_MA5 97 98 DDR_B_MA4
DDR_B_MA3 A5 A4 DDR_B_MA2
99 A3 A2 100
DDR_B_MA1 101 102 DDR_B_MA0
A1 A0
103 VDD VDD 104
DDR_B_MA10 105 106 DDR_B_BS#1
+0.9VS A10/AP BA1 DDR_B_BS#1 8
DDR_B_BS#0 107 108 DDR_B_RAS#
8 DDR_B_BS#0 BA0 RAS# DDR_B_RAS# 8
DDR_B_WE# 109 110 DDR_CS2_DIMMB#
8 DDR_B_WE# WE# S0# DDR_CS2_DIMMB# 7
111 VDD VDD 112
DDR_B_CAS# 113 114 M_ODT2
8 DDR_B_CAS# CAS# ODT0 M_ODT2 7
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_CS3_DIMMB# 115 116 DDR_B_MA13

7 DDR_CS3_DIMMB# NC/S1# NC/A13
117 VDD VDD 118
1 1 1 1 1 1 1 1 1 1 1 1 1 M_ODT3 119 120
7 M_ODT3 NC/ODT1 NC
121 VSS VSS 122
DDR_B_D37 123 124 DDR_B_D33
DDR_B_D36 DQ32 DQ36 DDR_B_D32
125 DQ33 DQ37 126
2 2 2 2 2 2 2 2 2 2 2 2 2
127 VSS VSS 128
C101

C111

C105

C112

C118
C53

C65

C77

C91

C54

C66

C78

C94

DDR_B_DQS#4 129 130 DDR_B_DM4

DDR_B_DQS4 DQS4# DM4
131 DQS4 VSS 132
133 134 DDR_B_D38
DDR_B_D35 VSS DQ38 DDR_B_D39
135 DQ34 DQ39 136
DDR_B_D34 137 138
DQ35 VSS DDR_B_D44
139 VSS DQ44 140
B DDR_B_D40 DDR_B_D45 B
141 DQ40 DQ45 142
DDR_B_D41 143 144
DQ41 VSS DDR_B_DQS#5
145 VSS DQS5# 146
DDR_B_DM5 147 148 DDR_B_DQS5
DM5 DQS5
149 VSS VSS 150
DDR_B_D42 151 152 DDR_B_D43
DDR_B_D47 DQ42 DQ46 DDR_B_D46
153 DQ43 DQ47 154
155 VSS VSS 156
DDR_B_D48 157 158 DDR_B_D49
DDR_B_D53 DQ48 DQ52 DDR_B_D52
Layout Note: 159 DQ49 DQ53 160
Pla ce these resistor 161 VSS VSS 162
+0.9VS 163 164 M_CLK_DDR2
closely JP26,all NC,TEST CK1 M_CLK_DDR2 7
165 166 M_CLK_DDR#2
DDR_B_DQS#6 VSS CK1# M_CLK_DDR#2 7
RP13 RP4 56_0404_4P2R_5% trace length Max=1.5" 167 DQS6# VSS 168
DDR_B_MA1 1 4 4 1 DDR_B_MA9 DDR_B_DQS6 169 170 DDR_B_DM6
DDR_B_MA3 DDR_B_MA12 DQS6 DM6
2 3 3 2 171 VSS VSS 172
DDR_B_D51 173 174 DDR_B_D54
RP16 56_0404_4P2R_5% RP3 56_0404_4P2R_5% DDR_B_D50 DQ50 DQ54 DDR_B_D55
175 DQ51 DQ55 176
DDR_B_MA10 1 4 4 1 DDR_CKE3_DIMMB 177 178
DDR_B_BS#0 DDR_B_MA11 DDR_B_D60 VSS VSS DDR_B_D56
2 3 3 2 179 DQ56 DQ60 180
DDR_B_D61 181 182 DDR_B_D57
RP15 56_0404_4P2R_5% RP8 56_0404_4P2R_5% DQ57 DQ61
183 VSS VSS 184
DDR_B_MA0 1 4 4 1 DDR_B_MA5 DDR_B_DM7 185 186 DDR_B_DQS#7
DDR_B_BS#1 DDR_B_MA8 DM7 DQS7# DDR_B_DQS7
2 3 3 2 187 VSS DQS7 188
DDR_B_D58 189 190
RP19 56_0404_4P2R_5% RP7 56_0404_4P2R_5% DDR_B_D59 DQ58 VSS DDR_B_D62
191 DQ59 DQ62 192
DDR_B_RAS# 1 4 4 1 DDR_B_MA7 193 194 DDR_B_D63
DDR_CS2_DIMMB# 2 DDR_B_MA6 CLK_SMBDATA VSS DQ63
3 3 2 13,15 CLK_SMBDATA 195 SDA VSS 196
CLK_SMBCLK 197 198 R73
13,15 CLK_SMBCLK SCL SAO
RP20 56_0404_4P2R_5% RP14 56_0404_4P2R_5% 199 200 1 2 +3VS
+3VS VDDSPD SA1
DDR_B_WE# 1 4 4 1 DDR_B_MA2

1
10K_0402_5%
DDR_B_CAS# 2 3 3 2 DDR_B_MA4 1 10K_0402_5%

R74
A RP24 C132 P-TWO_A5692B-A0G16-P A
56_0404_4P2R_5% RP23 56_0404_4P2R_5%
M_ODT3 2 3 4 1 M_ODT2 0.1U_0402_16V4Z
DDR_CS3_DIMMB# 1 DDR_B_MA13 2
4 3 2
DIMM1 RVS H:9.2mm (BOT)

2
56_0404_4P2R_5% RP1
4 1 DDR_B_BS#2
3 2 DDR_CKE2_DIMMB

56_0404_4P2R_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRII-SODIMM SLOT2
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 28, 2006 Sheet 14 of 44
5 4 3 2 1
 5 4 3 2 1

+CK_VDD_MAIN1
R129
+3VS 1 2
1 1 1 1
KC FBM-L11-201209-221LMAT_0805 C227 C166 C219 C226

10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

FSLC FSLB FSLA CPU SRC PCI
2 2 2 2
CLKSEL2 CLKSEL1 CLKSEL0 MHz MHz MHz
+CK_VDD_MAIN2
R79 R86 0 0 1 133 100 33.3
+3VS 1 2 1 2 +CK_VDD_REF
1 1 1 1_0805_1% C170 0.1U_0402_16V4Z
KC FBM-L11-201209-221LMAT_0805 C157 C234 C160 +CK_VDD_DP U9
D
1 2 0 1 1 166 100 33.3 D
1 2 +CK_VDD_48
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z R128
2 2 2 2.2_0805_1% +VDDAD
1 VDDSRC VDDA 7 2 1 +3VS
49 R82
+CK_VDD_DP VDDSRC KC FBM-L11-201209-221LMAT_0805
R127
5/20 54 VDDSRC GNDA 8
65 VDDSRC
1 2 +CK_VDD_MAIN1
+3VS
1 1 1 1 PCI_SRC_STOP# 25 H_STP_PCI# 20
KC FBM-L11-201209-221LMAT_0805 C165 C213 C231 C230 30 VDDPCI
36 VDDPCI CPU_STOP# 24 H_STP_CPU# 20
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 0.1U_0402_16V4Z 12 VDDCPU
C167 11
CPUCLKT1LP CLK_MCH_BCLK 7
1 2 +CK_VDD_REF 18 VDDREF
CPUCLKC1LP 10 CLK_MCH_BCLK# 7
22P_0402_50V8J 1 2 C197 1 2 +CK_VDD_48 40 VDD48

1
C229 0.1U_0402_16V4Z 14
CPUCLKT0LP CLK_CPU_BCLK 4
CLK_XTAL_IN 20
14.31818MHZ_20P_6X1430004201 Y2 X1
CPUCLKC0LP 13 CLK_CPU_BCLK# 4

2
1 2 CLK_XTAL_OUT 19
22P_0402_50V8J C168 R132 12_0402_5% X2
CPUCLKT2_ITP/SRCCLKT10LP 6
R133 20 CLK_48M_ICH CLK_48M_ICH 2 1
8.2K_0402_5% CLK_48M_CB 2 1 FSA 41 5
22 CLK_48M_CB USB_48MHz/FSLA CPUCLKC2_ITP/SRCCLKC10LP
FSA 2 1 1 2 R124 12_0402_5%
MCH_CLKSEL0 7
FSB 45
R137 FSLB/TEST_MODE/24Mhz
5 CPU_BSEL0 SRCCLKT9LP 3 CLK_PCIE_CARD 25
1K_0402_5% 20 CLK_14M_ICH CLK_14M_ICH 2 1 FSC 23
R99 33_0402_5% REF0/FSLC/TEST_SEL
SRCCLKC9LP 2 CLK_PCIE_CARD# 25
1

R136 22 CLK_PCI_PCM 33_0402_5% 2 1 R119 PCI_PCM 34 72 PCIEC_CLKREQ# PCIEC_CLKREQ# 25

C PCICLK4/FCTSEL1 CLKREQ9# C
@ 1K_0402_5% 33_0402_5% 2 1 R121 PCI_EC 33 70
31 CLK_PCI_EC SEL_48M/PCICLK3 SRCCLKT8LP
2

22 CLK_PCI_DEBUG 12_0402_5% 2 1 R117 PCI_DEBUG 32 69

12_0402_5% R105 SEL_24M/PCICLK2 SRCCLKC8LP
30 CLK_PCI_SIO 2 1
12_0402_5% 2 1 R506 27 71
33 CLK_PCI_SIO2 SEL_PCI6/PCICLK1 CLKREQ8#
24 CLK_PCI_1394 33_0402_5% 2 1 R490
+VCCP 66
SRCCLKT7LP CLK_PCIE_SATA 19 +3VS
30 CLK_14M_SIO CLK_14M_SIO R96 2 1 33_0402_5% REF1 22 SEL_PCI5/REF1
SRCCLKC7LP 67 CLK_PCIE_SATA# 19
2

R331 7 CLK_MCH_DREFCLK CLK_MCH_DREFCLK 1 2 MCH_DREFCLK 43 38 SATA_CLKREQ# SATA_CLKREQ# 20

@ R125 GM@ 33_0402_5% DOTT_96MHz/27MHz_Nonspread
CLKREQ7#/48Mhz_1 PCIEC_CLKREQ# 1 2
1K_0402_5% 7 CLK_MCH_DREFCLK# CLK_MCH_DREFCLK# 1 2 MCH_DREFCLK# 44 63 R92 10K_0402_5%
R126 GM@ 33_0402_5% DOTC_96MHz/27MHz_spread SRCCLKT6LP SATA_CLKREQ# 1 2
1

FSB 1 2 64 R333 10K_0402_5%

MCH_CLKSEL1 7 SRCCLKC6LP
CLK_PCI_ICH 2 1 PCI_ICH 37 MCH_CLKREQ# 1 2
18 CLK_PCI_ICH ITP_EN/PCICLK_F0
R328 R336 33_0402_5% 62 R106 10K_0402_5%
5 CPU_BSEL1 CLKREQ6#
1K_0402_5% MINI_CLKREQ# 1 2
CLK_ENABLE# 39 60 R118 10K_0402_5%
41 CLK_ENABLE# VTT_PWRGD#/PD SRCCLKT5LP CLK_MCH_3GPLL 7

SRCCLKC5LP 61 CLK_MCH_3GPLL# 7
+3VS 1 2 9 GND
29 MCH_CLKREQ#
CLKREQ5#/PCICLK6 MCH_CLKREQ# 7
R332 10K_0402_5%
SRCCLKT4LP 58 CLK_PCIE_MCARD 25
13,14 CLK_SMBCLK CLK_SMBCLK 16 SMBCLK
SRCCLKC4LP 59 CLK_PCIE_MCARD# 25
57 MINI_CLKREQ#
+VCCP CLKREQ4# MINI_CLKREQ# 25
CLK_SMBDATA 17
13,14 CLK_SMBDATA SMBDAT
SRCCLKT3LP 55 CLK_PCIE_ICH 20
B B
+3VS
2

4 56
FIX FSC at LOW R108 GNDSRC SRCCLKC3LP CLK_PCIE_ICH# 20
15 28 PCI_CLK5 1 2
GNDCPU CLKREQ3#/PCICLK5 CLK_PCI_TPM 27
R103 @ 1K_0402_5% R80 R81 R109 33_0402_5%
8.2K_0402_5% 21 52 CLK_PCIE_LAN 26
1

FSC 2.2K_0402_5% 2.2K_0402_5% GNDREF SRCCLKT2LP

2 1 1 2 MCH_CLKSEL2 7
2N7002_SOT23 Q9 31 53
GNDPCI SRCCLKC2LP CLK_PCIE_LAN# 26
R102
5 CPU_BSEL2
1K_0402_5% 35 26
CLK_SMBDATA GNDPCI CLKREQ2#
D

20,25 ICH_SMBDATA 1 3
42 GND48 SRCCLKT1LP 50 CLK_PCIE_VGA 17
68 51
G

CLK_PCIE_VGA# 17
2

GNDSRC SRCCLKC1LP
46
+3VS
73 THRM_PAD
CLKREQ1# Need BIOS to disable when GM SKU
74 THRM_PAD LCD100/96/SRC0_TLP 47 CLK_PCIE_GMCH 7
2
G

75 THRM_PAD
76 THRM_PAD LCD100/96/SRC0_CLP 48 CLK_PCIE_GMCH# 7
20,25 ICH_SMBCLK 1 3 CLK_SMBCLK
Need BIOS to disable when PM SKU
D

2N7002_SOT23
ICS9LPRS325CKLFT_MLF72
Q10
1:24M *0:test Mode 1:48M *0:CLKREQ7#
for Pin 45 for Pin 38
+3VS +3VS +3VS +3VS +3VS

*1:PCICLK3 for Pin28 CLK_ENABLE#

1

1
R338 R120 R326 R122 10K_0402_5%2 R100 1 REF1 D
A A
2 VGATE 20,31,41
@ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% G
S Q16
2

3
PCI_ICH PCI_DEBUG PCI_PCM PCI_EC @ 2N7002_SOT23
1

R337 R116 R327 R123

10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Clock generator
for Pin 6,5 for Pin 43,44/47,48 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
1:CPU ITP *0:SRC 10 1:27M/SRC0 *0:DOT 96M/LCD100 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 15 of 44
5 4 3 2 1
 A B C D E

Near to JP13
CRT CONNECTOR +5VS
D3
+R_CRT_VCC
F1
+CRT_VCC

1
D25 D24 D23 2 1 1 2

+3VS
CH491D_SC59 1
1A_6VDC_MINISMDC110 C13
CRT Conn.
DAN217_SC59 DAN217_SC59 DAN217_SC59 0.1U_0402_16V4Z

3
2
@ @ @
JP13
CRT Connector CRT_R_L
6
11
1
1 1
7
L3 12
1 2 CRT_R 1 2 CRT_G_L 2
17 VGA_CRT_R
R277 PM@ 0_0402_5% FCM2012C-800_0805 8
9 GMCH_CRT_R 1 2 13
R278 GM@ 0_0402_5% L2 CRT_B_L 3
1 2 CRT_G 1 2 9
17 VGA_CRT_G
R275 PM@ 0_0402_5% FCM2012C-800_0805 14
9 GMCH_CRT_G 1 2 4
R276 GM@ 0_0402_5% L1 1 10
1 2 CRT_B 1 2 15
17 VGA_CRT_B C12
R273 PM@ 0_0402_5% FCM2012C-800_0805 5
9 GMCH_CRT_B 1 2
R274 GM@ 0_0402_5% 2 TYCO_1470801-1
1 1 1

1
C16 C19 C21 1 1 1
R6 R5 R3 C22 C20 C17 DSUB_12_DATA
6P_0402_50V8K 6P_0402_50V8K 220P_0402_50V7K
2 2 2 @ 6P_0402_50V8K @ 6P_0402_50V8K DSUB_15_CLK
150_0402_1% 150_0402_1% 6P_0402_50V8K 2 2 2

2
150_0402_1% @ 6P_0402_50V8K 1 1
C14 C8
2 2

68P_0402_50V8K 68P_0402_50V8K
+CRT_VCC
D_CRT_HSYNC 1 2 HSYNC
1 2 2 1 L26 10_0402_5%
C18 0.1U_0402_16V4Z R4 10K_0402_5%
D_CRT_VSYNC 1 2 VSYNC
5
1

2 L25 10_0402_5% 2
P
OE#

1 2 2 4 D_CRT_HSYNC C413 1 1 C411

17 VGA_CRT_HSYNC A Y
R30 PM@ 0_0402_5%
G

1 2 U2 10P_0402_50V8K 10P_0402_50V8K
9 GMCH_CRT_HSYNC
R32 GM@ 39_0402_5% SN74AHCT1G125GW_SOT353-5
3

2 2
+CRT_VCC

1 2
C15 0.1U_0402_16V4Z
5
1
P
OE#

1 2 2 4 D_CRT_VSYNC
17 VGA_CRT_VSYNC A Y
R29 PM@ 0_0402_5%
G

1 2 U1
9 GMCH_CRT_VSYNC
R31 GM@ 39_0402_5% SN74AHCT1G125GW_SOT353-5
3

+CRT_VCC

+3VS

1
GM@ R1 R2
1 2 4.7K_0402_5% 4.7K_0402_5%
9 GMCH_CRT_DATA
0_0402_5% R266

2
2
G
PM@
3 DSUB_12_DATA 3
17 VGA_DDC_DATA 1 2 3 1
0_0402_5% R265

D
2
G
D10 D9 Q26
@ DAN217_SC59 @ DAN217_SC59 PM@ 2N7002_SOT23
1 2 3 1 DSUB_15_CLK
17 VGA_DDC_CLK
1

1
0_0402_5% R267

D
GM@ Q27
1 2 2N7002_SOT23
9 GMCH_CRT_CLK
0_0402_5% R268
2

+3VS
1 2 C145
1 2 @ 22P_0402_50V8J
17 VGA_TV_LUMA
R42 PM@ 0_0402_5%
1 2 TV_LUMA L15 1 2
9 GMCH_TV_LUMA
R43 GM@ 0_0402_5% FBM-11-160808-121T_0603

1 2 TV_CRMA L14 1 2
17 VGA_TV_CRMA
R38 PM@ 0_0402_5% FBM-11-160808-121T_0603
1 2 JP17
9 GMCH_TV_CRMA
1

R39 GM@ 0_0402_5% 1 2 C142 TV_CRMA_L 4 4

1

1 1 @ 22P_0402_50V8J TV_LUMA_L 3 6
R71 R77 3
2 5
150_0402_1% 150_0402_1% C131
100P_0402_50V8J
C143
100P_0402_50V8J
1
C141
1
C153
1
2
1
2
TV-OUT Conn.
2

2 2 ALLTO_C10877-104A1-L_4P R417 1. Y ground

2

2 2
0_0805_5% 2. C ground
100P_0402_50V8J 100P_0402_50V8J 3. Y (luminance+sync)
4 4. C (crominance) 4
1

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title
CRT & TVout Connector
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HTW20 M/B LA-3171P
Date: Tuesday, May 02, 2006 Sheet 16 of 44
A B C D E
 5 4 3 2 1

LCD POWER CIRCUIT

+LCDVDD +5VALW
VGA BOARD Conn.

2
JP14
R272 B+ 1 2 +B_L
+3VS 1 2 +1.8VS
R263 1M_0402_5% PM@ L28 FBM-L11-201209-121LMT_0805
470_0805_5% 3 4
5 6
W=60mils 1 2

1 2

1
PM@ L27 FBM-L11-201209-121LMT_0805 7 8
R269 9 10

3
D S
Q28
Q29 11 12
2 1 2 2 13 14
D 2N7002_SOT23 G D
+1.5VS 15 16
S 100K_0402_5%

3
G
AOS 3401_SOT23 +LCDVDD 17 18
D 19 20
2 W=60mils

1
21 22

1
D
VGA_ENVDD C418 23 24
2 25 26
G 1 1
GMCH_ENVDD R264 1 Q30 1 C414 C416 27 28
9 GMCH_ENVDD 2 S

3
0_0402_5% GM@ BSS138_SOT23 1000P_0402_50V7K 29 30
+2.5VS 31 32
4.7U_0805_10V4Z 0.1U_0402_16V4Z
2 2 33 34 +3VS
LCD_CLK 35 36
LCD_DATA 37 38
39 40 +5VALW
41 42 TXCLK-
43 44 TXCLK+
45 46
47 48 TXOUT0-
49 50 TXOUT0+
51 52
53 54 TXOUT1-
55 56 TXOUT1+
PCIE_MTX_C_GRX_N[0..15] 57 58
9 PCIE_MTX_C_GRX_N[0..15] 59 60 TXOUT2-
PCIE_MTX_C_GRX_P[0..15] 61 62 TXOUT2+
9 PCIE_MTX_C_GRX_P[0..15] 63 64
PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P0 65 66 PCIE_MTX_C_GRX_P0
9 PCIE_GTX_C_MRX_N[0..15] 67 68
PCIE_GTX_C_MRX_N0 PCIE_MTX_C_GRX_N0
PCIE_GTX_C_MRX_P[0..15] 69 70
9 PCIE_GTX_C_MRX_P[0..15] 71 72
PCIE_GTX_C_MRX_P1 PCIE_MTX_C_GRX_P1
+3VS PCIE_GTX_C_MRX_N1 73 74 PCIE_MTX_C_GRX_N1
75 76
C PCIE_GTX_C_MRX_P2 77 78 PCIE_MTX_C_GRX_P2 C
LCD/PANEL BD. Conn. 79 80
1

PCIE_GTX_C_MRX_N2 PCIE_MTX_C_GRX_N2
R262 81 82
PCIE_GTX_C_MRX_P3 83 84 PCIE_MTX_C_GRX_P3
D26 4.7K_0402_5% JP1 PCIE_GTX_C_MRX_N3 85 86 PCIE_MTX_C_GRX_N3
RB751V_SOD323 87 88
2

2 1 TXCLK- PCIE_GTX_C_MRX_P4 89 90 PCIE_MTX_C_GRX_P4

DISPOFF# 4 3 TXCLK+ PCIE_GTX_C_MRX_N4 91 92 PCIE_MTX_C_GRX_N4
31 BKOFF# 1 2 6 5 93 94
+LCDVDD 2 1 R270 +LCDVDD_LCD
FBMA-L11-321611-121LMA30T_1206 8 7 TXOUT0- PCIE_GTX_C_MRX_P5 95 96 PCIE_MTX_C_GRX_P5
+3VS_LCD 10 9 TXOUT0+ PCIE_GTX_C_MRX_N5 97 98 PCIE_MTX_C_GRX_N5
+3VS 1 2 R271 12 11 1 1 99 100

6P_0402_50V8K

6P_0402_50V8K
FBMA-L11-201209-121LMT 0805 C667C668
14 13 101 102
2 1 C417 +LCDVDD_LCD LCD_CLK
16 15
TXOUT2- PCIE_GTX_C_MRX_P6
103 104
PCIE_MTX_C_GRX_P6
0.1U_0402_16V4Z LCD_DATA TXOUT2+ PCIE_GTX_C_MRX_N6 PCIE_MTX_C_GRX_N6
DAC_BRIG 18 17 2 2 105 106
31 DAC_BRIG 20 19 107 108
2 1 C415 +3VS_LCD INVT_PWM TXOUT1- PCIE_GTX_C_MRX_P7 PCIE_MTX_C_GRX_P7
31 INVT_PWM 22 21 109 110
0.1U_0402_16V4Z DISPOFF# TXOUT1+ PCIE_GTX_C_MRX_N7 PCIE_MTX_C_GRX_N7
24 23 111 112
26 25 @ @ PCIE_GTX_C_MRX_P8 113 114 PCIE_MTX_C_GRX_P8
28 27 PCIE_GTX_C_MRX_N8 115 116 PCIE_MTX_C_GRX_N8
INVPWR_B+ 30 29 117 118
PCIE_GTX_C_MRX_P9 119 120 PCIE_MTX_C_GRX_P9
ACES_88242-3000 PCIE_GTX_C_MRX_N9 121 122 PCIE_MTX_C_GRX_N9
123 124
PCIE_GTX_C_MRX_P10 125 126 PCIE_MTX_C_GRX_P10
PCIE_GTX_C_MRX_N10 127 128 PCIE_MTX_C_GRX_N10
129 130
PCIE_GTX_C_MRX_P11 131 132 PCIE_MTX_C_GRX_P11
PCIE_GTX_C_MRX_N11 133 134 PCIE_MTX_C_GRX_N11
INVPWR_B+ 135 136
PCIE_GTX_C_MRX_P12 137 138 PCIE_MTX_C_GRX_P12
PCIE_GTX_C_MRX_N12 139 140 PCIE_MTX_C_GRX_N12
B 141 142 B
1 2 B+ 143 144
1 1 L4 KC FBM-L11-201209-221LMAT_0805 PCIE_GTX_C_MRX_P13 PCIE_MTX_C_GRX_P13
C23 PCIE_GTX_C_MRX_N13 145 146 PCIE_MTX_C_GRX_N13
0.1U_0603_25V7K C24 147 148
68P_0402_50V8K PCIE_GTX_C_MRX_P14 149 150 PCIE_MTX_C_GRX_P14
2 2 PCIE_GTX_C_MRX_N14 151 152 PCIE_MTX_C_GRX_N14
153 154
PCIE_GTX_C_MRX_P15 155 156 PCIE_MTX_C_GRX_P15
PCIE_GTX_C_MRX_N15 157 158 PCIE_MTX_C_GRX_N15
159 160
CLK_PCIE_VGA 161 162 VGA_DDC_CLK
15 CLK_PCIE_VGA 163 164 VGA_DDC_CLK 16
CLK_PCIE_VGA# VGA_DDC_DATA
15 CLK_PCIE_VGA# 165 166 VGA_DDC_DATA 16
VGA_CRT_R 167 168 VGA_TV_LUMA
+3VALW 16 VGA_CRT_R 169 170 VGA_TV_LUMA 16
VGA_CRT_G 171 172 VGA_TV_CRMA
16 VGA_CRT_G 173 174 VGA_TV_CRMA 16
14

U24D VGA_CRT_B 175 176 VGA_CRT_VSYNC

16 VGA_CRT_B 177 178 VGA_CRT_VSYNC 16
12 VGA_CRT_HSYNC
P

A 179 180 VGA_CRT_HSYNC 16

11 PLTRSTR#
7,18,20,25,26,27 PLT_RST# O 181 182
13 SUSP#
B 25,29,31,32,34,39,40 SUSP# 183 184
G

VGA_ENVDD
VGA_ENBKL 185 186
31 VGA_ENBKL
7

187 188
LCD_CLK R7 189 190
2 1GM@ 0_0402_5% GMCH_LCD_CLK 9 191 192
LCD_DATA R8 2 1GM@ 0_0402_5% SN74LVC32APWLE_TSSOP14
GMCH_LCD_DATA 9 193 194
195 196
197 198
TXOUT0- R12 199 200
1 2GM@ 0_0402_5% GMCH_TXOUT0- 9
TXOUT0+ R13 1 2GM@ 0_0402_5% PM@ ACES_88386-1K71
GMCH_TXOUT0+ 9
A TXOUT1- R23 A
1 2GM@ 0_0402_5% GMCH_TXOUT1- 9
TXOUT1+ R22 1 2GM@ 0_0402_5% GMCH_TXOUT1+ 9
TXOUT2- R25 1 2GM@ 0_0402_5% GMCH_TXOUT2- 9
TXOUT2+ R24 1 2GM@ 0_0402_5% GMCH_TXOUT2+ 9
TXCLK- R21 1 2GM@ 0_0402_5% GMCH_TXCLK- 9
TXCLK+ R20 1 2GM@ 0_0402_5% GMCH_TXCLK+ 9 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title
VGA / LCD CONN.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HTW20 M/B LA-3171P
Date: Friday, April 28, 2006 Sheet 17 of 44
5 4 3 2 1
 5 4 3 2 1

D D

22,24 PCI_AD[0..31] U16B

PCI_AD0 E18 D7 PCI_REQ0#
AD0 REQ0# PCI_REQ0# 24
PCI_AD1 C18 E7 PCI_GNT0#
AD1 GNT0# PCI_GNT0# 24
PCI_AD2 PCI_REQ1#
PCI_AD3
A16
F18
AD2 PCI REQ1# C16
D16
PCI_AD4 AD3 GNT1# PCI_REQ2#
E16 AD4 REQ2# C17 PCI_REQ2# 22
PCI_AD5 A18 D17 PCI_GNT2#
AD5 GNT2# PCI_GNT2# 22
PCI_AD6 E17 E13 PCI_REQ3#
PCI_AD7 AD6 REQ3#
A17 AD7 GNT3# F13
PCI_AD8 A15 A13 PCI_REQ4#
PCI_AD9 AD8 REQ4# / GPIO22 ICH_GPIO48
C14 AD9 GNT4# / GPIO48 A14
PCI_AD10 E14 C8 PCI_REQ5#
C PCI_AD11 AD10 GPIO1 / REQ5# C
D14 AD11 GPIO17 / GNT5# D8
PCI_AD12 B12
PCI_AD13 AD12 PCI_CBE#0
C13 AD13 C/BE0# B15 PCI_CBE#0 22,24
PCI_AD14 G15 C12 PCI_CBE#1
AD14 C/BE1# PCI_CBE#1 22,24
PCI_AD15 G13 D12 PCI_CBE#2
+3VS AD15 C/BE2# PCI_CBE#2 22,24
PCI_AD16 E12 C15 PCI_CBE#3
AD16 C/BE3# PCI_CBE#3 22,24
PCI_AD17 C11
RP32 PCI_AD18 AD17 PCI _IRDY#
D11 AD18 IRDY# A7 PCI_IRDY# 22,24
1 8 PCI_DEVSEL# PCI_AD19 A11 E10 PCI_PAR
AD19 PAR PCI_PAR 22,24
2 7 PCI_STOP# PCI_AD20 A10 B18
AD20 PCIRST# PCI_RST# 22,24,30,31,33
3 6 PCI_SERR# PCI_AD21 F11 A12 PCI_DEVSEL#
AD21 DEVSEL# PCI_DEVSEL# 22,24
4 5 PCI_TRDY# PCI_AD22 F10 C9 PCI_PERR#
AD22 PERR# PCI_PERR# 22,24
PCI_AD23 E9 E11 PCI_PLOCK#
8.2K_0804_8P4R_5% PCI_AD24 AD23 PLOCK# PCI_SERR#
D9 AD24 SERR# B10 PCI_SERR# 22
PCI_AD25 B9 F15 PCI_STOP#
AD25 STOP# PCI_STOP# 22,24
RP37 PCI_AD26 A8 F14 PCI_TRDY#
AD26 TRDY# PCI_TRDY# 22,24
1 8 PCI_PIRQC# PCI_AD27 A6 F16 PCI_FRAME#
AD27 FRAME# PCI_FRAME# 22,24
2 7 PCI_PIRQD# PCI_AD28 C7
PCI_PIRQA# PCI_AD29 AD28
3 6
PCI_PIRQB# PCI_AD30
B6 AD29 PLTRST# C26
CLK_PCI_ICH
PLT_RST# 7,17,20,25,26,27 Place closely pin A9
4 5 E6 AD30 PCICLK A9 CLK_PCI_ICH 15
PCI_AD31 D6 B19
8.2K_0804_8P4R_5% AD31 PME# CLK_PCI_ICH

2
RP34 PCI_PIRQA# A3
Interrupt I/F G8 PCI_PIRQE# R223
22 PCI_PIRQA# PIRQA# GPIO2 / PIRQE# PCI_PIRQE# 24
1 8 PCI_PIRQE# PCI_PIRQB# B4 F7 PCI_PIRQF#
22 PCI_PIRQB# PIRQB# GPIO3 / PIRQF#
2 7 PCI_PIRQF# PCI_PIRQC# C5 F8 PCI_PIRQG# @ 10_0402_5%
PCI _IRDY# PCI_PIRQD# PIRQC# GPIO4 / PIRQG# PCI_PIRQH#
3 6 B5 G7

1
PCI_PERR# PIRQD# GPIO5 / PIRQH#
4 5

8.2K_0804_8P4R_5% AE5
MISC AE9 C365
1
RSVD[1] RSVD[6]
AD5 RSVD[2] RSVD[7] AG8
B RP33 @15P_0402_50V8J B
AG4 RSVD[3] RSVD[8] AH8
PCI_REQ2# 2
1 8 AH4 RSVD[4] RSVD[9] F21
2 7 ICH_GPIO48 AD9 AH20
RSVD[5] MCH_SYNC# MCH_ICH_SYNC# 7
3 6 PCI_REQ4#
4 5 PCI_FRAME#
ICH7_BGA652~D
8.2K_0804_8P4R_5%
ICH7R3@
R491 1 2 PCI_PLOCK#
8.2K_0402_5%
R492 1 2 PCI_REQ5#
8.2K_0402_5%
R493 1 2 PCI_REQ1#
8.2K_0402_5%
R494 1 2 PCI_PIRQH#
8.2K_0402_5%
R495 1 2 PCI_REQ0#
8.2K_0402_5%
R496 1 2 PCI_REQ3#
8.2K_0402_5%
R497 1 2 PCI_PIRQG#
8.2K_0402_5%

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ICH7-M(1/4)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 28, 2006 Sheet 18 of 44
5 4 3 2 1
 5 4 3 2 1

SATA HDD CONN

C298 2 1 15P_0402_50V8J ICH_RTCX1 JP22

1 GND

1
Y4 SATA_TXP0 2
R180 SATA_TXN0 A+
2 NC IN 1 3 A-
32.768KHZ_12.5P_1TJS125BJ2A251 SATA_RXN0_C 2 1 4
10M_0402_5% 3900P_0402_50V7K C242 SATA_RXN0 GND
3 NC OUT 4 5 B-
U16A SATA_RXP0 6

2
SATA_RXP0_C B+
2 1 7 GND

RTC
AB1 AA6 LPC_AD0 LPC_AD0 27,30,31,33 3900P_0402_50V7K C244
C287 RTXC1 LAD0
2 1 15P_0402_50V8J ICH_RTCX2 AB2 RTCX2 LAD1 AB5 LPC_AD1 LPC_AD1 27,30,31,33
AC4 LPC_AD2 LPC_AD2 27,30,31,33
D R149 1 ICH_RTCRST# AA3 LAD2 LPC_AD3 D
+RTCVCC 2 RTCRST# LAD3 Y6 LPC_AD3 27,30,31,33 +3VS 8 VCC3.3

LPC
20K_0402_5% 9
R168 VCC3.3
ICH_INTVRMEN W4 AC3 10
J1 INTVRMEN LDRQ0# VCC3.3
+RTCVCC 1 2 SM_INTRUDER# Y5 AA5 LPC_DRQ#1 11
INTRUDER# LDRQ1# / GPIO23 LPC_DRQ#1 30,33 GND
1 2 1M_0402_5% 12
1 2 LPC_FRAME# GND
LFRAME# AB3 LPC_FRAME# 27,30,31,33 13 GND
@ W1 +5VS 14
JUMP_43X79 EE_CS VCC5
Y1 EE_SHCLK 2 1 R349 10K_0402_5% +3VS 15 VCC5
C246 Y2 AE22 GATEA20 16
EE_DOUT A20GATE GATEA20 31 VCC5

LAN
1U_0603_10V4Z W3 AH28 H_A20M# 17
EE_DIN A20M# H_A20M# 4 GND

CPU
1 2 18 RESERVED
V3 LAN_CLK CPUSLP# AG27 19 GND
20 VCC12
27 ACZ_BITCLK_MDC 33_0402_5% 1 2 R189 U3 AF24 21
LAN_RSTSYNC TP1 / DPRSTP# H_DPRSTP# 19,1 VCC12
AH25 H_DPSLP# 22
TP2 / DPSLP# H_DPSLP# 4 VCC12
2 1 U5 R158 2 1 56_0402_5% +VCCP
@ 27P_0402_50V8J C589 LAN_RXD0 H_FERR#
V4 LAN_RXD1 FERR# AG26 H_FERR# 4
T5 SUYIN_127043FB022G208ZR_22P_RV
LAN_RXD2 H_PW RGOOD
2 1 GPIO49 / CPUPWRGD AG24 H_PWRGOOD 4
@ 27P_0402_50V8J C590 U7
33_0402_5% 1 LAN_TXD0 H_IGNNE# +3VS
28 ICH_BITCLK_AUDIO 2 R183 V6 LAN_TXD1 IGNNE# AG22 H_IGNNE# 4
V7 LAN_TXD2 INIT3_3V# AG21
27 ACZ_SYNC_MDC 33_0402_5% 1 2 R202 AF22 H_INIT#
INIT# H_INIT# 4 +3VS +VCCP
AF25 H_INTR
INTR H_INTR 4
28 ICH_SYNC_AUDIO 33_0402_5% 2 1 R201 1 1 1 1

AC-97/AZALIA
ACZ_BITCLK U1 R345 2 1 10K_0402_5% C608 C609 C610 C611
33_0402_5% 1 ACZ_BCLK
27 ACZ_RST#_MDC 2 R211 ACZ _SYNC R6 ACZ_SYNC RCIN# AG23 EC_KBRST#
EC_KBRST# 31

1
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
33_0402_5% 2 2 2 2 2
28 ICH_RST_AUDIO# 1 R210 ACZ_RST# R5 ACZ_RST# SMI# AF23 H_SMI#
H_SMI# 4
R160
AH24 H_NMI
NMI H_NMI 4
ACZ_SDIN0 T2 56_0402_5%
28 ICH_AC_SDIN0 ACZ_SDIN0
ACZ_SDIN1 T3 AH22 H_STPCLK#
27 ACZ_SDIN1 H_STPCLK# 4

2
C ACZ_SDIN1 STPCLK# C
T1 ACZ_SDIN2
AF26 THRMTRIP_ICH# 1 R159 2 +5VS Place component's closely SATA CONN.
THERMTRIP# H_THERMTRIP# 4,7
28 ICH_SDOUT_AUDIO 33_0402_5% 2 1 R197 ACZ_SDOUT T4 24.9_0402_1%
ACZ_SDOUT
27 ACZ_SDOUT_MDC 33_0402_5% 2 1 R198 AH17 PD_A0 ***Must be placed close to AF26 pin within 2"
DA0 PD_A1
31 PHDD_LED# AF18 SATALED# DA1 AE17 1 1 1 1
AF17 PD_A2 C274 C266 C267 C268
R348 DA2
+3VS 2 1
20K_0402_5% SATA_RXN0_C AF3 AE16 PD_CS#1 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
C272 SATA_RXP0_C SATA0RXN DCS1# PD_CS#3 2 2 2 2
AE3 SATA0RXP DCS3# AD16
SATA_TXN0 1 2 SATA_TXN0_C AG2 SATA0TXN

SATA
C264 3900P_0402_50V7K SATA_TXP0_C AH2
SATA_TXP0 1 SATA0TXP PD_D0
2 AB15
3900P_0402_50V7K AF7 SATA2RXN
DD0
DD1 AE14 PD_D1
PD_D2
ODD CONN
AE7 SATA2RXP DD2 AG13
PD_D3
AG6
AH6
SATA2TXN DD3 AF13
AD14 PD_D4 delete CD-Rom analog audio signal out
SATA2TXP DD4 PD_D5
DD5 AC13
CLK_PCIE_SATA# AF1 AD12 PD_D6 JP19
15 CLK_PCIE_SATA# SATA_CLKN DD6
CLK_PCIE_SATA AE1 AC12 PD_D7 1 2
15 CLK_PCIE_SATA SATA_CLKP DD7
AE12 PD_D8 3 4 1 2
R148 DD8 PD_D9 PD_D8 R110 @ 0_0603_5%
AH10 SATARBIASN DD9 AF12 20 ODD_RST# 5 6
1 2 AG10 AB13 PD_D10 PD_D7 7 8 PD_D9
SATARBIASP DD10 PD_D11 PD_D6 PD_D10
DD11 AC14 9 10
24.9_0402_1% AF14 PD_D12 PD_D5 11 12 PD_D11
DD12 PD_D13 PD_D4 PD_D12
DD13 AH13 13 14
PD_D14 PD_D3 PD_D13
4.7K_0402_5% 2 1 R166 PD _IORDY AG16
IDE DD14 AH14
AC15 PD_D15 PD_D2
15
17
16
18 PD_D14
+3VS IORDY DD15
8.2K_0402_5% 2 1 R165 PD_IRQ AH16 PD_D1 19 20 PD_D15
PD_DACK# IDEIRQ PD_D0 PD_DREQ
AF16 DDACK# 21 22
PD_IOW# AH15 AE15 PD_DREQ 23 24 PD_IOR#
PD_IOR# DIOW# DDREQ PD_IOW#
AF15 DIOR# 25 26
B PD _IORDY PD_DACK# B
27 28
+RTCVCC PD_IRQ 29 30
ICH7_BGA652~D PD_A1 31 32 PDIAG# R83 1 2 +5VS
PD_A0 33 34 PD_A2 100K_0402_5%
ICH7R3@ R87 PD_CS#1 35 36 PD_CS#3
1

2 1 37 38 W=80mils
+5VS +5VS
R152 100K_0402_5% +5VS 39 40 +5VS
+5VS 41 42 +5VS
332K_0402_1% 43 44 2 1
45 46
2

2 1 SEC_CSEL 47 48 C156 0.1U_0402_16V4Z

ICH_INTVRMEN RTC Battery R78 470_0402_5% 49 50
Layout Note: 53 54
1

R150 OCTEK_CDR-50JD1
1. Under BATT1 battery Body, no Trace no Via
@ 0_0402_5%
2. BATT1 + - PIN keep out 80mil from other component ,trace and via
2

+5VS

- BATT1 + +RTCBATT

2 1 +RTCBATT 1 1 1 1
C549 C159 C155 C158

10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

45@ RTCBATT 2 2 2 2
1

D11

A
Place component's closely ODD CONN. A
BAS40-04_SOT23
+RTCVCC
3

+CHGRTC
1
C223
0.1U_0402_16V4Z
Security Classification Compal Secret Data Compal Electronics, Inc.
2 Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ICH7-M(2/4)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 28, 2006 Sheet 19 of 44
5 4 3 2 1
 5 4 3 2 1

Place closely pin B2 Place closely pin AC1

+3VALW +3VALW
CLK_48M_ICH CLK_14M_ICH

1
2

2
R395 R394 R224 R176
R227 R226
2.2K_0402_5% 2.2K_0402_5% U16C @ 10_0402_5% @ 10_0402_5%
10K_0402_5% 10K_0402_5%

2
ICH_SMBCLK C22 AF19 R145 1 2 100_0402_5%
15,25 ICH_SMBCLK

1
D ICH_SMBDATA SMBCLK GPIO21 / SATA0GP R163 100_0402_5% D
15,25 ICH_SMBDATA B22 SMBDATA GPIO19 / SATA1GP AH18 1 2 1 1

SMB
SATA
GPIO
LINKALERT# A26 AH19 R162 1 2 100_0402_5% C364 C281
ICH_SMLINK0 LINKALERT# GPIO36 / SATA2GP R144 100_0402_5%
B25 SMLINK0 GPIO37 / SATA3GP AE19 1 2
ICH_SMLINK1 A25 @ 15P_0402_50V8J @ 15P_0402_50V8J
SMLINK1 2 2

AC1 CLK_14M_ICH
CLK14 CLK_14M_ICH 15

Clocks
R I# A28 B2 CLK_48M_ICH
RI# CLK48 CLK_48M_ICH 15
SB_SPKR A19
28 SB_SPKR SPKR
SUS_STAT# A27 C20
27 SUS_STAT# SUS_STAT# SUSCLK
4 DBRESET# DBRESET# A22 SYS_RST#

SYS
B24 PM_SLP_S3#
SLP_S3# PM_SLP_S3# 31
AB18 D23 SLP_S4#
7 PM_BMBUSY# GPIO0 / BM_BUSY# SLP_S4# SLP_S5#
SLP_S5# F22
OCP# B23
4 OCP# GPIO11 / SMBALERT#
AA4 PWROK R182
PWROK PWROK 7,31

POWER MGT
H_STP_PCI# AC20 1 2 10K_0402_5%
+3VS 15 H_STP_PCI# GPIO18 / STPPCI#

GPIO
H_STP_CPU# AF21 AC22 DPRSLPVR
15 H_STP_CPU# GPIO20 / STPCPU# GPIO16 / DPRSLPVR DPRSLPVR 7,41
A21 C21 ICH_LOW_BAT#
GPIO26 TP0 / BATLOW# DPRSLPVR 2 1
10K_0402_5% B21 C23 R351
32 SB_INT_FLASH_SEL# GPIO27 PWRBTN# PBTN_OUT# 31
R161 1 2 SIRQ E23 @ 100K_0402_5%
GPIO28
LAN_RST# C19 PLT_RST# 7,17,18,25,26,27
8.2K_0402_5% PM_CLKRUN# AG18
27 PM_CLKRUN# GPIO32 / CLKRUN#
R164 1 2 PM_CLKRUN# Y4
RSMRST# EC_RSMRST# 31
27 MDC_RST# AC19 GPIO33 / AZ_DOCK_EN#
100K_0402_5% 1 2 19 ODD_RST# U2
31 EC_SWI# GPIO34 / AZ_DOCK_RST#
R146 2 1 BT_DET# R421 0_0402_5%
R234 0_0402_5%
1 2 SB_PCIE_WAKE# F20 E20 EC_SCI#
25,26 PCIE_WAKE# WAKE# GPIO9 EC_SCI# 31
@ 10K_0402_5% SIRQ AH21 A20
C 22,27,30,31,33 SIRQ SERIRQ GPIO10 ACIN 31,33,35 C
R434 1 2 VGATE_R 31 EC_THERM#
EC_THERM# AF20 THRM# GPIO12 F19 BT_DET#
BT_DET# 32
E19 EC_LID_OUT#
GPIO13 EC_LID_OUT# 31
Pull High at Power 15,31,41 VGATE R350 1 2 VGATE_R AD22 R4
VRMPWRGD GPIO14 EXP_CPPE# 25
GPIO15 E22 SPK_SEL 31
0_0402_5% R3
GPIO24 EC_FLASH#
AC21 GPIO6 GPIO GPIO25 D20 EC_FLASH# 32
+3VALW AC18 AD21 SATA_CLKREQ#
GPIO7 GPIO35 / SATAREQ# SATA_CLKREQ# 15
EC_SMI# E21 AD20 PCM_DISABLE# 23
31 EC_SMI# GPIO8 GPIO38 +3VALW
10K_0402_5% AE20
R225 1 GPIO39
2 LINKALERT#
ICH7_BGA652~D Need update symbol 1 2 C354
10K_0402_5% 0.1U_0402_16V4Z
R229 1 2 DBRESET#

14
ICH7R3@
U20A
10K_0402_5% 1 SLP_S4#

P
A
R228 1 2 OCP# U16D
31 PM_SLP_S5# 3 O
PCIE_PTX_C_IRX_N1 F26 V26 DMI_RXN0 2 SLP_S5#
25 PCIE_PTX_C_IRX_N1 PERn1 DMI0RXN DMI_RXN0 7 B

G
8.2K_0402_5% PCIE_PTX_C_IRX_P1 F25 V25 DMI_RXP0
25 PCIE_PTX_C_IRX_P1 PERp1 DMI0RXP DMI_RXP0 7

DIRECT MEDIA INTERFACE

R220 1 2 R I# 25 PCIE_ITX_C_PRX_N1 0.1U_0402_16V7K 2 1 C350 PCIE_ITX_PRX_N1 E28 U28 DMI_TXN0
DMI_TXN0 7

7
0.1U_0402_16V7K 2 PETn1 DMI0TXN
25 PCIE_ITX_C_PRX_P1 1 C352 PCIE_ITX_PRX_P1 E27 PETp1 DMI0TXP U27 DMI_TXP0
DMI_TXP0 7
SN74LVC08APW_TSSOP14
8.2K_0402_5%
R230 2 1 ICH_LOW_BAT# PCIE_PTX_C_IRX_N2 H26 Y26 DMI_RXN1
25 PCIE_PTX_C_IRX_N2 PERn2 DMI1RXN DMI_RXN1 7
PCIE_PTX_C_IRX_P2 H25 Y25 DMI_RXP1
25 PCIE_PTX_C_IRX_P2 PERp2 DMI1RXP DMI_RXP1 7
25 PCIE_ITX_C_PRX_N2 0.1U_0402_16V7K 2 1 C334 PCIE_ITX_PRX_N2 G28 W28 DMI_TXN1
PETn2 DMI1TXN DMI_TXN1 7
@ 10K_0402_5% 25 PCIE_ITX_C_PRX_P2 0.1U_0402_16V7K 2 1 C344 PCIE_ITX_PRX_P2 G27 W27 DMI_TXP1
PETp2 DMI1TXP DMI_TXP1 7
R200 1 2 SPI_CS#

PCI-EXPRESS
PCIE_PTX_C_IRX_N3 K26 AB26 DMI_RXN2
26 PCIE_PTX_C_IRX_N3 PERn3 DMI2RXN DMI_RXN2 7
PCIE_PTX_C_IRX_P3 K25 AB25 DMI_RXP2
26 PCIE_PTX_C_IRX_P3 PERp3 DMI2RXP DMI_RXP2 7
@ 10K_0402_5% 26 PCIE_ITX_C_PRX_N3 0.1U_0402_16V7K 2 1 C321 PCIE_ITX_PRX_N3 J28 AA28 DMI_TXN2
PETn3 DMI2TXN DMI_TXN2 7
R199 1 2 SPI_MOSI 26 PCIE_ITX_C_PRX_P3 0.1U_0402_16V7K 2 1 C329 PCIE_ITX_PRX_P3 J27 AA27 DMI_TXP2
PETp3 DMI2TXP DMI_TXP2 7
M26 AD25 DMI_RXN3
B PERn4 DMI3RXN DMI_RXN3 7 B
@ 10K_0402_5% M25 AD24 DMI_RXP3
PERp4 DMI3RXP DMI_RXP3 7
R203 1 2 SPI_MISO L28 PETn4 DMI3TXN AC28 DMI_TXN3
DMI_TXN3 7
RP31
L27 AC27 DMI_TXP3 USB_OC#4 1 8
PETp4 DMI3TXP DMI_TXP3 7 +3VALW
1K_0402_5% USB_OC#5 2 7
R231 1 2 SB_PCIE_WAKE# P26 AE28 CLK_PCIE_ICH# USB_OC#6 3 6
PERn5 DMI_CLKN CLK_PCIE_ICH# 15
P25 AE27 CLK_PCIE_ICH USB_OC#7 4 5
PERp5 DMI_CLKP CLK_PCIE_ICH 15
N28 PETn5
N27 C25 R387 24.9_0402_1% Within 500 mils 10K_0804_8P4R_5%
PETp5 DMI_ZCOMP DMI_IRCOMP
DMI_IRCOMP D25 1 2 +1.5VS
T25 RP30
PERn6 USB_OC#3
T24 PERp6 USBP0N F1 1 8
R28 F2 USB_OC#0 2 7
PETn6 USBP0P USB20_N1 USB_OC#1
R27 PETp6 USBP1N G4 USB20_N1 25 3 6
G3 USB20_P1 USB_OC#2 4 5
USBP1P USB20_P1 25
R2 H1 USB20_N2
SPI_CLK USBP2N USB20_N2 30
SPI_CS# P6 H2 USB20_P2 10K_0804_8P4R_5%
SPI_CS# USBP2P USB20_P2 30
SPI

P1 J4 USB20_N3
SPI_ARB USBP3N USB20_N3 30
J3 USB20_P3
USBP3P USB20_P3 30
SPI_MOSI P5 K1 USB20_N4
SPI_MOSI USBP4N USB20_N4 30
SPI_MISO P2 K2 USB20_P4
SPI_MISO USBP4P USB20_P4 30
USBP5N L4
USBP5P L5
USB_OC#0 D3 M1 USB20_N6
OC0# USBP6N USB20_N6 25
USB_OC#1 C4 M2 USB20_P6
USB_OC#2 D5
OC1# USB USBP6P
N4 USB20_N7
USB20_P6 25
OC2# USBP7N USB20_N7 32
USB_OC#3 D4 N3 USB20_P7
OC3# USBP7P USB20_P7 32
USB_OC#4 E5
USB_OC#5 OC4# R217 22.6_0402_1%
C3 OC5# / GPIO29
USB_OC#6 A2 D2 USBRBIAS 1 2
USB_OC#7 OC6# / GPIO30 USBRBIAS#
B3 OC7# / GPIO31 USBRBIAS D1
Within 500 mils
A ICH7_BGA652~D A

ICH7R3@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ICH7-M(3/4)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 28, 2006 Sheet 20 of 44
5 4 3 2 1
 5 4 3 2 1

+VCCP
U16F U16E
A4 VSS[0] VSS[98] P28
+ICH_V5REF_RUN G10 L11 0.1U_0402_16V4Z A23 R1
V5REF[1] Vcc1_05[1] VSS[1] VSS[99]
Vcc1_05[2] L12 B1 VSS[2] VSS[100] R11
AD17 V5REF[2] Vcc1_05[3] L14 1 B8 VSS[3] VSS[101] R12
Vcc1_05[4] L16 1 1 B11 VSS[4] VSS[102] R13
+1.5VS +ICH_V5REF_SUS F6 L17 C257 C256 + C243 B14 R14
V5REF_Sus Vcc1_05[5] VSS[5] VSS[103]
Vcc1_05[6] L18 B17 VSS[6] VSS[104] R15
D 0.1U_0402_16V4Z 330U_D2E_2.5VM_R9 D
AA22 Vcc1_5_B[1] Vcc1_05[7] M11 B20 VSS[7] VSS[105] R16
2 2 2
1 AA23 Vcc1_5_B[2] Vcc1_05[8] M18 B26 VSS[8] VSS[106] R17
+5VS +3VS AB22 P11 B28 R18
1 1 1 Vcc1_5_B[3] Vcc1_05[9] VSS[9] VSS[107]
C304 + C579 C559 C574 AB23 P18 C2 T6
Vcc1_5_B[4] Vcc1_05[10] 1U_0603_10V4Z VSS[10] VSS[108]
AC23 Vcc1_5_B[5] Vcc1_05[11] T11 C6 VSS[11] VSS[109] T12
1

AC24 Vcc1_5_B[6] Vcc1_05[12] T18 C27 VSS[12] VSS[110] T13

R147 D12 2 2 2 2
AC25 Vcc1_5_B[7] Vcc1_05[13] U11 D10 VSS[13] VSS[111] T14
AC26 Vcc1_5_B[8] Vcc1_05[14] U18 D13 VSS[14] VSS[112] T15
100_0402_5% CH751H-40_SC76 0.1U_0402_16V4Z 0.1U_0402_16V4Z AD26 V11 D18 T16
220U_D2_4VM Vcc1_5_B[9] Vcc1_05[15] VSS[15] VSS[113]
AD27 V12 D21 T17
2

Vcc1_5_B[10] Vcc1_05[16] VSS[16] VSS[114]

AD28 Vcc1_5_B[11] Vcc1_05[17] V14 D24 VSS[17] VSS[115] U4
+ICH_V5REF_RUN Place closely pin D26 V16 E1 U12
Vcc1_5_B[12] Vcc1_05[18] VSS[18] VSS[116]
1 1 D27 Vcc1_5_B[13] Vcc1_05[19] V17 E2 VSS[19] VSS[117] U13
C576 C561 D28,T28,AD28. D28 V18 E4 U14
Vcc1_5_B[14] Vcc1_05[20] VSS[21] VSS[118]
E24 Vcc1_5_B[15] E8 VSS[22] VSS[119] U15
0.1U_0402_16V4Z 0.1U_0402_16V4Z E25 U6 +3VS E15 U16
2 2 Vcc1_5_B[16] Vcc3_3 / VccHDA VSS[23] VSS[120]
E26 Vcc1_5_B[17] 1 F3 VSS[24] VSS[121] U17
F23 R7 +VCCP C310 F4 U24
Vcc1_5_B[18] VccSus3_3/VccSusHDA +3VALW VSS[25] VSS[122]
F24 Vcc1_5_B[19] F5 VSS[26] VSS[123] U25
G22 AE23 C556 0.1U_0402_16V4Z F12 U26
Vcc1_5_B[20] V_CPU_IO[1] 2 VSS[27] VSS[124]
G23 Vcc1_5_B[21] V_CPU_IO[2] AE26 1 2 F27 VSS[28] VSS[125] V2
H22 Vcc1_5_B[22] V_CPU_IO[3] AH26 F28 VSS[29] VSS[126] V13
+5VALW +3VALW H23 0.1U_0402_16V4Z G1 V15
Vcc1_5_B[23] VSS[30] VSS[127]
J22 Vcc1_5_B[24] Vcc3_3[3] AA7 +3VS 1 2 G2 VSS[31] VSS[128] V24
J23 Vcc1_5_B[25] Vcc3_3[4] AB12 G5 VSS[32] VSS[129] V27
1

K22 AB20 1 C562 G6 V28

R232 D14 Vcc1_5_B[26] Vcc3_3[5] C565 0.1U_0402_16V4Z VSS[33] VSS[130]
K23 Vcc1_5_B[27] Vcc3_3[6] AC16 G9 VSS[34] VSS[131] W6
L22 Vcc1_5_B[28] Vcc3_3[7] AD13 1 2 G14 VSS[35] VSS[132] W24
10_0402_5% CH751H-40_SC76 L23 AD18 0.1U_0402_16V4Z G18 W25
Vcc1_5_B[29] Vcc3_3[8] 2 C286 VSS[36] VSS[133]
M22 AG12 G21 W26
2

+ICH_V5REF_SUS Vcc1_5_B[30] Vcc3_3[9] 4.7U_0805_10V4Z VSS[37] VSS[134]

M23 Vcc1_5_B[31] Vcc3_3[10] AG15 G24 VSS[38] VSS[135] Y3
N22 Vcc1_5_B[32] Vcc3_3[11] AG19 G25 VSS[39] VSS[136] Y24
C C
1 N23 Vcc1_5_B[33] G26 VSS[40] VSS[137] Y27
C361 P22 A5 +3VS H3 Y28
Vcc1_5_B[34] Vcc3_3[12] VSS[41] VSS[138]

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
P23 Vcc1_5_B[35] Vcc3_3[13] B13 H4 VSS[42] VSS[139] AA1
0.1U_0402_16V4Z R22 B16 1 1 1 H5 AA24
2 Vcc1_5_B[36] Vcc3_3[14] VSS[43] VSS[140]
R23 Vcc1_5_B[37] Vcc3_3[15] B7 H24 VSS[44] VSS[141] AA25

C581

C578

C362
R24 Vcc1_5_B[38] Vcc3_3[16] C10 H27 VSS[45] VSS[142] AA26
R25 Vcc1_5_B[39] Vcc3_3[17] D15 H28 VSS[46] VSS[143] AB4
2 2 2
R26 Vcc1_5_B[40] Vcc3_3[18] F9 J1 VSS[47] VSS[144] AB6
+3VS T22 G11 J2 AB11
Vcc1_5_B[41] Vcc3_3[19] VSS[48] VSS[145]
T23 Vcc1_5_B[42] Vcc3_3[20] G12 J5 VSS[49] VSS[146] AB14
T26 Vcc1_5_B[43] Vcc3_3[21] G16 J24 VSS[50] VSS[147] AB16
T27 Vcc1_5_B[44] J25 VSS[51] VSS[148] AB19
1 T28 Vcc1_5_B[45] VccRTC W5 +RTCVCC J26 VSS[52] VSS[149] AB21
C580 U22 K24 AB24
Vcc1_5_B[46] VSS[53] VSS[150]

0.1U_0402_16V4Z

0.1U_0402_16V4Z
U23 Vcc1_5_B[47] VccSus3_3[1] P7 +3VALW K27 VSS[54] VSS[151] AB27
0.1U_0402_16V4Z V22 1 1 1 1 K28 AB28
2 Vcc1_5_B[48] VSS[55] VSS[152]

C260

C251
V23 A24 C577 C582 L13 AC2
Vcc1_5_B[49] VccSus3_3[2] VSS[56] VSS[153]
W22 Vcc1_5_B[50] VccSus3_3[3] C24 L15 VSS[57] VSS[154] AC5
W23 D19 0.1U_0402_16V4Z 0.1U_0402_16V4Z L24 AC9
Vcc1_5_B[51] VccSus3_3[4] 2 2 2 2 VSS[58] VSS[155]
Y22 Vcc1_5_B[52] VccSus3_3[5] D22 L25 VSS[59] VSS[156] AC11
Place closely pin AG28 within 100mlis. Y23 Vcc1_5_B[53] VccSus3_3[6] G19 L26 VSS[60] VSS[157] AD1
M3 VSS[61] VSS[158] AD3
+1.5VS +1.5VS_DMIPLLR +1.5VS_DMIPLL
B27 Vcc3_3[1] VccSus3_3[7] K3 +3VALW M4 VSS[62] VSS[159] AD4
R169 R170 K4 1 1 M5 AD7
VccSus3_3[8] VSS[63] VSS[160]
0.01U_0402_16V7K

1 2 1 2 +1.5VS_DMIPLL AG28 K5 C333 C340 M12 AD8

VccDMIPLL VccSus3_3[9] VSS[64] VSS[161]
10U_0805_10V4Z

VccSus3_3[10] K6 M13 VSS[65] VSS[162] AD11

0.5_0805_1% 0_0805_5% 1 1 AB7 L1 0.1U_0402_16V4Z 0.1U_0402_16V4Z M14 AD15
+1.5VS Vcc1_5_A[1] VccSus3_3[11] 2 2 VSS[66] VSS[163]
C279

AC6 Vcc1_5_A[2] VccSus3_3[12] L2 M15 VSS[67] VSS[164] AD19

C280

AC7 Vcc1_5_A[3] VccSus3_3[13] L3 M16 VSS[68] VSS[165] AD23

1 AD6 Vcc1_5_A[4] VccSus3_3[14] L6 M17 VSS[69] VSS[166] AE2
2 2 C261 AE6 Vcc1_5_A[5] VccSus3_3[15] L7 M24 VSS[70] VSS[167] AE4
AF5 Vcc1_5_A[6] VccSus3_3[16] M6 M27 VSS[71] VSS[168] AE8
B 0.1U_0402_16V4Z B
AF6 Vcc1_5_A[7] VccSus3_3[17] M7 M28 VSS[72] VSS[169] AE11
2
AG5 Vcc1_5_A[8] VccSus3_3[18] N7 N1 VSS[73] VSS[170] AE13
AH5 Vcc1_5_A[9] N2 VSS[74] VSS[171] AE18
Vcc1_5_A[19] AB17 +1.5VS N5 VSS[75] VSS[172] AE21
+1.5VS 1 2 +SATAPLL Place closely pin AG5. AD2 AC17 N6 AE24
VccSATAPLL Vcc1_5_A[20] VSS[76] VSS[173]
0.1U_0402_16V4Z

L17 N11 AE25

CHB1608U301_0603 VSS[77] VSS[174]
+3VS AH11 Vcc3_3[2] Vcc1_5_A[21] T7 N12 VSS[78] VSS[175] AF2
0.1U_0402_16V4Z

1 Vcc1_5_A[22] F17 N13 VSS[79] VSS[176] AF4

C258

1 +1.5VS AB10 Vcc1_5_A[10] Vcc1_5_A[23] G17 N14 VSS[80] VSS[177] AF8

AB9 Vcc1_5_A[11] N15 VSS[81] VSS[178] AF11
C259

1 AC10 Vcc1_5_A[12] Vcc1_5_A[24] AB8 1 2 N16 VSS[82] VSS[179] AF27

2 C255 AD10 Vcc1_5_A[13] Vcc1_5_A[25] AC8 N17 VSS[83] VSS[180] AF28
2 C567 0.1U_0402_16V4Z
AE10 Vcc1_5_A[14] N18 VSS[84] VSS[181] AG1
1U_0603_10V4Z AF10 K7 N24 AG3
2 Vcc1_5_A[15] VccSus1_05[1] VSS[85] VSS[182]
AF9 Vcc1_5_A[16] N25 VSS[86] VSS[183] AG7
AG9 Vcc1_5_A[17] VccSus1_05[2] C28 N26 VSS[87] VSS[184] AG11
AH9 Vcc1_5_A[18] VccSus1_05[3] G20 P3 VSS[88] VSS[185] AG14
P4 VSS[89] VSS[186] AG17
+3VALW Place closely pin AG9. E3 VccSus3_3[19] Vcc1_5_A[26] A1 +1.5VS P12 VSS[90] VSS[187] AG20
1 Vcc1_5_A[27] H6 P13 VSS[91] VSS[188] AG25
C347 1 2 +USBPLL C1 H7 1 P14 AH1
+1.5VS VccUSBPLL Vcc1_5_A[28] VSS[92] VSS[189]
L30 1 J6 C363 P15 AH3
0.1U_0402_16V4Z CHB1608U301_0603 C356 Vcc1_5_A[29] VSS[93] VSS[190]
AA2 VccSus1_05/VccLAN1_05[1] Vcc1_5_A[30] J7 P16 VSS[94] VSS[191] AH7
2 0.1U_0402_16V4Z
Y7 VccSus1_05/VccLAN1_05[2] P17 VSS[95] VSS[192] AH12
0.1U_0402_16V4Z 2
P24 VSS[96] VSS[193] AH23
2
V5 VccSus3_3/VccLAN3_3[1] P27 VSS[97] VSS[194] AH27
V1 VccSus3_3/VccLAN3_3[2]
W2 ICH7_BGA652~D
VccSus3_3/VccLAN3_3[3]
+3VALW W7 VccSus3_3/VccLAN3_3[4]
1 ICH7_BGA652~D
C306
A A
ICH7R3@
0.1U_0402_16V4Z
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ICH7-M(4/4)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 21 of 44
5 4 3 2 1
 5 4 3 2 1

+S1_VCC +3VS
VPPD0
23 VPPD0
VPPD1
23 VPPD1
VCCD0#
+3VS 23 VCCD0#
40mil VCCD1#
23 VCCD1#

M13

M12

G13
N13

N12

D12
H11
S1_A[0..25]

G1
C8

N4
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

A7

B4

K2

F3
L9
L6
S1_A[0..25] 23
U31
1 1 1 1 1 1 1 S1_D[0..15]

VCCD1#
VCCD0#

VPPD1
VPPD0

VCCA2
VCCA1

VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
S1_D[0..15] 23
C612 C613 C614 C615 C616 C617 C618

0.1U_0402_16V4Z
D 2 2 2 2 2 2 2 D
PCI_AD31 C2 B2 S1_D10
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z PCI_AD30 AD31 CAD31/D10 S1_D9
C1 AD30 CAD30/D9 C3
PCI_AD29 D4 B3 S1_D1
PCI_AD28 AD29 CAD29/D1 S1_D8
D2 AD28 CAD28/D8 A3
PCI_AD27 D1 C4 S1_D0 +3VS
PCI_AD26 AD27 CAD27/D0 S1_A0
E4 AD26 CAD26/A0 A6
PCI_AD25 E3 D7 S1_A1
PCI_AD24 AD25 CAD25/A1 S1_A2
E2 AD24 CAD24/A2 C7 1 1
PCI_AD23 F2 A8 S1_A3 C619 C620
PCI_AD[0..31] PCI_AD22 AD23 CAD23/A3 S1_A4
18,24 PCI_AD[0..31] F1 AD22 CAD22/A4 D8
PCI_AD21 G2 A9 S1_A5 4.7U_0805_10V4Z 0.1U_0402_16V4Z
PCI_CBE#[0..3] PCI_AD20 AD21 CAD21/A5 S1_A6 2 2
18,24 PCI_CBE#[0..3] G3 AD20 CAD20/A6 C9
PCI_AD19 H3 A10 S1_A25
PCI_AD18 AD19 CAD19/A25 S1_A7
H4 AD18 CAD18/A7 B10
PCI_AD17 J1 D10 S1_A24
PCI_AD16 AD17 CAD17/A24 S1_A17
J2 AD16 CAD16/A17 E12
PCI_AD15 N2 F10 S1_IOWR#
AD15 CAD15/IOWR# S1_IOWR# 23
PCI_AD14 M3 E13 S1_A9
PCI_AD13 N3
AD14
AD13
CAD14/A9
CAD13/IORD# F13 S1_IORD#
S1_IORD# 23
+S1_VCC 6 IN 1 LED
PCI_AD12 K4 F11 S1_A11
PCI_AD11 AD12 CAD12/A11 S1_OE#
M4 AD11 CAD11/OE# G10 S1_OE# 23
PCI_AD10 K5 G11 S1_CE2# 1 1
+3VS AD10 CAD10/CE2# S1_CE2# 23
PCI_AD9 L5 G12 S1_A10 C621 C622
PCI_AD8 AD9 CAD9/A10 S1_D15
M5 AD8 CAD8/D15 H12
1 2 SM_CD# PCI_AD7 K6 H10 S1_D7 0.1U_0402_16V4Z 0.1U_0402_16V4Z
R443 5IN1@ 43K_0402_5% PCI_AD6 AD7 CAD7/D7 S1_D13 2 2 +5VS +5VS
M6 AD6 CAD6/D13 J11
PCI_AD5 N6 J12 S1_D6
AD5 CAD5/D6

2
PCI_AD4 M7 K13 S1_D12
PCI_AD3 AD4 CAD4/D12 S1_D5 R444
N7 J10

PCI Interface
PCI_AD2 AD3 CAD3/D5 S1_D11
L7 AD2 CAD2/D11 K10 10K_0402_5% 47K

3
CARDBUS
PCI_AD1 K7 K12 S1_D4 5IN1@
C PCI_AD0 AD1 CAD1/D4 S1_D3 C
N8 L13

1
AD0 CAD0/D3
PCI_CBE#3 E1 B7 S1_REG# 5IN1_LED# 2 10K
CBE3# CCBE3#/REG# S1_REG# 23
PCI_CBE#2 J3 A11 S1_A12
PCI_CBE#1 CBE2# CCBE2#/A12 S1_A8
N1 CBE1# CCBE1#/A8 E11
PCI_CBE#0 N5 H13 S1_CE1#
CBE0# CCBE0#/CE1# S1_CE1# 23
Q41
PCI_RST# G4 B9 S1_RST DTA114YKA_SOT23
18,24,30,31,33 PCI_RST# S1_RST 23

11
PCIRST# CRST#/RESET S1_A23 5IN1@
18,24 PCI_FRAME# J4 FRAME# CFRAME#/A23 B11
18,24 PCI_IRDY# K1 A12 S1_A15 R445
IRDY# CIRDY#/A15 S1_A22
18,24 PCI_TRDY# K3 TRDY# CTRDY#/A22 A13 200_0402_5%
L1 B13 S1_A21 5IN1@
18,24 PCI_DEVSEL# DEVSEL# CDEVSEL#/A21
L2 C12 S1_A20
18,24 PCI_STOP#

2 2
STOP# CSTOP#/A20 S1_A14 PCM_SPK
18,24 PCI_PERR# L3 PERR# CPERR#/A14 C13
M1 A5 S1_WAIT# D20
18 PCI_SERR# SERR# CSERR#/WAIT# S1_WAIT# 23
18,24 PCI_PAR M2 D13 S1_A13
PAR CPAR/A13

2
PCI_REQ#2 A1 B8 S1_INPACK# 5IN1@
18 PCI_REQ2# PCIREQ# CREQ#/INPACK# S1_INPACK# 23
B1 C11 S1_WE# R446 HT-191NB_BLUE_0603
18 PCI_GNT2# PCIGNT# CGNT#/WE# S1_WE# 23
CLK_PCI_PCM H1 B12 1 2 S1_A16 47K_0402_5%
15 CLK_PCI_PCM PCICLK CCLK/A16
CLK_PCI_PCM R447 33_0402_5%

1
L8 C5 S1_BVD1
S1_BVD1 23

1
RIOUT#_PME# CSTSCHG/BVD1_STSCHG#
1

+3VS 1 2 L11 D5 S1_WP

SUSPEND# CCLKRUN#/WP_IOIS16# S1_WP 23
R449 R448 10K_0402_5%
@ 10_0402_5% PCI_AD20 1 2 F4 D11 S1_A19
R450 100_0402_5% IDSEL CBLOCK#/A19
K8 D6 S1_RDY# S1_CD2# S1_CD1#
18 PCI_PIRQA# S1_RDY# 23
2

R451 1 SD_PULLHIGH N9 MFUNC0 CINT#/READY_IREQ#

1 23 MS_PWREN# 2 MFUNC1 2 2
C623 0_0402_5% K9 M9 PCM_SPK C624 C625
18 PCI_PIRQB# MFUNC2 SPKROUT PCM_SPK 28
@ N10 B5 S1_BVD2
20,27,30,31,33 SIRQ MFUNC3 CAUDIO/BVD2_SPKR# S1_BVD2 23
@ 15P_0402_50V8J SM_CD# L10 10P_0402_25V8K 10P_0402_25V8K
2 5IN1_LED# MFUNC4 S1_CD2# 1 1
N11 MFUNC5 CCD2#/CD2# A4 S1_CD2# 23
M11 L12 S1_CD1#
B MFUNC6 CCD1#/CD1# S1_CD1# 23 B
SDOC# J9 D9 S1_VS2
23 SDOC# MFUNC7 CVS2/VS2# S1_VS2 23
C6 S1_VS1
CVS1/VS1 S1_VS1 23
A2 S1_D2
PCI_RST# CRSV3/D2 S1_A18
M10 GRST# CRSV2/A18 E10
MFUNC5[3:0] = (0 1 0 1) J13 S1_D14
CRSV1/D14
MFUNC5[4] = 1
E7
SD/MMC/MS/SM H7
+VCC_SD VCC_SD MSINS#
J8 XD_PWREN#
MS_INS# 23 Port 80 Debug Card Connector JP26
MSPWREN#/SMPWREN# XD_PWREN# 23
SD_CD# E8 H8 MSBS_XDD1 PCI_CBE#0 20
23 SD_CD# SDCD# MSBS/SMDATA1 MSBS_XDD1 23 20
CLK_48M_CB SD_WP# F8 E9 MS_CLK R452 1 2 33_0402_5% PCI_AD6 19
23 SD_WP# SDWP/SMWPD# MSCLK/SMRE# MSCLK_XDRE# 23 19
SD_PWREN# G7 G9 MSD0_XDD2 5IN1@ PCI_AD4 18
23 SD_PWREN# SDPWREN33# MSDATA0/SMDATA2 MSD0_XDD2 23 18
1

H9 MSD1_XDD6 PCI_AD2 17
MSDATA1/SMDATA6 MSD1_XDD6 23 17
R453 CLK_48M_CB H5 G8 MSD2_XDD5 PCI_AD0 16
15 CLK_48M_CB SDCLKI MSDATA2/SMDATA5 MSD2_XDD5 23 16
@ 10_0402_5% F9 MSD3_XDD3 PCI_AD1 15
MSDATA3/SMDATA3 MSD3_XDD3 23 15
23 SDCK_XDWE#
R454 1 2 5IN1@ 33_0402_5% SD_CLK F6 SDCLK/SMWE#
PCI_AD3 14 14
SDCM_XDALE E5 PCI_AD5 13
23 SDCM_XDALE
2

SDDA0_XDD7 E6 SDCMD/SMALE PCI_AD7 13

1 23 SDDA0_XDD7 SDDAT0/SMDATA7 SMBSY# H6 XD_BSY# 23 12 12
C626 SDDA1_XDD0 F7 J7 XD_CD# PCI_AD8 11
23 SDDA1_XDD0 SDDAT1/SMDATA0 SMCD# XD_CD# 23 11
SDDA2_XDCL F5 J6 XD_WP# PCI_CBE#1 10
23 SDDA2_XDCL SDDAT2/SMCLE SMWP# XD_WP# 23 10
@ 15P_0402_50V8J SDDA3_XDD4 G6 J5 PCI_CBE#2 9
2 23 SDDA3_XDD4 SDDAT3/SMDATA4 SMCE# XD_CE# 23 9
PCI_CBE#3 8
2 8
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8

G5 GND_SD 7 7
R455 6
15 CLK_PCI_DEBUG 6
2.2K_0402_5% 5
+5VS 5
CB714_LFBGA169 5IN1@ PCI_RST# 4
D3
H2
L4
M8
K11
F12
C10
B6

5IN1@ PCI_FRAME# 4
3
1

3
2 2
**CB714 use B0 version PCI_AD9 1 1
ACES_85201-2005
A A

Place under MiniPCI Socket

Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ENE CB714
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 28, 2006 Sheet 22 of 44
5 4 3 2 1
 5 4 3 2 1

JP8
1 GND
35 GND
S1_D3 2
S1_CD1# DATA3
22 S1_CD1# 36 CD1#
S1_D4 3
S1_D11 DATA4
37 DATA11
S1_D5 4
S1_D12 DATA5
38 DATA12
+S1_VCC S1_D6 5
PCMCIA Power Control S1_D13
S1_D7
39
6
DATA6
DATA13
S1_D14 DATA7
1 1 40 DATA14
D +S1_VCC C627 C628 S1_CE1# 7 D
22 S1_CE1# S1_D15 CE1#
41 DATA15
10U_0805_10V4Z 0.1U_0402_16V4Z S1_A10 8
2 2 S1_CE2# ADD10
U32
40mil 22 S1_CE2# S1_OE#
42 CE2#
22 S1_OE# 9 OE#
13 S1_VS1 43
VCC 22 S1_VS1 S1_A11 VS1#
VCC 12 10 ADD11
9 11 S1_IORD# 44
12V VCC +S1_VPP 22 S1_IORD# S1_A9 IORD#
11 ADD9
40mil S1_IOWR# 45
+5VS +S1_VPP 22 S1_IOWR# S1_A8 IOWR#
12 ADD8
W=40mil 1 S1_A17 46
S1_A13 ADD17
VPP 10 13 ADD13
1 1 C629 1 1 S1_A18 47
C630 0.1U_0402_16V4Z C632 C633 S1_A14 ADD18
5 5V 14 ADD14
C631 2 S1_A19
6 5V 48 ADD19
10U_0805_10V4Z 0.1U_0402_16V4Z S1_A[0..25] S1_WE# 15
2 2 2 2 22 S1_A[0..25] 22 S1_WE# WE#
0.1U_0402_16V4Z 1 VCCD0# 10U_0805_10V4Z S1_A20 49
VCCD0 VCCD0# 22 S1_D[0..15] ADD20
2 VCCD1# 22 S1_D[0..15] S1_RDY# 16
+3VS VCCD1 VCCD1# 22 22 S1_RDY# READY
15 VPPD0 S1_A21 50
VPPD0 VPPD0 22 ADD21
14 VPPD1 +S1_VCC 17
VPPD1 VPPD1 22 VCC
W=40mil +S1_VCC 51 VCC
3 3.3V +S1_VPP 18 VPP
1 1 4 3.3V OC 8 +S1_VPP 52 VPP
SHDN

C634 C635 S1_A16 19

GND

S1_A22 ADD16
53 ADD22
10U_0805_10V4Z S1_A15 20 ADD15
1

2 2
0.1U_0402_16V4Z CP2211FD3_SSOP16 S1_OE# S1_A23
1 2 +S1_VCC 54
7

16

R457 R456 43K_0402_5% S1_A12 ADD23

21 ADD12
10K_0402_5% S1_WP 2 1 S1_A24 55
+S1_VCC ADD24
R458 43K_0402_5% S1_A7 22
S1_RST S1_A25 ADD7
1 2 +S1_VCC 56
2

C R460 0_0402_5% R459 43K_0402_5% S1_A6 ADD25 C

23 ADD6
2 1 S1_CE1# 1 2 +S1_VCC S1_VS2 57
PCM_DISABLE# 20 22 S1_VS2 VS2#
R461 43K_0402_5% S1_A5 24
S1_CE2# S1_RST ADD5
1 2 +S1_VCC 22 S1_RST 58 RESET
R462 43K_0402_5% S1_A4 25
VCCD0# S1_WAIT# ADD4
1 2 22 S1_WAIT# 59 WAIT#
R463 10K_0402_5% S1_A3 26
VCCD1# S1_INPACK# ADD3
1 2 22 S1_INPACK# 60 INPACK#
R464 10K_0402_5% S1_A2 27
S1_REG# ADD2
22 S1_REG# 61 REG#
S1_A1 28
S1_BVD2 ADD1
22 S1_BVD2 62 BVD2
+VCC_SD S1_A0 29
S1_BVD1 ADD0
22 S1_BVD1 63 BVD1
S1_D0 30
S1_D8 DATA0
1 1 1 64
SD/MS Power Control C636 C637 C638
0.1U_0402_16V4Z
S1_D1
S1_D9
31
65
DATA8
DATA1
69
XD Power Control 10U_0805_10V4Z 0.1U_0402_16V4Z
5IN1@ 2 2
5IN1@ 2
5IN1@ S1_D2
S1_D10
32
66
DATA9 GND
DATA2 GND 70

S1_WP DATA10
22 S1_WP 33 WP
+3VS S1_CD2# 67
+3VS 22 S1_CD2# CD2#
40mil 34 GND
xD PU and PD. Close to Socket 68 GND
2

+3VS +VCC_XD
2

R465 +3VS +VCC_XD SANTA_130606-1_LT

R466 U33
5IN1@ 10K_0402_5% 1 8 5IN1@ 10K_0402_5% 2 1 XD_CD#
GND OUT R467 @ 43K_0402_5%
2 7 1 1
1

IN OUT C639 C664

3 6
1

XD_PWREN# IN OUT SDOC# +VCC_XD 0.1U_0402_16V4Z

4 5
22 XD_PWREN# EN# FLG SDOC# 22
5IN1@ 6 IN 1 Socket
1

B G528_SO8 2
10U_0805_10V4Z 2 B
(HDQ70)
1

5IN1@ R468 1 2 MSCLK_XDRE# 5IN1@ JP10

R470 R469 5IN1@ 2.2K_0402_5% +VCC_XD 41 15 +VCC_SD
0_0402_5% 470_0805_5% SDCK_XDWE# XD-VCC SD-VCC
1 2 MS-VCC 9
5IN1@ 5IN1@ R471 5IN1@ 2.2K_0402_5% SDDA1_XDD0 33
22 SDDA1_XDD0
1 2

XD_CE# MSBS_XDD1 XD-D0 SDCK_XDWE#

1 2 22 MSBS_XDD1 34 4 IN 1 CONN 16
2

D R472 5IN1@ 2.2K_0402_5% MSD0_XDD2 XD-D1 SD_CLK SDDA0_XDD7

22 MSD0_XDD2 35 XD-D2 SD-DAT0 19
SD_PWREN# XD_PWREN# 2 Q42 1 2 XD_BSY# MSD3_XDD3 36 20 SDDA1_XDD0
22 SD_PWREN# 22 MSD3_XDD3 XD-D3 SD-DAT1
G 2N7002_SOT23 R473 5IN1@ 2.2K_0402_5% SDDA3_XDD4 37 11 SDDA2_XDCL
22 SDDA3_XDD4 XD-D4 SD-DAT2
S 5IN1@ MSD2_XDD5 38 12 SDDA3_XDD4
22 MS_PWREN# 22 MSD2_XDD5
3

MSD1_XDD6 XD-D5 SD-DAT3 SDCM_XDALE

22 MSD1_XDD6 39 XD-D6 SD-CMD 13
SDDA0_XDD7 40 21 SD_CD#
22 SDDA0_XDD7 XD-D7 SD-CD-SW SD_CD# 22
SD-CD-COM 22
SDCK_XDWE# 30 43 SD_WP#
22 SDCK_XDWE# XD-WE SD-WP-SW SD_WP# 22
XD_WP# 31 44
22 XD_WP# XD-WP SD-WP-COM
Reserve for SD,MS CLK. SDCM_XDALE 29
22 SDCM_XDALE XD-ALE
XD_CD# 23 8 MSCLK_XDRE#
Close to Socket 22 XD_CD# XD-CD MS-SCLK
XD_BSY# 25 4 MSD0_XDD2
22 XD_BSY# XD-R/B MS-DATA0
+VCC_XD 1 2 +VCC_SD MSCLK_XDRE# 26 3 MSD1_XDD6
22 MSCLK_XDRE# XD-RE MS-DATA1
R474 0_0603_5% SDCK_XDWE# 1 2 XD_CE# 27 5 MSD2_XDD5
22 XD_CE# XD-CE MS-DATA2
5IN1@ C640 10P_0402_25V8K 5IN1@ SDDA2_XDCL 28 7 MSD3_XDD3
22 SDDA2_XDCL XD-CLE MS-DATA3
6 MS_INS#
MS-INS MS_INS# 22
MSCLK_XDRE#1 2 32 2 MSBS_XDD1
C641 10P_0402_25V8K 5IN1@ XD-GND MS-BS
24 XD-GND SD-GND 14
18 N.C. SD-GND 17
42 N.C. MS-GND 1
MS-GND 10
45 SHIELD GND
46 SHIELD GND
5IN1@ TAITW_R012-210-LR

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCMCIA& 4in1 socket
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 28, 2006 Sheet 23 of 44
5 4 3 2 1
 5 4 3 2 1

+3VS +2.5VS_1394

1 1 1 1 1 1 1 1 1 1 1 1
C642 C643 C644 C645 C646 C693 C647 C648 C649 C650 C651 C694
22U_0805_6.3V6M
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z 22U_0805_6.3V6M
2 2 2 2 2 2 2 2 2 2 2 2 +3VS

U34
1 A0 VCC 8
D 2 A1 WP 7 D
3 6 EECK
A2 SCL

1
+2.5VS_1394 +3VS 4 5 EEDI
L35 GND SDA R475
30mils MBK1608301YZF_0603 @ AT24C02N-10SU-2.7_SO8 @ 510_0402_5%
+1394_PLLVDD 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2 +3VS
1 1 1 1 1

2
C652 C653 C654 C655 C695 EECK and EEDI is pull high internal
External pull high circuit is unnecessary
22U_0805_6.3V6M

111

122
110
U35 2 2 2 2 2

46
30
21

99
36
17

87
86
73
72
62
59
5
0.1U_0402_16V4Z 10U_0805_10V4Z When use external EEPROM

VDD4
VDD3
VDD2
VDD1
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1

PVA5
PVA4
PVA3
PVA2
PVA1
PVA0
Populate U33, R763, R766
Un-populate R764
+3VS

PCI_AD31 94
VT6311S EECS 26
27
EECS 1 R476 2
4.7K_0402_5%
PCI_AD30 AD31 EEDO EEDI
PCI_AD29
95
96
AD30
AD29
EEPROM SDA/EEDI
SCL/EECK
28
29 EECK
PCI_AD[0..31] PCI_AD28 97
18,22 PCI_AD[0..31] PCI_AD27 AD28 C656 1U_0402_6.3V4Z
98 AD27 PHYRST# 55 1 2
PCI_CBE#[0..3] PCI_AD26 101 81 R477 1 2 @ 4.7K_0402_5%
18,22 PCI_CBE#[0..3] AD26 BJT_CTL +3VS
PCI_AD25 102 43 I2CEEN R478 1 2 @ 4.7K_0402_5% +3VS
PCI_AD24 AD25 I2CEN R479 1 4.7K_0402_5%
103 AD24 PWRDET 32 2
PCI_AD23 C657 1 0.1U_0402_16V4Z
PCI_AD22
106
107
AD23
AD22
others REG_FB 84 REG_FB
2

3
C PCI_AD21 109 E Q43 C
PCI_AD20 AD21 REG_OUT REG_OUT
113 AD20 REG_OUT 85 2
PCI_AD19 114 C658 B @ 2SB1197K_SOT23
PCI_AD18 AD19 R480 1 1K_0402_5% 10P_0402_50V8K C
115 60 2

1
PCI_AD17 AD18 XCPS XREXT R481 1 6.19K_0603_1%
116 AD17 XREXT 63 2 1 2
PCI_AD16 117 10mils C659 1 2 47P_0402_50V8J
AD16

2
PCI_AD15 2 57 1394_XI X3 REG_FB 40mil +2.5VS_1394
PCI_AD14 AD15 XI
PCI_AD13
3
4
AD14
AD13
OSCILLATOR XO 58 1394_XO 24.576MHZ_16P_X8A024576FG1H When use external BJT
PCI_AD12 7 Populate Q58, R765

1
PCI_AD11 AD12 TPB0-
8 AD11 XTPB0M 67 1 2
PCI_AD10 9 68 TPB0+
PCI_AD9 AD10 XTPB0P TPA0- C660
PCI_AD8
10
11
AD9
AD8
PHY PORT0XTPA0M
XTPA0P
69
70 TPA0+ 10P_0402_50V8K
IDSEL:PCI_AD16 PCI_AD7 14 71 TPBIAS0
PCI_AD6 15
AD7
AD6
PCI I/F XTPBIAS0
PCI_AD16 1 2 1394_IDSEL PCI_AD5 16 74
R482 100_0402_5% PCI_AD4 AD5 XTPB1M
18 AD4 XTPB1P 75
PCI_AD3 15mils 0.33U_0603_10V7K
PCI_AD2
19
20
AD3
AD2
PHY PORT1 XTPA1M
XTPA1P
76
77
PCI_AD1 24 78
PCI_AD0 AD1 XTPBIAS1
25 AD0 1

1
PCI_CBE#3 104 83 C661
PCI_CBE#2 CBE3# NC17 R483 R484 WCM2012F2S-900T04_0805
119 CBE2# NC16 82
PCI_CBE#1 1 64 54.9_0402_1% 54.9_0402_1% 4 3
PCI_CBE#0 CBE1# NC15 2 4 3
12 CBE0# NC14 54
PCI_STOP# 125 53
18,22 PCI_STOP#

2
PCI_PERR# STOP# NC13 TPBIAS0 TYCO_1470383-2
18,22 PCI_PERR# 127 PERR# NC12 52 1 1 2 2
PCI_PAR 128 51 TPA0+ TPA0+_R 4
B 18,22 PCI_PAR PAR NC11 L39 4 B
PCI_PIRQA# 88 50 TPA0- TPA0-_R 3 3 G 6
18 PCI_PIRQE# INTA# NC10
89 49 TPB0+ TPB0+_R 2 2 G 5
18,22,30,31,33 PCI_RST# PCIRST# NC9
CLK_PCI_1394 90 48 TPB0- L40 TPB0-_R 1 1
15 CLK_PCI_1394 PCICLK NC8
PCI_GNT#0 92 45 1 2
18 PCI_GNT0# GNT# NC7 1 2

1
PCI_REQ#0 93 44 JP20
18 PCI_REQ0# REQ# NC6
1394_IDSEL 105 42 R485 R486
IDSEL NC5 54.9_0402_1% 54.9_0402_1%
34 PME# NC4 41 4 4 3 3
P CI_IRDY# 121 40
18,22 PCI_IRDY# IRDY# NC3
PCI_TRDY# 123 39 WCM2012F2S-900T04_0805
18,22 PCI_TRDY#

2
PCI_DEVSEL# TRDY# NC2
18,22 PCI_DEVSEL# 124 DEVSEL# NC1 37
PCI_FRAME# 120 35
18,22 PCI_FRAME# FRAME# NC0

1
GNDARX1

GNDARX2
GNDATX1

GNDATX2

1
C662 R488
GND19
GND18
GND17
GND16
GND15
GND10
GND9
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND1
GND0

270P_0402_50V7K 4.99K_0402_1%
CLK_PCI_1394
2

2
1

VT6311S_LQFP128
66
65
80
79
118
112
108
100
91
61
56
47
38
33
31
23
22
6
13
126

R489
@ 10_0402_5%
2

1
C663

@ 10P_0402_50V8K
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IEEE1394 VIA VT6311S
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B HTW20 M/B LA-3171P 1.0

WWW.AliSaler.Com
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 28, 2006 Sheet 24 of 44
5 4 3 2 1
 5 4 3 2 1

+3VS
Imax = 1.35A

1 1
D C366 C359 D

10U_0805_6.3V6M
NEWCARD@ 2
0.1U_0402_16V4Z
2 NEWCARD@ New Card Connector
JP9
15,20 ICH_SMBCLK 16 16 1 1 CLK_PCIE_CARD 15
15,20 ICH_SMBDATA 17 17 2 2 CLK_PCIE_CARD# 15
18 18 3 3
+1.5VS 19 19 4 4 USB20_P6 20
20 20 5 5 USB20_N6 20
+3VALW 21 21 6 6
+3VALW 22 7
22 7 PCIE_ITX_C_PRX_P1 20
Imax = 0.275A +3VS 23 23 8 8 PCIE_ITX_C_PRX_N1 20
24 24 9 9
25 25 10 10 PCIE_PTX_C_IRX_N1 20
1 1 26 26 11 11 PCIE_PTX_C_IRX_P1 20
C357 C353 27 12
7,17,18,20,26,27 PLT_RST# 27 12
20,26 PCIE_WAKE# 28 28 13 13 SYSON 29,31,33,39
10U_0805_6.3V6M 0.1U_0402_16V4Z 29 14 SUSP# 17,29,31,32,34,39,40
20 EXP_CPPE# 29 14
NEWCARD@ 2 2 NEWCARD@
30 15
15 PCIEC_CLKREQ# 30 15
NEWCARD@
SUYIN_200135FA030S200ZU

60milsImax = 1.35A
+1.5VS
Imax = 0.75A 40mil Imax = 0.275A
C C
C342
1 1
C351
40mil Imax = 0.75A

10U_0805_6.3V6M 0.1U_0402_16V4Z
NEWCARD@ 2 2 NEWCARD@

B
Mini-Express Card +1.5VS +3VS
B
+3VALW ***
+3VS +1.5VS R422 0_0402_5% JP24
20,26 PCIE_WAKE# 2 1 1 1 2 2
32 WLAN_BT_DATA 3 3 4 4
32 WLAN_BT_CLK 5 5 6 6
1 1 1 1 1 1 1 15 MINI_CLKREQ# MINI_CLKREQ# 7 8
C262 C575 C327 C326 C572 C275 7 8
9 9 10 10
C570 CLK_PCIE_MCARD# 11 12
15 CLK_PCIE_MCARD# 11 12
0.01U_0402_16V7K 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.01U_0402_16V7K 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z CLK_PCIE_MCARD 13 14
2 2 2 2 2 2 2 15 CLK_PCIE_MCARD 13 14
WLAN@ 15 16
15 16
17 17 18 18
WLAN@ WLAN@ WLAN@ WLAN@ WLAN@ WLAN@ 19 20 XMIT_OFF#
19 20 PLT_RST#
21 21 22 22 PLT_RST# 7,17,18,20,26,27
20 PCIE_PTX_C_IRX_N2 23 23 24 24 +3VALW
20 PCIE_PTX_C_IRX_P2 25 25 26 26
27 27 28 28
29 29 30 30 ICH_SMBCLK 15,20
20 PCIE_ITX_C_PRX_N2 31 31 32 32 ICH_SMBDATA 15,20
20 PCIE_ITX_C_PRX_P2 33 33 34 34
35 35 36 36 USB20_N1 20
37 37 38 38 USB20_P1 20
+3VALW 39 39 40 40
41 41 42 42
43 43 44 44
45 45 46 46
14

47 47 48 48
U20D 49 50
WL_OFF# D33 49 50
12 51 52
P

31 WL_OFF# A 51 52
O 11 1 2 XMIT_OFF#
KILL_SW# 13 RB751V_SOD323 WLAN@ 53 54
31,32,33 KILL_SW# B GND1 GND2
G

SN74LVC08APW_TSSOP14
7

A FOX_AS0B226-S40N-7F~D A
WLAN@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MiniCard Conn &NewCard/B Conn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HTW20 M/B LA-3171P
Date: Friday, April 28, 2006 Sheet 25 of 44
5 4 3 2 1
 5 4 3 2 1

1 2 +3VALW
R33 +3VALW
3.6K_0402_5%
U5
U4
C85 1 2 0.1U_0402_16V4Z PCIE_PTX_IRX_P3 29 45 4 5 2
20 PCIE_PTX_C_IRX_P3 HSOP EEDO DO GND
47 3 6 C44 2 2 2 2 2
C86 EDDI/AUX DI NC
20 PCIE_PTX_C_IRX_N3 1 2 0.1U_0402_16V4Z PCIE_PTX_IRX_N3 30 HSON EESK 48 2 SK NC 7 C87 C76 C51 C465 C63
EECS 44 1 CS VCC 8 +3VALW
1
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
20 PCIE_ITX_C_PRX_P3 23 HSIP AT93C46-10SI-2.7_SO8 1 1 1 1 1
20 PCIE_ITX_C_PRX_N3 24 HSIN
LED3 54
D D
LED2 55
26 56 LAN_LINK#
15 CLK_PCIE_LAN REFCLK_P LED1
57 LAN_ACTIVITY#
LED0
15 CLK_PCIE_LAN# 27 REFCLK_N +LAN_VDD18
20 3 LAN_MDI0+
7,17,18,20,25,27 PLT_RST# PERSTB MDIP0
4 LAN_MDI0- L12
MDIN0 LAN_MDI1+ AVDD18
MDIP1 6 1 2
LAN_CTRL18 1 7 LAN_MDI1- BLM18AG601SN1D_0603
VCTRL18 MDIN1
2 2 2 2 2 2
LAN_CTRL15 63 9 LAN_MDI2+ C470 C474 C69 C475 C479 C93
VCTRL15 MDIP2 LAN_MDI2-
MDIN2 10
1 2 64 12 LAN_MDI3+ 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
R285 2K_0402_1% RSET MDIP3 LAN_MDI3- 1 1 1 1 1 1
31 EC_PME# 1 2 MDIN3 13
R415 0_0402_5%
20,25 PCIE_WAKE# 1 2 19 LANWAKEB
R416 @ 0_0402_5% 15 +LAN_VDD15
VDD15
VDD15 21
+3VS R300 1 2 1K_0402_1% 36 32
ISOLATEB VDD15
VDD15 33
38 +LAN_VDD15
LAN_X1 VDD15
60 CKXTAL1 VDD15 41
R301 43
LAN_X2 VDD15
61 CKXTAL2 VDD15 49
15K_0402_5% 52
VDD15
VDD15 58 2 2 2 2 2 2
62 C82 C464 C466 C52 C75 C486
GVDD
1 2 16 +3VALW 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
C50 VDD33 +3VALW 1 1 1 1 1 1
65 EXPOSE_PAD VDD33 37
C48 53 L6
1U_0603_10V4Z VDD33 AVDD33
0.1U_0402_16V4Z 25 EGND VDD33 46 1 2
C 2 1 BLM18AG601SN1D_0603 C
1 2
31 2 AVDD33 C49 C46
EGND AVDD33 +3VALW +3VALW
59 10U_0805_10V4Z 0.1U_0402_16V4Z
AVDD33 2 1
Y1
LAN_X1 LAN_X2 17 NC AVDD18
18 NC AVDD18 5

1
25MHZ_20P_6X25000017
1
35
34
NC AVDD18 8
11
Mount for 8111B & 8100E
C45 C47 NC AVDD18
39 NC AVDD18 14

3
40 NC
27P_0402_50V8J 27P_0402_50V8J 42
2 2 NC LAN_CTRL18 Q4 LAN_CTRL15 Q3
50 NC EVDD18 22 +LAN_VDD18 1 1
51 40mil MMJT9435T1G_SOT223 40mil MMJT9435T1G_SOT223
NC 1000M@ 1000M@
EVDD18 28

2
4

2
4
RTL8111B_QFN64 1000M@
L13 100M@ 40mil L11 100M@ 40mil
Mount for 8101E 1 2 1 2
+LAN_VDD18 +LAN_VDD15
1 BLM18AG601SN1D_0603 1 2 1 BLM18AG601SN1D_0603 1 2
C100 C106 C71 C72
Place Close to Chip C102 C61
100M@ 10U_0805_10V4Z 22U_0805_6.3V6M 0.1U_0402_16V4Z 10U_0805_10V4Z 22U_0805_6.3V6M 0.1U_0402_16V4Z
+LAN_VDD18 100M@ R15 2 1 49.9_0402_1% LAN_MDI0- 100M@ 2 2 1 100M@ 2 2 1
C30 2 1 R14 2 1 49.9_0402_1% LAN_MDI0+

0.01U_0402_16V7K 100M@ Mount for 8101E Mount for 8101E

100M@
1

100M@ R17 2 1 49.9_0402_1% LAN_MDI1-

100M@ 100M@ C31 2 1 R16 2 1 49.9_0402_1% LAN_MDI1+
B R11 R10 B
0_0402_5% 0_0402_5% 0.01U_0402_16V7K 100M@ LAN Conn.
Place Close to Chip
2

JP11
+3VALWP 12 Amber LED+
U30 LAN_ACTIVITY# 2 1 300_0402_5% 11
R256 Amber LED-
1 SHLD2 16
1 24 RJ45_MIDI3- 8
LAN_MDI3- TCT1 MCT1 RJ45_MIDI3- 68P_0402_50V8K C696 PR4-
2 TD1+ MX1+ 23 SHLD1 15
LAN_MDI3+ 3 22 RJ45_MIDI3+ RJ45_MIDI3+ 7
TD1- MX1- 2 PR4+
4 21 RJ45_MIDI1- 6
LAN_MDI2- TCT2 MCT2 RJ45_MIDI2- PR2-
5 TD2+ MX2+ 20
LAN_MDI2+ 6 19 RJ45_MIDI2+ RJ45_MIDI2- 5
TD2- MX2- PR3-
7 18 RJ45_MIDI2+ 4
LAN_MDI1- TCT3 MCT3 RJ45_MIDI1- PR3+
8 TD3+ MX3+ 17
LAN_MDI1+ 9 16 RJ45_MIDI1+ RJ45_MIDI1+ 3
TD3- MX3- PR2+
10 15 2 RJ45_MIDI0- 2
LAN_MDI0- TCT4 MCT4 RJ45_MIDI0- PR1-
11 TD4+ MX4+ 14 SHLD2 14
LAN_MDI0+ 12 13 RJ45_MIDI0+ 68P_0402_50V8K C697 RJ45_MIDI0+ 1
TD4- MX4- PR1+
SHLD1 13
LAN_LINK# 1
2 1 10 Green LED-
1

1 1 R257 300_0402_5%
0.5u_GST5009 R261 R260 9
C28 C26 1000M@ +3VALWP Green LED+
0.01U_0402_16V7K 0.01U_0402_16V7K 75_0402_1% 75_0402_1% C3 TYCO_3-440470-4
1

2 2 RJ45_GND LANGND
1 1 1 2
2

R259 R258 1 1
A C25 C27 1000P_1206_2KV7K C4 C5 A
0.01U_0402_16V7K 0.01U_0402_16V7K 75_0402_1% 75_0402_1%
2 2 0.1U_0402_16V4Z 4.7U_0805_10V4Z
2

RJ45_GND 2 2

Place these components

colsed to LAN chip
Security Classification Compal Secret Data
Title
Compal Electronics, Inc.
GST5009 for GIGA LAN Issued Date 2006/04/22 Deciphered Date 2009/04/22
RTL8111B/8101E 10/100/1000 LAN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TST1284 for 10/100 LAN AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS CustomHTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 26 of 44
5 4 3 2 1
 A B C D E

1 1

+3VALW

MDC 1.5 Conn.

1 1 1
+3VALW C314 C315 C313
JP25 TYCO_1-1775149-2~D +3VALW
1000P_0402_50V7K @ 4.7U_0805_10V4Z
2 2 2

14
1 GND1 RES0 2
U20B 19 ACZ_SDOUT_MDC ACZ_SDOUT_MDC 3 4 0.1U_0402_16V4Z
IAC_SDATA_OUT RES1
4 5 6

P
20 MDC_RST# A GND2 3.3V
6 MDC_RESET# 19 ACZ_SYNC_MDC ACZ_SYNC_MDC 7 8
ACZ_RST#_MDC O R209 1 ACZ_SDIN1_MDC IAC_SYNC GND3
19 ACZ_RST#_MDC 5 B 19 ACZ_SDIN1 2 9 IAC_SDATA_IN GND4 10

G
33_0402_5% MDC_RESET# 11 12 ACZ_BITCLK_MDC ACZ_BITCLK_MDC 19
SN74LVC08APW_TSSOP14 IAC_RESET# IAC_BITCLK
R419 C592

7
2 1 1 2

GND
GND
GND
GND
GND
GND
R386 0_0402_5% @ 10_0402_5% @ 10P_0402_50V8K

13
14
15
16
17
18
@

Connector for MDC Rev1.5

2 2

TPM1.2 on board
+3VALW +3VS

0.1U_0402_16V4Z
3 3
1 2 2 2
C336 C338 C309 C312
0.1U_0402_16V4Z
TPM@ TPM@ TPM@
2 1 1 1 TPM@
0.1U_0402_16V4Z
10
19
24

U18
5VSB

VDD
VDD
VDD

26 LPC_AD0 LPC_AD0 19,30,31,33

LAD0 LPC_AD1
LAD1 23 LPC_AD1 19,30,31,33
20 LPC_AD2 LPC_AD2 19,30,31,33
+3VS LAD2 LPC_AD3
6 GPIO LAD3 17 LPC_AD3 19,30,31,33
2 22 LPC_FRAME#
GPIO2 LFRAME# LPC_FRAME# 19,30,31,33
16 PLT_RST#
LRESET# PLT_RST# 7,17,18,20,25,26
1

28 SUS_STAT#
LPCPD# SUS_STAT# 20
R377 27 SIRQ TPM@ C348
SERIRQ SIRQ 20,22,30,31,33
21 CLK_PCI_TPM TPM_XTALI 1 2 18P_0402_50V8J
LCLK CLK_PCI_TPM 15
4.7K_0402_5%

1
TPM@ S L B 9 6 3 5 T T 1.2 32.768KHZ_12.5P_1TJS125BJ2A251
2

8 15 PM_CLKRUN# CLK_PCI_TPM R216 1

TEST1 CLKRUN# PM_CLKRUN# 20
10M_0402_5% IN NC 2
9 TESTB1/BADD R380 TPM@ 4 3
OUT NC TPM@
1

7 2 1 +3VS

2
PP
1

R378 R379 @ 4.7K_0402_5% Y5

@ 4.7K_0402_5% 0_0402_5% 3 R376 TPM_XTALO 1 2
TPM@ NC TPM_XTALO
12 NC XTALO 14 10_0402_5%
1 @ C341 18P_0402_50V8J
2

NC TPM_XTALI TPM@
13
2

XTALI/32K IN
1
GND
GND
GND
GND

C573
15P_0402_50V8J
4 Base I/O Address TPM@ SLB 9635 TT 1.2_TSSOP28 2 4
@
4
11
18
25

0 = 02Eh
* 1 = 04Eh

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TPM/G Accelerometer senser
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 27 of 44
A B C D E
 A B C D E F G H

HD Audio Codec
+3VS_DVDD
L34
0.1U_0402_16V4Z 10U_0805_10V4Z 680P_0603_50V8J 1 2 +3VS
+AVDD_AC97 FBM-L11-160808-800LMT_0603
20mil 1
C374
1
C373
1
C370 C606 C607
1
C699
L24 1 2 0.1U_0402_16V4Z 680P_0603_50V8J 40mil +VDDA
+VDDA 2 2 2 2
FBM-L11-160808-800LMT_0603 1 1 1 1
1 C386 C382 C669 C700 1

1
C391 0.1U_0402_16V4Z 680P_0603_50V8J 100P_0402_50V8J
10U_0805_10V4Z R245

25

38

9
2 2 2 2 U38 10K_0402_5%
0.1U_0402_16V4Z 100P_0402_50V8J 1 1

AVDD1

AVDD2

DVDD1

DVDD2
C388 C389

2
10P_0402_50V8K 10P_0402_50V8K 1 2
AMP_LEFT_HP 2 2
29 AMP_LEFT_HP 2 1 LEFT_HP 14 LINE2_L FRONT_OUT_L 35 AMP_LEFT
AMP_LEFT 29
C377 1U_0603_10V4Z

1
R533 @ 0_0402_5%
AMP_RIGHT_HP 2 1 RIGHT_HP 15 36 AMP_RIGHT R239
29 AMP_RIGHT_HP
R534 @ 0_0402_5% LINE2_R FRONT_OUT_R AMP_RIGHT 29 EC Beep 10K_0402_5%
16 MIC2_L SURR_OUT_L 39 R236
C367 1 2 1 2
31 BEEP#

2
1 2 17 41 1U_0603_10V4Z 560_0402_5% C371
C702 MIC2_R SURR_OUT_R MONO_IN
1 2
1U_0603_10V4Z 23 45
LINE1_L SIDESURR_OUT_L R514 1U_0603_10V4Z
CardBus Beep

1
1 2 24 46 2 1 C 1 2
C703 LINE1_R SIDESURR_OUT_R @ 0_0402_5% C369 1 R235
22 PCM_SPK 2NSE_DPR1 1 2 2 Q23
R238
100P_0402_50V8J 18 43 1U_0603_10V4Z 560_0402_5% B 2SC2411K_SC59 2.4K_0402_5%
CD_L CEN_OUT R418 C591 E
2

3
20 CD_R LFE_OUT 44 2 1 1 2
C368
1 2 100P_0402_50V8J 19 CD_GND
@ 10_0402_5% @ 10P_0402_50V8K 0.01U_0402_16V7K
C704 1
BIT_CLK 6 ICH_BITCLK_AUDIO 19
MIC1_L 1 2 1U_0603_10V4Z MIC1_C_L 21
29 MIC1_L MIC1_L
C379
MIC1_R 1 2 1U_0603_10V4Z MIC1_C_R 22 8 R237 1 2 33_0402_5%
29 MIC1_R
C381 MIC1_R SDATA_IN ICH_AC_SDIN0 19
PCI Beep R240
1 2 100P_0402_50V8J MONO_IN 12 37 C375 1 2 1 2
C705 PCBEEP NC 20 SB_SPKR 1U_0603_10V4Z 560_0402_5%

1
2 2
1 2 100P_0402_50V8J NC 29 D17
C706 11
19 ICH_RST_AUDIO# RESET#
31 R241
LINE2_VREFO 10K_0402_5% RB751V_SOD323
19 ICH_SYNC_AUDIO 10 SYNC
28 10mil +MIC1_VREFO_L

2
MIC1_VREFO_L
19 ICH_SDOUT_AUDIO 5 SDATA_OUT
2
MIC1_VREFO_R 32 10mil +MIC1_VREFO_R
GPIO0
3 GPIO1 MIC2_VREFO 30
SENSE_A
SENSE_B
13
34
SENSE A
27 ACZ_VREF 10mil 10U_0805_10V4Z
SENSE B VREF +MIC1_VREFO_R NSE_DPR1
1 1 100P_0402_50V8J
47 40 ACZ_JDREF 5.1K_0402_1% C390
31 EAPD EAPD JDREF C707 100P_0402_50V8J

1
48 SPDIFO NC 33 1 1
C708 2 2 C673 C709 C674
4 26 R246
DVSS1 AVSS1

1
100P_0402_50V8J D
7 DVSS2 AVSS2 42
2 2
31 NSE_DPR 2

2
ALC861-GR REV D_LQFP48 G
Q61 S

3
0.1U_0402_16V4Z 4.7U_0805_10V4Z 2N7002_SOT23
DGND AGND Change R246 from 5.1Kto 20K_0402_1%

1
R528 C
+MIC1_VREFO_L +S1_VCC 2 Q62
+5VS B MMBT3904_SOT23
1 2 2 1 SENSE_A 100P_0402_50V8J 2.2K_0402_5% E

3
R498 20K_0402_1% R507 47_0402_5% 1
2

C675 C710 C676

R499
2 Sense Pin Impedance Codec Signals
100K_0402_5% C672
3 2 3
1000P_0402_50V7K 39.2K PORT-A (PIN 39, 41)
1

D Q44 1
1

29 MIC_SENSE 2
G 20K PORT-B (PIN 21, 22) 0.1U_0402_16V4Z 4.7U_0805_10V4Z
S SENSE A
3

2N7002_SOT23
Change R507 to 0_0402_5% 10K PORT-C (PIN 23, 24)
Delete C672
5.1K PORT-D (PIN 35, 36)
for ALC861 ver. D
+5VS
39.2K PORT-E (PIN 14, 15)
R250
2

2 1 1 2 SENSE_B 20K PORT-F (PIN 16, 17)

R252 R253 39.2K_0402_1% SENSE B
100K_0402_5% 2 47_0402_5%
10K PORT-G (PIN 43, 44)
1

D C394
1

29,31 NBA_PLUG 2 1000P_0402_50V7K

G 1
Q25
5.1K PORT-H (PIN 45, 46)
S
3

2N7002_SOT23
Change R250 to 0_0402_5%
Delete C394
for ALC861 ver. D

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD Audio Codec ALC861D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HTW20 M/B LA-3171P
Date: Friday, April 28, 2006 Sheet 28 of 44
A B C D E F G H
 A B C D E

+5VS
Speaker AMP
+MIC1_VREFO_R
2

+MIC1_VREFO_L
MICROPHONE
R515 +5VS
10mil 10mil IN JACK

1
10K_0402_5% W=40mil

1
@ 1U_0603_10V4Z
R249
1

1 2 1 R248 4.7K_0402_5% JP29

VOLMAX C679 4.7K_0402_5% 5

2
C677 C678

2
1

0.1U_0402_16V4Z 10U_0805_10V4Z 4
2 1 2 28 MIC_SENSE
R517 8
0_0402_5% MIC1_R 1 2 L21 MIC1_R_1 3
1 28 MIC1_R 1
FBM-11-160808-700T_0603 6
MIC1_L 1 2 L20 MIC1_L_1 2 7
28 MIC1_L
2

FBM-11-160808-700T_0603 1

2
U39 1 1
10 1 EC_EAPD FOX_JA6033L-5S1-TR
VDD MUTE SHUTDOWN# C392 C393 @ AGND
15 VDD SHUTDOWN# 2 2 1 +5VS

1
fo=1/(2*3.14*R*C)=106Hz 220P_0402_50V7K 220P_0402_50V7K
INTSPK_L2 R519 100K_0402_5% 2 2 PJ16 PJ17
R=1.5K / C= 1uF 9

1
VOL_AMP LOUT- SM05_SOT23
7 JUMP_43X39 JUMP_43X39

1
R520 1.5K_0402_5% VOLUME INTSPK_R2 D38
ROUT- 16 @ @

2
1 2 VOLMAX 8
R521 1.5K_0402_5% VOLMAX INTSPK_L1
11

2
NBA_PLUG LOUT+
1 2 13 SE/BTL#
14 INTSPK_R1
AMP_L AMP_LIN ROUT+
28 AMP_LEFT 1 2 1 2 6 LIN-
C681 1U_0603_10V4Z C682 1U_0603_10V4Z AMP_RIN 3
AMP_R RIN-
28 AMP_RIGHT 1
C683
2
1U_0603_10V4Z
1
C684
2
1U_0603_10V4Z GND 5 Microsoft Audio Hardware Design, Section "Analog
4 BYPASS GND 12
1 Audio Classification Using Device Impedance"
APA2068KAI-TRL_SOP16
C685
recommand Audio Device Impedance:
2.2U_0805_16V4Z
2
Headset : 32 ~100Ohm (C > 248UF) HEADPHONE
Paassive Speakers: 4 ~ 16Ohm (C >1989UF) OUT JACK
JP28
Active Speakers: 3K ~ 15K Ohm (C >2.65UF) 5

Headphone AMP (Reserved) +3VS @ 0.1U_0402_16V4Z @ BLM18AG601SN1D_0603

28,31 NBA_PLUG 4
8
1 2 +3VS AMP_RIGHT_HP 1 2 HP_R L22 1 2 3

1
R522 1 1 L38 C380 150U_D2_6.3VM FBM-11-160808-700T_0603 6

+
2 @ 100K_0402_5% AMP_LEFT_HP HP_L L23 2
1 2 1 2 2 7
C691 C686 @ 1U_0603_10V4Z C378 150U_D2_6.3VM FBM-11-160808-700T_0603 1

+
1 1

2
2 2 C399 C395 FOX_JA6033L-5S1-TR

2
INTSPK_R1 2 1 AMP_RIGHT_HP D39 AGND

19

10
U40 R535 0_0402_5% 10P_0402_50V8K @
INTSPK_L1 2 2 2
1 AMP_LEFT_HP

PVDD

SVDD
1

D HP_R R536 0_0402_5% SM05_SOT23

14 SHDNR# OUTR 11
31 EC_EAPD EC_EAPD 2

1
G 18 9 HP_L 10P_0402_50V8K
Q60 SHDNL# OUTL
S
3

@ 2N7002_SOT23

@ 4.7U_0603_6.3V6M 4
AMP_RIGHT_HP R523 2 AMP_RHPIN NC-4
1 1 2 15
28 AMP_RIGHT_HP

28 AMP_LEFT_HP
AMP_LEFT_HP
@ 499_0402_1%
1 R524 2
C687
1 2 AMP_LHPIN 13
INR
NC-6 6 Speaker Connector
@ 499_0402_1% C688 @ 4.7U_0603_6.3V6M INL
NC-8 8
Ri=10K~19K JP2
12 INTSPK_R1 L7 1 2 HLMA-160808-39NKT SPK_R1
Ci>0.8UF NC-12 INTSPK_R2 L10 HLMA-160808-39NKT SPK_R2 1
1 2 2
2

1 16 INTSPK_L1 L8 1 2 HLMA-160808-39NKT SPK_L1

R525 R526 C1P NC-16 INTSPK_L2 L9 HLMA-160808-39NKT SPK_L2 3
1 2 4
PGND

SGND
3 20
PVss

SVss
1 C1N NC-20
@ 1K_0402_1% @ 1K_0402_1% ACES_85204-0400

2
C689
1

@ MAX4411ETP+T_TQFN20~N D5
5

17
2 D4 @ @ SM05_SOT23
SM05_SOT23
@ 1U_0603_10V4Z
PVSS

1
3 3

1
C690
@ 1U_0603_10V4Z
2
Gain Setting Variable Resistor
R529 1
DB VOL AMP +5VS 2
3.9K_0402_5%

SPK 10 0.66-3.7 2
Regulator for CODEC VR1 C698

9
8

2
0.01W_10KC_EVUTWRB49C14
@ 0.1U_0402_16V4Z
HP 0 1.18-3.9 1 3
1

+5VALW +5VALW_VDDA
Adjustable Output +VDDA 4 VOL_AMP

L37 1 2 4
U29
5 +VDDA
Moat Bridge +5VS
VIN VOUT
4.7U_0805_10V4Z

0.1U_0402_16V4Z

FBM-L11-160808-800LMT_0603

5
2

4.7U_0805_10V4Z

2 DELAY SENSE or ADJ 6 1 2

1
R412 R247 0_0805_5%
R531
0.1U_0402_16V4Z

7 1 69.8K_0603_1% 1 2 R530
C584 C585 ERROR CNOISE R243 0_0805_5% 1 2
8 3 1 2 100K_0402_5% 4.3K_0402_5%
1

SD GND

2
R244 0_0805_5%

1
SI9182DH-AD_MSOP8 D
1 2
R242 0_0805_5% 2 Q63 R532
1

G 2N7002_SOT23 4.3K_0402_5%

1
R408 D
S

1
C588

4 24K _0402_1% NBA_PLUG 2 4

2 1 G
25,31,33,39 SYSON
C586

R406 0_0402_5% Q64 S

2

3
2 1 2N7002_SOT23
17,25,31,32,34,39,40 SUSP#
R409 @ 0_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title
AMP/VR/Audio Jack
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HTW20 M/B LA-3171P
Date: Friday, April 28, 2006 Sheet 29 of 44
A B C D E
 +USB_VCCA +USB_VCCC

1.4A 1.4A
U28 U12
1 GND OUT 8 1 GND OUT 8
+5VALW 2 IN OUT 7 +5VALW 2 IN OUT 7
3 IN OUT 6 3 IN OUT 6
USB_EN# 4 5 USB_EN# 4 5
31 USB_EN# EN# FLG EN# FLG
1 1
C412 G528_SO8 C245 G528_SO8

4.7U_0805_10V4Z 4.7U_0805_10V4Z
2 2

Close to JP22
Close to JP12

USB CONN. 3
USB CONN. 1 USB CONN. 2 +USB_VCCC
W=40mils
+USB_VCCA +USB_VCCA
W=40mils W=40mils
1
1 1
1 1 C551 + C232 C233
1 1 1 1 150U_D2_6.3VM
C10 + C11 C9 C409 C410 + C408 0.1U_0402_16V4Z 1000P_0402_50V7K
150U_D2_6.3VM 2 2 2
0.1U_0402_16V4Z 1000P_0402_50V7K 1000P_0402_50V7K 0.1U_0402_16V4Z 150U_D2_6.3VM
2 2 2 2 2 2 JP21
1 VBUS S_GND 5
JP12 2
20 USB20_N4 D-
1 VCC VCC 5 20 USB20_P4 3 D+
20 USB20_N3 2 D0- D1- 6 USB20_N2 20 4 GND S_GND 6

2
20 USB20_P3 3 D0+ D1+ 7 USB20_P2 20 1 C552 1 C553

10P_0402_50V8K

10P_0402_50V8K
4 8 D32 TYCO_3-1470859-1
VSS VSS
3

2
C1
1 1 C2 1 C6 1 C7 @ SM05_SOT23
10P_0402_50V8K

10P_0402_50V8K

10P_0402_50V8K

10P_0402_50V8K
D1 10 9 D2 @ @
@ SM05_SOT23 G2 G1 @ SM05_SOT23 2 2
12 G4 G3 11
@ @ @ @

1
2 2 TYCO_1470748-1 2 2
1

H1 H3 H29 H24 H6 H22 1 H23

H_S315D118 H_S315D118 H_S315D118 H_S236D157 H_C276D157 H_S236D157 H_TC157BC236D157

@ @ @ @ @ @ @
1

H2 H10 H5 H13 H14 H19 H7

H_C236D126 H_S315D118 H_S315D118 H_S315D118 H_C295D165 H_C295D165 H_C276D197

@ @ @ @ @ @ @
1

H11 H20 H28 H26 H15 H16 H9

H_C236D126 H_S315D118 H_S315D118 H_S315D118 H_C295D165 H_C276D157 H_TC157BC236D157

@ @ @ @ @ @ @
LPC Debug Port
1

+5VS +3VS
CLK_PCI_SIO
H8 H27 H4 H21 H18 H25 H17

2
H_C236D126 H_S315D118 H_S315D118 H_S315D118 H_C295D165 H_S256D126 H_TC157BC236D157
JP27 R403
@ @ @ @ @ @ @ 1 @ 22_0402_5%
1
2
1

2
3

1
3
4 4 1
5 C583
5 CLK_14M_SIO
6 6 CLK_14M_SIO 15
7 LPC_AD0 @ 10P_0402_50V8K
7 LPC_AD0 19,27,31,33 2
8 LPC_AD1
8 LPC_AD1 19,27,31,33
9 LPC_AD2
9 LPC_AD2 19,27,31,33
10 LPC_AD3
10 LPC_AD3 19,27,31,33
M7 M2 M5 M6 M4 M3 M1 11 LPC_FRAME#
11 LPC_FRAME# 19,27,31,33
H_C126D126N H_C177D177NH_O177X157D177X157N
H_O118X197D118X197N
H_O276X177D276X177N H_C59D59N H_O150X126D150X126N 12 LPC_DRQ1#
12 PCI_RST# LPC_DRQ#1 19,33
13 13 PCI_RST# 18,22,24,31,33
@ @ @ @ @ @ @ 14 1 2
14 R402 @ 0_0402_5% CLK_PCI_SIO
15 CLK_PCI_SIO 15
1

15
16 16 SIRQ 20,22,27,31,33
17 17
18 18
19
19
20 20 close to MINIPCI Conn.
@ ACES_85201-2005

FD4 FD6 FD5 FD2 FD1 FD3

@ @ @ @ @ @
1

CF4 CF8 CF2 CF7 CF1 CF6 CF5 CF10 CF3 CF9 Security Classification Compal Secret Data Compal Electronics, Inc.
1 1 1 1 1 1 1 1 1 1 Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title
@ @ @ @ @ @ @ @ @ @
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Screw Hole/USB/LPC Conn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P
WWW.AliSaler.Com MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 28, 2006 Sheet 30 of 44
 5 4 3 2 1

+3VALW
+3VALW

2
KBA[0..19] R213
KBA[0..19] 32
R157 Change to 0 ohm 0_0402_5%
ADB[0..7] 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2
ADB[0..7] 32
1 1 C322 1 1 2 2 0_0603_5%

1
C320 1
C303 C241 C263 C299
1000P_0402_50V7K 1000P_0402_50V7K C254 1 1
L16 2 2 2 2 1 1 C323 C343

ECA GND
ECAGND 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z
1 2
FBM-L11-160808-800LMT_0603 0.1U_0402_16V4Z 1U_0603_10V4Z
2 2
D
For EC Tools D
JP23

123
136
157
166

161

159
KSI[0..7]

16
34
45

95

96
KSI[0..7] 33 1 1 +5VALW
U13 2 E51_RXD
LPC_AD0 KSO[0..15] 2 E51_TXD
15 3

VCCA
VCC
VCC
VCC
VCC
VCC
VCC
VCC

AGND

BATGND
VCCBAT
19,27,30,33 LPC_AD0 LAD0 KSO[0..15] 33 3
C291 LPC_AD1 14 49 KSO0 4
19,27,30,33 LPC_AD1 LAD1 GPOK0/KSO0 4
@ 22P_0402_50V8J @ 33_0402_5% LPC_AD2 13 50 KSO1
19,27,30,33 LPC_AD2 LAD2 GPOK1/KSO1
2 1 R179 2 1 LPC_AD3 10 51 KSO2 @ ACES_85205-0400
19,27,30,33 LPC_AD3 LAD3 GPOK2/KSO2 KSO3
19,27,30,33 LPC_FRAME# 9 LFRAME# LPC Interface GPOK3/KSO3 52
KSO4
18,22,24,30,33 PCI_RST# 165 LRST#/GPIO2C GPOK4/KSO4 53

ENE-KB910-B4
18 56 KSO5
15 CLK_PCI_EC LCLK GPOK5/KSO5
7 57 KSO6
20,22,27,30,33 SIRQ SERIRQ GPOK6/KSO6
+3VALW 25 58 KSO7 Analog Board ID definition,
RP29 CLKRUN#/GPIO0C * GPOK7/KSO7 KSO8
24 59
1 8 MODE# LPCPD#/GPIO0B * GPOK8/KSO8
60 KSO9 Please see page 3.
F RD# F RD# GPOK9/KSO9 KSO10
2 7 32 FREAD# 150 RD# GPOK10/KSO10 61
SELIO# F W R# KSO11

Internal Keyboard
3 6 32 FW R# 151 WR# GPOK11/KSO11 64
4 5 FSEL# FSEL# 173 65 KSO12
32 FSEL# MEMCS# GPOK12/KSO12
SELIO# 152 66 KSO13
10K_0804_8P4R_5% ADB0 IOCS# GPOK13/KSO13 KSO14
138 D0 GPOK14/KSO14 67
ADB1 139 68 KSO15
ADB2 D1 GPOK15/KSO15
140 D2 GPOK16/KSO16 153
ADB3 141 154 KSO17
+3VALW D3 GPOK17/KSO17 KSO17 33
ADB4 144
ADB5 D4 KSI0
145 D5 GPIK0/KSI0 71

X-BUS Interface
2 1 KBA1 ADB6 146 72 KSI1
@ 10K_0402_5% R185 ADB7 D6 GPIK1/KSI1 KSI2
147 D7 GPIK2/KSI2 73
2 1 KBA4 KBA0 124 74 KSI3
10K_0402_5% R187 KBA1 A0 GPIK3/KSI3 KSI4
125 A1/XIOP_TP GPIK4/KSI4 77
2 1 KBA5 KBA2 126 78 KSI5
10K_0402_5% R194 KBA3 A2 GPIK5/KSI5 KSI6 +3VALW
127 A3 GPIK6/KSI6 79
KBA4 128 80 KSI7
+3VALW KBA5 A4/DMRP_TP GPIK7/KSI7
131 A5/EMWB_TP

2
C KBA6 132 32 C
A6 GPOW0/PWM0 INVT_PWM 17
1 2 IE_BTN# KBA7 133 33 R173
A7 GPOW1/PWM1 BEEP# 28 10K_0402_5%
R172 10K_0402_5% KBA8 143 36
A8 FAN2PWM/GPOW2/PWM2 PWR_SUSP_LED 33
1 2 EC_SMI# KBA9 142 37
A9 GPOW3/PWM3 ACOFF 37
R140 10K_0402_5% KBA10 135 Pulse Width GPOW4/PWM4 38 USB_EN# 30

1
EC_PME# KBA11 A10 C692
1 2 134 A11 GPOW5/PWM5 39 EC_ON 33
R420 10K_0402_5% KBA12 130 40 1 2
A12 GPOW6/PWM6 EC_LID_OUT# 20
KBA13 129 43 EC_EAPD @ 1U_0402_6.3V4Z
A13 FAN1PWM/GPOW7/PWM7 EC_EAPD 29
KBA14 121 D13
KBA15 A14
120 A15 GPWU0 2 ON/OFFBTN# 33
+5VS KBA16 113 26 2 1
A16 GPWU1 ACIN 20,33,35
RP27 KBA17 112 29 KILL_SW#
A17 GPWU2 KILL_SW# 25,32,33
1 8 KB_CLK KBA18 104 30 PM_SLP_S3#
A18 GPWU3 PM_SLP_S3# 20 RB751V_SOD323
2 7 KB_DATA KBA19 103 Wake Up Pin 44 PM_SLP_S5#
33 IE_BTN# A19 GPWU4 PM_SLP_S5# 20
3 6 PS_CLK IE_BTN# 108 76
PS_DATA EC_TINIT# A20/GPIO23 GPWU5 EC_PME#
4 5 +3VALW 2 1 105 E51CS#/GPIO20/ISPEN TIN1/GPWU6 172 EC_PME# 26
R171 @ 10K_0402_5% 176 W W /JPN#
4.7K_0804_8P4R_5% KB_CLK TIN2/FANFB2/GPWU7 ECAGND
110 PSCLK1 2 1
+5VS KB_DATA C240 0.01U_0402_16V7K
111 PSDAT1 GPIAD0/AD0 81 BATT_TEMPA 36
PS_CLK 114 82 SKU_ID
PSCLK2 GPIAD1/AD1 SKU_ID 33
2 1 TP_CLK PS_DATA 115 PSDAT2PS2 Interface GPIAD2/AD2 83 BATT_OVP 37
R360 4.7K_0402_5% TP_CLK 116 84
32 TP_CLK PSCLK3 GPIAD3/AD3
2 1 TP_DATA 32 TP_DATA
TP_DATA 117 PSDAT3 Analog To Digital GPIAD4/AD4 87 ALI/MH# 36,37
R362 4.7K_0402_5% 88 MB_ID
EC_SMB_CK1 GPIAD5/AD5 AD_BID0
32,36 EC_SMB_CK1 163 SCL1 GPIAD6/AD6 89
+5VALW EC_SMB_DA1 164 90 1 2
32,36 EC_SMB_DA1 SDA1 GPIAD7/AD7 100K_0402_5% ADP_I 37
RP28 EC_SMB_CK2 169 SMBus R344
4 EC_SMB_CK2 SCL2
1 8 EC_SMB_CK1 EC_SMB_DA2 170 99 DAC_BRIG 1 2
4 EC_SMB_DA2 SDA2 GPODA0/DA0 DAC_BRIG 17
2 7 EC_SMB_DA1 100 BT_PWR C248 0.22U_0603_10V7K
GPODA1/DA1 BT_PWR 32
3 6 EC_SMB_CK2 8 101 IR EF
GPIO04 GPODA2/DA2 IREF 37
4 5 EC_SMB_DA2 EC_SCI# 20 102 EN_DFAN1 EN_DFAN1
20 EC_SCI# GPIO07 GPODA3/DA3 EN_DFAN1 4
BT_RST# 21 Digital To Analog 1
32 BT_RST# GPIO08 GPODA4/DA4 PWROK 7,20

2
4.7K_0804_8P4R_5% 22 42
B ENBKL GPIO09 GPODA5/DA5 R512 B
27 GPIO0D GPODA6/DA6 47
PM@ BKOFF# 28 174 1M_0402_5%
17 BKOFF# GPIO0E GPODA7/DA7
R151 1 2 0_0402_5% FSTCHG 48
17 VGA_ENBKL 37 FSTCHG GPIO10
EC_SMI# 62 85 POWER_LED#
20 EC_SMI# POWER_LED# 33

1
GM@ GPIO13 * GPIO18/XIO8CS# W L_LED
63 GPIO14 86 WL_BT_LED# 33
R167 1 2 0_0402_5% ENBKL 69 * GPIO19/XIO9CS# 91 HDD_LED#
9 GMCH_ENBKL 25 WL_OFF# GPIO15 *GPIO1A/XIOACS# HDD_LED# 33
70 GPIO 92 BATT_CHG_LOW_LED#
20 EC_SWI# GPIO16 * GPIO1B/XIOBCS# BATT_CHG_LOW_LED# 33
75 Expanded I/O * GPIO1C/XIOCCS# 93 BATT_FULL_LED#
28,29 NBA_PLUG GPIO17 BATT_FULL_LED# 33
28 EAPD 109 GPIO24 94 VGATE 15,20,41
118 * GPIO1D/XIODCS# 97 R527
33 LID_SW# GPIO25 * GPIO1E/XIOECS# NSE_DPR 28
MODE# 119 98 2 1 +S1_VCC
33 MODE# GPIO26 * GPIO1F/XIOFCS#
S YSON 148 10K_0402_5%
25,29,33,39 SYSON GPIO27
1 2 S YSON 17,25,29,32,34,39,40 SUSP#
SUSP# 149 GPIO28 GPIO2E/TOUT1/FANFB1 171 FAN_SPEED1 4
R375 100K_0402_5% 155 12 4.7K_0402_5% 1 2 R365
41 VR_ON GPIO29 DPLL_TP/GPIO06/FANFB3
1 2 SUSP# 156 GPIO2A FANTEST_TP/GPIO05/FAN3PWM 11 4.7K_0402_5% 1 2 R368
R374 100K_0402_5% BT_DETACH 162
32 BT_DETACH GPIO2B SPK_SEL 20
168 175 CRY1 1 R204 2 CRY2
20 PBTN_OUT# GPIO2D EC_THERM# 20
Timer PinTOUT2/GPIO2F @ 20M_0603_5%
PADS_LED# 55 3
33 PADS_LED# FnLock#/GPIO12 * E51IT0/GPIO00 EC_RSMRST# 20
C284 0.1U_0402_16V4Z CAPS_LED# 54 4
33 CAPS_LED# CapLock#/GPIO011 * E51IT1/GPIO01
2 1 NUM_LED# 23 106 E51_RXD 1 2
33 NUM_LED# NumLock#/GPIO0A * E51RXD/GPIO21/ISPCLK E51_RXD 33
41 107 E51_TXD R181 100K_0402_5% 1 C332 1 C324
19 PHDD_LED# ScrollLock#/GPIO0F * E51TXD/GPIO22/ISPDAT E51_TXD 33
+3VALW 2 1 19 ECRST# MISC

4
10P_0402_50V8K

10P_0402_50V8K
R177 47K_0402_5% 5 158 CRY2
19 GATEA20 GA20/GPIO02 XCLKI
6 160 CRY1 X2

IN

OUT
19 EC_KBRST# KBRST#/GPIO03 XCLKO 2 2
31
GND
GND
GND
GND
GND
GND

ECSCI#
+3VALW
KB910Q B4_LQFP176

NC

NC
17
35
46
122
137
167

MB_ID: High: PM MB_ID 2 1

R343 PM@10K_0402_5%

3
LOW : GM 1 2
A
R342 GM@ 0_0402_5% A
SKU_ID 2 1
R340 100K_0402_5%
2 1 32.768KHZ_12.5P_1TJS125BJ2A251
R341 @ 0_0402_5%
AD_BID0: Board ID AD_BID0 2 1
R141 10K_0402_5%
1
Ra 2
R142 18K_0402_5%
* Rb Security Classification Compal Secret Data Compal Electronics, Inc.
WW/JPN#: No-Pop: WW Model Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title
(EC Internal Pull-Up) W W /JPN# 1 2
ENE-KB910
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

WWW.AliSaler.ComPop: JPN Model R385 @ 0_0402_5% AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HTW20 M/B LA-3171P
Date: Tuesday, May 02, 2006 Sheet 31 of 44
5 4 3 2 1
 5 4 3 2 1

TP CONN. BlueTooth Interface

+5VS
+5VS +3VS
+3VALW

2
JP5

14
D R112 C225 U20C D
4 4
3 1M_0402_5% 0.1U_0402_16V4Z 25,31,33 KILL_SW# 9

P
31 TP_DATA 3 A
2 C130 BT@ BT@ 8 1 2 BT_RESET#
31 TP_CLK 2 O

3
S
1 0.1U_0402_16V4Z R433 31 BT_RST# 10 R214 @0_0402_5%

1
1 B

G
G
1 2 2
2 2 ACES_85201-0405 BT@ 100K_0402_5% Q15 SN74LVC08APW_TSSOP14

7
C526 C527 2
D BT@AO3413_SOT23

1
68P_0402_50V8K 68P_0402_50V8K
C218 1000P_0402_50V7K
1 1 BT@
+BT_VCC 1 2

1
D 1 R215 BT@0_0402_5%
31 BT_PWR 2
G 2N7002_SOT23
S Q14

3
BT@

BT@
MARU_00-6210-320-340-800_20P
Module ID
Indication for polarity of reset 20
Reset input High Active --> Low , BT_DET# 19
Reset input Low Active --> Open No BT wake up function 20 BT_DET# 18
17
16
15
R111 14
BT_RESET#
BT_WAKE_UP 13
1 2 12
@ 4.7K_0402_5%
11
C 10 C
9
31 BT_DETACH 8
25 WLAN_BT_CLK 7
6
20 USB20_P7 5
20 USB20_N7 4
25 WLAN_BT_DATA 3
1 1 2
+BT_VCC 1
C670 C671
22P_0402_50V8J 22P_0402_50V8J (MAX=200mA)
1
BT@ 2 2
BT@ C216 C215 JP7
BT@ BT@ (Top Contact)
10U_0805_10V4Z 0.1U_0402_16V4Z
2
Bluetooth Connector

KBA[0..19]
31 KBA[0..19]
ADB[0..7]
31 ADB[0..7]

1MBU22Flash ROM +3VALW

KBA0 21 31
KBA1 A0 VCC0 +3VALW
20 A1 VCC1 30 1 C376
KBA2 19
KBA3 A2 C358
18 A3 1 2
KBA4 ADB0

14
17 A4 D0 25 0.1U_0402_16V4Z
B KBA5 ADB1 2 U24A B
16 A5 D1 26 0.1U_0402_16V4Z
KBA6 15 27 ADB2 1
1MB ROM Socket FSEL# 31

P
KBA7 A6 D2 ADB3 INT_FSEL# A
14 A7 D3 28 3 O
KBA8 8 32 ADB4 2 INT_FLASH_EN#
A8 D4 B

G
KBA9 7 33 ADB5 JP30
KBA10 A9 D5 ADB6 KBA16 KBA17 SN74LVC32APWLE_TSSOP14
36 34

7
KBA11 A10 D6 ADB7 KBA15 1 2
6 A11 D7 35 3 4 2 1 R401
KBA12 5 KBA14 100K_0402_5%
KBA13 A12 KBA13 5 6 KBA19
4 A13 7 8
KBA14 3 10 RESET# 1 2 +3VALW KBA12 KBA10
KBA15 A14 RP# R219 100K_0402_5% KBA11 9 10 ADB7
2 A15 NC 11 11 12
KBA16 1 12 KBA9 ADB6
KBA17 A16 READY/BUSY# KBA8 13 14 ADB5
40 A17 NC0 29 15 16
KBA18 13 38 FWE# ADB4
KBA19 A18 NC1 RESET# 17 18
37 A19 19 20 +3VALW
INT_FLASH_EN#
INT_FSEL# SB_INT_FLASH_SEL# 21 22
22 CE# 20 SB_INT_FLASH_SEL# 23 24
FREAD# 24 23 KBA18 ADB3
31 FREAD# FWE# OE# GND0 KBA7 25 26 ADB2
9 WE# GND1 39 27 28
KBA6 ADB1
KBA5 29 30 ADB0 +3VALW
SST39VF080-70_TSOP40 KBA4 31 32 FREAD#
33 34

20K_0402_5%
KBA3
35 36

1
KBA2 FSEL# +3VALW
KBA1 37 38 KBA0 R233
39 40 SUSP# 17,25,29,31,34,39,40

2
+3VALW +3VALW @ SUYIN_80065AR-040G2T Q22

G
14
U24B 2N7002_SOT23

2
4 1 3

P
A EC_FLASH# 20
1

FWE# 6

S
O
1 2 C360 R222
B 5

G
0.1U_0402_16V4Z 100K_0402_5%
A SN74LVC32APWLE_TSSOP14 A

7
U23 FWR# 31
2

8 VCC A0 1
7 WP A1 2
31,36 EC_SMB_CK1 6 SCL A2 3
31,36 EC_SMB_DA1 5 SDA GND 4

AT24C16N-10SI-2.7_SO8
Security Classification Compal Secret Data Compal Electronics, Inc.
1 R221 2 Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title
100K_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1MB BIOS/ TP Conn/ BT Conn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HTW20 M/B LA-3171P
Date: Friday, April 28, 2006 Sheet 32 of 44
5 4 3 2 1
 5 4 3 2 1

Lid SW +3VALW +3VALW

+3VALW Kill SWITCH
ON/OFF BUTTON

2
R254 R46 SW3 KS@
U27 47K_0402_5% for debug only 3 3
A3212EEH_MLP6 100K_0402_5%
BTN TOP D6 2 R413

1
LID_SW# 2
5 VDD OUTPUT 1 LID_SW# 31 2 ON/OFFBTN# 31 +3VALW 1 2
1 3 1 3 ON/OFF 1 100K_0402_5%
3 51_ON# 1
51_ON# 35 1 KILL_SW# 25,31,32

10P_0402_50V8K
0.1U_0402_16V4Z

1 4 NC NC 2 1 2 4 2 4
D C405 C406 DAN202U_SC70 D
3

GND
+3VALW
SW2 SW1 1BS003-1211L_3P 1

6
5

6
5
2

1
2 2 SMT1-05_4P SMT1-05_4P D34
@ 1
3
@ D8 @ DAN217_SC59
C123 RLZ20A_LL34
Q5 0.01U_0402_25V4Z

1
D 2

2
31 EC_ON 2
G

2
S 2N7002_SOT23

3
R49
WL&BT LED 10K_0402_5%
KS@ D35 KS@
+3VALW 1 2 2 1 WL_BT_LED# 31

1
R414 300_0402_5% HT-191UD_AMBER_0603

POWER/ON(Green Pin2,1) +3VALW

Suspend (Amber Pin3,4) LED SYSON SYSON 25,29,31,39
47K

3
D15 Q35

2
PWR_SUSPLED1# 2N7002_SOT23

G
2 1
HT-191UD_AMBER_0603 2 2
10K MODE# 31 IE_BTN# 31
D21 2 1 3 MODEBTN# 1 IEBTN# 1
PWR_LED_0# PWR_SUSP_LED 31 51_ON# 51_ON#
2 1 3 3

S
HT-191NB_BLUE_0603
D30 D31
Q36 DAN202U_SC70 DAN202U_SC70
DTA114YKA_SOT23
BATTERY CHG(Green Pin2,1)

1
R392 1 2 120_0402_5% PW R_SUSPLED# KSO17 C508 1 2@ 220P_0402_50V7K
C R393 1 PWR_SUSPLED1# C
2 120_0402_5% SW/LED Connector
BATTERY LOW(Amber Pin3,4) LED JP3
ON/OFF C506 1 2@ 220P_0402_50V7K

PWR_LED_1# PWR_LED_1# C510 1 2@ 220P_0402_50V7K

D16 +5VALW 1 PW R_SUSPLED#
BATT_CHG_LOW_LED# 2 SKU_ID PW R_SUSPLED# C509 1
+5VALW 1 2 2 1 BATT_CHG_LOW_LED# 31 3 SKU_ID 31 2@ 220P_0402_50V7K
R399 300_0402_5% HT-191UD_AMBER_0603 SYSON KSO17
47K 4 KSO17 31

3
D22 ON/OFF IEBTN# C504 1 2@ 220P_0402_50V7K
5

2
R398 1 200_0402_5% BATT_FULL_LED# Q33 IEBTN#

G
+5VALW 2 2 1 BATT_FULL_LED# 31 6
HT-191NB_BLUE_0603 2N7002_SOT23 MODEBTN# MODEBTN# C502 1 2@ 220P_0402_50V7K
10K 7 EC_PLAYBTN#
2 1 3 POWER_LED# 31 8 KSI0 31
EC_STOPBTN# EC_REVBTN# C489 1 2@ 220P_0402_50V7K

S
HDD LED 9
10
EC_FRDBTN# KSI1
KSI3
31
31
D19 EC_REVBTN# EC_FRDBTN# C490 1 2@ 220P_0402_50V7K
Q34 11 KSI2 31
+5VS 1 2 2 1 HDD_LED# 31 12
R397 200_0402_5% HT-191NB_BLUE_0603 DTA114YKA_SOT23 EC_PLAYBTN# C500 1 2@ 220P_0402_50V7K
1

R391 1 200_0402_5%
2 PWR_LED_0# ACES_85201-1205
AC IN LED 1 2 PWR_LED_1# EC_STOPBTN# C499 1 2@ 220P_0402_50V7K
D18 R390 300_0402_5%
D

+5VALW 1 2 2 1 1 3
R400 200_0402_5% HT-191NB_BLUE_0603 Q37
2N7002_SOT23
For EMI Request
G
2

ACIN 20,31,35
CLK_PCI_SIO2

KEYBOARD CONN.

1
R537
10_0402_5% JP6 KSI[0..7]
KSI[0..7] 31
NUM_LED#
New LPC Debug Pad ---- MB side 1 PADS_LED#
NUM_LED# 31
PADS_LED# 31
KSO[0..15]
KSO[0..15] 31

2
B 2 CAPS_LED# B
1 3 CAPS_LED# 31
C711 2 1 +3VS
4 KSO15 R88 300_0402_5%
10P_0402_50V8K 5 KSO14
R502 2 6 KSO10
@ 0_0402_5% 7 KSO11
8 2 1PADS_LED# NUM_LED# 1 2
H30
1 2 E51_TXD E51_TXD 31 9
KSO8 100P_0402_50V8J C193 C194 100P_0402_50V8J
R503 +3VALW KSO9 2 1 KSO14 CAPS_LED# 1 2
@ 0_0402_5% 10 KSO13 100P_0402_50V8J C191 C195 100P_0402_50V8J
E51_RXD 11
31 E51_RXD 1 2 6 5 1 2 LPC_DRQ#1 LPC_DRQ#1 19,30 12
KSI7 2 1 KSO11 KSO15 1 2
R504 KSO3 100P_0402_50V8J C189 C192 100P_0402_50V8J
13 KSO7
0_0402_5%
14 2 1 KSO9 KSO10 1 2
20,22,27,30,31 SIRQ SIRQ 1 2 7 4 PCI_RST# PCI_RST# 18,22,24,30,31 KSO12 100P_0402_50V8J C187 C190 100P_0402_50V8J
R505 15 KSI4 KSI7 KSO8
16 2 1 1 2
0_0402_5% KSI6 100P_0402_50V8J C185 C188 100P_0402_50V8J
LPC_AD3 LPC_AD2 17 KSI5
19,27,30,31 LPC_AD3 8 3 LPC_AD2 19,27,30,31 18 2 1 KSO7 KSO13 1 2
KSO6 100P_0402_50V8J C183 C186 100P_0402_50V8J
19 KSO5 KSI4 KSO3
20 2 1 1 2
19,27,30,31 LPC_AD1 LPC_AD1 9 2 LPC_AD0 LPC_AD0 19,27,30,31 KSI3 100P_0402_50V8J C181 C184 100P_0402_50V8J
21 KSI0 KSI5 KSO12
22 2 1 1 2
KSO0 100P_0402_50V8J C179 C182 100P_0402_50V8J
LPC_FRAME# CLK_PCI_SIO2 23 KSO1
19,27,30,31 LPC_FRAME# 10 1 CLK_PCI_SIO2 15 24 2 1 KSO5 KSI6 1 2
KSI1 100P_0402_50V8J C196 C180 100P_0402_50V8J
25 KSI2 KSI0 KSO6
26 2 1 1 2
KSO2 100P_0402_50V8J C201 C178 100P_0402_50V8J
@ 27 KSO4
DEBUG_PAD 28 2 1 KSO1 KSI3 1 2
2 1 +3VS 100P_0402_50V8J C199 C198 100P_0402_50V8J
29 R91 300_0402_5% KSI2 KSO0
2 1 1 2
Under DDR ME Assigment Area 30
31
100P_0402_50V8J
2
C176
1 KSO4 KSI1
C200
1
100P_0402_50V8J
2
32 100P_0402_50V8J C174 C177 100P_0402_50V8J
33 KSO2
1 2 1 2
A
Keep Resistor near Debug Pad and in the same side 34
ACES_88170-3400
R90 300_0402_5%
+3VS
C175 100P_0402_50V8J A

Reverse side DIMM ---- Pin 1 keep away DIMM For EMI Request

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
S4R/LID/KS/KB/LED/SW-B Conn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HTW20 M/B LA-3171P
Date: Tuesday, May 02, 2006 Sheet 33 of 44
5 4 3 2 1
 A B C D E

+5VALW

1 1

1
R184

10K_0402_5%

2
SUSP
40 SUSP

1
D
2 Q18
17,25,29,31,32,39,40 SUSP#
G 2N7002_SOT23
S

3
+5VALW to +5VS Transfer +3VALW to +3VS Transfer
2 2
+5VALW +5VS
+3VALW
U19 0.1U_0402_16V4Z +3VS
8 1 U21 0.1U_0402_16V4Z
C317 D S
1 7 D S 2 8 D S 1
+VSB 10U_0805_10V4Z 6 3 7 2
D S 1 1 1 D S

1
5 4 C355 6 3 1 1
D G C349 C345 R218 10U_0805_10V4Z D S C346 C335 R339
5 D G 4
1

2 AO4422_SO8 10U_0805_10V4Z
2 2 470_0805_5% 2 AO4422_SO8 10U_0805_10V4Z 470_0805_5%
R195 2 2

2
340K_0402_1%
2

1
D
1 R196 2 RUNON

1
D RUNON Q31 SUSP
2
1

0_0402_5% 2 Q32 2 SUSP 2N7002_SOT23 G

1

D R513 G S

3
SUSP 2 Q20 C316 S 3
G 2N7002_SOT23 0.033U_0603_25V7K 10M_0402_5% 2N7002_SOT23
S 1
3

3 3

+1.8V to +1.8VS Transfer

+1.8V
+1.8VS
U3 0.1U_0402_16V4Z
8 D S 1
+2.5VS +1.5VS +VCCP +0.9VS 1 7 2
D S

1
C29 6 3 1 1
10U_0805_10V4Z D S C32 C33 R26
5 D G 4
1

PM@ PM@
R27 R72 R93 R70 2 AO4422_SO8 10U_0805_10V4Z 470_0805_5%
PM@ 2 PM@ 2
PM@

2
470_0805_5% 470_0805_5% 470_0805_5% 470_0805_5%
1 2

1 2

1 2

1 2

1
D
D D D D RUNON Q2 SUSP
2
Q1 2 SUSP Q8 2 SUSP Q11 2 SUSP Q7 2 SUSP 2N7002_SOT23 G
G G G G PM@ S

3
S S S S
3

2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC/DC Circuits
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 28, 2006 Sheet 34 of 44
A B C D E
 A B C D

VS
PR1
VIN VIN 1M_0402_1%
PL1 1 2
PF1 FBMA-L18-453215-900LMA90T_1812
DC301000F00

1
DC_IN_S1 1 2 DC_IN_S2 1 2

1
VS PR2
PJP1 7A_24VDC_429007.WRML PR3 5.6K_0402_5% PR4
1 84.5K_0402_1% 1K_0402_1%
+
1 2

2
ACIN 20,31,33

1
2 PR5

2
+

8
PC1 PC2 PC3 PC4 22K_0402_1% PU1A
3 1000P_0402_50V7K 100P_0402_50V8J 1000P_0402_50V7K 100P_0402_50V8J 1 2 3

P
2

2
- + PACIN
1
O 1 PACIN 37,38 1

- 4 2 -

G
1

1
@ SINGA_2DW-0005-B03 PR6 LM393M_SO8

4
PC5 20K_0402_1% PC6 PR7
1000P_0402_50V7K 0.1U_0402_16V7K PD1 10K_0402_1%

2
RLZ4.3B_LL34

2
2
PR8
1 RTCVREF Vin Detector
10K_0402_1%
VIN 3.3V
High 18.384 17.901 17.430

2
PD2
RLS4148_LLDS2
Low 17.728 17.257 16.976

1
PD3
BATT+ 2 1

1
RLS4148_LLDS2 PR9 PR10
68_1206_5% 68_1206_5%
PQ1 1 2
PR12 TP0610K-T1-E3_SOT23 PR11

2
200_0603_5% 1K_1206_5%
CHGRTCP 1 2 N1 3 1 VS
PD4
1

2 1 N3 1 2
VIN B+
1

1
2
PC8 PR13 2

PR14 PC7 0.1U_0603_25V7K RLS4148_LLDS2 1K_1206_5%

100K_0402_1% 0.22U_1206_25V7K
2

2
2

33 51_ON# 1 2 1 2
PR15 PR16
22K_0402_1% 1K_1206_5%

RTCVREF
1

PR18 PR19
PR17 100K_0402_1% 2.2M_0402_5%

1
PU2 200_0603_5% 1 2 2 1
PR21 PR22 G920AT24U_SOT89 VL PR20
560_0603_5% 560_0603_5% 3.3V 499K_0402_1%
2

1 2 1 2 3 2 N2
+CHGRTC OUT IN PU1B

2
1

8
PD6 LM393M_SO8
1

GND PD5 2 5

P
PC9 PC10 RLZ16B_LL34 36,38 MAINPWON 1 7
+
10U_0805_10V4Z 1 1U_0805_25V4Z O
3 6 2 1 VL
37 ACON
2

1
G
2

1
RB715F_SOT323 PR23 PR24

4
1

1
34K_0402_1% 499K_0402_1% PC11

1
PC12 PR26 1000P_0402_50V7K

2
1000P_0402_50V7K PC13 PR25 191K_0402_1%

2
1000P_0402_50V7K 66.5K_0402_1%

2
3 3

PJ2
PJ1 +1.8VP 2 1 +1.8V PR27
2 1

1
+3VALWP 2 1 +3VALW PQ2 D 47K_0402_1%
2 1 @ JUMP_43X118 PACIN
2 2 1
@ JUMP_43X118 PJ15 RHU002N06_SOT323
G
(5A,200mils ,Via NO.= 10) 2 2 1 1 Precharge detector S

3
PJ3 @ JUMP_43X118
15.97V/14.84V FOR

1
+5VALWP 2 2 1 1 +5VALW (8A,320mils ,Via NO.= 16)
@ JUMP_43X118
ADAPTOR PQ3
DTC115EUA_SC70
PJ4
(5A,200mils ,Via NO.= 10)
PJ5 +2.5VSP 2 2 1 1 +2.5VS 2 +5VALWP

+VSBP 2 1 +VSB @ JUMP_43X39

2 1
(0.35A,40mils ,Via NO.=2)
@ JUMP_43X39

3
(120mA,40mils ,Via NO.= 2) PJ6
+0.9VSP 2 2 1 1 +0.9VS
@ JUMP_43X79
PJ7 (2A,80mils ,Via NO.= 4)
+1.05VSP 2 2 1 1 +VCCP
@JUMP_43X118 PJ8
(5A,200mils ,Via NO.= 10) +1.5VSP 2 1 +1.5VS
2 1
@ JUMP_43X118
4
(4.5A,180mils ,Via NO.= 9) 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title
DCIN & DETECTOR

WWW.AliSaler.Com
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 35 of 44
A B C D
 A B C D

PH1 under CPU botten side :

CPU thermal protection at 84 degree C
Recovery at 45 degree C

VL VS VL

2
VMB
PF2 PL2 PR28

1
1 1

PJP2 12A_65VDC_451012 FBMA-L18-453215-900LMA90T_1812 47K_0402_1%

1 BATT_S1 1 2 1 2 PH1 PC14
BATT+ BATT+ MAINPWON 35,38
PR29 100K_0603_1%_TH11-4H104FT 0.1U_0603_25V7K PR31

1
1K_0402_1% 47K_0402_1%

1
2 ALI/NIMH# 1 2 1 2 1 2
+3VALWP

2
ID AB/I PR30 PR32
B/I 3

8
4 TS_A 47K_0402_1% 13.7K_0402_1%
TS EC_SMDA PC15 PC16 PU3A
5 1 2 3

P
SMD +

1
6 EC_SMCA 1000P_0402_50V7K 0.01U_0402_25V7K 1 2 1 2 PQ4

2
SMC PR33 TM_REF1 O DTC115EUA_SC70
GND 7 2 -

G
1K_0402_1% PD7
@ SUYIN_250005MR007G132ZR LM393M_SO8 1SS355_SOD323

4
2

3
2

0.22U_0805_16V7K
PR35

22K_0402_1%
PR34 100_0402_5%

1
PC17
100_0402_5%

1000P_0402_50V7K
PR36
ALI/MH# 31,37
1

2 1 VL

PC18
PR38 PR37

2
6.49K_0402_1% 100K_0402_1%

2
2 1 +3VALWP

1
PR39
100K_0402_1%
1

2
PR40
1K_0402_1%
2 2
2

PH2 near main Battery CONN :

BATT_TEMPA 31
BAT. thermal protection at 79 degree C
EC_SMB_DA1 31,32 Recovery at 45 degree C
EC_SMB_CK1 31,32

VL VL

2
PR41
PH2 47K_0402_1%
100K_0603_1%_TH11-4H104FT PR42
47K_0402_1%

1
1 2

PR43

8
10.7K_0402_1% PU3B
PQ5 1 2 5

P
TP0610K-T1-E3_SOT23 +
O 7 2 1
TM_REF1 6 -

G
3 3

B+ 3 1 +VSBP PD8

1
LM393M_SO8 1SS355_SOD323

4
0.22U_1206_25V7K

0.1U_0603_25V7K

PC19 PR44
1

100K_0402_1%

0.22U_0805_16V7K 22K_0402_1%

2
1

1
PR45

PC20

PC21

2
2

PR46
2

22K_0402_1%
VL 1 2
100K_0402_1%
2
PR47

PR48
1

0_0402_5% D
1 2 2
38 POK G
0.1U_0402_16V7K

S PQ6
3
1

PC22

RHU002N06_SOT323
2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title
BATTERY CONN / OTP

WWW.AliSaler.Com
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 36 of 44
A B C D
 A B C D

65W Iadp=0~3.125A PR49=0.02_2512_1% PR55=30K_0402_1%

Iadp=0~3.125A B+ PQ7
P2 P3 75W Iadp=0~3.7A PR49=0.02_2512_1% PR55=23.7K_0402_1% AO4407_SO8
PQ8 PQ9 90W Iadp=0~4.2A PR49=0.015_2512_1% PR55=29.4K_0402_1% 1 8
2 7
AO4407_SO8 AO4407_SO8 3 6
VIN 8 1 1 8 1 4 5
7 2 2 7 PJ9
6 3 3 6 2 3 2 1 B++

4
2 1
5 5
PR49 @ JUMP_43X118

1
0.02_2512_1% PC23 PC24 PC25

4
4.7U_1206_25V6K 4.7U_1206_25V6K 4.7U_1206_25V6K

2
1
1 1

PR50
1

3
200K_0402_1% PR52
PR51 47K_0402_1%

2
47K

1
47K_0402_1% 1 2 VIN
2 PC26 31 ADP_I PU4
47K

2
0.1U_0603_25V7K 1 24
2

2
-INC2 +INC2

3
2
1
PR53
PQ11 10K_0402_1%
PQ10 2 1 2 23 AO4407_SO8
OUTC2 GND
1

DTA144EUA_SC70 PR54 PC27 4 ACOFF#

1

1
100K_0402_1% 0.022U_0402_16V7K
3 22 CS 1 2
+INE2 CS

1
2

1
4 -INE2 VCC(o) 21 1 2

1
PQ12 PR55 PR57

5
6
7
8
1
DTC115EUA_SC70 PC29 30K_0402_1% 10K_0402_1% PC28 2 ACOFF 31
1

PQ14 D 0.1U_0402_16V7K PR56 0.1U_0603_25V7K DH_CHG

1 2 1 2 5 20
3

PR58 10K_0402_1% FB2 OUT PQ13

2

2
G RHU002N06_SOT323 150K_0402_1% PC30 DTC115EUA_SC70

2
S 4700P_0402_25V7K 6 19 1 2 LX_CHG
3

3
PR59 VREF VH PC31
2

1
PC32 1K_0402_1% 0.1U_0603_25V7K
0.1U_0402_16V7K 1 2 1 2 7 18 1 2
ACOFF#1 FB1 VCC PC34
2
CC=0.6~3A
2
PC33 0.1U_0603_25V7K
PD9 1000P_0402_50V7K 8 17 1 2
1SS355_SOD323 -INE1 RT PR60 CV=12.6V(6 CELLS LI-ION)
68K_0402_5%
CV=16.8V(8 CELLS LI-ION)
1

2
PQ15 D PL3 2

31 IREF 1 2 9 +INE1 -INE3 16

PACIN 1 2 2 PR61 PR64 PR65 16UH_D104C-919AS-160M_3.7A_20%
35,38 PACIN
PR62 G RHU002N06_SOT323 162K_0402_1% 10K_0402_1% 47K_0402_1% 1 2 1 4 BATT+
3K_0402_1% S 2 1 10 15 1 2 1 2
3

1 OUTC1 FB3
2 3

1
PC35

1
ACON PR66 PC36 11 14 ACON 1500P_0402_50V7K PR63
35 ACON OUTD CTL

1
100K_0402_1% 0.1U_0402_16V7K PD14 0.02_2512_1% PC39
2

@ EC31QS04 PD10 PC37 4.7U_1206_25V6K

2

12 13 EC31QS04 4.7U_1206_25V6K

2
-INC1 +INC1 PC38
IREF=1.31*Icharge

2
4.7U_1206_25V6K
MB3387PFV-ERE1_SSOP24~N
IREF=0.6V~3.144V
ISE_CHG+
+3VALWP
CS
4.2V
1

2 1 2 1
1

PR69
47K_0402_1% PQ16 PR67 PR68
DTC115EUA_SC70 150K_0603_0.1% PQ17 300K_0603_0.1%
2

D
2 3 1 RHU002N06_SOT323
2 1
1

PR70
300K_0603_0.1%

G
2
3

VL 1 2
3
31 FSTCHG 2 3

PR71 1
PQ18 100K_0402_1%
DTC115EUA_SC70
3

2
31,36 ALI/MH# BATT Type ALI/MH# Charge Current IREF
VMB PQ19
DTC115EUA_SC70
OVP voltage : LI 8 CELL 0V 3A 3.144V
3
1

4S2P : 18V--> BATT_OVP= 2V

3S2P : 13.5V--> BATT_OVP= 1.5V PR72
340K_0402_1% 6 CELL 3.3V 3A 3.144V
(BAT_OVP=0.1111 *VMB)
1 2

VS

PR73
499K_0402_1%
2
8

PU5A
+ 3
P

1
31 BATT_OVP 0
2
-
G

LM358DT_SO8
4
1

PR74
1

2.2K_0402_5%
1

4
PC40 4

PR75 0.01U_0402_25V7K
2

105K_0402_1%
2
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title
CHARGER

WWW.AliSaler.Com
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 37 of 44
A B C D
 5 4 3 2 1

+3.3VALWP/+5VALWP
BST_5V BST_3V

3
D D
PD11
DAP202U_SOT323

B+++ B+++
PJ10 VL

1
B+ 1 1 2 2

B+++

5
6
7
8
4.7U_1206_25V6K

4.7U_1206_25V6K

4.7U_1206_25V6K

4.7U_1206_25V6K
2200P_0402_50V7K
@ JUMP_43X118

D
D
D
D
1

8
7
6
5
PC44

PC45

PC41

PC42
2
PC43

10_1206_5%

10_1206_5%

47_0402_5%
PQ21 PQ20

D
D
D
D

2
1

1
SI4800BDY-T1-E3_SO8 SI4800BDY-T1-E3_SO8
2

G
S
S
S
PR77

PR78

PR76
PC46
0.1U_0402_16V7K

4
3
2
1
G
S
S
S
DH_3V

0.1U_0603_25V7K 1
1
2
3
4

2
PR79

2.2U_0805_25V6K

2.2U_0805_25V6K
0_0603_5%

5
6
7
8
DH_5V 1 2 VL
2VREF_8734

D
D
D
D
1

PC48
4.7U_0805_6.3V6K

PC134

PC47

200K_0402_1%

200K_0402_1%
PQ22
8
7
6
5

2
SI4810BDY-T1-E3_SO8

G
S
S
S
1U_0603_6.3V6M

PR80

PR81
PQ23
D
D
D
D

SI4810BDY-T1-E3_SO8

4
3
2
1
1
PC49
DH_5V-1

PC50
C C

1
G
S
S
S

2
1
2
3
4

1
1

PC51

18

20

13

17

2
340K_0402_1%

340K_0402_1%
PL4 0.1U_0603_25V7K PU6

2
PR83
4.7U_LF919AS-4R7M-P3_5.2A_20% 2 1 2 PR82 1 BST_5V-1
14

V+
LD05

TON

VCC
BST5

PR84
0_0603_5% 5 ILIM3 PR85
ILIM3 0_0603_5%
16
+5VALWP DH5
2

1
LX_5V 15

1
DL_5V LX5 ILIM5 PC52
19 DL5 ILIM5 11
21 0.1U_0603_25V7K
OUT5

1
FB5 9 28 BST_3V-1 2 PR86 1 2 1
FB5 BST3 DH_3V-1 0_0603_5%
PD12 1 N.C. DH3 26
10.5K_0402_1%

PR87 24 DL_3V
DL3 LX_3V PL5
VS 1 2 1 2 6 SHDN# LX3 27
2

4 22 4.7U_LF919AS-4R7M-P3_5.2A_20%
ON5 OUT3
2.2U_0805_25V6K
PR88

47K_0402_1% 3

2
RLZ5.1B_LL34 PR89 ON3 FB3
FB3 7
150U_V_6.3VM_R18

1
35,37 PACIN
1 2 12 SKIP# PGOOD 2 +3VALWP
1

PC54

10K_0402_1%
1

PRO#
PC53

6.81K_0402_1%
+

LDO3
8

GND
REF

2
PR90
2VREF_8734
2

PR91
100K_0402_1% POK 36
2
1
2

23

25

2 10
@ MAX8734AEEI+_QSOP28
2

0.22U_0603_10V7K

4.7U_0805_6.3V6K
6.81K_0402_1%

+ PC55

1
1
PR92

150U_V_6.3VM_R18

1
PC56

PC57
PR93
VL

2
B 2 B
0_0402_5%

2
1

PR94
10K_0402_1%
1
806K_0603_1%
1

1
PR95
2

PR96
0_0402_5%
2 1
35,36 MAINPWON
1

PC58
0.047U_0603_16V7K
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title
+5V/+3V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0

WWW.AliSaler.Com
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 38 of 44
5 4 3 2 1
 A B C D

PJ11
2 1 B+
2 1

1
@ JUMP_43X118

1
PC59 PC60 PR97

1
4.7U_1206_25V6K 4.7U_1206_25V6K 0_1206_5%
PC61 PC62

2
4.7U_1206_25V6K 4.7U_1206_25V6K

2
1
+5VALWP 1

2
PC63

1
4.7U_0805_6.3V6K PC64 PR98 PC65
0.1U_0603_25V7K 2.2_0603_5% 2.2U_0805_10V6K

2
PD13

1
DAP202U_SOT323

3
8
7
6
5
BST_1.5V-1

D
D
D
D
+1.8V PQ24

BST_1.8V-1
SI4800BDY-T1-E3_SO8
PC66 PC67

14

28
G
S
S
S
+1.8VP 0.01U_0402_25V7K PU7 0.01U_0402_25V7K

5
6
7
8
PL6 2 1 12 SOFT1 17 2 1

VIN

VCC
1
2
3
4
1.8U_D104C-919AS-1R8N_9.5A_30% DH_1.8V-2 SOFT2

D
D
D
D
1 2 LX_1.8V PC68 PC69 PQ25
0.1U_0402_16V7K 0.1U_0402_16V7K SI4800BDY-T1-E3_SO8
1 2 1 1 2BST_1.8V-2 6 23 BST_1.5V-2
1 2 2 1
BOOT1 BOOT2
+1.5V
2

G
S
S
S
PR99 PR100
+ PC70 PR101 0_0603_5% 0_0603_5%

4
3
2
1
8
7
6
5
220U_6.3V_M_R13 4.7_1206_5%
1 2 DH_1.8V-1 5 24 DH_1.5V-1 1 2 DH_1.5V-2 PL7 +1.5VSP

D
D
D
D
2
1
PR102 UGATE1 UGATE2 PR103 1.8U_D104C-919AS-1R8N_9.5A_30%
1

PQ26 0_0603_5% 4 25 0_0603_5% LX_1.5V 1 2

PHASE1 PHASE2
1

PR104 PC71 SI4810BDY-T1-E3_SO8

2

2
G
S
S
S
10.2K_0402_1% 0.01U_0402_25V7K PR106 PR107

5
6
7
8
2
PC72 2K_0402_1% 2K_0402_1% PR105 2
2

1
2
3
4
2

680P_0603_50V8J 1 2 ISE_1.8V 7 22 ISE_1.5V 1 2 4.7_1206_5% 1

D
D
D
D
2

ISEN1 ISEN2

1
PR108 DL_1.8V 2 27 PQ27 PR109 + PC73

2 1
LGATE1 LGATE2

1
0_0402_5% SI4810BDY-T1-E3_SO8 0_0402_5% PC74 PR110 220U_6.3V_M_R13

G
S
S
S
PC75 0.01U_0402_25V7K 6.81K_0402_1%
1

680P_0603_50V8J 2

4
3
2
1

2
3 26

1
PGND1 PGND2 DL_1.5V

9 VOUT1 VOUT2 20
VSE_1.8V 10 19 VSE_1.5V
VSEN1 VSEN2
1 2 8 EN1 EN2 21 1 2
25,29,31,33 SYSON PR111 15 16 PR112 SUSP# 17,25,29,31,32,34,40
0_0402_5% PG1 PG2/REF 24K_0402_1%

GND

DDR
11 OCSET1 OCSET2 18
1

1
2

1
PR113 ISL6227CAZ-T_SSOP28 PR114 PR115

13
1

1
10K_0402_1% PR116 PC76 @ 0_0402_5% 10K_0402_1%
@ 0_0402_5% @ 0.1U_0402_16V7K PR118 PR117 PC77
100K_0402_1% 100K_0402_1% 0.1U_0402_16V7K
2

2
1

2
2

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title
1.8V / 1.5V

WWW.AliSaler.Com
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 39 of 44
A B C D
 5 4 3 2 1

PJ12
2 1 6269_B+
B+ 2 1
@ JUMP_43X118 6269_VCC

1
PHASE_VCCPP

1
PR119 UG_VCCPP_1
PC78 PC79 1K_0402_1%
10U_1206_25VAK 10U_1206_25VAK PR120 PC80

2
1 2 1 2

2
41 PGD_IN 0_0603_5% 0.1U_0603_25V7K
D +5VS PR121 D
0_0603_5%

1
BOOT_VCCPP
PR122

1
@ 0_0603_5%

5
6
7
8
17

16

15

14

13
PU8 PQ28

D
D
D
D
2
1 PR123 2 6269_VCC

BOOT
GND

PGOOD

PHASE

UG
4.7_0603_5%

G
S
S
S
1 VIN PVCC 12 1 2
SI4800BDY-T1-E3_SO8

4
3
2
1
6269_VCC PC81
2.2U_0603_6.3V6K UG_VCCPP_2

1
LG_VCCPP PL8
PC82 PR124
2 VCC LG 11 +1.05V
1.8U_D104C-919AS-1R8N_9.5A_30%
2.2U_0603_6.3V6K @ 0_0402_5% 1 2 +1.05VSP

2
PR125
0_0402_5% 3 10 1

2
FCCM PGND

5
6
7
8

1
1 2 PQ29
PR187 + PC83

D
D
D
D
PR127 SI4810BDY-T1-E3_SO8 4.7_1206_5% 220U_D2_4VM_R15
SUSP# 1 2 4 9 ISEN_VCCPP
1 2
17,25,29,31,32,34,39 SUSP# EN ISEN 2

2
COMP

G
S
S
S
PR126 8.25K_0402_1%

FSET
1

24K_0402_1%

VO
FB

4
3
2
1

1
PC84
0.1U_0402_16V7K PC136
2

8
ISL6269CRZ-T_QFN16 680P_0603_50V8J

2
C C

57.6K_0402_1%

1
PR129
1
PC86 PR128 PC85
22P_0402_50V8J 49.9K_0402_1% 0.01U_0402_25V7K

2
2

2
1 PC87
6800P_0402_25V7K PR130
2

2.26K_0402_1%
1 2

1
PR131
3K_0402_1%
2

+1.8V

1
PJ13

1
@ JUMP_43X79

2
PU9

2
B 1 6 B
VIN VCNTL +3VALW
2 GND NC 5

1
+3VALW

1
PC88 3 7 PC89
10U_1206_6.3V7K PR132 VREF NC 1U_0603_6.3V6M

2
1K_0402_1% 4 8
+5VALW VOUT NC
1

2
PJ14 TP
1

JUMP_43X79 APL5331KAC-TRL_SO8~N
1

1
2

PC90 PR134 +0.9VSP

1
0_0402_5% PQ30 D PR133
2

1U_0603_6.3V6M 1 2 2 1K_0402_1% PC91

2

1
34 SUSP G 0.1U_0402_16V7K
RHU002N06_SOT323

2
1
S PC92

2
6

PU10 PC93 10U_1206_6.3V7K

2
5 PC94 @ 0.1U_0402_16V7K
VCNTL

2
VIN 22U_1206_6.3V6M
7
2

POK
VOUT 4
PR135
VOUT 3 +2.5VSP
@ 0_0402_5% 1
1

SUSP# 1 2 8 2
EN FB
1

22U_1206_6.3V6M

PR136 + PC96
GND

PC95

9 PC97 @ 150U_D_6.3VM
2

VIN
1

2.15K_0402_1%
2

PC98 2
1

@ 0.01U_0402_25V7K
2

APL5912-KAC-TRL_SO8
1

A 0.01U_0402_25V7K A

PR186 PR137
1

11K_0402_1% D 1K_0402_1%
1 2 2 PQ37
2

34 SUSP G
S RHU002N06_SOT323
3
1

PC132 Security Classification Compal Secret Data Compal Electronics, Inc.

0.1U_0402_16V7K 2006/04/22 2009/04/22 Title
Issued Date Deciphered Date
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
2.5V / 0.9V / 1.05V

WWW.AliSaler.Com AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 40 of 44
5 4 3 2 1
 5 4 3 2 1

+5VS

2
CPU_VID6

CPU_VID5
CPU_VID4

CPU_VID3

CPU_VID2

CPU_VID1

CPU_VID0
5

5
PR138 +CPU_B+
PL9

31
VR_ON
1_0603_5%
FBMA-L18-453215-900LMA90T_1812
1 2 B+

10U_1206_25VAK

10U_1206_25VAK
1 1

10U_1206_25VAK
1U_0603_6.3V6M
D D

1
PC100

PC101

PC102
0.01U_0402_25V7K

0.01U_0402_25V7K
PR139 0_0402_5% + + PC135

1
PC104

PC105
1U_0603_6.3V6M
7,20 DPRSLPVR 1 2 PC99 PC133 680P_0603_50V8J

1
PC103

PC106
100U_25V_M 100U_25V_M

2
PR140 0_0402_5% 2 2

2
PR142

PR143

PR144

PR145

PR146

PR147

PR148
PR149
19,1 H_DPRSTP# 1 2

5
PR141 0_0402_5% PQ31
15 CLK_ENABLE# 1 2 SI7840DP-T1-E3_SO8

1
1

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%
0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%
PR150 0_0402_5%
+3VS 1 2 UGATE_CPU1-2 4

+3VS

1U_0603_6.3V6M

2
2
1.91K_0402_1%
0_0603_5% 0.22U_0603_10V7K

1
PC107
PR151 PC108 0.36UH_MPC1040LR36_24A_20%

3
2
1
1
BOOT_CPU1 1 2 1 2 2 1 +CPU_CORE
2

4.7_1206_5%
PR152

PR153

5
6
7
8

5
6
7
8

1
3.65K_0805_1%

10K_0402_1%
PL10

PR155

PR156

PR157
499_0402_1% PR158

49

48

47

46

45

44

43

42

41

40

39

38

37
1 2
0_0603_5% 1_0402_5%
2

PR154 PQ32

3V3

CLK_EN#

DPRSTP#

VID6

VID5

VID4

VID3

VID2

VID1

VID0
GND

DPRSLPVR

VR_ON
1

680P_0603_50V8J
PQ33

1 2

2
1 36 4 4 @ PR159 @ 0_0603_5%
15,20,31 VGATE PGOOD BOOT1

PC109
1 2
5 H_PSI# 2 35 UGATE_CPU1-1 VSUM PC110
PSI# UGATE1
1 2

2
40 PGD_IN 3 34 PHASE_CPU1 VCC_PRM

3
2
1

3
2
1
PR160 147K_0402_1% PGD_IN PHASE1 ISEN1
1 2 4 33 0.22U_0603_10V7K
RBIAS PGND1 IRF8113PBF_SO8 IRF8113PBF_SO8 @
VR_TT# 5 32 LGATE_CPU1 +CPU_B+
C VR_TT# LGATE1 C

10U_1206_25VAK

10U_1206_25VAK
PR161 @ 4.22K_0402_1% PH3

1
1 2 1 2 6 NTC PVCC 31

PC111

PC112
PQ34
@ 100K_0603_1%_TH11-4H104FT 7 30 LGATE_CPU2 SI7840DP-T1-E3_SO8

2
SOFT LGATE2
1 2
@ 0.015U_0402_16V7K PC113 8 29
0.033U_0603_25V7K PC114 OCSET ISL6262CRZ-T_QFN48 PGND2
4
1 2 9 28 PHASE_CPU2
VW PHASE2 PR162
PR163 13K_0402_1% 10 27 UGATE_CPU2-1 1 2 UGATE_CPU2-2 0.36UH_MPC1040LR36_24A_20%
COMP UGATE2 0_0603_5%
1 2

3
2
1
11 26 BOOT_CPU2
1 2 1 2 2 1
FB BOOT2 PR164 PL11
1 2

5
6
7
8

5
6
7
8

1
1000P_0402_50V7K PC116 0_0603_5% PC115
DROOP

12 FB2 NC 25

1
VDIFF

ISEN2

ISEN1
VSUM

10K_0402_1%
VSEN

PR166 4.42K_0402_1% 0.22U_0603_10V7K PR165

GND

VDD
RTN

DFB

1
VIN

3.65K_0805_1%

PR167
PQ35 PQ36 @ 4.7_1206_5% PR169
VO

1 2

PR168
1 2 PU11
13

14

15

16

17

18

19

20

21

22

23

24

1 2
4 4 1_0402_5%

2
PC117 47P_0402_50V8J

2
ISEN1 PC118 PR170 @ 0_0603_5%
ISEN2 @ 680P_0603_50V8J 1 2

2
2

PR172 61.9K_0402_1% PC119 0.033U_0402_16V7K 1 2 +5VS

3
2
1

3
2
1
1

1 2 2 1 PR173 VSUM PC120

1

@ 0_0402_5% PR171 1_0603_5% 1 2

PR174 PC121
1 2 1U_0402_6.3V4Z
1

@ 0_0402_5% IRF8113PBF_SO8 IRF8113PBF_SO8 0.22U_0603_10V7K

2

PC122 390P_0402_50V7K VCC_PRM

PR176 ISEN2
3.4K_0402_1% PC123 470P_0402_50V7K 10_0603_5%
B 1 2 1 2 1 2 B
+CPU_B+
1

PR1751 2 PC124
0.1U_0603_25V7K
PR177 1.82K_0402_1%
2

PC125 0.018U_0603_50V7J
5 VCCSENSE 1 2 1 2
VSUM
1

PR178 0_0402_5%
1

2.61K_0402_1%

PC126 PC127
PR180

+CPU_CORE 1 2 @0.018U_0603_50V7J 0.018U_0603_50V7J

2

PR179 @ 20_0402_5% 1 2
5 VSSSENSE PR181 0_0402_5%
2
1

11K_0402_1%

PC128 180P_0402_50V8J
PR183

PR182 1 2
2

10KB_0603_5%_ERTJ1VR103J
@ 20_0402_5% 1 2 1 2 PH4
2

PR184 1K_0402_1% PR185 3.9K_0402_1%

PC129 0.068U_0402_10V6K
1

VCC_PRM 1 2

PC131 0.22U_0402_6.3V6K
PC130 2 1 2 1
0.22U_0603_10V7K

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+CPU_CORE

WWW.AliSaler.Com AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 41 of 44
5 4 3 2 1
 POWER PIR LIST
page Reason for change Modify list
EVT->DVT
40 Add 680P at B+ for EMI Add 680P_0402_25V at B+
38 Change 1.5V sequence for HW Change PR112 from 22K_0402_1% to 24K_0402_1%
39 Change 2.5V sequence for HW Unpop PR135,PC98
Pop PR186=11_K0402_1%, PQ37, PC132=0.1u_0402_16V

39 Change 2.5V sequence for HW Change PR104 from 10K_0402_1% to 10.2K_0402_1%

38 Adjust 3V/5V OCP to 8A Change PR80,PR81 to 200K_0402_1%, PR83,PR84 to 340K_0402_1% , PL4,PL5 to 4.7uH

41 Adjust CPU loadlone Change PC119 to 33n_0402_16V, PR185 to 3.9K_0402_1%

DVT->PVT
40 Add snubber at 1.05V Add 4.7_1206_5% and 680P_0603_50V at PR187,PC136
41 Adjust switching frequence Change PC117 from 5600P to 47P_0402_50V
for intersil suggest Change PR166 from 3.57K to 4.42K_0402_1%

40 Adjust 1.05 OCP to 8A Change PR127 from 11.5K to 8.25K_0402_1%

PROPRIETARY NOTE
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 02, 2006 Sheet 42 of 44

WWW.AliSaler.Com
 HW4 Product Improvement Record (P.I.R.)
Phase: A to B Date: 2006/01/04 Writer: Lion Wang
Page# Action Plan Location or Before value After value
(add; del; change) Net_List (Attached file) (Attached file) Detail Discretion and Root Cause Rev. DL/DM Check
22,23 none none change TI8412 to ENE 714 for CB & 5in1 function 0.2

24 none none change TI8412 to VIA6311S for 1394 function 0.2

28 Add C606,C607 Add for EMI request 0.2

28 Add L32 Add for EMI request 0.2

31 Unmount R171,R185 update after check ENE FAE 0.2

R365,R368
31 Change 1K_5%_0402 10K_5%_0402 update after check ENE FAE 0.2
R187,R194
31 Change L33 Bead 0_5%_0603 update after check ENE FAE 0.2

19 Change JP22 change HDD CONN.

0.2

31 Change R142 0_5%_0402 8.2k_5%_0402 update BID from REV0.1 to REV0.2 0.2

29 change U27,D38 ,D39 connect from GND to AGND 0.2

26 Del L33 LAN PCIE detect issue cause system boot black screen 0.2

29 Change SW4 Change VR to Rock Type switch 0.2

29 Change R514,R517,R516 Change AMP HP gain from -6 dB to 0 dB 0.2

28 Add Q44,R507,R498 0.2

Add for MIC Jack present function
C672,R499
change R10,R11 connect to U30 PIN7 & PIN10 to 0.3
26 Change R10,R11
fix 10/100 Lan cannot connect issue

change ODD_RST# from GPIO 24 to GPIO34

20 Change 0.3

24 Change delete R508~R511 and add L39 & L40 for EMI request 0.3

0.3

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS HTW20 M/B LA-3171P 1.0

WWW.AliSaler.Com MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, May 03, 2006 Sheet 43 of 44
 5 4 3 2 1

HTW20 LA-3171P SCHEMATIC CHANGE LIST

REVISION CHANGE: 0.3 TO 0.4 U5

LAN
NO DATE PAGE MODIFICATION LIST PURPOSE
------------------------------------------------------------------------------------------------------------- RTL8101E
100M@

1 0327 29 REMOVE C680,R516,R518 MODIFY VOL_AMP FUNCTIONAL CIRCUIT U30

REMOVE SW4
D D

TRANSFORMER
REMOVE CONNECTION OF VOL_UP,VOL_DOWN,VOL_MUTE,KSO17 TST1284-LF

ADD CONNECTION OF NBA_PLUG ON U39.13 ADD VR CIRCUIT 100M@

ZZZ1
ADD R529_3.9K_0402_5%,R530_100K_0402_5%,R531_4.3K_0402_5%
PCB
R532_4.3K_0402_5%,Q62,Q63
RESERVE C698_0.1U_0402 PCB ZKU LA-3171P REV0

2 0327 28 RESERVE R533 CONNECT BETWEEN AMP_LEFT_HP & LEFT_HP MODIFY EARPHONE GAIN CONTROL U31

RESERVE R534 CONNECT BETWEEN AMP_RIGHT_HP & RIGHT_HP CIRCUIT

Card BUS
29 ADD R535 CONNECT BETWEEN INTSPK_R1 & AMP_RIGHT_HP
CB 1410
ADD R536 CONNECT BETWEEN INTSPK_L1 & AMP_LEFT_HP 1410@

3 0327 28 ADD C699_100P_0402 ON +3VS_DVDD FOR EMI PURPOSE U16

ADD C700_100P_0402 ON +AVDD_AC97

SB
C
ADD C702_1U,C703_100P ON U38 PIN 16,17,18,19,20,23,24 C
ICH7
ADD C704_100P_0402 ON MIC1_C_L ICH7R1@

ADD C705_100P_0402 ON MIC1_C_R

U6 U6
ADD C706_100P_0402 ON MONO_IN
NB
ADD C707_100P_0402 ON ACZ_VREF
ADD C708_100P_0402 ON ACZ_JDREF 945GM
GMR3@
945GM
GMR1@

ADD C709_100P_0402 ON +MIC1_VREFO_R

ADD C710_100P_0402 ON +MIC1_VREFO_L
HTW20 LA-3171P SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.4 TO 1.0

NO DATE PAGE MODIFICATION LIST PURPOSE

-------------------------------------------------------------------------------------------------------------
B
1 0417 33 ADD R537 10_0402 AND C711 10P_0402 ON CLK_PCI_SIO2 PREVENT PCI CLOCK TRACE FLOATING B

2 0419 16 CHANGE L26,L25 TO 39_0402 BASE ON INTEL CRB SCHEMATIC TO DO

CHANGE C411,C413 TO RESERVED MODIFICATION (CRB REV:1.601)
3 0419 29 CONNECT VR1.1,VR1.2 TO AGAD BASE ESD TEST RESULT, CONNECT TO AGND
TO PASS ESD TEST
4 0419 29 CHANGE L7,L8,L9,L10 TO BEAD 39OHM@100MHZ TO SOLVE 3G NOISE ISSUE
CHANGE C395,C399 TO 10P_0402
28 CHANGE C388,C389 TO 10P_0402
4 0426 06 Add C122,C537 to 330UF TO SOLVE ESD ISSUE

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/04/22 Deciphered Date 2009/04/22 Title
ISPD
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

WWW.AliSaler.Com
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HTW20 M/B LA-3171P
Date: Tuesday, May 02, 2006 Sheet 44 of 44
5 4 3 2 1