Technical Report on the Seminar on

“BOOLEAN ALGEBRA AND ITS

APPLICATION”
Submitted for the partial fulfillment
for the Award of the degree of

Master Of Science
IN MATHEMATICS

By
KOMAL MISHRA
Under the guidance of
DR. R.K. PANDEY

Department of Mathematics & computer Science

School of Basic Sciences, Babu Banarasi Das University
Lucknow (226 028), Uttar Pradesh, India
Academic Year : 2021-2022
 Technical Report on the Seminar on

“BOOLEAN ALGEBRA AND ITS

APPLICATION”
Submitted for the partial fulfillment
for the Award of the degree of

Master Of Science
IN MATHEMATICS

By
KOMAL MISHRA
Under the guidance of
DR. R.K. PANDEY

Professor, Department of Mathematics & Computer Science,

School of Basic Science, Babu Banarasi Das University,
Lucknow

Department of Mathematics & computer Science

School of Basic Sciences, Babu Banarasi Das University
Lucknow (226 028), Uttar Pradesh, India
Academic Year : 2021-2022
 DECLARATION

I hereby declare that Technical Report entitled “BOOLEAN ALGEBRA AND ITS
APPLICATION” is Based on my Seminar course (course code MMS13) and has
been written by me under the supervisor of Dr. R.K. PANDEY, PROFESSOR,
Department of Mathematics & computer Science, School of Basic Science, Babu
Banarasi Das University, Lucknow. This work has not been previously formed the
basis for the award of any degree of diploma or certificate nor has been submitted
elsewhere for the award of any degree of diploma. Further, the content of this report
is not being presented by any other student to this or any other University for the
award of a degree.

KOMAL MISHRA
M.Sc. (Mathematics)-Third Semester (2021-22)
University Roll No.

29 November 2021
 CERTIFICATE

Certified that the Technical Report entitled “BOOLEAN ALGEBRA AND ITS
APPLICATION” based on the Seminar (Course Code MMS13), is a bonafide work
carried out by KOMAL MISHRA, Student of M.Sc. (Mathematic)- Third Semester
(University Roll No.) under my supervisor in partial fulfillments for the award of the
degree of Master Science in mathematic of Babu Banarasi Das University, Lucknow,
Uttar Pradesh India.

Dr. MANOJ KUMAR MISHRA

Professor
Babu Banarasi Das University, Lucknow

29 November 2018

1.
 CONTENTS
o INTRODUCTION

o NOTATION, SYMBOLS AND OPERATIONS

o LAWS OF BOOLEAN ALGEBRA

o USE OF BRACKETS

o NAND GATES

o READING A COMPOUND STATEMENT GIVEN ITS

TRUTH TABLE

o MANIPULATION OF COMPOUND BOOLEAN

STATEMENTS

o SIMPLIFICATION OF COMPOUND BOOLEAN

STATEMENTS
o APPLICATIONS TO THE DESIGN OF LOGIC CIRCUITS

o THE USE OF “DON’T CARE” CONDITIONS

o BOOLEAN ALGEBRA: SUMMARY OF IMPORTANT

SKILLS
o BOOLEAN ALGEBRA– PROBLEMS
o REFERENCE
 1. BOOLEAN ALGEBRA
INTRODUCTION

In the previous chapter, we introduced binary numbers and

binary arithmetic. As you saw in binary arithmetic and in the
handling of floating-point numbers, there is a need for
accurate specification of procedures and schemes for
manipulating and interpreting binary numbers! This chapter
will begin to address how binary numbers are manipulated
in a systematic manner by a computer. The principles of
such manipulation are called Boolean Algebra, which is the
foundation of digital logic circuit design and analysis. This
algebra is conceived to handle variables, known as
statements, each of which can take on one of two values, and
on which operations are performed according to prescribed
rules.

For example, let us model our thinking processes in the

adding of two binary digits. A brief examination of this
simple problem leads us to consider all possible cases, since
there are not too many of them. The two binary (input)
digits will be called A0 and B0. The result (output) of the
addition is represented by a sum-bit and a carry-bit, which
we shall call S0 and C1, respectively. There are four
possibilities of combinations of the two binary inputs. For
each of these possibilities, we will specify the outputs:
Inputs
Outputs A0 B0
C1 S0
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0

This table represents all that one needs to know about the
specific task of adding exactly two (not more!) single-digit
binary numbers. We can now examine and attempt to
describe the functional (see a later chapter for a formal
definition of a
“function”), relationship between the inputs and outputs. A
little thought will lead to the following conclusions:
C1 is 1 only if both A 0 and B0 are 1, otherwise it is 0
S0 is 1 only if either A0 or B0 are 1, but not both
In this chapter, we will introduce algebraic operators, such as
“and”, “or”, “not” and “exclusive-or”, which allow us to
systematically build such sets of functional specifications. For
the simple case of two single-digit binary numbers, this may
not seem necessary, but becomes very useful even for slightly
more complex situations. The example below (called the “full-
adder”, briefly explained in the previous chapter), brings only
one more variable, the carry digit from the next-less-significant
binary addition operation, so that now we are adding exactly
three single-digit binary numbers, represented by Ai, Bi , and
Ci. Now we need to consider 8 possible cases of input, because
23 = 8. We still need only 2 output bits, because the sum of three
single-digit binary numbers can be no more than 3, which is
represented by Ci+1=1 and Si=1. How shall we organize the
eight cases? The simplest and most convenient way is to count
from 0 to 7, arranging the input digits to represent the case-
number, as shown in the table below:
Inputs Outputs
Case # Ai Bi Ci Ci+1 Si
0 0 0 0 0 0
1 0 0 1 0 1
2 0 1 0 0 1
3 0 1 1 1 0
4 1 0 0 0 1
5 1 0 1 1 0
6 1 1 0 1 0
7 1 1 1 1 1

In this full-adder example, the specification of the output is

much more laborious and complicated than in the previous
two-digit example:
Si := 1 if [(Ai is 0) and (Bi is 0) and (Ci is 1)]
or [(Ai is 0) and (Bi is 1) and (Ci is 0)]
or [(Ai is 1) and (Bi is 0) and (Ci is 0)] Note the
or [(Ai is 1) and (Bi is 1) and (Ci is 1)] two levels
of brackets

Ci+1 := 1 if [(Ai is 0) and (Bi is 1) and (Ci is 1)]

or [(Ai is 1) and (Bi is 0) and (Ci is 1)]
or [(Ai is 1) and (Bi is 1) and (Ci is 0)]
or [(Ai is 1) and (Bi is 1) and (Ci is 1)]

Of course, one can also look for logical patterns in such a set of
specifications, such as:

Ci+1 := 1 if [(Ai is 0) and (Bi is 1) and (Ci is 1)]

or [(Ai is 1) and [(Bi is 1) or (Ci is 1)]]
Note the three levels of brackets.

There are several possible representations of each of Si and

Ci+1. Efficient representation, simplification and manipulation
of logical expressions such as these is the main subject of this
chapter on Boolean Algebra.

NOTATION, SYMBOLS AND OPERATIONS

PRIMITIVE STATEMENT: Typically, capital letters (such as A,B,C)

denote statements (also called variables). In a logic circuit, a
statement could mean that a voltage at a designated point is
above a certain threshold level. We assign to A, the value of 1
when A is true, namely when the voltage is above the threshold
level, and the value of 0 when A is false, namely when the
voltage is below the threshold level. Symbolically, we write A =
1 or A = 0. Some texts use the symbols T and F instead of 1 and
0.
There are three basic operations known as NOT, AND and OR.
As well, there is an additional commonly-used operation
known as the exclusive-OR (also called the “half-adder”),
which can be expressed in terms of the three basic operations.
We will define these operations, introduce the notation used in
Boolean algebra and give the graphical symbols used in logic
circuits.

NOT: (for example “NOT A”; written as A’ orA) This

operation on A simply inverts the assignments of 1 and 0.

AND: (for example “A AND B”; written as AB): This operation

compares the values of A and B and assigns 1 as a result if both
A and B are true or 0 if A or B or both A and B are false.

OR: (for example “A OR B”; written as A+B, meaning “A or B

or both”): This operation compares the values of A and B and
assigns 1 as a result if A is true or B is true or both are true,
and assigns 0 if both A and B are false.

These definitions are summarized below in a special kind of

table known as a Truth Table. Each line (row) of a truth table
specifies the output “truth value” for a particular combination
of truth values of the input Boolean statements (variables).

A A' A B AB A+B
0 1 0 0 0 0
1 0 0 1 0 1
1 0 0 1
1 1 1 1

Note the similarities to familiar arithmetic operations. It is also

crucial to note the difference: 1+1 = 1 and not 10, (or 0 if one
drops the leading 1 as one would in modulo 2 (binary
arithmetic). There are related differences in the associated
algebra: A + A = A; 1 + A = 1; AA = A.
A commonly-used derived operation, Exclusive OR, is defined
as follows.

EXCLUSIVE OR, or XOR, also known as the Half-adder: (for

example “A EXCLUSIVE-OR B”; written as AB, meaning “A
or B but not both”). This operation compares the values of A
and B and assigns 1 as a result if A or B (but not both), is true
and assigns 0 if both A and B are true or both A and B are false.
The truth table equivalent of the definition is:

A B AB
0 0 0
0 1 1
1 0 1
1 1 0

We call this a derived operation because, as is demonstrated in

the truth table below, it can be written as a combination of basic
operations, namely,

AB = A’B + AB’.

A B A’ B’ A’B AB’ A’B+AB’

0 0 1 1 0 0 0
0 1 1 0 1 0 1
1 0 0 1 0 1 1
1 1 0 0 0 0 0

COMPOUND STATEMENT: A compound statement is one that

can be written as a combination of primitive statements. The
XOR operation is an example of a compound statement.
LOGIC GATE SYMBOLS: These are symbols for integrated
circuits, known as gates, which carry out the electrical
equivalents of Boolean operations. Inputs and outputs consist
of voltages. When voltages are above or below a preset
threshold level, then these are equivalent to the Boolean values
of 1 or 0.
DERIVED
BASIC OPERATIONS OPERATION
NOT AND OR XOR
A A' A A A
AB A+B A'B + AB'
B
B B
A

Also NAND B'

AB’
A B

known A
(AB)' B
A'
A’B

as an made from XOR circuit

inverter an AND made up of
gate and an NOT, AND and
inverter OR gates
One way of looking at the two basic connectives, AND and OR,
is to use the switch analogy. We have two switches, p and q,
which control a light bulb. If these two switches are in series,
then they must both be closed if the bulb is to light. This is p and
q (pq). If the two switches are in parallel, then if either one or
both are on, the bulb will light. This is p or q (p+q).

and: or:
p q p

In a bi-stable switch, an input

“p” can be stably connected to
either of two output lines, one
called “p” and the other called
“not-p”. (Note that the
symbolism p means the
same as p’.)
LAWS OF BOOLEAN ALGEBRA

Each of the laws stated below can be proven through the use of
truth tables. These should be examined carefully. While some
of them are the same as the laws of ordinary algebra, some of
them are not. In particular, one should note De Morgan’s laws,
the first distribution law, the idempotency laws, the first
domination law and the absorption laws.

1. A'' = A Double Complement

2. (AB)' = A'B' De Morgan
(AB) ' = A'B'
3. AB = Commutation
BA AB =
BA
4. (AB) C = ABC) Association
(AB) C = ABC)
5. ABC) = (AB)AC) Distribution
ABC ) = (AB)  AC)
6. AA = A Idempotency
AA = A
7. A = A Identity
A1 = A
8. AA' = 1 Inverse
AA' = 
9. A1= 1 Domination
A= 
10. A AB) = A Absorption
AAB) = A

For example, in Boolean Algebra, the first distribution law

indicates that 1 + (1)(1) is equivalent to (1 + 1)(1 + 1) = (1)(1) = 1,
while in ordinary algebra, 1+(2)(3) = 7 is not equivalent to (1+2)
(1+3) = (3)(4) = 12.
 As an example, we prove De Morgan’s laws.

A B A’ B’ A+B (A+B)’ A’B’ AB (AB)’ A’+B’

0 0 1 1 0 1 1 0 1 1
0 1 1 0 1 0 0 0 1 1
1 0 0 1 1 0 0 0 1 1
1 1 0 0 1 0 0 1 0 0

THE PRINCIPLE OF DUALITY

Except for the law of double complement, all of the above laws
appear in pairs. The pairs are called duals of each other.

In general, given any compound statement S, one can obtain its

dual Sd as follows:
 Replace each AND by an OR and each OR by an AND.
 Replace each 0 by a 1 and each 1 by a 0.

Example: If S = AB’C’ + A’BC,

then Sd = (A + B’ + C’)(A’ + B + C).
Note: There is no reason in general to expect S to equal Sd.
There is also no reason in general to expect S to be
the negation of Sd.

USE OF BRACKETS
Without brackets, the order of operations is negation (‘),
conjunction (and) and finally, disjunction (+). Brackets should be
used whenever we wish to change the order or where there
could be any ambiguity of interpretation. Where there are sets of
nested brackets, operations on pairs of inner brackets are
executed ahead of those on pairs of outer brackets. For example,
the meaning of P+Q’ is "P or (not Q)" while (P+Q)’ means "not (P
or Q)".

Note that the variables A,B,C, … P,Q can each represent any
Boolean expression (single variable or compound statement).
 It can be shown, by using the Laws of Boolean Algebra, that the
XOR operation is commutative and associative, namely that:
AB = BA and that A(BC) = (AB)C. We can therefore
without loss of clarity omit the brackets and write ABC.

A(BC)
= A’(BC’ + B’C) + A(BC’ + B’C)’ definitions
= A’(BC’ + B’C) + A[(BC’)’ (B’C)’] deMorgan
= A’(BC’ + B’C) + A[(B’+C) (B+C’)]deMorgan
= A’(BC’ + B’C) + A[B’B+B’C’+CB+CC’] distributive
= A’(BC’ + B’C) + A[0+B’C’+CB+0]inverse
= A’(BC’ + B’C) + A[B’C’+CB] identity
= A’BC’ + A’B’C + AB’C’+ABC distributive
= A’BC’ + AB’C’ + A’B’C + ABC commutative
= (A’B + AB’)C’ + (A’B’ + AB)C distributive
= (AB)C’ + (AB)’C definitions

Note: it can be easily shown that*:

(AB)’ = (A’B+AB’)’ = A’B’ +
AB.

* In our treatment on logic we will define the derived operation “if and only if” with a special
symbol , so that (AB)’ = AB
NAND GATES

It should be noted that the most common integrated circuit

implementation of logic gates is through the interconnection of
what are known as NAND gates since these have the best
operational performance characteristics. A NAND gate has the
same symbol as the AND gate with the addition of a small
circle at the front end. It implements (AB)’. We now show how
each of the four Boolean operations can be realized using
NAND gates alone.

Note that a NAND gate with both inputs connected together

(left-most column) behaves as an inverter.

NOT AND OR XOR

A A'

A
B'
A A' (AB’)'

which is A
B
(AB)'
(AB)'' = AB B'
A'
(A’B)'
AB

B (A'B')' = A+B
the same B

as
A A'

AB = ((AB)’)’ A+B = (A’B’)’ (A’B+AB’) =

(by double- (by deMorgan) (A’B+AB’)’’ =
negation) [(A’B)’(AB’)’]’
READING A COMPOUND STATEMENT GIVEN ITS TRUTH TABLE

Often, we are given specifications for a logic circuit in the form

of a truth table. To convert this to a compound statement, we
note the combinations of input values for which the statement
is true, (has a value of 1), and write the statement as the
Boolean “sum of products” of the primitives which make it
true.

Ex. 1: We are given the following truth table, which specifies

the output, F, in terms of three input variables A,B,C. Since
there are three input variables, a complete specification requires
23 = 8 rows.

Inputs Output
A B C F
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1

The second row is the first instance where F = 1. Here, A=0

(A’=1), B=0 (B’=1), and C=1. The contribution of this row is thus
A’B’C. Continuing in this fashion for the other three 1’s in the F
column, we get the complete statement:
F = A’B’C + A’BC’ + AB’C’ + ABC.

In words, this means: “The Boolean function F gives an output

of “1” (True), when the input is A’B’C or when the input is
A’BC’, or when the input is AB’C’, or when the input it ABC.
Otherwise, F gives an output of “0” (False).
 Sometimes when F contains fewer 0’s than 1’s it is easier work
with the 0’s. In this case, one would take the Boolean sum of
the input terms which yield 0’s. This would give us all the cases
where F is false, namely, we would obtain F’. To get F we
would then negate both sides of the equation and use the De
Morgan’s and distribution laws to convert the result to the
same format as in Ex.1 above.

Ex. 2 We are given the following truth table.

A B C G
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 1

G’ = A’B’C’ + ABC’ and G = [A’B’C’ + ABC’]’. This statement

can be simplified in terms of the number of primitives used, by
the insertion of brackets, using the distribution law, namely
G = [(A’B’ + AB)C’]’.
 MANIPULATION OF COMPOUND BOOLEAN STATEMENTS

Manipulation of compound Boolean statements using the laws

of Boolean algebra is a critical skill in computer engineering.
Function specifications, such as in the examples above, need to
be converted into specific formats for implementation in
digital logic, and in general need to be simplified for efficiency.

The Boolean “AND-then-OR” format consists of a Boolean

“sum” of terms, each of which is a Boolean “product” of (possibly-
negated) primitive statements. The result of Example 1 above is
in AND-then-OR1 format:

F = A’B’C + A’BC’ + AB’C’ + ABC.

This is a form suitable for representation in a circuit of AND

gates followed by OR gates (AND gates whose outputs are then
connected by OR gates.)
A'B'C
A'
A

B' A'BC'
B

C' AABBC’C' ’
C

ABC

1 When each Boolean “product” term contains all of the available variables, in this case A,B and
C, then it is called a Boolean “sum of products”.
The initial result of Example 2, G’ = A’B’C’ + ABC’, is also a
AND-then-OR result for the function G’ (not for G). We could
obtain the AND-then-OR result for G by using the laws of logic:
G = [(A’B’ + AB)C’]’
G = (A’B’)’(AB)’ + C (deMorgan)
G = (A+B)(A’+B’)+C (deMorgan)
G = AA’ + AB’ + A’B + BB’ + C (Distributive)
G = 0 + AB’ +A’B + 0 + C (Inverse)
G = AB’ + A’B + C (Identity)
This is in AND-then-OR format.

There are at least two other important formats for digital logic
design, the Boolean “OR-then-AND” and NAND formats.
Boolean functions can be converted between these various
formats using the laws of logic. Note that, although these are
different representations of the same function, the three formats
are logically equivalent (the truth table for the function remains
the same).
In the Boolean OR-then-AND format, the function is
represented as a simple Boolean “product” of parenthesized
expressions, each of which is a Boolean “sum” of (possibly-
negated) primitive statements.

For example, one can convert the above AND-then-OR result

for G’ in Example 2, into OR-then-AND format for G (not G’) as
follows:
G’ = A’B’C’ + ABC’
G’’ = (A’B’C’ + ABC’)’ (negation of both
sides) G = (A’B’C’ + ABC’)’ (double negation)
G = (A’B’C’)’(ABC’)’ (deMorgan)
G = (A+B+C)(A’+B’+C) (deMorgan)
This is the result for G in OR-then-AND format.

One could also have converted the result of Example 1 into OR-
then-AND format, by working from the 0’s, as follows:

F’ = A’B’C’ + A’BC + AB’C + ABC’

F’’ = (A’B’C’ + A’BC + AB’C + ABC’)’ (negation)
F = (A’B’C’ + A’BC + AB’C + ABC’)’ (double-negation)
F = (A’B’C’)’(A’BC)’(AB’C)’(ABC’)’ (deMorgan)
F = (A+B+C)(A+B’+C’)(A’+B+C’)(A’+B’+C) (deMorgan)
This is the result for F in OR-then-AND format.

One can of course, reverse the process to convert a OR-then-

AND to a AND-then-OR.
F = (A+B+C)(A+B’+C’)(A’+B+C’)(A’+B’+C)
F = ((A’B’C’)’(A’BC)’(AB’C)’(ABC’)’) (deMorgan)
F = (A’B’C’ + A’BC + AB’C + ABC’)’ (deMorgan)
At this point, one notes that the negation of this AND-then-OR
expression consists of the other four terms that appear in an
eight-row truth table. We thus have:
F = A’B’C + A’BC’ + AB’C’ + ABC.
As mentioned above, it is often useful to convert Boolean
functions into a form where they can be implemented using
only NAND operations (gates). Note that this format involves
only AND and NOT operations. If we inspect the two examples
of derivations toward OR-then-AND above, we will see that in
each case the next-to-last line is in a format convenient for
conversion and implementation by 3-input NAND gates. To
complete the conversion:

G = (A’B’C’)’(ABC’)’
G = [[(A’B’C’)’(ABC’)’]’]’ (double-negation)

A A'

[(A’B’C’)’(ABC’)’]’
(A'B'C')'
[(A'B'C')'(ABC')']'
B B'
G

(ABC')'

C
C'

Note that we have used 7 gates. It is possible to realize G using

only six gates.

G = (A’B’C’)’(ABC’)’
G’ = A’B’C’ + ABC’ = (A’B’ + AB)C’ (DeMorgan,distrib’ve)
G = (A’B’ + AB)’ + C (negation, De
Morgan)
G = A’B + AB’ +C (See page 2.10)
G = [A’B + AB’ +C]’’ (double-negation)
G = [(A’B)’(AB’)’C’]’ (DeMorgan)

The drawing of the circuit is left as an exercise.

Interrelationship among the different formats:

Consider the example of a Boolean function F = A’B’C + ABC.

F and its negation F’ can be expressed in various formats. The
relationships between several of them is mapped out below.
Notice the simple Boolean operations which interrelate them.

Sum of Products Format

F = [(A’B’C) + (ABC)]

DeMorgan
(inner brackets) double negation
F = [(A+B+C')'
+
(A’+B’+C')'] F = F’’ = [(A’B’C) + (ABC)]’’

deMorgan deMorgan

NAND Format
F = [(A+B+C')(A’+B’+C')]'
F = [(A’B’C)'(ABC)']'
deMorgan
(inner brackets)
negation

Product of Sums Format

F’ = [(A+B+C')(A’+B’+C')]
 The same type of analysis can be done for F’. For example,
when F = A’B’C + ABC as above, F’ simply consists of the
minterms not included in F:
F’ = A’B’C’ + A’BC’ + A’BC + AB’C’ + AB’C + ABC’
In this case, the interrelationships for F’ are:

Sum of Products Format

F’ = [(A’B’C’) + (A’BC’) + (A’BC) + (AB’C’) + (AB’C) + (ABC’)]

DeMorgan
(inner brackets) double negation

F’ = [(A+B+C)’ + (A+B’+C)’ + F’ = [F’]’’ = [(A’B’C’) + (A’BC’) + (A’BC)

(A+B’+C’)’ + (AB’C’) + (AB’C) + (ABC’)]’’
+ (A’+B+C)’ + (A’+B+C’)’ + (A’+B’+C)’]

deMorgan deMorgan

NAND Format
F’ = [(A+B+C) (A+B’+C) (A+B’+C’) F’ = [(A’B’C’)’(A’BC’)’(A’BC)’
(A’+B+C) (A’+B+C’) (A’+B’+C)]’ + (AB’C’)’(AB’C)’(ABC’)’]’
deMorgan
(inner brackets)
negation

Product of Sums Format

F = [(A+B+C) (A+B’+C) (A+B’+C’)
(A’+B+C) (A’+B+C’) (A’+B’+C)]
SIMPLIFICATION OF COMPOUND BOOLEAN STATEMENTS
In most cases, one should attempt to simplify compound
statements, if for no other reason than to ensure that a
minimum amount of digital logic can be used to implement
these statements. For the purposes of this course, we will
define simplification to mean that after the manipulation fewer
primitives appear in the expression. Any skills gained in doing
this are transferable to the simplification of compound logic
statements or of compound set operations, since the rules
governing these are identical to those of Boolean algebra.

Simple examples are:

i. F = AB + AB’
= A(B + B’) (Distributive)
= A(1) (Inverse)
=A (Identity)

ii. F = A’B’C + ABC can be simplified a bit since

F = (A’B’ + AB)C (Distributive)
reducing the number of primitives from six to
five.

iii. F = A + A’B doesn’t look as if it can be simplified – but it

can. An easy way of doing this is use the distribution law
with respect to “+” and write
F = (A + A’)(A + B)
= (1)(A + B) (Inverse)
= (A + B) (Identity)
Another way is to write
F = A + AB + A’B (since A = A + AB by Absorption)
= A + (A + A’)B (Distributive)
= A + (1)B (Inverse)
=A+B (Identity)

iv. F = A’B’ + AB cannot be simplified.

One problem is to know when the statement has been
minimized, namely it can be simplified no more. This is not
always obvious, particularly when the number of variables (or
primitive statements) is large. Further, the solution is not
always unique.

The approach we will follow here is useful where Boolean

statements contain up to four variables. It leads into
techniques, such as Karnaugh maps, which will be presented in
courses on logic circuits, and which are useful for statements
containing up to five or six variables. This technique is based
on the Boolean AND-then-OR form discussed above.

What we do is rewrite the statement as a “Boolean sum” of

what are called minterms. A minterm for a compound
statement containing n variables or primitives consists of a
“Boolean product” of n variables. For example, if there are four
variables, then AB’CD’ is a minterm while ABC is not. In the
industry, this is called a “sum-of-products expansion”.

There are two ways of rewriting a given expression as a sum of

minterms. The first way involves the use of the inverse law and
of distribution with respect to the AND (Boolean product)
operation. For example,
F=A+B
= A(B+B’) + (A+A’)B (Identity, Inverse)
= AB + AB’ + AB + A’B (Distributive)
= AB + AB’ + A’B (Idempotent)

The second way is to write the truth table for the given
statement F, and then read off the values of the variables that
make F true, namely, a truth-value of 1.
For our simple example:

A B F=A+B
0 0 0
0 1 1
1 0 1
1 1 1

F = A’B + AB’ + AB. Note that the technique for reading

specification tables, presented in Section 2.4, generates
minterms.
 Once an expression has been converted into its minterms,
simplification (and determination whether any simplification
is available) is relatively straightforward.

Test for determining whether or not a sum of minterms can be

simplified

 It is sometimes possible to simplify sums of minterms through

the use of brackets, e.g., A’B’C + ABC = (A’B’ +AB)C.

 It is sometimes possible to simplify sums of minterms through

the use of the laws of Boolean algebra, for example,
AC + A’BC = A(B’ + B)C + A’BC
= AB’C + ABC + A’BC (sum of minterms)

Now one can recognize that minterms may be repeated, using

the idempotent law. This is done in order to group the
repeated minterm with other minterms, in order to remove
literals.

= AB’C + ABC + ABC +A’BC = (AB’C + ABC) + (ABC +A’BC)

= A(B’ +B)C + (A + A’)BC
= AC + BC = (A + B)C.

 A’B’C’ + ABC cannot be simplified at all.

In order to determine if any simplification can take place, we

convert the minterms to ordered strings of 0’s and 1’s. The
three examples given above become:
 First example Second example Third example
A’B’C 001 AB’C 101 A’B’C’ 000
ABC 111 ABC 111 ABC 111
A’BC 011
The third 1 is in The third 1 is in There is nothing in
common. This common (Bracket). common. Nothing
means that a bracket First and second can be done.
can be used. minterms differ by
one digit. Second
and third minterms
differ by one digit.
Simplification is
possible as shown
above.

Simplification test for minterms: An expression whose minterms

have nothing in common cannot be simplified.
Examples of the simplification of Boolean statements

The laws of Boolean algebra are available for the simplification

of Boolean statements.

Example 1: Simplify F = A + A’B + A’B’C.

Rewriting as minterms, directly from the functional expression

above, we have:
F= A(B + B’)(C + C’) + A’B(C + C’) + A’B’C
= ABC + ABC’ + AB’C + AB’C’ + A’BC + A’BC’ + A’B’C

This can be simplified substantially.

We have already shown a few pages ago that A + A’B = A + B.

We can reuse this result here as follows:

F = A + A’B + A’B’C = A + A’(B + B’C) = A + A’(B + C)
=A+B+C

Alternatively, we could have constructed the truth table from

the original expression, F = A + A’B + A’B’C:

A B C F
0 0 0 0
0 0 1 1 A’B’C
0 1 0 1 A’B
0 1 1 1
1 0 0 1
1 0 1 1 A
1 1 0 1
1 1 1 1

then examined the truth table and noticed that F’ = A’B’C’, so

that F = (A’B’C’)’ = A + B + C (by De Morgan).
 Example 2: Simplify F = AB+A’C+BC
One could construct the minterms in the usual ways: by truth
table and/or by expansion of the three terms AB, A’C, BC.

Writing the truth table we have:

A B C A’ AB A’C BC F Here we note that the final
0 0 0 1 0 0 0 0 result consists of:
0 0 1 1 0 1 0 1 F =A’B’C+A’BC+ABC’+ABC
0 1 0 1 0 0 0 0 which can be simplified as
0 1 1 1 0 1 1 1 follows:
1 0 0 0 0 0 0 0 =A’(B’+B)C+AB(C’+C)
1 0 1 0 0 0 0 0 = A’C+AB
1 1 0 0 1 0 0 1
1 1 1 0 1 0 1 1
Here, since column F contains as many 0’s as 1’s, there would
be no advantage in proceeding to find F’ and converting it to F.

Example 3: Given the following truth table, find and simplify the
Boolean expression.

A B C D F Reading off the minterms, we get:

0 0 0 0 0 F = A’B’CD + A’BCD’ + A’BCD
0 0 0 1 0 + AB’CD + ABCD’ + ABCD.
0 0 1 0 0
0 0 1 1 1 This can be simplified.
0 1 0 0 0 F = (A’ + A)(B’CD + BCD’ + BCD)
0 1 0 1 0 = B’CD + BCD’ + BCD
0 1 1 0 1 = B’CD + BCD + BCD’ + BCD
0 1 1 1 1 = (B’ + B)CD + BC(D’ + D)
1 0 0 0 0 = CD + BC = C(B + D)
1 0 0 1 0
1 0 1 0 0
1 0 1 1 1
1 1 0 0 0
1 1 0 1 0
1 1 1 0 1
 1 1 1 1 1
FROM WORDS TO GATES:

Word descriptions of the task or operation

Word descriptions using AND, OR, NOT, brackets

Other formats Truth table Boolean AND-then-OR Boolean OR-then-AND

NAND
minterms
format

Manipulation, simplification, using laws of Boolean Algebra

Don’t cares

Implementation of logic circuit using logic gates

 APPLICATIONS TO THE DESIGN OF LOGIC CIRCUITS
The Full Adder
Recall that in Chapter 1, and again at the beginning of this
Chapter, we examined the addition of binary numbers. We
repeat here the example of the addition of 1003 and 501. The
techniques introduced in this chapter are well-suited to
completing the task that we started.
Addition
11 10 9 8 7 6 5 4 3 2 1 0 Column number
0 1 1 1 1 1 1 1 1 1 1 0 Carry digit - C
0 0 1 1 1 1 1 0 1 0 1 1 First number - A 1003
0 0 0 1 1 1 1 1 0 1 0 1 Second number - B 501
0 1 0 1 1 1 1 0 0 0 0 0 Sum - S 1504

We indicated that the ith digit Si , (represented by the column

number), of the sum of two binary numbers, A and B, was:
 Si = 1 whenever the values of one member of the triplet (Ci,
Ai, Bi) is a 1, with the other two members being 0’s, or
whenever all three members of the triplet (Ci, Ai, Bi) are 1’s.
Otherwise Si = 0. The value Ci is the result of the carry
operation determined from the full add operation of the
previous (next-less-significant) column.
 The carry value for the next column, Ci+1 = 1 whenever at
least two of the triplet (Ai, Bi, Ci) are 1’s. In other words,
either two of the triplet are 1’s with the third being 0, or all
three of the triplet are 1’s. Otherwise Ci+1 = 0.
These specifications were summarized in Section 2.1, and are
repeated here: Inputs Outputs
Case # Ai Bi Ci Ci+1 Si
0 0 0 0 0 0
1 0 0 1 0 1
2 0 1 0 0 1
3 0 1 1 1 0
4 1 0 0 0 1
5 1 0 1 1 0
6 1 1 0 1 0
7 1 1 1 1 1
We will now express these specifications as a sum of minterms
(method 3), beginning with the word statements given in
Section 2.1. The variables Ai, Bi, Ci are considered to be inputs;
the variables Si and Ci+1 are considered to be outputs.

Si := 1 if [(Ai is 0) and (Bi is 0) and (Ci is 1)]

or [(Ai is 0) and (Bi is 1) and (Ci is 0)]
or [(Ai is 1) and (Bi is 0) and (Ci is 0)]
or [(Ai is 1) and (Bi is 1) and (Ci is 1)]

Ci+1 := 1 if [(Ai is 0) and (Bi is 1) and (Ci is 1)]

or [(Ai is 1) and (Bi is 0) and (Ci is 1)]
or [(Ai is 1) and (Bi is 1) and (Ci is 0)]
or [(Ai is 1) and (Bi is 1) and (Ci is 1)]

Now, with the techniques and notations introduced in this

chapter, we are ready to translate these word specifications into
the language of Boolean logic, so that they can be implemented
in logic gates. In Boolean notation, these conditions become:

Si = A’i B’i Ci + A’i Bi C’i + Ai B’i C’i + Ai Bi Ci

Ci+1 = Ai Bi C’i + Ai B’i Ci + A’i Bi Ci + Ai Bi Ci

The first expression as stated, requires 11 2-input AND and OR

operations, (eight 2-input AND gates and three 2-input OR
gates), in addition to 3 inverters, and as a result, 14 logic gates
to realize it. One of several possibilities for simplification is to
reorder the terms and rewrite it as:

Si = Ai B’i C’i + A’i Bi C’i + A’i B’i Ci + Ai Bi Ci

= (Ai B’i C’i + A’i Bi C’i) + (A’i B’i Ci + Ai Bi Ci)
Si = (Ai B’i + A’i Bi )C’i + (A’i B’i + Ai Bi ) Ci

We now let Di = (Ai B’i + A’i Bi ), and recognize it as the

exclusive OR, namely Di = Ai  Bi. We have shown earlier that
Di’ = (A’i B’i + Ai Bi ), which also appears in the expression
(ahead of Ci).

The realization of this using AND and OR gates is shown

below.

D = A'B + AB'
A D

B
S

We have used six gates to realize this.

If, in addition, we have available the XOR gate, we can rewrite

it as: Si = (Ai  Bi ) Ci’ + (Ai  Bi )’ Ci = (Ai  Bi ) Ci
= Ai  Bi  Ci.

We now consider the second expression:

Ci+1 = Ai Bi C’i + Ai B’i Ci + A’i Bi Ci + Ai Bi Ci .

The ABC term can be grouped with each of the 3 previous

terms, so that:
Ci+1=(Ai Bi C’i+Ai Bi Ci)+(Ai B’i Ci+Ai Bi Ci)+(A’i Bi Ci+Ai Bi Ci)
= Ai Bi (C’i + Ci ) + Ai (B’i + Bi ) Ci + (A’i + Ai )Bi Ci
= Ai Bi + Ai Ci + Bi Ci = Ai Bi +(Ai + Bi )Ci
 a reduction from 14 to 4 operations.

Alternately, if XOR gates are used, we can rewrite it

as: Ci+1 = (Ai B’i Ci + A’i Bi Ci) + (Ai Bi C’i + Ai Bi Ci)

= (AiBi’+Ai’Bi)Ci+AiBi(Ci’+Ci) = (Ai Bi) Ci + Ai Bi
This would allow us to use the results of one of the half-adders
used in representing Si.
The circuit to implement the full adder is shown below. What is
not shown are the timing circuits that move the register
connections from one digit to the next.

(AB)C+AB ith digit

C S
(AB)C (i+1)th digit

ABC
B
AB
AB
A

The Full Adder Circuit

The Use of “Don’t Care” Conditions

There are occasions when a number of minterms are not

relevant to the production of outputs. These are called “don’t
care” conditions and can be used as necessary, to simplify the
number of Boolean operations needed. The following example
illustrates this technique.

Imagine a stereo system, where the sound volume is often also

represented visually by an arrangement of lights on the front
panel. Often, this visual arrangement consists of 5 lights, in a
stack, where the number of lights lit represents the
instantaneous (moment-by-moment) loudness of the sound.
Thus, when there is no sound, no lights will be on. When there
is soft sound, perhaps the bottom one or two lights will flicker.
And when the music is very loud, the bottom four, or all five
lights, will be lit. Note: the choice of 5 lights (6 levels, since no-
lights-on represents no sound), is usually decided by some
aesthetic (appearance) considerations.

5 status lights
indicating
sound volume

So, given that there are 5 lights, and 6 levels, we will need more
than 2 bits to represent the 6 different input sound levels.
Therefore, we will need 3 bits, but we won’t need to use all 8
possible patterns that can be represented in 3 bits.
Therefore, we devise a series of five status conditions, S1
through S5, which are coded in binary as shown in the table
below. As such the values A, B, and C are to be considered as
inputs to the logic circuit. We wish to design a logic circuit that
allows a series of five lights L1 through L5, to be turned on
according to the following specifications. Status S1 will result
in L1 being turned on; status S2 will result in both L1 and L2
being turned on, etc., and finally, status S5 will result in all five
lights being turned on. There is an assumed sixth specification
in that if none of the status conditions occur, we do not want
any of the lights turned on.

You will note that the table contains all possible three-digit
binary numbers, of which there are eight. We only need the six
that correspond to the six status conditions. The remaining
two correspond to “don’t care” conditions. There will not be an
input signal corresponding to these two conditions. We have
inserted X into the appropriate rows. The specifications S1
through S5 are in bold type while the “don’t care” conditions
D6 and D7 and the “off” condition, S0, are in plain type.

Truth Table for Example 4

Inputs Outputs
A B C L1 L2 L3 L4 L5
S0 0 0 0 0 0 0 0 0
Status S1 0 0 1 1 0 0 0 0
Conditions S2 0 1 0 1 1 0 0 0
S3 0 1 1 1 1 1 0 0
S4 1 0 0 1 1 1 1 0
S5 1 0 1 1 1 1 1 1
Don’t care D6 1 1 0 X X X X X
conditions D7 1 1 1 X X X X X
In what follows we will demonstrate the use of the “don’t
care” conditions to simplify the logical implementation of the
specifications.

In order to develop an approach as to how to use the “don’t

care” conditions, let us concentrate on how to make the lights
go on. An examination of the truth table will provide insight.

For each light, ask the question “what is it about the associated
rows that distinguishes them from the rest of the rows?” For
example, for L3, what is it about the input conditions S3, S4,
and S5 that distinguishes them from the other input
conditions, S0, S1, and S2? Note that we don’t need to
distinguish them from the “don’t care” conditions D6, D7.

L5 = S5 is on only when inputs A and C are true and input B is

false. However, since we don’t care what happens with the
D6 and D7 combinations of inputs, we need not distinguish
S5 from D6 and D7. We only need to distinguish S5 from S0-
S4. Therefore, we can try to use the “don’t care” conditions
to eliminate B’ from L5 = S5 = AB’C and to achieve L5 = AC.
In this way, it will turn out that the specification “A and C
are true” is enough to distinguish S5 from S0-S4.
Similarly,
L4 = S4 + S5 is on only when A is true. As such, we would like
to make L4 =A.
L3 = S3 + S4 + S5 is on only when A is true or BC is true. Our
objective is thus L3 = A + BC.
L2 = S2 + S3 + S4 + S5 is on only when A or B are true. Our
objective is thus L2 = A + B.
L1 comes on when any of the statuses are true. As such we
want L1 = A+B+C.
You may (or may not) be able to see the above answers by
inspection. Either way, the following analytical methods are
useful, and can be applied when analyzing more complicated
problems.
We now use the “don’t care” conditions to show in detail how
we can do this.

L5: We have the requirement that L5 = S5 = AB’C. We have

below it the minterm D7 = ABC. Since D7 will never be
implemented as a separate specification, we don’t care about it
and are free to integrate it into the specifications in order to
simplify them. As such, we redefine L5 by integrating D7 into
it, so that now, L5 = AB’C+ABC = A(B’+B)C = AC.

Our goal is to implement logic gates to turn on the lights in

accordance with the specifications, so we can begin by placing
the appropriate gate in a “box” which will contain our circuitry.
Outputs
L1 L2 L3 L4 L5

Inputs B

AC
L4: Initially we have that L4 = S4 + S5 = AB’C’+AB’C. = AB’.
We now note that D6 + D7 = ABC’ + ABC = AB and that
AB’ + AB = A. We now proceed to add these “don’t care”
conditions into the original specification for L4 and obtain
L4 = (AB’C’+AB’C)+(ABC’+ABC) = AB’+AB = A .

L1 L2 L3 L4 L5

C
AC

L3: Proceeding as before, L3 = S3 + S4 + S5

= A’BC+AB’C’+AB’C. Adding in the “don’t care” conditions,
we get L3 = S3 + S4 + S5 + D6 + D7
= A’BC+AB’C’+AB’C + ABC’ + ABC
= A’BC+(AB’C’+AB’C + ABC’ + ABC).
Using the results of L4, this can be rewritten as A’BC + A. This
can be further simplified since we had shown in Example 1
that A’Q + A = Q + A. Letting Q = BC, we have: L3 = BC + A.
Another way of arriving at the result, is to write conditions,
L3 = (S0 + S1 + S2)’ = (A’B’C’ + A’B’C + A’BC’)’
= [A’(B’C’ + B’C + BC’)]’ = [A’(BC)’]’
(Note that (B’C’ + B’C + BC’) = (BC)’ by the same reasoning as
in Example 2, a few pages ago.)
= A + (BC)’’ = A + BC.

L2: In the same manner, we let

L2 = S2 + S3 + S4 + S5 + D6 + D7 = (S0 + S1)’
= (A’B’C’ + A’B’C)’ = [A’B’(C’ + C)]’ = [A’B’]’ = A+B.
L1: Based on what we have done before, we can immediately
write L1 = S0’ = [A’B’C’]’ = A + B + C.

As we can see, the “don’t care” conditions have allowed us to

prove what was intuitively obvious from looking at the truth
table.

Given a restriction that we must use two-input gates, the

complete circuit is designed with five two-input AND and OR
gates.

L5 = AC;
L4 = A;
L3 =
A+BC;
L2 = A+B;
L1 = A+B+C = (A+B)+C.

Outputs
L1 L2 L3 L4 L5

A+BC

A
A+B

Inputs B
BC
C A+B+C
AC

Complete Implementation of Example 4

BOOLEAN ALGEBRA: SUMMARY OF IMPORTANT SKILLS

 Specifications in words and their translation into Boolean

logic
 AND, OR, NOT, XOR operations
 Logic gate symbols and interconnection
 NAND gates
 The Laws of Boolean Algebra (in dual pairs)
 Reading specification (truth) tables
 Manipulation of Boolean statements using the Laws
 3 formats: sum-of-products, product-of-sums, NAND
 Simplification of Boolean statements
 The Full Adder: algebraic description and implementation
in gates
 The use of the “don’t-care” condition
 Boolean Algebra – Problems

1. Using truth tables, prove the laws of distribution and absorption.

2. Show that the exclusive OR obeys the laws of commutation and

association, namely AB = BA and that (AB)C = A(BC) =
ABC.

3. Show that A’BC’ + AC’ + C = A + B + C

a) Using truth tables
b) Using the laws of Boolean algebra and the result p +p’q = p+q in the
notes.
c) Using minterms. You will note that the sum will include all minterms
other than A’B’C’. Make use of this.

4. (a) Show that the dual of the exclusive OR, S = AB =A’B + AB’, is Sd =
A’B’ + AB. (In logic, this called the “if and only if” statement and is
represented using AB.)
(b) Show that the negation of S = AB = Sd .
(c) The negation of a Boolean statement is not usually equivalent to its
dual. Verify this for the following pairs of dual Boolean expressions:
(A+B)’ vs. (AB)’; (A+B) vs. (AB); (A+B+C) vs. (ABC); (A+0) vs. (A1).

5. Realize the “A if and only if B”, which is equivalent to (AB)’, as an

interconnection of (only) NAND gates. Suggestion: start with ((AB)’)’’.

6. A small design problem. A common feature (a great convenience) in

buildings is to have a light controlled by a pair of switches located at
different places. This means that there are two switches, one in each
location. Let us label these switches p and q. Each switch has two possible
positions, up and down, to which we will assign the truth values of 1 and
0 respectively. We want to use switch p to turn the light on or off
regardless of the position of switch q and to use switch q to turn the light
on or off regardless of the position of switch p.
(a) Design a truth table which makes this possible.
(b) Design a circuit which implements this truth
table, using these two switches and wires.
Hints: There are two possible designs. a particular switch’s position
(up/down) does not always mean the same thing (e.g. does not always
mean the light is “on”). The effect of “up” and “down” of one switch
changes depending on the position of the other switch.
(c) Once you have managed to do this, design a logic circuit that
enables one to do the same thing from any one of three switches.
 7. Using truth tables, verify the each of the two results below, S i and Ci+1, for
the full-adder example:
Si = (Ai B’i + A’i Bi )C’i + (A’i B’i + Ai Bi ) Ci
Ci+1 = (Ai Bi) Ci + Ai Bi

8. The following are several Boolean expressions related to the full adder.
Implement each of them in logic gates corresponding to the particular
Boolean operations represented in the expressions.
Si = Ai B’i C’i + A’i Bi C’i + A’i B’i Ci + Ai Bi Ci
Si = (Ai B’i + A’i Bi )C’i + (A’i B’i + Ai Bi ) Ci Si
= Ai  Bi  Ci (using XOR gates)
Ci+1 = Ai Bi C’i + Ai B’i Ci + A’i Bi Ci + Ai Bi Ci Ci+1
= (Ai Bi) Ci + Ai Bi (using an XOR gate)

9. The table below defines two Boolean functions, b1(a1,a2,a3,a4) and b2(a1,a2,a3,a4). Each
row (line) gives the output for a specific combination of inputs (a1,a2,a3,a4). For each of
the two functions, write the equivalent Boolean expression, simplify it as much as
possible, and implement it by drawing logic gates.

a1 a2 a3 a4 b1 b2
0 0 0 0 1 0
0 0 0 1 1 0
0 0 1 0 0 0
0 0 1 1 0 1
0 1 0 0 1 0
0 1 0 1 1 0
0 1 1 0 0 1
0 1 1 1 0 1
1 0 0 0 0 0
1 0 0 1 0 0
1 0 1 0 0 0
1 0 1 1 0 1
1 1 0 0 0 0
1 1 0 1 0 0
1 1 1 0 0 1
1 1 1 1 0 1

(10)Simplify as much as possible the following Boolean

expression, using the laws of Boolean Algebra:
MQ + M’R + QR
Show clearly which laws you are using in your simplification.
(11) (a) Prove this Boolean equivalence
by truth tables: A + AB = A
(b) Prove this Boolean equivalence by the laws
of Boolean algebra: AB’ + B = A + B

(12) The table below defines two Boolean functions, f1(A,B,C) and f2(A,B,C). Each row
(line) gives the output for a specific combination of inputs (A,B,C).
(a) For each of the two functions, write the equivalent Boolean expression, and then
simplify your Boolean expression as much as possible.
(b) Then implement f2 by drawing logic gates.

A B C f1 f2
0 0 0 1 0
0 0 1 1 1
0 1 0 1 0
0 1 1 1 1
1 0 0 1 0
1 0 1 0 0
1 1 0 1 0
1 1 1 1 0

(13) Draw the Boolean circuit for G = [(A’B)’(AB’)’C’]’, using only NAND gates
(each gate having up to 3 inputs).
(14) Consider the conversion of an 8-bit binary number into its 2’s complement,
particularly the shortcut method described in Chapter 1. One method for doing
the conversion in a computer would be as follows:
 let Ai represent the bits (A7 … A0) of the binary number being converted.
 let Bi represent the bits (B7 … B0) of the binary number after conversion.
 let Fi represent flag bits (F7 … F0) which will be used to flag whether we have
reached the first “1”, as prescribed in Chapter 1. This bit responds to the
question (“starting from the right, have I reached the first “1” yet?”)
 before the conversion begins, all the flag bits are 0, to be changed as needed
by the Boolean function you will design.
 the conversion begins at the rightmost bit (A0), and proceeds, bit-by-bit, toward
the left, until all bits are converted into 2’s complement.
 after the conversion is complete, Fi should be 0 up to and including the first “1”
encountered from the right, and then Fi should be 1 for all subsequent bits.
The problem:
(a) Specify the truth table for the Boolean function which takes as input Ai and
Fi, and gives as output Bi and Fi+1.
(b) Translate the truth table into symbolic Boolean functions for Bi and
Fi+1. Suggestion: draw a diagram showing how you will be changing the bits.

… Fi+1 = Fi= …
… … Ai= …
… … Bi= …
You decide based on these two, what to put into
these two
 REFERENCE
Boole, George (2011-07-28). The Mathematical Analysis of LogicBeing an Essay Towards a
Calculus of Deductive Reasoning.
Boole, George (2003) [1854]. An Investigation of the Laws of Thought.Prometheus
Books.ISBN 978-1-59102-089-9.
 "The name Boolean algebra (or Boolean 'algebras') for the calculus originated by Boole, extended
by Schröder, and perfected by Whitehead seems to have been first suggested by Sheffer, in 1913." E.
V. Huntington, "New sets of independent postulates for the algebra of logic, with special reference to
Whitehead and Russell's Principia mathematica", in Trans. Amer. Math. Soc.35 (1933), 274-304;
footnote, page 278.
Peirce, Charles S. (1931). Collected Papers.3. Harvard University Press.p. 13.ISBN 978-0-674-
13801-8.
Givant, Steven; Halmos, Paul (2009). Introduction to Boolean Algebras.Undergraduate Texts in
Mathematics, Springer.ISBN 978-0-387-40293-2.
Lenzen, Wolfgang. "Leibniz: Logic". Internet Encyclopedia of Philosophy.
J. Michael Dunn; Gary M. Hardegree (2001). Algebraic methods in philosophical logic. Oxford
University Press US. p. 2.ISBN 978-0-19-853192-0.
Weisstein, Eric W. "Boolean Algebra". mathworld.wolfram.com. Retrieved 2020-09-02.
Norman Balabanian; Bradley Carlson (2001). Digital logic design principles.John Wiley. pp. 39–
40. ISBN 978-0-471-29351-4., online sample
Rajaraman&Radhakrishnan (2008-03-01). Introduction To Digital Computer Design. PHI
Learning Pvt. Ltd. p.  65.ISBN  978-81-203-3409-0.
John A. Camara (2010). Electrical and Electronics Reference Manual for the Electrical and
Computer PE Exam.www.ppi2pass.com. p. 41. ISBN 978-1-59126-166-7.
Shin-ichi Minato, SaburoMuroga (2007). "Binary Decision Diagrams". In Wai-Kai Chen (ed.).
The VLSI handbook (2nd ed.). CRC Press.ISBN 978-0-8493-4199-1.chapter 29.
Alan Parkes (2002). Introduction to languages, machines and logic: computable languages,
abstract machines and formal logic. Springer.p. 276.ISBN 978-1-85233-464-2.
Jon Barwise; John Etchemendy; Gerard Allwein; Dave Barker-Plummer; Albert Liu (1999).
Language, proof, and logic.CSLI Publications.ISBN 978-1-889119-08-3.
Ben Goertzel (1994). Chaotic logic: language, thought, and reality from the perspective of
complex systems science. Springer.p. 48.ISBN 978-0-306-44690-0.
Halmos, Paul (1963). Lectures on Boolean Algebras.vanNostrand.
Bacon, Jason W. (2011). "Computer Science 315 Lecture Notes". Retrieved October 1, 2021.
O'Regan, Gerard (2008). A brief history of computing.Springer.p. 33.ISBN 978-1-84800-083-4.
"Elements of Boolean Algebra". www.ee.surrey.ac.uk. Retrieved 2020-09-02.
 For bitwise operations in computer programming, it may be helpful to read 1 as 0xFFFF. All bits
of the binary number must be 1.
McGee, Vann, Sentential Calculus Revisited: Boolean Algebra (PDF)
 *Goodstein, R. L. (2012), "Chapter 4: Sentence Logic", Boolean Algebra, Courier Dover
Publications, ISBN  9780486154978
Steven R. Givant; Paul Richard Halmos (2009). Introduction to Boolean algebras.Springer.
pp.  21–22. ISBN  978-0-387-40293-2.
Venn, John (July 1880). "I. On the Diagrammatic and Mechanical Representation of Propositions
and Reasonings" (PDF).The London, Edinburgh, and Dublin Philosophical Magazine and Journal of
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Shannon, Claude (1949). "The Synthesis of Two-Terminal Switching Circuits".Bell System
Technical Journal.28: 59–98. doi:10.1002/j.1538-7305.1949.tb03624.x.
Koppelberg, Sabine (1989). "General Theory of Boolean Algebras".Handbook of Boolean
Algebras, Vol. 1 (ed. J. Donald Monk with Robert Bonnet). Amsterdam: North Holland. ISBN 978-0-
444-70261-6.
McCune, William; Veroff, Robert; Fitelson, Branden; Harris, Kenneth; Feist, Andrew; Wos, Larry
(2002), "Short single axioms for Boolean algebra", Journal of Automated Reasoning, 29 (1): 1–16,
doi:10.1023/A:1020542009983, MR 1940227, S2CID 207582048
Allwood, Jens; Andersson, Gunnar-Gunnar; Andersson, Lars-Gunnar; Dahl, Osten (1977-09-15).
Logic in Linguistics.Cambridge University Press.ISBN 978-0-521-29174-3.
Hausman, Alan; Howard Kahane; Paul Tidman (2010) [2007]. Logic and Philosophy: A Modern
Introduction. Wadsworth Cengage Learning.ISBN 978-0-495-60158-6.
Girard, Jean-Yves; Paul Taylor; Yves Lafont (1990) [1989]. Proofs and Types. Cambridge
University Press (Cambridge Tracts in Theoretical Computer Science, 7). ISBN 978-0-521-37181-0.
 Not all search engines support the same query syntax. Additionally, some organizations (such as
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