URR-14 “Write your Roll number”

KAKATIYA INSTITUTE OF TECHNOLOGY & SCIENCE, WARANGAL-506015

(An Autonomous Institute under Kakatiya University, Warangal)
B.Tech. (E&I Engg) VI Semester
Mid Semester Examination-II
U14EI604: VLSI DESIGN

Date: 18.04.2019 Note: 1. Answer all the questions.

Time: 2 Hrs] [Max. Marks: 25

Marks CDLL CO
1 Answer the following in brief.
a What is scaling. What factors can be improved with scaling? 1 R CO3

2 U CO3
b What are the advantages of switch logic. Differentiate between transmission
gates and pass transistors.
2 U CO3
c Implement a 4:1 MUX using Pass transistors. Draw the stick diagram.
d Differentiate between Verilog HDL and VHDL. 1 U CO4

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e List out the levels of abstraction used in Verilog.

2 a Explain (i) Sheet resistance (ii)Standard unit of capacitance and (iii) Delay Unit 3 U CO2

3 Ap CO2
b Discuss about inverter delays and derive expressions for rise and fall times for
a CMOS inverter.
(OR)
c List out different types of scaling models. Explain the effect of scaling on 3 Ap CO3

various device parameters of a MOSFET.

d What are the limits of miniaturization? Discuss about limits of interconnect and 3 U CO3

contact resistance.

3 U CO3
3 a Discuss the architectural issues and guide lines for a Subsystem design.
b Develop the structured design for a Parity Generator and show the circuit and 3 Ap CO3

stick diagrams.
(OR)
c Explain pseudo nMOS and dynamic CMOS logics. 3 U CO3

d Develop the structured design of Bus Arbitration Logic for n-line bus with 3 Ap CO3

relevant block, circuit and stick diagrams for leaf cell.

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4 a Write the Verilog description for a 4 bit ripple carry full adder. Also write the
test bench.
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b Implement a 4:1 MUX using AND, OR and NOT gates. Write the Verilog code
for the same. Also write the stimulus model.
(OR)
c Write the Verilog code for a 4bit ripple counter in Verilog. 3 C CO4

3 C CO4
d What is switch level modeling? Write the switch level Verilog description for a
2 input CMOS NAND gate.

---Question Paper Ends---

Paper set by: Prof. K. Sivani

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