Philips Semiconductors Product specification

Thyristors BT169 series

logic level

GENERAL DESCRIPTION QUICK REFERENCE DATA

Passivated, sensitive gate thyristors SYMBOL PARAMETER MAX MAX MAX MAX UNIT
in a plastic envelope, intended for use . . . .
in general purpose switching and BT169
phase control applications. These VDRM, Repetitive peak B D E G V
devices are intended to be interfaced VRRM off-state voltages 200 400 500 600
directly to microcontrollers, logic IT(AV) Average on-state A
integrated circuits and other low current 0.5 0.5 0.5 0.5
power gate trigger circuits. IT(RMS) RMS on-state current A
ITSM Non-repetitive peak 0.8 0.8 0.8 0.8 A
on-state current 8 8 8 8

PINNING - TO92 variant PIN CONFIGURATION SYMBOL

PIN DESCRIPTION

1 anode
a k
2 gate
3 cathode
3 2 1
g

LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
B D E G
VDRM, VRRM Repetitive peak off-state - 2001 4001 5001 6001 V
voltages
IT(AV) Average on-state current half sine wave; - 0.5 A
Tlead ≤ 83 ˚C
IT(RMS) RMS on-state current all conduction angles - 0.8 A
ITSM Non-repetitive peak t = 10 ms - 8 A
on-state current t = 8.3 ms - 9 A
half sine wave;
Tj = 25 ˚C prior to surge
I2t I2t for fusing t = 10 ms - 0.32 A2s
dIT/dt Repetitive rate of rise of ITM = 2 A; IG = 10 mA; - 50 A/µs
on-state current after dIG/dt = 100 mA/µs
triggering
IGM Peak gate current - 1 A
VGM Peak gate voltage - 5 V
VRGM Peak reverse gate voltage - 5 V
PGM Peak gate power - 2 W
PG(AV) Average gate power over any 20 ms period - 0.1 W
Tstg Storage temperature -40 150 ˚C
Tj Operating junction - 125 ˚C
temperature

1 Although not recommended, off-state voltages up to 800V may be applied without damage, but the thyristor may
switch to the on-state. The rate of rise of current should not exceed 15 A/µs.

September 2001 1 Rev 1.500

Philips Semiconductors Product specification

Thyristors BT169 series

logic level

THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Rth j-lead Thermal resistance - - 60 K/W
junction to lead
Rth j-a Thermal resistance pcb mounted; lead length = 4mm - 150 - K/W
junction to ambient

STATIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise stated
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
IGT Gate trigger current VD = 12 V; IT = 10 mA; gate open circuit - 50 200 µA
IL Latching current VD = 12 V; IGT = 0.5 mA; RGK = 1 kΩ - 2 6 mA
IH Holding current VD = 12 V; IGT = 0.5 mA; RGK = 1 kΩ - 2 5 mA
VT On-state voltage IT = 1 A - 1.2 1.35 V
VGT Gate trigger voltage VD = 12 V; IT = 10 mA; gate open circuit - 0.5 0.8 V
VD = VDRM(max); IT = 10 mA; Tj = 125 ˚C; 0.2 0.3 - V
gate open circuit
ID, IR Off-state leakage current VD = VDRM(max); VR = VRRM(max); Tj = 125 ˚C; - 0.05 0.1 mA
RGK = 1 kΩ

DYNAMIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise stated
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
dVD/dt Critical rate of rise of VDM = 67% VDRM(max); Tj = 125 ˚C; 500 800 - V/µs
off-state voltage exponential waveform; RGK = 1 kΩ
tgt Gate controlled turn-on ITM = 2 A; VD = VDRM(max); IG = 10 mA; - 2 - µs
time dIG/dt = 0.1 A/µs
tq Circuit commutated VD = 67% VDRM(max); Tj = 125 ˚C; - 100 - µs
turn-off time ITM = 1.6 A; VR = 35 V; dITM/dt = 30 A/µs;
dVD/dt = 2 V/µs; RGK = 1 kΩ

September 2001 2 Rev 1.500

Philips Semiconductors Product specification

Thyristors BT169 series

logic level

Ptot / W Tc(max) / C ITSM / A

0.8 77 10
conduction form
angle factor
a = 1.57 IT I TSM
0.7 degrees a 83
30 4 1.9 8
0.6 60 2.8 89 T time
90 2.2 2.2 Tj initial = 25 C max
120 1.9
0.5 180 1.57 95
2.8 6
0.4 4 101

0.3 107 4

0.2 113
2
0.1 119

0 125
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0
1 10 100 1000
IF(AV) / A Number of half cycles at 50Hz

Fig.1. Maximum on-state dissipation, Ptot, versus Fig.4. Maximum permissible non-repetitive peak
average on-state current, IT(AV), where on-state current ITSM, versus number of cycles, for
a = form factor = IT(RMS)/ IT(AV). sinusoidal currents, f = 50 Hz.

ITSM / A IT(RMS) / A
1000 2

1.5
100

10 IT I TSM
0.5
T time
Tj initial = 25 C max

1 0
10us 100us 1ms 10ms 0.01 0.1 1 10
T/s surge duration / s

Fig.2. Maximum permissible non-repetitive peak Fig.5. Maximum permissible repetitive rms on-state
on-state current ITSM, versus pulse width tp, for current IT(RMS), versus surge duration, for sinusoidal
sinusoidal currents, tp ≤ 10ms. currents, f = 50 Hz; Tlead ≤ 83˚C.

IT(RMS) / A VGT(Tj)
1 VGT(25 C)
1.6
83 C
0.8 1.4

1.2
0.6

1
0.4
0.8

0.2
0.6

0 0.4
-50 0 50 100 150 -50 0 50 100 150
Tlead / C Tj / C
Fig.3. Maximum permissible rms current IT(RMS) , Fig.6. Normalised gate trigger voltage
versus lead temperature, Tlead. VGT(Tj)/ VGT(25˚C), versus junction temperature Tj.

September 2001 3 Rev 1.500

Philips Semiconductors Product specification

Thyristors BT169 series

logic level

IGT(Tj) IT / A
5
IGT(25 C) Tj = 125 C
3
Tj = 25 C
4
2.5 Vo = 1.067 V
Rs = 0.187 ohms typ max
2 3

1.5
2
1
1
0.5

0 0
-50 0 50 100 150 0 0.5 1 1.5 2 2.5
Tj / C VT / V

Fig.7. Normalised gate trigger current Fig.10. Typical and maximum on-state characteristic.
IGT(Tj)/ IGT(25˚C), versus junction temperature Tj.

IL(Tj) Zth j-lead (K/W)

100
IL(25 C)
3

2.5 10

2
1
1.5
P tp
D
1
0.1
t
0.5

0.01
0 10us 0.1ms 1ms 10ms 0.1s 1s 10s
-50 0 50 100 150
Tj / C tp / s

Fig.8. Normalised latching current IL(Tj)/ IL(25˚C), Fig.11. Transient thermal impedance Zth j-lead, versus
versus junction temperature Tj, RGK = 1 kΩ. pulse width tp.

IH(Tj) dVD/dt (V/us)

IH(25 C) 10000
3

RGK = 1 kohms
2.5
1000
2

1.5

100
1

0.5

10
0 0 50 100 150
-50 0 50 100 150 Tj / C
Tj / C
Fig.9. Normalised holding current IH(Tj)/ IH(25˚C), Fig.12. Typical, critical rate of rise of off-state voltage,
versus junction temperature Tj, RGK = 1 kΩ. dVD/dt versus junction temperature Tj.

September 2001 4 Rev 1.500

Philips Semiconductors Product specification

Thyristors BT169 series

logic level

MECHANICAL DATA
Plastic single-ended leaded (through hole) package; 3 leads SOT54

d A L

1
e1
2
D e

b1
L1

0 2.5 5 mm

scale

DIMENSIONS (mm are the original dimensions)

UNIT A b b1 c D d E e e1 L L1(1)

5.2 0.48 0.66 0.45 4.8 1.7 4.2 14.5

mm 2.54 1.27 2.5
5.0 0.40 0.56 0.40 4.4 1.4 3.6 12.7

Note
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC EIAJ PROJECTION

SOT54 TO-92 SC-43 97-02-28

Fig.13. TO92 ; plastic envelope; Net Mass: 0.2 g

Notes
1. Epoxy meets UL94 V0 at 1/8".

September 2001 5 Rev 1.500

Philips Semiconductors Product specification

Thyristors BT169 series

logic level

DEFINITIONS
DATA SHEET STATUS
DATA SHEET PRODUCT DEFINITIONS
STATUS2 STATUS3
Objective data Development This data sheet contains data from the objective specification for
product development. Philips Semiconductors reserves the right to
change the specification in any manner without notice

Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in ordere to improve the design and supply the best possible
product
Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in
order to improve the design, manufacturing and supply. Changes will
be communicated according to the Customer Product/Process
Change Notification (CPCN) procedure SNW-SQ-650A
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
 Philips Electronics N.V. 2001
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.

2 Please consult the most recently issued datasheet before initiating or completing a design.
3 The product status of the device(s) described in this datasheet may have changed since this datasheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

September 2001 6 Rev 1.500