Compal Confidential: EA50 - HWS M/B Schematics Document Intel Shark Bay SV (Haswell+ Lynx Point)

1 2 3 4 5
A A
Compal Confidential
EA50_HWS M/B Schematics Document
B
Intel Shark Bay SV (Haswell+ Lynx point) B
Nvidia N15S-GT / N15V-GM
C C
2014-05-27
REV:1.0
DAX
D Part Number Description D
DAZ17F00100 PCB Z5WAW LA-B702P LS-B161P/B162P
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/12/26 Deciphered Date 2014/12/26 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Z5WAW M/B LA-B702
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 0.2
Date: Tuesday, May 27, 2014 Sheet 1 of 56
1 2 3 4 5
A B C D E
eDP
LVDS LVDS-Translator
Fan Control
RTD2132R
page 30
page 42
page 31
Nvidia N15x Memory BUS 204pin DDR3L-SO-DIMM X1
BANK 0, 1, 2, 3 page 11
1 with DDR3 x4 HDMI Conn. Dual Channel 1
page 23~29 Intel

eDP 1.35V DDR3L 1333/1600
Processor 204pin DDR3L-SO-DIMM X1
PCIe 3.0 x4 (x8)
Haswell SV BANK 4, 5, 6, 7 page 12
page 32
8GT/s
HDMI x 4 lanes DDI
rPGA946 USB 3.0 USB 2.0
PEG
37.5mm x 37.5mm conn x1 conn x2 CMOS
P.4~10
VGA USB port 0 USB/B (port 1,2) Camera
USB port 7
FDII x2 DMI x4
100MHz 100MHz
page 36
MINI Card 2.7GT/s 5GB/s
page 33 Touch
WLAN PCIe 2.0 TP
screen
2 USB port 4 5GT/s Intel Bridge 2
port 4 page 31 page 40

Flexible IO PCH page 38 page 38 page 31
48MHz
PCIe 2.0 Lynx Point USBx8
Port 4 Port 5
5GT/s
SATA3.0 SATA3.0
port 3 6.0 Gb/s 6.0 Gb/s
port 4 port 2 FCBGA 695Balls HD Audio 3.3V 24MHz Touch Pad
PS2 / I2C
SATA HDD SATA CDROM 20mm x 20mm
LAN(GbE)/ Card Reader
Conn. Conn. HDA Codec
Realtek 8411B
page 34 ALC283 page 40
page 41
P.13~22 SPI
Card Reader RJ45 conn.

3 2 in 1 (SD) LPC BUS 3
page 37 page 37 SPI ROM x2 Int. Speaker Combo Jack Int. MIC
CLK=24MHz
page 17
page 35 ENE page 41 page 41 page 41
page 35 KB9012/9022
page 39
RTC CKT. Sub Board

page 13
LSB161 Int.KBD
PWR/B
Power On/Off CKT. page 38
page 40
page 40
LSB162
USB/B (port 1,2)
4
DC/DC Interface CKT. 4
page 38
page 43

2013/12/26 2014/12/26 Title
Power Circuit DC/DC Issued Date Deciphered Date Block Diagrams
page 44~56 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
WWW.AliSaler.Com
Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAW M/B LA-B702
A B C D E
A B C D E
SIGNAL
Voltage Rails STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Power Plane Description S1 S3 S5 Full ON HIGH HIGH HIGH HIGH ON ON ON ON

VIN Adapter power supply (19V) N/A N/A N/A
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
BATT+ Battery power supply (12.6V) N/A N/A N/A
B+ AC or battery power rail for power circuit. N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
+CPU_CORE Core voltage for CPU ON OFF OFF
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
1
+VGA_CORE Core voltage for GPU ON OFF OFF 1
+0.675VS +0.675VS power rail for DDR3L terminator ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VS +1.05V power rail for CPU ON OFF OFF
+1.05VSDGPU +1.05VSDGPU switched power rail for GPU ON OFF OFF Board ID / SKU ID Table for AD channel
+1.35V +1.35V power rail for DDR3L ON ON OFF Vcc 3.3V
+1.5VSDGPU +1.5VSDGPU power rail for GPU ON OFF OFF Ra 100K +/- 1%
+1.5VS +1.5V power rail for CPU ON OFF OFF Board ID Rb V AD_BID min V AD_BID typ V AD_BID max EC AD
+3VALW +3VALW always on power rail ON ON ON* 0 0 0 V 0 V 0 V 0x00-0x0B
+3VLP B+ to +3VLP power rail for suspend power ON ON ON 1 12K +/- 1% 0.347 V 0.354 V 0.360 V 0x0C-0x1C
+3VS +3VALW to +3VS power rail ON OFF OFF 2 15K +/- 1% 0.423 V 0.430 V 0.438 V 0x1D-0x26
+3VSDGPU +3VS to +3VSDGPU power rail for GPU ON OFF OFF 3 20K +/- 1% 0.541 V 0.550 V 0.559 V 0x27-0x30
+5VALW +5VALWP to +5VALW power rail ON ON ON* 4 27K +/- 1% 0.691 V 0.702 V 0.713 V 0x31-0x3B
+5VS +5VALW to +5VS power rail ON OFF OFF 5 33K +/- 1% 0.807 V 0.819 V 0.831 V 0x3C-0x46
+RTCVCC RTC power ON ON ON 6 43K +/- 1% 0.978 V 0.992 V 1.006 V 0x47-0x54
7 56K +/- 1% 1.169 V 1.185 V 1.200 V 0x55-0x64
8 75K +/- 1% 1.398 V 1.414 V 1.430 V 0x65-0x76
2 9 100K +/- 1% 1.634 V 1.650 V 1.667 V 0x77-0x87 2
10 130K +/- 1% 1.849 V 1.865 V 1.881 V 0x88-0x96

11 160K +/- 1% 2.015 V 2.031 V 2.046 V 0x97-0xA3
12 200K +/- 1% 2.185 V 2.200 V 2.215 V 0xA4-0xAD
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. 13 240K +/- 1% 2.316 V 2.329 V 2.343 V 0xAE-0xB7
14 270K +/- 1% 2.395 V 2.408 V 2.421 V 0xB8-0xC0
EC SM Bus1 address EC SM Bus2 address 15 330K +/- 1% 2.521 V 2.533 V 2.544 V 0xC1-0xC9
Device Address Device Address
16 430K +/- 1% 2.667 V 2.677 V 2.687 V 0xCA-0xD3
Smart Battery 0001 011X On Board Thermal Senser 0100 110x
17 560K +/- 1% 2.791 V 2.800 V 2.808 V 0xD4-0xDC
VGA Internal Thermal Senser 0100 000x
18 750K +/- 1% 2.905 V 2.912 V 2.919 V 0xDD-0xE6
19 NC 3.000 V 3.300 V 0xE7-0xFF
PCH SM Bus address

Device Address
ChannelA DIMM0 JDIMM1 BOARD ID Table BTO Option Table
1010 0000
ChannelB DIMM1 1010 0010 JDIMM2
BTO Item BOM Structure
3 Board ID PCB Revision Unpop @ 3
0 0.1 Connector CONN@

USB Port Table 1 0.2 EC 9022 9022@
2 - EC 9012 9012@
3 External
USB 2.0 Port 3 0.3 UMA Component UMAO@
USB Port
4 1.0 GPU VGA@
0 USB Port(Left 3.0)
5 EDP panel EDP@
1 USB Port(Right 2.0)
6 eDP to LVDS LVDS@
2 USB Port(Right 2.0)
7 EMC Component EMC@
3 Finger Printer
EHCI1 EMC Reserve XEMC@
4 Touch Screen VGM@, SGT@
DGPU_IDEN
5 USB/I2C Bridge
VGM-820M;SGT-840M
6 WLAN
GC6 2.0 GC6@
7 Webcam
non GC6 NGC6@
USB 3.0 Port
VRAM Selection X76@
0 USB Port(Left 3.0)
Digital MIC 1Dmic@/2Dmic@
1
4 XHCI USB/I2C BRI TPBRI@ 4
2
Touch Screen TS@
3

2013/12/26 2014/12/26 Title
Issued Date Deciphered Date Notes List
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z5WAW M/B LA-B702
Date: Wednesday, May 28, 2014 Sheet 3 of 56
A B C D E
5 4 3 2 1
PEG_GTX_HRX_N[0..7] <23>
PEG_GTX_HRX_P[0..7] <23>
PEG_HTX_C_GRX_N[0..7] <23>
PEG_HTX_C_GRX_P[0..7] <23>
+VCOMP_OUT
PEG_RCOMP 2 1
24.9_0402_1% R1
D D
Note:
Trace width=12 mils ,Spacing=15mils
Max length= 400 mils.
Haswell rPGA EDS

JCPU1A
E23 PEG_RCOMP
PEG_RCOMP M29
DMI_CRX_PTX_N0 D21 PEG_RXN_0 K28
<14> DMI_CRX_PTX_N0 DMI_RXN_0 PEG_RXN_1
<14> DMI_CRX_PTX_N1 DMI_CRX_PTX_N1 C21 M31
DMI_CRX_PTX_N2 B21 DMI_RXN_1 PEG_RXN_2 L30
<14> DMI_CRX_PTX_N2 DMI_RXN_2 PEG_RXN_3
<14> DMI_CRX_PTX_N3 DMI_CRX_PTX_N3 A21 M33
DMI_RXN_3 PEG_RXN_4 L32
DMI_CRX_PTX_P0 D20 PEG_RXN_5 M35
<14> DMI_CRX_PTX_P0
PEG
DMI_CRX_PTX_P1 C20 DMI_RXP_0 PEG_RXN_6 L34
<14> DMI_CRX_PTX_P1 DMI_RXP_1 PEG_RXN_7
<14> DMI_CRX_PTX_P2 DMI_CRX_PTX_P2 B20 E29 PEG_GTX_C_HRX_N7 0.22U_0402_10V6K VGM@ 2 1 C34 PEG_GTX_HRX_N7
DMI_CRX_PTX_P3 A20 DMI_RXP_2 PEG_RXN_8 D28PEG_GTX_C_HRX_N6 0.22U_0402_10V6K VGM@ 2 1 C35 PEG_GTX_HRX_N6
<14> DMI_CRX_PTX_P3
DMI
DMI_RXP_3 PEG_RXN_9 E31 PEG_GTX_C_HRX_N5 0.22U_0402_10V6K VGM@ 2 1 C36 PEG_GTX_HRX_N5
DMI_CTX_PRX_N0 D18 PEG_RXN_10 D30PEG_GTX_C_HRX_N4 0.22U_0402_10V6K VGM@ 2 1 C38 PEG_GTX_HRX_N4
<14> DMI_CTX_PRX_N0 DMI_TXN_0 PEG_RXN_11
DMI_CTX_PRX_N1 C17 E35 PEG_GTX_C_HRX_N3 0.22U_0402_10V6K VGA@ 2 1 C42 PEG_GTX_HRX_N3
DMI_CTX_PRX_N2 B17 D34PEG_GTX_C_HRX_N2 0.22U_0402_10V6K VGA@ 2 1 C43 PEG_GTX_HRX_N2
DMI_CTX_PRX_N3 A17 E33 PEG_GTX_C_HRX_N1 0.22U_0402_10V6K VGA@ 2 1 C44 PEG_GTX_HRX_N1
<14> DMI_CTX_PRX_N3 DMI_TXN_3 PEG_RXN_14 E32 PEG_GTX_C_HRX_N0 0.22U_0402_10V6K VGA@ 2 1 C46 PEG_GTX_HRX_N0
DMI_CTX_PRX_P0 D17 PEG_RXN_15 L29
<14> DMI_CTX_PRX_P0 DMI_TXP_0 PEG_RXP_0
C DMI_CTX_PRX_P1 C18 L28 C
DMI_CTX_PRX_P2 B18 L31
DMI_CTX_PRX_P3 A18 K30
<14> DMI_CTX_PRX_P3 DMI_TXP_3 PEG_RXP_3 L33
PEG_RXP_4 K32
Design Guide show: PEG_RXP_5 L35
have to routed PEG_RXP_6 K34
PEG_RXP_7 F29 PEG_GTX_C_HRX_P7 0.22U_0402_10V6K VGM@ 2 1 C41 PEG_GTX_HRX_P7
FDI_CSYNC H29 PEG_RXP_8 E28 PEG_GTX_C_HRX_P6 0.22U_0402_10V6K VGM@ 2 1 C47 PEG_GTX_HRX_P6
<14> FDI_CSYNC
FDI
FDI_INT J29 FDI_CSYNC PEG_RXP_9 F31 PEG_GTX_C_HRX_P5 0.22U_0402_10V6K VGM@ 2 1 C48 PEG_GTX_HRX_P5
<14> FDI_INT DISP_INT PEG_RXP_10 E30 PEG_GTX_C_HRX_P4 0.22U_0402_10V6K VGM@ 2 1 C50 PEG_GTX_HRX_P4
PEG_RXP_11 F35 PEG_GTX_C_HRX_P3 0.22U_0402_10V6K VGA@ 2 1 C51 PEG_GTX_HRX_P3
PEG_RXP_12 E34 PEG_GTX_C_HRX_P2 0.22U_0402_10V6K VGA@ 2 1 C52 PEG_GTX_HRX_P2
PEG_RXP_13 F33 PEG_GTX_C_HRX_P1 0.22U_0402_10V6K VGA@ 2 1 C116 PEG_GTX_HRX_P1
PEG_RXP_14 D32 PEG_GTX_C_HRX_P0 0.22U_0402_10V6K VGA@ 2 1 C118 PEG_GTX_HRX_P0
PEG_RXP_15 H35
PEG_TXN_0 H34
PEG_TXN_1 J33
PEG_TXN_2 H32
PEG_TXN_3 J31
PEG_TXN_4 G30
PEG_TXN_5 C33
PEG_TXN_6 B32
PEG_TXN_7 B31 PEG_HTX_GRX_N7 0.22U_0402_10V6K VGM@ 2 1 C45 PEG_HTX_C_GRX_N7
PEG_TXN_8 A30 PEG_HTX_GRX_N6 0.22U_0402_10V6K VGM@ 2 1 C119 PEG_HTX_C_GRX_N6
PEG_TXN_9 B29 PEG_HTX_GRX_N5 0.22U_0402_10V6K VGM@ 2 1 C120 PEG_HTX_C_GRX_N5
PEG_TXN_10 A28 PEG_HTX_GRX_N4 0.22U_0402_10V6K VGM@ 2 1 C122 PEG_HTX_C_GRX_N4
PEG_TXN_11 B27 PEG_HTX_GRX_N3 0.22U_0402_10V6K VGA@ 2 1 C124 PEG_HTX_C_GRX_N3
PEG_TXN_12 A26 PEG_HTX_GRX_N2 0.22U_0402_10V6K VGA@ 2 1 C125 PEG_HTX_C_GRX_N2
PEG_TXN_13 B25 PEG_HTX_GRX_N1 0.22U_0402_10V6K VGA@ 2 1 C126 PEG_HTX_C_GRX_N1
B PEG_TXN_14 A24 PEG_HTX_GRX_N0 0.22U_0402_10V6K VGA@ 2 1 C127 PEG_HTX_C_GRX_N0 B
PEG_TXN_15 J35
PEG_TXP_0 G34
PEG_TXP_1 H33
PEG_TXP_2 G32
PEG_TXP_3 H31
PEG_TXP_4 H30
PEG_TXP_5 B33
PEG_TXP_6 A32
PEG_TXP_7 C31 PEG_HTX_GRX_P7 0.22U_0402_10V6K VGM@ 2 1 C49 PEG_HTX_C_GRX_P7
PEG_TXP_8 B30 PEG_HTX_GRX_P6 0.22U_0402_10V6K VGM@ 2 1 C128 PEG_HTX_C_GRX_P6
PEG_TXP_9 C29 PEG_HTX_GRX_P5 0.22U_0402_10V6K VGM@ 2 1 C133 PEG_HTX_C_GRX_P5
PEG_TXP_10 B28 PEG_HTX_GRX_P4 0.22U_0402_10V6K VGM@ 2 1 C151 PEG_HTX_C_GRX_P4
PEG_TXP_11 C27 PEG_HTX_GRX_P3 0.22U_0402_10V6K VGA@ 2 1 C160 PEG_HTX_C_GRX_P3
PEG_TXP_12 B26 PEG_HTX_GRX_P2 0.22U_0402_10V6K VGA@ 2 1 C161 PEG_HTX_C_GRX_P2
PEG_TXP_13 C25 PEG_HTX_GRX_P1 0.22U_0402_10V6K VGA@ 2 1 C164 PEG_HTX_C_GRX_P1
PEG_TXP_14 B24 PEG_HTX_GRX_P0 0.22U_0402_10V6K VGA@ 2 1 C187 PEG_HTX_C_GRX_P0
PEG_TXP_15
INTEL_HASWELL_HASWELL 1 OF 9
CONN@
A A
Security Classification Compal Secret Data

PROCESSOR(1/7) DMI,FDI,PEG
Custom 0.2
Z5WAW M/B LA-B702
WWW.AliSaler.Com
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
5 4 3 2 1
D D
Place near SODIMM side,
R46
1K_0402_5%
H_DRAMRST# 1 2
DDR3_DRAMRST# <11,12>
1 0.1U_0402_16V7K~N
2014.05.06 Change to Pop For Z5WAW ESD
C591
EMC@
2
DDR3 COMPENSATION SIGNALS
+VCCIO_OUT SM_RCOMP0 R5 1 2 100_0402_1%
SM_RCOMP1 R6 1 2 75_0402_1%
SM_RCOMP2 R7 1 2 100_0402_1%
Note: Haswell rPGA EDS
1
JCPU1B Note:
R8 PECI/THERMTRIP:
62_0402_5% Trace width=4 mils ,Spacing=18mil AP32
SKTOCC
MISC
SM_RCOMP_0
AP3 SM_RCOMP0 Trace width=12~15 mil, Spcing=20 mils
AR3 SM_RCOMP1 2014.05.06 Change to Pop For Z5WAW ESD
SM_RCOMP_1 Max trace length= 500 mils
DDR3
Zo=50 ohm
THERMAL
T31 H_CATERR# AN32 AP2 SM_RCOMP2
2
H_PECI AR27 CATERR SM_RCOMP_2 AN3 H_DRAMRST#

<39> H_PECI PECI SM_DRAMRST
T32 +VCCST AK31
<39,44> H_PROCHOT# H_PROCHOT# R9 1 2 H_PROCHOT#_R AM30 FC_AK31
PROCHOT PRDY
AR29
1
C611 PU/PD for JTAG signals
56_0402_5% AM35 AT29 0.1U_0402_16V7K~N
<19> H_THRMTRIP# THERMTRIP PREQ AM34 XDP_TCLK EMC@
C TCK AN33 XDP_TMS 2 +3VS C
TMS AM33 XDP_TRST# T100
JTAG
H_PM_SYNC AT28 TRST AM31 XDP_TDI XDP_DBRESET# R11 2 1 1K_0402_5%
<14> H_PM_SYNC
PWR
H_CPUPWRGD AL34 PM_SYNC TDI AL33 XDP_TDO T101
<19> H_CPUPWRGD PWRGOOD TDO
PM_DRAM_PWRGD AC10 AP33 XDP_DBRESET#
CPU_PLTRST# AT26 SM_DRAMPWROK DBR
<19> CPU_PLTRST# PLTRSTIN
2
AR30 +1.05VS
BPM_N_0 1
AN31 C186
R15 G28 BPM_N_1 AN29 0.1U_0402_16V7K~N
<16> CLK_CPU_DPLL# DPLL_REF_CLKN BPM_N_2
CLOCK
10K_0402_5% H28 AP31 @ 51_0804_8P4R_5%
<16> CLK_CPU_DPLL DPLL_REF_CLKP BPM_N_3 2
<16> CLK_CPU_SSC_DPLL# F27 AP30 XDP_TDO 5 4
1
E27 SSC_DPLL_REF_CLKN BPM_N_4 AN28 For ESD XDP_TRST# 6 3

<16> CLK_CPU_SSC_DPLL SSC_DPLL_REF_CLKP BPM_N_5
D26 AP29 Near Chip XDP_TCLK 7 2
<16> CLK_CPU_DMI# BCLKN BPM_N_6
<16> CLK_CPU_DMI E26 AP28 8 1
BCLKP BPM_N_7
RP19
H_PECI INTEL_HASWELL_HASWELL 2 OF 9
H_CPUPWRGD
PM_DRAM_PWRGD +VCCIO_OUT CONN@
R26
CLK_CPU_SSC_DPLL 2 @ 1 10K_0402_5%
2014.05.06 Change to POP For Z5WAW ESD R27
1 C589 1 C592 1 C588 CLK_CPU_SSC_DPLL# 2 @ 1 10K_0402_5%
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
@ @ EMC@
2 2 2
SSC CLOCK TERMINATION, IF NOT USED, stuff R26,R27
For ESD
Near Chip
B B
SM_DRAMPWROK with DDR Power Gating Topology
+1.35V_CPU_VDDQ
1
R30
1.8K_0402_1%
2
<14> PM_DRAM_PWRGD PM_DRAM_PWRGD

1
R36
3.3K_0402_1%
2
A A

PROCESSOR(2/7) PM,XDP,CLK
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Z5WAW M/B LA-B702 0.2
5 4 3 2 1
5 4 3 2 1
Haswell rPGA EDS

JCPU1C
Haswell rPGA EDS
<11> DDR_A_D[0..63]
DDR_A_D0 AR15 AC7 T12 JCPU1D
SA_DQ_0 RSVD <12> DDR_B_D[0..63]
DDR_A_D1 AT14 U4 M_CLK_DDR#0
SA_DQ_1 SA_CK_N_0 M_CLK_DDR#0 <11>
DDR_A_D2 AM14 V4 M_CLK_DDR0 DDR_B_D0 AR18 AG8 T13
SA_DQ_2 SA_CK_P_0 M_CLK_DDR0 <11> SB_DQ_0 RSVD
DDR_A_D3 AN14 AD9 DDR_CKE0_DIMMA DDR_B_D1 AT18 Y4 M_CLK_DDR#2
SA_DQ_3 SA_CKE_0 DDR_CKE0_DIMMA <11> SB_DQ_1 SB_CKN0 M_CLK_DDR#2 <12>
DDR_A_D4 AT15 U3 M_CLK_DDR#1 DDR_B_D2 AM17 AA4 M_CLK_DDR2
SA_DQ_4 SA_CK_N_1 M_CLK_DDR#1 <11> SB_DQ_2 SB_CK0 M_CLK_DDR2 <12>
DDR_A_D5 AR14 V3 M_CLK_DDR1 DDR_B_D3 AM18 AF10 DDR_CKE2_DIMMB
SA_DQ_5 SA_CK_P_1 M_CLK_DDR1 <11> SB_DQ_3 SB_CKE_0 DDR_CKE2_DIMMB <12>
DDR_A_D6 AN15 AC9 DDR_CKE1_DIMMA DDR_B_D4 AR17 Y3 M_CLK_DDR#3
SA_DQ_6 SA_CKE_1 DDR_CKE1_DIMMA <11> SB_DQ_4 SB_CKN1 M_CLK_DDR#3 <12>
DDR_A_D7 AM15 U2 DDR_B_D5 AT17 AA3 M_CLK_DDR3
SA_DQ_7 SA_CK_N_2 SB_DQ_5 SB_CK1 M_CLK_DDR3 <12>
DDR_A_D8 AM9 V2 DDR_B_D6 AN17 AG10 DDR_CKE3_DIMMB
SA_DQ_8 SA_CK_P_2 SB_DQ_6 SB_CKE_1 DDR_CKE3_DIMMB <12>
DDR_A_D9 AN9 AD8 DDR_B_D7 AN18 Y2
DDR_A_D10 AM8 SA_DQ_9 SA_CKE_2 U1 DDR_B_D8 AT12 SB_DQ_7 SB_CKN2 AA2
DDR_A_D11 AN8 SA_DQ_10 SA_CK_N_3 V1 DDR_B_D9 AR12 SB_DQ_8 SB_CK2 AG9
D DDR_A_D12 AR9 SA_DQ_11 SA_CK_P_3 AC8 DDR_B_D10 AN12 SB_DQ_9 SB_CKE_2 Y1 D
DDR_A_D13 AT9 SA_DQ_12 SA_CKE_3 DDR_B_D11 AM11 SB_DQ_10 SB_CKN3 AA1
DDR_A_D14 AR8 SA_DQ_13 M7 DDR_CS0_DIMMA# DDR_B_D12 AT11 SB_DQ_11 SB_CK3 AF9
SA_DQ_14 SA_CS_N_0 DDR_CS0_DIMMA# <11> SB_DQ_12 SB_CKE_3
DDR_A_D15 AT8 L9 DDR_CS1_DIMMA# DDR_B_D13 AR11
SA_DQ_15 SA_CS_N_1 DDR_CS1_DIMMA# <11> SB_DQ_13
DDR_A_D16 AJ9 M9 DDR_B_D14 AM12 P4 DDR_CS2_DIMMB#
SA_DQ_16 SA_CS_N_2 SB_DQ_14 SB_CS_N_0 DDR_CS2_DIMMB# <12>
DDR_A_D17 AK9 M10 DDR_B_D15 AN11 R2 DDR_CS3_DIMMB#
SA_DQ_17 SA_CS_N_3 SB_DQ_15 SB_CS_N_1 DDR_CS3_DIMMB# <12>
DDR_A_D18 AJ6 M8 M_ODT0 DDR_B_D16 AR5 P3
SA_DQ_18 SA_ODT_0 M_ODT0 <11> SB_DQ_16 SB_CS_N_2
DDR_A_D19 AK6 L7 M_ODT1 DDR_B_D17 AR6 P1
SA_DQ_19 SA_ODT_1 M_ODT1 <11> SB_DQ_17 SB_CS_N_3
DDR_A_D20 AJ10 L8 DDR_B_D18 AM5
DDR_A_D21 AK10 SA_DQ_20 SA_ODT_2 L10 DDR_B_D19 AM6 SB_DQ_18 R4 M_ODT2
SA_DQ_21 SA_ODT_3 SB_DQ_19 SB_ODT_0 M_ODT2 <12>
DDR_A_D22 AJ7 V5 DDR_A_BS0 DDR_B_D20 AT5 R3 M_ODT3
SA_DQ_22 SA_BS_0 DDR_A_BS0 <11> SB_DQ_20 SB_ODT_1 M_ODT3 <12>
DDR_A_D23 AK7 U5 DDR_A_BS1 DDR_B_D21 AT6 R1
SA_DQ_23 SA_BS_1 DDR_A_BS1 <11> SB_DQ_21 SB_ODT_2
DDR_A_D24 AF4 AD1 DDR_A_BS2 DDR_B_D22 AN5 P2
SA_DQ_24 SA_BS_2 DDR_A_BS2 <11> SB_DQ_22 SB_ODT_3
DDR_A_D25 AF5 DDR_B_D23 AN6 R7 DDR_B_BS0
SA_DQ_25 SB_DQ_23 SB_BS_0 DDR_B_BS0 <12>
DDR_A_D26 AF1 V10 DDR_B_D24 AJ4 P8 DDR_B_BS1
SA_DQ_26 VSS SB_DQ_24 SB_BS_1 DDR_B_BS1 <12>
DDR_A_D27 AF2 U6 DDR_A_RAS# DDR_B_D25 AK4 AA9 DDR_B_BS2
SA_DQ_27 SA_RAS DDR_A_RAS# <11> SB_DQ_25 SB_BS_2 DDR_B_BS2 <12>
DDR_A_D28 AG4 U7 DDR_A_WE# DDR_B_D26 AJ1
SA_DQ_28 SA_WE DDR_A_WE# <11> SB_DQ_26
DDR_A_D29 AG5 U8 DDR_A_CAS# DDR_B_D27 AJ2 R10
SA_DQ_29 SA_CAS DDR_A_CAS# <11> SB_DQ_27 VSS
DDR_A_D30 AG1 DDR_B_D28 AM1 R6 DDR_B_RAS#
SA_DQ_30 DDR_A_MA[0..15] <11> SB_DQ_28 SB_RAS DDR_B_RAS# <12>
DDR_A_D31 AG2 V8 DDR_A_MA0 DDR_B_D29 AN1 P6 DDR_B_WE#
SA_DQ_31 SA_MA_0 SB_DQ_29 SB_WE DDR_B_WE# <12>
DDR_A_D32 J1 AC6 DDR_A_MA1 DDR_B_D30 AK2 P7 DDR_B_CAS#
SA_DQ_32 SA_MA_1 SB_DQ_30 SB_CAS DDR_B_CAS# <12>
DDR_A_D33 J2 V9 DDR_A_MA2 DDR_B_D31 AK1
SA_DQ_33 SA_MA_2 SB_DQ_31 DDR_B_MA[0..15] <12>
DDR_A_D34 J5 U9 DDR_A_MA3 DDR_B_D32 L2 R8 DDR_B_MA0
DDR_A_D35 H5 SA_DQ_34 SA_MA_3 AC5 DDR_A_MA4 DDR_B_D33 M2 SB_DQ_32 SB_MA_0 Y5 DDR_B_MA1
DDR_A_D36 H2 SA_DQ_35 SA_MA_4 AC4 DDR_A_MA5 DDR_B_D34 L4 SB_DQ_33 SB_MA_1 Y10 DDR_B_MA2
DDR_A_D37 H1 SA_DQ_36 SA_MA_5 AD6 DDR_A_MA6 DDR_B_D35 M4 SB_DQ_34 SB_MA_2 AA5 DDR_B_MA3
DDR_A_D38 J4 SA_DQ_37 SA_MA_6 AC3 DDR_A_MA7 DDR_B_D36 L1 SB_DQ_35 SB_MA_3 Y7 DDR_B_MA4
DDR_A_D39 H4 SA_DQ_38 SA_MA_7 AD5 DDR_A_MA8 DDR_B_D37 M1 SB_DQ_36 SB_MA_4 AA6 DDR_B_MA5
DDR_A_D40 F2 SA_DQ_39 SA_MA_8 AC2 DDR_A_MA9 DDR_B_D38 L5 SB_DQ_37 SB_MA_5 Y6 DDR_B_MA6
DDR_A_D41 F1 SA_DQ_40 SA_MA_9 V6 DDR_A_MA10 DDR_B_D39 M5 SB_DQ_38 SB_MA_6 AA7 DDR_B_MA7
DDR_A_D42 D2 SA_DQ_41 SA_MA_10 AC1 DDR_A_MA11 DDR_B_D40 G7 SB_DQ_39 SB_MA_7 Y8 DDR_B_MA8
DDR_A_D43 D3 SA_DQ_42 SA_MA_11 AD4 DDR_A_MA12 DDR_B_D41 J8 SB_DQ_40 SB_MA_8 AA10 DDR_B_MA9
C DDR_A_D44 D1 SA_DQ_43 SA_MA_12 V7 DDR_A_MA13 DDR_B_D42 G8 SB_DQ_41 SB_MA_9 R9 DDR_B_MA10 C
DDR_A_D45 F3 SA_DQ_44 SA_MA_13 AD3 DDR_A_MA14 DDR_B_D43 G9 SB_DQ_42 SB_MA_10 Y9 DDR_B_MA11
DDR_A_D46 C3 SA_DQ_45 SA_MA_14 AD2 DDR_A_MA15 DDR_B_D44 J7 SB_DQ_43 SB_MA_11 AF7 DDR_B_MA12
DDR_A_D47 B3 SA_DQ_46 SA_MA_15 DDR_B_D45 J9 SB_DQ_44 SB_MA_12 P9 DDR_B_MA13
DDR_A_D48 B5 SA_DQ_47 DDR_B_D46 G10 SB_DQ_45 SB_MA_13 AA8 DDR_B_MA14
SA_DQ_48 DDR_A_DQS#[0..7] <11> SB_DQ_46 SB_MA_14
DDR_A_D49 E6 AP15 DDR_A_DQS#0 DDR_B_D47 J10 AG7 DDR_B_MA15
DDR_A_D50 A5 SA_DQ_49 SA_DQS_N_0 AP8 DDR_A_DQS#1 DDR_B_D48 A8 SB_DQ_47 SB_MA_15
DDR_A_D51 D6 SA_DQ_50 SA_DQS_N_1 AJ8 DDR_A_DQS#2 DDR_B_D49 B8 SB_DQ_48
SA_DQ_51 SA_DQS_N_2 SB_DQ_49 DDR_B_DQS#[0..7] <12>
DDR_A_D52 D5 AF3 DDR_A_DQS#3 DDR_B_D50 A9 AP18 DDR_B_DQS#0
DDR_A_D53 E5 SA_DQ_52 SA_DQS_N_3 J3 DDR_A_DQS#4 DDR_B_D51 B9 SB_DQ_50 SB_DQS_N_0 AP11 DDR_B_DQS#1
DDR_A_D54 B6 SA_DQ_53 SA_DQS_N_4 E2 DDR_A_DQS#5 DDR_B_D52 D8 SB_DQ_51 SB_DQS_N_1 AP5 DDR_B_DQS#2
DDR_A_D55 A6 SA_DQ_54 SA_DQS_N_5 C5 DDR_A_DQS#6 DDR_B_D53 E8 SB_DQ_52 SB_DQS_N_2 AJ3 DDR_B_DQS#3
DDR_A_D56 E12 SA_DQ_55 SA_DQS_N_6 C11 DDR_A_DQS#7 DDR_B_D54 D9 SB_DQ_53 SB_DQS_N_3 L3 DDR_B_DQS#4
SA_DQ_56 SA_DQS_N_7 DDR_A_DQS[0..7] <11> SB_DQ_54 SB_DQS_N_4
DDR_A_D57 D12 AP14 DDR_A_DQS0 DDR_B_D55 E9 H9 DDR_B_DQS#5
DDR_A_D58 B11 SA_DQ_57 SA_DQS_P_0 AP9 DDR_A_DQS1 DDR_B_D56 E15 SB_DQ_55 SB_DQS_N_5 C8 DDR_B_DQS#6
DDR_A_D59 A11 SA_DQ_58 SA_DQS_P_1 AK8 DDR_A_DQS2 DDR_B_D57 D15 SB_DQ_56 SB_DQS_N_6 C14 DDR_B_DQS#7
SA_DQ_59 SA_DQS_P_2 SB_DQ_57 SB_DQS_N_7 DDR_B_DQS[0..7] <12>
DDR_A_D60 E11 AG3 DDR_A_DQS3 DDR_B_D58 A15 AP17 DDR_B_DQS0
DDR_A_D61 D11 SA_DQ_60 SA_DQS_P_3 H3 DDR_A_DQS4 DDR_B_D59 B15 SB_DQ_58 SB_DQS_P_0 AP12 DDR_B_DQS1
DDR_A_D62 B12 SA_DQ_61 SA_DQS_P_4 E3 DDR_A_DQS5 DDR_B_D60 E14 SB_DQ_59 SB_DQS_P_1 AP6 DDR_B_DQS2
DDR_A_D63 A12 SA_DQ_62 SA_DQS_P_5 C6 DDR_A_DQS6 DDR_B_D61 D14 SB_DQ_60 SB_DQS_P_2 AK3 DDR_B_DQS3
+VREF_CA_R AM3 SA_DQ_63 SA_DQS_P_6 C12 DDR_A_DQS7 DDR_B_D62 A14 SB_DQ_61 SB_DQS_P_3 M3 DDR_B_DQS4
+VREF_CA_R SM_VREF SA_DQS_P_7 SB_DQ_62 SB_DQS_P_4
+VREF_DQ_DIMMA_R +VREF_DQ_DIMMA_R F16 DDR_B_D63 B14 H8 DDR_B_DQS5
+VREF_DQ_DIMMB_R F13 SA_DIMM_VREFDQ SB_DQ_63 SB_DQS_P_5 C9 DDR_B_DQS6
+VREF_DQ_DIMMB_R SB_DIMM_VREFDQ SB_DQS_P_6 C15 DDR_B_DQS7
SB_DQS_P_7
INTEL_HASWELL_HASWELL 3 OF 9 INTEL_HASWELL_HASWELL 4 OF 9
CONN@ CONN@
B B
A A

PROCESSOR(3/7) DDRIII
WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
Z5WAW M/B LA-B702
5 4 3 2 1
5 4 3 2 1
D D
COMPENSATION PU FOR eDP
+VCOMP_OUT
EDP_COMP 2 1
24.9_0402_1% R60
Note:
Trace width=20 mils ,Spacing=25mil,
Max length=100 mils.
Haswell rPGA EDS
JCPU1H
HDMI_TX2- 0.1U_0402_16V7K 1 2 C410 CPU_DP2_N0 T28 M27 EDP_AUXN <31>

<32> HDMI_TX2- DDIB_TXBN_0 EDP_AUXN
HDMI D2 HDMI_TX2+ 0.1U_0402_16V7K 1 2 C400 CPU_DP2_P0 U28 N27 EDP_AUXP <31>
<32> HDMI_TX2+ DDIB_TXBP_0 EDP_AUXP
HDMI_TX1- 0.1U_0402_16V7K 1 2 C395 CPU_DP2_N1 T30 P27 EDP_HPD#
<32> HDMI_TX1- DDIB_TXBN_1 EDP_HPD
HDMI D1 HDMI_TX1+ 0.1U_0402_16V7K 1 2 C409 CPU_DP2_P1 U30 eDP E24 EDP_COMP EDP
<32> HDMI_TX1+ DDIB_TXBP_1 EDP_RCOMP
HDMI HDMI_TX0- 0.1U_0402_16V7K 1 2 C408 CPU_DP2_N2 U29 R27
<32> HDMI_TX0- DDIB_TXBN_2 EDP_DISP_UT IL
HDMI D0 HDMI_TX0+ 0.1U_0402_16V7K 1 2 C406 CPU_DP2_P2 V29
<32> HDMI_TX0+ DDIB_TXBP_2
HDMI_CLK- 0.1U_0402_16V7K 1 2 C412 CPU_DP2_N3 U31
<32> HDMI_CLK- DDIB_TXBN_3
HDMI CLK HDMI_CLK+ 0.1U_0402_16V7K 1 2 C411 CPU_DP2_P3 V31
C <32> HDMI_CLK+ DDIB_TXBP_3 C
P35
EDP_TXN_0 EDP_TXN0 <31>
T34 R35
DDIC_TXCN_0 EDP_TXP_0 EDP_TXP0 <31>
U34 N34
DDIC_TXCP_0 EDP_TXN_1 EDP_TXN1 <31>
U35 P34
DDIC_TXCN_1 EDP_TXP_1 EDP_TXP1 <31>
V35 P33
DDIC_TXCP_1 FDI_TXN_0 FDI_CTX_PRX_N0 <14>
U32 R33
DDIC_TXCN_2 FDI_TXP_0 FDI_CTX_PRX_P0 <14>
T32 N32 FDI
DDIC_TXCP_2 FDI_TXN_1 FDI_CTX_PRX_N1 <14>
U33 P32
DDIC_TXCN_3 FDI_TXP_1 FDI_CTX_PRX_P1 <14>
V33
DDIC_TXCP_3
P29
R29 DDID_TXDN_0
N28 DDID_TXDP_0
P28 DDID_TXDN_1 DDI
P31 DDID_TXDP_1
R31 DDID_TXDN_2
N30 DDID_TXDP_2
P30 DDID_TXDN_3
DDID_TXDP_3
INTEL_HASWELL_HASWELL 8 OF 9
+VCCIO_OUT
CONN@
HPD INVERSION FOR EDP
10K_0402_5%
2
R347
1
B EDP_HPD# B
1
2N7002K_SOT23-3
R65
D
1
1K_0402_1%
Q6
<30,31> EDP_HPD 2 @
2
G
S
3
2
R334
100K_0402_5%
1
HPD is a active high signal from device.
The HPD processor input is a low voltage
active signal.
A A

PROCESSOR(4/7) PM,XDP,CLK
5 4 3 2 1
5 4 3 2 1
CFG Straps for Processor
CFG2
1
R62
1K_0402_1%
VGA@
2
D D
PEG Static Lane Reversal - CFG2 is for the 16x
1: Normal Operation; Lane # definition matches

CFG2 socket pin map definition
0:Lane Reversed
Haswell rPGA EDS *
JCPU1I CFG4
1
AT1
AT2 RSVD_TP C23 R63
AD10 RSVD_TP RSVD_TP B23 1K_0402_1%
RSVD RSVD_TP D24
2
A34 RSVD_TP D23
A35 RSVD_TP RSVD_TP
RSVD_TP
W29
W28 RSVD_TP AT31 CFG_RCOMP
H_CPU_RSVD G26 RSVD_TP CFG_RCOMP AR21 CFG16 T19
W33 TESTLO_G26 CFG_16 AR23
RSVD CFG_18 Embedded Display Port Presence Strap
AL30 AP21
AL29 RSVD CFG_17 AP23
RSVD CFG_19
C
+CPU_CORE F25
VCC 1 : Disabled; No Physical Display Port C
1 2 H_CPU_TESTLO CFG4 attached to Embedded Display Port
R64 49.9_0402_1% C35 AR33
1 2 CFG_RCOMP B35 RSVD_TP RSVD G6
RSVD_TP FC_G6
R309 49.9_0402_1% AM27 0 : Enabled; An external Display Port device is
R66
1 2 H_CPU_RSVD
49.9_0402_1%
AL25
RSVD_TP
RSVD
RSVD
RSVD
AM26
F5 * connected to the Embedded Display Port
W30 AM2
W31 RSVD_TP RSVD K6
H_CPU_TESTLO W34 RSVD_TP RSVD
TESTLO E18 CFG6
T16 CFG0 AT20 RSVD
T17 CFG1 AR20 CFG_0 U10 CFG5
CFG2 AP20 CFG_1 RSVD P10
CFG_2 RSVD
1
T18 CFG3 AP22 @ @
CFG4 AT22 CFG_3 B1 R67 R68
CFG5 AN22 CFG_4 NC A2 1K_0402_1% 1K_0402_1%
CFG6 AT25 CFG_5 RSVD AR1
AN23 CFG_6 RSVD_TP
2
AR24 CFG_7 E21
AT23 CFG_8 RSVD_TP E20
AN20 CFG_9 RSVD_TP
AP24 CFG_10 AP27
AP26 CFG_11 RSVD AR26
AN25 CFG_12 RSVD
AN26 CFG_13 AL31
AP25 CFG_14 VSS AL32
CFG_15 VSS
PCIE Port Bifurcation Straps
INTEL_HASWELL_HASWELL 9 OF 9 11: (Default) x16 - Device 1 functions 1 and 2 disabled

B
CONN@ CFG[6:5] *10: x8, x8 - Device 1 function 1 enabled ; function 2 B
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PEG DEFER TRAINING
1: (Default) PEG Train immediately following xxRESETB

CFG7 * de assertion
A
0: PEG Wait for BIOS for training A

PROCESSOR(5/7) RSVD,CFG
Z5WAW M/B LA-B702
5 4 3 2 1
5 4 3 2 1
Haswell rPGA EDS +CPU_CORE

JCPU1E
AA26
VCC AA28
K27 VCC AA34
L27 RSVD VCC AA30
+1.35V_CPU_VDDQ Source T27 RSVD
RSVD
VCC
VCC
AA32
V27 AB26
+1.35V_CPU_VDDQ RSVD VCC AB29
VCC AB25
VCC AB27
D VCC AB28 D
AB11 VCC AB30
+1.35V +1.35V_CPU_VDDQ AB2 VDDQ VCC AB31
AB5 VDDQ VCC AB33
J1 AB8 VDDQ VCC AB34
1 2 AE11 VDDQ VCC AB32
AE2 VDDQ VCC AC26
PAD-OPEN 43x118m VDDQ MAX 2.1 A AE5 VDDQ
VDDQ
VCC
VCC
AB35
@ AE8 AC28
AH11 VDDQ VCC AD25
J2 K11 VDDQ VCC AC30
VCC_SENSE +CPU_CORE 1 2 N11 VDDQ
VDDQ
VCC
VCC
AD28
N8 AC32
PAD-OPEN 43x118m T11 VDDQ VCC AD31
VDDQ VCC
100_0402_1%
@ T2 AC34
VDDQ VCC
1
T5 AD34
VDDQ VCC
R79
T8 AD26
W11 VDDQ VCC AD27
W2 VDDQ VCC AD29
2 W5 VDDQ VCC AD30
+VCCIO_OUT W8 VDDQ VCC AD32
VDDQ VCC AD33
VCCSENSE N26 VCC AD35
<51> VCCSENSE RSVD VCC
+CPU_CORE K26 AE26
AL27 VCC VCC AE32
AK27 RSVD VCC AE28
4.7U_0603_6.3V6~N
VSSSENSE RSVD VCC AE30
<10,51> VSSSENSE 1 VCC
C53
@ AG28
VCC AG34
VCC
1
100_0402_1%
C AE34 C
2 VCC AF25
VCC
R84
AF26
VCCSENSE AL35 VCC AF27
E17 VCC_SENSE VCC AF28
2
+VCCIO_OUT AN35 RSVD VCC AF29

+VCCIO_OUT VCCIO_OUT VCC
Note: A23 AF30
F22 RSVD VCC AF31
+VCOMP_OUT VCOMP_OUT VCC
Place the UP resistor close to CPU W32
RSVD VCC
AF32
1
AL16 AF33
R81 J27 RSVD VCC AF34
75_0402_1% AL13 RSVD VCC AF35
RSVD VCC AG26
VCC AH26
VDDQ DECOUPLING 10u *10
2
R83 1 2 43_0402_5% H_CPU_SVIDALRT# AM28 VCC AH29
22u*11 <51> VR_SVID_ALRT# VIDALERT VCC
AM29 AG30
<51> VR_SVID_CLK VIDSCLK VCC
+1.35V_CPU_VDDQ AL28 AG32
330u*1 <51> VR_SVID_DAT VIDSOUT VCC AH32
AP35 VCC AH35
Place to BOT CPU socket cavity Place to TOP CPU socket cavity VSS VCC
1
Note: +1.05VS 2 R88 1 H27 AH25
R87 150_0402_1% AP34 PWR_DEBUG VCC AH27
VSS VCC
2
Place the UP resistor close to CPU 130_0402_1% AT35
RSVD_TP VCC
AH28
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
AR35 AH30
RSVD_TP VCC
10U_0603_6.3V6M~N
C54
10U_0603_6.3V6M~N
C55
10U_0603_6.3V6M~N
C56
10U_0603_6.3V6M~N
C57
10U_0603_6.3V6M~N
C58
1 1 1 1 1 1 1 1 1 1 R89 AR32 AH31
2
RSVD_TP VCC
C148
C141
C142
C257
C93
10K_0402_5% AL26 AH33

@ AT34 RSVD_TP VCC AH34
1
+VCCIO_OUT AL22 VSS VCC AJ25
2 2 2 2 2 2 2 2 2 2 AT33 VSS VCC AJ26
AM21 VSS VCC AJ27
AM25 VSS VCC AJ28
B
AM22 VSS VCC AJ29 B
AM20 VSS VCC AJ30
AM24 VSS VCC AJ31
AL19 VSS VCC AJ32
AM23 VSS VCC AJ33
AT32 VSS VCC AJ34
VSS VCC AJ35
VCC G25
VCC H25
VCC J25
VCC
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 K25
+CPU_CORE VCC L25
+ VCC
C60
C61
C62
C63
C64
C258
C259
C260
C261
C264
C274
C590 M25
330U_2.5V_M Y25 VCC N25
2 2 2 2 2 2 2 2 2 2 2 Y26 VCC VCC P25
2 Y27 VCC VCC R25
Y28 VCC VCC T25
Y29 VCC VCC
Y30 VCC U25
Y31 VCC VCC U26
Y32 VCC VCC V25
Place to TOP CPU socket cavity Place to BOT CPU socket cavity Y33 VCC VCC V26
Y34 VCC VCC
Y35 VCC W26
VCC VCC W27
VCC
SF000006S00 INTEL_HASWELL_HASWELL 5 OF 9
CONN@
330U 2.5V H4.2
A
17mohm OSCON A

PROCESSOR(6/7) PWR
Custom 0.2
Z5WAW M/B LA-B702
5 4 3 2 1
5 4 3 2 1
Haswell rPGA EDS Haswell rPGA EDS

JCPU1F JCPU1G
D A10 AK34 B34 K10 D

A13 VSS VSS AK5 B4 VSS VSS K2
A16 VSS VSS AL1 B7 VSS VSS K29
A19 VSS VSS AL10 C1 VSS VSS K3
A7 VSS VSS AL21 C28 VSS VSS L11
AA11 VSS VSS AL23 C30 VSS VSS L26
AA25 VSS VSS E22 C32 VSS VSS L6
AA27 VSS VSS AL3 C34 VSS VSS M11
AB1 VSS VSS AL6 D10 VSS VSS M30
AB10 VSS VSS AL7 D13 VSS VSS M32
AA33 VSS VSS AL8 D16 VSS VSS M34
AA35 VSS VSS AL9 D19 VSS VSS M6
AB3 VSS VSS AM10 D22 VSS VSS N1
AC25 VSS VSS AM13 D25 VSS VSS N10
AB6 VSS VSS E25 D31 VSS VSS N3
AD11 VSS VSS AN10 D7 VSS VSS N4
AC29 VSS VSS AN13 E1 VSS VSS N5
C AC31 VSS VSS AN16 E10 VSS VSS N6 C
AD7 VSS VSS AN21 E4 VSS VSS P11
AE1 VSS VSS AN24 E7 VSS VSS P26
AE10 VSS VSS AN27 F10 VSS VSS P5
AE25 VSS VSS AN30 F11 VSS VSS R11
AE35 VSS VSS AP1 F17 VSS VSS R32
AE7 VSS VSS AP16 F21 VSS VSS T1
AE9 VSS VSS AP19 F23 VSS VSS T10
AF11 VSS VSS AP4 F24 VSS VSS T29
AF6 VSS VSS AP7 F26 VSS VSS T3
AF8 VSS VSS W25 F28 VSS VSS T31
AG11 VSS VSS AR10 F30 VSS VSS T33
AE31 VSS VSS AR16 F34 VSS VSS T4
AE33 VSS VSS AR2 F6 VSS VSS T7
AH1 VSS VSS AR25 F8 VSS VSS U11
AH10 VSS VSS AR28 F9 VSS VSS U27
AH2 VSS VSS AR31 G1 VSS VSS V11
AG27 VSS VSS AR34 G11 VSS VSS V28
AG29 VSS VSS AR4 G2 VSS VSS V30
AH3 VSS VSS AR7 G27 VSS VSS V32
AG33 VSS VSS AT10 G29 VSS VSS V34
AG35 VSS VSS AT13 G3 VSS VSS W1
B AH4 VSS VSS AT16 G31 VSS VSS W10 B
AH5 VSS VSS AT19 G33 VSS VSS W3
AH9 VSS VSS AT3 H10 VSS VSS W7
AJ11 VSS VSS AT30 H26 VSS VSS W9
AJ5 VSS VSS AT4 H6 VSS VSS Y11
AK11 VSS VSS AT7 H7 VSS VSS H11
AK25 VSS VSS B10 J11 VSS VSS AL24
AK26 VSS VSS B13 J26 VSS VSS F19
AK28 VSS VSS B16 J28 VSS VSS T26
AK29 VSS VSS B19 J30 VSS VSS AK35
VSS VSS VSS VSS_SENSE VSSSENSE <51,9>
AK30 B2 J32 AK33
AK32 VSS VSS B22 J34 VSS RSVD T15
E19 VSS VSS J6 VSS
VSS K1 VSS
VSS
INTEL_HASWELL_HASWELL 6 OF 9 INTEL_HASWELL_HASWELL 7 OF 9
CONN@ CONN@
A A

PROCESSOR(7/7) VSS
Z5WAW M/B LA-B702
5 4 3 2 1
5 4 3 2 1
+1.35V +1.35V
3A@1. 35V <6> DDR_A_D[0..63] +VREF_DQ_DIMMA_R
DDR3L SO-DIMM A <6> DDR_A_DQS[0..7]

+VREF_DQ_DIMMA
<6> DDR_A_DQS#[0..7]
JDIMM1
+VREF_DQ_DIMMA 1 2 CRB:0ohm
VREF_DQ VSS1 <6> DDR_A_MA[0..15]
3 4 DDR_A_D4
DDR_A_D0 5 VSS2 DQ4 6 DDR_A_D5 EDS&DG:defined as VDDQ/2
DQ0 DQ5
0.1U_0402_16V7K~N
1 DDR_A_D1 7 8
9 DQ1 VSS3 10 DDR_A_DQS#0 R48 1 2 2.2_0402_1% +VREF_DQ_DIMMA
VSS4 DQS#0
C66
11 12 DDR_A_DQS0
DM0 DQS0
1
D 13 14 D
2 DDR_A_D2 15 VSS5 VSS6 16 DDR_A_D6 C39
DDR_A_D3 17 DQ2 DQ6 18 DDR_A_D7 0.022U_0402_16V7K~N
2
19 DQ3 DQ7 20
DDR_A_D8 21 VSS7 VSS8 22 DDR_A_D12
DQ8 DQ12
1
DDR_A_D9 23 24 DDR_A_D13
25 DQ9 DQ13 26 R54
Note:
DDR_A_DQS#1 27 VSS9 VSS10 28 VREF trace width:20 mils at least
DQS#1 DM1 24.9_0402_1%
DDR_A_DQS1 29 30 DDR3_DRAMRST#
31 DQS1 RESET# 32
DDR3_DRAMRST# <12,5> Spacing:20mils to other signal/planes
2
VSS11 VSS12
DDR_A_D10 33
DQ10 DQ14
34 DDR_A_D14 Place near DIMM scoket
DDR_A_D11 35 36 DDR_A_D15
37 DQ11 DQ15 38
DDR_A_D17 41 DQ16 DQ20 42 DDR_A_D21
43 DQ17 DQ21 44
DDR_A_DQS#2 45 VSS15 VSS16 46 +1.35V
DDR_A_DQS2 47 DQS#2 DM2 48
49 DQS2 VSS17 50 DDR_A_D22 +VREF_CA_R +1.35V RP18
DDR_A_D18 51 VSS18 DQ22 52 DDR_A_D23 8 1
DQ18 DQ23 +VREF_DQ_DIMMA
DDR_A_D19 53 54 7 2
DQ19 VSS19 Note:
1
55 56 DDR_A_D28 +VREF_DQ_DIMMB 6 3
DDR_A_D24 57 VSS20 DQ28 58 DDR_A_D29 VREF trace width:20 mils at least 5 4
DDR_A_D25 59 DQ24 DQ29 60 R40
61 DQ25 VSS21 62 DDR_A_DQS#3 1K_0402_1% Spacing:20mils to other signal/planes 1K_0804_8P4R_1%
VSS22 DQS#3 CRB:0ohm
63 64 DDR_A_DQS3 Place near DIMM scoket
2
65 DM3 DQS3 66 EDS&DG:defined as VDDQ/2
DDR_A_D27 69 DQ26 DQ30 70 DDR_A_D31 R47 1 2 2.2_0402_1% +VREF_CA
71 DQ27 DQ31 72
VSS25 VSS26
1
C37
1
C C
0.022U_0402_16V7K~N
1 2
<6> DDR_CKE0_DIMMA DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA
CKE0 CKE1 DDR_CKE1_DIMMA <6>
75 76 R44
77 VDD1 VDD2 78 DDR_A_MA15 R45 1K_0402_1%
DDR_A_BS2 79 NC1 A15 80 DDR_A_MA14
<6> DDR_A_BS2 24.9_0402_1%
2
81 BA2 A14 82
DDR_A_MA12 83 VDD3 VDD4 84 DDR_A_MA11
2
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7
87 A9 A7 88
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
93 A5 A4 94
Layout Note:
DDR_A_MA1 97 A3 A2 98 DDR_A_MA0 Place near DIMM
99 A1 A0 100
M_CLK_DDR0 101 VDD9 VDD10 102 M_CLK_DDR1
<6> M_CLK_DDR0 CK0 CK1 M_CLK_DDR1 <6>
<6> M_CLK_DDR#0 M_CLK_DDR#0 103 104 M_CLK_DDR#1
CK0# CK1# M_CLK_DDR#1 <6>
105 106
DDR_A_MA10 107 VDD11 VDD12 108 DDR_A_BS1
A10/AP BA1 DDR_A_BS1 <6>
<6> DDR_A_BS0 DDR_A_BS0 109 110 DDR_A_RAS#
BA0 RAS# DDR_A_RAS# <6> +1.35V
111 112
DDR_A_WE# 113 VDD13 VDD14 114 DDR_CS0_DIMMA#
<6> DDR_A_WE# WE# S0# DDR_CS0_DIMMA# <6>
<6> DDR_A_CAS# DDR_A_CAS# 115 116 M_ODT0
CAS# ODT0 M_ODT0 <6>
117 118
DDR_A_MA13 119 VDD15 VDD16 120 M_ODT1
A13 ODT1 M_ODT1 <6>
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
<6> DDR_CS1_DIMMA# DDR_CS1_DIMMA# 121 122 1 1 1 1 1 1 1 1 1 1 1 1 1
S1# NC2
C69
C70
C71
C72
C73
C74
C75
C76
C77
C78
C79
123 124
VDD17 VDD18 + C81
C80
125 126 +VREF_CA
NCTEST VREF_CA +VREF_CA <12>
127 128 @ @ @
DDR_A_D32 129 VSS27 VSS28 130 DDR_A_D36 2 2 2 2 2 2 2 2 2 2 2 2
DQ32 DQ36 2
0.1U_0402_16V7K~N
DDR_A_D33 131 132 DDR_A_D37 1
133 DQ33 DQ37 134 220U_6.3V_M
VSS29 VSS30
C67
B DDR_A_DQS#4 135 136 B
139 DQS4 VSS31 140 DDR_A_D38 2
DDR_A_D34 141 VSS32 DQ38 142 DDR_A_D39
DDR_A_D35 143 DQ34 DQ39 144
145 DQ35 VSS33 146 DDR_A_D44
DDR_A_D41 149 DQ40 DQ45 150
SF000006R00
151 DQ41 VSS35 152 DDR_A_DQS#5 220U 6.3V OSCON
153 VSS36 DQS#5 154 DDR_A_DQS5
155 DM5 DQS5 156
ESR 17mohm@100Khz
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47
161 DQ43 DQ47 162
Layout Note:
DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53 Place near DIMM
167 DQ49 DQ53 168
DDR_A_DQS#6 169 VSS41 VSS42 170
173 DQS6 VSS43 174 DDR_A_D54
DDR_A_D50 175 VSS44 DQ54 176 DDR_A_D55 +0.675VS
DDR_A_D51 177
179
DQ50
DQ51
DQ55
VSS45
178
180 DDR_A_D60
DIMM_A STD H:8mm
DDR_A_D57 183 DQ56 DQ61 184 <Address: 00>
DQ57 VSS47
1U_0402_6.3V6K~N
1U_0402_6.3V6K~N
185 186 DDR_A_DQS#7
187 VSS48
DM7
DQS#7
DQS7
188 DDR_A_DQS7 SP07000N400 1 1
C82
C84
189 190
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
195 DQ59 DQ63 196 2 2
197 VSS51 VSS52 198
A 199 SA0 EVENT# 200 SMB_DATA_S3 A
+3VS VDDSPD SDA SMB_DATA_S3 <12,17,36,42>
201 202 SMB_CLK_S3
SA1 SCL SMB_CLK_S3 <12,17,36,42>
0.1U_0402_16V7K~N
1 203 204 +0.675VS

VTT1 VTT2
0. 65A@0. 675V
C87
205 206
G1 G2
2 LCN_DAN06-K4806-0100
DDRIII-SODIMM SLOT1
Custom 0.2
Z5WAW M/B LA-B702
5 4 3 2 1
5 4 3 2 1
<6> DDR_B_D[0..63]
+1.35V 3A@1. 35V +1.35V
<6> DDR_B_DQS[0..7]
JDIMM2
<6> DDR_B_DQS#[0..7]
+VREF_DQ_DIMMB 1 2
3 VREF_DQ VSS1 4 DDR_B_D4
VSS2 DQ4 <6> DDR_B_MA[0..15]
DDR_B_D0 5 6 DDR_B_D5
DDR_B_D1 7 DQ0 DQ5 8
DQ1 VSS3
0.1U_0402_16V7K~N
1 9 10 DDR_B_DQS#0
11 VSS4 DQS#0 12 DDR_B_DQS0
DM0 DQS0
C89
13 14
DDR_B_D2 15 VSS5 VSS6 16 DDR_B_D6
2 DDR_B_D3 17 DQ2 DQ6 18 DDR_B_D7
D 19 DQ3 DQ7 20 D
DDR_B_D9 23 DQ8 DQ12 24 DDR_B_D13
25 DQ9 DQ13 26
DDR_B_DQS#1 27 VSS9 VSS10 28
DDR_B_DQS1 29 DQS#1 DM1 30 DDR3_DRAMRST#
DQS1 RESET# DDR3_DRAMRST# <11,5>
31 32
DDR_B_D11 35 DQ10 DQ14 36 DDR_B_D15
37 DQ11 DQ15 38 +VREF_DQ_DIMMB_R
DDR_B_D17 41 DQ16 DQ20 42 DDR_B_D21 +VREF_DQ_DIMMB
43 DQ17 DQ21 44
Note: CRB:0ohm
DDR_B_DQS2 47 DQS#2 DM2 48 VREF trace width:20 mils at least EDS&DG:defined as VDDQ/2
49 DQS2 VSS17 50 DDR_B_D22
DDR_B_D18 51 VSS18 DQ22 52 DDR_B_D23 Spacing:20mils to other signal/planes R49 1 2 2.2_0402_1% +VREF_DQ_DIMMB
DDR_B_D19 53 DQ18 DQ23 54
DQ19 VSS19
1
55 56 DDR_B_D28
DDR_B_D24 57 VSS20 DQ28 58 DDR_B_D29 C40
DDR_B_D25 59 DQ24 DQ29 60 0.022U_0402_16V7K~N
1 2
61 DQ25 VSS21 62 DDR_B_DQS#3
65 DM3 DQS3 66 R59
DQ26 DQ30 24.9_0402_1%
DDR_B_D27 69 70 DDR_B_D31
71 DQ27 DQ31 72
2
VSS25 VSS26
<6> DDR_CKE2_DIMMB DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB

CKE0 CKE1 DDR_CKE3_DIMMB <6>
75 76
C 77 VDD1 VDD2 78 DDR_B_MA15 C
DDR_B_BS2 79 NC1 A15 80 DDR_B_MA14
<6> DDR_B_BS2 BA2 A14
81 82
DDR_B_MA12 83 VDD3 VDD4 84 DDR_B_MA11
DDR_B_MA9 85 A12/BC# A11 86 DDR_B_MA7
87 A9 A7 88
DDR_B_MA5 91 A8 A6 92 DDR_B_MA4
93 A5 A4 94
DDR_B_MA1 97 A3 A2 98 DDR_B_MA0
99 A1 A0 100
M_CLK_DDR2 101 VDD9 VDD10 102 M_CLK_DDR3
<6> M_CLK_DDR2 CK0 CK1 M_CLK_DDR3 <6>
<6> M_CLK_DDR#2 M_CLK_DDR#2 103 104 M_CLK_DDR#3
CK0# CK1# M_CLK_DDR#3 <6>
105 106
DDR_B_MA10 107 VDD11 VDD12 108 DDR_B_BS1
A10/AP BA1 DDR_B_BS1 <6>
<6> DDR_B_BS0 DDR_B_BS0 109 110 DDR_B_RAS# Layout Note:
BA0 RAS# DDR_B_RAS# <6>
111 112
DDR_B_WE# 113 VDD13 VDD14 114 DDR_CS2_DIMMB# Place near DIMM
<6> DDR_B_WE# WE# S0# DDR_CS2_DIMMB# <6>
<6> DDR_B_CAS# DDR_B_CAS# 115 116 M_ODT2
CAS# ODT0 M_ODT2 <6>
117 118
DDR_B_MA13 119 VDD15 VDD16 120 M_ODT3
A13 ODT1 M_ODT3 <6>
<6> DDR_CS3_DIMMB# DDR_CS3_DIMMB# 121 122
123 S1# NC2 124
125 VDD17 VDD18 126
NCTEST VREF_CA +VREF_CA <11> +1.35V
127 128
VSS27 VSS28
0.1U_0402_16V7K~N
DDR_B_D32 129 130 DDR_B_D36 1
DDR_B_D33 131 DQ32 DQ36 132 DDR_B_D37
DQ33 DQ37
C90
133 134
DQS#4 DM4 2
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
10U_0603_6.3V6M~N
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
DDR_B_DQS4 137 138 1 1 1 1 1 1 1 1 1 1 1 1 1
DQS4 VSS31
C92
C185
C94
C95
C96
C97
C98
C99
C100
C101
C102
C311
139 140 DDR_B_D38
B DDR_B_D34 141 VSS32 DQ38 142 DDR_B_D39 + C110 B
DDR_B_D35 143 DQ34 DQ39 144 @ @
145 DQ35 VSS33 146 DDR_B_D44 2 2 2 2 2 2 2 2 2 2 2 2
DDR_B_D40 147 VSS34 DQ44 148 DDR_B_D45 2
DDR_B_D41 149 DQ40 DQ45 150 220U_6.3V_M
151 DQ41 VSS35 152 DDR_B_DQS#5
155 DM5 DQS5 156
DDR_B_D43 159 DQ42 DQ46 160 DDR_B_D47
161 DQ43 DQ47 162
DDR_B_D49 165 DQ48 DQ52 166 DDR_B_D53
SF000006R00
167 DQ49 DQ53 168
Layout Note: 220U 6.3V OSCON
DDR_B_DQS#6 169 VSS41 VSS42 170 Place near DIMM
DDR_B_DQS6 171 DQS#6 DM6 172
ESR 17mohm@100Khz
173 DQS6 VSS43 174 DDR_B_D54
DDR_B_D50 175 VSS44 DQ54 176 DDR_B_D55
DDR_B_D51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDR_B_D60
DDR_B_D56 181 VSS46 DQ60 182 DDR_B_D61 +0.675VS
DDR_B_D57 183
185
DQ56
DQ57
DQ61
VSS47
184
186 DDR_B_DQS#7
DIMM_B STD H:4mm
189 DM7 DQS7 190 <Address: 01>
VSS49 VSS50
1U_0402_6.3V6K~N
1U_0402_6.3V6K~N
DDR_B_D58 191 192 DDR_B_D62
DDR_B_D59 193 DQ58
DQ59
DQ62
DQ63
194 DDR_B_D63 SP07000N300 1 1
C105
C107
195 196
197 VSS51 VSS52 198
199 SA0 EVENT# 200 SMB_DATA_S3
+3VS VDDSPD SDA SMB_DATA_S3 <11,17,36,42> 2 2
1 2 201 202 SMB_CLK_S3
+3VS SA1 SCL SMB_CLK_S3 <11,17,36,42>
R335 10K_0402_5% 203 204 +0.675VS
VTT1 VTT2
0.1U_0402_16V7K~N
A A
1
205 206 0. 65A@0. 675V
G1 G2
C109
LCN_DAN06-K4406-0100
2

DDRIII-SODIMM SLOT2
0.2
Z5WAW M/B LA-B702
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
PCH_RTCX1
PCH_RTCRST#
1 2 PCH_RTCX2
R336 10M_0402_5%
Note:
D
1
PCH_RTCX1/PCHRTCX2
2
Trace length <1000 mils Y1
<39> EC_RTCRST#
G
1 2 S
3
32.768KHZ_12.5PF Q3
D D
@
1 1
C312 C313 L2N7002LT1G_SOT23-3
18P_0402_50V8J 18P_0402_50V8J
+RTCVCC 2 2
PL 10k at EC side
R337 1 2 1M_0402_5% SM_INTRUDER#
R338 1 2 330K_0402_5% PCH_INTVRMEN U4A LPT_PCH_M_EDS

+RTCVCC
BC8
INTVRMEN 1
C113 PCH_RTCX1 B5 SATA_RXN_0 BE8
RTCX1 SATA_RXP_0
(INTEGRATED SUS 1.05V VR)
* H：Integrated VRM enable R345 1U_0402_6.3V6K~N PCH_RTCX2 B4 AW8
20K_0402_1% 2 RTCX2 SATA_TXN_0 AY8
L：Integrated VRM disable
RTC
2 1 PCH_SRTCRST# B9 SATA_TXP_0
(INTVRMEN should always be pull high.) SRTCRST# BC10
R99 2 1 PCH_RTCRST# SM_INTRUDER# A8 SATA_RXN_1 BE10
20K_0402_1% INTRUDER# SATA_RXP_1
1
1
+3V_PCH PCH_INTVRMEN G10 AV10
C314 JME1 JME2 INTVRMEN SATA_TXN_1 AW10
R339 2 @ 1 1K_0402_5% HDA_SYNC 1U_0402_6.3V6K~N D9 SATA_TXP_1
0_0603_5% 0_0603_5% RTCRST#
2 BB9
+3VS @ @ SATA_RXN_2 SATA_PRX_DTX_N2 <37>
JME1 BD9 SATA_PRX_DTX_P2 <37>
2
HDA_BIT_CLK B25 SATA_RXP_2
OPEN SAVE CMOS HDA_BCLK ODD
R340 1 @ 2 1K_0402_5% PCH_GPIO33 AY13
SATA_TXN_2 SATA_PTX_DRX_N2 <37>
SHORT CLEAR CMOS 0523.Add for Factory use HDA_SYNC A22 AW13
HDA_SYNC SATA_TXP_2 SATA_PTX_DRX_P2 <37>
C HDA_SPKR AL10 BC12 C
<41> HDA_SPKR SPKR SATA_RXN_3 BE12
+3VS HDA_RST# C24 SATA_RXP_3
HDA_RST# AR13
SATA_TXN_3
AZALIA
R102 1 @ 2 1K_0402_5% HDA_SPKR HDA_SDIN0 L22 AT13
SATA
<41> HDA_SDIN0 HDA_SDI0 SATA_TXP_3
HIGH= Enable ( No Reboot ) K22
* LOW= Disable (Default) / weak internal pull low
ME FALSH HDA_SDI1 BD13
SATA_RXN4/PERN1 SATA_PRX_DTX_N4 <37>
G22 BB13 SATA_PRX_DTX_P4 <37>
HDA_SDI2 SATA_RXP4/PERP1
HDD
F22 AV15
HDA_SDI3 SATA_TXN4/PETN1 SATA_PTX_DRX_N4 <37>
AW15
SATA_TXP4/PETP1 SATA_PTX_DRX_P4 <37>
ME_FLASH A24
+3V_PCH <39> ME_FLASH HDA_SDO BC14
R104 1 @ 2 1K_0402_5% PCH_GPIO33 B17 SATA_RXN5/PERN2 BE14
R105 2 @ 1 1K_0402_5% ME_FLASH DOCKEN#/GPIO33 SATA_RXP5/PERP2
+3V_PCH R106 1 @ 2 10K_0402_5% PCH_GPIO13 C22 AP15
HDA_DOCK_RST#/GPIO13 SATA_TXN5/PETN2 AR15
* Low = Disabled (Default) SATA_TXP5/PETP2
High = Enabled [Flash Descriptor Security Override] +3VS
AY5 SATA_COMP
SATA_RCOMP R342
AP3 SATA_LED# 2 1 10K_0402_5%
R110 SATALED#
1 2 PCH_JTAG_TCK AB3 AT1 PCH_GPIO21
JTAG_TCK SATA0GP/GPIO21 PCH_GPIO21 <19>
RP12 51.1_0402_1% PCH_JTAG_TMS AD1
JTAG_TMS SATA1GP/GPIO19
AU2 BBS_BIT0_R
BBS_BIT0_R <19> HDD_DET# and BBS_BIT0_R pull high by 10P8R
<41> HDA_SYNC_CODEC 8 1 HDA_SYNC
7 2 ME_FLASH PCH_JTAG_TDI AE2 BD4
JTAG
<41> HDA_SDOUT_CODEC JTAG_TDI SATA_IREF +1.5VS
6 3 HDA_RST#
B <41> HDA_RST#_CODEC B
<41> HDA_BIT_CLK_CODEC 5 4 HDA_BIT_CLK PCH_JTAG_TDO AD3 BA2
JTAG_TDO TP9
33_0804_8P4R_5% F8 BB2
TP25 TP8
C26
TP22 SATA Impedance Compensation
AB6
TP20 +1.5VS
+3V_PCH +3V_PCH +3V_PCH
1 OF 11 SATA_COMP 1 2
DH82LPMS-QC4C-A1_FCBGA695~D 7.5K_0402_1% R341
1
Note:
R119 R311 R121
@ @ @
Trace width:4mils
200_0402_1% 200_0402_1% 200_0402_1%
Place the resistor to PCH <500 mils, to 1.5V <100 mils.Avoid
routing next to clock pins.
2
PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TDI

1
R122 R123 R343

100_0402_1% 100_0402_1% 100_0402_1%
@ @ @
2
W=20mils trace width 10mil W=20mils

+RTCBATT +CHGRTC +RTCVCC
D23
2
A 1 A
BAS40-04_SOT23-3 1
C192
0.1U_0402_16V4Z
2
PCH (1/10) SATA,HDA,SPI, LPC, XDP
Custom 0.2
Z5WAW M/B LA-B702
5 4 3 2 1
5 4 3 2 1
D D
LPT_PCH_M_EDS
U4B
<4> DMI_CTX_PRX_N0 DMI_CTX_PRX_N0 AW22

DMI_CTX_PRX_N1 AR20 DMI_RXN_0
<4> DMI_CTX_PRX_N1 DMI_RXN_1 AJ35 FDI_CTX_PRX_N0 FDI_CTX_PRX_N0 <7>
DMI_CTX_PRX_N2 AP17 FDI_RXN_0
<4> DMI_CTX_PRX_N2 DMI_RXN_2
<4> DMI_CTX_PRX_N3 DMI_CTX_PRX_N3 AV20 AL35 FDI_CTX_PRX_N1 FDI_CTX_PRX_N1 <7>
DMI_RXN_3 FDI_RXN_1
<4> DMI_CTX_PRX_P0 DMI_CTX_PRX_P0 AY22 AJ36 FDI_CTX_PRX_P0 FDI_CTX_PRX_P0 <7>
DMI_CTX_PRX_P1 AP20 DMI_RXP_0 FDI_RXP_0
<4> DMI_CTX_PRX_P1 DMI_RXP_1 AL36 FDI_CTX_PRX_P1 FDI_CTX_PRX_P1 <7>
DMI_CTX_PRX_P2 AR17 FDI_RXP_1
<4> DMI_CTX_PRX_P2 DMI_RXP_2
<4> DMI_CTX_PRX_P3 DMI_CTX_PRX_P3 AW20 AV43
DMI_RXP_3 TP16
DMI_CRX_PTX_N0 BD21 AY45
<4> DMI_CRX_PTX_N0 DMI_TXN_0 TP5
DMI_CRX_PTX_N1 BE20
<4> DMI_CRX_PTX_N1 DMI_TXN_1 DMI FDI AV45
DMI_CRX_PTX_N2 BD17 TP15
<4> DMI_CRX_PTX_N2 DMI_TXN_2
DMI_CRX_PTX_N3 BE18 AW44
<4> DMI_CRX_PTX_N3 DMI_TXN_3 TP10
DMI_CRX_PTX_P0 BB21 AL39 FDI_CSYNC <4>
<4> DMI_CRX_PTX_P0 DMI_TXP_0 FDI_CSYNC
DMI_CRX_PTX_P1 BC20
<4> DMI_CRX_PTX_P1 DMI_TXP_1 AL40 FDI_INT <4>
DMI_CRX_PTX_P2 BB17 FDI_INT
<4> DMI_CRX_PTX_P2 DMI_TXP_2
DMI_CRX_PTX_P3 BC18 AT45 +1.5VS
<4> DMI_CRX_PTX_P3 DMI_TXP_3 FDI_IREF
+1.5VS BE16 AU42
DMI_IREF TP17
AW17 AU44
SUSACK# is only used on platform TP12 TP13
that support the Deep Sx state. AV17
TP7 FDI_RCOMP
AR44 FDI_RCOMP 2 1 +1.5VS
C 7.5K_0402_1% R136 C
+1.5VS 1 2 DMI_RCOMP AY17

R135 7.5K_0402_1% DMI_RCOMP
AEPWROK can be connect to

PWROK if iAMT disable R138 SUSACK# R6
SUSACK# DSWVRMEN
C8 DSWODVREN R346
10K_0402_5% 0_0402_5%
+3VS 2 1 SYS_RST# AM1 L13 PCH_DPWROK 1 @ 2 PCH_RSMRST#
SYS_RESET# DPWROK
SYS_PWROK AD7 K3 PCIE_WAKE# <34>
SYS_PWROK WAKE#
2 1 PCH_PWROK F10 AN7 PM_CLKRUN#
PWROK System Power CLKRUN# PM_CLKRUN# <42>
R332 10K_0402_5% AB7 Management U7 SUS_STAT# T28
<39> PCH_PWROK APWROK SUS_STAT#/GPIO61
PM_DRAM_PWRGD H3 Y6 SUSCLK 1 @ 2
<5> PM_DRAM_PWRGD DRAMPWROK SUSCLK/GPIO62 R431 0_0402_5%
PCH_RSMRST# J2 Y7
<39> PCH_RSMRST# RSMRST# SLP_S5#/GPIO63 PM_SLP_S5# <39>
SUSACK# 1 @ 2 SUSWARN#_R J4 C6
SUSWARN#/SUSPWRNACK/GPIO30 SLP_S4# PM_SLP_S4# <39>
R433 0_0402_5%
<39> PBTN_OUT# K1 H1
PWRBTN# SLP_S3# PM_SLP_S3# <39>
<39,44,46> ACIN
1 2 AC_PRESENT E6
ACPRESENT/GPIO31 SLP_A#
F3 SLP_A# T22 SLP_A# can be left NC when IAMT is
D2 not support on the platfrom
PCH_GPIO72 K7 F1 SLP_SUS# T24
CH751H-40PT_SOD323-2 BATLOW#/GPIO72 SLP_SUS#
RI# N4 AY3 H_PM_SYNC
RI# PMSYNCH H_PM_SYNC <5>
AB10 G5
@ TP21 SLP_LAN#
U13 D2 SLP_LAN# can be left NC if no use
SLP_WLAN#/GPIO29
B MC74VHC1G08DFT2G SC70 5P integrated LAN. B
3
R438
1 0_0402_5% DH82LPMS-QC4C-A1_FCBGA695~D 4 OF 11
G
<39,51> VGATE A 4 SYS_PWROK 1 @ 2 SYS_PWROK_EC

Y SYS_PWROK_EC <39>
PCH_PWROK 2
B
P
ESD Request
5
+RTCVCC
1
R159 C546
100K_0402_5% 100P_0402_50V8J
1
+3VS @ XEMC@
2 +3V_PCH R134
2
330K_0402_5%
1 @ 2
2
R430 4 5 SUSWARN#_R
0_0402_5% 3 6 PCIE_WAKE# DSWODVREN
2 7 PCH_GPIO72
1 8 RI#
1
SUSACK# and SUSWARN# can be tied together if RP10 R143
EC does not want to involve in the handshake 10K_0804_8P4R_5% 330K_0402_5%
mechanism for the Deep Sleep state entry and exit. @
2
CLKRUN#:
External pull up to core well is required.
+3V_PCH
+3VS DSWODVREN - On Die DSW VR Enable
H：Enable (DEFAULT)
A
R172 * L：Disable A
1 2 PM_CLKRUN#
R173
8.2K_0402_1%
1 2 10K_0402_5% AC_PRESENT

2 R312 1 10K_0402_5% PCH_RSMRST#
PCH (2/10) PCIE, SMBUS, CLK
Z5WAW M/B LA-B702
5 4 3 2 1
5 4 3 2 1
D D
+3VS
R2611 1 2 2.2K_0402_5% PCH_CRT_CLK
R2612 1 2 2.2K_0402_5% PCH_CRT_DATA

U4E LPT_PCH_M_EDS
PCH_CRT_B T45 R40 HDMICLK_NB HDMICLK_NB <32>

<33> PCH_CRT_B VGA_BLUE DDPB_CTRLCLK
PCH_CRT_G U44 R39 HDMIDAT_NB HDMIDAT_NB <32>
<33> PCH_CRT_G VGA_GREEN DDPB_CTRLDATA
PCH_CRT_R V45 R35 R151
<33> PCH_CRT_R VGA_RED DDPC_CTRLCLK 1 @ 2 0_0402_5%
PCH_CRT_CLK M43 R36
<33> PCH_CRT_CLK VGA_DDC_CLK DDPC_CTRLDATA
PCH_CRT_DATA M45 N40
CRT
<33> PCH_CRT_DATA VGA_DDC_DATA DDPD_CTRLCLK
RP25 <33> PCH_CRT_HSYNC PCH_CRT_HSYNC N42 N38
8 1 PCH_CRT_R VGA_HSYNC DDPD_CTRLDATA
7 2 PCH_CRT_G <33> PCH_CRT_VSYNC PCH_CRT_VSYNC N44
VGA_VSYNC
3
6 3 PCH_CRT_B H45
5 4 1 2 CRT_IREF U40 DDPB_AUXN PCH_PLTRST# 1
DISPLAY
G
R132 649_0402_1% DAC_IREF K43 A 4
DDPC_AUXN Y PLT_RST# <23,34,36,39,42>
150_0804_8P4R_1% U39 2
VGA_IRTN B
P
J42
DDPD_AUXN
1
U7
5
PCH_INV_PWM N36 H43 @ R156
<30,31> PCH_INV_PWM EDP_BKLTCTL DDPB_AUXP MC74VHC1G08DFT2G SC70 5P 100K_0402_5%
LVDS
ENBKL K36 K45
C <39> ENBKL EDP_BKLTEN DDPC_AUXP C
2
PCH_ENVDD G36 J44
<31> PCH_ENVDD EDP_VDDEN DDPD_AUXP +3VS
K40
DDPB_HPD TMDS_B_HPD# <32>
PCI_PIRQA# H20
PIRQA# K38
PCI_PIRQB# L20 DDPC_HPD
PIRQB# H39
PCI_PIRQC# K17 DDPD_HPD
PIRQC#
PCI_PIRQD# M20
PIRQD# G17 G_SEN_INT
PIRQE#/GPIO2 G_SEN_INT <42>
DGPU_HOLD_RST# A12 GC6@ 0_0402_5%
<23> DGPU_HOLD_RST# GPIO50 F17 PCH_GPIO3 1 R2058 2 GPU_EVENT#
PCI PIRQF#/GPIO3 GPU_EVENT# <23>
PCH_GPIO52 B13
GPIO52 L15 PCH_GPIO4 1 GC6@ 2 GC6_FB_EN
PIRQG#/GPIO4 GC6_FB_EN <23>
DGPU_PWR_EN C12
<16,43,54> DGPU_PWR_EN GPIO54 M15 PCH_GPIO5 R2057 0_0402_5%
BBS_BIT1 C10 PIRQH#/GPIO5
GPIO51 AD10
T21 PCH_GPIO53 A10 PME#
GPIO53 Y11 PCH_PLTRST#
PCH_GPIO55 AL6 PLTRST#
+3VS GPIO55
R182 DH82LPMS-QC4C-A1_FCBGA695~D 5 OF 11
BBS_BIT1 1 2 10K_0402_5%
B B
Boot BIOS Strap (GPIO51) +3VS
SATA_SLPD
BBS_BIT1 (BBS_BIT0) Boot BIOS Location R212 1 NGC6@ 2 PCH_GPIO4
10K_0402_5%
0 0 LPC
R213 1 NGC6@ 2 PCH_GPIO3
+3VS RP1 10K_0402_5%
0 1 Reserved (NAND)
4 5 PCI_PIRQB# R216 1 2 DGPU_PWR_EN
1 0 PCI 3 6 PCI_PIRQA# 10K_0402_5%
2 7 PCI_PIRQD#
1 8 PCI_PIRQC# R219 1 @ 2 DGPU_HOLD_RST#
1 1 10K_0402_5%
* SPI
GPIO51 has internal pull up. 10K_0804_8P4R_5%
R218 1 VGA@ 2 DGPU_HOLD_RST#
100K_0402_5%
GPIO55
PCH_GPIO55 R158 1 @ 2 1K_0402_5% +3VS RP13
4 5 PCH_GPIO52
3 6 PCH_GPIO5
A16 swap overide Strap/Top-Block 2 7 EC_SMI#_SCI#
EC_SMI#_SCI# <19,39>
Swap Override jumper 1 8 G_SEN_INT
Low=A16 swap
override/Top-Block 10K_0804_8P4R_5%
A
PCI_GNT3# Swap Override enabled A
High=Default *
+3VS
R176
PCH_GPIO55 1 2 10K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
P14-PCH (3/10)DP,CRT
5 4 3 2 1
5 4 3 2 1
R154
0_0402_5%
1 @ 2
<19,23,43,54> VGA_PWROK
R315
0_0402_5% +3V_PCH
1 @ 2
<15,43,54> DGPU_PWR_EN
1
Q2 R115
VGA@ 10K_0402_5%
2
G
L2N7002LT1G_SOT23-3
Pull high @ VGA side
2
3 1 VGA_CLKREQ#
D <23> PEG_CLKREQ# D
D
1
1
R107 R113
2.2K_0402_5% 2.2K_0402_5%
@ @
2
LPT_PCH_M_EDS
U4C
Y43 AB35 CLK_PEG_VGA#

CLKOUT_PCIE_N_0 CLKOUT_PEG_A CLK_PEG_VGA# <23>
Y45 AB36 CLK_PEG_VGA
CLKOUT_PCIE_P_0 CLKOUT_PEG_A_P CLK_PEG_VGA <23>
PCH_GPIO73 AB1 AF6 VGA_CLKREQ#
PCIECLKRQ0#/GPIO73 PEGA_CLKRQ#/GPIO47
AA44 Y39
CLKOUT_PCIE_N_1 CLKOUT_PEG_B
SW set GPO AA42
CLKOUT_PCIE_P_1
R184 2 @ 1 10K_0402_5% PCH_GPIO18 AF1 CLKOUT_PEG_B_P
Y38
SW set GPO CLK_BUF_DMI# R183 2 1 10K_0402_5%
+3VS PCIECLKRQ1#/GPIO18 U4 PCH_GPIO56 R191 2 @ 1 10K_0402_5% +3V_PCH CLK_BUF_DMI R192 2 1 10K_0402_5%
CLK_PCIE_WLAN# AB43 PEGB_CLKRQ#/GPIO56
<36> CLK_PCIE_WLAN# CLKOUT_PCIE_N_2 AF39 CLK_CPU_DMI#
CLKOUT_DMI CLK_CPU_DMI# <5>
WLAN CLK_PCIE_WLAN AB45 CLK_BUF_BCLK# R348 2 1 10K_0402_5%
<36> CLK_PCIE_WLAN CLKOUT_PCIE_P_2 AF40 CLK_CPU_DMI CLK_BUF_BCLK R194 2 1 10K_0402_5%
CLKOUT_DMI_P CLK_CPU_DMI <5>
+3VS R195 2 1 10K_0402_5% AF3
PCIECLKRQ2#/GPIO20/SMI# AJ40 CLK_CPU_SSC_DPLL#
C
<36> CLKREQ_WLAN# CLKOUT_DP CLK_CPU_SSC_DPLL# <5> C
CLK_PCIE_LAN# AD43 AJ39 CLK_CPU_SSC_DPLL CLK_BUF_DOT96# R197 2 1 10K_0402_5%
<34> CLK_PCIE_LAN# CLKOUT_PCIE_N_3 CLKOUT_DP_P CLK_CPU_SSC_DPLL <5>
CLK_PCIE_LAN AD45 CLK_BUF_DOT96 R344 2 1 10K_0402_5%
<34> CLK_PCIE_LAN CLKOUT_PCIE_P_3
LAN +3V_PCH R201 2 1 10K_0402_5% T3 AF35 CLK_CPU_DPLL#
PCIECLKRQ3#/GPIO25 CLKOUT_DPNS CLK_CPU_DPLL# <5>
AF36 CLK_CPU_DPLL
<34> CLKREQ_LAN# CLKOUT_DPNS_P CLK_CPU_DPLL <5>
AF43 CLK_BUF_CKSSCD# R202 2 1 10K_0402_5%
AF45 CLKOUT_PCIE_N_4 AY24 CLK_BUF_DMI# CLK_BUF_CKSSCD R203 2 1 10K_0402_5%
PCH_GPIO26 V3 CLKOUT_PCIE_P_4 CLKIN_DMI AW24 CLK_BUF_DMI
PCIECLKRQ4#/GPIO26 CLOCK SIGNAL CLKIN_DMI_P
AE44 AR24 CLK_BUF_BCLK# CLK_PCH_14M R205 2 1 10K_0402_5%
+3V_PCH AE42 CLKOUT_PCIE_N5 CLKIN_GND AT24 CLK_BUF_BCLK
10K_0402_5% 1 2 R177 PCH_GPIO44 AA2 CLKOUT_PCIE_P_5 CLKIN_GND_P
PCIECLKRQ5#/GPIO44 H33 CLK_BUF_DOT96#
AB40 CLKIN_DOT96N G33 CLK_BUF_DOT96
AB39 CLKOUT_PCIE_N_6 CLKIN_DOT96P
PCH_GPIO45 AE4 CLKOUT_PCIE_P_6 BE6 CLK_BUF_CKSSCD#
PCIECLKRQ6#/GPIO45 CLKIN_SATA BC6 CLK_BUF_CKSSCD
AJ44 CLKIN_SATA_P CLOCK TERMINATION for FCIM and need close to PCH
CLKOUT_PCIE_N_7 F45 CLK_PCH_14M
AJ42 REFCLK14IN D17 CLK_PCI_LPBACK
CLKOUT_PCIE_P_7 CLKIN_33MHZLOOPBACK
PCH_GPIO46 Y3 AM43 XTAL25_IN
PCIECLKRQ7#/GPIO46 XTAL25_IN AL44 XTAL25_OUT
AH43 XTAL25_OUT
CLKOUT_ITPXDP C40
AH45 CLKOUTFLEX0/GPIO64
CLKOUT_ITPXDP_P F38
CLK_PCI_LPBACK 22.6_0402_1% 1 2 R209 CLK_PCI_LPBACK_R D44 CLKOUTFLEX1/GPIO65
CLKOUT_33MHZ0 F36
22.6_0402_1% 1 2 R211 CLK_PCI_EC_R E44 CLKOUTFLEX2/GPIO66
<39> CLK_PCI_EC CLKOUT_33MHZ1 F39 DGPU_PRSNT
22_0402_5% 1 2 R217 CLK_PCI_TPM_R B42 CLKOUTFLEX3/GPIO67
<42> CLK_PCI_TPM CLKOUT_33MHZ2 AM45 +1.5VS
B F41 ICLK_IREF B
CLKOUT_33MHZ3 AD39
A40 TP19 AD38
CLKOUT_33MHZ4 TP18
+3V_PCH AN44 PCH_CLK_BIASREF 1 R214 2
DIFFCLK_BIASREF +1.05V_+1.5V_RUN
SW set GPO 7.5K_0402_1%
4 5 PCH_GPIO26
3 6 PCH_GPIO46 DH82LPMS-QC4C-A1_FCBGA695~D 2 OF 11
2 7 PCH_GPIO45
1 8 PCH_GPIO73 XTAL25_IN
RP9 +3VS XTAL25_OUT 1 2

@ R215 1M_0402_5%
10K_0804_8P4R_5%
1
Y2
R276 25MHZ 10PF X3G025000DA1H-X
10K_0402_5%
VGA@ 1 3
1 3
2
GND GND
DGPU_PRSNT
2 4
1 1
1
DGPU_PRSNT Function R361 C315 C316
10K_0402_5% 12P_0402_50V8J 12P_0402_50V8J
UMAO@ 2 2
2
0 UMA
*
A 1 Optimus A

PCH (4/10) DMI,FDI,PM,
Z5WAW M/B LA-B702
5 4 3 2 1
5 4 3 2 1
LPT_PCH_M_EDS
U4D
Q11A
D R321 DMN66D0LDW-7 2N SOT363-6 D
10K_0402_5% 6 1 SMB_CLK_S3
SMB_CLK_S3 <11,12,36,42>
N7 PCH_GPI011 2 1
<39,42> LPC_AD0 LPC_AD0 A20
LAD_0
SMBALERT#/GPIO11 +3V_PCH
DIMM1
SMBus R10 PCH_SMBCLK
DIMM2
2
LPC_AD1 C20 SMBCLK
<39,42> LPC_AD1 LAD_1 +3VS
U11 PCH_SMBDATA
SMBDATA MINI CARD
5
<39,42> LPC_AD2 LPC_AD2 A18 Q11B
LPC
LAD_2 N8 PCH_GPIO60 R221 2 @ 1 DMN66D0LDW-7 2N SOT363-6
<39,42> LPC_AD3 LPC_AD3 C18
LAD_3
SML0ALERT#/GPIO60 1K_0402_5%
+3V_PCH
3 4 SMB_DATA_S3
SMB_DATA_S3 <11,12,36,42>
G-sensor
LPC_FRAME# B21 SML0CLK
U8 PCH_SML0CLK
SW set GPO
<39,42> LPC_FRAME# LFRAME# R7 PCH_SML0DATA
+3VS D21 SML0DATA R222
LDRQ0# H6 PCH_GPIO74 2 1 10K_0402_5%
SML1ALERT#/PCHHOT#/GPIO74 +3V_PCH
R223 2 1 10K_0402_5% G20 Q130A
LDRQ1#/GPIO23 K6 SML1CLK DMN66D0LDW-7 2N SOT363-6 6 1 EC_SMB_CK2
SML1CLK/GPIO58 EC_SMB_CK2 <23,30,39>
<39,42> SERIRQ SERIRQ AL11
SERIRQ N11 SML1DATA
SML1DATA/GPIO75
2
CL_CLK
AF11
+3VS
EC
5
PCH_SPI_CLK AJ11 Q130B
SPI_CLK AF10 DMN66D0LDW-7 2N SOT363-6
PCH_SPI_CS0# AJ7 C-Link CL_DATA 3 4 EC_SMB_DA2
SPI_CS0# EC_SMB_DA2 <23,30,39>
AF7
PCH_SPI_CS1# AL7 CL_RST#
SPI_CS1#
AJ10
SPI_CS2#
SPI
BA45
PCH_SPI_MOSI AH1 TP1
SPI_MOSI BC45
C PCH_SPI_MISO AH3 Thermal TP2 C
SPI_MISO BE43
PCH_SPI_WP1# AJ4 TP4
SPI_IO2 BE44
PCH_SPI_HOLD1# AJ2 TP3
SPI_IO3 AY43 PCH_TD_IREF 1 2
TD_IREF R228 8.2K_0402_1%
DH82LPMS-QC4C-A1_FCBGA695~D 3 OF 11
+3V_SPI for Share EC ROM, +3VS change to +3VALW +3VS

R114 1 2 1K_0402_5% PCH_SPI_IO2_1 R126
R116 1 2 1K_0402_5% PCH_SPI_IO3_1 +3V_SPI +3V_SPI 1 @ 2 0_0402_5% +3VALW
R125
+3V_SPI 1 @ 2 0_0402_5% RP3
+3VS
R103 1 @ 2 1K_0402_5% PCH_SPI_HOLD1# PCH_SMBDATA 8 1
R108 1 @ 2 1K_0402_5% PCH_SPI_WP1# SPI ROM ( 8MByte ) SMB_CLK_S3 7 2 +3V_PCH
SMB_DATA_S3 6 3
2ROM pop PCH_SMBCLK 5 4
C123 1 2
U6 RP23 2.2K_0804_8P4R_5%
R109 PCH_SPI_CS0# 1 8 0.1U_0402_16V4Z PCH_SPI_MISO_1 1 8 PCH_SPI_MISO
15_0402_5% PCH_SPI_MISO_1 2 CS# VCC 7 PCH_SPI_IO3_1 PCH_SPI_IO3_1 2 7 PCH_SPI_HOLD1# SPI ROM
PCH_SPI_WP1# 2 1 PCH_SPI_IO2_1 3 DO(IO1) HOLD#(IO3) 6 PCH_SPI_CLK_1 PCH_SPI_CLK_1 3 6 PCH_SPI_CLK +3V_PCH
4 WP#(IO2) CLK 5 PCH_SPI_MOSI_1 PCH_SPI_MOSI_1 4 5 PCH_SPI_MOSI
B GND DI(IO0) RP17 B
EN25QH64-104HIP_SO8 15_0804_8P4R_5% PCH_SML0CLK 8 1
PCH_SML0DATA 7 2
SML1DATA 6 3
SML1CLK 5 4
Reserve for EMI(Near SPI ROM)
C191 PCH_SPI_MOSI_1 R510 1 @ 2 0_0402_5% EC_SPI_SO <39> 2.2K_0804_8P4R_5%
10P_0402_50V8J PCH_SPI_CLK_1 R511 1 @ 2 0_0402_5% From EC
EC_SPI_CLK <39>
1 2 2 1 PCH_SPI_CLK_1 PCH_SPI_MISO_1 R517 1 @ 2 0_0402_5% (For share ROM)
EC_SPI_SI <39>
R112 XEMC@ 33_0402_5% PCH_SPI_CS0# R518 1 @ 2 0_0402_5% EC_SPI_CS# <39>
XEMC@
DVT modify 11/15
pop share rom
RP24
+3V_SPI 33_0804_8P4R_5%
SPI ROM ( 4MByte ) 2ROM pop @
C121 1 2 PCH_SPI_MOSI_2 1 8 PCH_SPI_MOSI
U8 @ PCH_SPI_CLK_2 2 7 PCH_SPI_CLK
R111 PCH_SPI_CS1# 1 8 0.1U_0402_16V4Z PCH_SPI_IO3_2 3 6 PCH_SPI_HOLD1#
33_0402_5% PCH_SPI_MISO_2 2 CS# VCC 7 PCH_SPI_IO3_2 PCH_SPI_MISO_2 4 5 PCH_SPI_MISO
PCH_SPI_WP1# 2 @ 1 PCH_SPI_IO2_2 3 DO HOLD# 6 PCH_SPI_CLK_2
4 WP# CLK 5 PCH_SPI_MOSI_2
GND DI
EN25QH32-104HIP_SO8
@
A A
2ROM is SPI ROM 2M + 4M Byte

2ROM POP Reserve for EMI(Near SPI ROM)
U6 - EN25QH16-104HIP_SO8 (SA00004UG00) C453
RP19 - 33_0804_8P4R_5% (SD309330A80) 10P_0402_50V8J
1 2 2 1 PCH_SPI_CLK_2
R108 - 33_0402_5% (SD028330A80) R402 XEMC@ 33_0402_5%
XEMC@
PCH (5/10) LVDS,CRT,DP,HDMI
5 4 3 2 1
5 4 3 2 1
U4I LPT_PCH_M_EDS
USB DEBUG=PORT1 AND PORT9
AW31 B37USB20_N0
PERN1/USB3RN3 USB2N0 USB20_N0 <38>
AY31 D37USB20_P0
PERP1/USB3RP3 USB2P0 USB20_P0 <38> USB 3.0 left side (USB 3.0)
A38USB20_N1
USB2N1 USB20_N1 <38>
BE32 C38USB20_P1
PETN1/USB3TN3 USB2P1 USB20_P1 <38> USB/B RIGHT SIDE
BC32 A36USB20_N2
PETP1/USB3TP3 USB2N2 USB20_N2 <38>
C36USB20_P2
USB2P2 USB20_P2 <38> USB/B RIGHT SIDE
D AT31 A34USB20_N3 D
PERN2/USB3RN4 USB2N3 USB20_N3 <38>
AR31 C34USB20_P3
PERP2/USB3RP4 USB2P3 USB20_P3 <38> Finger printer
B33USB20_N4
BD33
PETN2/USB3TN4
USB2N4
USB2P4
D33USB20_P4
USB20_N4
USB20_P4
<31>
<31> Touch Screen
EHCI1(Port0~7)
BB33 F31USB20_N5
PETP2/USB3TP4 USB2N5 USB20_N5 <40>
G31USB20_P5
USB2P5 USB20_P5 <40> USB/I2C Bridge
K31USB20_N6
USB2N6 USB20_N6 <36>
PCIE_PRX_DTX_N3 AW33 L31USB20_P6
<34> PCIE_PRX_DTX_N3 PERN_3 USB2P6 USB20_P6 <36> WLAN
<34> PCIE_PRX_DTX_P3 PCIE_PRX_DTX_P3 AY33 G29USB20_N7
PERP_3 USB2N7 USB20_N7 <31>
LAN H29USB20_P7
USB2P7 USB20_P7 <31> Webcam
C203 1 2 0.1U_0402_16V7K~N PCIE_PTX_DRX_N3 BE34 A32
<34> PCIE_PTX_C_DRX_N3 PETN_3 USB2N8
C204 1 2 0.1U_0402_16V7K~N PCIE_PTX_DRX_P3 BC34 C32
<34> PCIE_PTX_C_DRX_P3 PETP_3 USB2P8 A30
PCIE_PRX_DTX_N4 AT33 USB2N9 C30
<36> PCIE_PRX_DTX_N4 PERN_4 USB2P9
<36> PCIE_PRX_DTX_P4 PCIE_PRX_DTX_P4 AR33 B29
PERP_4 USB2N10 D29
WLAN USB2P10
0.1U_0402_16V7K~N 2 1 C202 PCIE_PTX_DRX_N4 BE36 A28
<36> PCIE_PTX_C_DRX_N4 PETN_4 USB2N11
0.1U_0402_16V7K~N 2 1 C215 PCIE_PTX_DRX_P4 BC36 C28
<36> PCIE_PTX_C_DRX_P4 PETP_4 USB2P11
USB2N12
G26 EHCI2(Port8~13)
PCIe
AW36
USB
F26
AV36 PERN_5 USB2P12 F24
PERP_5 USB2N13 G24
BD37 USB2P13
BB37 PETN_5
PETP_5 AR26 PCH_USB3_RX0_N
C USB3RN1 PCH_USB3_RX0_N <38> C
AY38 AP26 PCH_USB3_RX0_P PCH_USB3_RX0_P <38>
AW38 PERN_6 USB3RP1 BE24 PCH_USB3_TX0_N
PERP_6 USB3TN1 BD23 PCH_USB3_TX0_P
PCH_USB3_TX0_N <38> USB 3.0 left side
USB3TP1 PCH_USB3_TX0_P <38>
BC38 AW26
BE38 PETN_6 USB3RN2 AV26
PETP_6 USB3RP2 BD25
AT40 USB3TN2 BC24
AT39 PERN_7 USB3TP2 AW29
PERP_7 USB3RN5 AV29
BE40 USB3RP5 BE26
BC40 PETN_7 USB3TN5 BC26
PETP_7 USB3TP5 AR29
AN38 USB3RN6 AP29
AN39 PERN_8 USB3RP6 BD27
PERP_8 USB3TN6 BE28
BD42 USB3TP6
PETN_8 CAD NOTE:
BD41 K24 USBRBIAS 1 R242 2
PETP_8 USBRBIAS# K26 22.6_0402_1% Route single‐end 50‐ohms and max 500‐mils length.
USBRBIAS Avoid routing next to clock pins or under stitching capacitors.
+1.5VS BE30 M33 Recommended minimum spacing to other signal traces is 15 mils.
PCIE_IREF TP24 L33
TP23
BC30 P3 USB_OC0#
TP11 OC0#/GPIO59 USB_OC0# <38>
V1 USB_OC1#
OC1#/GPIO40 U2 USB_OC2#
B B
BB29 OC2#/GPIO41 P1 USB_OC3#
TP6 OC3#/GPIO42 M3 USB_OC4#
OC4#/GPIO43 T1 USB_OC5#
1 2 PCH_PCIE_RCOMP BD29 OC5#/GPIO9 N2 USB_OC6#
+1.5VS PCIE_RCOMP OC6#/GPIO10
R244 7.5K_0402_1% M1 USB_OC7#
OC7#/GPIO14
+3V_PCH +3V_PCH
RP14 RP27
4 5 USB_OC3# 4 5 USB_OC1#
10K_0804_8P4R_5% 10K_0804_8P4R_5%
A A

PCH (6/10) PCI, USB
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
+3V_PCH
R273
SW set GPO
1 @ 2 10K_0402_5% PCH_GPIO24
GPIO8 Weak internal pull-high but requires an

external pull down.
1 @ 2 R247 GPIO8 U4F LPT_PCH_M_EDS
10K_0402_5%
D
SW set GPO PCH_GPIO0 AT8
BMBUSY#/GPIO0
D
R248 1 @ 2 10K_0402_5% PCH_GPIO1 F13

TACH1/GPIO1
+3VS R249 1 @ 2 10K_0402_5% PCH_GPIO6 A14
TACH2/GPIO6
Remove strap description G15 CPU/Misc

<15,39> EC_SMI#_SCI# EC_SMI#_SCI#
TACH3/GPIO7
inform SW set GPO PU at Page15 GPIO8 Y1
GPIO8 +1.05VS
+3V_PCH R252 1 @ 2 10K_0402_5% PCH_GPIO12 K13
+3V_PCH LAN_PHY_PWR_CTRL/GPIO12 AN10 GATEA20
TP14 GATEA20 <39>
R253 1 @ 2 10K_0402_5% AB11
GPIO15
2
R256 1 @ 2 10K_0402_5% AY1
PCH_GPIO16 AN2 PECI R258
R260 1 @ 2 1K_0402_5% PCH_GPIO28 SATA4GP/GPIO16 AT6 KBRST#
GPIO RCIN# KBRST# <39> 1K_0402_5%
VGA_PWROK C14 @
<16,23,43,54> VGA_PWROK TACH0/GPIO17 AV3
H_CPUPWRGD <5>
1
PROCPWRGD
PU on power side +3VS R294 1 @ 2 10K_0402_5% PCH_GPIO22 BB4
SCLOCK/GPIO22 AV1 PCH_THRMTRIP#_R 1 2 H_THRMTRIP# <5>
PCH_GPIO24 Y10 THRMTRIP# R262 390_0402_5%
GPIO24 AU4 CPU_PLTRST#
PLTRST_PROC# CPU_PLTRST# <5>
PCH_GPIO27 R11
GPIO27 N10
+3V_PCH PCH_GPIO28 AD11 VSS
GPIO28
PCH_GPIO34 AN6
R266 1 2 10K_0402_5% GPIO34
R265 1 @ 2 10K_0402_5% PCH_GPIO35 AP1
R267 1 @ 2 10K_0402_5% PCH_GPIO27 GPIO35/NMI#
PCH_GPIO36 AT3
SATA2GP/GPIO36
PCH_GPIO37 AK1
SATA3GP/GPIO37
+3VS R292 1 @ 2 10K_0402_5% PCH_GPIO38 AT7
C SLOAD/GPIO38 C
+3VS R268 1 @ 2 10K_0402_5% PCH_GPIO39 AM3 A2

SDATAOUT0/GPIO39 VSS A41
+3VS +3VS PCH_GPIO48 AN4 VSS A43
SDATAOUT1/GPIO48 VSS A44
PCH_GPIO49 AK3 VSS B1
SATA5GP/GPIO49 VSS
1
B2
R359 R271 R272 1 @ 2 10K_0402_5% PCH_GPIO57 U12 VSS B44
+3V_PCH GPIO57 VSS
200K_0402_5% 200K_0402_5% B45
VSS
@ @
SW set GPO PCH_GPIO68 C16
TACH4/GPIO68 VSS
BA1
BC1
2
PCH_GPIO37 PCH_GPIO36 PCH_GPIO69 D13 VSS BD1

TACH5/GPIO69 VSS BD2
VSS
1
PCH_GPIO70 G13 BD44

TACH6/GPIO70 VSS BD45
R274 R275 PCH_GPIO71 H15 VSS BE2
10K_0402_5% TACH7/GPIO71 VSS BE3
10K_0402_5% VSS D1
2
BE41 VSS E1
BE5 VSS NCTF VSS E45
C45 VSS VSS A4
A5 VSS VSS
VSS
BIOS Request SKU ID
+3VS
2
SW set GPO
10K_0402_5%
10K_0402_5%
@ @ +3VS +3VS
B R277 R360 B
PCH_GPIO68 PCH_GPIO69 Function
1
2
10K_0402_5%
10K_0402_5%
PCH_GPIO68 +3VS
@ @
PCH_GPIO69 R351 R349 2 1 PCH_GPIO16
* 0 0 Z5WAW R352 10K_0402_5%
1
PCH_GPIO71 PCH_GPIO70 Config GPIO16 & 49

2
1
10K_0402_5%
10K_0402_5%
0 1 Reserved
R355 R356 2 1 PCH_GPIO49 USB3.0 x4, PCIE x8, SATA x6 11
R354 10K_0402_5%
1 0 Reserved
1
* USB3.0 x6, PCIE x8, SATA x4 01
1 1 Reserved
+3VS +3VS
A A
RP15 RP28
4 5 PCH_GPIO34 4 5
3 6 GATEA20 3 6 BBS_BIT0_R BBS_BIT0_R <13>
2 7 KBRST# 2 7 PCH_GPIO21 PCH_GPIO21 <13>
1 8 PCH_GPIO0 1 8 PCH_GPIO48
10K_0804_8P4R_5% 10K_0804_8P4R_5%
PCH (7/10) GPIO, CPU, MISC
Custom 0.2
Z5WAW M/B LA-B702
5 4 3 2 1
5 4 3 2 1
R13
D +VCCADAC 1 2 D
+1.5VS
0_0603_5%
0.01U_0402_16V7K
0.1U_0402_16V7K
10U_0603_6.3V6M
1 1 1
C188
C190
C189
2 2 2
PCH Power Rail Table
U4G LPT_PCH_M_EDS
+1.05VS P45 Voltage Rail Voltage S0 Iccmax Current (A)

VCCADAC1_5 +1.05V_+1.5V_RUN
AA24 P43
AA26 VCC CRT DAC VSS
VCC VCC 1.05V 1.29 A
10U_0603_6.3V6M~N
C129
1U_0402_6.3V6K~N
C130
1U_0402_6.3V6K~N
C131
1U_0402_6.3V6K~N
C132
1 1 1 1 AD20 M31 +3VS
AD22 VCC VCCADACBG3_3 +1.05VS
AD24 VCC Intel DG:
VCC VCCIO 1.05V 3.629 A
AD26 BB44 INTVRMEN pu. Integrated
2 2 2 2 VCC VCCVRM
1U_0402_6.3V6K~N
C134
AD28
AE18 VCC FDI AN34
1 VRMs enabled. DCPSUS1,
VCC VCCIO +3VS
VCCADAC1_5 1.5V 0.070 A
AE20
VCC
DCPSUS2 and DCPSUS3 can
AE22 AN35
AE24 VCC VCCIO 2 be left as No Connect.
VCC VCCADAC3_3 3.3V 0.0133 A
AE26 R30
AG18 VCC HVCMOS VCC3_3_R30 R32
VCC VCC3_3_R32
0.1U_0402_16V7K~N
C135
AG20 1 VCCCLK 1.05V 0.306 A
AG22 VCC Y12 +3V_PCH
AG24 VCC DCPSUS1
Y26 VCC AJ30
VCC VCCSUS3_3 2
VCCCLK3_3 3.3V 0.055 A
Core
0.1U_0402_16V7K~N
C136
C AJ32 C
VCCSUS3_3 1
+1.05VS AJ26 +PCH_USB_DCPSUS3 +1.05V_+1.5V_RUN VCCVRM 1.5V 0.179 A
+PCH_VCCDSW U14 USB3 DCPSUS3 AJ28
AA18 DCPSUSBYP DCPSUS3 AK20 2
VCCASW VCCIO +1.05VS
U18 AK26 VCC3_3 3.3V 0.133 A
U20 VCCASW VCCVRM AK28 +1.05V_+1.5V_RUN
VCCASW VCCVRM
22U_0603_6.3V6M
1U_0402_6.3V6K~N
C138
1U_0402_6.3V6K~N
C139
1 1 1 U22
U24 VCCASW BE22
VCCASW VCCVRM VCCASW 1.05V 0.67 A
<BOM Structure>
C137
V18 PCIe/DMI
V20 VCCASW AK18 +1.05V_+1.5V_RUN
2 2 2 VCCASW VCCIO +1.05VS
V22 VCCSUSHDA 3.3V 0.01 A
V24 VCCASW AN11
Y18 VCCASW VCCVRM
Y20 VCCASW SATA
AK22
VCCASW VCCIO VCCSPI 3.3V 0.022 A
Y22 +1.05VS
VCCASW AM18
VCCIO AM20
VCCIO VCCSUS3_3 3.3V 0.261 A
AM22
VCCMPHY VCCIO AP22
VCCIO
1U_0402_6.3V6K~N
C143
1U_0402_6.3V6K~N
C144
1U_0402_6.3V6K~N
C145
1U_0402_6.3V6K~N
C146
10U_0603_6.3V6M~N
C147
AR22 1 1 1 1 1 VCCDSW3_3 3.3V 0.015 A
VCCIO AT22
VCCIO
2 2 2 2 2
V_PROC_IO 1.05V 0.004 A
1 2 +PCH_VCCDSW +1.5VS +1.05V_+1.5V_RUN

R290 5.1_0402_1%
B R291 1 @ 2 0_0603_5% B
+PCH_VCCDSW_R
1U_0402_6.3V6K~N
C149
A A

PCH (8/10) PWR
Z5WAW M/B LA-B702
5 4 3 2 1
5 4 3 2 1
+3V_PCH
+PCH_VCCDSW3_3 R310
0_0402_5%
1 @ 2 +3V_PCH
LPT_PCH_M_EDS
U4H
0.1U_0402_16V7K~N
C154
1
D +3V_PCH D
0.1U_0402_16V7K~N
C155
1
R24 R20
R26 VCCSUS3_3 VCCSUS3_3 R22 2
R28 VCCSUS3_3 VCCSUS3_3
+1.05VS VCCSUS3_3 GPIO/LPC 2
0.1U_0402_16V7K~N
C152
1 U26
VCCSUS3_3 A16 +PCH_VCCDSW3_3
M24 VCCDSW3_3 +3VS PCH Power Rail Table
VSS AA14 +PCH_VCCSST 1 2
2 +3VS U35 DCPSST
VCCUSBPLL
0.1U_0402_16V7K~N
C153
1 AE14 C156 0.1U_0402_16V7K~N Voltage Rail Voltage S0 Iccmax Current (A)
USB
L24 VCC3_3 AF12
VCC3_3 VCC3_3 AG14
VCC3_3 +3V_PCH
0.1U_0402_16V7K~N
C158
U30 1 VCC 1.05V 1.29 A
2 0.1U_0402_16V7K~N VCCIO
C157
1 +1.05VS V28
V30 VCCIO U36
VCCIO VCCIO +1.05VS
Y30 VCCIO 1.05V 3.629 A
VCCIO +3V_PCH 2
2 +1.05V_+1.5V_RUN Y35 Azalia
DCPSUS2
1U_0402_6.3V6K~N
C159
0.1U_0402_16V7K~N
C318
1 A26 1 VCCADAC1_5 1.5V 0.070 A
AF34 VCCSUSHDA
VCCVRM
+RTCVCC
10U_0603_6.3V6M~N
C140
1U_0402_6.3V6K~N
C162
1 +PCH_VCC AP45 K8 1 VCCADAC3_3 3.3V 0.0133 A
2 VCC VCCSUS3_3 2
+PCH_VCCCLK Y32 A6
VCCCLK VCCRTC C163
2 RTC 2
VCCCLK 1.05V 0.306 A
+PCH_VCCCLK3_3 M29 P14 +PCH_DCPRTC 0.1U_0402_16V7K~N
VCCCLK3_3 DCPRTC
0.1U_0402_16V7K~N
C319
0.1U_0402_16V7K~N
C165
1U_0402_6.3V6K~N
C166
P16 1 2 1 1 1
L29 DCPRTC
VCCCLK3_3 VCCCLK3_3 3.3V 0.055 A
L26 AJ12 +PCH_VPROC
M26 VCCCLK3_3 V_PROC_IO AJ14 +3V_PCH 2 2 2
Intel DG: VCCCLK3_3
CPU
V_PROC_IO VCCVRM 1.5V 0.179 A
INTVRMEN pu. Integrated U32
VCCCLK3_3
ICC
V32 AD12 VCC3_3 3.3V 0.133 A
C VRMs enabled. DCPSUS1, VCCCLK3_3 SPI VCCSPI C
DCPSUS2 and DCPSUS3 can
1U_0402_6.3V6K~N
C167
+PCH_VCCCLK AD34 1
VCCCLK P18 +PCH_VCCCFUSE
be left as No Connect. VCC VCCASW 1.05V 0.67 A
AA30 P20
AA32 VCCCLK VCC
VCCCLK L17 2
VCCASW +1.05VS VCCSUSHDA 3.3V 0.01 A
AD35
VCCCLK R18
AG30 VCCASW +1.05VS
VCCCLK VCCSPI 3.3V 0.022 A
AG32
VCCCLK AW40 +PCH_VPROC R357 1 @ 2 0_0603_5%
VCCVRM +1.05V_+1.5V_RUN
AD36 VCCSUS3_3 3.3V 0.261 A
+1.05VS VCCCLK AK30 +3VS
VCC3_3
0.1U_0402_16V7K~N
C169
0.1U_0402_16V7K~N
C170
1U_0402_6.3V6K~N
C171
R929 AE30 Thermal 1 1 1
0_0603_5% AE32 VCCCLK AK32
VCCCLK VCC3_3 VCCDSW3_3 3.3V 0.015 A
1 @ 2 +PCH_VCC
0.1U_0402_16V7K~N
C173
1 2 2 2
V_PROC_IO 1.05V 0.004 A
10U_0603_6.3V6M~N
C172
1U_0402_6.3V6K~N
C174
1 1 DH82LPMS-QC4C-A1_FCBGA695~D 8 OF 11
@
2
2 2
Place near pin AP45
R299
0_0805_5%
+PCH_VCCCFUSE 1 @ 2 +1.05VS
+1.05VS +PCH_VCCCLK
1U_0402_6.3V6K~N
C175
R300 1 @ 2 0_0603_5% 1
B B
2
1U_0402_6.3V6K~N
C176
1U_0402_6.3V6K~N
C177
1U_0402_6.3V6K~N
C178
1U_0402_6.3V6K~N
C179
1U_0402_6.3V6K~N
C180
1 1 1 1 1
@
2 2 2 2 2
Place near pin Y32,AA30,AA32 Place near pin AD34 Place near pin AD35,AD36

Place near pin AG30,AG32,AE30,AE32
+3VS +PCH_VCCCLK3_3
R302 1 @ 2 0_0603_5%
1U_0402_6.3V6K~N
C181
1U_0402_6.3V6K~N
C182
1U_0402_6.3V6K~N
C183
1U_0402_6.3V6K~N
C184
1 1 1 1
2 2 2 2
Place near pin M29 Place near pin L29 Place near pin L26,M26 Place near pin U32,V32
A A

2013/12/26 2014/12/26 Title
Issued Date Deciphered Date PCH (9/10) PWR
Custom 0.2
Z5WAW M/B LA-B702
5 4 3 2 1
5 4 3 2 1
D D
U4J LPT_PCH_M_EDS
AL34 K39 U4K LPT_PCH_M_EDS

AL38 VSS VSS L2
AL8 VSS VSS L44 AA16 B19
AM14 VSS VSS M17 AA20 VSS VSS B23
AM24 VSS VSS M22 AA22 VSS VSS B27
AM26 VSS VSS N12 AA28 VSS VSS B31
AM28 VSS VSS N35 AA4 VSS VSS B35
AM30 VSS VSS N39 AB12 VSS VSS B39
AM32 VSS VSS N6 AB34 VSS VSS B7
AM16 VSS VSS P22 AB38 VSS VSS BA40
AN36 VSS VSS P24 AB8 VSS VSS BD11
AN40 VSS VSS P26 AC2 VSS VSS BD15
AN42 VSS VSS P28 AC44 VSS VSS BD19
C AN8 VSS VSS P30 AD14 VSS VSS AY36 C
AP13 VSS VSS P32 AD16 VSS VSS AT43
AP24 VSS VSS R12 AD18 VSS VSS BD31
AR2 VSS VSS R2 AD40 VSS VSS BD7
AK16 VSS VSS R34 AD6 VSS VSS D25
AT10 VSS VSS R38 AD8 VSS VSS AV7
AT15 VSS VSS R44 AE16 VSS VSS F15
AT17 VSS VSS R8 AE28 VSS VSS F20
AT20 VSS VSS T43 AF38 VSS VSS F29
AT26 VSS VSS U10 AF8 VSS VSS F33
AT29 VSS VSS U16 AG16 VSS VSS BC16
AT36 VSS VSS U28 AG2 VSS VSS D4
AT38 VSS VSS U34 AG26 VSS VSS G2
D42 VSS VSS U38 AG28 VSS VSS G38
AV13 VSS VSS U42 AG44 VSS VSS G44
AV22 VSS VSS U6 AJ16 VSS VSS G8
AV24 VSS VSS V14 AJ18 VSS VSS H10
BB25 VSS VSS V43 AJ24 VSS VSS H22
AV40 VSS VSS W2 AJ34 VSS VSS H24
AV6 VSS VSS W44 AJ38 VSS VSS H26
AW2 VSS VSS Y14 AJ6 VSS VSS H31
F43 VSS VSS Y16 AJ8 VSS VSS H36
AY10 VSS VSS Y24 AK14 VSS VSS H40
AY15 VSS VSS Y28 AK24 VSS VSS H7
AY20 VSS VSS Y34 AK43 VSS VSS K10
AY26 VSS VSS Y36 AK45 VSS VSS K15
AY29 VSS VSS Y40 AL12 VSS VSS K20
AY7 VSS VSS Y8 AL2 VSS VSS K29
B B11 VSS VSS BC22 VSS VSS K33 B
B15 VSS BB42 VSS VSS BC28
VSS VSS VSS
DH82LPMS-QC4C-A1_FCBGA695~D DH82LPMS-QC4C-A1_FCBGA695~D
10 OF 11 11 OF 11
A A

PCH (10/10) VSS
Z5WAW M/B LA-B702
5 4 3 2 1
A B C D E
UGPU1A
GPIO I/O USAGE
Part 1 of 6 +3VSDGPU_AON
AG6 C6 GC6_FB_EN GC6_FB_EN <15> RP2000
GPIO0 I GC6_FB_EN
<4> PEG_HTX_C_GRX_P0 PEX_RX0 GPIO0
AG7 B2 10K_0804_8P4R_5%
<4> PEG_HTX_C_GRX_N0 PEX_RX0_N GPIO1
AF7 D6 GPIO9_ALERT_GATE 8 1 GPIO1 O MEM_VDD_CTL
<4> PEG_HTX_C_GRX_P1 PEX_RX1 GPIO2
AE7 C7 GPIO8_OVERT 7 2
AE9 F9 PSI 6 3
<4> PEG_HTX_C_GRX_P2 PEX_RX2 GPIO4 3VSDGPU_MAIN_EN <43,54>
AF9 A3 3VSDGPU_MAIN_EN GPIO9_ALERT 5 4 GPIO2 O LCD_BL_PWM
AG9 A4 GPU_EVENT#
<4> PEG_HTX_C_GRX_P3 PEX_RX3 GPIO6 GPU_EVENT# <15>
AG10 B6 VGA@
AF10 A6 GPIO8_OVERT N14x for GPIO8 GPIO3 O LCD_VCC
<4> PEG_HTX_C_GRX_P4 NC OVERT
AE10 F8 GPIO9_ALERT
<4> PEG_HTX_C_GRX_N4
AE12 NC GPIO9 C5 N15x for OVERT +3VSDGPU_AON
1 <4> PEG_HTX_C_GRX_P5 NC GPIO10 1
AF12 E7 DGPU_VID RP2001 GPIO4 O LCD_BL_EN
<4> PEG_HTX_C_GRX_N5 NC GPIO11 DGPU_VID <54>
AG12 D7 ACIN_BUF 10K_0804_8P4R_5%
<4> PEG_HTX_C_GRX_P6 NC GPIO12
AG13 B4 PSI ACIN_BUF 2 1 GC6_FB_EN 8 1
GPIO
<4> PEG_HTX_C_GRX_N6 NC GPIO13 PSI <54> DGPU_AC_DETECT <39>
AF13 B3 D2000 GPU_PEX_RST_HOLD# 7 2 GPIO5 O 3V3_MAIN_EN
<4> PEG_HTX_C_GRX_P7 NC GPIO14
AE13 C3 RB751V-40_SOD323-2 3VSDGPU_MAIN_EN 6 3
<4> PEG_HTX_C_GRX_N7 NC GPIO15
AE15 D5 @ GPU_EVENT# 5 4
AF15 NC GPIO16 D4
AG15 NC GPIO17 C2 GC6@
GPIO6 I GPU_EVENT#
AG16 NC GPIO18 F7
UGPU1 UGPU1 AF16 NC GPIO19 E6
AE16 NC GPIO20 C4 GPU_PEX_RST_HOLD#
GPIO7 O 3D Vision
AE18 NC GPIO21 +3VSDGPU_AON
AF18 NC AB6 PLTRST_VGA#
AG18 NC PEX_WAKE_NC R2056
GPIO8 I SYS_PEX_RST_MON#
AG19 NC SYS_PEX_RST_MON# 2 @ 1 10K_0402_5%
N15S-GT-S-A2_BGA_595P N15V-GM-S-A2_BGA_595P AF19 NC R2000
NC GPIO9 I/O ALERT
2
SGT@ VGM@ AE19 I2CS_SDA 1 VGA@ 2 1.8K_0402_5%
AE21 NC AG3 R2001
SA00007GJ10 SA00007BR20 NC NC
AF21 AF4 GPIO8_OVERT 1 6 GPU_OVERT <39> I2CS_SCL 1 VGA@ 2 1.8K_0402_5% GPIO10 O MEM_VREF_CTL
AG21 NC NC AF3 VGA@
AG22 NC NC DMN66D0LDW-7_SOT363-6 R2052
NC ACIN_BUF 1 VGA@ 2 100K_0402_5%
Q2000A
AC9 AE3
GPIO11 O PWM_VID
<4> PEG_GTX_HRX_P0 PEX_TX0 NC
DACs
<4> PEG_GTX_HRX_N0 AB9 AE4 GPIO9_ALERT_GATE
AB10 PEX_TX0_N NC
<4> PEG_GTX_HRX_P1 PEX_TX1
<4> PEG_GTX_HRX_N1 AC10 GPIO12 I PWR_LEVEL
PEX_TX1_N
5
PCI EXPRESS
<4> PEG_GTX_HRX_P2 AD11
AC11 PEX_TX2 W5
<4> PEG_GTX_HRX_N2 PEX_TX2_N NC
<4> PEG_GTX_HRX_P3 AC12 AE2 GPIO9_ALERT 4 3 GPU_ALERT <39> GPIO13 O PSI
AB12 PEX_TX3 TSEN_VREF AF2 VGA@
<4> PEG_GTX_HRX_N3 PEX_TX3_N NC
<4> PEG_GTX_HRX_P4 AB13 DMN66D0LDW-7_SOT363-6
AC13 NC
2 <4> PEG_GTX_HRX_N4
AD14 NC Q2000B GPIO14 I HPD_A 2
<4> PEG_GTX_HRX_P5 NC
<4> PEG_GTX_HRX_N5 AC14
AC15 NC
<4> PEG_GTX_HRX_P6
AB15 NC GPIO15 I HPD_C
<4> PEG_GTX_HRX_N6 NC
<4> PEG_GTX_HRX_P7 AB16 B7 R2003 1 VGA@ 2 1.8K_0402_5%
AC16 NC I2CA_SCL A7 R2004 1 VGA@ 2 1.8K_0402_5%
<4> PEG_GTX_HRX_N7 NC I2CA_SDA GPIO16 RESERVED
AD17 R152
AC17 NC C9 R2005 1 VGA@ 2 1.8K_0402_5% 0_0402_5%
AC18 NC I2CB_SCL C8 R2006 1 VGA@ 2 1.8K_0402_5% 1 @ 2 PLTRST_VGA#
NC I2CB_SDA GPIO17 I HPD_D
I2C
AB18
AB19 NC A9 R2007 1 VGA@ 2 1.8K_0402_5% R314
AC19 NC I2CC_SCL B9 R2008 1 VGA@ 2 1.8K_0402_5% 0_0402_5%
AD20 NC I2CC_SDA 1 @ 2
GPIO18 I HPD_E
NC +3VSDGPU_AON
AC20 D9 I2CS_SCL
NC I2CS_SCL
2
AC21 D8 I2CS_SDA GPIO19 I HPD_F or HPD_B
AB21 NC I2CS_SDA
AD23 NC I2CS_SCL 1 6
AE23 NC Place Under L6 VGA@
EC_SMB_CK2 <17,30,39>
AF24 NC VGA@ DMN66D0LDW-7_SOT363-6
GPIO20 Reserved
AE24 NC L6 +PLLVDD 1 2 C2000
NC PLLVDD Q2001A
AG24 M6 0.1U_0402_16V4Z GPIO21 O GPU_PEX_RST_HOLD#
AG25 NC SP_PLLVDD
NC N6 VGA@
NC +GPU_PLLVDD 1 2 R153
C2001 0_0402_5%
GPIO22
+3VSDGPU_AON 1 VGA@ 2 AE8 0.1U_0402_16V4Z 1 @ 2 PLTRST_VGA#
<16> CLK_PEG_VGA PEX_REFCLK
R2009 10K_0402_5% AD8 GPIO23
<16> CLK_PEG_VGA# PEX_REFCLK_N
PEG_CLKREQ# AC6 Place Under M6 R313
<16> PEG_CLKREQ# PEX_CLKREQ_N 0_0402_5%
PEX_TSTCLK_OUT+ AF22 1 @ 2
CLK
2 @ 1 PEX_TSTCLK_OUT- AE22 PEX_TSTCLK_OUT C11 XTALIN

+3VSDGPU_AON GPIO24
PEX_TSTCLK_OUT_N XTAL_IN
5
R2010 200_0402_1% B10 XTALOUT
XTAL_OUT
3 PLTRST_VGA# AC7 A10 XTAL_SSIN R2012 1 VGA@ 2 10K_0402_5% I2CS_SDA 4 3 3
PEX_RST_N XTAL_SSIN EC_SMB_DA2 <17,30,39>
2 VGA@ 1 PEX_TREMP AF25 C10 XTAL_OUTBUFF
R2013 1 VGA@ 2 10K_0402_5% VGA@
R2011 2.49K_0402_1% PEX_TERMP XTAL_OUTBUFF DMN66D0LDW-7_SOT363-6
Q2001B
GM108-ES-S-A1_FCBGA595
@
SM010019400 3000ma 33ohm@100mhz DCR 0.05

D2001
38mA +1.05VSDGPU X2000
GC6@ VGA@ VGA@
GC6_FB_EN 2 +PLLVDD 1 2 27MHZ_10PF_7V27000023
GC6 2.0 function 1 1.5VS_DGPU_PWR_EN 1.5VS_DGPU_PWR_EN <43,53> L2000 CHILISIN PBY160808T-330Y-N
3 1 XTALOUT 3 1 XTALIN
C2003 3 1
PLL_VDD
1
GND GND
10P_0402_50V8J
10P_0402_50V8J
BAV70W_SOT323-3 VGA@ 1 1
R2014
0.1Ux1, 22Ux1 22U_0603_6.3V6M VGA@ VGA@
R2016 10K_0402_5% 33ohm(ESR0.05)x1 2 4 2
0_0402_5% GC6@ Near GPU C2004 C2005
1 NGC6@ 2 2 2
<16,19,43,54> VGA_PWROK
2
SM010028480 1500ma 180ohm@100mhz DCR 0.18

+3VSDGPU_AON 17mA
Crystals must have a max ESR of 80 ohm
U2001 VGA@
VGA@ +GPU_PLLVDD 1 2
5
MC74VHC1G08DFT2G_SC70-5 L2001 BLM18PG181SN1D_2P DVT modify 11/27

PLT_RST# 2 SP_PLLVDD+VID_PLLVDD TXC recommend from 18P change to 10P
1 1
P
<15,34,36,39,42> PLT_RST# B X2000 from SJ100009700 change to SJ10000G300

4SYS_PEX_RST_MON# C2006 C2007
DGPU_HOLD_RST# 1 Y SYS_PEX_RST_MON# <25> 0.1Ux2, 4.7Ux1,22Ux1 VGA@ VGA@
<15> DGPU_HOLD_RST# A
G
4 180ohm(ESR0.2)x1 4.7U_0603_6.3V6K 22U_0603_6.3V6M 4

+3VSDGPU_AON R2019 R2017 2 2
3
0_0402_5% 10K_0402_5% Near GPU

NGC6@ VGA@
1
R2055
D2002 10K_0402_5%
SYS_PEX_RST_MON# 2 GC6@
2
1 PLTRST_VGA#
GPU_PEX_RST_HOLD# 3 DVT modify 11/20
use diode need to pull high
use AND gate need to pull down THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N15X PEG 1/7
BAT54A-7-F_SOT23-3 Size Document Number Rev
GC6@ DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
Z5WAW M/B LA-B702
A B C D E
A B C D E
VRAM Interface
UGPU1B
MDA[15..0]
1 <28> MDA[15..0] 1
Part 2 of 6
MDA[31..16] CMDA[31..0] <28,29>
<28> MDA[31..16]
MDA0 E18 C27 CMDA0
MDA[47..32] MDA1 F18 FBA_D00 FBA_CMD0 C26 CMDA1
<29> MDA[47..32] FBA_D01 FBA_CMD1
MDA2 E16 E24 CMDA2
MDA[63..48] MDA3 F17 FBA_D02 FBA_CMD2 F24 CMDA3
<29> MDA[63..48] FBA_D03 FBA_CMD3
MDA4 D20 D27 CMDA4
MDA5 D21 FBA_D04 FBA_CMD4 D26 CMDA5
MDA6 F20 FBA_D05 FBA_CMD5 F25 CMDA6
MDA7 E21 FBA_D06 FBA_CMD6 F26 CMDA7
MDA8 E15 FBA_D07 FBA_CMD7 F23 CMDA8
MDA9 D15 FBA_D08 FBA_CMD8 G22 CMDA9
MDA10 F15 FBA_D09 FBA_CMD9 G23 CMDA10
MDA11 F13 FBA_D10 FBA_CMD10 G24 CMDA11
MDA12 C13 FBA_D11 FBA_CMD11 F27 CMDA12
MDA13 B13 FBA_D12 FBA_CMD12 G25 CMDA13
MDA14 E13 FBA_D13 FBA_CMD13 G27 CMDA14
MDA15 D13 FBA_D14 FBA_CMD14 G26 CMDA15
MDA16 B15 FBA_D15 FBA_CMD15 M24 CMDA16
MDA17 C16 FBA_D16 FBA_CMD16 M23 CMDA17
MDA18 A13 FBA_D17 FBA_CMD17 K24 CMDA18
MDA20 B18 FBA_D19 FBA_CMD19 M27 CMDA20
MDA21 A18 FBA_D20 FBA_CMD20 M26 CMDA21
MDA22 A19 FBA_D21 FBA_CMD21 M25 CMDA22
MDA23 C19 FBA_D22 FBA_CMD22 K26 CMDA23
MDA24 B24 FBA_D23 FBA_CMD23 K22 CMDA24
MDA25 C23 FBA_D24 FBA_CMD24 J23 CMDA25
MDA26 A25 FBA_D25 FBA_CMD25 J25 CMDA26
MDA27 A24 FBA_D26 FBA_CMD26 J24 CMDA27
MDA29 B21 FBA_D28 FBA_CMD28 K25 CMDA29
MDA30 C20 FBA_D29 FBA_CMD29 J27 CMDA30
2 MDA31 C21 FBA_D30 FBA_CMD30 J26 CMDA31 2
MDA32 R22 FBA_D31 FBA_CMD31
FBA_D32 DQMA[3..0] <28>
MDA33 R24 D19 DQMA0
INTERFACE A
MDA34 T22 FBA_D33 FBA_DQM0 D14 DQMA1
MDA35 R23 FBA_D34 FBA_DQM1 C17 DQMA2
MDA36 N25 FBA_D35 FBA_DQM2 C22 DQMA3
FBA_D36 FBA_DQM3 DQMA[7..4] <29>
MDA37 N26 P24 DQMA4
MEMORY
MDA38 N23 FBA_D37 FBA_DQM4 W24 DQMA5
MDA39 N24 FBA_D38 FBA_DQM5 AA25 DQMA6
MDA40 V23 FBA_D39 FBA_DQM6 U25 DQMA7
NV 15x DG‐06803‐V03 MDA41
MDA42
V22
T23
FBA_D40
FBA_D41
FBA_DQM7
F19 DQSA#0
DQSA#[3..0] <28>
MDA43 U22 FBA_D42 FBA_DQS_RN0 C14 DQSA#1
MDA44 Y24 FBA_D43 FBA_DQS_RN1 A16 DQSA#2
MDA45 AA24 FBA_D44 FBA_DQS_RN2 A22 DQSA#3
FBA_D45 FBA_DQS_RN3 DQSA#[7..4] <29>
MDA46 Y22 P25 DQSA#4
MDA47 AA23 FBA_D46 FBA_DQS_RN4 W22 DQSA#5
MDA48 AD27 FBA_D47 FBA_DQS_RN5 AB27 DQSA#6
MDA49 AB25 FBA_D48 FBA_DQS_RN6 T27 DQSA#7
MDA50 AD26 FBA_D49 FBA_DQS_RN7
FBA_D50 DQSA[3..0] <28>
MDA51 AC25 E19 DQSA0
MDA52 AA27 FBA_D51 FBA_DQS_WP0 C15 DQSA1
MDA53 AA26 FBA_D52 FBA_DQS_WP1 B16 DQSA2
MDA54 W26 FBA_D53 FBA_DQS_WP2 B22 DQSA3
FBA_D54 FBA_DQS_WP3 DQSA[7..4] <29>
SM010019400 3000ma 33ohm@100mhz DCR 0.05 MDA55 Y25 R25 DQSA4
MDA56 R26 FBA_D55 FBA_DQS_WP4 W23 DQSA5
MDA57 T25 FBA_D56 FBA_DQS_WP5 AB26 DQSA6
MDA58 N27 FBA_D57 FBA_DQS_WP6 T26 DQSA7
+1.05VSDGPU MDA59 R27 FBA_D58 FBA_DQS_WP7
MDA60 V26 FBA_D59
VGA@
15+55mA MDA61 V27 FBA_D60
2 1 L2002 +FB_PLLAVDD MDA62 W27 FBA_D61
FBA_D62
22U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CHILISIN PBY160808T-330Y-N MDA63 W25

3 FBA_D63 D24 3
FBA_CLK0 CLKA0 <28>
1 2 2 2 F16 D25
FB_PLLAVDD_1 FBA_CLK0_N CLKA0# <28>
P22
C2008 C2011 C2010 C2009 FB_PLLAVDD_2 N22
FBA_CLK1 CLKA1 <29>
VGA@ VGA@ VGA@ VGA@ T97 @ D23 M22
2 1 1 1 FB_VREF_PROBE FBA_CLK1_N CLKA1# <29>
D18
H22 FBA_WCK01 C18
FB_DLLAVDD FBA_WCK01_N D17
Place Near GPU Place Under F16 P22 H22 1 VGA@ 2 FB_CLAMP F3 FBA_WCK23 D16
10K_0402_5% R2028 FB_CLAMP FBA_WCK23_N T24
NC
FBA_WCK45 U24
60.4_0402_1% 1 @ 2 R2020FBA_CMD34 F22 FBA_WCK45_N V24
60.4_0402_1% 1 @ 2 R2022FBA_CMD35 J22 FBA_CMD34 FBA_WCK67 V25
+1.5VSDGPU FBA_CMD35 FBA_WCK67_N
4 4

N15X VRAM 2/7
WWW.AliSaler.Com
Z5WAW M/B LA-B702
A B C D E
A B C D E
UGPU1C MULTI LEVEL STRAPS
Part 3 of 6 F11
AC3 NC AD10 +3VSDGPU_AON +3VSDGPU_MAIN
AC4 NC NC AD7
Y4 NC NC B19 strap0 strap1 strap2 strap3 strap4
Y3 NC FBA_CMD32 V5
NC NC
1
AA3 V6
AA2 NC NC G1 R2029 R2030 R2031 R2032 R2033 R2035 R2036 R2037
AB1 NC NC G2 X76@ X76@ X76@ X76@ X76@ X76@ X76@ X76@
NC NC
NC
AA1 G3 45.3K_0402_1% 4.99K_0402_1% 20K_0402_1% 4.99K_0402_1% 10K_0402_1% 30K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
AA4 NC NC G4
2
AA5 NC NC G5
1 NC NC 1
G6
NC G7 STRAP0
AB5 NC V1 STRAP1 ROM_SI
AB4 NC NC V2 STRAP2 ROM_SO
AB3 NC NC W1 STRAP3 ROM_SCLK
AB2 NC NC W2 STRAP4
AD3 NC NC W3
AD2 NC NC W4
NC NC
1
AE1
AD1 NC R2038 R2039 R2040 R2041 R2042 R2044 R2045 R2046
AD4 NC X76@ X76@ X76@ X76@ X76@ X76@ X76@ X76@
NC For GC62.0 use
AD5 D11 R2050 1 @ 2 10K_0402_5% 4.99K_0402_1% 34.8K_0402_1% 15K_0402_1% 4.99K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1% 4.99K_0402_1%
NC BUFRST_N N14x for CEC ,NC
2
D10 N15x for GPIO8
T2 NC
T3 NC E9 SYS_PEX_RST_MON#
NC GPIO8 SYS_PEX_RST_MON# <23>
T1
R1 NC E10
R2 NC NC
GENERAL
NC
LVDS/TMDS
R3 F10
N2 NC NC
N3 NC
NC D1 STRAP0
STRAP0 D2 STRAP1
V3 STRAP1 E4 STRAP2
V4 NC STRAP2 E3 STRAP3
U3 NC STRAP3 D3 STRAP4
U4 NC STRAP4 C1
T4 NC NC
T5 NC
R4 NC F6 MULTI_STRAP_REF0_GND 1 SGT@ 2 R2051
R5 NC MULTI_STRAP_REF0_GND F4 40.2K_0402_1%
NC NC F5
2 NC 2
N1
M1 NC
M2 NC F12
M3 NC THERMDP For N15S-GT Multilevel strap table Decive ID : 0x1341
K2 NC E12 GPU X76 Size Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 ROM_SI ROM_SO ROM_SCLK
K3 NC THERMDN
K1 NC
J1 NC
NC 1G 128Mx16x4
M4
NC VDD_SENSE
F2 VCCSENSE_VGA
VCCSENSE_VGA <54> N15S-GT
M5 PU 50K NC NC NC NC PD 4.99K PD 4.99K
L3 NC 0x4 (SA000077K20) Micron MT41J256M16HA-093G:E PD 24.9K
L4 NC X76550BOLA0
K4 NC 2G 256Mx16x4 0x5 (SA000076P20) Samsung K4W4G1646D-BC1A PD 30.1K
NC X76550BOLA1
K5 0x3 (SA00006E840) Hynix H5TC4G63AFR-11C PD 20K
J4 NC F1 VSSSENSE_VGA X76550BOLA2
NC GND_SENSE VSSSENSE_VGA <54>
J5
N4 NC For N15V-GL/GM Binary strap table Decive ID : 0x1140
N5 NC
NC
TEST GPU X76 Size Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 ROM_SI ROM_SO ROM_SCLK
R2054
P3 AD9 TESTMODE 1 VGA@ 2 10K_0402_5% 0x1 (SA000067550) Micron MT41J128M16JT-093G:K PU 10K PD10K PD 10K PD 10K
P4 NC TESTMODE AE5 JTAG_TCK PAD @ T188 X76550BOLA3
NC JTAG_TCK AE6 JTAG_TDI PAD @ T1 0x5 (SA000068U00) Samsung K4W2G1646E-BC1A PU 10K PD10K PU 10K PD 10K
JTAG_TDI AF6 JTAG_TDO PAD @ T186 X76550BOLA4 1G 128Mx16x4
J2 JTAG_TDO AD6 JTAG_TMS PAD @ T3 0xC (SA00006H430) Hynix H5TC2G63FFR-11C PD 10K PD10K PU 10K PU 10K
NC JTAG_TMS
J3
NC JTAG_TRST_N
AG4 JTAG_RST R2053 1 VGA@ 210K_0402_5% N15V-GM X76550BOLA5
PD 10K PD 10K PD 10K PD 10K
3 3
H3 0xD (SA000077K20) MT41J256M16HA-093G:E PU 10K PD10K PU 10K PD 10K
H4 NC X76550BOLA6
NC SERIAL 0x9 (-) K4W4G1646D-BC1A PU 10K PD10K PD 10K PD 10K
D12 X76550BOLA7 2G 256Mx16x5
ROM_CS_N B12 ROM_SI 0x4 (-) H5TC4G63AFR-11C PD 10K PD 10K PU 10K PD 10K
ROM_SI A12 ROM_SO X76550BOLA8
ROM_SO C12 ROM_SCLK
ROM_SCLK
4 4

N15X LVDS 3/7
Custom 0.2
Z5WAW M/B LA-B702
A B C D E
A B C D E
NV 15x DG‐06803‐V03
1 1
UGPU1D +1.05VSDGPU
+1.5VSDGPU 3.24A 0.91A
Part 4 of 6
4.7U_0603_6.3V6K
B26 AA10
FBVDDQ_01 PEX_IOVDDQ_1
10U_0603_6.3V6M
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
C25 AA12
VGA@ C2039 FBVDDQ_02 PEX_IOVDDQ_2
VGA@ C2040
VGA@ C2032
VGA@ C2033
VGA@ C2021
VGA@ C2022
VGA@ C2013
VGA@ C2014
VGA@ C2016
VGA@ C2017
1 1 1 1 2 2 E23 AA13 1 1 1 1
E26 FBVDDQ_03 PEX_IOVDDQ_3 AA16
F14 FBVDDQ_04 PEX_IOVDDQ_4 AA18
F21 FBVDDQ_05 PEX_IOVDDQ_5 AA19
2 2 2 2 1 1 G13 FBVDDQ_06 PEX_IOVDDQ_6 AA20 2 2 2 2
G14 FBVDDQ_07 PEX_IOVDDQ_7 AA21
G15 FBVDDQ_08 PEX_IOVDDQ_8 AB22
Under GPU G16 FBVDDQ_09 PEX_IOVDDQ_9 AC23
G18 FBVDDQ_10 PEX_IOVDDQ_10 AD24
10U_0603_6.3V6M
G19 AE25 Under GPU Near GPU
22U_0603_6.3V6M
VGA@ C2045
VGA@ C2047
1 1 G20 AF26 Midway GPU & Power supply
G21 FBVDDQ_13 PEX_IOVDDQ_13 AF27
H24 FBVDDQ_14 PEX_IOVDDQ_14
H26 FBVDDQ_AON
2 2 J21 FBVDDQ_AON AA22
K21 FBVDDQ_AON PEX_IOVDD_1 AB23
L22 FBVDDQ_AON PEX_IOVDD_2 AC24
L24 FBVDDQ_19 PEX_IOVDD_3 AD25
Near GPU
POWER
L26 FBVDDQ_20 PEX_IOVDD_4 AE26
M21 FBVDDQ_21 PEX_IOVDD_5 AE27
2 N21 FBVDDQ_22 PEX_IOVDD_6 2
R21 FBVDDQ_23
T21 FBVDDQ_24
V21 FBVDDQ_25 +3VSDGPU_AON
W21 FBVDDQ_26
FBVDDQ_27 G10
3V3_AON
1U_0402_6.3V6K
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
G12 56mA
3V3_AON
VGA@ C2048
VGA@ C2049
VGA@ C2050
G8 2 1 1
VDD33_3 G9
VDD33_4
V7 1 2 2
W7 NC +1.5VSDGPU
AA6 NC
W6 NC D22 FB_CAL_PD_VDDQ 1 VGA@ 2
NC FB_CAL_PD_VDDQ Under GPU Near GPU
Y6 40.2_0402_1% R2078 +3VSDGPU_MAIN
NC
C24 FB_CAL_PU_GND 1 VGA@ 2
FB_CAL_PU_GND 42.2_0402_1% R2079
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
VGA@ C2051
VGA@ C2052
VGA@ C2053
VGA@ C2054
M7 B25 FB_CAL_TERM_GND1 VGA@ 2 2 2 1 1
N7 NC FB_CAL_TERM_GND 51.1_0402_1% R2080
T6 NC
P6 NC
NC 1 1 2 2
T7 Under GPU Near GPU
R7 IFPD_PLLVDD_2 +3VSDGPU_AON
U6 NC
R6 IFPD_RSET AA8
286mA
NC PEX_PLL_HVDD_1 AA9
PEX_PLL_HVDD_2
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
VGA@ C2034
VGA@ C2035
VGA@ C2036
3 AB8 2 1 1 3
PEX_SVDD_3V3
J7
K7 NC 1 2 2
K6 NC AA14
H6 NC PEX_PLLVDD_1 AA15
J6 NC PEX_PLLVDD_2
NC Near GPU
+1.05VSDGPU
130mA +PEX_PLLVDD 2 1
0.1U_0402_16V4Z
R2075 SGT@ 0_0603_5%
VGA@ C2041
VGA@ C2042
VGA@ C2043
1U_0402_6.3V6K
4.7U_0603_6.3V6K
2 1 1
@ 1 2 2
Under GPU Near GPU
R2075
BLM18PG121SN1D_0603
VGM@
4 SM01000BW00 4
SM01000BW00 3000ma 120ohm@100mhz DCR 0.04

N15X POWER & GND 4/9
WWW.AliSaler.Com
Z5WAW M/B LA-B702
A B C D E
A B C D E
UGPU1F
UGPU1E +VGA_CORE +VGA_CORE
Part 6 of 6
A2
A26 GND_001
Part 5 of 6
GND_057
K11
K13 K10 V18
NV 15x DG‐06803‐V03
AB11 GND_002 GND_058 K15 K12 VDD_001 VDD_041 V16
1 GND_003 GND_059 VDD_002 VDD_040 1
AB14 K17 K14 V14
AB17 GND_004 GND_060 L10 K16 VDD_003 VDD_039 V12
AB20 GND_005 GND_061 L12 K18 VDD_004 VDD_038 V10
AB24 GND_006 GND_062 L14 L11 VDD_005 VDD_037 U17
GND_007 GND_063 VDD_006 VDD_036
POWER
AC2 L16 L13 U15
AC22 GND_008 GND_064 L18 L15 VDD_007 VDD_035 U13
AC26 GND_009 GND_065 L2 L17 VDD_008 VDD_034 U11
AC5 GND_010 GND_066 L23 M10 VDD_009 VDD_033 T18
AC8 GND_011 GND_067 L25 M12 VDD_010 VDD_032 T16
AD12 GND_012 GND_068 L5 M14 VDD_011 VDD_031 T14
AD13 GND_013 GND_069 M11 M16 VDD_012 VDD_030 T12
AD15 GND_014 GND_070 M13 M18 VDD_013 VDD_029 T10
AD16 GND_015 GND_071 M15 N11 VDD_014 VDD_028 R17
AD18 GND_016 GND_072 M17 N13 VDD_015 VDD_027 R15
AD19 GND_017 GND_073 N10 N15 VDD_016 VDD_026 R13
AD21 GND_018 GND_074 N12 N17 VDD_017 VDD_025 R11
AD22
AE11
GND_019
GND_020
GND_075
GND_076
N14
N16
P10
P12
VDD_018
VDD_019
VDD_024
VDD_023
P18
P16
DA‐06840‐V03
AE14 GND_021 GND_077 N18 VDD_020 VDD_022 P14
AE17 GND_022 GND_078 P11 VDD_021
AE20 GND_023 GND_079 P13
AF1 GND_024 GND_080 P15
AF11 GND_025 GND_081
GND
P17
AF14 GND_026 GND_082 P2
AF17 GND_027 GND_083 P23
AF20 GND_028 GND_084 P26
AF23 GND_029 GND_085 P5
AF5 GND_030 GND_086 R10
AF8 GND_031 GND_087 R12 GM108-ES-S-A1_FCBGA595
AG2 GND_032 GND_088 R14
AG26 GND_033 GND_089 R16
GND_034 GND_090 @
B1 R18
B11 GND_035 GND_091 T11
2 B14 GND_036 GND_092 T13 2
B17 GND_037 GND_093 T15
B20 GND_038 GND_094 T17
B23 GND_039 GND_095 U10
B27 GND_040 GND_096 U12
B5
B8
GND_041
GND_042
GND_097
GND_098
U14
U16
DA‐06925‐V05
E11 GND_043 GND_099 U18
E14 GND_044 GND_100 U2
E17 GND_045 GND_101 U23
E2 GND_046 GND_102 U26
E20 GND_047 GND_103 U5
E22 GND_048 GND_104 V11
E25 GND_049 GND_105 V13
E5 GND_050 GND_106 V15
E8 GND_051 GND_107 V17
H2 GND_052 GND_108 Y2
H23 GND_053 GND_109 Y23
H25 GND_054 GND_110 Y26
H5 GND_055 GND_111 Y5
GND_056 GND_112
AA7
GND AB7
GND
@ DA07075‐V01
3 3
4 4

N15X POWER & GND 5/7
Z5WAW M/B LA-B702
A B C D E
A B C D E
VRAM DDR3 chips <24,29> DQSA[7..0]

DQSA[7..0]
DQSA#[7..0]
<24,29> DQSA#[7..0]
DQMA[7..0]
<24,29> DQMA[7..0]
<24,29> MDA[63..0]
MDA[63..0]
CMDA[30..0]
Upper 32
<24,29> CMDA[30..0]
Mode D
1 Address 0..31 32..63 1
CMD0 CS0_L#
U2004 X76@ U2005 X76@
CMD1
+MEM_VREF0 M8 E3 MDA12 +MEM_VREF1 M8 E3 MDA3
VREFCA DQL0 VREFCA DQL0
+MEM_VREF1 H1
VREFDQ DQL1
F7 MDA13 +MEM_VREF0 H1
VREFDQ DQL1
F7 MDA4 CMD2 ODT_L
F2 MDA8 F2 MDA2
DQL2 DQL2
CMDA9 N3
A0 DQL3
F8 MDA15 CMDA9 N3
A0 DQL3
F8 MDA7 CMD3 CKE_L
CMDA11 P7 H3 MDA9 Group1 CMDA11 P7 H3 MDA0 Group0
A1 DQL4 A1 DQL4
CMDA8 P3
A2 DQL5
H8 MDA11 CMDA8 P3
A2 DQL5
H8 MDA5 CMD4 A14 A14
CMDA25 N2 G2 MDA10 CMDA25 N2 G2 MDA1
A3 DQL6 A3 DQL6
CMDA10 P8
A4 DQL7
H7 MDA14 CMDA10 P8
A4 DQL7
H7 MDA6 CMD5 RST RST
CMDA24 P2 CMDA24 P2
A5 A5
CMDA22 R8
A6
CMDA22 R8
A6 CMD6 A9 A9
CMDA7 R2 D7 MDA17 CMDA7 R2 D7 MDA27
A7 DQU0 A7 DQU0
CMDA21 T8
A8 DQU1
C3 MDA21 CMDA21 T8
A8 DQU1
C3 MDA29 CMD7 A7 A7
CMDA6 R3 C8 MDA18 CMDA6 R3 C8 MDA25
A9 DQU2 A9 DQU2
CMDA29 L7
A10/AP DQU3
C2 MDA23 CMDA29 L7
A10/AP DQU3
C2 MDA30 CMD8 A2 A2
CMDA23 R7 A7 MDA19 Group2 CMDA23 R7 A7 MDA24 Group3
A11 DQU4 A11 DQU4
CMDA28 N7
A12 DQU5
A2 MDA22 CMDA28 N7
A12 DQU5
A2 MDA28 CMD9 A0 A0
CMDA20 T3 B8 MDA16 CMDA20 T3 B8 MDA26
A13 DQU6 A13 DQU6
CMDA4 T7
A14 DQU7
A3 MDA20 CMDA4 T7
A14 DQU7
A3 MDA31 CMD10 A4 A4
CMDA14 M7 CMDA14 M7
A15/BA3 A15/BA3
+1.5VSDGPU +1.5VSDGPU CMD11 A1 A1
CMDA12 M2
BA0 VDD
B2 CMDA12 M2
BA0 VDD
B2 CMD12 BA0 BA0
CMDA27 N8 D9 CMDA27 N8 D9
BA1 VDD BA1 VDD
CMDA26 M3
BA2 VDD
G7 CMDA26 M3
BA2 VDD
G7 CMD13 WE* WE*
K2 K2
VDD VDD
VDD
K8
VDD
K8 CMD14 A15 A15
N1 N1
VDD VDD
CLKA0 J7
CK VDD
N9 CLKA0 J7
CK VDD
N9 CMD15 CAS* CAS*
CLKA0# K7 R1 CLKA0# K7 R1
CK VDD CK VDD
2 CMDA3 K9
CKE/CKE0 VDD
R9
+1.5VSDGPU
CMDA3 K9
CKE/CKE0 VDD
R9
+1.5VSDGPU
CMD16 CS0_H# 2
CMD17
CMDA2 K1 A1 CMDA2 K1 A1
ODT/ODT0 VDDQ ODT/ODT0 VDDQ
CMDA0 L2
CS/CS0 VDDQ
A8 CMDA0 L2
CS/CS0 VDDQ
A8 CMD18 ODT_H
CMDA30 J3 C1 CMDA30 J3 C1
RAS VDDQ RAS VDDQ
CMDA15 K3
CAS VDDQ
C9 CMDA15 K3
CAS VDDQ
C9 CMD19 CKE_H
CMDA13 L3 D2 CMDA13 L3 D2
WE VDDQ WE VDDQ
310mAVDDQ E9
VDDQ
E9 CMD20 A13 A13
F1 310mAVDDQ F1
VDDQ
DQSA1 F3
DQSL VDDQ
H2 DQSA0 F3
DQSL VDDQ
H2 CMD21 A8 A8
DQSA2 C7 H9 DQSA3 C7 H9
DQSU VDDQ DQSU VDDQ
CMD22 A6 A6
DQMA1 E7
DML VSS
A9 DQMA0 E7
DML VSS
A9 CMD23 A11 A11
DQMA2 D3 B3 DQMA3 D3 B3
DMU VSS DMU VSS
VSS
E1
VSS
E1 CMD24 A5 A5
G8 G8
VSS VSS
DQSA#1 G3
DQSL VSS
J2 DQSA#0 G3
DQSL VSS
J2 CMD25 A3 A3
DQSA#2 B7 J8 DQSA#3 B7 J8
DQSU VSS DQSU VSS
VSS
M1
VSS
M1 CMD26 BA2 BA2
M9 M9
VSS VSS
VSS
P1
VSS
P1 CMD27 BA1 BA1
CMDA5 T2 P9 CMDA5 T2 P9
RESET VSS RESET VSS
VSS
T1
VSS
T1 CMD28 A12 A12
ZQ0 L8 T9 ZQ1 L8 T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS
CMD29 A10 A10
1
1
J1
NC/ODT1 VSSQ
B1 J1
NC/ODT1 VSSQ
B1 CMD30 RAS* RAS*
R2081 VGA@ L1 B9 R2082 VGA@ L1 B9
243_0402_1% J9 NC/CS1 VSSQ D1 243_0402_1% J9 NC/CS1 VSSQ D1
NC/CE1 VSSQ NC/CE1 VSSQ Not Available
L9 D8 L9 D8
2
2
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
3 VSSQ E8 VSSQ E8
LOW HIGH 3
VSSQ F9 VSSQ F9
VSSQ G1 VSSQ G1
VSSQ G9 VSSQ G9
VSSQ VSSQ Command Bit Default Pull-down
96-BALL 96-BALL ODTx 10k
SDRAM DDR3 SDRAM DDR3
H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 DDR3 CKEx 10k
RST 10k
CS* No Termination
+1.5VSDGPU +1.5VSDGPU
R2085 R2086
VGA@ VGA@
1.33K_0402_1% 1.33K_0402_1%
+1.5VSDGPU CLKA0
<24> CLKA0
1
+MEM_VREF0 +MEM_VREF1
CMDA2 R2093 1 VGA@ 2 10K_0402_5% VGA@
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CMDA3 R2094 1 VGA@ 2 10K_0402_5% 1 1 R2087

VGA@ C2071
VGA@ C2072
VGA@ C2073
VGA@ C2074
VGA@ C2075
VGA@ C2076
VGA@ C2077
VGA@ C2078
VGA@ C2079
VGA@ C2080
VGA@ C2081
VGA@ C2082
1 1 1 1 1 1 1 1 1 1 1 1 CMDA5 R2095 1 VGA@ 2 10K_0402_5% R2091 C2055 R2092 C2056 160_0402_1%

CMDA18 R2098 1 VGA@ 2 10K_0402_5% VGA@ VGA@ VGA@ VGA@
2
CMDA19 R2099 1 VGA@ 2 10K_0402_5% 1.33K_0402_1% 0.1U_0402_16V4Z 1.33K_0402_1% 0.1U_0402_16V4Z CLKA0#
2 2 <24> CLKA0#
4 4
2 2 2 2 2 2 2 2 2 2 2 2

N15X DDR3 6/7
WWW.AliSaler.Com
Custom 0.2
Z5WAW M/B LA-B702
A B C D E
A B C D E
VRAM DDR3 chips <24,28> DQSA[7..0]

DQSA[7..0]
DQSA#[7..0]
Mode D
Address 0..31 32..63
<24,28> DQSA#[7..0]
<24,28> DQMA[7..0]
DQMA[7..0] CMD0 CS0_L#
<24,28> MDA[63..0]
MDA[63..0] CMD1
<24,28> CMDA[30..0]
CMDA[30..0] CMD2 ODT_L
CMD3 CKE_L
1 CMD4 A14 A14 1
Lower 32 CMD5
CMD6
RST
A9
RST
A9
U2007 X76@ CMD7 A7 A7
U2006 X76@
+MEM_VREF3 M8
VREFCA DQL0
E3 MDA45 CMD8 A2 A2
+MEM_VREF2 M8 E3 MDA39 +MEM_VREF2 H1 F7 MDA40
VREFCA DQL0 VREFDQ DQL1
+MEM_VREF3 H1
VREFDQ DQL1
F7 MDA35
DQL2
F2 MDA46 CMD9 A0 A0
F2 MDA37 CMDA9 N3 F8 MDA41
DQL2 A0 DQL3
CMDA9 N3
A0 DQL3
F8 MDA33 CMDA11 P7
A1 DQL4
H3 MDA47 Group5 CMD10 A4 A4
CMDA11 P7 H3 MDA38 Group4 CMDA8 P3 H8 MDA43
A1 DQL4 A2 DQL5
CMDA8 P3
A2 DQL5
H8 MDA32 CMDA25 N2
A3 DQL6
G2 MDA44 CMD11 A1 A1
CMDA25 N2 G2 MDA36 CMDA10 P8 H7 MDA42
A3 DQL6 A4 DQL7
CMDA10 P8
A4 DQL7
H7 MDA34 CMDA24 P2
A5 CMD12 BA0 BA0
CMDA24 P2 CMDA22 R8
A5 A6
CMDA22 R8
A6
CMDA7 R2
A7 DQU0
D7 MDA53 CMD13 WE* WE*
CMDA7 R2 D7 MDA61 CMDA21 T8 C3 MDA49
A7 DQU0 A8 DQU1
CMDA21 T8
A8 DQU1
C3 MDA59 CMDA6 R3
A9 DQU2
C8 MDA54 CMD14 A15 A15
CMDA6 R3 C8 MDA60 CMDA29 L7 C2 MDA50
A9 DQU2 A10/AP DQU3
CMDA29 L7
A10/AP DQU3
C2 MDA57 CMDA23 R7
A11 DQU4
A7 MDA52 Group6 CMD15 CAS* CAS*
CMDA23 R7 A7 MDA63 Group7 CMDA28 N7 A2 MDA48
A11 DQU4 A12 DQU5
CMDA28 N7
A12 DQU5
A2 MDA56 CMDA20 T3
A13 DQU6
B8 MDA55 CMD16 CS0_H#
CMDA20 T3 B8 MDA62 CMDA4 T7 A3 MDA51
A13 DQU6 A14 DQU7
CMDA4 T7
A14 DQU7
A3 MDA58 CMDA14 M7
A15/BA3 +1.5VSDGPU
CMD17
CMDA14 M7
A15/BA3 +1.5VSDGPU CMD18 ODT_H
CMDA12 M2 B2
BA0 VDD
CMDA12 M2
BA0 VDD
B2 CMDA27 N8
BA1 VDD
D9 CMD19 CKE_H
CMDA27 N8 D9 CMDA26 M3 G7
BA1 VDD BA2 VDD
CMDA26 M3
BA2 VDD
G7
VDD
K2 CMD20 A13 A13
K2 K8
VDD VDD
2
VDD
K8
VDD
N1 CMD21 A8 A8 2
N1 CLKA1 J7 N9
VDD CK VDD
CLKA1 J7
CK VDD
N9 CLKA1# K7
CK VDD
R1 CMD22 A6 A6
CLKA1# K7 R1 CMDA19 K9 R9
CK VDD CKE/CKE0 VDD
CMDA19 K9
CKE/CKE0 VDD
R9
+1.5VSDGPU
+1.5VSDGPU CMD23 A11 A11
CMDA18 K1
ODT/ODT0 VDDQ
A1 CMD24 A5 A5
CMDA18 K1 A1 CMDA16 L2 A8
ODT/ODT0 VDDQ CS/CS0 VDDQ
CMDA16 L2
CS/CS0 VDDQ
A8 CMDA30 J3
RAS VDDQ
C1 CMD25 A3 A3
CMDA30 J3 C1 CMDA15 K3 C9
RAS VDDQ CAS VDDQ
CMDA15 K3
CAS VDDQ
C9 CMDA13 L3
WE VDDQ
D2 CMD26 BA2 BA2
CMDA13 L3 D2 310mAVDDQ E9
WE VDDQ
310mAVDDQ E9
VDDQ
F1 CMD27 BA1 BA1
F1 DQSA5 F3 H2
VDDQ DQSL VDDQ
DQSA4 F3
DQSL VDDQ
H2 DQSA6 C7
DQSU VDDQ
H9 CMD28 A12 A12
DQSA7 C7 H9
DQSU VDDQ
CMD29 A10 A10
DQMA5 E7 A9
DML VSS
DQMA4 E7
DML VSS
A9 DQMA6 D3
DMU VSS
B3 CMD30 RAS* RAS*
DQMA7 D3 B3 E1
DMU VSS E1 VSS G8
VSS VSS Not Available
G8 DQSA#5 G3 J2
DQSA#4 G3 VSS J2 DQSA#6 B7 DQSL VSS J8
DQSA#7 B7 DQSL VSS J8 DQSU VSS M1
LOW HIGH
DQSU VSS M1 VSS M9
VSS M9 VSS P1
VSS P1 CMDA5 T2 VSS P9
VSS RESET VSS Command Bit Default Pull-down
CMDA5 T2 P9 T1
RESET VSS T1 ZQ3 L8 VSS T9 ODTx 10k
ZQ2 L8 VSS T9 ZQ/ZQ0 VSS
ZQ/ZQ0 VSS 10k
1
VGA@ DDR3 CKEx
1
R2101 J1 B1 RST 10k

VGA@ J1 B1 243_0402_1% L1 NC/ODT1 VSSQ B9
3 R2100 L1 NC/ODT1 VSSQ B9 J9 NC/CS1 VSSQ D1 CS* No Termination 3
243_0402_1% J9 NC/CS1 VSSQ D1 L9 NC/CE1 VSSQ D8
2
L9 NC/CE1 VSSQ D8 NCZQ1 VSSQ E2
2
NCZQ1 VSSQ E2 VSSQ E8

VSSQ E8 VSSQ F9
VSSQ F9 VSSQ G1
VSSQ G1 VSSQ G9
VSSQ G9 VSSQ
VSSQ 96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3 H5TQ2G63BFR-11C_FBGA96
H5TQ2G63BFR-11C_FBGA96
+1.5VSDGPU
+1.5VSDGPU
R2089
+1.5VSDGPU R2088 VGA@
VGA@ 1.33K_0402_1%
1.33K_0402_1%
CLKA1
<24> CLKA1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+MEM_VREF3
1
VGA@ C2059
VGA@ C2060
VGA@ C2061
VGA@ C2062
VGA@ C2063
VGA@ C2064
VGA@ C2065
VGA@ C2066
VGA@ C2067
VGA@ C2068
VGA@ C2069
VGA@ C2070
1 1 1 1 1 1 1 1 1 1 1 1 +MEM_VREF2
R2090 1
VGA@ 1 R2097 C2058
160_0402_1% R2096 C2057 VGA@ VGA@
2 2 2 2 2 2 2 2 2 2 2 2 VGA@ VGA@ 1.33K_0402_1% 0.1U_0402_16V4Z
4 4
2
CLKA1# 1.33K_0402_1% 0.1U_0402_16V4Z 2

<24> CLKA1# 2

N15X DDR3 7/7
Custom 0.2
Z5WAW M/B LA-B702
A B C D E
5 4 3 2 1
LVDS Translator ‐ RTD2132R
D D
+3VS_TL
+3VS +3VS_TL U50 LVDS@
LVDS@ 19 TXOUT_CLK+ TXOUT_CLK+ <31>
L63 2 1 DP_V33 TXEC+
30mil 30mil 40mil 3 DP_V33 TXEC-
20 TXOUT_CLK- TXOUT_CLK- <31>
2 LVDS@ 1 HCB2012KF-221T30_0805
R928 0_0603_5% LVDS@ 60mil13 SWR_VDD TXE2+
21 TXOUT2+ TXOUT2+ <31>
+1.2V_TL
Power
L73 2 1 SWR_VDD 18 22 TXOUT2-
LVDS
PVCC TXE2- TXOUT2- <31>
HCB2012KF-221T30_0805
LVDS@ L6 1 2 +1.2V_TL_OUT 60mil12 23 TXOUT1+ TXOUT1+ <31>
4.7UH_PG031B-4R7MS_1.1A_20% 11 SWR_LX TXE1+ 24 TXOUT1-
60mil 27 SWR_VCCK TXE1- TXOUT1- <31>
+1.2V_TL VCCK
7 25 TXOUT0+ TXOUT0+ <31>
DP_V12 TXE0+ 26 TXOUT0-
60mil TXE0- TXOUT0- <31>
Close to Pin3
DP_V33
2
RTD2132S
<31> EDP_AUXP_C_TL AUX_P
10U_0603_6.3V6M
C1016
0.1U_0402_16V4Z
C1015
0.1U_0402_16V4Z
C983
DP-IN
1 14
GPIO
<31> EDP_AUXN_C_TL AUX_N GPIO(PWM OUT) INVTPWM <31>
1 1 1 15
GPIO(Panel_VCC) TL_ENVDD <31>
5 16 TL_PWM_IN R934 1 LVDS@ 2 0_0402_5%
<31> EDP_TXP0_C_TL LANE0P GPIO(PWM IN) PCH_INV_PWM <15,31>
6 17
<31> EDP_TXN0_C_TL LANE0N GPIO(BL_EN) TL_BKOFF# <31>
LVDS@
LVDS@
LVDS@
2 2 2
CSCL 9
CIICSCL1 LVDS MIICSCL1
29 I2CC_SCL I2CC_SCL <31>
CSDA 10 28 I2CC_SDA
C CIICSDA1 EDID MIICDA1 I2CC_SDA <31>
Other
TL_PWM_IN C
1
<31,7> EDP_HPD 1 2 TL_HPD 32
HPD ROM MIICSCL0
31 MODE_CFG1
30 MODE_CFG0 R160
R936 8 MIICSDA0 100K_0402_5%
1K_0402_5% 4 DP_REXT 33 LVDS@
DP_GND GND
2
Close to L64 Close to Pin13 Close to P18 LVDS@
2
LVDS@
SWR_VDD R938 RTD2132N-CG_QFN32_5X5
12K_0402_1% Part Number = SA00007A300
10U_0603_6.3V6M
C984
0.1U_0402_16V4Z
C1020
0.1U_0402_16V4Z
C1019
0.1U_0402_16V4Z
C1018
1
22U_0603_6.3V6M
1 1 1 1 1
use 2132S symbol
C986
@
LVDS@
LVDS@
LVDS@
LVDS@
2 2 2 2 2 LVDS@ +3VS_TL
RP41
+3VS_TL I2CC_SCL 1 8
I2CC_SDA 2 7
CSCL 3 6
CSDA 4 5
2
@ 4.7K_8P4R_5%
R943 R944
Close to L6 Close to Pin27 Close to Pin7
4.7K_0402_5% 4.7K_0402_5%
+1.2V_TL LVDS@ +3VS_TL
10U_0603_6.3V6M
C1014
1
0.1U_0402_16V4Z
C1022
0.1U_0402_16V4Z
C1017
0.1U_0402_16V4Z
C1021
1
1 1 1 MODE_CFG0
MODE_CFG1
LVDS@
2
2
LVDS@
LVDS@
LVDS@
@
2 2 2 R945 R946 @
2
B 4.7K_0402_5% 4.7K_0402_5% Q53A B
LVDS@
CSDA 1 6
EC_SMB_DA2 <17,23,39>
1
DMN66D0LDW-7_SOT363-6 @
5
Q53B
CSCL 4 3
MODE_CFG0(PIN30) EC_SMB_CK2 <17,23,39>
DMN66D0LDW-7_SOT363-6
0 1 DVT modify 11/18
LVDS EP mode SMbus on SMbus3
0 X EP MODE
MODE_CFG1(PIN31)
1 ROM ONLY MODE* EEPROM MODE
A A

LVDS Translator - RTD2132R
WWW.AliSaler.Com
Custom 0.2
Z5WAW M/B LA-B702
5 4 3 2 1
A B C D E
EDP / LVDS conn.
Place closed to JLVDS1
+LCDVDD
+3VS
LCD POWER CIRCUIT
1 1
+INVPWR_B+ B+ C375 C419
+3VS +LCDVDD @
U10
W=60mils 0.1U_0402_16V4Z 0.1U_0402_16V4Z
1
1
W=60mils L11
W=60mils 2 2 1
5 OUT HCB2012KF-221T30_0805
IN 2 1
1 1
2 C368 XEMC@ EMC@
GND
1U_0402_6.3V6K
C150
1000P_0402_50V7K
C364
4 0.1U_0402_16V4Z 1 1 XEMC@
IN @ C365
1 SM01000EJ00 3000ma
3 C367 2 2 68P_0402_50V8J
EN 4.7U_0603_6.3V6K
220ohm@100mhz
G5243T11U_SOT23-5 2 2 DCR 0.04
2
LCD/ LED PANEL Conn.
R947 1 EDP@ 2 0_0402_5%
<15> PCH_ENVDD
R959
0_0402_5%
<30> TL_ENVDD
1 @ 2
W=60mils JLVDS1
+INVPWR_B+ 1
2 1 41
DVT modify 12/09 3 2 G1 42
U20 change to SA00000OH00 4 3 G2 43
@ +3VS +3VS 5 4 G3 44
M74VHC1GT125DF2G_SC70-5 +3VS INVTPWM 6 5 G4 45
1 @ 2 1 5 XEMC@ DISPOFF# 7 6 G5 46
OE Vcc 7 G6
5
R362 U22 LVDS@ INVTPWM C549 1 2 220P_0402_50V7K <30,7> EDP_HPD EDP_HPD 8
100K_0402_5% R401 BKOFF# 2 XEMC@ 9 8
P
<39> BKOFF# B +LCDVDD 9
2 1K_0402_5% 4 DISPOFF# C528 1 2 220P_0402_50V7K 10
IN A TL_BKOFF# 1 Y TS_EN 11 10
@ <30> TL_BKOFF# A <39> TS_EN 11
G
TXOUT_CLK+ 12
<30> TXOUT_CLK+
2
12
2
3 4 INVTPWM MC74VHC1G08DFT2G_SC70-5 TXOUT_CLK- 13
<30> TXOUT_CLK-
3
GND OUT Y R951 TXOUT2+ 14 13
<30> TXOUT2+ 14
100K_0402_5% TXOUT2- 15
2 <30> TXOUT2- 15 2
LVDS@ 16
R363 1 EDP@2 0_0402_5% R949 1 EDP@2 0_0402_5% TXOUT1+ 17 16
<15,30> PCH_INV_PWM <30> TXOUT1+
1
TXOUT1- 18 17
<30> TXOUT1- 18
1
R280 1 @ 2 10K_0402_5% TXOUT0+ 19

<30> TXOUT0+ 19
R393 TXOUT0- 20
<30> TXOUT0- 20
100K_0402_5% I2CC_SDA 21
<30> INVTPWM <30> I2CC_SDA 21
LVDS@ I2CC_SCL 22
<30> I2CC_SCL 22
+3VS 23
2
24 23
EDP_AUXN_C 25 24
EDP_AUXP_C 26 25
27 26
EDP_TXP0_C 28 27
EDP_TXN0_C 29 28
30 29
EDP_TXP1_C 31 30
EDP_TXN1_C 32 31
33 32
34 33
TS_Power 34
USB20_P4 35
<18> USB20_P4 35
For Touch Screen USB20_N4 36
<18> USB20_N4 36
+3VS 37
USB20_P7_CAMERA 38 37
USB20_N7_CAMERA 39 38
For Camera 39
40
40
E-T_0871K-F40N-00L
CONN@
SP010011Z00
3 3
eDP Camera
Touch Screen
C372 1 2 EDP@ 0.1U_0402_16V7K EDP_TXN0_C
<7> EDP_TXN0
C371 1 2 EDP@ 0.1U_0402_16V7K EDP_TXP0_C R427 1 @ 2 0_0402_5%
<7> EDP_TXP0
C377 1 2 LVDS@0.1U_0402_16V7K EDP_TXN0_C_TL EDP_TXN0_C_TL <30> R428 1 @ 2 0_0402_5%
C376 1 2 LVDS@0.1U_0402_16V7K EDP_TXP0_C_TL EDP_TXP0_C_TL <30>
USB20_P7 3 4 USB20_P7_CAMERA
<18> USB20_P7 3 4
C374 1 2 0.1U_0402_16V7K EDP_TXN1_C +3VS
<7> EDP_TXN1
C373 1 2 0.1U_0402_16V7K EDP_TXP1_C USB20_N7 2 1 USB20_N7_CAMERA
<7> EDP_TXP1 <18> USB20_N7 2 1
TS_Power L27 XEMC@
+3VS DLW21HN900HQ2L_4P
EDP@
<7> EDP_AUXN C369 1 2 0.1U_0402_16V7K EDP_AUXN_C R613 2 @ 1 100K_0402_5% +5VS R82 1 TS@ 2 0_0603_5% JCAM1
<7> EDP_AUXP C370 1 2 0.1U_0402_16V7K EDP_AUXP_C R614 2 @ 1 100K_0402_5% 1
EDP@ R85 1 @ 2 0_0603_5% USB20_P7_EXCA 2 1
+3VS 2
C388 1 2 LVDS@0.1U_0402_16V7K EDP_AUXN_C_TL <30> R444 1 @ 2 0_0402_5% USB20_N7_EXCA 3 5
C389 1 2 LVDS@0.1U_0402_16V7K R442 1 @ 2 0_0402_5% 4 3 G1 6
EDP_AUXP_C_TL <30> 4 G2
USB20_N7 3 4 USB20_N7_EXCA ACES_88266-04001
3 4 CONN@
USB20_P7 2 1 USB20_P7_EXCA
SP02000K200
2 1
L28 XEMC@
4 DLW21HN900HQ2L_4P 4
NEAR EDP CONNECTOR

eDP Connector
Custom 0.2
Z5WAW M/B LA-B702
A B C D E
A B C D E
HDMI conn.
1 1
RP16
2.2K_0804_8P4R_5%
1 8 HDMI_SCLK
+HDMI_5V_OUT 2 7 HDMI_SDATA
3 6 HDMICLK_NB
4 5 HDMIDAT_NB
+3VS
HDMI connector
JHDMI1
+3VS HDMI_HPD 19
18 HP_DET
+HDMI_5V_OUT +5V
17
+HDMI_5V_OUT Q15A HDMI_SDATA 16 DDC/CEC_GND
SDA
2
+5VS U3 DMN66D0LDW-7_SOT363-6 HDMI_SCLK 15
14 SCL
3
W=40mils 1 6 HDMI_SCLK 13 Reserved
OUT <15> HDMICLK_NB CEC
1 HDMI_R_CK- 12
1 4 3 HDMI_SDATA 11 CK-
2 IN <15> HDMIDAT_NB CK_shield 2
1 1 C378 Q15B HDMI_R_CK+ 10
2 0.1U_0402_16V4Z DMN66D0LDW-7_SOT363-6 HDMI_R_D0- 9 CK+
C398 C396 GND 2 EMC@ 8 D0-
5
0.1U_0402_16V4Z 0.1U_0402_16V4Z HDMI_R_D0+ 7 D0_shield
2 2 +3VS D0+
EMC@ EMC@ AP2330W-7_SC59-3 Place closed to JHDMI1 HDMI_R_D1- 6
5 D1-
HDMI_R_D1+ 4 D1_shield 20
HDMI_R_D2- 3 D1+ GND 21
2 D2- GND 22
HDMI_R_D2+ 1 D2_shield GND 23
D2+ GND
SUYIN_100042GR019M23MZR
CONN@
DC232001I00
+3VS HDMI_CLK- R368 1 XEMC@ 2 0_0402_5% HDMI_R_CK-
+3VS HDMI_CLK+ R369 1 XEMC@ 2 0_0402_5% HDMI_R_CK+

1
R376
1M_0402_5% Q14A
2
DMN66D0LDW-7_SOT363-6 HDMI_TX0- R370 1 XEMC@ 2 0_0402_5% HDMI_R_D0-

RP20
2
<15> TMDS_B_HPD# TMDS_B_HPD# 1 6 HDMI_HPD HDMI_TX0+ R371 1 XEMC@ 2 0_0402_5% HDMI_R_D0+ 470_8P4R_5%
HDMI_TX0+ 4 5
<7> HDMI_TX0+
1
1 HDMI_TX0- 3 6
<7> HDMI_TX0-
R124 HDMI_TX2+ 2 7
<7> HDMI_TX2+
20K_0402_1% C387 HDMI_TX1- R372 1 XEMC@ 2 0_0402_5% HDMI_R_D1- HDMI_TX2- 1 8
<7> HDMI_TX2-
220P_0402_50V7K
HDMI_GND
2 EMC@ HDMI_TX1+ R373 1 XEMC@ 2 0_0402_5% HDMI_R_D1+ HDMI_TX1+ 4 5
<7> HDMI_TX1+
2
HDMI_TX1- 3 6
<7> HDMI_TX1-
3 HDMI_CLK+ 2 7 3
<7> HDMI_CLK+
HDMI_CLK- 1 8
<7> HDMI_CLK-
HDMI_TX2- R374 1 XEMC@ 2 0_0402_5% HDMI_R_D2-
RP21
HDMI_TX2+ R375 1 XEMC@ 2 0_0402_5% HDMI_R_D2+ 470_8P4R_5%
3
Q14B
+3VS 5
4
ZZZ1
HDMI_ROYALTY
ROYALTY HDMI W/LOGO+HDCP
RO0000003HM
45@
4 4

HDMI Conn
WWW.AliSaler.Com
Custom 0.2
Z5WAW M/B LA-B702
A B C D E
A B C D E
CRT conn.
W=40mils
+HDMI_5V_OUT
1 CRB1.0 use 47ohm@100Mhz Bead 1
DVT modify 11/12

chang PN to SM01000FH00
CRT Connector
L2503 EMC@
BLM15BB470SN1D_2P
PCH_CRT_R 1 2 CRT_R_2 JCRT1
<15> PCH_CRT_R
L2505 EMC@ 6
BLM15BB470SN1D_2P T99 @ 11
PCH_CRT_G 1 2 CRT_G_2 1
<15> PCH_CRT_G
L2504 EMC@ 7
BLM15BB470SN1D_2P 12
PCH_CRT_B 1 2 CRT_B_2 2
<15> PCH_CRT_B
8
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
13
RP26 1 1 1 1 1 1 3
8 1 PCH_CRT_B 9
C2529
C2530
C2531
C2532
C2533
C2534
7 2 PCH_CRT_G 14
6 3 PCH_CRT_R T109 @ 4
5 4 2 2 2 2 2 2 10 16
G
15 G 17
150_0804_8P4R_1% 5
CCM_070546HR015M25FZR
CONN@
R2524
+HDMI_5V_OUT 1 @ 2 0_0603_5% CRT_HSYNC_2 DC060005810
U2502 @
1 5 0.1U_0402_16V4Z 2 1 C2535 R2525 CRT_CLK
R2526 OE Vcc 1 @ 2 0_0603_5% CRT_VSYNC_2 CRT_DATA
0_0402_5% 1 1
2 @ 1 CRT_HSYNC 2 @ @
2 <15> PCH_CRT_HSYNC IN A PVT modify 12/23 2
C2536 C2537
form +5VS_6513 change to +HDMI_5V_OUT 10P_0402_50V8J 10P_0402_50V8J
3 4 CRT_HSYNC_1 2 2
GND OUT Y
M74VHC1GT125DF2G_SC70-5
R2528 +HDMI_5V_OUT +HDMI_5V_OUT

0_0402_5% U2503
2 @ 1 1 5
OE Vcc +3VS
1
2 @ 1 CRT_VSYNC 2 R2513 R2512
<15> PCH_CRT_VSYNC IN A
R2529 2.2K_0402_5% 2.2K_0402_5%
0_0402_5%
3 4 CRT_VSYNC_1
2
GND OUT Y
2
1 6 CRT_DATA
M74VHC1GT125DF2G_SC70-5 PCH_CRT_DATA
<15> PCH_CRT_DATA
Q2503A
5
<15> PCH_CRT_CLK PCH_CRT_CLK 4 3 CRT_CLK
Q2503B
3 3
4 4

CRT Connector
Custom 0.2
Z5WAW M/B LA-B702
A B C D E
5 4 3 2 1
LAN‐RTL8411B
+3VALW +3V_LAN
R2551
0_0603_5%
2 @ 1
W=60mil W=60mil +LAN_VDD +3V_LAN
IDC=1200mA W=60mil
60mil U2504
60mil L2506
300mA 1.4A
D D
1 +REGOUT 1 2
5 OUT 2.2UH_NLC252018T-2R2J-N_5%
IN
4.7U_0603_6.3V6K
C2538
0.1U_0402_16V7K
C2539
0.1U_0402_16V7K
C2540
0.1U_0402_16V7K
C2541
0.1U_0402_16V7K
C2542
0.1U_0402_16V7K
C2543
0.1U_0402_16V7K
C2544
1U_0402_6.3V6K
C2545
0.1U_0402_16V7K
C2546
4.7U_0603_6.3V6K
C2547
0.1U_0402_16V7K
C2548
0.1U_0402_16V7K
C2549
0.1U_0402_16V7K
C2550
2 1 1 1 1 1 1 1 1 1 1 1 1 1
4 GND
IN
2
3 LAN_PWR_EN LAN_PWR_EN <39>
C2551 EN 2 2 2 2 2 2 2 2 2 2 2 2 2
1U_0402_6.3V6K G5243T11U_SOT23-5
1
Part Number = SA000028Y10
Using for Switch mode
Place near Pin 3,8,33,46 Place near Pin 20 Using for Switch mode Place near Pin 11,32,48
The trace length from Lx to
From EC PIN48 (REGOUT) and from C to Lx The trace length
must < 200mils. from C to
High active.
PIN46,47(VDDREG)
EN threshold voltage min:1.2V typ:1.6V max:2.0V
must < 200mils.
Current limit threshold 1.5~2.8A
+3V_LAN Rising time must >0.5ms and <100ms
reserve EC_PME# pull high 100K to +3VALW_EC

U2505
<14> PCIE_WAKE# R2532 1 @ 2 0_0402_5% Power Manahement/Isolation
ISOLATEB 31
R2533 2 @ 1 0_0402_5% LAN_PME# 39 ISOLATEBPIN
<39> EC_PME# LANWAKEB Card Reader
DVT modify 12/04 R2550 1 2 10K_0402_5% 15 SD_D0 R2534 1 @ 2 0_0402_5% SD_D0_R
+3V_LAN SD_D0/MS_D1 SD_D0_R <35>
for WOL pull high to +3V_LAN PCI-Express 14 SD_D1 R2537 1 @ 2 0_0402_5% SD_D1_R
C SD_D1 SD_D1_R <35> C
<16> CLK_PCIE_LAN CLK_PCIE_LAN 23 16 SD_CLK R2538 1 2 10_0402_5% SD_CLK_R SD_CLK_R <35>
CLK_PCIE_LAN# 24 REFCLK_P SD_CLK/MS_D0 17 SD_CMDR2539 1 @ 2 0_0402_5% SD_CMD_R
<16> CLK_PCIE_LAN# REFCLK_N SD_CMD/MS_D2 SD_CMD_R <35>
18 SD_D3 R2535 1 @ 2 0_0402_5% SD_D3_R
SD_D3/MS_D3 SD_D3_R <35> 2
PLT_RST# 30 19 SD_D2 R2536 1 @ 2 0_0402_5% SD_D2_R
<15,23,36,39,42> PLT_RST# PERSTBPIN SD_D2/MS_CLK SD_D2_R <35>
CLKREQ_LAN# 29 28 SD_WP C2554
PU at PCH side <16> CLKREQ_LAN# CLKREQBPIN MS_BS/SD_WP# SD_WP <35>
5P_0402_50V8C
C2552 1 2 0.1U_0402_16V7K PCIE_PRX_C_DTX_P3 25 1
C2552, C2553 <18> PCIE_PRX_DTX_P3
C2553 1 2 0.1U_0402_16V7K PCIE_PRX_C_DTX_N3 26 HSOP XEMC@
Place near Pin 25,26 <18> PCIE_PRX_DTX_N3 HSON
<18> PCIE_PTX_C_DRX_P3 21 42 SD_CD# close to pin17
HSIP SD_CD# SD_CD# <35>
<18> PCIE_PTX_C_DRX_N3 22 43
HSIN MS_CD#
Transceiver Interface
LAN_MIDI0+ 1
<35> LAN_MIDI0+ MDIP0
LAN_MIDI0- 2
<35> LAN_MIDI0- MDIN0
LAN_MIDI1+ 4
<35> LAN_MIDI1+ MDIP1 +3V_LAN
LAN_MIDI1- 5 48
<35> LAN_MIDI1- MDIN1 HV_GIGA
LAN_MIDI2+ 6 11
<35> LAN_MIDI2+ MDIP2 HV_GIGA
LAN_MIDI2- 7 12 1400mA
<35> LAN_MIDI2- MDIN2 VDD33
LAN_MIDI3+ 9 32
<35> LAN_MIDI3+ MDIP3 VDD33
LAN_MIDI3- 10
+3V_LAN <35> LAN_MIDI3- MDIN3
1
XTLI 44 33 +LAN_VDD
R2541 XTLO_R 45 CKXTAL1 Clock VDD10 3
CKXTAL2 AVDD10 8
10K_0402_5% AVDD10
300mA
@
GPO Regulator and Reference
2
+REGOUT 36 20
35 REG_OUT VDDTX
+3V_LAN VDDREG
SWR mode 34 800mA
XTLI 46 ENSWREG 13
+LAN_VDD LV_GEN Card_3V3 +CARD_3V3 Protect cotact Card contact
XTLO_R 2 1 R2542 LAN_RST 47
B 2.49K_0402_1% RSET 27 +VDD33_18 B
DV33/18 Write protect Write Enable
1
0.1U_0402_16V7K
C2555
4.7U_0603_6.3V6K
C2556
0.1U_0402_16V7K
C2557
41
R2540 1 @ 2GPO 38 LED0
1 1 1
(Lock) (Unlock)
<39> LAN_GPO LED1/GPO
Y2500 R51 0_0402_5% 37 LEDs
25MHZ 10PF X3G025000DA1H-X 1K_0402_1% 40 LED2 Card Uninsert Open Open Open
LED_CR 49 @
Card insert Open Close Close
2
E_Pad 2 2 2
1 3 XTLO
1 3
GND GND
1 1
2 4
Place near Pin 27
C2558 C2599
15P_0402_50V8J 15P_0402_50V8J RTL8411B-CGT_QFN48_6X6
2 2
+3VS
1
R2543
1K_0402_5%
2
ISOLATEB
1
R2544
A 15K_0402_1% A
2

LAN RTL8411-CG
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
RJ45 / Card Reader conn.
T2500
LAN_TERMAL1 24 JRJ1
D TCT1 MCT1 D
<34> LAN_MIDI3- LAN_MIDI3- 2 23 RJ45_MIDI3-
LAN_MIDI3+ 3 TD1+ MX1+ 22 RJ45_MIDI3+
<34> LAN_MIDI3+ TD1- MX1-
4 21
LAN_MIDI2- 5 TCT2 MCT2 20 RJ45_MIDI2- RJ45_MIDI0+ 1 9
<34> LAN_MIDI2- TD2+ MX2+ PR1+ SHLD1
<34> LAN_MIDI2+ LAN_MIDI2+ 6 19 RJ45_MIDI2+ 10
TD2- MX2- RJ45_MIDI0- 2 SHLD2
7 18 PR1-
LAN_MIDI1- 8 TCT3 MCT3 17 RJ45_MIDI1- RJ45_MIDI1+ 3
<34> LAN_MIDI1- TD3+ MX3+ PR2+
<34> LAN_MIDI1+ LAN_MIDI1+ 9 16 RJ45_MIDI1+
TD3- MX3- RJ45_MIDI2+ 4
10 15 PR3+ JP2501XEMC@
LAN_MIDI0- 11 TCT4 MCT4 14 RJ45_MIDI0- RJ45_MIDI2- 5 B88069X9231T203_4P5X3P2-2
<34> LAN_MIDI0- TD4+ MX4+ PR3-
<34> LAN_MIDI0+ LAN_MIDI0+ 12 13 RJ45_MIDI0+ 2 1
TD4- MX4- RJ45_MIDI1- 6
PR2- 40mil
75_0402_1%
75_0402_1%
75_0402_1%
75_0402_1%
RJ45_MIDI3+ 7 RJ45_GND 1 2 LANGND
PR4+
1
GST5009-E C2560
SP050006B10 RJ45_MIDI3- 8 40mil 10P_0402_50V8J
PR4-
R2545
R2546
R2547
R2548
1
LANGND
1
C2561 @
2
0.1U_0402_16V7K JUMP_43X118
2 J15 JP2500
Place close to TCT pin XEMC@
SANTA_130452-0B D1 B88069X9231T203_4P5X3P2-2
2
EMC@
RJ45_GND CONN@
MESC5V02BD03 3P C/A SOT23
1
DC234005310
C C
Card Reader Connector
JREAD1
<34> SD_D3_R SD_D3_R 1
CD/DAT3
+CARD_3V3 <34> SD_CMD_R SD_CMD_R 2
CMD
B 3 B
VSS1
Close to Card Reader CONN 4
VDD
4.7U_0603_6.3V6K
C2564
0.1U_0402_16V7K
C2565
<34> SD_CLK_R SD_CLK_R 5
CLK
1 1
6
VSS2
<34> SD_D0_R SD_D0_R 7
2 2 DAT0
<34> SD_D1_R SD_D1_R 8 12

DAT1 G1
<34> SD_D2_R SD_D2_R 9 13
DAT2 G2
SD_CD# 10 14
<34> SD_CD# CD G3
SD_WP 11 15
<34> SD_WP WP G4
TAITW_PSDAT4-11GLBS1NN4H2
CONN@
SP07000ZC00
A A

LAN RJ45/CR SD Connector
5 4 3 2 1
A B C D E
Wireless LAN
+1.5VS J13 +1.5VS_WLAN

JUMP_43X39 +3VS_WLAN
1 2
Mini Card Power Rating
1 2 +3VS_WLAN
1 +1.5VS_WLAN 1
@ 1@
C463 R429 1 2 4.7K_0402_5%
0.1U_0402_16V4Z JMINI1
WLAN_PME# 1 2
2 <39> WLAN_PME# WAKE# 3.3V
R423 3 4
0_0402_5% 5 NC GND 6
1 @ 2 7 NC 1.5V 8
<16> CLKREQ_WLAN# CLKREQ# NC
9 10
11 GND NC 12
<16> CLK_PCIE_WLAN# REFCLK- NC
13 14
<16> CLK_PCIE_WLAN REFCLK+ NC
60mil 15 16
+3VS +3VS_WLAN 17 GND NC 18
@J7
@ J7 19 NC GND 20 WL_OFF#
NC NC WL_OFF# <39>
1 2 21 22 PLT_RST#
GND PERST# PLT_RST# <15,23,34,39,42>
1 1 1 <18> PCIE_PRX_DTX_N4 23 24
JUMP_43X118 C458 C459 C460 25 PERn0 +3.3Vaux 26
<18> PCIE_PRX_DTX_P4 PERp0 GND
@ 0.1U_0402_16V4Z 27 28
4.7U_0603_6.3V6K 0.1U_0402_16V4Z 29 GND +1.5V 30 MINI1_SMBCLK R432 1 @ 2 0_0402_5%
2 2 2 GND SMB_CLK SMB_CLK_S3 <11,12,17,42>
31 32 MINI1_SMBDATA R434 1 @ 2 0_0402_5% SMB_DATA_S3 <11,12,17,42>
<18> PCIE_PTX_C_DRX_N4 PETn0 SMB_DATA
33 34
<18> PCIE_PTX_C_DRX_P4 PETp0 GND
35 36
GND USB_D- USB20_N6 <18>
37 38
NC USB_D+ USB20_P6 <18>
39 40
41 NC GND 42
+3VS_WLAN NC LED_WWAN#
43 44
+3VS_WLAN R435 45 NC LED_WLAN# 46
+3VALW 0_0402_5% 47 NC LED_WPAN# 48
U9 1 @ 2 E51TXD_P80DATA_R 49 NC +1.5V 50
1
W=60mils <39> E51TXD_P80DATA
1 @ 2 E51RXD_P80CLK_R 51 NC GND 52
OUT <39> E51RXD_P80CLK NC +3.3V
5
IN
1
R436 53 54
GND
2 BT_ON# used RX to work 0_0402_5% GND GND
1U_0402_6.3V6K
C168
4 R437
2 IN 100K_0402_5% ACES_50709-0524W-P01 2
1
3 CONN@
2
@ EN
G5243T11U_SOT23-5
2 @
DC04000C400
<39> WLAN_ON
3 3
4 4

MINI CARD (WLAN)
WWW.AliSaler.Com
Custom 0.2
Z5WAW M/B LA-B702
A B C D E
A B C D E
SATA HDD1 Conn. SATA ODD Conn.
JHDD1
1 1
JODD1
1
SATA_PTX_DRX_P4 C392 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P4 2 GND 1
<13> SATA_PTX_DRX_P4 A+ GND
<13> SATA_PTX_DRX_N4 SATA_PTX_DRX_N4 C393 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N4 3 <13> SATA_PTX_DRX_P2 C401 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P2 2
4 A- C402 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N2 3 A+
GND <13> SATA_PTX_DRX_N2 A-
SATA_PRX_DTX_N4 C391 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N4 5 4
<13> SATA_PRX_DTX_N4 B- GND
SATA_PRX_DTX_P4 C394 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P4 6 C403 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N2 5
<13> SATA_PRX_DTX_P4 B+ <13> SATA_PRX_DTX_N2 B-
7 C405 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P2 6
GND <13> SATA_PRX_DTX_P2 B+
7
GND
8
+3VS V33
9 80mils 8
10 V33 R593 1 @ 2 0_0805_5% +5VS_ODD 9 DP
V33 +5VS +5V
10U_0603_6.3V6M
C404
0.1U_0402_16V4Z
C407
11 1 10
GND +5V
1
12 ODD_MD 11
13 GND 12 MD 14
R50 1 @ 2 0_0805_5% +5VS_HDD 14 GND T185 @ 13 GND GND 15
+5VS
2
15 V5 2 GND GND
16 V5
17 V5 SANTA_201902-1
18 GND CONN@
19 Reserved 23
+3VS +5VS 20 GND GND 24
21 V12 GND 25 SP01001RS00
22 V12 GND 26
100mils V12 GND
10U_0603_6.3V6M
C420
0.1U_0402_16V4Z
C397
1 1 CCM_C127043HR022M27FZR
1
0.1U_0402_16V4Z
C390
@ CONN@
DC010009X00
2
2 2
2 2
3 3
4 4

HDD/ODD
A B C D E
A B C D E
USB3.0 (Port 0)
DVT modify 11/15
change to SM070003K00
For ESD request +5VALW +USB3_VCCA
L24 EMC@ D15 XEMC@ C483 EMC@ U25

W=60mils
<18> PCH_USB3_TX0_P 2 1 PCH_USB3_TX0_P_C 2 1 U3TXDP0 U3RXDN0 1 1 109 U3RXDN0 0.1U_0402_16V4Z 1 8
C484 0.1U_0402_16V7K 2 1 1 2 2 GND OUT 7 R454
U3RXDP0 2 2 98 U3RXDP0 3 IN OUT 6 0_0402_5%
1 IN OUT 1
<18> PCH_USB3_TX0_N 2 1 PCH_USB3_TX0_N_C 3 4 U3TXDN0 <39> USB_EN# USB_EN# 4 5 1 @ 2
3 4 EN/ENB OCB USB_OC0# <18>
C482 0.1U_0402_16V7K U3TXDN0 4 4 77 U3TXDN0
CMMI21T-900Y-N_4P SY6288D10CAC_MSOP8 1
U3TXDP0 5 5 66 U3TXDP0 C612
0.1U_0402_16V4Z
3 3 @
L25 EMC@ 2
PCH_USB3_RX0_P 2 1 U3RXDP0 8
<18> PCH_USB3_RX0_P 2 1
L05ESDL5V0NA-4 SLP2510P8
PCH_USB3_RX0_N 3 4 U3RXDN0
<18> PCH_USB3_RX0_N 3 4
CMMI21T-900Y-N_4P
SF000006R00
+USB3_VCCA 220U 6.3V OSCON
R458 1 @ 2 0_0402_5%
R461 1 @ 2 0_0402_5%
ESR 17mohm@100Khz
W=100mils
USB20_N0 3 4 U2DN0_L
<18> USB20_N0 3 4
C486
1
+
1
C487
EMC@
USB3.0 Conn.
USB20_P0 2 1 U2DP0_L 0.1U_0402_16V4Z
<18> USB20_P0 2 1 2
220U_6.3V_M
L26 XEMC@ 2
DLW21HN900HQ2L_4P
JUSB1
1
U2DN0_L 2 VBUS
U2DP0_L 3 D-
4 D+
U3RXDN0 5 GND
2 U3RXDP0 6 StdA-SSRX- 10 2
7 StdA-SSRX+ GND 11
U3TXDN0 8 GND-DRAIN GND 12
U3TXDP0 9 StdA-SSTX- GND 13
StdA-SSTX+ GND
ACON_TARAC-9V1391
CONN@
DC23300AG00
PWR/B Finger Print /B for BA50 USB/B (USB Port 1, Port2)
USB/B Conn.
W=100mils
3 +3VS +5VALW 3
JFP1 JUSB2
JPWR1 4 6 1
1 USB20_P3 3 4 G2 5 2 1
1 +3VALW <18> USB20_P3 3 G1 2
2 +3VLP USB20_N3 2 3
2 <18> USB20_N3 2 3
3 LID_SW# LID_SW# <39> 1 4
3 4 PWR_LED# DVT modify 11/12 1 USB_EN# 5 4
4 PWR_LED# <40> 5
2
7 5 ON/OFFBTN# Port 5 change to Port 7 ACES_50504-0040N-001 6

G1 5 ON/OFFBTN# <39,40> 6
8 6 CONN@ USB20_N1 7
G2 6 <18> USB20_N1 7
SP01000Z300 USB20_P1 8
<18> USB20_P1 8
ACES_51524-0060N-001 9
CONN@ D38 USB20_N2 10 9
<18> USB20_N2 10
YSLC05CH_SOT23-3 USB20_P2 11
<18> USB20_P2 11
XEMC@ 12
13 12
SP010014M10 14 13
1
14
ACES_88514-01201-071
CONN@
SP01001BF00
4 4

USB3.0 Conn/USB_B/PWR_B
WWW.AliSaler.Com
A B C D E
A B C D E
C501 XEMC@ R477 +3VLP +3VALW_EC DVT modify 11/12 L31 SM010030010 200ma 120ohm@100mhz DCR 0.2 LID_SW# R476 1 2 100K_0402_5% +3VALW_EC
22P_0402_50V8J 33_0402_5% R236 change to SM010009U00 BLM15BD121SN1D_2P
2 1 2 XEMC@ 1 CLK_PCI_EC 1 2 1 2 +EC_VCCA +EC_VCCA
XEMC@ XEMC@ 1
0_0805_5% 1 1 1 1 2 2
0326 PU +TP_VCC at TP side
0.1U_0402_16V4Z
C502
0.1U_0402_16V4Z
C503
0.1U_0402_16V4Z
C504
0.1U_0402_16V4Z
C505
1000P_0402_50V7K
C506
1000P_0402_50V7K
C507
@ @ C508
0.1U_0402_16V4Z TP_CLK R485 1 @ 2 4.7K_0402_5% +3VS
2
ECAGND
+3VALW_EC TP_DATA R483 1 @ 2 4.7K_0402_5%
R480 2 9012@ 1 47K_0402_5% EC_RST# 2 2 2 2 1 1
EC_MUTE# R481 1 @ 2 10K_0402_5% +3VS
C509 2 1 0.1U_0402_16V4Z
ECAGND <45>
111
125
9012@
22
33
96
67
U28
9
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
EC_VDD0
GPU_ALERT R486 1 2 10K_0402_5% +3VS
1 1
9022: ECRST# is internally pull‐up to VCC via 40Kohm resistor,
GATEA20 1 21 KBL_EN#
so can remove external pull‐up resistor and capacitor. <19> GATEA20
KBRST# 2 GATEA20/GPIO00 GPIO0F 23 BEEP#
KBL_EN# <40>
GPU_OVERT R487 1 2 10K_0402_5%
<19> KBRST# KBRST#/GPIO01 BEEP#/GPIO10 BEEP# <41> +3VS
SERIRQ 3 26 USB_EN#
<17,42> SERIRQ LPC_FRAME# 4 SERIRQ GPIO12 27 WLAN_PME# USB_EN# <38>
<17,42> LPC_FRAME# LPC_FRAME# ACOFF/GPIO13 WLAN_PME# <36>
LPC_AD3 5
<17,42> LPC_AD3 LPC_AD3
LPC_AD2 7 PWM Output C510 2 1 100P_0402_50V8J ECAGND 9012_PECI R498 1 2 43_0402_5%
<17,42> LPC_AD2 LPC_AD2 H_PECI <5>
LPC_AD1 8 63 BATT_TEMP
+3VALW_EC <17,42> LPC_AD1 LPC_AD1 BATT_TEMP/GPIO38 BATT_TEMP <44,45>
LPC_AD0 10 LPC & MISC 64 VCIN1_BATT_DROP
<17,42> LPC_AD0 LPC_AD0 GPIO39 VCIN1_BATT_DROP <45>
65 ADP_I
ADP_I/GPIO3A ADP_I <45,46>
CLK_PCI_EC 12 AD Input 66 AD_BID0
<16> CLK_PCI_EC CLK_PCI_EC GPIO3B
R484 1 @ 2 100K_0402_5% EC_PME# PLT_RST# 13 75 R509
<15,23,34,36,42> PLT_RST# PCIRST#/GPIO05 GPIO42
EC_RST# 37 76 0_0402_5%
EC_SMI#_SCI# 20 EC_RST# IMON/GPIO43 1 @ 2
+3VALW_EC <15,19> EC_SMI#_SCI# EC_SCII#/GPIO0E ACIN <14,44,46>
WLAN_ON 38
<36> WLAN_ON GPIO1D
RP22 68
1 8 EC_SMB_CK1 DAC_BRIG/GPIO3C 70 EN_DFAN1 EC_ACIN C512 2 1 100P_0402_50V8J
EN_DFAN1/GPIO3D EN_DFAN1 <42>
2 7 EC_SMB_DA1 DA Output 71 TP_PWR_EN
IREF/GPIO3E TP_PWR_EN <40>
3 6 EC_SMB_CK2 KSI0 55 72 TP_SENOFF#
KSI0/GPIO30 CHGVADJ/GPIO3F TP_SENOFF# <40>
+3VS 4 5 EC_SMB_DA2 KSI1 56
KSI2 57 KSI1/GPIO31
2.2K_0804_8P4R_5% KSI3 58 KSI2/GPIO32 83 EC_MUTE#
KSI4 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 LAN_PWR_EN EC_MUTE# <41>
KSI4/GPIO34 USB_EN#/GPIO4B LAN_PWR_EN <34>
KSI5 60 85 EC_I2C_TPCLK R131 1 @ 2 0_0402_5%
KSI5/GPIO35 CAP_INT#/GPIO4C EC_SCLK1_TP <40>
C511 1 2 0.01U_0402_16V7K PLT_RST# KSI6 61 PS2 Interface 86 EC_I2C_TPDAT R137 1 @ 2 0_0402_5%
KSI6/GPIO36 EAPD/GPIO4D EC_SDATA1_TP <40>
EMC@ KSI7 62 87 TP_CLK
KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK <40>
ESD request KSO0 39 88 TP_DATA
KSI[0..7] KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <40>
KSO1 40
<40> KSI[0..7] KSO1/GPIO21
KSO2 41
KSO[0..17] KSO3 42 KSO2/GPIO22 97 VGATE
+3VS <40> KSO[0..17] KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 VGATE <14,51>
KSO4 43 98 GPU_ALERT
KSO4/GPIO24 WOL_EN/GPXIOA01 GPU_ALERT <23>
KSO5 44 99 ME_FLASH
KSO6 45 KSO5/GPIO25 Int. K/B HDA_SDO/GPXIOA02 109 VCIN0_PH_R
ME_FLASH <13>
2 R492 1 @ 2 10K_0402_5%
EC_SMI#_SCI# KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 KB9022&9012 Co-Layout Item 2
KSO7/GPIO27 SPI Device Interface
KSO8 47 Reserve for Share ROM EC
KSO9 48 KSO8/GPIO28 119 EC_SPI_SI R499
KSO9/GPIO29 SPIDI/GPIO5B EC_SPI_SI <17>
KSO10 49 120 EC_SPI_SO EC_SPI_SO <17> 0_0402_5%
KSO11 50 KSO10/GPIO2A SPIDO/GPIO5C 126 EC_SPI_CLK H_PROCHOT#_EC 1 9022@ 2
9022:Change control method from push‐pull to open‐drain, KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58 EC_SPI_CLK <17>
KSO12 51 128 EC_SPI_CS#
so EC_SCI# must be pull high. *PU on PCH side KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A EC_SPI_CS# <17>
(Pull high in PCH side) KSO14 53 KSO13/GPIO2D R691 2 1 100K_0402_5% 1 @ 2
KSO14/GPIO2E <51> VR_HOT# H_PROCHOT# <44,5>
KSO15 54 73 ENBKL R1683 R496
KSO15/GPIO2F ENBKL/GPIO40 ENBKL <15>
KSO16 81 74 GPU_OVERT 0_0402_5% 0_0402_5%
KSO16/GPIO48 PECI_KB930/GPIO41 GPU_OVERT <23>
KSO17 82 89 EC_I2C_ALERT# 2 @ 1
KSO17/GPIO49 FSTCHG/GPIO50 TP_I2C_INT# <40> D
1
90 BATT_BLUE_LED#
BATT_CHG_LED#/GPIO52 BATT_BLUE_LED# <40>
91 H_PROCHOT#_EC 2 Q50
CAPS_LED#/GPIO53
For abnormal shutdown <45,46> EC_SMB_CK1
EC_SMB_CK1 77
EC_SMB_CK1/GPIO44 GPIO PWR_LED#/GPIO54
92 PWR_LED PWR_LED <40> G L2N7002LT1G_SOT23-3
EC_SMB_DA1 78 93 BATT_AMB_LED# S 9012@
<45,46> EC_SMB_DA1 BATT_AMB_LED# <40>
3
D27 EC_SMB_CK2 79 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 95 SYSON
<17,23,30> EC_SMB_CK2 SM
EC_SMB_CK2/GPIO46 Bus SYSON/GPIO56 SYSON <43,48> Latest design guide suggest change to
RB751V-40 SOD-323 EC_SMB_DA2 80 121 VR_ON
<17,23,30> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 VR_ON <51> 74LVC1G06.
SPOK 1 2 PCH_RSMRST# 127
PM_SLP_S4#/GPIO59
D26
RB751V-40 SOD-323 PM_SLP_S3# 6 100 PCH_RSMRST#
<14> PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 PCH_RSMRST# <14>
@ 1 2 PCH_PWROK PM_SLP_S5# 14 101
<14> PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04
15 102 VCIN1_PROCHOT
DGPU_AC_DETECT 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103 H_PROCHOT#_EC
<23> DGPU_AC_DETECT GPIO0A H_PROCHOT#_EC/GPXIOA06 H_PROCHOT#_EC <45>
TS_EN 17 104 MAINPWON
<31> TS_EN GPIO0B VCOUT0_PH/GPXIOA07 MAINPWON <45,47>
EC_GPIO0D 18 GPO 105 BKOFF#
GPIO0C BKOFF#/GPXIOA08 BKOFF# <31> +3VALW_EC
WL_OFF# 19 GPIO 106 PBTN_OUT#
<36> WL_OFF# GPIO0D PBTN_OUT#/GPXIOA09 PBTN_OUT# <14>
SPOK 25 107 PCH_PWR_EN
+3VALW_EC <47> SPOK EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 PCH_PWR_EN <43>
FAN_SPEED1 28 108
<42> FAN_SPEED1 EC_PME# 29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11
Board ID <36>
<34> EC_PME#
E51TXD_P80DATA
E51TXD_P80DATA 30 EC_PME#/GPIO15
EC_TX/GPIO16
2
2
Analog Board ID definition, E51RXD_P80CLK 31 110 EC_ACIN
<36> E51RXD_P80CLK EC_RX/GPIO17 AC_IN/GPXIOD01
R503 PCH_PWROK 32 112 EC_ON
3 Ra 100K_0402_5% Please see page 3. <14> PCH_PWROK
PWR_SUSP_LED# 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 ON/OFFBTN#
EC_ON <47>
@ @ 3
<40> PWR_SUSP_LED# SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFFBTN# <38,40>
EC_RTCRST# 36 GPI 115 LID_SW# R697 R696 R501 0_0402_5%
<13> EC_RTCRST# NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# <38>
116 SUSP# 10K_0402_5% 10K_0402_5%
SUSP# <43,48,49,50>
1
1
AD_BID0 SUSP#/GPXIOD05 117 SYS_PWROK_EC VCIN0_PH_R 1 @ 2
GPXIOD06 SYS_PWROK_EC <14> VCIN0_PH <45>
118 9012_PECI VCIN1_PROCHOT
PECI_KB9012/GPXIOD07 VCIN1_PROCHOT <45>
1
LAN_GPO 122 AGND/AGND

1 <34> LAN_GPO XCLKI/GPIO5D
R506 C517 PM_SLP_S4# 123 124 +V18R R507 1 9022@ 2
GND/GND
GND/GND
GND/GND
GND/GND
<14> PM_SLP_S4# XCLKO/GPIO5E V18R +3VALW_EC

Rb 27K_0402_1% 0.1U_0402_16V4Z 1 0_0402_5% PU will disable PH function
GND0
@
2 C515
2
4.7U_0603_6.3V6K
9022@ KB9022QC-A3_LQFP128_14X14 2 9012@
11
24
35
94
113
69
L32
20mil BLM15BD121SN1D_2P
ECAGND 1 2
reserve for LVDS EP mode
SM010030010 200ma 120ohm@100mhz DCR 0.2
DVT modify 11/12
R491 1 @ 2 10K_0402_5% EC_GPIO0D change to SM010009U00
DVT modify 11/18
EC_RTCRST# R490 1 2 10K_0402_5% U28
KB9012QF-A3_LQFP128_14X14
9012@
SA00004OB30
4 4

EC ENE-KB9012
Date: Wednesday, May 28, 2014 Sheet 39 of 56
A B C D E
A B C D E
+BRI_VCC
+TP_VCC
To TP/B Conn. +3VALW 1
0_0603_5%
@ 2
R163 +3VALW R412 1 @ 2 0_0603_5%
1 TPBRI@ 2 R411 1 @ 2 0_0603_5%
Colay 6/8 pin +BRI_VCC
+3VS
0_0603_5% R164
+3VS
+5VALW R410 1 @ 2 0_0603_5%
JTP1
+3VALW +TP_VCC @ 10
U16 TPBRI@ C552 2 1 0.1U_0402_16V4Z 9 GND
1 8 GND TP_CLK
5 OUT TP_CLK 7 8 TP_DATA
2 2 IN 1 <39> TP_CLK 7
C523 TP_DATA 6
<39> TP_DATA 6
100P_0402_50V8J
R162 U69 C1288 C1289 2 4.7U_0603_6.3V6K 5
GND 5
100P_0402_50V8J
C553
XEMC@ C551
0_0402_5% 1 24 .1U_0402_16V7K 4.7U_0603_6.3V6K 4 TPBRI@ I2C_DAT_TP 4 1 1
+VDDD_M_M 1 MOS@ 2+VDDD_M 2 SCB_0/GPIO_6 VDDD 23 TPBRI@ 1 1 IN 2 I2C_CLK_TP 3 4
1 SCB_5/GPIO_7 SCB_4/GPIO_5 TPBRI@ 1 3 1
3 22 EC_SDATA1_TP C1293 3 TP_I2C_INT# 2
VSSD SCB_3/GPIO_4 EN <39> TP_I2C_INT# 2
TP_INT# 4 21 EC_SCLK1_TP 1U_0402_6.3V6K 1
GPIO_8 SCB_2/GPIO_3 <39> TP_SENOFF# 1 2 2
XEMC@
5 20 TPUSB_X2 TPBRI@ G5243T11U_SOT23-5
GPIO_9 SCB_1/GPIO_2 2 TP_PWR_EN <39>
C1291 MOS@1 2 .1U_0402_16V7K 6 19 TPUSB_X1 (For Wake Up and Interrupt) CONN@
C1292 MOS@1 2 4.7U_0603_6.3V6K +VDDD_M_M 7 GPIO_10 GPIO_1 18 1 MOS@ 2 ACES_51524-00801-001
8 GPIO_11 GPIO_0 17 R161 0_0402_5%
C1290 1
@C1290
@ 2.1U_0402_16V7K 9 SUSPEND VSSA 16 SP01001A910
1 @ 2 USB20_P5_R 10 WAKEUP VSSD 15 +TPBRI_VBUS 2 @ 1
<18> USB20_P5 USBDP VBUS +5VS
R144 1 @ 20_0402_5% USB20_N5_R 11 14 R139 0_0603_5% TPUSB_X1
<18> USB20_N5 USBDM nXRES
R145 0_0402_5% 12 13 1 1
VCCD VSSD 25 2 @ 1 Y9 MOS@ USB20_P5 R141 1 USBTP@2 0_0402_5% I2C_DAT_TP
thermal pad +BRI_VCC
+VDDD_M 1 @ 2 4 1 USB20_N5 R142 1 USBTP@2 0_0402_5% I2C_CLK_TP
R140 0_0402_5% CY7C65211-24LTXI_QFN24_4X4 TPBRI@ TPBRI@ R157 0_0603_5%
1 MOS@ 2 TPBRI@ 2 2 R939 I2C_DAT R147 1 @ 2 0_0402_5%
+3VALW
R155 0_0402_5% 1 C1286 C1287 1M_0402_5% I2C_CLK R146 1 @ 2 0_0402_5%
.1U_0402_16V7K 4.7U_0603_6.3V6K 1 MOS@ 2 3 2
C1285 TPUSB_X2
2
TPBRI@ 12MHZ_18PF_7V12000001
1
2 1U_0402_6.3V6K MOS@ MOS@ Part Number = SJ10000C210
1
MOS@ PCB Footprint = Y_CRG3201212_4P
10K_0402_5%
R452
33P_0402_50V8J
C68
2
33P_0402_50V8J
C86
1
2
+3VS
+TP_VCC +TP_VCC +3VS +3VS

RP29 RP30 RP31
2
G
TP_CLK 8 1 I2C_DAT_TP 8 1 EC_SCLK1_TP 8 1 Q87 TPBRI@
TP_DATA 7 2 I2C_CLK_TP 7 2 EC_SDATA1_TP 7 2 L2N7002LT1G_SOT23-3 Q2505B
2
6 3 TP_I2C_INT# 6 3 TP_INT# 6 3 TP_INT# 3 1 TP_I2C_INT# DMN66D0LDW-7_SOT363-6
5 4 5 4 5 4 TPBRI@
G
2 1 6 I2C_CLK 2
INT to FCH for SMB Alert INT to EC for TP wake <39> EC_SCLK1_TP
D
4.7K_0804_8P4R_5% 2.2K_0804_8P4R_5% 2.2K_0804_8P4R_5% INT to Bridge for I2C 1 @ 2
TPBRI@ TPBRI@ R133 0_0402_5% Q2505A
5
TPBRI@
G
<39> EC_SDATA1_TP 4 3 I2C_DAT
D
U69 0_0402_5% 2 @ 1 R130
NOTE :
KB BackLight Conn. Reserve Cypress pop : TPBRI@
MOSART pop : TPBRI@ , MOS@ (default flash type)
0_0402_5% 2 @ 1 R129
EC I2C pop : R128,R129,R132,RP19 MOSART Bridge

USBTP pop : USBTP@, (Q87 or R132, R130 option) SA00007PR00
MOS@
Q44
DMG2301U-7_SOT23-3
+5VS KB@
JBL1
LED
S
3 1 +5VS_BL 4 6
+5VALW 3 4 G2 5
2 3 G1
R451 1 2
G
2
100K_0402_5% 1
1 KB@ 2 KBL_EN_R ACES_50504-0040N-001
CONN@
R592
SP01000Z300
0_0402_5% LED6 +3VALW
1
<39> KBL_EN# 1 @ 2
C524 <39> BATT_BLUE_LED# BATT_BLUE_LED# 1 2 1 2
B R699 200_0402_5%
0.1U_0603_25V7K
3 2 3
@
<39> BATT_AMB_LED# BATT_AMB_LED# 3 4 1 2
A R698 390_0402_5%
LTST-C295TBKF-CA_AMBER-BLUE
LED7
PWR_LED# 1 2 1 2
B R700 200_0402_5%
<39> PWR_SUSP_LED# PWR_SUSP_LED# 3 4 1 2

A
ON/OFF BTN KB Conn. KSI[0..7]
KSO[0..17]
KSI[0..7]
KSO[0..17]
<39>
<39>
LTST-C295TBKF-CA_AMBER-BLUE
R701 390_0402_5%
JKB1 PWR_LED# PWR_LED# <38>

+3VLP
KSO0 1
KSO1 2 1
2 D
1
KSO2 3
3
2
KSO3 4 <39> PWR_LED 2 Q39

R534 KSO4 5 4 G
5
2
100K_0402_5% KSO5 6 S SSM3K7002F_SC59-3
3
KSO6 7 6 R513
KSO7 8 7 100K_0402_5%
1
KSO8 9 8
ON/OFFBTN# KSO9 10 9
1
KSO10 11 10
KSO11 12 11
KSO12 13 12
KSO13 14 13
KSO14 15 14
4 Test Only SW3 KSO15 16 15 4
EVQPLDA15_4P KSO16 17 16
1 3 KSO17 18 17
KSI0 19 18
TOP 2 4 DVT modify 12/10 KSI1 20 19
chagne to SN100000K00 KSI2 21 20 SP01000IJ00
@ KSI3 22 21
6
5
KSI4 23 22
KSI5 24 23
24
KSI6 25 27 2013/12/26 2014/12/26 Title
KSI7 26 25 G1 28
Issued Date Deciphered Date
26 G2
KB & TP & TPM Connector & LED
WWW.AliSaler.Com
<38,39> ON/OFFBTN# Size Document Number Rev
E-T_6905-E26N-01R Custom 0.2
CONN@
Z5WAW M/B LA-B702
A B C D E
A B C D E
HD Audio Codec
+5VS +VDDA
J4
40mil 1 2 40mil
1
C554 JUMP_43X118 4.75V
@
0.1U_0402_16V4Z
XEMC@2
(output = 300 mA)
Reserved for ESD
+PVDD_HDA
SM01000EJ00 3000ma 220ohm@100mhz DCR 0.04 40mil
L33 2 1 0.1U_0402_16V4Z 0.1U_0402_16V4Z GND
Int. Speaker Conn.
1 +VDDA +AVDD1_HDA 1
HCB2012KF-221T30_0805 1 1 40mil JSPK1
1
10U_0603_6.3V6M
C608
C558 C559 SPKR+ R98 1 @ 2 0_0603_5% SPK_R+ 1
@ R120 SPKR- R14 1 @ 2 0_0603_5% SPK_R- 2 1
0.1U_0402_16V4Z 20mil 1 @ 2 SPKL+ R96 1 @ 2 0_0603_5% SPK_L+ 3 2 5
+VDDA
2
2 2 SPKL- R97 1 @ 2 0_0603_5% SPK_L- 4 3 G1 6
1 1 4 G2
C567
10U_0603_6.3V6M
0_0603_5%
1
GND GND C562 C561 ACES_88266-04001
2
MESC5V02BD03_SOT23-3
Place near Pin41 Place near Pin46 @ CONN@ GND
2 2 D4 D5 SP02000K200
2
0.1U_0402_16V4Z XEMC@ XEMC@
+3VS_DVDD
GNDA
Place near Pin26
R127 1 @ 2 0_0603_5% 20mil 0.1U_0402_16V4Z +3VS_DVDD
+3VS
1
1 1 @1
C564 C636 C582 +1.5VS_VDDA 0.1U_0402_16V4Z R117 1 @ 2 0_0603_5%
+1.5VS
1
1
C605
10U_0603_6.3V6M
10U_0603_6.3V6M C604
2 2 2 GND GND
0.1U_0402_16V4Z
2
2
Place near Pin1, 9 GND
GNDA
U36 Place near Pin40
41
46
26
40
1
9
DVDD-IO
PVDD1
PVDD2
AVDD1
AVDD2
DVDD
Digital MIC Conn.
LINE1-L 22
LINE1-R 21 LINE1-L(PORT-C-L) 43 SPKL-
LINE1-R(PORT-C-R) SPK-OUT-L- 42 SPKL+
24
23 LINE2-L(PORT-E-L)
SPK-OUT-L+
45 SPKR+
Slave +3VS
Main
40mil LINE2-R(PORT-E-R) SPK-OUT-R+ 44 SPKR- MIC2
RING2 17 SPK-OUT-R- @
2 2
SLEEVE 18 MIC2-L(PORT-F-L) /RING2 +3VS MIC1 6 5 DMIC_DATA
Combo MIC MIC2-R(PORT-F-R) /SLEEVE VDD DATA
32 HP_LEFT @
+MICBIAS 31 HPOUT-L(PORT-I-L) 33 HP_RIGHT 6 5 DMIC_DATA_S 2 4 DMIC_CLK
+MICBIAS LINE1-VREFO-L HPOUT-R(PORT-I-R) VDD DATA CS CLK
30
LINE1-VREFO-R 10 HDA_SYNC_CODEC 2 4 DMIC_CLK 2 R460 1 1 3
SYNC HDA_SYNC_CODEC <13> CS CLK ENHANCE GND
DMIC_DATA 2 6 HDA_BIT_CLK_CODEC 0_0402_5%
GPIO0/DMIC-DATA BCLK HDA_BIT_CLK_CODEC <13>
DMIC_CLK 3 1 3 2DMIC@ S MIC ST MP45DT02TR
GPIO1/DMIC-CLK ENHANCE GND
2
1 XEMC@ 2 1 2 C573 XEMC@ GND 2 1DMIC@
2
R548 0_0402_5% 22P_0402_50V8J S MIC ST MP45DT02TR
0_0402_5%
@
EC_MUTE# 47 5 HDA_SDOUT_CODEC D57
HDA_RST#_CODEC 11 PDB
RESETB
ALC283-CG SDATA-OUT
SDATA-IN
8 HDA_SDIN0_CODEC 1 EMC@ 2
HDA_SDOUT_CODEC
HDA_SDIN0 <13>
<13>
C893
1 0.1U_0402_16V4Z
R462 MESC5V02BD03_SOT23-3
R547 33_0402_5% D58 R456 XEMC@
1
48 MESC5V02BD03_SOT23-3 0_0402_5%
+MIC2_VREFO
1
MONO_IN 12 SPDIF-OUT/GPIO2 XEMC@ 1DMIC@
PCBEEP 16
Close codec MONO-OUT
HP_PLUG# R545 2 1 39.2K_0402_1% SENSE_A 13 10U_0603_6.3V6M 2 1 C583 GND
1
14 SENSE A
10mil
1
SENSE B 29
1 MIC2-VREFO
37 10U_0603_6.3V6M 2 1 C574 GNDA
C570 35 CBP 7
2.2U_0402_6.3V6M CBN LDO3-CAP 39
2 LDO2-CAP
LDO1-CAP
27 10U_0603_6.3V6M 2 1 C584 GNDA R526 Realtek add request
+3VS_DVDD 36
CPVDD R526 1 2
R525 28 CODEC_VREF 100K_0402_5%
10mil
1 @ 2 100K_0402_5% 20 VREF
+3VS CPVREF 1 1 1
Realtek add request
2.2U_0402_6.3V6M
C577
@
15 20K_0402_1% 1 2 R546 GNDA @
JDREF
0.1U_0402_16V4Z
C576
10U_0603_6.3V6M
C578
10U_0603_6.3V6M 2 1 C585 19 34 CPVEE
GNDA MIC-CAP CPVEE
Close codec 2 2 2 +MIC2_VREFO
1
4
49 DVSS 25 C575
Thermal PAD AVSS1 38 2.2U_0402_6.3V6M
AVSS2
1
2
R540 R539
ALC283-CG_MQFN48_6X6 Place next pin27 2.2K_0402_5% 2.2K_0402_5%
3 GND GNDA 3
GND L75
2
GNDA BLM15PX330SN1D_2P
HPOUT_L_2 SLEEVE_L 1 2 EMC@ SLEEVE
R529 HPOUT_R_2
47K_0402_5% RING2_L 1 2 EMC@ RING2
2
2 @ 1 BEEP#_R 1 2 MONO_IN L76
<39> BEEP#
2
D7 BLM15PX330SN1D_2P
AZ5123-02S 3P C/A SOT23-3

C555 D8 2 2
2
R530 1 1U_0402_6.3V6K XEMC@ C587 C586

47K_0402_5% XEMC@ EMC@ EMC@ EMC@
100P_0402_50V8J
C556
4.7K_0402_5%
R531
2 1 680P_0402_50V7K 680P_0402_50V7K
<13> HDA_SPKR
2 +3VALW +3VS +3VLP
1 1 Headphone Out
1
1
GND GND
2
@ @ RING2 GND GND

R557 R551 R550
GNDA 100K_0402_5% 100K_0402_5% R238 R128 JHB1
100K_0402_5% 59_0603_1% 0_0603_5% RING2_L 3
HP_LEFT 1 2 1 @ 2 HPOUT_L_2 1
1
D
5 G
S Q32A HP_PLUG# 5
R553 R239 R118 6

10K_0402_5% 59_0603_1% 0_0603_5%
6
EC_MUTE# 2 1 Q32B HP_RIGHT 1 2 1 @ 2 HPOUT_R_2 2

<39> EC_MUTE# 2 G
D
HDA_RST#_CODEC 2 1 S LINE1-L 1 2 2 2 SLEEVE_L 4

<13> HDA_RST#_CODEC
R556 GNDA C557 4.7U_0402_6.3V6M C444 C445 7
1
10K_0402_5% LINE1-R 1 2 XEMC@ XEMC@

C560 4.7U_0402_6.3V6M 330P_0402_50V7K 330P_0402_50V7K SINGA_2SJ3080-001111F
1 2 1 1 GNDA CONN@
+MICBIAS D6
GNDA DC23000B300
@ C563 2 R533 2 1
4 1U_0402_6.3V6K 4.7K_0402_5% 4
J16 J19 GNDA 1
JUMP_43X39 JUMP_43X39 To solve the background noise while combo jack
1 2 1 2 connecting to an active 3 R535 2 1
@ 1 2 @ 1 2 4.7K_0402_5% GNDA
J9 J5 speaker and system entry into S3/S4/S5 without analog BAT54A-7-F_SOT23-3
JUMP_43X39 JUMP_43X39 power
1 2 1 2
@ 1 2 @ 1 2
J8 J6
JUMP_43X39 JUMP_43X39
1 2 1 2 Security Classification Compal Secret Data Compal Electronics, Inc.
@ 1 2 @ 1 2
2012/07/10 2014/12/26 Title
GND GNDA GND GNDA THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD Audio Codec ALC283
C 0.2
Z5WAW M/B LA-B702
A B C D E
TPM Board for 2015
U2600
5 +3VALW_TPM
1 VSB 10
GPIO0/XOR_OUT VDD +3VS_TPM
2 19
GPIO3/BADD with Internal PH (default) 6 GPIO1 VDD 24
+3VALW R2600 +3VALW_TPM +3VS R2601 +3VS_TPM 0_0402_5% 1 @ 2 R2602 TPM_BADD 9 GPIO2/GPX VDD
0_0603_5% 0_0603_5% PM_CLKRUN# 15 GPIO3/BADD 8
<14> PM_CLKRUN# GPIO4/CLKRUN# TEST
1 TPM@ 2 1 TPM@ 2
CLKRUN PH 10K to +3VS at PCH side
10U_0603_6.3V6M
0.1U_0402_16V4Z
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
LPC_AD0 26
<17,39> LPC_AD0 LAD0/MISO
C2600 TPM@
C2601 TPM@
C2602 TPM@
C2603 TPM@
C2604 TPM@
C2605 TPM@
1 1 1 1 1 1 LPC_AD1 23
<17,39> LPC_AD1 LAD1/MOSI
LPC_AD2 20 3
<17,39> LPC_AD2 LAD2/SPI_IRQ# NC
LPC_AD3 17 12
<17,39> LPC_AD3 LAD3 NC 13
2 2 near pin5 2 2 2 2 LPCPD# had internal PH NC 14
28 NC
CLK_PCI_TPM 21 LPCPD#
<16> CLK_PCI_TPM LCLK/SCLK
LPC_FRAME# 22
<17,39> LPC_FRAME# LRFAME#/SCS#
PLT_RST# 16 4
<15,23,34,36,39> PLT_RST# LRSET#/SPI_RST# GND
near pin10, 19, 24 SERIRQ 27 11
<17,39> SERIRQ SERIRQ GND
SERIRQ PH 10K to +3VS at PCH side 7 18
PP GND 25
GND
NPCT650AA0WX_TSSOP28
SA00007IO00
BADD SELECTION TPM@
0 EEh ‐ EFh R2603
33_0402_5%
CLK_PCI_TPM 1 XEMC@ 2 C2606 1 2 22P_0402_50V8J
* 1 7Eh ‐ 7Fh XEMC@
G‐Sensor for BA50 +3VS Screw Hole

1
R521 +3VS
10K_0402_5%
BA@ U2 BA@
1 C633 1 2 10U_0603_6.3V6M
2
8 Vdd_IO BA@
4 CS 14 C628 1 2 0.1U_0402_16V4Z
<11,12,17,36> SMB_CLK_S3 SCLSPC Vdd
<11,12,17,36> SMB_DATA_S3 6
7 SDA/SDI/SDO
R519 1 @ 2 10K_0402_5% SDO/SA0 11 G_SEN_INT
+3VS INT1 G_SEN_INT <15>
R520 1 BA@ 2 10K_0402_5% 16 9
15 ADC1 INT2
13 ADC2 10
ADC3 RES
2
3 NC 5
NC GND 12
GND H3 H4 H5 H6 H9 H10 H12 H21 H17 FD1 FD2
LIS3DHTR_LGA16_3X3 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_6P5
BA@
@ @
1
LIS3DH
1
SA0 ->0, Address is 0011 000 (0x30h) FIDUCIAL_C40M80 FIDUCIAL_C40M80
SA0 ->1, Address is 0011 001 (0x32h)
FD3 FD4
@ @ @ @ @ @ @ @ @
H13 H14 H15 H16 H20 H18 @ @
1
H_3P7 H_3P7 H_3P7 H_4P0 H_4P0 H_3P0
FIDUCIAL_C40M80 FIDUCIAL_C40M80
1
FAN1 Conn +5VS C632
4.7U_0603_10V6K @ @ @ @ @ @
1 2
H27
H_3P7
+5VS
1
U31
1 8 1
2 EN GND 7 @
+VCC_FAN1 3 VIN GND 6 C413
2 @ 1 4 VOUT GND 5 0.1U_0402_16V4Z
<39> EN_DFAN1 VSET GND 2
EMC@ H23 H25
R515 1 NCT3942S SOP 8P H_3P5X3P0N H_3P0N
0_0402_5%
C626
0.1U_0402_16V4Z DVT modify 12/04 @ @
1
1
2 @ ESD request add 0.1u to 5VS
C627
4.7U_0603_10V6K
+3VS 1 2
@C631
@ C631
1
1000P_0402_50V7K
R516 1 2
10K_0402_5%
40mil JFAN1
2
+VCC_FAN1 1
2 1 4
<39> FAN_SPEED1 2 GND
3 5
3 GND
1
C630 Security Classification Compal Secret Data Compal Electronics, Inc.
1000P_0402_50V7K ACES_88231-03041 2013/12/26 2014/12/26 Title
XEMC@ CONN@
2
FAN & Screw Hole & G-Sensor
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Z5WAW M/B LA-B702
WWW.AliSaler.Com MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D E
DC & VGA Interface
U11 @J10
@ J10
+5VALW 1 14 +5VS_OUT 1 2 +5VS For ESD
2 VIN1 VOUT1 13 1 2
VIN1 VOUT1 C342 JUMP_43X118 +5VS +3V_PCH
SUSP# R439 1 @ 2 0_0402_5% 5VS_ON 3 12 2 1 330P_0402_50V7K
ON1 CT1
+3VALW +3V_PCH 1
EMC@ 2 4 11
+5VALW VBIAS GND
C980 0.1U_0402_16V7K EMC@
22U_0603_6.3V6M
22U_0603_6.3V6M
10U_0603_6.3V6M
J22 R933 2 1 47K_0402_5% 3VS_ON 5 10 2 1 1 1 1
JUMP_43X79 ON2 CT2 330P_0402_50V7K
1 1
EMC@
C111
EMC@
C112
C114
2 1 6 9 C346 @ J11
@J11
2 1 1 2 7 VIN2 VOUT2 8 +3VS_OUT 1 2
+3VALW VIN2 VOUT2 1 2 +3VS 2 2 2
@ C979 0.1U_0402_16V7K
15 JUMP_43X118
GPAD
TPS22966DPUR_SON14_2X3
SA00006FD00
+3VALW to +3V_PCH Transfer

+5VALW
+3VALW +3V_PCH +1.35V +5VALW
2
+0.675VS +1.05VS
2
R552
2
100K_0402_5% R573 R554
2
U77 @ 470_0603_5% 100K_0402_5%
6 1 R566 R567 @ @
1
IN OUT 470_0603_5%
470_0603_5%
1
5 2 SUSP @ @
1
GND GND +1.35V_R SYSON#
1
4 3 PCH_PWR_EN +0.675VS_R
NC EN PCH_PWR_EN <39>
3
+1.05VS_R
D
1
AOZ1320CI-04 @
D D
1
@ 2
<39,48,49,50> SUSP#
2
G SUSP 2 2 SUSP SYSON# 2 5 SYSON

SYSON <39,48>
1
R537 S G G Q40A Q40B
3
10K_0402_5% R555 Q29 Q36 S S Q37 DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6
4
@ 10K_0402_5% L2N7002LT1G_SOT23-3 L2N7002LT1G_SOT23-3 L2N7002LT1G_SOT23-3 @ @
@ @ @
1
2
2 2
+1.05VS to +1.05VSDGPU
60mil
+1.05VS +1.05VSDGPU +VGA_CORE
U40
AO4478L_SO8
2
8 1
+3VS to +3VSDGPU_AON for GPU 7 2 R572
10U_0603_6.3V6M
C613
0.1U_0402_16V7K
C683
6 3 47_0603_5%
C617
10U_0603_6.3V6M
5 1 @
2
VGA@ +VGA_CORE_R
1
+3VS +3VSDGPU_AON VGA@ VGA@ VGA@ R514
4
U12 VGA@ 60mil(1.5A) 51.1_0402_1% L2N7002LT1G_SOT23-3
D
1
1 2 @
OUT VGA@
5 DGPU_PWR_EN# 2
1
IN +1.05VSDGPU_R G
2
2 10mil S
3
GND
3
3 4 C621 10mil Q35 3
IN VGA@ R469 1 VGA@ 2 47K_0402_5% 1.05VSDGPU_GATE
2 1 4.7U_0603_6.3V6K B+
C620 3
4.7U_0603_6.3V6K EN 5 VGA_PWROK#
2
6
VGA@ G5243T11U_SOT23-5 Q1007B
1 C622 DMN66D0LDW-7_SOT363-6
4
0.1U_0402_16V7K VGA@
VGA_PWROK# 2 1
VGA@
Q1007A
DGPU_PWR_EN DMN66D0LDW-7_SOT363-6 VGA@
1
+3VSDGPU_AON +3VSDGPU_MAIN
@J14
@ J14
1 2 +5VALW +1.5VSDGPU
1 2 DVT modify 11/20
JUMP_43X79 +5VALW +3VLP +5VALW change to +3VLP
2
@
R998 R571
2
@ VGA@ 100K_0402_5% 47_0603_5%

R994 R995 @
100K_0402_5% 100K_0402_5%
1
+3VS to +3VSDGPU_MAIN for GC6‐2.0 1.5VS_DGPU_PWR_EN# +1.5VSDGPU_R
1
DGPU_PWR_EN# VGA_PWROK#
6
+3VS +3VSDGPU_MAIN Q33 @ Q34 VGA@
D D
1
U14 L2N7002LT1G_SOT23-3 L2N7002LT1G_SOT23-3

1 2 2 1.5VS_DGPU_PWR_EN 5 2 1.5VS_DGPU_PWR_EN#
OUT <15,16,54> DGPU_PWR_EN VGA_PWROK <16,19,23,54> <23,53> 1.5VS_DGPU_PWR_EN
5 60mil(1.5A) G G Q45A
IN
2
2 S S @ Q45B DMN66D0LDW-7_SOT363-6
3
1
2
4 2 R999 DMN66D0LDW-7_SOT363-6 @ 4
4 GND C625 @ VGA@ 100K_0402_5% @
IN GC6@ R996 R997
2 1 4.7U_0603_6.3V6K
C624 3 100K_0402_5% 100K_0402_5%
1
GC6@ EN
1
1U_0402_6.3V6K G5243T11U_SOT23-5
1 GC6@

<23,54> 3VSDGPU_MAIN_EN Issued Date 2013/12/26 Deciphered Date 2014/12/26 Title
DC Interface
3VSDGPU_MAIN_EN From GPU Size Document Number Rev
Custom 0.2
Z5WAW M/B LA-B702
A B C D E
A B C D
+5VS
1 VIN 1
@ PJP101 EMI@ PL101

ACES_50305-00441-001_4P HCB2012KF-121T50_0805 +3VALW
DC_IN_S1 1 2
1
2
3
1
9012@
4 PR102 9012@
GND
1
<39,5> H_PROCHOT# 47K_0402_1% PR103
GND EMI@ PC102 EMI@ PC103 10K_0402_1%
100P_0603_50V8 1000P_0603_50V7K 9012@
2
8
PC104
D
6
9012@ 0.022U_0402_16V7K 3
P
+ BATT_TEMP <39,45>
2 2 1 1
PQ101A G O 2
-
G
DMN66D0LDW-7_SOT363-6 9012@ PU101A
9012@PU101A
1
S LM393DR_SO8
4
9012@PD101
9012@ PD101 9012@
1
LL4148_LL34-2 PR101
1
1.5M_0402_5% 9012@ 9012@
PC105 PR104
2
100P_0402_50V8J 100K_0402_1%
2
1
9012@ PR105
9012@PR105
H_PROCHOT# 47K_0402_1%
2 2
9012@ 9012@ PU101B
9012@PU101B
8
PC106 LM393DR_SO8
D
3
9012@ 0.022U_0402_16V7K 5
P
5 2 1 7 +
PQ101B G O 6
- ACIN <39,46>
G
1
S
4
9012@ PD104
9012@PD104
LL4148_LL34-2 9012@ PR106
9012@PR106
1.5M_0402_5%
2
3 3
@ PR111
@PR111
0_0402_5%
1 2
+3VLP +CHGRTC
- PBJ101 @ + PR112
560_0603_5%
PR113
560_0603_5%
2 1 1 2 1 2 +RTCBATT
ML1220T13RE
4 4

DCIN
Size Document Number
Rev
WWW.AliSaler.Com
A B C D
A B C D
+3VLP
VGA_EMI@ PL202
1
HCB2012KF-121T50_0805
1 2 @ PC202
1
0.1U_0603_25V7K
2
1 1
EMI@ PL201 @ PR204 @ PR205

HCB2012KF-121T50_0805 10K_0402_1% 10K_0402_1%
1 BATT_S1 1 2 BATT+ <45,47>
2
1 2
2 3
1
BI+ 1PR211 2 1K_0402_1% BI @ PU201
3 4 TH 2 1 @ PR206 1 8
4 5 +3VLP VCC TMSNS1
1
EC_SMCK 1PR208 2 100_0402_1% PR201 100K_0402_1%
5 6 EC_SMDA 1PR209 2 100_0402_1% EC_SMB_CK1 <39,46>6.49K_0402_1% EMI@ PC201 2 7 2 1
6 7 EC_SMB_DA1 <39,46> 1 2 1000P_0402_50V7K GND RHYST1
2
7 8
1
PR210 BATT_TEMP <39,44> MAINPWON 3 6 @ PR207
8 9 1K_0402_1% OT1 TMSNS2 47K_0402_1%
GND 10 4 5 @ PH201
GND OT2 RHYST2 100K_0402_1%_B25/50 4250K
SUYIN_200275GR008G13GZR G718TM1U_SOT23-8
2
@ PJP201
1
PR213
1K_0402_5%
2
2 2
2013/10/02
Add for ENE9022 Battery Voltage drop detection. B+
For KB9012
sense 20mΩ
Active Recovery
Connect to ENE9022 pin64 AD1.
65W 85W, 1.2V 65W, 0.913V
Battery is 3-cell design. @9022@
1
PR231
B+=9V 80.6K_0402_1%
PH202 under CPU botton side : 90W 117W, 1.2V 90W, 0.915V
PR229
CPU thermal protection at 92 degree C ( shutdown )
2
@9022@ 0_0402_5%
1 2 VCIN1_BATT_DROP <39> Recovery at 56 degree C 120W 156W, 1.2V 120W, 0.919V
+EC_VCCA
1
2
@9022@ PC203 @9022@ PR230

ADP_I <39,46>
0.1U_0402_25V6 10K_0402_1%
1
3 3
9022@ PR216 90W@ PR214 120W@ PR214

2
1
26.1K_0402_1% 10.7K_0402_1% 3.74K_0402_1%
9012@ PR216
12.4K_0402_1% 65W@ PR214
4.99K_0402_1%
2
<39> VCIN0_PH
@9012@ PR227 @9022@ PR227

26.1_0402_1% 30.9K_0402_1%
1 2 VCIN1_PROCHOT <39>
<39,47> MAINPWON
@65W@ PR224
54.9K_0402_1%
1 2 H_PROCHOT#_EC <39>
@90W@ PR224
105K_0402_1%
2013/10/28 update PH202 chang
Common part SL200002H00
1
PH202
100K_0402_1%_NCP15WF104F03RC PR203
B value:4250K±1% 10K_0402_1%
2
4 4
<39> ECAGND

BATTERY CONN / OTP
A B C D
A B C D
Protection for reverse input
PQ301 Vgs = 20V
1
2N7002KW_SOT323-3 D 120W@ PR303
2 Vds = 60V 0.01_1206_1% B+
G Id = 250mA
S
3
PR302
PR301
1 2 1 2 Rds(on) typ = 35mohm max Rds(on) = 35mohm max
1M_0402_5% 3M_0402_5%
Vgs = 20V max Power loss 0.22W for 90W;0.12W for 65W system Vgs = 20V
Vds = 30V Vds = 30V
1 1
Need check the SOA for inrush CSR rating: 1W

VIN ID = 7.7A (Ta=70C) VACP-VACN spec < 80.64mV ID = 7.7A (Ta=70C)
P1 P2
1 65_90W@ PR303 EMI@ PL301 CHG_B+
2 1 8 0.02_1206_1% 1UH_NRS4018T1R0NDGJ_3.2A_30% 8 1
5 3 2 7 1 4 1 2 7 2
Isat: 4A
2200P_0402_25V7K
10U_0805_25V6K
10U_0805_25V6K
3 6 6 3
2200P_0402_50V7K
0.1U_0402_25V6
5 2 3 5
DCR: 27mohm
0.1U_0402_25V6
@EMI@ PC306
4
1
0_0402_5%
PC303
PC304
EMI@ PC305
0.01U_0402_50V7K
@ PR304
4
1
1
VIN
PC301
PQ302 PQ303 PQ304
PC302
PC307
AON6414AL_DFN8-5 AO4406AL_SO8 AO4406AL_SO8
2
2
VF = 0.5V
2
2
3
2
PD301
BQ24725A_ACDRV_1 BAS40CW_SOT323-3
0.1U_0402_25V6
0.1U_0402_25V6
BQ24725A_BATDRV 1 2BQ24725A_BATDRV_1
Rds(on) = 30mohm max
1
1
PC308
PC310
PR305
Vgs = 20V
1 1
1 2
10_1206_1%
PC311 4.12K_0603_1%
0.047U_0402_25V7K Vds = 30V
PR306
2
PC309 1 2 ID = 7A (Ta=70C)
0.1U_0402_25V6 VF = 0.37V
5
2.2_0603_5%
PR307
PD302
AON7408L_DFN8-5
BQ24725A_VCC2
RB751V-40_SOD323-2 Support max charge 3.5A
PR308
BQ24725A_ACP
Power loss: 0.245W
PQ305
0_0402_5%
BQ24725A_REGN
BQ24725A_BST2
2
DH_CHG 1 2 4 7X7X3 CSR rating: 1W
BQ24725A_LX
4.12K_0603_1%
4.12K_0603_1%
VSRP-VSRN spec < 81.28mV

2 2
Isat: 3.8A
1
PC312 BATT+
PR309
PR310
DH_CHG
1 2
PL302 PR311
3
2
1
1U_0603_25V6K 1 2 10UH_3.5A_20%_7X7X3_M 0.01_1206_1%
BQ24725A_ACN
BQ24725A_LX 1 2 CHG1 4
2
PC313
5
1U_0603_25V6K 2 3
20
19
18
17
16
PU301
AON7408L_DFN8-5
CSON1
CSOP1
1
@EMI@ PC318 @EMI@ PR312

680P_0402_50V7K 4.7_1206_5%
PHASE
BTST
VCC
HIDRV
REGN
10U_0805_25V6K
10U_0805_25V6K
21
0.1U_0402_25V6
0.1U_0402_25V6
PAD
PQ306
PC314
PC315
1
1
1 15 DL_CHG 4
ACN LODRV
PC316
PC317
2
2
2 14
ACP GND PR313
3
2
1
2
1
BQ24735RGRR_QFN20_3P5X3P5 10_0603_1%
BQ24725A_CMSRC 3 13 SRP1 2 CSOP1
CMSRC SRP
1
PR314
2
6.8_0603_1%
BQ24725A_ACDRV 4 12 SRN1 2 CSON1
2
ACDRV SRN PC319
0.1U_0603_16V7K
+3VLP 1 2 5
ACOK BATDRV
11 **Design Notes**
BQ24725A_BATDRV
Module model information PR315
100K_0402_1%
ACDET
#For 65 /90W system, 3S1P/3S2P battery
IOUT
SDA
ILIM
SCL
Maximum Charging current 3.5A
BQ24735A_V1.mdd <39,44> ACIN
Battery discharge power 55W.
#Register Setting
6
10
+3VALW
3
BQ24735A_V2.mdd 1. 0X12 bit8 set 0 (default 1) to disable IFAULT HI if add ISN choke 3
BQ24725A_ACDET
BQ24725A_ILIM 1 2
2. 0X12 bit3 set 1 (default 0) to enable turbo boost function
BQ24725A_IOUT
PR316
3. Disable turbo when AC only
100K_0402_1%
0.01U_0402_25V7K
316K_0402_1%
1
#Circuit Design
PC320
PR317
1
PR318
422K_0402_1% 1. ACOK,ILIM pull high voltage need base on 3/5V enable control
VIN 1 2 2. Use 10X10 choke and 3X3 H/L side MOSFET
2
Charge current 3.5A
2
Power loss : 1.82W

Power density : 0.81 (15X15)
3. If use 4S per cell 4.35V battery, need additional circuit
for ACDET(PR218/PR220/PR222 change to 0.1%, parallel resistors
with PR222 for ACDET setting)
2200P_0402_50V7K
EC_SMB_CK1 4. PC223 2200p is for quick response when AC plug out.

<39,45>
64.9K_0402_1%
5. For hybrid design, need double check PQ202,PQ203,PQ204,PQ205 component rating

100P_0402_50V8J
1
1
PC321
#Protect function
1
PC322
PR319
EC_SMB_DA1 <39,45>1. ACOVP : ACDET voltage > 3.14V

2
2. Charger timeout : No communication within 175s(default)

2
@ PR320
@PR320
3. ACOC : 3.33 X Input current DAC setting(default)
2
0_0402_5%
1 2
ADP_I <39,45> 4. CHGOCP : 3/4.5/6A based on current current setting
5. BATOVP : 103-106%
1
6. BATLOWV : 2.5V
@PC323
@ PC323
7. TSHUT : 155C
100P_0402_50V8J
8. IFAULT HI : 750mV (default)
2
4
Close EC chip 9. IFAULT LOW : 110mV (default) 4
Vin Dectector
Min. Typ Max.
L-->H 17.52V 18.01V 18.50V
H-->L 16.97V 17.59V 18.24V
VILIM = 20*ILIM*Rsr Issued Date 2013/12/26 Deciphered Date 2014/12/26 Title
ILIM = 3.3*100/(100+316)/20/0.02 CHARGER
WWW.AliSaler.Com
= 4.006 A Size
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Common Circuit 0.1
A B C D
A B C D E
Module model information

SY8208B_V2.mdd
SY8208C_V2.mdd
1 1
PR402
EN1 and EN2 dont't floating 499K_0402_1%
ENLDO_3V5V 1 2
B+
1
150K_0402_1%
PU401
B+
PR404
EMI@ PL401 7 1 3V5V_EN PC402 PR403
HCB2012KF-121T50_0805 IN EN1 0.01U_0402_25V7K 1K_0402_5%
2200P_0402_50V7K
1 2 3V_VIN 8 3 3V_FB 1 2 1 2
IN EN2 PR401 PC403
2
10U_0805_25V6K
10U_0805_25V6K
@EMI@ PC401
EMI@ PC404
0.1U_0402_25V6
6 1
BST_3V 2 1 2
BS
1
1
PC406
2.2_0603_5%
PC405
0.1U_0603_25V7K
PL402
2
2
10 LX_3V 1 2
@ LX +3VALWP
4.7_1206_5%
@EMI@ PR405
9 4 1.5UH_PCMB053T-1R5MS_6A_20%
GND OUT
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
2 5
+3VALWP PG LDO +3VLP
PC407
PC408
PC409
PC410
1
SY8208BQNC_QFN10_3X3
2
PC411
13V_SN
4.7U_0603_6.3V6K
2
1
Check pull up resistor of SPOK at HW side
680P_0603_50V7K
@EMI@ PC412
PR412
100K_0402_5%
3.3V LDO 150mA~300mA
2
2
2
<39> SPOK Vout is 3.234V~3.366V 2
TDC=6A
@ PJ401
+3VALWP 1 2 +3VALW
1 2
JUMP_43X118
Vout is 4.998V~5.202V +5VALWP 1

@ PJ402
2 +5VALW
B+ EMI@ PL403 1 2
HCB2012KF-121T50_0805 PU402
TDC=6A JUMP_43X118
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
1 2 5V_VIN 8 1 3V5V_EN PC413 PR406

IN EN1 6800P_0402_25V7K 1K_0402_5%
3 5V_FB 1 2 1 2
EN2
1
1
PC414
PC415
EMI@ PC417
@EMI@ PC418
PR407 PC416
6 BST_5V 1 2 1 2
BS 2.2_0603_5% 5*5*3
2
0.1U_0603_25V7K
@ PL404
9 10 LX_5V 1 2 +5VALWP
GND LX
4.7_1206_5%
@EMI@ PC425 @EMI@ PR408
VCC_3V 5 4 1.5UH_PCMB053T-1R5MS_6A_20%
VCC OUT
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
SPOK 2 7
PG LDO VL
1
PC419
PC420
PC421
PC422
PC423
3 3
4.7U_0603_6.3V6K
SY8208CQNC_QFN10_3X3
2
15V_SN
2
2
1
PC424
4.7U_0603_6.3V6K
680P_0603_50V7K
2
PR409
2.2K_0402_5%
<39> EC_ON 1 2
5V LDO 150mA~300mA
@ PR410
<39,45> MAINPWON 1 2
0_0402_5%
3V5V_EN
1M_0402_1%
4.7U_0402_6.3V6M
1
EC VDD0 is +3VL, PC426 UNPOP

1
PR411
PC426
EC VDD0 is +3VALW, PC426 POP

2
2
4 4

+3VALW/+5VALW
A B C D E
5 4 3 2 1

RT8207M_V1.mdd For Single layer
RT8207M_V2.mdd For Dual layer
D D
Pin19 need pull separate from +1.5VP.

If you have +1.5V and +0.75V sequence question, 0.75Volt +/- 5%
EMI@ PL501
HCB2012KF-121T50_0805
you can change from +1.5VP to +1.5VS. TDC 0.7A
B+ 1 2 1.35V_B+ PR501 Peak Current 1A
2.2_0603_5%
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
BST_1.35V 1 2 BOOT_1.35V
+1.35VP
1
1
@EMI@ PC502
PC503
PC504
PC505
DH_1.35V +0.675VSP
2
2
EMI@
10U_0805_6.3V6K
10U_0805_6.3V6K
SW_1.35V
1
PC501
PC506
PC507
5
0.1U_0603_25V7K
16
17
18
19
20
2
C PU501 C
2
PHASE
UGATE
BOOT
VTT
VLDOIN
21
PQ501 PAD
AON7408L_DFN8-5 4 DL_1.35V 15 1
LGATE VTTGND
1.364V 1.1%
14 2
PL502 PR502 PGND VTTSNS
1
2
3
1UH_11A_20%_7X7X3_M 13.7K_0402_1%
1 2 1 2 CS_1.35V 13 3
+1.35VP PC508 CS RT8207MZQW_WQFN20_3X3 GND
1
1U_0603_10V6K
5
1 2 12 4 VTTREF_1.35V
VDDP VTTREF
H=4.5 @EMI@ PR503 PR504
ESR=9m ohm
330U_2.5V_ESR17M_6.3X4.5
4.7_1206_5% 5.1_0603_5%
330U_D2_2V_Y
1 1
SF000002Z00 PQ502 1 2 VDD_1.35V 11 5
1 2
+5VALW VDD VDDQ

+1.35VP
1
+ +
PC509
PC511
PGOOD
AON7506_DFN33-8-5
ESR=15m ohm 4 PC510
TON
1
@EMI@ PC512 0.033U_0402_16V7K
FB
S5
S3
2
2 2@ 680P_0402_50V7K PC513
+5VALW
2
1U_0603_10V6K
10
6
1
2
3
FB_1.35V
EN_0.675VSP
TON_1.35V
EN_1.35V
PR506
8.2K_0402_1%
PR507 1 2 +1.35VP
887K_0402_1%
B 1.35V_B+ 1 2 B
MOSFET: 3x3 DFN
H/S Rds(on): 27mohm(Typ), 34mohm(Max)
1
Co-Lay Idsm: 7.5A@Ta=25C, 5.5A@Ta=70C
@ PR509 PR508
0_0402_5% 10K_0402_1%
L/S Rds(on): 9.9mohm(Typ), 13mohm(Max) <39,43> SYSON 1 2
2
Mode Level +0.75VSP VTTREF_1.5V Idsm: 13.5A@Ta=25C, 11A@Ta=70C
S5 L off off
1
@ PC514
S3 L off on Choke: 7x7x3 0.1U_0402_10V7K
S0 H on on
2
Rdc=8.3mohm(Typ), 10mohm(Max) @ PR510
0_0402_5%
Note: S3 - sleep ; S5 - power off <39,43,49,50> SUSP# 1 2
Switching Frequency: 285kHz
@ PJ501
Ipeak=10A 1 2
+1.35VP 1 2 +1.35V
Iocp~13A
1
JUMP_43X118
OVP: 110%~120% @ PC515 @ PJ502
VFB=0.75V, Vout=1.515V 0.1U_0402_10V7K 1 2
2
1 2
MOSFET footprint: SIS412DN JUMP_43X118
@ PJ503
1 2
+0.675VSP 1 2 +0.675VS
JUMP_43X39
A A

Title
Compal Electronics, Inc.
Issued Date 2013/12/26 Deciphered Date 2014/12/26
+1.35VP/+0.675VSP
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5 4 3 2 1
5 4 3 2 1
D D

SY8208D_V1.mdd
EN pin don't floating

If have pull down resistor at HW side, pls delete PR603
@ PR602
0_0402_5%
1 2 SUSP# <39,43,48,50>
C C
1
@ PR603 @ PC602
1M_0402_1% 0.22U_0402_10V6K
2
2
@EMI@ PR604 @EMI@ PC603
4.7_1206_5% 680P_0603_50V7K
EMI@ PL601 1 2SNB_1.05V 1 2
HCB2012KF-121T50_0805 PU601
B+ 1 2 B+_1.05V 8
IN EN
1 @ PR601 PC601 TDC 8A
0_0603_5% 0.1U_0603_25V7K
2200P_0402_50V7K
6 1
BST_1.05V 2 1 2
10U_0805_25V6K
10U_0805_25V6K
PL602
0.1U_0402_25V6
BS 1.062V 1.1%
1
1UH_11A_20%_7X7X3_M
LDO_3V
+1.05VSP
EMI@ PC605
@EMI@ PC606
PC604
PC607
9 10 LX_1.05V 1 2
GND LX
2
15.4K_0402_1%
47U_0805_6.3V6M
47U_0805_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
330P_0402_50V7K
1
1
PR606
4
FB
Rup
PC608
PC609
PC610
PC611
PC612
@ PR605
0_0402_5% ILMT_1.05V3 7
+3VALW
2
ILMT BYP
4.7U_0603_6.3V6K
2
2
ILMT_1.05V 2 5 LDO_3V
4.7U_0603_6.3V6K
PG LDO
1
PC614
1
PC613
SY8208DQNC_QFN10_3X3
FB = 0.6V
2
1
@ PR607
2
0_0402_5%
Rdown PR609
2
20K_0402_1%
2
+1.05VSP @ PJ601
Pin 7 BYP is for CS. 1
1 2
2
+1.05VS
B
The current limit is set to 8A, 12A or 16A when this pin Common NB can delete +3VALW and PC614 B
JUMP_43X118
is pull low, floating or pull high
VFB=0.6V
Vout=0.6V* (1+Rup/Rdown)
Vout=1.05V
A A

+1.05VSP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
5 4 3 2 1
5 4 3 2 1
+3VS +5VALW
Ultra Low Dropout 0.23V(typical) at 3A Output Current
1
D D
1
PC702
1
@ PJ701 1U_0402_6.3V6K
JUMP_43X79
2
2
2
PC703 PU701
1
4.7U_0603_6.3V6K APL5930KAI-TRG_SO8
6
1.507V 0.53%
5 VCNTL 3
2
PR701 9 VIN VOUT 4 @ PJ702
100K_0402_5% VIN VOUT
+1.5VSP +1.5VSP 1
1 2
2 +1.5VS
1
<39,43,48,49> SUSP#
20K_0402_1%
1 2 8
EN
1
7 2 JUMP_43X79
GND
POK FB
PR703
PC704
1
Rup 0.01U_0402_25V7K
0.1U_0402_16V7K
1
PC701
PR704 PC705
2
47K_0402_5% FB=0.8V 22U_0603_6.3V6M
2
2
1
PR705
Rdown 22.6K_0402_1%
2
C C
Ultra Low Dropout 0.23V(typical) at 3A Output Current
B B
A A

+1.5VSP
5 4 3 2 1
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5 4 3 2 1
Module design of ISL95812 VR PROG1(PR810) set 102K ohm to IccMAX 3 phase 84A/ 2 phase 56A
AON6552_DFN5X6-8-5
CPU_B+
0.22U_0603_25V7K
For 47W/37W processor PROG2(PR805) set 49.9K ohm to Vboot 1.7V / 600KHz
47W@ PC802
PROG3(PR808) set 3.24K ohm to 12mV/us (2-ch CCM)
47W@ PQ802
10U_0805_25V6K
10U_0805_25V6K
5
2
1
1
47W@ PC803
47W@ PC804
47W@ PC805
1
1U_0603_10V6K
PR801 130_0402_1%
2
+VCCIO_OUT 47W@ PR802
2
1 2 2.2_0603_5% 4
2
47W@ PR803
D
+5VS 47W@ PU802 0_0603_5% D
PC801
3
2
1
PR804 54.9_0402_1% 6 1 UGATE3 1 2
1 2 1 2 VCC UGATE 47W@ PL802
7 2 BOOT3 0.22UH 20% PCME064T-R22MS0R985 28A
FCCM BOOT
1U_0402_6.3V6K PWM3 3 8 CPU_PHASE3 1 4 +CPU_CORE
@EMI@ PR806
PR805 PWM PHASE
4.7_1206_5%
5
<9> VR_SVID_DAT 49.9K_0402_1% 4 5 LGATE3 P3_SW 2 3 P3_VO
1
1 2 9 GND LGATE 47W@ PQ804
<9> VR_SVID_ALRT# TP AON6554_DFN5X6-8-5 47W@PR807
47W@ PR807 100K_0603_1%
PR808 ISL6208BCRZ-T_QFN8_2X2
<9> VR_SVID_CLK 3.24K_0402_1% 1 2
1 2 4
2
SNB_CPU_P3 ISEN3
@EMI@ PC806
2
3.65K_0603_1%
@ PR809 PR810
47W@ PR811
47W@ PR812
680P_0603_50V7K
0_0402_5% 102K_0402_1%
1
1 2 1 2 @47W@ PR813
10_0402_1%
+5VS
3
2
1
VR_ON P1_VO 1 2
100K_0402_1%
1
BOOT2
UGATE2 @47W@ PR814
PR815 1.91K_0402_1%
ISUMP
PHASE2 Vboot=1.7V P2_VO 1 2
ISUMN
1 2 SDA 100K_0402_1%
+3VS ALERT# @ PR816 FSW: 400KHz
<39> VGATE PC807 0_0402_5%
1U_0603_10V6K IccTDC IccMax OCP R_DC_LL
32
31
30
29
28
27
26
25
VCORE_VDDP 2
PC808 1 2 TDC at PL2
680P_0402_50V7K Max Current
37W: INSTALL for 40 seconds
ALERT#
SDA
SLOPE/PROG1
PROG3
PROG2
BOOT2
UGATE2
PHASE2
1 2 TDC in Turbo Mode
starting from
47W: @ 47W idle state
SCLK 1 24 LGATE2
PR818 VR_EN 2 SCLK LGATE2 23 37W@ PR817 27A 33A 85A 102A -1.5 mV/A
97.6K_0402_1% PGOOD 3 VR_ON VDDP 22 PWM3 1 2
PGOOD PWM3
C
1 2 IMON 4
IMON LGATE1
21 LGATE1
0_0402_5% 37W 21A 26A 55A 66A C
5 20 PHASE1
<39> VR_HOT# VR_HOT# NTC 6 VR_HOT# PHASE1 19 UGATE1
NTC UGATE1 0.22UH 20% PCME064T-R22MS0R985 28A
Place close to PH801
COMP 7
COMP BOOT1
18 BOOT1 Power Dissipation: H/S 1.0974W
PR819 FB 8
FB VIN
17 DCR=0.98m ohm
phase 1 MOSFET 1 2NTC_PH2 1 2 @ PR820 L/S 0.4311W
FB2/VSEN
0_0402_5% SH00000OY00_7*7*4_600KHz
with one L/S 1.586W
ISUMN
ISUMP
ISEN3
ISEN2
ISEN1
470K_0402_5%_B25/50 4700K 5.62K_0402_1% 33 1 2 CPU_B+ EMI@ PL803
VDD
RTN
PAD HCB2012KF-121T50_0805
1
PC809 CPU_B+ 1 2
0.22U_0603_25V7K
PR821 B+
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
47P_0402_50V8J 9 PU801
10
11
12
13
14
15
16
5
PC810
1 2 PR822 ISL95812HRZ-T_QFN32_4x4
AON6552_DFN5X6-8-5
@EMI@ PL805
2
PQ805
1 2 HCB2012KF-121T50_0805
27.4K_0402_1%
1
PC811
PC812
PC813
1 2
2
6.04K_0402_1% PR823
0_0603_5%
2
UGATE2 1 2 4
VRHOT Assert Threshold : 0.92V PR824
TSENSE Bias Current : 60uA 1_0402_5% +5VS
1 2
PH801=17.926K, 100C active PL804
0.22UH 20% PCME064T-R22MS0R985 28A
3
2
1
Reset Threshold: 0.96V, 94C active
1
PC815 PHASE2 1 4
100C Assert Threshold: PR821=27.4K PR825 220P_0402_50V7K PC814 +CPU_CORE
@EMI@ PR827
2200P_0402_25V7K
1K_0402_1% PC817
110C Assert Threshold: PR821=66.5K 1 2 1 2 FB_PR1040 PR826 PR828 P2_SW2 3 P2_VO
1
1U_0603_10V6K
4.7_1206_5%
2
1
5
2.2_0603_5% 0.22U_0603_25V7K
PC816
3.65K_0603_1%
37W: PR829=1.65K BOOT2 1 2 1 2 PQ806 1 2
511_0402_1%
47W@ PR830
47W@ PR829
47W: PR829=2.55K PR831
2
2.55K_0402_1% 100K_0603_1%
37W: PR830=470 SNB_CPU_P2
2
1 2 1 2
47W: PR830=511
680P_0603_50V7K
LGATE2 4
1
1
ISUMP
ISEN2
1
1
PR832 PR835
@EMI@ PC818
1.5K_0402_1%
2
1
1.82K_0402_1% PR833 37W@ PR829 @ PR836 10_0402_1%

1
PC819
PR822 set 6.04K ohm to slope
PR834
2K_0402_1% 1.65K_0402_1% 37W@ PR830 AON6554_DFN5X6-8-5 P1_VO 1 2
3
2
1
2
B 470_0402_1% 100K_0402_1% B
PR830 set 665 ohm to OCP 102A
1 2
2
56P_0402_50V8J
2
1 2
@47W@ PR837
PR829 set 2.55K ohm to LL 1.5m
2
ISUMN
PC820 P3_VO 1 2
8200P_0402_25V7K PC821 100K_0402_1%
2
330P_0402_50V7K
2
37W: PC822=0.10U
47W@ PC822
ISEN3 0.15U_0402_10V 47W: PC822=0.15U CPU_B+
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
1 2
0.1U_0402_25V6
1
100U_25V_M
AON6552_DFN5X6-8-5
Max Height: +
PQ801
PC823
ISEN2
1
PC823:8mm
PC825
PC826
PC827
@EMI@ PC828
EMI@ PC829
PC824 37W@ PC822
0.1U_0603_25V7K 0.1U_0402_10V7K PR839
ISEN1 PR838 1 2 0_0603_5% 2
2
0_0402_5% UGATE1 1 2 4
PC831 1 2
0.022U_0402_25V7K @ PC830
1 2 0.033U_0603_16V7K PL801
1 2 0.22UH 20% PCME064T-R22MS0R985 28A
3
2
1
PC832
0.022U_0402_25V7K <9> VCCSENSE PHASE1 1 4
1 2 ISUMN PR841 +CPU_CORE
PR840
@EMI@ PR842
11K_0402_1% P1_SW 2 3 P1_VO
1
@ PC834
4.7_1206_5%
5
47W@ PC833 1 2 2.2_0603_5% PC835
0.022U_0402_25V7K 1 2 BOOT1 1 2 1 2 PQ808
1 2 PR845 PR843
0.082U_0402_16V7K
0.1U_0402_16V7K
PR844
1
330P_0402_50V7K
PC837
PH802 0.22U_0603_25V7K 3.65K_0603_1% 100K_0603_1%

1
1 2 1 2
PC836
10K_0402_5%_ERTJ0ER103J 2.61K_0402_1%
2
1 2 1 2 LGATE1 4 SNB_CPU_P1
2
ISEN1
@
2
1
ISUMP
680P_0603_50V7K
PC838
1
Place close to
@EMI@ PC839
1 2 @ PR846 PR847
phase 1 inductor ISUMP AON6554_DFN5X6-8-5 P2_VO 1 2 10_0402_1%
3
2
A
0.01U_0402_25V7K 1 A
2
100K_0402_1%
ISUMN 2
ISUMN @47W@ PR848
<10,9> VSSSENSE Module model information P3_VO 1 2

100K_0402_1%
ISL95812_V1A.mdd for IC portion

Local sense put on HW site
ISL95812_V1B.mdd for SW portion Compal Electronics, Inc.
Title
CPU_CORE/GFX_CORE
0.1

5 4 3 2 1
5 4 3 2 1
3 X 330u/9m(47W)
2 X 330u/9m(37W)
24 pcs 22uF and reserve 4 pcs
PWR Rule 2013/08/16
需確認最新SPEC.
2 X 330u/9m(47W)
Modify 8/6. 26 pcs 22uF
D D
2013/08/28
+CPU_CORE +CPU_CORE +CPU_CORE
1 1 1
1
1
+
22U_0603_6.3V6M
PC901
22U_0603_6.3V6M
PC902
22U_0603_6.3V6M
PC903
22U_0603_6.3V6M
PC904
22U_0603_6.3V6M
PC905
22U_0603_6.3V6M
PC906
22U_0603_6.3V6M
PC907
22U_0603_6.3V6M
PC908
22U_0603_6.3V6M
PC909
22U_0603_6.3V6M
PC910
+ PC911 + PC912 47W@
PC913
330U_D2_2.5VY_R9M 330U_D2_2.5VY_R9M
2 330U_D2_2.5VY_R9M
2
2
2 2
1
1
22U_0603_6.3V6M
PC914
22U_0603_6.3V6M
PC915
22U_0603_6.3V6M
PC916
22U_0603_6.3V6M
PC917
22U_0603_6.3V6M
PC918
22U_0603_6.3V6M
PC919
22U_0603_6.3V6M
PC920
22U_0603_6.3V6M
PC921
22U_0603_6.3V6M
PC922
22U_0603_6.3V6M
PC923
2
2
C C
1
1
22U_0603_6.3V6M
PC925
22U_0603_6.3V6M
PC924
22U_0603_6.3V6M
PC926
22U_0603_6.3V6M
PC927
22U_0603_6.3V6M
PC928
22U_0603_6.3V6M
PC929
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
@ @ @ @
PC930
PC931
PC932
PC933
2
2
B B
A A

CPU_CORE_CAP
WWW.AliSaler.Com
5 4 3 2 Date: Tuesday, May 27, 2014 1 Sheet 52 of 56
5 4 3 2 1
D D

SY8208D_V1.mdd
EN pin don't floating

If have pull down resistor at HW side, pls delete PR1002
@ PR1001
0_0402_5%
EN_+1.5VSDGPUP 1 2 1.5VS_DGPU_PWR_EN <39,43,48,50>
C C
1
@ PR1002 VGA@ PC1001
1M_0402_1% 0.22U_0402_10V6K
2
2
@VGA_EMI@ PR1004 @VGA_EMI@ PC1002
4.7_1206_5% 680P_0603_50V7K
VGA_EMI@ PL1001 1 2 1 2
HCB2012KF-121T50_0805 VGA@ PU1001
B+ 1 2 +1.5VSDGPUP_B+ 8
IN EN
1 @ PR1003 VGA@ PC1003 TDC 8A
0_0603_5% 0.1U_0603_25V7K
2200P_0402_50V7K
6 1
BST_+1.5VSDGPUP 2 1 2
10U_0805_25V6K
10U_0805_25V6K
VGA@ PL1002
0.1U_0402_25V6
BS 1.062V 1.1%
1
1UH_11A_20%_7X7X3_M
LDO_3V_+1.5VSDGPUP
+1.5VSDGPUP
VGA_EMI@ PC1004
@VGA_EMI@ PC1005
VGA@ PC1006
VGA@ PC1007
9 10 SW_+1.5VSDGPUP 1 2
GND LX
2
VGA@ PR1005
30.1K_0402_1%
47U_0805_6.3V6M
47U_0805_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
330P_0402_50V7K
1
1
VGA@ PC1010
VGA@ PC1011
VGA@ PC1012
VGA@ PC1013
VGA@ PC1014
4
FB
@ PR1007
0_0402_5% 3
ILMT_1.5VSDGPUP 7
Rup
+3VALW
2
ILMT BYP
4.7U_0603_6.3V6K
2
2
ILMT_1.5VSDGPUP 2 5 LDO_3V_+1.5VSDGPUP
4.7U_0603_6.3V6K
PG LDO
1
VGA@ PC1008
1
VGA@ PC1009
SY8208DQNC_QFN10_3X3
@ PR1008 FB = 0.6V
2
1
0_0402_5%
2
Rdown VGA@ PR1006

2
24K_0402_1%
2
@ PJ1001
Pin 7 BYP is for CS. +1.5VSDGPUP 1
1 2
2
+1.5VSDGPU
B
The current limit is set to 8A, 12A or 16A when this pin Common NB can delete +3VALW and PC614 B
JUMP_43X118
is pull low, floating or pull high
VFB=0.6V
Vout=1.05V
A A

+1.5VSDGPUP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
5 4 3 2 1
A B C D
Module model information:

Vboot=Vvref*Rref2/(Rref1+Rref2+Rboot) Current Limit threshold setting Different VGA Chip (different EDP-Peak Current) need select different solution
RT8813A_V1A for IC module Rocset= (Ivalley * Rds(on) + 40 mV) / 10uA
Rt=Rrefadj // (Rboot+Rref2)
RT8813A_V1B for SW module
Vmin= Vvref*[Rref2/(Rref2+Rboot)]*[Rt/(Rref1+Rt)] I_ripple=(19-0.9)*0.9/ VGA Chip N14P-GV N14P-GV2 N14M-GS N14M-LP N14P-LP N14P-GE N14P-GS N14P-GT N15S-GT N15V-GM
Vmax=Vvref*Rref2/[(Rref1//Rrefadj)+Rboot+Rref2] (304.89Khz*0.36u*19)=7.811A
OpenVReg Configurations Config B Config B Config B Config B Config B Config B Config B Config B Config B Config D
Vout=Vmin+N*Vstep OCP=54A/2=27A per phase
Vstep=(Vmax-Vmin)/Nmax Ivalley=27A-7.811A/2=23.1A Rated TDP Power at Tj=102C 18W 25W 18W 13W 18.9W 25W 25.6W 35.5W 18W 18.16W
PWM-VID Spec and component Values
Boosted GPU Total at Tj=102C 25W 32W 25W 20W 23W N/A 30W 40W 25W 24.72W
H-side MOS:AON6552 L-side MOS:AON6554
1 PWM-VID Spec Config A Config B Config C Config D Rds(on): Rds(on): 1
EDP-Continuous at Tj=102C 24A 32A 26A 22A 25A 27A 38A 45A 31A 29.2A
Vmin 0.6V 0.6V 0.65V 0.9V 5.6mohm@Vgs=10V 3.2mohm@Vgs=10V
Vmax 1.2V 1.2V 1.15V 1.15V 6.7mohm@Vgs=4.5V 3~3.8mohm@Vgs=4.5V EDP-Peak at Tj=102C 35A 55A 45A 35A 35A 40A 60A 75A 60A 44.3A
Id :20A@Ta=25 degC Id :85A@Ta=25 degC
Vboot 0.875V 0.9V 0.9V 1.028V
Istep max (Evaluation) 15A 27A 25A 20A 14A 12A 31.5A 35A
Voltage step 6.25mV 6.25mV 25mV 12.5mV
Choke: 0.36uH (Size:10*10*4)
N of Voltage level 96 96 20 20 Rdc=0.82mohm +-5% OCP Setting Current 42A 66A 54A 42A 42A 48A 72A 90A 72A 54A
PWM Frequency 1.125 1.125 0.676 0.676 Heat Rating Current=37A
Saturation Current=40A Rocset 8.96K 12.45K 10.7K 8.96K 8.96K 9.83K 8.3K 9.39K 13K 10.2K
Rrefadj PR1206 39K 20K 39K 27K
Rref1 PR1204 39K 20K 30K 7.5K Recommendation 2phase 1H1L 2phase 1H1L 2phase 1H1L 2phase 1H1L 2phase 1H1L 2phase 1H1L 2phase 1H2L 2phase 1H2L 2phase 1H1L 2phase 1H1L
C=3*330uF (9mohm)=990uF
Rboot PR1205 1.5K 2K 3K 0 Vripple=Iripple*ESR(min)=7.811A*3mohm=23.4mV 6mohm * 3 4.5mohm * 3
Rref2=PR1209 PR1209 30K 18K 24K 6.2K Polymer Cap (330uF) 6mohm * 2 9mohm * 3 9mohm * 3 6mohm * 2 6mohm * 2 6mohm * 2 (L=0.22uH) (L=0.15uH)
+PR1212 PR1212 1.5K 0 3K 1.74K
C PC1209 1.5nf 2.7nf 1.8nf 5.6nf @VGA@ PR1202
Or OSCON (390uF) 10mohm * 3 10mohm * 3 10mohm * 3 10mohm * 3 10mohm * 3 10mohm * 3 NULL NULL GT@ GM@
1K_0402_5%
1 2 +3VS
PWM VID and Output voltage control GM@ PR1204
7.5K_0402_1%
1.Boot mode
1 2 DGPU_VID <23>
2.Standby mode (don't support) GPU_B+
3.Normal mode @VGA@ PR1203
0_0402_5% Operation phase Number PSI Voltage setting
GM@ PR1206
27K_0402_1% 1 phase with DEM 0V to 0.8V
1
VGA_EMI@ PL1201
1
B+
2 VGA@ PC1202 Rref1 GT@ 1 phase with CCM 1.2V to 1.8V HCB2012KF-121T50_0805 2
1U_0402_6.3V6K PR1204 1 2
2
GM@ PR1205 20K_0402_1% Active phase with CCM 2.4V to 5.5V

0_0402_5% @VGA_EMI@ PL1204
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
HCB2012KF-121T50_0805
0.1U_0402_25V6
Rboot Rrefadj
2
PSI Pull high on HW side VGA@ PR1208 1 2

GT@PR1205
GT@PR1205 GT@PR1206
GT@PR1206 @VGA@ PR1207 2.2_0603_5%
1
PSI <23>
@VGA_EMI@ PC1203
VGA_EMI@ PC1204
VGA@ PC1205
VGA@ PC1206
2K_0402_1% 20K_0402_1% 1 2 1
U2_BOOT1 2
1 2 1 2 VGA@ PQ1201
GM@ PR1209 0_0402_5% +VGA_CORE
AON6552_DFN5X6-8-5
1
2
5
18K_0402_1%
GT@ PR1209
6.2K_0402_1% @ PR1210 Pull high on HW side

1
EDP-Continuous 31A
2700P_0402_50V7K
GM@ PC1209 1K_0402_5% VGA@ PC1207

0.01U_0402_16V7K
@VGA@ PC1208
5600P_0402_50V7K 1 2 0.22U_0603_25V7K
VGA@ PR1226 3VSDGPU_MAIN_EN <23,43> 2 EDP-Peak 60A
1
1
OCP min 72A

GT@ PC1209
Rref2 10K_0402_1%
VGA@ PC1210
1 2 U2_UGATE1 1 2 4
1U_0402_6.3V6K
2
Dgpu_Pwr_En <16,43> VGA@ PR1211

2
1
2
GPU_REFADJ
GT@ PR1212
0_0603_5%
U2_UGATE1
1
0_0402_5%
GM@ PR1212
U2_BOOT1
C Reserve Location
GPU_VID
GPU_PSI
1.74K_0402_1% VGA@ PL1202

GPU_EN
3
2
1
0.22UH 20% FDUE0640J -H 25A +VGA_CORE
1 4
2
GPU_FBRTN U2_PHASE1
2 3
VGA@ PQ1202
6
5
VGA@ PU1201 VGA@ PQ1205 0.36uH_SH00000L400_10*10*4 (common: SH000011O00)
AON6554_DFN5X6-8-5
AON6554_DFN5X6-8-5
1
VGA@ PR1201
REFADJ
PSI
UGATE1
BOOT1
VID
EN
Rton 499K_0402_1% @VGA_EMI@ PR1213

GPU_B+ 1 2 4.7_1206_5%
1 GPU_REFIN 7 24 U2_PHASE1
@VGA@ PR1214 REFIN PHASE1 U2_LGATE1 4 4
2
<25> VSSSENSE_VGA 0_0402_5% GPU_VREF 8 23 U2_LGATE1
1 2 @VGA@ PC1201 VREF LGATE1
1
2 0.01UF_0402_25V7K 9 22
9.31K_0402_1%
GPU_TON U2_PWM3 U2_PWM3 @VGA_EMI@ PC1211
TON GND/PWM3
GT@ PR1216
GM@ PR1216 680P_0603_50V7K
3
2
1
3
2
1
1 2 GPU_FBRTN 10 21 9.31K_0402_1%
2
RGND PVCC
Rocset
1
11 20
TALERT/ISEN2
3 VGA@ PR1215 U2_LGATE2 3
2
100_0402_1% @VGA@ PC1212 VSNS LAGTE2
TSNS/ISEN3
VCC/ISNE1
47P_0402_50V8J GPU_COMP 12 19 U2_PHASE2

2
SS PHASE2
UGATE2
PGOOD
@VGA@ PR1217
BOOT2
1 2 GPU_FB
GND
<25> VCCSENSE_VGA 0_0402_5%

@VGA@ PC1213 RT8813AGQW_WQFN24_4X4
25
13
14
15
16
17
18
1 2 Css 0.01U_0402_16V7K
+VGA_CORE 1 2
VGA@ PR1218 GPU_B+
GPU_DSBL/ISEN1
GPU_TSNS/ISEN3
100_0402_1%
VGA_PWROK
U2_UGATE2
GPU_HOT#
VGA@ PR1219
U2_BOOT2
2200P_0402_50V7K
2.2_0603_5% VGA@ PQ1203
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
@VGA_EMI@ PC1215
VGA_EMI@ PC1216
VGA@ PC1217
VGA@ PC1218
U2_BOOT2 1 2
AON6552_DFN5X6-8-5
5
1
1
VGA@ PC1214
0.22U_0603_25V7K
2
GPU_VREF 2
1. VSNS Soft-Start time (Internal) is 0.7ms (PC1213 un-pop) U2_UGATE2 1 2 4
Tss=(Css*Vrefin)/Iss+2.3ms
VGA@ PR1221
18.7K_0402_1%
=0.01U*0.9V/5uA+2.3ms=4.1ms (PC1213 pop) VGA@ PR1220

1
+3VS 0_0603_5%
VGA@ PL1203
2013/10/28 update PH1201 chang
3
2
1
2. Switching frequency setting: +VGA_CORE
0.22UH 20% FDUE0640J -H 25A
470K_0402_5%_TSM0B474J4702RE
Fsw=(Vin-0.5)/(2*Vin*Rton*3.2p)=304.89Khz
1
U2_PHASE2 1 4
Common part SL200002E00
10K_0402_1%
VGA@ PR1222
2 3
3. Thermal monitoring: VGA@ PQ1204
1
5
VGA@ PC1219
VGA@ PQ1206
1U_0402_6.3V6K
AON6554_DFN5X6-8-5
AON6554_DFN5X6-8-5
2
(VGPU_VREF-VTSNS)/PR23=VTSNS/Rth
1
+5VS @VGA_EMI@ PR1223
1
VGA@ PH1201
4.7_1206_5%
VGA_PWROK <23,43>
T_min T_typical T_max
2
U2_LGATE2 4 4
1 2
4 4
PR1221=18.7K 96.73C 100C 103.1C VGA@ PR1224

2.2_0603_5% @VGA_EMI@ PC1220
1 2 3 680P_0603_50V7K
2
1
3
2
1
2
PR1221=13K 106.38C 110C 113.4C
1
VGA@ PR1225
+3VS 1 2 VGA@ PC1221
1U_0402_6.3V6K
2
100K_0402_1%
RT8813
WWW.AliSaler.Com
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
A B C D
A
B
C
D
2 1 2 1 2 1
VGA@ PC1331 VGA@ PC1315 VGA@ PC1305

1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K
2 1 2 1 2 1
5
5
+VGA_CORE

1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K
2 1 2 1 2 1

1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K
2 1 2 1 2 1

1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K
2 1 2 1 2 1

1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K
2 1 2 1 2 1
VGA@ PC1336 @ PC1320 VGA@ PC1310

1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K
Under VGA Core
2 1 2 1 2 1
VGA@ PC1337 @ PC1321 VGA@ PC1311

1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K
2 1 2 1
VGA@ PC1338 VGA@ PC1312

1U_0402_6.3V6K 4.7U_0603_6.3V6K
4
4
2 1 2 1
@ PC1339 VGA@ PC1313

1U_0402_6.3V6K 4.7U_0603_6.3V6K
2 1 2 1
@ PC1340 VGA@ PC1314

1U_0402_6.3V6K 4.7U_0603_6.3V6K
Issued Date
Security Classification
2013/12/26
2 1
3
3
2
1
2
1
+
VGA@ PC1341 VGA@ PC1322 @ PC1301

4.7U_0603_6.3V6K 22U_0603_6.3V6M 560U_D2_2VM_R4.5M
+VGA_CORE
2 1
2
1
Co-Lay
2
1
+

4.7U_0603_6.3V6K 22U_0603_6.3V6M VGA@ PC1302
2 1 560U_2.5V_M
+VGA_CORE
2
1

4.7U_0603_6.3V6K 22U_0603_6.3V6M
2 1
Compal Secret Data

2
1
2
1
+
Deciphered Date
Near VGA Core
VGA@ PC1344 VGA@ PC1325 @ PC1303

4.7U_0603_6.3V6K 22U_0603_6.3V6M 330U_D2_2V_Y
2 1
2
1
Co-Lay
2
1
+

4.7U_0603_6.3V6K 22U_0603_6.3V6M VGA@ PC1304
2 1 390U_2.5V_ESR10M_6.3X6
2
1

4.7U_0603_6.3V6K 22U_0603_6.3V6M
2014/12/26
2 1
2
1

4.7U_0603_6.3V6K 22U_0603_6.3V6M
2
2
2
1
VGA@ PC1329
22U_0603_6.3V6M
2
1
VGA@ PC1330
22U_0603_6.3V6M
Title
Date:
2
1
Custom
Near
N15x
@ PC1348
22U_0603_6.3V6M
Under
2
1
@ PC1349
22U_0603_6.3V6M
Size Document Number
N14x
Near
2
1
@ PC1350
Under
22U_0603_6.3V6M
Tuesday, May 27, 2014
2
1
@ PC1351
22U_0603_6.3V6M
2
1
47uF_0805_0pcs
@ PC1352
22U_0603_6.3V6M
VGA_CORE CAP
1
1
Sheet
2
1
@ PC1353
22U_0603_6.3V6M
55
Compal Electronics, Inc.
22uF_0805_1pcs
47uF_0805_1pcs
2
1
of
@ PC1354
4.7uF_0805_5pcs
0.1uF_0402_4pcs
22U_0603_6.3V6M
4.7uF_0603_10pcs
1uF_0402_8pcs stuff 2
56
Rev
4.7uF_0805_5pcs stuff 2
22uF_0805_14pcs stuff 7
0.1
A
B
4.7uF_0603_15pcs stuff 2
C
D
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 2

for PWR
Item Fixed Issue Reason for change PG# Modify List Date Phase
1 Reduce 0 ohm count Change PR510, PR602, PR607, PR809, PR816, PR820 to R-short 4/1 DVT
2 HW request Change VRAM voltage to raise VRAM sequence 53 Change PR1006 to SD034240280 4/1 DVT
3
D D
Improve CPU transient 51 Change PR818 to SD034976280 4/1 DVT
4 Reduce 0 ohm count Change PR601, PR1001, PR1003, PR1008 to R-short 5/2 PVT
5 Component PN from M0 to 80 51 Change PC820 PN from SE0000006M0 to SE000000680 5/5 PVT
6 CPU low-side MOS selete 51 PQ804, PQ806, PQ808 from AON6414 change to AON6508 5/5 PVT
7 CPU TAT show VR thermal Alrt 51 change PR819 from 3.42K to 5.62K (active from 96'C to 106'C) 5/12 PVT
8 slewrate from ULV change to SV 51 PR808 from 16.9K to 3.24K (from 53mV/us to 12mV/us) 5/12 PVT
9 CPU low-side MOS selete 51 PQ804, PQ806, PQ808 from AON6508 change to AON6554 5/15 PVT MEMO
10 Thermal team change PH1 setting 45 PR216 from 16.9K to 26.1K (92'C active change to 85'C active) 5/15 PVT MEMO
C C
12
B B
13
14
15
16
A 17 A

PIR (PWR)
5 4 3 2 1

Compal Confidential: EA50 - HWS M/B Schematics Document Intel Shark Bay SV (Haswell+ Lynx Point)

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Compal Confidential: EA50 - HWS M/B Schematics Document Intel Shark Bay SV (Haswell+ Lynx Point)

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1 2 3 4 5

Nvidia N15S-GT / N15V-GM

DAZ17F00100 PCB Z5WAW LA-B702P LS-B161P/B162P

Security Classification Compal Secret Data Compal Electronics, Inc.

page 23~29 Intel

port 4 page 31 page 40

Card Reader RJ45 conn.

RTC CKT. Sub Board

Security Classification Compal Secret Data Compal Electronics, Inc.

Power Plane Description S1 S3 S5 Full ON HIGH HIGH HIGH HIGH ON ON ON ON

10 130K +/- 1% 1.849 V 1.865 V 1.881 V 0x88-0x96

PCH SM Bus address

0 0.1 Connector CONN@

Security Classification Compal Secret Data Compal Electronics, Inc.

Haswell rPGA EDS

Security Classification Compal Secret Data

H_PECI AR27 CATERR SM_RCOMP_2 AN3 H_DRAMRST#

E27 SSC_DPLL_REF_CLKN BPM_N_4 AN28 For ESD XDP_TRST# 6 3

<14> PM_DRAM_PWRGD PM_DRAM_PWRGD

Security Classification Compal Secret Data Compal Electronics, Inc.

Haswell rPGA EDS

Security Classification Compal Secret Data

HDMI_TX2- 0.1U_0402_16V7K 1 2 C410 CPU_DP2_N0 T28 M27 EDP_AUXN <31>

Security Classification Compal Secret Data Compal Electronics, Inc.

CFG Straps for Processor

PEG Static Lane Reversal - CFG2 is for the 16x

1: Normal Operation; Lane # definition matches

INTEL_HASWELL_HASWELL 9 OF 9 11: (Default) x16 - Device 1 functions 1 and 2 disabled

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB

Security Classification Compal Secret Data Compal Electronics, Inc.

Haswell rPGA EDS +CPU_CORE

+VCCIO_OUT AN35 RSVD VCC AF29

1 1 1 1 1 1 1 1 1 1 R89 AR32 AH31

10K_0402_5% AL26 AH33

Security Classification Compal Secret Data

Haswell rPGA EDS Haswell rPGA EDS

D A10 AK34 B34 K10 D

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR3L SO-DIMM A <6> DDR_A_DQS[0..7]

1 203 204 +0.675VS

<6> DDR_CKE2_DIMMB DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB

Security Classification Compal Secret Data Compal Electronics, Inc.

R338 1 2 330K_0402_5% PCH_INTVRMEN U4A LPT_PCH_M_EDS

PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TDI

R122 R123 R343

W=20mils trace width 10mil W=20mils

<4> DMI_CTX_PRX_N0 DMI_CTX_PRX_N0 AW22

+1.5VS 1 2 DMI_RCOMP AY17

AEPWROK can be connect to

<39,51> VGATE A 4 SYS_PWROK 1 @ 2 SYS_PWROK_EC

Security Classification Compal Secret Data

R2611 1 2 2.2K_0402_5% PCH_CRT_CLK

R2612 1 2 2.2K_0402_5% PCH_CRT_DATA

PCH_CRT_B T45 R40 HDMICLK_NB HDMICLK_NB <32>

Y43 AB35 CLK_PEG_VGA#

RP9 +3VS XTAL25_OUT 1 2

Security Classification Compal Secret Data Compal Electronics, Inc.

+3V_SPI for Share EC ROM, +3VS change to +3VALW +3VS

2ROM is SPI ROM 2M + 4M Byte

Security Classification Compal Secret Data

GPIO8 Weak internal pull-high but requires an

R248 1 @ 2 10K_0402_5% PCH_GPIO1 F13