DESIGN OF A LOW-POWER, IMPLANTABLE ELECTROMYOGRAM AMPLIFIER
Ravi S. Ananth1 and Edward K. Lee2
rananth@aemf.org, kimlee@usc.edu
Alfred Mann Foundation for Scientific Research1, Valencia, California, USA 91355
Alfred Mann Institute at the University of Southern California2, Los Angeles, CA, 90089
ABSTRACT
This paper describes the design of a low-power BiCMOS
preamplifier for electromyogram signal detection in an
implantable neural prosthetic device. The device is
inductively powered and has to detect bioelectric signals
in the range of 10 Hz to 10 kHz in the presence of large
dc voltages at the detection electrodes. This was achieved
by using a feedback loop to set the input common-mode
voltage and obtain a high impedance input and biasing
structure allowing then, the use of low-valued dc blocking
capacitors. The proposed amplifier was designed and
fabricated to provide a nominal differential voltage gain
of 100, an ac input impedance of over 80 M: and an
input referred noise voltage of 9.7uVrms in the 10 Hz to
10 kHz bandwidth. The amplifier consumes 122uW
(37uA) when operating off a 3.3V supply and occupies an
area of 0.125 mm2 using a double-metal 0.8um BiCMOS
process.
1. INTRODUCTION
The requirement for implantable neural prosthetic devices
necessitates an integrated circuit implementation of
bioelectric stimulators and sense amplifiers. Researchers
working on functional electrical stimulation (FES) of
paralyzed limbs are presently interested in sensing
electromyogram (EMG) signals for FES applications such
as foot-drop correction or hand grasp in tetraplegic
patients [1]-[2]. The device itself may be powered by an
inductively rechargeable battery or through constant
inductive coupling from an RF field [3]-[4]. Due to the
extremely poor inductive power coupling to the implanted
device, power consumption by the implant electronics
becomes restrictive. Figure 1 illustrates the situation
where the implantable device is powered through
inductive coupling via inductor L and uses the electrodes
for both stimulation and EMG sensing. Anodized
tantalum is used for one of the electrodes and an iridium
electrode is used as the return path. The dual electrodes in
combination with the tissue, creates a large valued
tantalum capacitor (CT) that can be used for charge
storage [5]. Stimulation is achieved by discharging the
stored voltage present on the inherent electrode-tissue
capacitance with a controlled current source, ISt through
;‹,(((
the muscle tissue. The storage capacitor is recharged, by
reversing the direction of current flow through the tissue
using another controlled current source, ICh [4]. The
electrode capacitance can typically range between 3 uF to
10 uF. As a note, the recharge current is much smaller in
magnitude and occurs over a longer time period so that
the muscle does not get stimulated. This operation ensures
that critical charge balance on the tissue is maintained.
The stimulation voltage stored on CT , needs to be in the
order of 10V to 20V to provide sufficient stimulation
current through tissue impedances of up to 1 k:. As a
result, when both stimulation and EMG sensing are
desired using the same electrodes, dc isolation to the
preamplifier is required using blocking capacitors, due to
the low-voltage devices within the amplifier (shown as
‘EMG Amp’ in Figure 1).
Tantalum electrode
CT
RF powered implantable device
EMG
RT
L Amp.
Tissue
ISt ICh vEMG
Iridium electrode
Figure 1: Implantable Device for Stimulation and
EMG Sensing.
The power spectrum for the EMG lies primarily between
10 Hz and 3000 Hz with a peak around 100 Hz [6]. The
actual magnitude and peak spectral distribution can vary
as a function of electrode size, spacing and proximity to
the muscle being sensed. For the application of concern,
the specifications shown in Table 1 were used as a design
guideline. The detection of signals in the range of 10uV
and at very low frequencies, can pose a problem, given
the presence of ‘1/f’ noise amidst the other electronic and
biological noise sources. The need to detect very low
frequencies from the high source impedance of the muscle
tissue while still maintaining a dc-block from the
stimulation voltage source warrants the need for very
large input impedances. This is further compounded by
the practical constraints of packaging a high voltage
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blocking capacitor within the implantable device valued resistor can take up substantial die area. Hence,
structure, while obtaining a high-pass cut-off frequency of both the bias resistance and input impedance of the
10 Hz or less. amplifier play a significant role in obtaining a low
frequency, high-pass corner. In addition, the topology of
Table 1: Design Guideline for EMG Amplifier Figure 2 requires two amplifiers and hence twice the
current consumption of a single amplifier configuration.
Range of Tissue Impedance 100 to 1000 Ohms In order to maintain high input impedance while still
Range of EMG signal amplitude 10 uV to 10 mV using a single amplifier, the topology shown in Figure 3 is
proposed. Current mode feedback is used to obtain the
EMG Signal Bandwidth 10 Hz to 3000 Hz same differential closed loop gain, G, for the overall
Input Impedance of Amplifier > 20 M: amplifier [7]. The second stage amplifier D enhances the
input ac-impedance of Q1’s and Q2’s base impedance rS,
Supply Current off 3.3 V supply Less than 50 uA
so that the differential input impedance rin of the amplifier
becomes:
This paper describes a low-power BiCMOS amplifier that
2 RG 2
was designed and fabricated to meet the above constraints. r in | 2D g m ro (
R  2 RG
) rS (2)
F 2

2. PROPOSED CIRCUIT CONFIGURATION where RG2 is one half of the RG in Figure 2 and gm and ro
V b ia s are the transconductance of Q1 and the overall impedance
at the collector of Q1, respectively.
RB
CMFBC
QB IC IM IC QB
in + o u t+
C in
out+
D
out-
J
RF
RG in+ Q1 QM Q2 in-
RF RF

Vref
RF
C in RG2 RM RG2
in - o u t-

IT
RB
CMFBT

V b ia s
Figure 3: Proposed Amplifier Topology for Increased
Figure 2: Typical Instrumentation Amplifier Topology Input Impedance

As discussed in Section 1, the design specifications
require that the preamplifier have high input impedance,
low power consumption and low noise at low-frequencies.
Typically, high impedance is achieved by using an
instrumentation amplifier topology as shown in Figure 2.
Such a topology ensures that the input impedance is kept
high while allowing for differential input signals. The
closed-loop differential gain, G, of such an amplifier is
given by:
RF
G 1  (2 u
RG
) (1)
For a single supply implementation and a 10 Hz high-pass
corner frequency, large valued biasing resistors, RB, and
dc-blocking capacitors, Cin, are required. For example, an
external 1nF dc-blocking capacitor will require a bias
resistor valued at 16 M:. Integration of such a large
High impedance dc biasing of the amplifiers is also
achieved with minimal current draw. This is done by
using the diode voltage of QM and the voltage across RM
as a representation of the input common-mode voltage
and feeding this back with amplifier J so that the bias
transistors QB produce the appropriate bias current for the
base current of Q1 and Q2. In the process, the input
common mode voltage of the amplifier is set to Vref while
maintaining low input common-mode impedance. The
value for RM is determined by noting that the additional
voltage drop across the RG2 resistors, due to the common-
mode current via the RF resistors, needs to be accounted
for by increasing the resistance of RM accordingly.
For high-speed applications and better stability,
the output common-mode voltage is set by a feedback
loop that controls IC through control signal CMFBC. In
situations where large input common-mode voltage

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variations are expected, this can change the desired V 2 noise I CQ 1 ƒ QB I CQB ƒ Q1 I CQ 1
| RG 2 2 ( 2 q u [ I cQB    ])
quiescent point of the input transistors, due to the E f E Q1 u f
undesirable current feedback through RF. This problem ƒM1 g
 u ( mM 1 ) 2  2 kT
can be alleviated by output common-mode feedback, WLC ox _ M 1 u f g mQ 1 g mQ1 (3)
using control signal CMFBT to change the tail current IT R 2
 4 kT ( rb  ( G 2  RG 2 ))
such that the original quiescent points of the input RF
transistors are maintained.
The above topology still maintains a high In equation 3, ƒ QB, ƒ Q1 , ƒ M 1 are process dependent
differential input impedance while using bipolar devices
parameters of QB, Q1 and QM1 respectively. ICQB, ICQ1 are
on the input. This exploits the lower ‘1/f ’ noise traits of a
collector currents of QB and Q1 respectively and rb is the
BJT that are not present if one were to use MOSFET
base spreading resistance of input transistor Q1. Due to the
devices for the input stage. In addition, the low supply
differential nature, the total input referred spectral noise
current constraints make the choice of a bipolar device
density would be twice that shown above.
with its larger gm for a given current (in contrast to a
Analysis of equation 3 indicates that the
MOSFET), more attractive for reducing noise
minimum input referred noise occurs for currents through
contributions from the active load devices, as will be
the input stage that are in the range of hundreds of micro-
shown later. The input referred amplifier noise is a
amps. However, given our constraints for low-power
function of the closed-loop amplifier gain, its gm (and
operation and the noise floor desired, an operating current
hence operating current of the bipolar devices and FETs),
of 2uA for each branch of the input stage was shown to be
the resistors involved and the ‘1/f’ and shot noise
sufficient to meet the required specifications. At such low
components from the various devices.
currents, the ‘1/f’ and shot-noise noise contributions of
Figure 4 illustrates the actual implementation of
devices Q1, Q2, QB1 and QB2 become the most significant
the input stage. Cascode devices MC and QC are used to
contributors of noise in the bandwidth of interest. The
maximize the impedance seen at the input of amplifier D
base spreading resistance, rb, loses its significance as a
thereby increasing the differential input impedance rin as
noise source due to the low currents and hence low gm of
shown in equation 2. The bias transistors QB do not
Q1. The significance of each noise source is shown in
reduce the impedance due to the extremely small value of
equation 3 with the first line being the largest noise source
collector current flowing through them.
and the last line being the least significant noise source.

3. IMPLEMENTATION AND EXPERIMENTATION

M2
M1 VB1
QB QB
The proposed amplifier topology was designed and
MC
VB2 MC fabricated in a 0.8Pm BiCMOS process. The nominal gain
out+ of the amplifier was designed to be 100. The amplifier J
D shown in Figure 3 was realized using a simple MOSFET
J differential amplifier. The bias transistors QB were
QC QC out-
implemented using lateral PNP structures. The second
QCM
stage amplifier D was implemented as common source
VREF in+ in- PMOS stages followed by emitter follower output stages.
Q1 QM Q2
RF The output common mode voltage was stabilized through
an additional differential amplifier, which is not shown in
RG2 RM RG2 RF Figure 3. Relatively large currents were used to bias the
amplifier D due to the requirement of driving large
external capacitances for test purposes. When the
IT
proposed amplifier is integrated as part of the RF powered
implantable device and drives internal circuits, the biasing
current of the amplifier J can be reduced significantly.
The overall stability of the proposed amplifier was
Figure 4: Actual Implementation of Input Stage
achieved by connecting two compensation capacitors
from the output nodes to the collectors of Q1 and Q2
The single-ended input referred noise spectral
shown in Figure 4. The bandwidth of the amplifier was set
density V2noise for the configuration of Figure 4 can be
by the compensation capacitors. The chip micrograph is
shown to be:
shown in Figure 5. The active area is about 0.125mm2
without layout optimization.

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 For a 3.3V supply, the total power consumption differential input impedance was achieved without using
was measured to be 37PA, which included the power conventional area intensive on-chip resistors. The
consumption of an internal current biasing generator. This resulting high impedance makes it possible in the future to
was higher than predicted by simulation results due to integrate the external dc blocking capacitor, allowing for
variations in the value of the resistor inside the bias further size reduction of the implantable device.
generator. The high-pass frequency corner was measured
to be between 1 and 2 Hz when 1nF external capacitors,
Cin, were used. This indicated that the differential input
impedance was over 80 M:. As a result, it is quite
possible to integrate the external capacitors on chip to
obtain the high-pass cut-off frequency of 10 Hz. This
would reduce the overall dimensions of the implantable
device even further. It should be mentioned that if on-chip
resistors were used to bias the amplifier inputs in a
conventional process, the die area would increase
significantly for the achievable impedance. The input
referred rms noise was measured to be about 9.7PV for a
bandwidth between 10 Hz and 10 kHz. The dominant
noise is the 1/f noise from the input transistors. The 1/f
noise corner is between 500 Hz and 600 Hz. Table 2 Figure 5: Die Photograph of the EMG Amplifier
shows a summary of the preliminary test results.
5. ACKNOWLEDGEMENTS
Table 2: Performance Summary of EMG Amplifier
The authors would like to thank M. Vogel and R. Nelson
Process 0.8Pm BiCMOS for assistance with the die preparation and Dr. Troyk and
Dr. Loeb for the insights provided by them on implantable
Supply voltage 3.3 V device electronics and FES respectively.

Power dissipation 122 PW 5. REFERENCES

Voltage gain 100 V/V [1] David Yu, Pourmedi, Zi-Ping Fang, “Myolectric
control for a neuroprosthetic device,” Proceedings,
Input noise density @ 300 Hz ~180 nV/—Hz International Functional Electrical Stimulation Society
@ 3 kHz ~ 40 nV/—Hz (IFESS) Second Annual Conference, Burnaby, BC, pp.
145-6, Aug 16-20, 1997.
RMS input noise (10 Hz – 10 kHz) 9.7 PV [2] Norton JA, Donaldson N, Rushton DN, Holder DS,
Wood DE, Perkins TA, “EMG response to chronic
Differential output swing 3.25 Vp-p anterior nerve root stimulation in a paraplegic,” Clinical
Neurophysiology, 112(12) 2331-2 (5), 2001.
Bandwidth for 1 nF input capacitors ~2 Hz – 11 kHz [3] Troyk, P.R., Brown, I.E., Moore, W.H. and Loeb, G.E.
“Development of BION Technology for functional
Input referred offset voltage < 1mV electrical stimulation,” Proc. IEEE-EMBS (Istanbul,
Turkey), 2001.
Active area ~0.125 mm2 [4] Loeb GE, Zamin CJ, Schulman JH, Troyk PR,
“Injectable microstimulator for functional electrical
4. CONCLUSION stimulation,” Med Biol Eng Comput, 29: pp NS13-NS19,
1991.
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designed for integration within an implantable neural Capacitor Electrodes for Chronic Stimulation,” Med. &
prosthetic device. To conserve power, the current Biol. Eng, pp. 613-619, 1974.
consumption was optimized to meet the minimum signal [6] Source of EMG spectrum: Dr. M. Haughland, SMI,
detection target, rather than increasing current for the best Aalborg, Denmark.
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a feedback loop to stabilize the input common-mode Design:the current-mode approach, Peter Peregrinus Ltd.,
voltage. Input common-mode bias voltage, with high London, UK, 1990.

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