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FDPF5N50UT — N-Channel UniFETTM Ultra FRFETTM MOSFET

November 2013

FDPF5N50UT
N-Channel UniFETTM Ultra FRFETTM MOSFET
500 V, 4 A, 2 Ω
Features Description
• RDS(on) = 1.65 Ω (Typ.) @ VGS = 10 V, ID = 2 A UniFETTM MOSFET is Fairchild Semiconductor’s high voltage
MOSFET family based on planar stripe and DMOS technology.
• Low Gate Charge (Typ. 11 nC)
This MOSFET is tailored to reduce on-state resistance, and to
• Low Crss (Typ. 5 pF) provide better switching performance and higher avalanche
• 100% Avalanche Tested energy strength. UniFET Ultra FRFETTM MOSFET has much
superior body diode reverse recovery performance. Its trr is less
• Improved dv/dt Capability than 50nsec and the reverse dv/dt immunity is 20V/nsec while
• RoHS Compliant normal planar MOSFETs have over 200nsec and 4.5V/nsec
respectively. Therefore UniFET Ultra FRFET MOSFET can
Applications remove additional component and improve system reliability in
certain applications that require performance improvement of the
• LCD/LED TV MOSFET’s body diode. This device family is suitable for
switching power converter applications such as power factor
• Lighting
correction (PFC), flat panel display (FPD) TV power, ATX and
• Uninterruptible Power Supply electronic lamp ballasts.
• AC-DC Power Supply

G
G
D
S
TO-220F
S
Absolute Maximum Ratings TC = 25oC unless otherwise noted.
Symbol Parameter FDPF5N50UT Unit
VDSS Drain to Source Voltage 500 V
VGSS Gate to Source Voltage ±30 V
- Continuous (TC = 25oC) 4*
ID Drain Current A
- Continuous (TC = 100oC) 2.4*
IDM Drain Current - Pulsed (Note 1) 16* A
EAS Single Pulsed Avalanche Energy (Note 2) 216 mJ
IAR Avalanche Current (Note 1) 4 A
EAR Repetitive Avalanche Energy (Note 1) 8.5 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 20 V/ns
(TC = 25oC) 28 W
PD Power Dissipation
- Derate above 25oC 0.22 W/oC
oC
TJ, TSTG Operating and Storage Temperature Range -55 to +150
Maximum Lead Temperature for Soldering, oC
TL 300
1/8” from Case for 5 Seconds
*Drain current limited by maximum junction temperature

Thermal Characteristics
Symbol Parameter FDPF5N50UT Unit
RθJC Thermal Resistance, Junction to Case, Max. 4.5 oC/W
RθJA Thermal Resistance, Junction to Ambient, Max. 62.5

©2012 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com


FDPF5N50UT Rev. C2
FDPF5N50UT — N-Channel UniFETTM Ultra FRFETTM MOSFET
Package Marking and Ordering Information
Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity
FDPF5N50UT FDPF5N50UT TO-220F Tube N/A N/A 50 units

Electrical Characteristics TC = 25oC unless otherwise noted.


Symbol Parameter Test Conditions Min. Typ. Max. Unit

Off Characteristics
BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V, TJ = 25oC 500 - - V
ΔBVDSS Breakdown Voltage Temperature
ID = 250 μA, Referenced to 25oC - 0.7 - V/oC
/ ΔTJ Coefficient
VDS = 500 V, VGS = 0 V - - 25
IDSS Zero Gate Voltage Drain Current μA
VDS = 400 V, TC = 125oC - - 250
IGSS Gate to Body Leakage Current VGS = ±30 V, VDS = 0 V - - ±100 nA

On Characteristics
VGS(th) Gate Threshold Voltage VGS = VDS, ID = 250 μA 3 - 5 V
RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 2 A - 1.65 2 Ω
gFS Forward Transconductance VDS = 40 V, ID = 2 A - 4.8 - S

Dynamic Characteristics
Ciss Input Capacitance - 485 650 pF
VDS = 25 V, VGS = 0 V,
Coss Output Capacitance - 65 90 pF
f = 1 MHz
Crss Reverse Transfer Capacitance - 5 8 pF
Qg(tot) Total Gate Charge at 10V VDS = 400 V, ID = 4 A, - 11 15 nC
Qgs Gate to Source Gate Charge VGS = 10 V - 3 - nC
Qgd Gate to Drain “Miller” Charge (Note 4) - 5 - nC

Switching Characteristics
td(on) Turn-On Delay Time - 14 38 ns
tr Turn-On Rise Time VDD = 250 V, ID = 4 A, - 21 52 ns
td(off) Turn-Off Delay Time VGS = 10 V, RG = 25 Ω - 27 64 ns
tf Turn-Off Fall Time (Note 4) - 20 50 ns

Drain-Source Diode Characteristics


IS Maximum Continuous Drain to Source Diode Forward Current - - 4 A
ISM Maximum Pulsed Drain to Source Diode Forward Current - - 16 A
VSD Drain to Source Diode Forward Voltage VGS = 0 V, ISD = 4 A - - 1.6 V
trr Reverse Recovery Time VGS = 0 V, ISD = 4 A, - 36 - ns
Qrr Reverse Recovery Charge dIF/dt = 100A/μs - 33 - nC

Notes:
1: Repetitive rating: pulse-width limited by maximum junction temperature.
2: L = 27 mH, IAS = 4 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C.
3: ISD ≤ 4 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25°C.
4: Essentially Independent of Operating Temperature Typical Characteristics

©2012 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com


FDPF5N50UT Rev. C2
FDPF5N50UT — N-Channel UniFETTM Ultra FRFETTM MOSFET
Typical Performance Characteristics

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics


10 10
VGS = 15.0V
10.0V
8.0 V
7.0 V
6.5 V o
150 C

ID,Drain Current[A]
ID,Drain Current[A]

6.0 V
1 5.5 V o
25 C
1

0.1
*Notes: *Notes:
1. 250μs Pulse Test 1. VDS = 20V
o
2. TC = 25 C 2. 250μs Pulse Test
0.02 0.1
0.1 1 10 30 4 5 6 7 8
VDS,Drain-Source Voltage[V] VGS,Gate-Source Voltage[V]

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage


Drain Current and Gate Voltage Variation vs. Source Current
and Temperature
2.6 30
Drain-Source On-Resistance

IS, Reverse Drain Current [A]

o
150 C
2.2 10
o
RDS(ON) [Ω],

VGS = 10V 25 C

VGS = 20V

1.8

*Notes:
1. VGS = 0V
o
*Note: TJ = 25 C 2. 250μs Pulse Test
1.4 1
0 6 12 18 0.4 1.0 1.6 2.2
ID, Drain Current [A] VSD, Body Diode Forward Voltage [V]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics


1000 10
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd VDS = 100V
VDS = 250V
VGS, Gate-Source Voltage [V]

Crss = Cgd
800 8 VDS = 400V
*Note:
1. VGS = 0V
Capacitances [pF]

600 2. f = 1MHz 6
Ciss

400 Coss 4

200 2
Crss
*Note: ID = 4A
0 0
0.1 1 10 30 0 4 8 12
VDS, Drain-Source Voltage [V] Qg, Total Gate Charge [nC]

©2012 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com


FDPF5N50UT Rev. C2
FDPF5N50UT — N-Channel UniFETTM Ultra FRFETTM MOSFET
Typical Performance Characteristics (Continued)

Figure 7. Breakdown Voltage Variation Figure 8. Maximum Safe Operating Area


vs. Temperature
1.2 30
30μs
Drain-Source Breakdown Voltage

10 100μs

ID, Drain Current [A]


1.1 1ms
BVDSS, [Normalized]

10ms
1
1.0 DC
Operation in This Area
is Limited by R DS(on)
0.1 *Notes:
0.9 o
*Notes: 1. TC = 25 C
o
1. VGS = 0V 2. TJ = 150 C
2. ID = 250μA 3. Single Pulse
0.8 0.01
-75 -25 25 75 125 175 1 10 100 1000
o VDS, Drain-Source Voltage [V]
TJ, Junction Temperature [ C]

Figure 9. Maximum Drain Current


vs. Case Temperature
5

4
ID, Drain Current [A]

0
25 50 75 100 125 150
o
TC, Case Temperature [ C]

Figure 10. Transient Thermal Response Curve

10
[oC/W]
[oC/W]
Thermal Response [ZθJC]

0.5
Response
Response

1 0.2
0.1

0.05 PDM
Thermal
(t),Thermal

0.1 0.02 t1
0.01 t2
*Notes:
(t),

o
θJC

1. ZθJC(t) = 4.5 C/W Max.


θJC

Single pulse
0.01
ZZ

2. Duty Factor, D= t1/t2


3. TJM - TC = PDM * ZθJC(t)
0.003
-5 -4 -3 -2 -1 0 1 2 3
10 10 10 10 10 10 10 10 10
t1Rectangular
, RectangularPulse
Pulse Duration [sec]
Duration [sec]

©2012 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com


FDPF5N50UT Rev. C2
FDPF5N50UT — N-Channel UniFETTM Ultra FRFETTM MOSFET
IG = const.

Figure 11. Gate Charge Test Circuit & Waveform

RL VDS
VDS 90%

VGS VDD
RG

10%
VGS
V
10V
GS
DUT
td(on) tr td(off)
tf
t on t off

Figure 12. Resistive Switching Test Circuit & Waveforms

VGS

Figure 13. Unclamped Inductive Switching Test Circuit & Waveforms

©2012 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com


FDPF5N50UT Rev. C2
FDPF5N50UT — N-Channel UniFETTM Ultra FRFETTM MOSFET
DUT +

VDS

I SD
L

Driver
RG
Same Type
as DUT VDD

VGS • dv/dt controlled by RG


• ISD controlled by pulse period

Gate Pulse Width


VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current


I SD
( DUT ) di/dt

IRM

Body Diode Reverse Current


VDS
( DUT ) Body Diode Recovery dv/dt

VSD VDD

Body Diode
Forward Voltage Drop

Figure 14. Peak Diode Recovery dv/dt Test Circuit & Waveforms

©2012 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com


FDPF5N50UT Rev. C2
FDPF5N50UT — N-Channel UniFETTM Ultra FRFETTM MOSFET
Mechanical Dimensions

Figure 15. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight Lead
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TF220-003

©2012 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com


FDPF5N50UT Rev. C2
FDPF5N50UT — N-Channel UniFETTM Ultra FRFETTM MOSFET
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
AccuPower™ F-PFS™ Sync-Lock™
AX-CAP®* FRFET® ® tm
®*
SM ®
BitSiC™ Global Power Resource PowerTrench
Build it Now™ GreenBridge™ PowerXS™
TinyBoost®
CorePLUS™ Green FPS™ Programmable Active Droop™
® TinyBuck®
CorePOWER™ Green FPS™ e-Series™ QFET
TinyCalc™
CROSSVOLT™ Gmax™ QS™
TinyLogic®
CTL™ GTO™ Quiet Series™
TINYOPTO™
Current Transfer Logic™ IntelliMAX™ RapidConfigure™
TinyPower™
DEUXPEED® ISOPLANAR™ ™ TinyPWM™
Dual Cool™ Marking Small Speakers Sound Louder
TinyWire™
EcoSPARK® and Better™ Saving our world, 1mW/W/kW at a time™
TranSiC™
EfficentMax™ MegaBuck™ SignalWise™
TriFault Detect™
ESBC™ MICROCOUPLER™ SmartMax™
TRUECURRENT®*
® MicroFET™ SMART START™
μSerDes™
MicroPak™ Solutions for Your Success™
Fairchild® MicroPak2™ SPM®
Fairchild Semiconductor® MillerDrive™ STEALTH™
MotionMax™ SuperFET® UHC®
FACT Quiet Series™
mWSaver ® SuperSOT™-3 Ultra FRFET™
FACT®
OptoHiT™ SuperSOT™-6 UniFET™
FAST®
OPTOLOGIC® SuperSOT™-8 VCX™
FastvCore™
OPTOPLANAR® SupreMOS® VisualMax™
FETBench™
SyncFET™ VoltagePlus™
FPS™
XS™

*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.

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As used here in:
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PRODUCT STATUS DEFINITIONS


Definition of Terms
Datasheet Identification Product Status Definition
Datasheet contains the design specifications for product development. Specifications
Advance Information Formative / In Design
may change in any manner without notice.

Datasheet contains preliminary data; supplementary data will be published at a later


Preliminary First Production date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.

Datasheet contains final specifications. Fairchild Semiconductor reserves the right to


No Identification Needed Full Production
make changes at any time without notice to improve the design.

Datasheet contains specifications on a product that is discontinued by Fairchild


Obsolete Not In Production
Semiconductor. The datasheet is for reference information only.
Rev. I66

©2012 Fairchild Semiconductor Corporation 8 www.fairchildsemi.com


FDPF5N50UT Rev. C2

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