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Title Page
MS-6728 ATX Cover Sheet 1
Block Diagram 2
*INTEL mPGA 478B Processor
GPIO SPEC 3
D D

*INTEL Springdale GMCH / ICH5 Chipset


(DDR 333 / AGP 8X) / (integrated serial ATA) Intel mPGA478B 4,5 MS-6728 ver:0A
*INTEL 82547EI Gigabit LAN Clock Synthesizer 6

*VT6306 1394a OHCI Link Layer Controller Intel Springdale 7,8,9 LAN component
*PDC20376 Serial ATA Controller System Memory / DDR Terminations 10,11 SATA component
*Winbond 83627THF LPC I/O AGP SLOT 12 1394 component
*Audio codec 6 channel support 82547EI Gigabit LAN 13,14

*USB 2.0 support x8 (integrated into ICH5) ICH5 15,16


Standard BOM (without SATA /
*Jump Less support PCI Slot / MS-1 17,18 1394 HC)
Audio Codec / 6 Channel connector 19 SMT
C Serial ATA Controller / Connectors 20 DIP C

ATA 66/100 Connectors 21


Total
1394 Controller 22 Option A BOM (with SATA /
without 1394 HC)
Front USB Port 23
Rear USB Port 24 SMT
DIP
W627THF LPC I/O / FWH 25
Total
KB/MS/LPT/COM Port/FAN 26
CPU Vcore / DLED 27
Option B BOM (without SATA /
with 1394 HC)
VRM 10 HIP6556 28
SMT
MS-5 ACPI Controller 29
DIP
B
ATX connector / Front Panel 30 Total B

PCI Device & MS-1 Diagram 31


HISTORY 32 Option C BOM (for ALL)

SMT
DIP
Total

A A

Micro Star Restricted Secret


Title Rev
Cover Sheet
0A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.ms i.com.tw 1 of 33
5 4 3 2 1
5 4 3 2 1

Block Diagram
Intel mPGA478B
D D

FSB 533/667 D D

I I

M M

M M
A
AGP 8X /Fast Write
G 1 2

P D D

Springdale 2 channel DDR 333


I I
C C

M M

M M
CSA
Intel 82547EI 3 4
Gigabit LAN

Hub Link
6 PCI Slots

I I
Serial ATA
D D

E E
Dual ATA 33/66/100
B
ICH5 1 2
B

1394
Front x3 Controller PCI-33
LPC BUS

SATA Con x2 SATA/IDE


Controller
IDE Con x1

USB 2.0
FWH SUPER I/O

AC-LINK
AC97
Codec

A Dual USB 1.1 OHCI A

/2.0 EHCI 8 Ports

Micro Star Restricted Secret


Rear x4 Front x4 Title Rev
Block Diagram
0A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.ms i.com.tw 2 of 33
5 4 3 2 1
5 4 3 2 1

GPIO FUNCTION
ICH5
GPIO Pin Type Function Power well
D GPIO 0 I PREQ#B MAIN DDR DIMM Config. D

GPIO 1 I PREQ#B MAIN DEVICE ADDRESS CLOCK


GPIO 2 I PIRQ#E MAIN DIMM 1 1010000B MCLK_A0/MCLK_A0#
GPIO 3 I PIRQ#F MAIN MCLK_A1/MCLK_A1#
GPIO 4 I PIRQ#G MAIN MCLK_A2/MCLK_A2#
GPIO 5 I PIRQ#H MAIN DIMM 2 1010001B MCLK_B0/MCLK_B0#
GPIO 6 I GPI6 MAIN MCLK_B1/MCLK_B1#
GPIO 7 I GPI7 MAIN MCLK_B2/MCLK_B2#
GPIO 8 I CSA_PME# RESUME
GPIO 9 I OC4# RESUME
GPIO 10 I OC5# RESUME PCI RESET DEVICE
GPIO 11 I SIO_SMI# RESUME Signals Target
GPIO 12 I EXTSMI# RESUME
PCIRST#_ICH5 AGP,FWH,MS-5
GPIO 13 I SIO_PME# RESUME
Springdale,LAN, Super I/O,SATA,
GPIO 14 I OC#6 RESUME PCIRST#1 1394,MS-1
GPIO 15 I OC#7 RESUME
C C

PCIRST#2 PCI slot 1-6


GPIO 16 O PGNT#A MAIN
HD_RST# Primary, Scondary IDE
GPIO 17 O PGNT#B MAIN
GPIO 18 O GPO18 MAIN
GPIO 19 O BIOS_WP# MAIN
GPIO 20 O GPO20 MAIN PCI
GPIO 21 O GPO21 MAIN DEVICES INT# IDSEL REQ#/GNT# CLOCK
GPIO 22 OD GPO22 MAIN
GPIO 23 O GPO23 MAIN PCI SLOT 1
INT#A
INT#B AD16
PREQ#1
PCICLK1
GPIO 24 I/O GPIO24 RESUME default output INT#C
INT#D
PGNT#1
GPIO 25 I/O LAN_DISABLE# RESUME default output
GPIO 27 I/O GPIO27 RESUME default output PCI SLOT 2
INT#B
INT#C AD17
PREQ#2
PCICLK2
* GPIO 28 I/O GPIO28 RESUME default output INT#D
INT#A
PGNT#2
GPIO 32 I/O GPIO32 MAIN default output
B
GPIO 33 I/O GPIO33 MAIN default output PCI SLOT 3
INT#C
INT#D AD18
PREQ#3
PCICLK3 B
GPIO 34 I/O GPIO34 MAIN default output INT#A
INT#B
PGNT#3
GPIO 40 I PREQ#4 MAIN
GPIO 41 I GPI41 MAIN PCI SLOT 4
INT#D
INT#A AD19
PREQ#4
PCICLK4
GPIO 48 O PGNT#4 MAIN INT#B
INT#C
PGNT#4
GPIO 49 OD CPUPWRGD MAIN
INT#B PREQ#5
PCI SLOT 5 INT#C AD20 PCICLK5
INT#D PGNT#5
INT#A

FWH PCI SLOT 6


INT#A
INT#B AD21
PCI6REQ#
PCICLK6
GPIO Pin Type Function INT#C
INT#D
PCI6GNT#
GPI 0 I PD_DET
GPI 1 I SD_DET SERIAL ATA INT#E AD25
SATA_GNT#
SATA_PCLK
* GPI 2 I Pull down through 1K ohms (unused) SATA_REQ#
GPI 3 I Pull down through 1K ohms (unused)
A * GPI 4 I Pull down through 1K ohms (unused) 1394 INT#F AD26
1394_GNT#
1394_PCLK A
1394_REQ#

Micro Star Restricted Secret


PREQ#0
MS-1 Title Rev
PGNT#0 GPIO Spec. 0A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 3 of 33
5 4 3 2 1
5 4 3 2 1

CPU SIGNAL BLOCK VIDPWRGD DC Specifications


VCC_SENSE 28 CPU GTL REFERNCE VOLTAGE BLOCK
VSS_SENSE 28
Min Typ Max
VIL 0.3
7 HA#[3..31] VID_GD 28,29
VIH 0.9
VID[0..5] 27
It must rout to the enable pin of PWM and CK-409.
VIDGD to Vccp delay time is from 1ms to 10ms. VCCP VTT

HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3

VID2
VID1
VID0
VIDGD rising time is 150ns.

VID5
VID4
VID3
D D

AD26
AC26
AE25
R1 R2

AB1

AE1
AE2
AE3
AE4
AE5
AD2
AD3
W2

W1

M1

M4
M3

M6
Y1

V3

V2

P6

P4
P3

K1

K4
K2

A5
A4
U4

R6

U3

U1

R3

R2

N5
N4
N2

N1
200RST 200RST

T5

T4

T2

T1

L2

L3

L6
CPU1A GTLREF 0.63*Vccp

VIDPWRGD
VID5#
VID4#
VID3#
VID2#
VID1#
VID0#
VCC_SENSE

ITP_CLK1
ITP_CLK0
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
A9#
A8#
A7#
A6#
A5#
A4#
A3#

VSS_SENSE
DBR#
C1 C2 R3
HDBI#0 E21 0.1u_X7R 104P 169RST
7 HDBI#[0..3] DBI0#
HDBI#1 G25 AA21 {VOLTAGE}
HDBI#2 DBI1# GTLREF3
P26 AA6
HDBI#3 DBI2# GTLREF2
V21 F20 GTLREF 7
DBI3# GTLREF1 C3 220p_X7R
F6
GTLREF0 {VOLTAGE}
AC3
IERR# BPM#5
V6 AB4
MCERR# BPM5# BPM#4
16 FERR# B6 AA5
FERR# BPM4# BPM#3
16 STPCLK# Y4 Y6
STPCLK# BPM3# BPM#2
AA3 AC4
BINIT# BPM2# BPM#1
16,25 HINIT# W5 AB5
INIT# BPM1# BPM#0
AB2 AC6
RSP# BPM0#
H5 H3 HREQ#4
7 HDBSY# DBSY# REQ4# HREQ#[0..4] 7
H2 J3 HREQ#3
7 HDRDY#
J6
DRDY# REQ3#
J4 HREQ#2 CPU ITP BLOCK
7 HTRDY# TRDY# REQ2#
K5 HREQ#1
REQ1# HREQ#0
7 HADS# G1 J1
ADS# REQ0#
7 HLOCK# G4
LOCK# TESTHI12 R4 62
7 HBNR# G2 AD25 VCCP
BNR# TESTHI12 TESTHI11 R5 62
7 HIT# F3 A6
HIT# TESTHI11 TESTHI10 R6 62 ITP_TDI R7 150
7 HITM# E3 Y3 VCCP
HITM# TESTHI10 TESTHI9 R8 62
7 HBPRI# D2 W4
C BPRI# TESTHI9 TESTHI8 R9 62 ITP_TRST# R10 680 C
7 HDEFER# E2 U6
DEFER# TESTHI8
AB22
ITP_TDI TESTHI7
C1 AA20
ITP_TDO TDI TESTHI6 ITP_TMS R11 39
D5 AC23 VCCP
ITP_TMS TDO TESTHI5 ITP_TDO R12 75
F7 AC24
ITP_TRST# TMS TESTHI4
E6 AC20
ITP_TCK TRST# TESTHI3 TESTHI2 R13 62 ITP_TCK R14 27
D4 AC21
TCK TESTHI2 TESTHI1 R15 62
25 CPU_TMPA B3 AA2
THERMDA TESTHI1 TESTHI0 R537 62
25 VTIN_GND C4 AD24
THERMDC TESTHI0
16 TRMTRIP# A2
THERMTRIP#
AF26 AF23 CPU_CLK# 6
PROCHOT# GND/SKTOCC# BCLK1#
7 PROCHOT# C3 AF22 CPU_CLK 6
PROCHOT# BCLK0#
16 IGNNE# B2
IGNNE# HRS#2
16 SMI# B5 F4 HRS#[0..2] 7
SMI# RS2# HRS#1
16 A20M# C6 G5
A20M# RS1# HRS#0
16 SLP# AB26 F1
SLP# RS0#
A22 V5
RESERVED0 AP1#
A7 AC1
RESERVED1 AP0# HBR#0
AE21 H6 HBR#0 7
RESERVED2 BR0#
AF24
RESERVED3 COMP1 R16 61.9RST
AF25 P1
RESERVED4 COMP1 COMP0 R17 61.9RST
L24
BOOT COMP0
28 BOOT AD1
BOOTSELECT
AE26 L25
OPTIMIZED/COMPAT# DP3#
K26
DP2#
6 BSEL0 AD6 K25
BSEL0 DP1#
6 BSEL1 AD5 J26
BSEL1 DP0#
CPU_GD AB23 R5
16 CPU_GD PWRGOOD ADSTB1# HADSTB#1 7
L5 HADSTB#0 7
B CPURST# ADSTB0# B
7 CPURST# AB25 W23 HDSTBP#3 7
RESET# DSTBP3#
P23 HDSTBP#2 7
HD#63 DSTBP2#
7 HD#[0..63] AA24 J23 HDSTBP#1 7
HD#62 D63# DSTBP1#
AA22 F21 HDSTBP#0 7
HD#61 D62# DSTBP0#
AA25 W22 HDSTBN#3 7
HD#60 D61# DSTBN3#
Y21 R22 HDSTBN#2 7
HD#59 D60# DSTBN2#
Y24 K22 HDSTBN#1 7
HD#58 D59# DSTBN1#
Y23 E22 HDSTBN#0 7
HD#57 D58# DSTBN0#
W25
HD#56 D57#
Y26 E5 NMI 16
HD#55 D56# LINT1/NMI
W26 D1 INTR 16
HD#54 D55# LINT0/INTR
V24
D54#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
D27#
D26#
D25#
D24#
D23#
D22#
D21#
D20#
D19#
D18#
D17#
D16#
D15#
D14#
D13#
D12#
D11#
D10#
D9#
D8#
D7#
D6#
D5#
D4#
D3#
D2#
D1#
D0#
M26

M24

M23

M21

G26

G23

G22
U21

U23
U24
U26

R24
R25

R21
N25
N26

N23

N22

H25

H24

D26

H22
D25

D23
C26
H21

C24
C23

D22
C21
V22

V25

P24

P21

K23

E25

E24

B25

B24

A25
A23
B22
B21

PGA-S478-GD10-F02
T23
T22
T25
T26

F26

F24
F23
L22

L21
J24

J21

{Priority}
HD#53
HD#52
HD#51
HD#50
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#37
HD#36
HD#35
HD#34
HD#33
HD#32
HD#31
HD#30
HD#29
HD#28
HD#27
HD#26
HD#25
HD#24
HD#23
HD#22
HD#21
HD#20
HD#19
HD#18
HD#17
HD#16
HD#15
HD#14
HD#13
HD#12
HD#11
HD#10
HD#9
HD#8
HD#7
HD#6
HD#5
HD#4
HD#3
HD#2
HD#1
HD#0

CPU STRAPPING RESISTORS


A ALL COMPONENTS CLOSE TO CPU A

BPM#4 R18 62
VCCP
BPM#5 R19 62 PROCHOT# R20 62
VCCP
BPM#2 R21 62 CPU_GD R22 300
BPM#3 R23 62 HBR#0 R24 220 Micro Star Restricted Secret
BPM#1 R25 62 CPURST# R26 62
BPM#0 R27 62 Title Rev
Intel mPGA478B - Signals 0A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 4 of 33
5 4 3 2 1
5 4 3 2 1

1.2V 150mA
VCC_VID
29 VCC_VID
C4 C5
CPU VOLTAGE BLOCK
105P 104P

VID Voltage is from 1.14V to 1.32V.


OFFPAGELEFT-R
D It is derived from 3.3V. It support DC current if 100mA. D
It should be able to source 150mA. Near processor
It drives the power logic of BSEL[1:0] and VID[5:0].
VID to VIDGD delay time is from 1ms to 10ms.
VID to VIDGD deassertion time is 1ms for max. CPU_IOPLL L1 10uH-1206-100mA
VCCP VCCP
L2 10uH-1206-100mA

DC voltage drop should

AC10
AC12
AC14
AC16
AC18

AD11
AD13
AD15
AD17
AD19

AD20
AA10
AA12
AA14
AA16
AA18

AB11
AB13
AB15
AB17
AB19

AE10
AE12
AE14
AE16
AE18
AE20

AE23
AF11
AF13
AF15
AF17
AF19

AF21
be less than 70mV.

AA8

AB7
AB9

AE6
AE8
AC8

AD7
AD9

AF2

AF5
AF7
AF9

AF4

AF3
C10
C12
C14
C16
C18
C20

D11
D13
D15
D17
D19
A10
A12
A14
A16
A18
A20

B11
B13
B15
B17
B19

E10
E12
E14
E16
E18
E20

F11
F13
F15
F17
F19
A8

B7
B9

E8
C8

D7
D9
C6 C9 C7 C8

F9
CPU1B 105P 105P X_22u/1206 10U/1206

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC-VID

VCC-VIDPRG

VCC-IOPLL

VCCA
AD22 VSSA
VSSA
D10
VSS
A11
VSS
A13 Y5
VSS VSS The ESL is less than 5nH, and the ESR is less than 0.3ohm.
A15 Y25
VSS VSS
A17 Y22
VSS VSS
A19 Y2
VSS VSS
A21 W6
VSS VSS
A24 W3
VSS VSS
A26 W24
VSS VSS
A3 W21
VSS VSS
A9 V4
VSS VSS
AA1 V26
VSS VSS
AA11 V23
VSS VSS
AA13 V1
VSS VSS
AA15 U5
VSS VSS
AA17 U25
C VSS VSS C
AA19 U22
VSS VSS
AA23 U2
VSS VSS
AA26 T6
VSS VSS
AA4 T3
VSS VSS
AA7 T24
VSS VSS
AA9 T21
VSS VSS
AB10 R4
VSS VSS
AB12 R26
VSS VSS
AB14 R23
VSS VSS
AB16 R1
VSS VSS
AB18 P5
VSS VSS
AB20 P25
VSS VSS
AB21 P22
VSS VSS
AB24 P2
VSS VSS
AB3 N6
VSS VSS
AB6 N3
VSS VSS
AB8 N24
VSS VSS
AC11 N21
VSS VSS
AC13 M5
VSS VSS
AC15 M25
VSS VSS
AC17 M22
VSS VSS
AC19 M2
VSS VSS
AC2 L4
VSS VSS
AC22 L26
VSS VSS
AC25 L23
VSS VSS
AC5 L1
VSS VSS
AC7 K6
VSS VSS
AC9 K3
VSS VSS
K24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B B
AD10
AD12
AD14
AD16
AD18
AD21
AD23

AE11
AE13
AE15
AE17
AE19
AE22
AE24

AF10
AF12
AF14
AF16
AF18
AF20
AE7
AE9
AD4
AD8

G21
G24
AF1

AF6
AF8

C11
C13
C15
C17
C19

C22
C25

D12
D14
D16
D18
D20
D21
D24

H23
H26
B10
B12
B14
B16
B18
B20
B23
B26

E11
E13
E15
E17
E19
E23
E26

K21
F10
F12
F14
F16
F18

F22
F25

J22
J25
G3
G6
B4
B8

E1

E4
E7
E9
C2

C5
C7
C9

D3
D6
D8

H1

H4
F2

F5
F8

J2

J5
PGA-S478-GD10-F02
{Priority}

CPU DECOUPLING CAPACITORS

VCCP VCCP VCCP VCCP VCCP

C10 C11 C12 C13 C14


10U/1206 10U/1206 10U/1206 10U/1206 X_10U/1206
C17 C18 C19 C20 C21
10U/1206 10U/1206 10U/1206 10U/1206 10U/1206
C24 C25 C26 C27 C28
10U/1206 10U/1206 10U/1206 10U/1206 X_10U/1206
C31 C32 C33 C34 C35
10U/1206 10U/1206 10U/1206 X_10U/1206 10U/1206
C38 C39 C40 C41 C42
10U/1206 10U/1206 10U/1206 10U/1206 10U/1206
A A
C45 C46 C47 C48 C49
10U/1206 10U/1206 10U/1206 10U/1206 10U/1206

Micro Star Restricted Secret


Title Rev
Place these caps within socket cavity Place these caps within north side of processor Intel mPGA478B - Power 0A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 5 of 33
5 4 3 2 1
5 4 3 2 1

Clock Synthesizer

*Trace less 0.5" FS_A FS_B


FS_4 FS_3 FS_2 CPU
BSEL0 BSEL1
D 0 0 0 1 0 133.3 D
CP1 X U1
40 CPUCLK R28 33 CPU_CLK 0 0 0 1 1 166.7
CPU0 CPU_CLK 4
X_80-0805-3A VCC3V 41 39 CPUCLK# R29 33 CPU_CLK#
VCC3 CPU_VDD CPU0# CPU_CLK# 4
FB1 43 MCHCLK R30 33 MCH_CLK
CPU1 MCH_CLK 7
C51 42 MCHCLK# R31 33 MCH_CLK# CPU_CLK R32 49.9RST
CPU1# MCH_CLK# 7
C50 + EC1 104P 44 CPU_CLK# R33 49.9RST
104P CPU_GND MCH_CLK R34 49.9RST
10U/16V/S MCH_CLK# R35 49.9RST
35
SRC_VDD SATA100 R36 33 SATA_100
37 SATA_100 16
Use 2 VIA hole on BEAD both side C52 SRC SATA100# R37 33 SATA_100#
36 SATA_100# 16
104P SRC# ICHPCLK R38 1K SATA_100 R39 49.9RST
38
SRC_GND SATA_100# R40 49.9RST
28 31 MCH66 R41 33 MS1PCLK R42 1K
3V66_VDD 3V66_0 MCH_66 9
30 ICH66 R43 33
3V66_1 ICH_66 16
C53 27 LANCLK66 R44 33 USB48 R45 1K
3V66_2 LAN_CLK66 13
104P 29 26 AGPCLK R46 33
3V66_GND 3V66_3/VCH AGP_CLK 12
R47 33 ICH_PCLK MCH66 C54 X_10P
ICH_PCLK 15
7 ICHPCLK R48 33 MS1_PCLK ICH66 C55 X_10P
**FS2/PCI_F0 MS1_PCLK 18
10 8 MS1PCLK R49 33 SIO_PCLK AGPCLK C56 X_10P
PCI_VDD **FS4/PCI_F1 SIO_PCLK 25
9 SIOPCLK R50 33 FWH_PCLK
PCI_F2 FWH_PCLK 25
C57 12 1394PCLK R51 33 1394_PCLK USB48 C58 X_10P
PCI0 1394_PCLK 22
104P 11 13 SATAPCLK R52 33 SATA_PCLK
PCI_GND PCI1 SATA_PCLK 20
14 PCICLK0 RN1 7 8 PCI_CLK0 SIO48 C59 X_10P
PCI2 PCI_CLK0 17
15 PCICLK1 33 5 6 PCI_CLK1
PCI3 PCI_CLK1 17
17 16 PCICLK2 3 4 PCI_CLK2
PCI_VDD PCI4 PCI_CLK2 17
19 PCICLK3 1 2 PCI_CLK3
PCI5 PCI_CLK3 18
C60 20 PCICLK4 R53 33 PCI_CLK4 VCC3V EMC HF filter capacitors, located close to PLL
PCI6 PCI_CLK4 18
104P 18 21 PCICLK5 R54 33 PCI_CLK5
PCI_GND PCI7 PCI_CLK5 18
C 25 22 SIO48 R55 33 C
48_VDD **SEL24_48#/24_48 SIO_48 25
R56 R57
C61 1K 1K
104P 24 23 USB48 R58 33
48_GND **FS3/48M_0 USB_48 16 CN14
3 SEL0 SEL1 ICH_PCLK 7 8
REF_VDD SEL0 R61 33 R59 10K R60 10K MS1_PCLK
1 ICH_14 16 5 6
C62 *FS_A/REF_0 SEL1 R62 33 SIO_PCLK
2 AC_14 19 3 4
104P *FS_B/REF_1 FWH_PCLK
6 1 2
REF_GND
4 BSEL0 BSEL1 4
CP2 X X_8P4C-10P
4 C63 18P R63 R64
FB2 X_80-0805-3A XIN Y1 CN15
VCC3 48
VDDA *120k Pull-up 2KST
**120k Pull-down 14.318M 2KST 1394_PCLK 7 8
Use 2 VIA hole on BEAD both side C64 C65 5 C66 18P SATA_PCLK 5 6
XOUT 7 BSEL0_SPG BSEL1_SPG 7
104P 103P 47 PCI_CLK0 3 4
GND CG_PWRGD# R65 10K VCC3V R66 R67 PCI_CLK1
34 1 2
VTT_PWRGD/PD#
SMBDATA_ISO R68 X_1K 2.49KST 2.49KST X_8P4C-10P
33 45 VCC3
SMBCLK_ISO SDATA RESET# Q1 R69 220
32 VCCP
SCLK CN16
46 R70 475 2N3904S
IREF PCI_CLK2 7 8
Iref = 2.32mA PCI_CLK3 5 6
ICS952607 PCI_CLK4 3 4
PCI_CLK5 1 2
FP_RST# 30
X_8P4C-10P

B B

VCC3
SMBCLK_ISO R71 4.7K
SMBDATA_ISO R72 4.7K

SMBus Isolation

SMBCLK
+12V SMBCLK 10,11,13,16,17,25
R527 4.7K Q2 NDS7002AS
A A

SMBCLK_ISO
SMBCLK_ISO 29
R74
1K
SMBDATA Micro Star Restricted Secret
SMBDATA 10,11,13,16,17,25

29 PWROK_SMB
R528 4.7K Q4 NDS7002AS Title Rev

SMBDATA_ISO
Clock Synthesizer 0A
SMBDATA_ISO 29
C444 Document Number MS-6728
X_104P
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 6 of 33
5 4 3 2 1
5 4 3 2 1

VCC_AGP
VCCA_FSB
VTT VTT_FSB1 C67 0.47u
C68 104P
VTT_FSB2 C69 0.47u

AR33
AR35
AF13
AF23
AJ12
W16
W19
W20
M10
M11

M31

AP2
AN1

AR3
N10
N11

R11

U16
U17
U20

C23
C35

R25
A31

P10
P11

V16
V18
V20

Y16
Y17
Y18
Y19
Y20

A33
A35

B25
B34

E26

A11
A13
A16
A20
A23
A25
A27
A29
A32

A15
A21
T16
T17
T18
T19
T20
L10
L11
M8
M9
B4

K6
K7
K8
K9

A3

B2

A7
A9

E6
E7

A4
A5
A6
B5
B6
N9

C1

C4

D5
D6
D7

C5
C6
F7
L6
L7
L9
J6
J7
J8
J9
U2A
HA#3 D26 B23 HD#0

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA_FSB
VCCA_FSB

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

VTT_FSB
VTT_FSB
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
4 HA#[3..31] HA3# HD0# HD#[0..63] 4
HA#4 D30 E22 HD#1
HA#5 HA4# HD1# HD#2
L23 B21
HA#6 HA5# HD2# HD#3
E29 D20
HA#7 HA6# HD3# HD#4
D B32 B22 D
HA#8 HA7# HD4# HD#5
K23 D22
HA#9 HA8# HD5# HD#6
C30 B20
HA#10 HA9# HD6# HD#7
C31 C21
HA#11 HA10# HD7# HD#8
J25 E18
HA#12 HA11# HD8# HD#9
B31 E20
HA#13 HA12# HD9# HD#10
E30 B16
HA#14 HA13# HD10# HD#11
B33 D16
HA#15 HA14# HD11# HD#12
J24 B18
HA#16 HA15# HD12# HD#13
F25 B17
HA#17 HA16# HD13# HD#14
D34 E16
HA#18 HA17# HD14# HD#15
C32 D18
HA#19 HA18# HD15# HD#16
F28 G20
HA#20 HA19# HD16# HD#17
C34 F17
HA#21 HA20# HD17# HD#18
J27 E19
HA#22 HA21# HD18# HD#19
G27 F19
HA#23 HA22# HD19# HD#20
F29 J17
HA#24 HA23# HD20# HD#21
E28 L18
HA#25 HA24# HD21# HD#22
H27 G16
HA#26 HA25# HD22# HD#23
K24 G18
HA#27 HA26# HD23# HD#24
E32 F21
HA#28 HA27# HD24# HD#25
F31 F15
HA#29 HA28# HD25# HD#26
G30 E15
HA#30 HA29# HD26# HD#27
J26 E21
HA#31 HA30# HD27# HD#28
G26 J19
HA31# HD28# HD#29
G14
HD29# HD#30
E17
HD30# HD#31
4 HADSTB#0 B30 K17
HAD_STB0# HD31# HD#32
4 HADSTB#1 D28 J15
HAD_STB1# HD32# HD#33
L16
HD33# HD#34
4 HBR#0 B24 J13
C BREQ0# HD34# HD#35 C
4 HBPRI# B26 F13
BPRI# HD35# HD#36
F11
HD36# HD#37
4 HBNR# B28 E13
BNR# HD37# HD#38
K15
HD38# HD#39
4 HLOCK# E25 G12
HLOCK# HD39# HD#40
G10
HD40# HD#41
4 HADS# F27 L15
ADS# HD41# HD#42
E11
HREQ#0 HD42# HD#43
4 HREQ#[0..4] B29 K13
HREQ#1 HREQ0# HD43# HD#44
J23 J11
HREQ#2 HREQ1# HD44# HD#45
L22 H10
HREQ#3 HREQ2# HD45# HD#46
C29 G8
HREQ#4 HREQ3# HD46# HD#47
J21 E9
HREQ4# HD47# HD#48
B13
HD48# HD#49
4 HIT# K21 E14
HIT# HD49# HD#50
4 HITM# E23 B14
HITM# HD50# HD#51
4 HDEFER# L21 B12
DEFER# HD51# HD#52
B15
HD52# HD#53
4 HTRDY# D24 D14
HTRDY# HD53# HD#54
4 HDBSY# E27 C13
DBSY# HD54# HD#55
4 HDRDY# G24 B11
DRDY# HD55# HD#56
D10
HRS#0 HD56# HD#57
4 HRS#[0..2] G22 C11
HRS#1 RS0# HD57# HD#58
C27 E10
HRS#2 RS1# HD58# HD#59
B27 B10
RS2# HD59# HD#60
C9
HD60# HD#61
6 MCH_CLK B7 B9
HCLKP HD61# HD#62
6 MCH_CLK# C7 D8
HCLKN HD62# HD#63
B8
MS5_POK HD63#
AE14
PWROK HDBI#0
4 CPURST# E8 C17 HDBI#[0..3] 4
B CPURST# DINV_0# HDBI#1 B
L17
DINV_1# HDBI#2
13,18,20,22,25,29 PCIRST#1 AK4 L14
RSTIN# DINV_2# HDBI#3
AJ8 C15
ICH_SYNC# ICH_SYNC# DINV_3#

4 PROCHOT# L20 B19 HDSTBP#0 4


PROCHOT# HD_STBP0#
C19 HDSTBN#0 4
HD_STBN0#

6 BSEL0_SPG L13 L19 HDSTBP#1 4


BSEL0 HD_STBP1#
6 BSEL1_SPG L12 K19 HDSTBN#1 4
BSEL1 HD_STBN1#
R77 20RST HRCOMP E24 G9
HDRCOMP HD_STBP2# HDSTBP#2 4
F9 HDSTBN#2 4
HSWING HD_STBN2#
C25
HDSWING
D12 HDSTBP#3 4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
HD_STBP3#
4 GTLREF F23 E12 HDSTBN#3 4
HDVREF HD_STBN3#

M26
M27
M28
M30
M33
G28
G31
G35
C10
C12
C14
C16
C18
C20
C22
C24
C26
C28

D11
D13
D15
D17
D19
D21
D23
D25
D27
D29
D31
D33
D35

H12
H14
H16
H18
H20
H22
H24
H26
H30
H33

K11
K12
K14
K16
K18
K20
K22
K25
K27
K29
K33
C70 Intel Springdale-N
F10
F12
F14
F16
F18
F20
F22
F24
F26

L24
L25
L26
L31
L35
J10
J12
J14
J16
J18
J20
J22
J28
J32
J35

M3
M6
E1
E3
C8

D1
D9

H2
H5
H8
H9

N1
N4
F1
F3
F5
F8

220p_X7R {Priority}

VCC3

I=30mA ICH_SYNC# MS5_POK ICH_PWROK

VCCP VCCA_FSB L3 0.82uH-30mA FSB R78 0 0 1 0 R79 R80


VCC_AGP
0 0 0
X_220 X_1K
C71 + EC2 1 0 0
0.1u_X7R 1 1 1
10U/16V/S Q5 X_2N3904S
A A
C72 R81 ICH_SYNC#
ICH_PWROK 16
X_0.01u_X7R 301RST
HSWING 1/4*Vccp MS5_POK
29 MS5_POK
C73 R82 VCC3
0.01u_X7R 100RST Q6 X_2N3904S
Micro Star Restricted Secret
{VOLTAGE} R84 X_220 Title Rev

R85 0
Intel Springdale - CPU 0A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 7 of 33
5 4 3 2 1
5 4 3 2 1

10 MDQ_A[0..63] MCKE_A[0..3] 10
VCCA_DDR

MCKE_A1
MCKE_A2
MCKE_A3
MCKE_A0
MDQ_A10
MDQ_A11
MDQ_A12
MDQ_A13
MDQ_A14
MDQ_A15
MDQ_A16
MDQ_A17
MDQ_A18
MDQ_A19
MDQ_A20
MDQ_A21
MDQ_A22
MDQ_A23
MDQ_A24
MDQ_A25
MDQ_A26
MDQ_A27
MDQ_A28
MDQ_A29
MDQ_A30
MDQ_A31
MDQ_A32
MDQ_A33
MDQ_A34
MDQ_A35
MDQ_A36
MDQ_A37
MDQ_A38
MDQ_A39
MDQ_A40
MDQ_A41
MDQ_A42
MDQ_A43
MDQ_A44
MDQ_A45
MDQ_A46
MDQ_A47
MDQ_A48
MDQ_A49
MDQ_A50
MDQ_A51
MDQ_A52
MDQ_A53
MDQ_A54
MDQ_A55
MDQ_A56
MDQ_A57
MDQ_A58
MDQ_A59
MDQ_A60
MDQ_A61
MDQ_A62
MDQ_A63
C75 104P Its current is 5.1A.

MDQ_A0
MDQ_A1
MDQ_A2
MDQ_A3
MDQ_A4
MDQ_A5
MDQ_A6
MDQ_A7
MDQ_A8
MDQ_A9
VCC_DDR

AM12

AM10

AM14

AM18

AM22

AM33
AM28

AM31

AM20
AG34

AG33
AN13

AN15

AN27

AN29

AN34
AH32

AD32
AH31

AD34
AC34

AD31

AN19

AC25
AC26
AP10
AP11

AP13
AP14

AP19

AP18

AP22

AP21

AP25
AP27
AP28
AP29
AP33

AE34

AB31

AB32

AP20

AB25
AF32
AL10
AL12

AL18

AL14

AL24

AL22

AL20

AL35

AM3

AM5
AM6
AM7
AM8
AN4

AN5

AN2
AN6
AN7
G34
U34
U33

H34

N32
N35
V32
V31

K34
K32

P34

E33

K31
T34
T32

T31

F33

F34
L34
L33
J33

J34

P3
P6
P8
U2B
D AA34 U26 D

VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
SDQ_A0
SDQ_A1
SDQ_A2
SDQ_A3
SDQ_A4
SDQ_A5
SDQ_A6
SDQ_A7
SDQ_A8
SDQ_A9
SDQ_A10
SDQ_A11
SDQ_A12
SDQ_A13
SDQ_A14
SDQ_A15
SDQ_A16
SDQ_A17
SDQ_A18
SDQ_A19
SDQ_A20
SDQ_A21
SDQ_A22
SDQ_A23
SDQ_A24
SDQ_A25
SDQ_A26
SDQ_A27
SDQ_A28
SDQ_A29
SDQ_A30
SDQ_A31
SDQ_A32
SDQ_A33
SDQ_A34
SDQ_A35
SDQ_A36
SDQ_A37
SDQ_A38
SDQ_A39
SDQ_A40
SDQ_A41
SDQ_A42
SDQ_A43
SDQ_A44
SDQ_A45
SDQ_A46
SDQ_A47
SDQ_A48
SDQ_A49
SDQ_A50
SDQ_A51
SDQ_A52
SDQ_A53
SDQ_A54
SDQ_A55
SDQ_A56
SDQ_A57
SDQ_A58
SDQ_A59
SDQ_A60
SDQ_A61
SDQ_A62
SDQ_A63

SCKE_A0
SCKE_A1
SCKE_A2
SCKE_A3

VSS
VSS
VSS
VSS
VSS
10 MCS_A#0 SCS_A0# SCS_B0# MCS_B#0 11
10 MCS_A#1 Y31 T29 MCS_B#1 11
SCS_A1# SCS_B1#
10 MCS_A#2 Y32 V25 MCS_B#2 11
SCS_A2# SCS_B2#
10 MCS_A#3 W34 W25 MCS_B#3 11
SCS_A3# SCS_B3#

10 MRAS_A# AC33 W26 MRAS_B# 11


SRAS_A# SRAS_B#
10 MCAS_A# Y34 W31 MCAS_B# 11
SCAS_A# SCAS_B#

10 MWE_A# AB34 W27 MWE_B# 11


SWE_A# SWE_B#
AG31 MA_B0
SMAA_B0 MA_B[0..12] 11
MA_A0 AJ34 AJ31 MA_B1
10 MA_A[0..12] SMAA_A0 SMAA_B1
MA_A1 AL33 AD27 MA_B2
MA_A2 SMAA_A1 SMAA_B2 MA_B3
AK29 AE24
MA_A3 SMAA_A2 SMAA_B3 MA_B4
AN31 AK27
MA_A4 SMAA_A3 SMAA_B4 MA_B5
AL30 AG25
MA_A5 SMAA_A4 SMAA_B5 MA_B6
AL26 AL25
MA_A6 SMAA_A5 SMAA_B6 MA_B7
AL28 AF21
MA_A7 SMAA_A6 SMAA_B7 MA_B8
AN25 AL23
MA_A8 SMAA_A7 SMAA_B8 MA_B9
AP26 AJ22
MA_A9 SMAA_A8 SMAA_B9 MA_B10
AP24 AF29
MA_A10 SMAA_A9 SMAA_B10 MA_B11
AJ33 AL21
MA_A11 SMAA_A10 SMAA_B11 MA_B12
AN23 AJ20
MA_A12 SMAA_A11 SMAA_B12
AN21
SMAA_A12 MAB_B1
AE27 MAB_B[1..5] 11
MAB_A1 SMAB_B1 MAB_B2
10 MAB_A[1..5] AL34 AD26
MAB_A2 SMAB_A1 SMAB_B2 MAB_B3
AM34 AL29
MAB_A3 SMAB_A2 SMAB_B3 MAB_B4
AP32 AL27
MAB_A4 SMAB_A3 SMAB_B4 MAB_B5
AP31 AE23
MAB_A5 SMAB_A4 SMAB_B5
AM26
SMAB_A5
Y25 MBA_B0 11
C SBA_B0 C
10 MBA_A0 AE33 AA25 MBA_B1 11
SBA_A0 SBA_B1
10 MBA_A1 AH34
SBA_A1
AG11 MDQM_B0
SDM_B0 MDQM_B[0..7] 11
MDQM_A0 AP12 AG15 MDQM_B1
10 MDQM_A[0..7] MDQM_A1 SDM_A0 SDM_B1 MDQM_B2
AP16 AE21
MDQM_A2 SDM_A1 SDM_B2 MDQM_B3
AM24 AJ28
MDQM_A3 SDM_A2 SDM_B3 MDQM_B4
AP30 AC31
MDQM_A4 SDM_A3 SDM_B4 MDQM_B5
AF31 U31
MDQM_A5 SDM_A4 SDM_B5 MDQM_B6
W33 M29
MDQM_A6 SDM_A5 SDM_B6 MDQM_B7
M34 J31
MDQM_A7 SDM_A6 SDM_B7
H32
SDM_A7 MDQS_B0
AF15 MDQS_B[0..7] 11
MDQS_A0 AN11 SDQS_B0 MDQS_B1
AG13
10 MDQS_A[0..7] MDQS_A1 AP15 SDQS_A0 SDQS_B1 MDQS_B2
AG21
MDQS_A2 AP23 SDQS_A1 SDQS_B2 MDQS_B3
AH27
MDQS_A3 AM30 SDQS_A2 SDQS_B3 MDQS_B4
AD29
MDQS_A4 AF34 SDQS_A3 SDQS_B4 MDQS_B5
U30
MDQS_A5 SDQS_A4 SDQS_B5 MDQS_B6
V34 L27
MDQS_A6 SDQS_A5 SDQS_B6 MDQS_B7
M32 J30
MDQS_A7 SDQS_A6 SDQS_B7
H31
SDQS_A7
AG29 MCLK_B0 11
SCMDCLK_B0
10 MCLK_A0 AK32 AG30 MCLK_B#0 11
SMDCLK_A0 SCMDCLK_B0#
10 MCLK_A#0 AK31
SMDCLK_A0#
AF17 MCLK_B1 11
SCMDCLK_B1
10 MCLK_A1 AP17 AG17 MCLK_B#1 11
SMDCLK_A1 SCMDCLK_B1#
10 MCLK_A#1 AN17
SMDCLK_A1#
N27 MCLK_B2 11
SCMDCLK_B2
10 MCLK_A2 N33 N26 MCLK_B#2 11
SMDCLK_A2 SCMDCLK_B2#
10 MCLK_A#2 N34
B SMDCLK_A2# B
AJ30 MCLK_B3 11
SCMDCLK_B3
10 MCLK_A3 AK33 AH29 MCLK_B#3 11
SMDCLK_A3 SCMDCLK_B3#
10 MCLK_A#3 AK34
SMDCLK_A3#
AK15 MCLK_B4 11
SCMDCLK_B4
10 MCLK_A4 AM16 AL15 MCLK_B#4 11
SMDCLK_A4 SCMDCLK_B4#
10 MCLK_A#4 AL16
SMDCLK_A4#
N31 MCLK_B5 11
SCMDCLK_B5
10 MCLK_A5 P31 N30 MCLK_B#5 11
SMDCLK_A5 SCMDCLK_B5#
10 MCLK_A#5 P32
SMDCLK_A5# YRCOMP C76 103P
AA33
SMYRCOMP
C77 103P XRCOMP AK9 R34 YCOMPH C78 103P
SMXRCOMP SMYCOMPVOH YCOMPL C79 103P
R33
C80 103P XCOMPH SMYCOMPVOL
AN9
C81 103P XCOMPL SMXCOMPVOH C82 104P
AL9 AP9
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR

SCKE_B0
SCKE_B1
SCKE_B2
SCKE_B3
SDQ_B10
SDQ_B11
SDQ_B12
SDQ_B13
SDQ_B14
SDQ_B15
SDQ_B16
SDQ_B17
SDQ_B18
SDQ_B19
SDQ_B20
SDQ_B21
SDQ_B22
SDQ_B23
SDQ_B24
SDQ_B25
SDQ_B26
SDQ_B27
SDQ_B28
SDQ_B29
SDQ_B30
SDQ_B31
SDQ_B32
SDQ_B33
SDQ_B34
SDQ_B35
SDQ_B36
SDQ_B37
SDQ_B38
SDQ_B39
SDQ_B40
SDQ_B41
SDQ_B42
SDQ_B43
SDQ_B44
SDQ_B45
SDQ_B46
SDQ_B47
SDQ_B48
SDQ_B49
SDQ_B50
SDQ_B51
SDQ_B52
SDQ_B53
SDQ_B54
SDQ_B55
SDQ_B56
SDQ_B57
SDQ_B58
SDQ_B59
SDQ_B60
SDQ_B61
SDQ_B62
SDQ_B63
SMXCOMPVOL SMVREF_B
SDQ_B0
SDQ_B1
SDQ_B2
SDQ_B3
SDQ_B4
SDQ_B5
SDQ_B6
SDQ_B7
SDQ_B8
SDQ_B9

C83 104P XVREF E34


SMVREF_A
C84 105P
AG12

AG23

AG27

AG19
AR21
AR15

AR31

AH26

AD25

AC27
AC30
AA35

AE15

AE16

AK11

AE17

AK17

AK13

AE19
AE20

AK23

AK21

AE22
AK25

AE30

AE31
AB29
AA26
AA27
AA30

AA31

AK19

AE18
AF12

AF27

AF28

AF19
AL11

AL13

AL17

AL19
AJ10

AJ14
AJ16
AJ18

AJ24

AJ26
AJ27
AM1
AM2

W30

M25
AP3
AP4
AP5
AP6
AP7
AN8

AR4
AR5
AR7

G33

G32
R35

U27

U25
R27

R30

R31
R26

H29

N25
E35

AL6
AL7

AL8

Y29

V29

P29

K28

P25

K30
Intel Springdale-N

T25

F32
L30

L32

J29
{Priority}
C85 X_105P

MCKE_B0
MCKE_B1
MCKE_B2
MCKE_B3
MDQ_B10
MDQ_B11
MDQ_B12
MDQ_B13
MDQ_B14
MDQ_B15
MDQ_B16
MDQ_B17
MDQ_B18
MDQ_B19
MDQ_B20
MDQ_B21
MDQ_B22
MDQ_B23
MDQ_B24
MDQ_B25
MDQ_B26
MDQ_B27
MDQ_B28
MDQ_B29
MDQ_B30
MDQ_B31
MDQ_B32
MDQ_B33
MDQ_B34
MDQ_B35
MDQ_B36
MDQ_B37
MDQ_B38
MDQ_B39
MDQ_B40
MDQ_B41
MDQ_B42
MDQ_B43
MDQ_B44
MDQ_B45
MDQ_B46
MDQ_B47
MDQ_B48
MDQ_B49
MDQ_B50
MDQ_B51
MDQ_B52
MDQ_B53
MDQ_B54
MDQ_B55
MDQ_B56
MDQ_B57
MDQ_B58
MDQ_B59
MDQ_B60
MDQ_B61
MDQ_B62
MDQ_B63
C86 474P
MDQ_B0
MDQ_B1
MDQ_B2
MDQ_B3
MDQ_B4
MDQ_B5
MDQ_B6
MDQ_B7
MDQ_B8
MDQ_B9

YVREF R86 150RST


VCC_DDR
C87 224P VCC_DDR_C2 R87 150RST
VCC_DDR C88 105P
VCC_DDR_C3
11 MDQ_B[0..63] MCKE_B[0..3] 11
C90 224P

C91 104P
A A

values still need verification


C92 X_105P C93 X_105P L5
XRCOMP R88 42.2RST XCOMPL R89 30.1KST YCOMPL R90 30.1KST VCC_DDR_C2 1uH-1206-1A Micro Star Restricted Secret
VCC_DDR VCC_DDR
R91 42.2RST R92 10KST R93 10KST VCCA_DDR
VCC_AGP
R33 Title Rev

C95 105P
R35
C94
+ EC4 {Prority} Intel Springdale - Memory 0A
YRCOMP R95 42.2RST VCC_DDR_C3 XCOMPH R96 10KST
VCC_DDR
YCOMPH R97 10KST 104P 10U/16V/S Document Number MS-6728
R98 42.2RST R99 30.1KST R100 30.1KST
AA33 AA35 R34 MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 8 of 33
5 4 3 2 1
5 4 3 2 1

C96 104P

C97 104P

VCC_AGP VCC_AGP
C98
104P

AC32
AC35

AD10
AA32

AB10
AB26
AB27
AB28
AB30
AB33
W17
W18
W32

AG1
AA1
AA4

AB3
AB6
AB8
AB9

AC1
AC4

AD3
AD6
AD8
AD9
R32

U18
U19
U32
P26
P27
P28
P30
P33

V10
V17
V19
V26
V27
V28
V30
V33

Y10
Y26
Y27
Y28
Y30
Y33
Y35

Y11
T10
T26
T27
T28
T30
T33
T35

W4
P9

V3
V6
V8
V9

Y3
Y6
Y8
Y9

Y1

K2
K3
K4
K5
R1
R4

U4
T1
T3
T6
T8
T9

L1
L5

L4
L2
L3
J1
J2
J3

J4
J5
U2C
GAD0 AE6

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP

VCCA_AGP
VCCA_AGP
12 GAD[0..31] GAD0/DVOB_HSYNC
GAD1 AC11 AF5 HL0
GAD1/DVOB_VSYNC HI0 HL[0..10] 16
GAD2 AD5 AG3 HL1
GAD3 GAD2/DVOB_D1 HI1 HL2
D AE5 AK2 D
GAD4 GAD3/DVOB_D0 HI2 HL3
AA10 AG5
GAD5 GAD4/DVOB_D3 HI3 HL4
AC9 AK5
GAD6 GAD5/DVOB_D2 HI4 HL5
AB11 AL3
GAD7 GAD6/DVOB_D5 HI5 HL6
AB7 AL2
GAD8 GAD7/DVOB_D4 HI6 HL7
AA9 AL4
GAD9 GAD8/DVOB_D6 HI7 HL8
AA6 AJ2
GAD10 GAD9/DVOB_D9 HI8 HL9 HI_RCOMP Calculation
AA5 AH2
GAD11 GAD10/DVOB_D8 HI9 HL10 R=[(1.5V-08V)/0.8V]*60ohm=52.5ohm
W10 AJ3
GAD12 GAD11/DVOB_D11 HI10
AA11
GAD13 GAD12/DVOB_D10
W6 AH5 HL_STRF 16
GAD14 GAD13/DVOBC_CLKINT HI_STRF
W9 AH4 HL_STRS 16
GAD15 GAD14/DVOB_FLDSTL HI_STRS
V7
GAD16 GAD15/MDDC_DATA HL_COMP R101 52.3RST
AA2 AD4 VCC_AGP
GAD17 GAD16/DVOC_VSYNC HI_RCOMP HL_SWING C99 103P
Y4 AE3
GAD18 GAD17/DVOC_HSYNC HI_SWING
Y2
GAD19 GAD18/DVOC_BLANK# HL_VREF C100 103P
W2 AE2
GAD20 GAD19/DVOC_D0 HI_VREF
Y5
GAD21 GAD20/DVOC_D1 CI0
V2 AK7 CI[0..10] 13
GAD22 GAD21/DVOC_D2 CI0 CI1
W3 AH7
GAD23 GAD22/DVOC_D3 CI1 CI2
U3 AD11
GAD24 GAD23/DVOC_D4 CI2 CI3
T2 AF7
GAD25 GAD24/DVOC_D7 CI3 CI4
T4 AD7
GAD26 GAD25/DVOC_D6 CI4 CI5
T5 AC10
GAD27 GAD26/DVOC_D9 CI5 CI6
R2 AF8
GAD28 GAD27/DVOC_D8 CI6 CI7
P2 AG7
GAD29 GAD28/DVOC_D11 CI7 CI8
P5 AE9
GAD30 GAD29/DVOC_D10 CI8 CI9
P4 AH9
GAD31 GAD30/DVOBC_INTR# CI9 CI10
M2 AG6
GAD31/DVOC_FLDSTL CI10
GC_BE#0 Y7 AJ6
C
12 GC_BE#[0..3] GCBE0/DVOB_D7 CISTRF CI_STRF 13 C
GC_BE#1 W5 AJ5
GCBE1/DVOB_BLANK# CISTRS CI_STRS 13
GC_BE#2 AA3
GC_BE#3 U2 GCBE2
AG2 CI_RCOMP R102 52.3RST
VCC_AGP
GCBE3/DVOC_D5 CI_RCOMP
AF2
CI_SWING CI_SWING C101 103P
12 AD_STB0 AC6
GADSTBF0/DVOB_CLK CI_VREF C102 103P
12 AD_STB#0 AC5 AF4
GADSTBS0/DVOB_CLK# CI_VREF

12 AD_STB1 V4
GADSTBF1/DVOC_CLK
12 AD_STB#1 V5 G4
GADSTBS1/DVOC_CLK# DREFCLK
N6 F2
12 GREQ# GREQ DDCA_CLK
12 GGNT# M7 H3
GGNT DDCA_DATA
ST0 N3 E2
12 ST[0..2] GST0 VSYNC
ST1 N5 G3
ST2 GST1 HSYNC
N2
GST2
H7
RBF# BLUE
12 RBF# R10 G6
WBF# GRBF BLUE#
12 WBF# R9
GWBF
H6
GREEN
12 GFRAME# U6 G5
GFRAME/MDVI_DATA GREEN#
V11
12 GIRDY# GIRDY/MI2CCLK
12 GTRDY# AB5 F4
GTRDY/MDVI_CLK RED
AB4 E4
12 GDEVSEL# GDEVSEL/MI2CDATA RED#
12 GSTOP# W11
GSTOP/MDDC_CLK
D2
REFSET
12 GPAR AB2
GPAR/ADD_DETECT
G1
VCC_DAC
6 MCH_66 H4 G2
GCLKIN VCC_DAC
SBA0 R6 B3 R83 0
B 12 SBA[0..7] GSBA0#/ADD_ID0 VCCA_DPLL B
SBA1 P7
SBA2 GSBA1#/ADD_ID1 R517 0
R3 C2
SBA3 GSBA2#/ADD_ID2 VCCA_DAC
R5
SBA4 GSBA3#/ADD_ID3
U9
SBA5 GSBA4#/ADD_ID4
U10 D3
SBA6 GSBA5#/ADD_ID5 VSSA_DAC
U5
SBA7 GSBA6#/ADD_ID6
T7
GSBA7#/ADD_ID7
AP8
EXTTS#
12 SB_STB U11
GSBSTBF
12 SB_STB# T11 AG9
GSBSTBS RESERVED
AG10
RESERVED
12 PIPE# M4 AN35
DBI_HI RESERVED
12 DBI_LO M5 AP34
DBI_LO RESERVED
AR1
R103 43.2RST GRCOMP RESERVED
VCC_AGP AC2
C103 103P GSWING GRCOMP/DVOBC_RCOMP
AC3 AR25
GVSWING VSS
12 GSWING AR27
VSS
AD2 AR29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C104 103P GVREF VSS
AR32
VSS

AM11
AM13
AM15
AM17
AM19
AM21
AM23
AM25
AM27
AM29
AM35
AG14
AG16
AG18
AG20
AG22
AG24
AG26
AG28
AG32
AG35
AD30
AD33
AD28

AH10
AH12
AH14
AH16
AH18
AH20
AH22
AH24
AH30
AH33

AN10
AN12
AN14
AN16
AN18
AN20
AN22
AN24
AN26
AN28
AN30
AN32

AR11
AR13
AR16
AR20
AR23
AE10
AE11
AE12
AE13
AE25
AE26
AE32
AE35

AK10
AK12
AK14
AK16
AK18
AK20
AK22
AK24
AK26
AK28
AF11
AF14
AF16
AF18
AF20
AF22
AF24
AF25
AF30
AF33

AL32
12 AGP_REF
AJ32
AJ35

AM9
AG4
AG8
AE1
AE4

AK3
AK8
AH3
AH6

AR9
AF3
AF6
AF9

AL1
AJ1
AJ4
AJ9

Intel Springdale-N
{Priority}

800mV
R104 226 CI_SWING
VCC_AGP
R105 147

350mV
CI_VREF
R106 113
A Springdale Decoupling Capacitors A

H_SWING=(0.8*VCC_AGP)+-2%
All caps trace length is less than 100mils.
HL_SWING 800mV Micro Star Restricted Secret
R107 226RST VCCP VCCP VCC_AGP VCC_DDR VCC_DDR VCC_DDR VCC_DDR VTT
VCC_AGP HL_SWING 16
R109 147RST C105 104P Title Rev

HL_VREF 350mV
C106
104P
C107
105P/0805
C108
104P
C109
X_104P
C110
104P
C111
X_104P
C112
104P
C113
104P
Intel Springdale - AGP & LAN 0A
HL_VREF 16
C114 C115 C116 C117 C118 C119 C120 C121 Document Number MS-6728
R111 113RST C122 104P 104P 105P/0805 X_104P 104P 104P 104P 104P 104P
MICRO-STAR INT'L Last Revision Date:
Close CPU side of GMCH Close AG1 and Y1 of GMCH Close E35, R35, AA35, AL35, AR31, AR21 and AR15 of GMCH CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
H_SWING=(0.233*VCC_AGP)+-2% Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 9 of 33
5 4 3 2 1
5 4 3 2 1

DDR DIMM1 DDR DIMM2 DDR Terminational Resisitors


VTT_DDR VTT_DDR
DIMM1 DIMM2
MA_A0 48 SIGNALS 2 MDQ_A0 MA_A0 48 SIGNALS 2 MDQ_A0 MDQS_A7 1 2 MDQ_A9 1 2
8 MA_A[0..12] A0 DQ0 MDQ_A[0..63] 8 A0 DQ0
MA_A1 43 4 MDQ_A1 MAB_A1 43 4 MDQ_A1 MDQM_A7 3 4 RN2 MDQ_A8 3 4 RN3
A1 DQ1 8 MAB_A[1..5] A1 DQ1
MA_A2 41 6 MDQ_A2 MAB_A2 41 6 MDQ_A2 MDQ_A57 5 6 56 MDQ_A3 5 6 56
MA_A3 A2 DQ2 MDQ_A3 MAB_A3 A2 DQ2 MDQ_A3 MDQ_A56 MDQ_A7
130 8 130 8 7 8 7 8
MA_A4 A3 DQ3 MDQ_A4 MAB_A4 A3 DQ3 MDQ_A4 MDQ_A37 MDQ_A6
37 94 37 94 1 2 1 2
MA_A5 A4 DQ4 MDQ_A5 MAB_A5 A4 DQ4 MDQ_A5 MDQ_A33 RN4 MDQ_A2 RN5
32 95 32 95 3 4 3 4
MA_A6 A5 DQ5 MDQ_A6 MA_A6 A5 DQ5 MDQ_A6 MDQ_A36 56 MDQM_A0 56
D 125 98 125 98 5 6 5 6 D
MA_A7 A6 DQ6 MDQ_A7 MA_A7 A6 DQ6 MDQ_A7 MDQ_A32 MDQS_A0
29 99 29 99 7 8 7 8
MA_A8 A7 DQ7 MDQ_A8 MA_A8 A7 DQ7 MDQ_A8 MDQ_A53 MDQM_A1
122 12 122 12 1 2 1 2
MA_A9 A8 DQ8 MDQ_A9 MA_A9 A8 DQ8 MDQ_A9 MDQ_A52 RN6 MDQ_A13 RN7
27 13 27 13 3 4 3 4
MA_A10 A9 DQ9 MDQ_A10 MA_A10 A9 DQ9 MDQ_A10 MDQ_A49 56 MDQS_A1 56
141 19 141 19 5 6 5 6
MA_A11 A10/AP DQ10 MDQ_A11 MA_A11 A10/AP DQ10 MDQ_A11 MDQ_A48 MDQ_A12
118 20 118 20 7 8 7 8
MA_A12 A11 DQ11 MDQ_A12 MA_A12 A11 DQ11 MDQ_A12 MDQ_A11 MDQS_A2
115 105 115 105 1 2 1 2
A12/NC DQ12 MDQ_A13 A12/NC DQ12 MDQ_A13 MDQ_A10 RN8 MDQ_A21 RN9
167 106 167 106 3 4 3 4
A13/NC DQ13 MDQ_A14 A13/NC DQ13 MDQ_A14 MDQ_A15 56 MDQ_A17 56
109 109 5 6 5 6
MBA_A0 DQ14 MDQ_A15 MBA_A0 DQ14 MDQ_A15 MDQ_A14 MDQ_A16
59 110 59 110 7 8 7 8
8 MBA_A0 MBA_A1 BA0 DQ15 BA0 DQ15
52 23 MDQ_A16 MBA_A1 52 23 MDQ_A16 MDQ_A22 1 2
8 MBA_A1 BA1 DQ16 BA1 DQ16
113 24 MDQ_A17 113 24 MDQ_A17 MDQS_A5 R112 56 MDQ_A18 3 4 RN10
NC/BA2 DQ17 MDQ_A18 NC/BA2 DQ17 MDQ_A18 MDQM_A5 R113 56 MDQM_A2 56
28 28 5 6
DQ18 MDQ_A19 DQ18 MDQ_A19 MDQ_A41 R114 56
157 31 157 31 7 8
8 MCS_A#0 CS0# DQ19 8 MCS_A#2 CS0# DQ19
158 114 MDQ_A20 158 114 MDQ_A20 MDQ_A45 R115 56 MDQM_A3 1 2
8 MCS_A#1 CS1# DQ20 MDQ_A21 8 MCS_A#3 CS1# DQ20 MDQ_A21 MDQ_A20 R117 56 MDQS_A3 RN11
71 117 71 117 3 4
NC/CS2# DQ21 MDQ_A22 NC/CS2# DQ21 MDQ_A22 MDQ_A29 56
163 121 163 121 5 6
NC/CS3# DQ22 MDQ_A23 NC/CS3# DQ22 MDQ_A23 MDQ_A25
123 123 7 8
MRAS_A# DQ23 MDQ_A24 MRAS_A# DQ23 MDQ_A24 VTT_DDR MDQ_A31
154 33 154 33 1 2
8 MRAS_A# MCAS_A# RAS# DQ24 MDQ_A25 MCAS_A# RAS# DQ24 MDQ_A25 MDQ_A27 RN12
8 MCAS_A# 65 35 65 35 3 4
MWE_A# CAS# DQ25 MDQ_A26 MWE_A# CAS# DQ25 MDQ_A26 MA_A1 MDQ_A26 56
8 MWE_A# 63 39 63 39 1 2 5 6
WE# DQ26 MDQ_A27 WE# DQ26 MDQ_A27 MAB_A1 RN13 MDQ_A30
40 40 3 4 7 8
MDQS_A0 DQ27 MDQ_A28 MDQS_A0 DQ27 MDQ_A28 MA_A2 47 MDQ_A38
5 126 5 126 5 6 1 2
8 MDQS_A[0..7] MDQS_A1 DQS0 DQ28 MDQ_A29 MDQS_A1 DQS0 DQ28 MDQ_A29 MAB_A2 MDQM_A4 RN14
14 127 14 127 7 8 3 4
MDQS_A2 DQS1 DQ29 MDQ_A30 MDQS_A2 DQS1 DQ29 MDQ_A30 MA_A5 MDQ_A34 56
25 131 25 131 1 2 5 6
MDQS_A3 DQS2 DQ30 MDQ_A31 MDQS_A3 DQS2 DQ30 MDQ_A31 MAB_A5 RN15 MDQS_A4
36 133 36 133 3 4 7 8
MDQS_A4 DQS3 DQ31 MDQ_A32 MDQS_A4 DQS3 DQ31 MDQ_A32 MA_A8 47 MDQ_A40
56 53 56 53 5 6 1 2
MDQS_A5 DQS4 DQ32 MDQ_A33 MDQS_A5 DQS4 DQ32 MDQ_A33 MA_A7 MDQ_A44 RN16
67 55 67 55 7 8 3 4
MDQS_A6 DQS5 DQ33 MDQ_A34 MDQS_A6 DQS5 DQ33 MDQ_A34 MAB_A3 MDQ_A35 56
78 57 78 57 1 2 5 6
MDQS_A7 DQS6 DQ34 MDQ_A35 MDQS_A7 DQS6 DQ34 MDQ_A35 MA_A3 RN17 MDQ_A39
86 60 86 60 3 4 7 8
DQS7 DQ35 MDQ_A36 DQS7 DQ35 MDQ_A36 MAB_A4 47 MDQ_A28
47 146 47 146 5 6 1 2
C DQS8 DQ36 MDQ_A37 DQS8 DQ36 MDQ_A37 MA_A4 MDQ_A24 RN18 C
147 147 7 8 3 4
MDQM_A0 DQ37 MDQ_A38 MDQM_A0 DQ37 MDQ_A38 MBA_A1 MDQ_A19 56
97 150 97 150 1 2 5 6
8 MDQM_A[0..7] MDQM_A1 DQM0/DQS9 DQ38 MDQ_A39 MDQM_A1 DQM0/DQS9 DQ38 MDQ_A39 MA_A10 RN19 MDQ_A23
107 151 107 151 3 4 7 8
MDQM_A2 DQM1/DQS10 DQ39 MDQ_A40 MDQM_A2 DQM1/DQS10 DQ39 MDQ_A40 MA_A0 47 MDQ_A1
119 61 119 61 5 6 1 2
MDQM_A3 DQM2/DQS11 DQ40 MDQ_A41 MDQM_A3 DQM2/DQS11 DQ40 MDQ_A41 MDQ_A5 RN20
129 64 129 64 7 8 3 4
MDQM_A4 DQM3/DQS12 DQ41 MDQ_A42 MDQM_A4 DQM3/DQS12 DQ41 MDQ_A42 MCS_A#3 MDQ_A4 56
149 68 149 68 1 2 5 6
MDQM_A5 DQM4/DQS13 DQ42 MDQ_A43 MDQM_A5 DQM4/DQS13 DQ42 MDQ_A43 MCS_A#1 RN21 MDQ_A0
159 69 159 69 3 4 7 8
MDQM_A6 DQM5/DQS14 DQ43 MDQ_A44 MDQM_A6 DQM5/DQS14 DQ43 MDQ_A44 MCS_A#2 47 MDQ_A47
169 153 169 153 5 6 1 2
MDQM_A7 DQM6/DQS15 DQ44 MDQ_A45 MDQM_A7 DQM6/DQS15 DQ44 MDQ_A45 MCAS_A# MDQ_A46 RN22
177 155 177 155 7 8 3 4
DQM7/DQS16 DQ45 MDQ_A46 DQM7/DQS16 DQ45 MDQ_A46 MCKE_A0 MDQ_A43 56
140 161 140 161 1 2 5 6
DQM8/DQS17 DQ46 MDQ_A47 DQM8/DQS17 DQ46 MDQ_A47 MCKE_A2 RN23 MDQ_A42
162 162 3 4 7 8
DQ47 MDQ_A48 DQ47 MDQ_A48 MCKE_A3 47 MDQ_A61
44 72 44 72 5 6 1 2
MECC0 DQ48 MDQ_A49 MECC0 DQ48 MDQ_A49 MCKE_A1 MDQ_A60 RN24
45 73 45 73 7 8 3 4
MECC1 DQ49 MDQ_A50 MECC1 DQ49 MDQ_A50 MDQ_A51 56
49 79 49 79 5 6
MECC2 DQ50 MDQ_A51 MECC2 DQ50 MDQ_A51 MDQ_A50
51 80 51 80 7 8
MECC3 DQ51 MDQ_A52 MECC3 DQ51 MDQ_A52 MA_A6 R119 47 MDQ_A58
134 165 134 165 1 2
MECC4 DQ52 MDQ_A53 MECC4 DQ52 MDQ_A53 MA_A9 R120 47 MDQ_A59 RN25
135 166 135 166 3 4
MECC5 DQ53 MDQ_A54 MECC5 DQ53 MDQ_A54 MA_A11 R121 47 MDQ_A63 56
142 170 142 170 5 6
MECC6 DQ54 MDQ_A55 MECC6 DQ54 MDQ_A55 MA_A12 R122 47 MDQ_A62
144 171 144 171 7 8
MECC7 DQ55 MDQ_A56 MECC7 DQ55 MDQ_A56 MBA_A0 R123 47 MDQ_A55
83 83 1 2
DQ56 MDQ_A57 DQ56 MDQ_A57 MRAS_A# R124 47 MDQ_A54 RN26
8 MCKE_A0 21 84 8 MCKE_A2 21 84 3 4
CKE0 DQ57 MDQ_A58 CKE0 DQ57 MDQ_A58 MWE_A# R125 47 MDQS_A6 56
8 MCKE_A1 111 87 8 MCKE_A3 111 87 5 6
CKE1 DQ58 MDQ_A59 CKE1 DQ58 MDQ_A59 MCS_A#0 R126 47 MDQM_A6
88 88 7 8
SMBCLK_ISO DQ59 MDQ_A60 SMBCLK_ISO DQ59 MDQ_A60
6 SMBCLK_ISO 92 174 92 174
SMBDATA_ISO SCL DQ60 MDQ_A61 SMBDATA_ISO SCL DQ60 MDQ_A61
91 175 91 175
6 SMBDATA_ISO SDA DQ61
178 MDQ_A62 SDA DQ61
178 MDQ_A62 DECOUPLING CAPACITORS
DQ62 MDQ_A63 DQ62 MDQ_A63
181 179 VCC_DDR 181 179
SA0 DQ63 SA0 DQ63 VTT_DDR VTT_DDR VCC_DDR
182 182
SA1 VCC_DDR SA1
183 9 183 9
SA2 NC SA2 NC CB1 CB2
101 101
NC NC 104P 104P CB7
102 102
B NC R127 NC CB3 CB4 104P B
16 173 16 173
8 MCLK_A1 CK0/NC NC 75RST 8 MCLK_A4 CK0/NC NC X_104P X_104P CB10
17 17
8 MCLK_A#1 CK0#/NC DDR_VREF1 8 MCLK_A#4 CK0#/NC DDR_VREF1 CB5 CB6 104P
137 1 137 1
8 MCLK_A0 CK1/CK0 VREF 8 MCLK_A3 CK1/CK0 VREF X_104P 104P CB13
138 90 138 90
8 MCLK_A#0 CK1#/CK0# WP C123 R128 8 MCLK_A#3 CK1#/CK0# WP C124 CB8 CB9 104P
8 MCLK_A2 76 103 8 MCLK_A5 76 103
CK2/NC FETEN/NC 104P 75RST CK2/NC FETEN/NC 104P 104P 104P CB16
75 10 75 10
8 MCLK_A#2 CK2#/NC NC/RESET# 8 MCLK_A#5 CK2#/NC NC/RESET# CB11 CB12 104P
82 POWER 15 82 POWER 15 104P 104P CB19
ID_VDD VDDQ VCC_DDR ID_VDD VDDQ VCC_DDR
22 22 CB14 CB15 104P
VDDQ VDDQ X_104P X_104P CB22
VCC_DDR 184 30 VCC_DDR 184 30
SPD_VDD VDDQ SPD_VDD VDDQ CB17 CB18 104P
54 54
VDDQ VDDQ 104P 104P CB25
62 62
VDDQ VDDQ CB20 CB21 104P
VCC_DDR 7 77 VCC_DDR 7 77
VDD VDDQ VDD VDDQ X_104P X_104P CB28
38 96 38 96
VDD VDDQ VDD VDDQ CB23 CB24 X_104P
46 104 46 104
VDD VDDQ VDD VDDQ 104P 104P CB32
70 112 70 112
VDD VDDQ VCC_DDR VDD VDDQ CB26 CB27 104P
85 128 85 128
VDD VDDQ VDD VDDQ 104P 104P
108 136 108 136
VDD VDDQ CB29 VDD VDDQ CB30 CB31
120 143 120 143
VDD VDDQ X_104P VDD VDDQ 104P 104P
148 156 148 156
VDD VDDQ CB33 VDD VDDQ CB34 CB35
168 164 168 164
VDD VDDQ 104P VDD VDDQ X_104P 104P
172 172
VDDQ CB36 VDDQ CB37 CB38
81 180 81 180
GND VDDQ X_104P GND VDDQ 104P 104P
89 89
GND CB39 GND
93 3 93 3
GND GND 104P GND GND Place these decoupling capacitors close to VTT_DDR termination resistors.
100 11 100 11
GND GND CB40 GND GND One decoupling capacitor for each R-pack.
116 18 116 18
GND GND 104P GND GND
124 26 124 26
GND GND CB41 GND GND
132 34 132 34
GND GND X_104P GND GND
139 42 139 42
GND GND CB42 GND GND
A 145 50 145 50 A
GND GND 104P GND GND
152 58 152 58
GND GND CB43 GND GND
160 66 160 66
GND GND 104P GND GND
176 74 176 74
GND GND CB44 GND GND
DIMM-D184-BK 104P DIMM-D184-BK Micro Star Restricted Secret
ADDR.=1010000B ADDR.=1010001B Title Rev
DDR DIMM 1,2 0A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Tuesday, November 26, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 10 of 33
5 4 3 2 1
5 4 3 2 1

SYSTEM MEMORY
DDR DIMM3 DDR DIMM4
DDR Terminational Resisitors
DIMM3 DIMM4 VTT_DDR VTT_DDR
MA_B0 48 SIGNALS 2 MDQ_B0 MA_B0 48 SIGNALS 2 MDQ_B0
8 MA_B[0..12] A0 DQ0 MDQ_B[0..63] 8 A0 DQ0
MA_B1 43 4 MDQ_B1 MAB_B1 43 4 MDQ_B1 MDQ_B6 1 2 MDQ_B63 1 2
A1 DQ1 8 MAB_B[1..5] A1 DQ1
MA_B2 41 6 MDQ_B2 MAB_B2 41 6 MDQ_B2 MDQ_B2 3 4 RN27 MDQ_B59 3 4 RN28
MA_B3 A2 DQ2 MDQ_B3 MAB_B3 A2 DQ2 MDQ_B3 MDQM_B0 56 MDQ_B58 56
130 8 130 8 5 6 5 6
MA_B4 A3 DQ3 MDQ_B4 MAB_B4 A3 DQ3 MDQ_B4 MDQS_B0 MDQ_B62
D 37 94 37 94 7 8 7 8 D
MA_B5 A4 DQ4 MDQ_B5 MAB_B5 A4 DQ4 MDQ_B5 MDQ_B47 MDQ_B1
32 95 32 95 1 2 1 2
MA_B6 A5 DQ5 MDQ_B6 MA_B6 A5 DQ5 MDQ_B6 MDQ_B43 RN29 MDQ_B5 RN30
125 98 125 98 3 4 3 4
MA_B7 A6 DQ6 MDQ_B7 MA_B7 A6 DQ6 MDQ_B7 MDQ_B46 56 MDQ_B4 56
29 99 29 99 5 6 5 6
MA_B8 A7 DQ7 MDQ_B8 MA_B8 A7 DQ7 MDQ_B8 MDQM_B5 MDQ_B0
122 12 122 12 7 8 7 8
MA_B9 A8 DQ8 MDQ_B9 MA_B9 A8 DQ8 MDQ_B9 MDQM_B1 MDQ_B10
27 13 27 13 1 2 1 2
MA_B10 A9 DQ9 MDQ_B10 MA_B10 A9 DQ9 MDQ_B10 MDQ_B13 RN31 MDQ_B11 RN32
141 19 141 19 3 4 3 4
MA_B11 A10/AP DQ10 MDQ_B11 MA_B11 A10/AP DQ10 MDQ_B11 MDQS_B1 56 MDQ_B15 56
118 20 118 20 5 6 5 6
MA_B12 A11 DQ11 MDQ_B12 MA_B12 A11 DQ11 MDQ_B12 MDQ_B12 MDQ_B14
115 105 115 105 7 8 7 8
A12/NC DQ12 MDQ_B13 A12/NC DQ12 MDQ_B13 MDQ_B9
167 106 167 106 1 2
A13/NC DQ13 MDQ_B14 A13/NC DQ13 MDQ_B14 MDQ_B28 MDQ_B8 RN33
109 109 1 2 3 4
MBA_B0 DQ14 MDQ_B15 MBA_B0 DQ14 MDQ_B15 MDQ_B24
59 110 59 110 3 4 RN84 MDQ_B3 5 6 56
8 MBA_B0 MBA_B1 BA0 DQ15 MDQ_B16 MBA_B1 BA0 DQ15 MDQ_B16 MDQ_B19
52 23 52 23 5 6 56 MDQ_B7 7 8
8 MBA_B1 BA1 DQ16 MDQ_B17 BA1 DQ16 MDQ_B17 MDQ_B23 MDQ_B22
113 24 113 24 7 8 1 2
NC/BA2 DQ17 MDQ_B18 NC/BA2 DQ17 MDQ_B18 MDQ_B18 RN34
28 28 3 4
MCS_B#0 DQ18 MDQ_B19 MCS_B#2 DQ18 MDQ_B19 MDQM_B2 56
157 31 157 31 5 6
8 MCS_B#0 MCS_B#1 CS0# DQ19 MDQ_B20 8 MCS_B#2 MCS_B#3 CS0# DQ19 MDQ_B20 MDQ_B45 R129 56 MDQ_B21
8 MCS_B#1 158 114 8 MCS_B#3 158 114 7 8
CS1# DQ20 MDQ_B21 CS1# DQ20 MDQ_B21 MDQ_B42 R130 56 MDQS_B2
71 117 71 117 1 2
NC/CS2# DQ21 MDQ_B22 NC/CS2# DQ21 MDQ_B22 MDQ_B39 R131 56 MDQ_B16 RN35
163 121 163 121 3 4
NC/CS3# DQ22 MDQ_B23 NC/CS3# DQ22 MDQ_B23 MDQS_B5 R132 56 MDQ_B17 56
123 123 5 6
MRAS_B# DQ23 MDQ_B24 MRAS_B# DQ23 MDQ_B24 MDQ_B20
8 MRAS_B# 154 33 154 33 7 8
MCAS_B# RAS# DQ24 MDQ_B25 MCAS_B# RAS# DQ24 MDQ_B25 VTT_DDR MDQM_B3
65 35 65 35 1 2
8 MCAS_B# MWE_B# CAS# DQ25 MDQ_B26 MWE_B# CAS# DQ25 MDQ_B26 MA_B1 MDQS_B3 RN36
63 39 63 39 1 2 3 4
8 MWE_B# WE# DQ26 MDQ_B27 WE# DQ26 MDQ_B27 MAB_B1 RN37 MDQ_B29 56
40 40 3 4 5 6
MDQS_B0 DQ27 MDQ_B28 MDQS_B0 DQ27 MDQ_B28 MA_B2 47 MDQ_B25
8 MDQS_B[0..7] 5 126 5 126 5 6 7 8
MDQS_B1 DQS0 DQ28 MDQ_B29 MDQS_B1 DQS0 DQ28 MDQ_B29 MAB_B2 MDQ_B27
14 127 14 127 7 8 1 2
MDQS_B2 DQS1 DQ29 MDQ_B30 MDQS_B2 DQS1 DQ29 MDQ_B30 MA_B9 MDQ_B31 RN38
25 131 25 131 1 2 3 4
MDQS_B3 DQS2 DQ30 MDQ_B31 MDQS_B3 DQS2 DQ30 MDQ_B31 MA_B11 RN39 MDQ_B30 56
36 133 36 133 3 4 5 6
MDQS_B4 DQS3 DQ31 MDQ_B32 MDQS_B4 DQS3 DQ31 MDQ_B32 MA_B7 47 MDQ_B26
56 53 56 53 5 6 7 8
MDQS_B5 DQS4 DQ32 MDQ_B33 MDQS_B5 DQS4 DQ32 MDQ_B33 MA_B12 MDQ_B38
67 55 67 55 7 8 1 2
MDQS_B6 DQS5 DQ33 MDQ_B34 MDQS_B6 DQS5 DQ33 MDQ_B34 MA_B6 MDQM_B4 RN40
78 57 78 57 1 2 3 4
C MDQS_B7 DQS6 DQ34 MDQ_B35 MDQS_B7 DQS6 DQ34 MDQ_B35 MA_B5 RN41 MDQ_B34 56 C
86 60 86 60 3 4 5 6
DQS7 DQ35 MDQ_B36 DQS7 DQ35 MDQ_B36 MAB_B5 47 MDQS_B4
47 146 47 146 5 6 7 8
DQS8 DQ36 MDQ_B37 DQS8 DQ36 MDQ_B37 MA_B8 MDQ_B37
147 147 7 8 1 2
MDQM_B0 DQ37 MDQ_B38 MDQM_B0 DQ37 MDQ_B38 MBA_B1 MDQ_B33 RN42
8 MDQM_B[0..7] 97 150 97 150 1 2 3 4
MDQM_B1 DQM0/DQS9 DQ38 MDQ_B39 MDQM_B1 DQM0/DQS9 DQ38 MDQ_B39 MA_B10 RN43 MDQ_B36 56
107 151 107 151 3 4 5 6
MDQM_B2 DQM1/DQS10 DQ39 MDQ_B40 MDQM_B2 DQM1/DQS10 DQ39 MDQ_B40 MA_B0 47 MDQ_B32
119 61 119 61 5 6 7 8
MDQM_B3 DQM2/DQS11 DQ40 MDQ_B41 MDQM_B3 DQM2/DQS11 DQ40 MDQ_B41 MDQ_B40
129 64 129 64 7 8 1 2
MDQM_B4 DQM3/DQS12 DQ41 MDQ_B42 MDQM_B4 DQM3/DQS12 DQ41 MDQ_B42 MCS_B#1 MDQ_B41 RN44
149 68 149 68 1 2 3 4
MDQM_B5 DQM4/DQS13 DQ42 MDQ_B43 MDQM_B5 DQM4/DQS13 DQ42 MDQ_B43 MCS_B#0 RN45 MDQ_B44 56
159 69 159 69 3 4 5 6
MDQM_B6 DQM5/DQS14 DQ43 MDQ_B44 MDQM_B6 DQM5/DQS14 DQ43 MDQ_B44 MCS_B#3 47 MDQ_B35
169 153 169 153 5 6 7 8
MDQM_B7 DQM6/DQS15 DQ44 MDQ_B45 MDQM_B7 DQM6/DQS15 DQ44 MDQ_B45 MCS_B#2 MDQ_B53
177 155 177 155 7 8 1 2
DQM7/DQS16 DQ45 MDQ_B46 DQM7/DQS16 DQ45 MDQ_B46 MCKE_B0 MDQ_B49 RN46
140 161 140 161 1 2 3 4
DQM8/DQS17 DQ46 MDQ_B47 DQM8/DQS17 DQ46 MDQ_B47 MCKE_B2 RN47 MDQ_B48 56
162 162 3 4 5 6
DQ47 MDQ_B48 DQ47 MDQ_B48 MCKE_B1 47 MDQ_B52
44 72 44 72 5 6 7 8
MECC0 DQ48 MDQ_B49 MECC0 DQ48 MDQ_B49 MCKE_B3 MDQ_B61
45 73 45 73 7 8 1 2
MECC1 DQ49 MDQ_B50 MECC1 DQ49 MDQ_B50 MDQ_B60 RN48
49 79 49 79 3 4
MECC2 DQ50 MDQ_B51 MECC2 DQ50 MDQ_B51 MCAS_B# MDQ_B51 56
51 80 51 80 1 2 5 6
MECC3 DQ51 MDQ_B52 MECC3 DQ51 MDQ_B52 MBA_B0 RN85 MDQ_B50
134 165 134 165 3 4 7 8
MECC4 DQ52 MDQ_B53 MECC4 DQ52 MDQ_B53 MWE_B# 47 MDQ_B55
135 166 135 166 5 6 1 2
MECC5 DQ53 MDQ_B54 MECC5 DQ53 MDQ_B54 MRAS_B# MDQS_B6 RN49
142 170 142 170 7 8 3 4
MECC6 DQ54 MDQ_B55 MECC6 DQ54 MDQ_B55 MA_B3 MDQ_B54 56
144 171 144 171 1 2 5 6
MECC7 DQ55 MDQ_B56 MECC7 DQ55 MDQ_B56 MAB_B3 RN86 MDQM_B6
83 83 3 4 7 8
MCKE_B0 DQ56 MDQ_B57 MCKE_B2 DQ56 MDQ_B57 MAB_B4 47 MDQS_B7
8 MCKE_B0 21 84 8 MCKE_B2 21 84 5 6 1 2
MCKE_B1 CKE0 DQ57 MDQ_B58 MCKE_B3 CKE0 DQ57 MDQ_B58 MA_B4 MDQM_B7 RN50
8 MCKE_B1 111 87 8 MCKE_B3 111 87 7 8 3 4
CKE1 DQ58 MDQ_B59 CKE1 DQ58 MDQ_B59 MDQ_B57 56
88 88 5 6
SMBCLK_ISO DQ59 MDQ_B60 SMBCLK_ISO DQ59 MDQ_B60 MDQ_B56
6 SMBCLK_ISO 92 174 92 174 7 8
SMBDATA_ISO SCL DQ60 MDQ_B61 SMBDATA_ISO SCL DQ60 MDQ_B61
6 SMBDATA_ISO 91 175 91 175
SDA DQ61 MDQ_B62 SDA DQ61 MDQ_B62
178 178
181
DQ62
179 MDQ_B63 181
DQ62
179 MDQ_B63 DECOUPLING CAPACITORS
SA0 DQ63 VCC_DDR SA0 DQ63
VCC_DDR 182 VCC_DDR 182
SA1 SA1 VTT_DDR VTT_DDR VCC_DDR
183 9 183 9
B SA2 NC SA2 NC B
101 101
NC NC CB45 CB46 CB53
102 102
NC R149 NC X_104P 104P X_104P
16 173 16 173
8 MCLK_B1 CK0/NC NC 75RST 8 MCLK_B4 CK0/NC NC CB47 CB48 CB56
17 17
8 MCLK_B#1 CK0#/NC DDR_VREF2 8 MCLK_B#4 CK0#/NC DDR_VREF2 104P 104P X_104P
8 MCLK_B0 137 1 8 MCLK_B3 137 1
CK1/CK0 VREF CK1/CK0 VREF CB49 CB50 CB59
138 90 138 90
8 MCLK_B#0 CK1#/CK0# WP C125 R150 8 MCLK_B#3 CK1#/CK0# WP C126 X_104P X_104P 104P
76 103 76 103
8 MCLK_B2 CK2/NC FETEN/NC 104P 75RST 8 MCLK_B5 CK2/NC FETEN/NC 104P CB51 CB52 CB62
75 10 75 10
8 MCLK_B#2 CK2#/NC NC/RESET# 8 MCLK_B#5 CK2#/NC NC/RESET# 104P 104P 104P
82 POWER 15 82 POWER 15 CB54 CB55
ID_VDD VDDQ VCC_DDR ID_VDD VDDQ VCC_DDR
22 22 X_104P 104P
VDDQ VDDQ CB57 CB58
VCC_DDR 184 30 VCC_DDR 184 30
SPD_VDD VDDQ SPD_VDD VDDQ 104P X_104P
54 54
VDDQ VDDQ CB60 CB61
62 62
VDDQ VDDQ 104P 104P
VCC_DDR 7 77 VCC_DDR 7 77
VDD VDDQ VDD VDDQ CB63 CB64
38 96 38 96
VDD VDDQ VDD VDDQ X_104P X_104P
46 104 46 104
VDD VDDQ VDD VDDQ CB65 CB66
70 112 70 112
VDD VDDQ VDD VDDQ 104P 104P
85 128 85 128
VDD VDDQ VDD VDDQ CB67 CB68
108 136 108 136
VDD VDDQ VDD VDDQ 104P 104P
120 143 120 143
VDD VDDQ VDD VDDQ CB69 CB70
148 156 148 156
VDD VDDQ VDD VDDQ 104P 104P
168 164 168 164
VDD VDDQ VDD VDDQ CB71 CB72
172 172
VDDQ VDDQ 104P 104P
81 180 81 180
GND VDDQ GND VDDQ CB73 CB74
89 89
GND GND 104P 104P
93 3 93 3
GND GND GND GND
100 11 100 11
GND GND GND GND Place the se decoupling capacitors close to VTT_DDR termination resistors.
116 18 116 18
GND GND GND GND One decoupling capacitor for each R-pack.
124 26 124 26
GND GND GND GND
A 132 34 132 34 A
GND GND GND GND
139 42 139 42
GND GND GND GND
145 50 145 50
GND GND GND GND
152 58 152 58
GND GND GND GND
160 66 160 66
GND GND GND GND
176 74 176 74 Micro Star Restricted Secret
GND GND GND GND
DIMM-D184-BK DIMM-D184-BK Title Rev
DDR DIMM 3,4 0A
ADDR.=1010010B ADDR.=1010011B
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Tuesday, November 26, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 11 of 33
5 4 3 2 1
5 4 3 2 1

AGP 1.5V 4X/8X SLOT(AGP VER:3.0) AGP Slot Imax Springdale Reference & Swing Voltage Circuit
D
VCC5 = 60mils trace / 15 mils space VCCq 2.0A D
VCC3 6.0A
VCC12 1.0A
AGP1 VCC5 2.0A
B1 A1 VCC3_SB 0.75A VCC_AGP +12V VCC_AGP R151 60.4RST
-OVRCNT 12V +12V VCC_AGP GSWING 9
B2 A2
VCC5 5V -TYPEDET G_DET#
B3 A3
5V RESERVED
B4 A4
USB+ USB- R152 R153 R154 R155 C127
B5 A5
GND GND 8.2K 8.2K 8.2K 39.2RST 104P
B6 A6 PIRQ#A 15,17,18
15,17,18 PIRQ#B -INTB -INTA PCIRST_ICH5#
6 AGP_CLK B7 A7 PCIRST_ICH5# 15,25,29
GREQ# CLK -RST GGNT#
B8 A8 GGNT# 9
9 GREQ# -REQ -GNT GPERR# R156 33.2RST AGP_REF
B9 A9 VCC3 AGP_REF 9
VCC3 3.3V 3.3V
B10 A10 ST1 9
9 ST0 ST0 ST1
B11 A11
9 ST2 RBF# ST2 RESERVED PIPE# Q7 Q8 R157 C128
B12 A12 PIPE# 9
9 RBF# -RBF -PIPE 2N3904S 2N3904S 100RST 104P
B13 A13
GND GND WBF#
9 DBI_LO B14 A14 WBF# 9
RESERVED -WBF G_DET#
B15 A15 SBA1 9
9 SBA0 SBA0 SBA1
B16 A16
3.3V 3.3V Q9 R158
9 SBA2 B17 A17 SBA3 9
SBA2 SBA3 2N3904S 100
B18 A18 SB_STB# 9
9 SB_STB SB_STB -SB_STB
B19 A19
GND GND
9 SBA4 B20
SBA4 SBA5
A20 SBA5 9 G_DET# SPEC AGP_REF
B21 A21 SBA7 9
9 SBA6 SBA6 SBA7
B22
RSVD/KEY RSVD/KEY
A22 FLOATING AGP2.0 0.75V>0.55V
B23 A23
GND/KEY GND/KEY
3VDUAL B24
AUX3V/KEY RSVD/KEY
A24 LOW AGP3.0 0.35V<0.55V
B25 A25
3.3V/KEY 3.3V/KEY
B26 A26 GAD30 9
9 GAD31 AD31 AD30
B27 A27 GAD28 9
C 9 GAD29 AD29 AD28 C
B28 A28
3.3V 3.3V
B29 A29 GAD26 9
9 GAD27 AD27 AD26
B30 A30 GAD24 9
9 GAD25 AD25 AD24
B31 A31
GND GND
B32 A32
9 AD_STB1
B33
AD_STB1 -AD_STB1
A33
AD_STB#1 9 AGP TERMINATION RESISTORS
9 GAD23 AD23 C/-BE3 GC_BE#3 9
VCC_AGP B34 A34 VCC_AGP
VDDQ VDDQ
B35 A35 GAD22 9
9 GAD21 AD21 AD22
B36 A36 GAD20 9
9 GAD19 AD19 AD20
B37 A37
GND GND
B38 A38 GAD18 9
9 GAD17 AD17 AD18 GSERR# R159 8.2K
B39 A39 GAD16 9 VCC_AGP
9 GC_BE#2 C/-BE2 AD16
B40 A40
GIRDY# VDDQ VDDQ GFRAME#
B41 A41 GFRAME# 9
9 GIRDY# -IRDY -FRAME
B42 A42
AUX3V/KEY RSVD/KEY
B43 A43
GND/KEY GND/KEY
B44 A44
RSVD/KEY RSVD/KEY
B45 A45
GDEVSEL# 3.3V/KEY 3.3V/KEY GTRDY#
9 GDEVSEL# B46 A46 GTRDY# 9
-DEVSEL -TRDY GSTOP#
B47 A47 GSTOP# 9
GPERR# VDDQ -STOP PME#
B48 A48 PME# 15,17,18,22
-PERR -PME
B49 A49
GSERR# GND GND GPAR
B50
B51
-SERR PAR
A50
A51
GPAR 9 AGP SLOT DECOUPLING CAPACITORS
9 GC_BE#1 C/-BE1 AD15 GAD15 9
B52 A52
VDDQ VDDQ VCC_AGP
B53 A53 GAD13 9
9 GAD14 AD14 AD13 +12V 3VDUAL VCC3
B54 A54 GAD11 9
9 GAD12 AD12 AD11
B55 A55
GND GND C129 C130 C131 C132
B56 A56 GAD9 9
9 GAD10 AD10 AD9
B57 A57 X_104P 104P 1U/0805 104P
9 GAD8 AD8 C/-BE0 GC_BE#0 9
B58 A58 C134 C135 C136
B VDDQ VDDQ 104P 1U/0805 104P B
B59 A59 AD_STB#0 9
9 AD_STB0 AD_STB0 -AD_STB0 C137 C138
B60 A60 GAD6 9
9 GAD7 AD7 AD6 1U/0805 104P
B61 A61
GND GND VCC5 C139 C140
B62 A62 GAD4 9
9 GAD5 AD5 AD4 X_1U/0805 X_104P
9 GAD3 B63 A63 GAD2 9
AD3 AD2 C141 C142
B64 A64
VDDQ VDDQ X_104P 104P
B65 A65 GAD0 9
9 GAD1 AGP_REF AD1 AD0 C143 C144
B66 A66
VREF_CG VREF_GC 104P 104P
C145 AGP Slot-D124 _1.5V C146
104P 104P
PIRQ#A / PIRQ#B

A A

Micro Star Restricted Secret


Title Rev
AGP SLOT 0A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 12 of 33
5 4 3 2 1
5 4 3 2 1

Intel 82547EI U3A

CI0 J1 ACTIVITY LED


9 CI[0..10] CI[0]-NC
CI1 J2 A12 LAN_LINK R160 330 LAN_LINK_UP Green= LINK UP
CI2 CI[1]-NC LED_LINK_UP_N-LILED LAN_ACTLED BLINKING= TX/RX Activity
J3 C11
CI[2]-NC LED_ACTIVITY_N-ACTLED

LEDS
CI3 K1 B11 LINK_100 R161 330 LINK_100_C
CI4 CI[3]-NC LED_LINK_100_N-SPEEDLED LINK_1000
L3 B12
CI5 CI[4]-NC LED_LINK_1000_N-TOUT
M2
CI6 CI[5]-NC
M1
CI7 CI[6]-NC
N2
CI[7]-NC
D D

CSA Port

Ethernet Port
C13 MDI_0+
LAN_CLK66 MDI_PLUS[0]-TDP MDI_0-
6 LAN_CLK66 G1 C14
CI_CLK-NC MDI_MINUS[0]-TDN MDI_1+
E13
PCIRST#1 MDI_PLUS[1]-RDP MDI_1-
7,18,20,22,25,29 PCIRST#1 B9 E14
PCI_RST#-NC MDI_MINUS[1]-RDN MDI_2+
F13
CI10 MDI_PLUS[2]-NC MDI_2-
H1 F14
CI9 CI[10]-NC MDI_MINUS[2]-NC MDI_3+ 3VDUAL
G2 H13
CI8 CI[9]-NC MDI_PLUS[3]-NC MDI_3-
H3 H14
CI[8]-NC MDI_MINUS[3]-NC

CI_STRS L1 ASF 1.0 ASF 2.0


9 CI_STRS CI_STRS-NC 3VDUAL
CI_STRF L2 Microwire EEPROM SPI EEPROM
9 CI_STRF CI_STRF-NC U4 U5 R162 R163
P7 EE_CS 1 8 EE_CS 1 8
EE_CS-NC CS VCC CS# VCC

EEProm
M10 EE_SK 2 7 EE_SK 6 7 3.3K 3.3K
R164 30.1RST EE_SK-NC EE_DI SK NC C147 EE_DI SCK HOLD#
VCCL1.2 N3 P10 3 6 5 3
CI_RCOMP-NC EE_DI-NC EE_DO DI NC 104P EE_DO SI WP#
N10 4 5 2 4
EE_DO-NC DO GND SO GND
Install this resistor if using the 82547EI's ASF C4 R165 1K X_ATL-128x8-0.5us-SOIC8 X_ATL-128x8-0.5us-SOIC8
EE_MODE 3VDUAL
capabilities
R166 3.3K B10 R167 1K
VCC3 SMBALRT/PCI_PWR_GOOD-NC Pull-down if using Microwire protocol EEPROM

SMBUS
A10 Pull-Up if using SPI EEPROM devices.
6,10,11,16,17,25 SMBCLK SMB_CLK-NC

Serial FLASH
6,10,11,16,17,25 SMBDATA C9 M9
SMB_DAT-NC FLSH_CE_N-NC
N9
FLSH_SCK-NC
M11
R169 3.3K FLSH_SI-NC Disable Kenai II
16,29 RSMRST# A9 P9 LAN_DISABLE# 16
R170 1K LAN_PWRGD-NC FLSH_SO-NC ICH5 GPIO25 default is HIGH
3VDUAL J12
AUX_PWR-NC
A2
C XTAL1 INTA#-NC C
K14
XTAL2 XTAL1-XTAL1
J14 A6 CSA_PME# 16
XTAL2-XTAL2 PME#-NC The CSA Interface needs a unique PME# netbecause
X1
Route to ICH5 GPI8 signal resides on a seperate PCI-PCI bridge segment

SDP/Jordan I/F
25M-18pf-HC49S-D L12
JTAG_TMS-NC

JTAG/LCI
C148 C149 M12 M13
22p 22p SDP[3]-LAN_RXD2 JTAG_TDI-LAN_RSTSYNC R171 1K
N13 L14
SDP[2]-LAN_RXD1 JTAG_TCK-LAN_TXD2 R172 1K
P13 L13
SDP[1]-LAN_RXD0 JTAG_TRST#-LAN_TXD1
N14 M14
SDP[0]-LAN_CLK JTAG_TDO-LAN_TXD0

NORTHWOOD/PRESCOTT-N
{Priority}

3VDUAL

1000
MDI[0]+/- N58-16F0031-F02
MDI[1]+/- 330 330
MDI[2]+/- VCCL1.8 R173 R174
MDI[3]+/- USB1B

B B

Yellow
U7
1 24 LAN_ACTLED 17
MDI_0+ TCT1 MCT1 MX0+ LAN_LINK_UP
2 23 18
MDI_0- TD1+ MX1+ MX0- MX3-
3 22 9
TD1- MX1- MX3+
8
4 21 13
MDI_1+ TCT2 MCT2 MX1+ MX1- 7
5 20 10
MDI_1- TD2+ MX2+ MX1- MX2-
6 RX-
6 19 14
TD2- MX2- MX2+ 5
7 18 11
MDI_2+ TCT3 MCT3 MX2+ MX1+ 4
8 17 15
MDI_2- TD3+ MX3+ MX2- MX0- 3 RX+
9 16 12
TD3- MX3- MX0+ 2 TX-
10 15 16
MDI_3+ TCT4 MCT4 MX3+ LINK_1000 1 TX+

Green
11 14 19
MDI_3- TD4+ MX4+ MX3- LINK_100_C
12 13 20
TD4- MX4-
Place these components close PA-H5007
to the LAN Conroller
Reserved larger plane.
R175 75 USB/LAN

R176 75

C150 103P R178 49.9 R180 75

R181 49.9 R182 75


C152
C151 103P R183 49.9 GIGA_GND 102P/2KV

R185 49.9

A A
8
6
4
2

C157 103P R186 49.9 CP11 CN17

R187 49.9 104P 104P 104P 104P 8P4C-102P


Micro Star Restricted Secret
C153 C154 C155 C156 Title Rev
7
5
3
1

C163 103P R188 49.9 X_COPPER 82547EI Gigabit LAN 1 100


R189 49.9 Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 13 of 33
5 4 3 2 1
5 4 3 2 1

1.8V Voltage Regulation


3VDUAL 4
C

C164
105P
B C E
VCCL1.8 VCCL1.2 R190 1 2 3
D D
5.1K

3
CTRL1.8 1 Q10
VCCL1.2 BCP69 VCC1.8_SB:300mA

G3
A5
A8
B1
B2
B4
B5
B6
B8
C1
C2
C3
C6
C7
D3
VCCL1.8
U3B

2
4
R191 1A/0.5W

RESERVED_NC-NC_A5
RESERVED_NC-NC_A8
RESERVED_NC-NC_B1
RESERVED_NC-NC_B2
RESERVED_NC-NC_B4
RESERVED_NC-NC_B5
RESERVED_NC-NC_B6
RESERVED_NC-NC_B8
RESERVED_NC-NC_C1
RESERVED_NC-NC_C2
RESERVED_NC-NC_C3
RESERVED_NC-NC_C6
RESERVED_NC-NC_C7
RESERVED_NC-NC_D3
RESERVED_NC-NC_G3
C165
X_100K
G4 G5 104P
CSA_1.2V-NC_G4 CORE_VDD-VCCR_G5
H4 G6
C166 CSA_1.2V-NC_H4 CORE_VDD-VCC3.3_G6
J4 H5
103P CSA_1.2V-NC_J4 CORE_VDD-VCCR_H5
M4 H6
CSA_1.2V-NC_M4 CORE_VDD-VCC3.3_H6
H7
CORE_VDD-VCC3.3_H7
J13 H8
XTAL1.8V-NC CORE_VDD-VCC3.3_H8
J5
CORE_VDD-VCCR_J5
F12 J6
CLKRCAP-NC_F12 CORE_VDD-VCC3.3_J6
J7
CORE_VDD-VCC3.3_J7
+

H12 J8
EC5 C167 XTALCAP-NC_H12 CORE_VDD-VCC3.3_J8
J9
CORE_VDD-VCC3.3_J9
+

102P B3 J10
10U/16V/S C168 VSSPST-VSS_B3 CORE_VDD-VCC3.3_J10
B7 J11
EC6 102P VSSPST-VSS_B7 CORE_VDD-VCC3.3_J11 4
C10 K5
VSSPST-VSS_C10 CORE_VDD-VCC3.3_K5 C
E2 K6
10U/16V/S VSSPST-VSS_E2 CORE_VDD-VCC3.3_K6
M6 K7
VSSPST-VSSA_M6 CORE_VDD-VCC3.3_K7
N12 K8
P8
VSSPST-VSSP_N12 CORE_VDD-VCC3.3_K8
K9
1.2V Voltage Regulation
VSSPST-VSSA_P8 CORE_VDD-VCC3.3_K9
K10
CORE_VDD-VCC3.3_K10 B C E
D5 K11
VSS-VSS_D5 CORE_VDD-VCC3.3_K11 1 2 3
D7 L4
VSS-VSS_D7 CORE_VDD-VCC3.3_L4 3VDUAL
D8 L5
C VSS-VSS_D8 CORE_VDD-VCC3.3_L5 C
E5 L9
VSS-VSS_E5 CORE_VDD-VCC3.3_L9
E6 L10
VSS-VSS_E6 CORE_VDD-VCC3.3_L10
E7
VSS-VSS_E7 Voltage drop to prevent heat generate from BCP69
E8 E11
VSS-VSS_E8 ANALOG_1.2V-VCCT_E11
E9 H11
VSS-VSS_E9 ANALOG_1.2V-VCC3.3_H11 C169
F4
VSS-VSSR_F4
(Default mount 0 Ohm)
F6 E12 105P
VSS-VSS_F6 ANALOG_1.2V-VCCT_E12 3VDUAL
F7 G13
VSS-VSS_F7 ANALOG_1.2V-VCC3.3_G13
F8
VSS-VSS_F8 R192
F9 A3
VSS-VSS_F9 VDDPST-VCC3.3_A3
F10 A7
VSS-VSS_F10 VDDPST-VCC3.3_A7 5.1K
G7 A11
VSS-VSS_G7 VDDPST-VCCT

3
G8
VSS-VSS_G8 VDDPST-VCC3.3_E1
E1 VCC1.2_SB:500mA
G9 K3 CTRL1.2 1 Q11
VSS-VSS_G9 VDDPST-VCC3.3_K3 BCP69 VCCL1.2
G10 K13
VSS-VSS_G10 VDDPST-VCCP_K13
G11 N6
VSS-VSS_G11 VDDPST-VCCA_N6 R193

2
4
H9 N8
VSS-VSS_H9 VDDPST-VCCA_N8
H10
VSS-VSS_H10 VDDPST-VCC3.3_P2
P2
X_100K 1A/1.35W
L11 P12 C170
VSS-VSSP_L11 VDDPST-VCCP_P12 VCCL1.8 104P
C12
ANALOG_VSS-VSSA_C12
D13 D12
ANALOG_VSS-VSSA_D13 CLKR1.8V-ISOL_TI
K12
ANALOG_VSS-VSSP_K12
G14 D11
ANALOG_VSS-VSS_G14 VDDR1P8-NC_D11 C171
G12
VDDR1P8-NC_G12 103P
F11
GNDC-VSS_F11
H2
CSA_VSS-NC_H2
M3 B14
CSA_VSS-NC_M3 IEEE_TEST+-RBIAS10
K2
CSA_VSS-VSS_K2
N1 D14
VCCL1.2 CSA_VSS-VSS_N1 IEEE_TEST--ISOL_TCK
B CTRL1.8 B
B13
CTRL18-RBIAS100
R194 P11 CTRL1.2
CTRL12-NC
D10
604RST800mV CSA_SWING RESERVED_NC-ISOL_EXEC
P3 A13
CSA_VREF CI_SWING-NC TEST-TESTEN VCCL1.2 VCCL1.8
N4
CI_VREF-NC 3VDUAL
C172 R195 C173 VCCL1.2 K4
RESERVED_3.3V-VCC3.3 3VDUAL
104P 103P M5 C174 + EC8 + EC9
RESERVED_NC-NC_N11

665RST PLL1.8V-NC
RESERVED_NC-NC_M7
RESERVED_NC-NC_M8
RESERVED_NC-NC_A4

RESERVED_NC-NC_E3

RESERVED_NC-NC_P4
RESERVED_NC-NC_P5
RESERVED_NC-NC_P6
RESERVED_NC-ADV10

RESERVED_NC-NC_C5
RESERVED_NC-NC_C8
RESERVED_NC-NC_D1
RESERVED_NC-NC_D2
RESERVED_NC-NC_D9

RESERVED_NC-NC_N7
RESERVED_NC-NC_F1
RESERVED_NC-NC_F2
RESERVED_NC-NC_F3
RESERVED_NC-NC_L8

N5 D6 104P 10U/16V/S 10U/16V/S


350mV PLLCAP-NC RESERVED_VSS-VSS_D6 C175
L6 E10
PLL_VSS-VSSA_L6 RESERVED_VSS-VSS_E10 104P C176 C177
F5
RESERVED_VSS-VSS_F5 C178 104P 104P
D4
C179 R196 C180 RESERVED_VSS-VSS_D4 104P C181 C182
E4
NC-NC_A14

NC-NC_P14

104P 103P C183 RESERVED_VSS-VSS_E4 103P 103P


NC-NC_A1

NC-NC_P1

523RST 102P C190 C185 C186


103P 103P 103P
C193 C188
103P 103P
N11

A14

P14

C196 C191
M7
M8
A4

E3

P4
P5
P6

A1

P1
C5
C8
D1
D2
D9

N7
F1
F2
F3
L7

L8

103P 103P

NORTHWOOD/PRESCOTT-N

{Priority}

A A

Micro Star Restricted Secret


Title Rev
82547EI Gigabit LAN 2 0A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 14 of 33
5 4 3 2 1
5 4 3 2 1

VCC1_5SB
C202
103P C201

C203 103P

VCC3 VCC_AGP 3VDUAL 103P 3VDUAL

ICH5 Pull-Up / Down Resistors

AD13
AD20
W15
W17
W24

W19

W10
W11
M10

M15

AA4
AB4
G19
G21

N10

R13

R10

H24

N15
N23

R12
V19

K10
K12
K13

P19

K19

E15

E22

B15
E13
E14
E18

K15

E11
F15
F14

F16
F17
F18

F19

F10
F11
L19

J19

W9

W6
W7
W8
G1
B5

K6

P6

V6

Y5
H6

R6

U6
PREQ#A R197 2.7K

F6

F7
F8
L6
D VCC5 D
U8A

VCCLAN1_5/VCCSUS1_5C
VCCLAN1_5/VCCSUS1_5C
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

VCCLAN3_3/VCCSUS3_3
VCCLAN3_3/VCCSUS3_3
VCCLAN3_3/VCCSUS3_3
VCCSUS1_5A
VCCSUS1_5B
VCCSUS1_5B
VCCSUS1_5B
AD0 J4 AB16 PDD0
17,18,20,22 AD[0..31] AD0 PDD0 PDD[0..15] 21
AD1 J5 Y13 PDD1
AD2 AD1 PDD1 PDD2
G3 Y14
AD3 AD2 PDD2 PDD3
K4 AC14
AD4 AD3 PDD3 PDD4 PGNT#A R198 X_1K internal pull up 20K
H5 AA14
AD5 AD4 PDD4 PDD5
H2 AC15
AD6 AD5 PDD5 PDD6 TOP SWAP OVERRIDE
J3 AD14
AD7 AD6 PDD6 PDD7
J2 AB14
AD8 AD7 PDD7 PDD8 VCC3
K5 AD15
AD9 AD8 PDD8 PDD9 AC_SDOUT R199 X_1K internal pull down 20K
F2 Y15
AD10 AD9 PDD9 PDD10
M4 AD16
AD11 AD10 PDD10 PDD11 HI:CPU speed strap SAFE MODE
H4 AA15
AD12 AD11 PDD11 PDD12
L5 AC16
AD13 AD12 PDD12 PDD13
G2 Y16
AD14 AD13 PDD13 PDD14
K1 AA16
AD15 AD14 PDD14 PDD15
G5 AB17
AD16 AD15 PDD15
G4
AD17 AD16
L1
AD18 AD17
B2 AA19 PD_A0 21
AD19 AD18 PDA0
P5 AD19
AD20 H3
AD19 PDA1
AC19
PD_A1 21 ICH5 Decoupling Capacitors
AD20 PDA2 PD_A2 21
AD21 N5
AD22 AD21 All caps be placed less than 100mils.
C4 AB19 PD_CS#1 21
AD23 AD22 PDCS1#
N4 Y18 PD_CS#3 21
AD24 AD23 PDCS3# VCC3 VCC3
E6
AD25 AD24
P3 AD18 PD_IOR# 21
AD26 AD25 PDIOR# C204 C205
D3 AA17 PD_IOW# 21
AD27 AD26 PDIOW# 104P 104P
N2 AA18 PD_IORDY 21
C AD28 AD27 PIORDY C206 C207 C
F5
AD29 AD28 104P 104P
P4 AC17 PD_DREQ 21
AD30 AD29 PDDREQ C208 C209
F4 AC18 PD_DACK# 21
AD31 AD30 PDDACK# 104P 104P
P2
AD31
Y17 IRQ14 21
C_BE#0 IRQ14 Close A1,A7,H1,P1,AD12 and AD21 of ICH5.
17,18,20,22 C_BE#[0..3] E3
C_BE#1 C/BE0#
J1
C_BE#2 C/BE1# SDD0 3VDUAL 3VDUAL
N3 AA22 SDD[0..15] 21
C_BE#3 C/BE2# SDD0 SDD1
M2 AB23
C/BE3# SDD1 SDD2 C210 C211
AD23
SDD2 SDD3 104P 1U/0805
17,18,20,22 FRAME# D2 AD24
FRAME# SDD3 SDD4 C212 C213
17,18,20,22 IRDY# M3 AB21
IRDY# SDD4 SDD5 104P 103P
17,18,20,22 TRDY# E4 AC21
TRDY# SDD5 SDD6 C214 C215
17,18,20,22 DEVSEL# L3 AB20
DEVSEL# SDD6 SDD7 104P 103P
17,18,20,22 STOP# E5 AC20
STOP# SDD7 SDD8 {VOLTAGE}
Y19
SDD8 SDD9 0.1uF close A15,A23, and V1 of ICH5.
17,18,20,22 PAR F1 AD22
PAR SDD9 SDD10 Another close A17,A19 and A21 of ICH5.
17,18,20,22 PERR# K2 AC22
PERR# SDD10 SDD11
17,18,20 SERR# L4 AA20
SERR# SDD11 SDD12 VCC_AGP VCC_AGP
AB22
SDD12 SDD13
17,18 LOCK# L2 AC24
PLOCK# SDD13 SDD14 C216 C217
AB24
SDD14 SDD15 104P 104P
12,17,18,22 PME# V2 AA23
PME# SDD15 C218 C219
B3 X_104P 104P
12,17,18 PIRQ#A PIRQA#
12,17,18 PIRQ#B E1 W22 SD_A0 21
PIRQB# SDA0
17,18 PIRQ#C A2 W23 SD_A1 21
PIRQC# SDA1
17,18 PIRQ#D C2 W21 SD_A2 21
PIRQD# SDA2 Close L24,C24,D8,G24,M24 and AD18 of ICH5.
17,20 PIRQ#E D7
PIRQE#/GPI2
17,22 PIRQ#F A6 V22 SD_CS#1 21
PIRQF#/GPI3 SDCS1#
17 PIRQ#G E2 V20 SD_CS#3 21
B PIRQG#/GPI4 SDCS3# B
17 PIRQ#H B1
PIRQH#/GPI5
Y23 SD_IOR# 21
PREQ#0 SDIOR#
17,18,20,22 PREQ#[0..5] D5 Y22 SD_IOW# 21
PREQ#1 REQ0# SDIOW#
C1 Y21 SD_IORDY 21
PREQ#2 REQ1# SIORDY
C5
PREQ#3 REQ2#
B6 Y20 SD_DREQ 21
PREQ#4 REQ3# SDDREQ
C6 W20 SD_DACK# 21
REQ4#/GPI40 SDDACK#
PGNT#0 D4 Y24
17,18,20,22 PGNT#[0..5] GNT0# IRQ15 IRQ15 21
PGNT#1 A3
PGNT#2 GNT1#
B7
PGNT#3 GNT2# AC_SDIN0
C7 E12
PGNT#4 GNT3# AC_SDIN0 AC_SDIN1
A4 D12
GNT4#/GPO48 AC_SDIN1 AC_SDIN2
A13 AC_SDIN2 19 Only for ICH5 A0 Chip.
PREQ#A AC_SDIN2
A5
PREQ#5 REQA#/GPI0
E7
REQB#REQ5#/GPI1 AC_SDOUT 3VDUAL VCC1_5SB
A9 AC_SDOUT 19
PGNT#A AC_SDOUT U9
E8
PGNT#5 GNTA#/GPO16 AC_SYNC
B4 B8 AC_SYNC 19 1 2
GNTB#/GNT5#/GPO17 AC_SYNC VIN VOUT
3
AC_BITCLK VOUT
D8 AC_BITCLK 19 6
AC_BIT_CLK VOUT R200
6 ICH_PCLK N1 7
PCICLK R201 0 VOUT 100RST
C12 AC_RST# 19
AC_RST#
V4 5
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
12,25,29 PCIRST_ICH5# PCIRST# GND NC
8 4
NC ADJ
AC10
AC13
AC23

AD17
AD21
AD12
AA11
AA13
AA21
AA24

AB11
AB15
AB18
AA5
AA7
AA9

AB5
AB7
AB9

AC2
AC4
AC6
AC8

AD4
AD6
AD8

C16
C18
C20
C22

D11
D16
D18
D20
D22
D24
A10
A15
A17
A19
A21
A23

B13
B17
B19
B21
B23

E17
E19
E20
E21
E23

Intel ICH5-N LM317L-SO8


A1
A7

C3
C8

D1
D6

F3
F9

{Priority} R202
20RST

A
VCC1_5SB A

Micro Star Restricted Secret


AC_BITCLK C223 X_10P Title Rev
Intel ICH5 - PCI & IDE &AC97 0A
AC_SDIN2 R203 X_10K internal pull down 20K Document Number MS-6728
AC_SDIN1 R204 X_10K MICRO-STAR INT'L Last Revision Date:
AC_SDIN0 R205 X_10K internal pull down 20K CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
internal pull down 20K Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 15 of 33
5 4 3 2 1
5 4 3 2 1

VCCP
SIO_PME# GPIO19
25 SIO_PME#
EXTSMI# STRAPS FERR# R206 62
30 EXTSMI# VID_CTRL# 27
CSA_PME# TRMTRIP# R207 62
13 CSA_PME#
GPI7 HI:NO REBOOT
GPI6 GPIO24 SPKR R208 X_1K
VCC3 3VDUAL
LAN_DISABLE#
VCC_AGP LAN_DISABLE# 13
GPIO27
GPIO28 ICH5_EE_DO R209 X_10K SMBCLK R210 2.7K
C224 104P VCC_AGP C226 BIOS_WP# SMBDATA R211 2.7K
BIOS_WP# 25
C225 103P 104P GPIO33 SATA LED for HI:enable ASF
GPIO33 30
X_103P GPIO34 ver:A1 chip LINK_ALERT# R212 10K
VBAT 3VDUAL
RN51 10K
VCC5_SB C227 VCCP internal pull up 20K SIO_SMI# 1 2
D 104P BATLOW# GPI41 R213 X_8.2K BATLOW# 3 4 D
VCC3
C228 104P C229 C230 RING# 5 6
SUSCLK 25
THRM# default is output EXTSMI# 7 8
THRM# 25
C231 104P 5VREF 104P GPIO24 R214 X_1K
TRMTRIP# 4
GPIO27 R215 X_1K CSA_PME# R216 10K

AD11
Close A8 of ICH5. GPIO19 R217 X_1K

W14

AA6
AB6

AB1

AB2
AC1

G23
C24

R15
R19

U21

U22

U20
E16

A11
T19

T20

F22

F21

T21
W4
W5

W3

W2
GPIO33 R218 X_1K PWRBTN# R219 X_1K internal pull up 20K

A8

Y2

V3

Y1
R5
U3

R1

T1

T2
U8B GPIO34 R220 X_1K
AC7 LAN_DISABLE# R221 X_1K default is high

VCCRTC

NC

CLKRUN#/GPIO24

THRM#
V_CPU_IO
V_CPU_IO
V_CPU_IO

GPIO25
GPIO27
GPIO28
GPIO32
GPIO33
GPIO34

THRMTRIP#
GPI12
GPI13

CPUPERF#/GPO22
VCCUSBPLL

STP_PCI#/GPO18

STP_CPU#/GPO20
C3_STAT#/GPO21

SUSCLK
V5REF
V5REF

SLP_S1#/GPO19

SSMUXSEL/GPO23
VCCSATAPLL
VCCSATAPLL

BATLOW#
SUS_STAT#
GPI7
GPI8
AGPBUSY#/GPI6
V5REF_SUS
SATA0RXP SATA_RX0 21
C10 AD7 SATA_RX#0 21
LAN_RXD0 SATA0RXN THRM# R222 4.7K SMLINK1 R223 10K
C9 AC9 SATA_RX1 21 VCC3
LAN_RXD1 SATA1RXP VRMGD R224 4.7K SMLINK0 R225 10K
C11 AD9 SATA_RX#1 21
LAN_RXD2 SATA1RXN
D9 AA8 ICH_PWROK R226 10K SIO_PME# 1 2
LAN_TXD0 SATA0TXP SATA_TX0 21
E9 AB8 ICH_RST# 3 4
LAN_TXD1 SATA0TXN SATA_TX#0 21
B12 AA10 Prevent excessive IccRTC leakage GPI7 5 6
LAN_TXD2 SATA1TXP SATA_TX1 21
AB10 GPI6 7 8
SATA1TXN SATA_TX#1 21
AA1
LAN_RST# RN52 10K
E10
LAN_CLK SATA_BIAS R227 24.9RST
D10 Y11
LAN_RSTSYNC SATARBIASP GPIO28 R228 X_10K
Y9 3VDUAL
SATARBIASN R229 1K
B11
ICH5_EE_DO EE_DIN Reservered GPI
B9 AC5 SATA_100 6
EE_DOUT CLK100P
B10 AD5 SATA_100# 6
EE_CS CLK100N
A12
EE_SHCLK
T5 LPC_AD0 RESUME RESET
LAD0 LPC_AD[0..3] 25
C23 R4 LPC_AD1
24 USB0+ USBP0P LAD1
D23 R3 LPC_AD2
24 USB0- USBP0N LAD2 VCC5_SB
U4 LPC_AD3
LAD3
24 USB1+ A22
C USBP1P R230 C
24 USB1- B22 T4 LPC_FRAME# 25
USBP1N LFRAME# 4.7K
U5 LPC_DRQ#0 25
LDRQ0# GPI41
24 USB2+ C21 R2
USBP2P LRDQ1#/GPI41
24 USB2- D21 F23 SERIRQ 25
USBP2N SERIRQ RSMRST#
24 USB3+ A20
USBP3P
24 USB3- B20 AD2 SMBCLK 6,10,11,13,17,25
USBP3N SMBCLK R235
AD1 SMBDATA 6,10,11,13,17,25
SMBDATA 10K
23 USB4+ C19
USBP4P SMLINK1
23 USB4- D19 AA2
USBP4N SMLINK1 SMLINK0
AD3
SMLINK0
23 USB5+ A18
USBP5P
23 USB5- B18
USBP5N
V23 A20M# 4
A20M#
23 USB6+ C17 U24 FERR# 4
USBP6P FERR#
23 USB6- D17 R21 IGNNE# 4
USBP6N IGNNE#
R23 HINIT# 4,25
INIT# V5REF must be powered up before
A16 U23
23 USB7+
B16
USBP7P INTR
R22
INTR 4 V5REF Sequencing Circuit VCC3,or after within 0.7V
23 USB7- USBP7N NMI NMI 4
V24 SMI# 4
SMI# D3
24 USB_OC#1 C15
OC0# 1N5817 5VREF R237 1K
D15 P22 SLP# 4 VCC3 VCC5
OC1# CPU_SLP# C233 1U/0805
24 USB_OC#3 D14 T24 STPCLK# 4
OC2# STPCLK#
C14 P23 KBRST# 25
OC3# RCIN#
T22 A20GATE 25
A20GATE
23 USB_OC#5 B14
OC4#/GPI9
A14 R24
OC5#/GPI10 DPSLP#
23 USB_OC#7 D13 P20
OC6#/GPI14 DPRSLPVR
C13
OC7#/GPI15
PWRBTN#
Y4 PWRBTN# 25 * Put a GND Plane under X'TAL RTC BLOCK
R238 22.6RST USB_BIAS A24 * Please put this block close ICH5
B USBRBIAS B
B24 AC12 ICH_PWROK 7
USBRBIAS# PWROK CLR_CMOS
P24 CPU_GD 4
CPUPWRGD/GPO49 VRMGD 1-2 Normal *
6 USB_48 F24 R20
CLK48 VGATE/VRMPWRGD R239 0 VRM_GD 3VDUAL D4 1N4148S 2-3 Clear CMOS
VRM_GD 28,30
U1 ICH_RST#
SYS_RESET# ICH_RST# 30 VBAT
HL0 H20 AA12 RTCRST#
9 HL[0..10] HI0 RTCRST#
HL1 H21 AB13 RSMRST# The RC delay time should
HI1 RSMRST# RSMRST# 13,29
HL2 J20
HL3 HI2 be in 10~20ms.
H23 W1 SLP_S3# 25,29
HL4 HI3 SLP_S3# R240 1K
M23 U2 SLP_S4# 29
HL5 HI4 SLP_S4# R241 22K J_RTCRST#
M21 AA3 SLP_S5# 25,29 SIO_VBAT
HL6 HI5 SLP_S5# RTCRST# 1 JBAT1
N21

1
HL7 HI6 INTERVEN R242 390K 2 D1x3-BK
M20 AD10 VBAT
HL8 HI7 INTERVEN C234 C235 3
L22
HL9 HI8 INTRUDER# R243 1M
J22 Y12 VBAT
HL10 HI9 INTRUDER# LINK_ALERT# D5 1U/0805 105P R244
K21 V5
HL11 HI10 LINKALERT# SIO_SMI# BAT54A-S-SOT23
G22 AC3 SIO_SMI# 25
R245 61.9RST HI11 SMBALERT#/GPI11 4.7K

3
9 HL_STRF K23 F20 ICH_14 6
HI_STBF CLK14
J24 Enable the integrated
9 HL_STRS HI_STBS
AC11 RTCX1 VCCSUS1_5 voltage R246 ICH5 provide internal VBIAS circuit
H_COMP RTCX1
N24 regulator
HIRCOMP 1K
HL_SWING C236
9 HL_SWING L20
HI_VSWING RTCX2 RTCX2
AB12
HL_VREF RTCX2
9 HL_VREF L24
HIREF

1
AB3 RING# BAT1 Y2 18p
RI# RING#
N22 E24 SPKR R247 32K-12.5pf-CSA-309-D
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

6 ICH_66 CLK66 SPKR SPKR 30


10M {PPM}
{CL} C237

2
A A
W16
W18
M11
M12
M13
M14
M22
M24
G20
G24

H19
H22

N11
N12
N13
N14
N20

R11
R14

U19
K11
K14
K20
K22
K24

P10
P11
P12
P13
P14
P15
P21

V21

Y10

Intel ICH5-N RTCX1


T23
L10
L11
L12
L13
L14
L15
L21
L23
J21
J23

M1
M5
G6

K3

P1

V1

Y3
Y6
Y7
Y8
H1

T3
T6
J6

{Priority}
18p

Micro Star Restricted Secret


Title Rev
H_COMP R248
Impedance is equal 60ohm.
52.3RST
VCC_AGP Intel ICH5 - Other signals 0A
HL_SWING C238 0.01u_X7R Document Number MS-6728
HL_VREF C239 0.01u_X7R MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 16 of 33
5 4 3 2 1
5 4 3 2 1

PCI SLOT 1 (PCI VER: 2.2 COMPLY) PCI SLOT 2 (PCI VER: 2.2 COMPLY) PCI SLOT 3 (PCI VER: 2.2 COMPLY)

-12V +12V -12V +12V -12V +12V


PCI1 PCI2 PCI3
B1 A1 TRST# B1 A1 TRST# B1 A1 TRST#
TCK -12V TRST# TCK -12V TRST# TCK -12V TRST#
B2 A2 B2 A2 B2 A2
TCK +12V TMS TCK +12V TMS TCK +12V TMS
D B3 A3 B3 A3 B3 A3 D
GND TMS TDI GND TMS TDI GND TMS TDI
B4 A4 B4 A4 B4 A4
TDO TDI TDO TDI TDO TDI
B5 A5 B5 A5 B5 A5
VCC5 +5V +5V PIRQ#A VCC5 +5V +5V PIRQ#B VCC5 +5V +5V PIRQ#C
B6 A6 B6 A6 B6 A6
PIRQ#B +5V INTA# PIRQ#C PIRQ#C +5V INTA# PIRQ#D PIRQ#D +5V INTA# PIRQ#A
B7 A7 B7 A7 B7 A7
PIRQ#D INTB# INTC# PIRQ#A INTB# INTC# PIRQ#B INTB# INTC#
B8 A8 VCC5 B8 A8 VCC5 B8 A8 VCC5
INTD# +5V INTD# +5V INTD# +5V
B9 A9 B9 A9 B9 A9
PRSNT#1 RESERVED VCC3 PRSNT#1 RESERVED VCC3 PRSNT#1 RESERVED VCC3
B10 A10 B10 A10 B10 A10
RESERVED +5V(I/O) RESERVED +5V(I/O) RESERVED +5V(I/O)
B11 A11 B11 A11 B11 A11
PRSNT#2 RESERVED 3VDUAL PRSNT#2 RESERVED 3VDUAL PRSNT#2 RESERVED 3VDUAL
B12 A12 B12 A12 B12 A12
GND GND GND GND GND GND
B13 A13 B13 A13 B13 A13
VCC3 GND GND VCC3 GND GND VCC3 GND GND
B14 A14 B14 A14 B14 A14
RESERVED RESERVED PCIRST#2 RESERVED RESERVED PCIRST#2 RESERVED RESERVED PCIRST#2
B15 A15 PCIRST#2 18,29 B15 A15 B15 A15
GND RST# GND RST# GND RST#
6 PCI_CLK0 B16 A16 6 PCI_CLK1 B16 A16 6 PCI_CLK2 B16 A16
CLK +5V(I/O) CLK +5V(I/O) CLK +5V(I/O)
B17 A17 PGNT#1 15 B17 A17 PGNT#2 15 B17 A17 PGNT#3 15
PREQ#1 GND GNT# PREQ#2 GND GNT# PREQ#3 GND GNT#
B18 A18 B18 A18 B18 A18
REQ# GND REQ# GND PME# REQ# GND PME#
B19 A19 PME# 12,15,18,22 B19 A19 B19 A19
+5V(I/O) RESERVED AD31 +5V(I/O) RESERVED AD30 AD31 +5V(I/O) RESERVED AD30
15,18,20,22 AD31 B20 A20 AD30 15,18,20,22 B20 A20 B20 A20
AD31 AD30 AD29 AD31 AD30 AD29 AD31 AD30
15,18,20,22 AD29 B21 A21 B21 A21 B21 A21
AD29 +3.3V AD29 +3.3V AD28 AD29 +3.3V AD28
B22 A22 AD28 15,18,20,22 B22 A22 B22 A22
GND AD28 AD27 GND AD28 AD26 AD27 GND AD28 AD26
15,18,20,22 AD27 B23 A23 AD26 15,18,20,22 B23 A23 B23 A23
AD27 AD26 AD25 AD27 AD26 AD25 AD27 AD26
15,18,20,22 AD25 B24 A24 B24 A24 B24 A24
AD25 GND AD25 GND AD24 AD25 GND AD24
B25 A25 B25 A25 B25 A25
+3.3V AD24 ID1 AD24 15,18,20,22 C_BE#3 +3.3V AD24 ID2 R249 330 AD17 C_BE#3 +3.3V AD24 ID3 R250 330 AD18
15,18,20,22 C_BE#3 B26 A26 B26 A26 B26 A26
C/BE#3 IDSEL R251 330 AD16 AD23 C/BE#3 IDSEL AD23 C/BE#3 IDSEL
15,18,20,22 AD23 B27 A27 B27 A27 B27 A27
AD23 +3.3 AD23 +3.3 AD22 AD23 +3.3 AD22
B28 A28 AD22 15,18,20,22 B28 A28 B28 A28
GND AD22 AD21 GND AD22 AD20 AD21 GND AD22 AD20
15,18,20,22 AD21 B29 A29 AD20 15,18,20,22 B29 A29 B29 A29
AD21 AD20 AD19 AD21 AD20 AD19 AD21 AD20
15,18,20,22 AD19 B30 A30 B30 A30 B30 A30
AD19 GND AD19 GND AD18 AD19 GND AD18
B31 A31 AD18 15,18,20,22 B31 A31 B31 A31
+3.3V AD18 AD17 +3.3V AD18 AD16 AD17 +3.3V AD18 AD16
15,18,20,22 AD17 B32 A32 AD16 15,18,20,22 B32 A32 B32 A32
AD17 AD16 C_BE#2 AD17 AD16 C_BE#2 AD17 AD16
15,18,20,22 C_BE#2 B33 A33 B33 A33 B33 A33
C C/BE#2 +3.3V C/BE#2 +3.3V FRAME# C/BE#2 +3.3V FRAME# C
B34 A34 FRAME# 15,18,20,22 B34 A34 B34 A34
GND FRAME# IRDY# GND FRAME# IRDY# GND FRAME#
15,18,20,22 IRDY# B35 A35 B35 A35 B35 A35
IRDY# GND IRDY# GND TRDY# IRDY# GND TRDY#
B36 A36 TRDY# 15,18,20,22 B36 A36 B36 A36
+3.3V TRDY# DEVSEL# +3.3V TRDY# DEVSEL# +3.3V TRDY#
15,18,20,22 DEVSEL# B37 A37 B37 A37 B37 A37
DEVSEL# GND DEVSEL# GND STOP# DEVSEL# GND STOP#
B38 A38 STOP# 15,18,20,22 B38 A38 B38 A38
GND STOP# LOCK# GND STOP# LOCK# GND STOP#
B39 A39 B39 A39 B39 A39
15,18 LOCK# LOCK# +3.3V SDONE PERR# LOCK# +3.3V SDONE LOCK# +3.3V
B40 A40 B40 A40 PERR# B40 A40 SDONE
15,18,20,22 PERR# PERR# SDONE SDONE 18 PERR# SDONE PERR# SDONE
B41 A41 SBO# B41 A41 SBO# B41 A41 SBO#
+3.3V SBO# SBO 18 +3.3V SBO# +3.3V SBO#
B42 A42 SERR# B42 A42 SERR# B42 A42
15,18,20 SERR# SERR# GND SERR# GND SERR# GND
B43 A43 B43 A43 PAR B43 A43 PAR
+3.3V PAR PAR 15,18,20,22 +3.3V PAR +3.3V PAR
B44 A44 C_BE#1 B44 A44 AD15 C_BE#1 B44 A44 AD15
15,18,20,22 C_BE#1 C/BE#1 AD15 AD15 15,18,20,22 C/BE#1 AD15 C/BE#1 AD15
B45 A45 AD14 B45 A45 AD14 B45 A45
15,18,20,22 AD14 AD14 +3.3V AD14 +3.3V AD14 +3.3V
B46 A46 B46 A46 AD13 B46 A46 AD13
GND AD13 AD13 15,18,20,22 GND AD13 GND AD13
B47 A47 AD12 B47 A47 AD11 AD12 B47 A47 AD11
15,18,20,22 AD12 AD12 AD11 AD11 15,18,20,22 AD12 AD11 AD12 AD11
B48 A48 AD10 B48 A48 AD10 B48 A48
15,18,20,22 AD10 AD10 GND AD10 GND AD10 GND
B49 A49 B49 A49 AD9 B49 A49 AD9
GND AD9 AD9 15,18,20,22 GND AD9 GND AD9

B52 A52 AD8 B52 A52 C_BE#0 AD8 B52 A52 C_BE#0
15,18,20,22 AD8 AD8 C/BE#0 C_BE#0 15,18,20,22 AD8 C/BE#0 AD8 C/BE#0
B53 A53 AD7 B53 A53 AD7 B53 A53
15,18,20,22 AD7 AD7 +3.3V AD7 +3.3V AD7 +3.3V
B54 A54 B54 A54 AD6 B54 A54 AD6
+3.3V AD6 AD6 15,18,20,22 +3.3V AD6 +3.3V AD6
B55 A55 AD5 B55 A55 AD4 AD5 B55 A55 AD4
15,18,20,22 AD5 AD5 AD4 AD4 15,18,20,22 AD5 AD4 AD5 AD4
B56 A56 AD3 B56 A56 AD3 B56 A56
15,18,20,22 AD3 AD3 GND AD3 GND AD3 GND
B57 A57 B57 A57 AD2 B57 A57 AD2
GND AD2 AD2 15,18,20,22 GND AD2 GND AD2
B58 A58 AD1 B58 A58 AD0 AD1 B58 A58 AD0
15,18,20,22 AD1 AD1 AD0 AD0 15,18,20,22 AD1 AD0 AD1 AD0
B59 A59 B59 A59 B59 A59
ACK#64 +5V(I/O) +5V(I/O) REQ#64 ACK#64 +5V(I/O) +5V(I/O) REQ#64 ACK#64 +5V(I/O) +5V(I/O) REQ#64
18 ACK#64 B60 A60 REQ#64 18 B60 A60 B60 A60
ACK64# REQ64# ACK64# REQ64# ACK64# REQ64#
B61 A61 B61 A61 B61 A61
+5V +5V +5V +5V +5V +5V
B62 A62 B62 A62 B62 A62
+5V +5V +5V +5V +5V +5V
YSLOT120 YSLOT120 YSLOT120
B B

IDSEL = AD16 IDSEL = AD17 IDSEL = AD18


MASTER = PREQ#1 MASTER = PREQ#2 MASTER = PREQ#3
PIRQ#A PIRQ#B PIRQ#C

PCI SLOT DECOUPLING CAPACITORS


PCI PULL-UP / DOWN RESISTORS
VCC5 VCC3 3VDUAL

DEVSEL# 2 1 PREQ#0 2 1 PIRQ#A 8 7 C240 C241 C242


VCC5 15,18 PREQ#0 VCC5 12,15,18 PIRQ#A VCC3
TRDY# 4 3 PREQ#1 4 3 PIRQ#D 6 5 104P X_104P X_104P
15 PREQ#1 15,18 PIRQ#D
IRDY# 6 5 RN53 PREQ#2 6 5 RN54 PIRQ#B 4 3 RN55 C243 C244 C245
15 PREQ#2 12,15,18 PIRQ#B
FRAME# 8 7 2.7K PREQ#3 8 7 2.7K PIRQ#C 2 1 8.2K X_104P X_104P X_104P
15 PREQ#3 15,18 PIRQ#C
SERR# 2 1 PIRQ#G 8 7 C246 C247
15 PIRQ#G
PERR# 4 3 PREQ#4 R252 2.7K PIRQ#H 6 5 X_104P X_104P
15,18,20 PREQ#4 15 PIRQ#H
LOCK# 6 5 RN56 PIRQ#F 4 3 RN57
15,22 PIRQ#F
STOP# 8 7 2.7K PREQ#5 R253 2.7K PIRQ#E 2 1 8.2K
15,18,22 PREQ#5 15,20 PIRQ#E

A A

REQ#64 R254 4.7K


VCC5
ACK#64 R255 4.7K Micro Star Restricted Secret
SDONE R256 X_0
SMBCLK 6,10,11,13,16,25
18 TMS
TMS R257 X_4.7K SBO# R258 X_0
SMBDATA 6,10,11,13,16,25 Title Rev
18 TDI
TDI R259 X_4.7K PCI Slot 1 & 2 & 3 0A
Document Number MS-6728
TCK R260 X_4.7K
18 TCK
18 TRST#
TRST# R261 X_4.7K MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 17 of 33
5 4 3 2 1
5 4 3 2 1

-12V +12V -12V +12V -12V +12V


PCI4 PCI5 PCI6
B1 A1 TRST# B1 A1 TRST# B1 A1 TRST#
-12V TRST# TRST# 17 -12V TRST# -12V TRST#
D TCK B2 A2 TCK B2 A2 TCK B2 A2 D
17 TCK TCK +12V TCK +12V TCK +12V
B3 A3 TMS B3 A3 TMS B3 A3 TMS
GND TMS TMS 17 GND TMS GND TMS
B4 A4 TDI B4 A4 TDI B4 A4 TDI
TDO TDI TDI 17 TDO TDI TDO TDI
B5 A5 B5 A5 B5 A5
VCC5 +5V +5V PIRQ#D VCC5 +5V +5V PIRQ#B VCC5 +5V +5V
B6 A6 B6 A6 B6 A6 PIRQ#A
+5V INTA# PIRQ#D 15,17 +5V INTA# +5V INTA#
PIRQ#A B7 A7 PIRQ#B PIRQ#C B7 A7 PIRQ#D PIRQ#B B7 A7 PIRQ#C
12,15,17 PIRQ#A INTB# INTC# PIRQ#B 12,15,17 INTB# INTC# INTB# INTC#
PIRQ#C B8 A8 PIRQ#A B8 A8 PIRQ#D B8 A8
15,17 PIRQ#C INTD# +5V VCC5 INTD# +5V VCC5 INTD# +5V VCC5
B9 A9 B9 A9 B9 A9
PRSNT#1 RESERVED VCC3 PRSNT#1 RESERVED VCC3 PRSNT#1 RESERVED VCC3
B10 A10 B10 A10 B10 A10
RESERVED +5V(I/O) RESERVED +5V(I/O) RESERVED +5V(I/O)
B11 A11 B11 A11 B11 A11
PRSNT#2 RESERVED 3VDUAL PRSNT#2 RESERVED 3VDUAL PRSNT#2 RESERVED 3VDUAL
B12 A12 B12 A12 B12 A12
GND GND GND GND GND GND
B13 A13 B13 A13 B13 A13
VCC3 GND GND VCC3 GND GND VCC3 GND GND
B14 A14 B14 A14 B14 A14
RESERVED RESERVED PCIRST#2 RESERVED RESERVED PCIRST#2 RESERVED RESERVED PCIRST#2
B15 A15 PCIRST#2 17,29 B15 A15 B15 A15
GND RST# GND RST# GND RST#
6 PCI_CLK3 B16 A16 6 PCI_CLK4 B16 A16 6 PCI_CLK5 B16 A16
CLK +5V(I/O) P4GNT# CLK +5V(I/O) P5GNT# CLK +5V(I/O) PCI6GNT#
B17 A17 B17 A17 B17 A17
P4REQ# GND GNT# P5REQ# GND GNT# PCI6REQ# GND GNT#
B18 A18 B18 A18 B18 A18
REQ# GND REQ# GND PME# REQ# GND PME#
B19 A19 PME# 12,15,17,22 B19 A19 B19 A19
+5V(I/O) RESERVED AD31 +5V(I/O) RESERVED AD30 AD31 +5V(I/O) RESERVED AD30
15,17,20,22 AD31 B20 A20 AD30 15,17,20,22 B20 A20 B20 A20
AD31 AD30 AD29 AD31 AD30 AD29 AD31 AD30
15,17,20,22 AD29 B21 A21 B21 A21 B21 A21
AD29 +3.3V AD29 +3.3V AD28 AD29 +3.3V AD28
B22 A22 AD28 15,17,20,22 B22 A22 B22 A22
GND AD28 AD27 GND AD28 AD26 AD27 GND AD28 AD26
15,17,20,22 AD27 B23 A23 AD26 15,17,20,22 B23 A23 B23 A23
AD27 AD26 AD25 AD27 AD26 AD25 AD27 AD26
15,17,20,22 AD25 B24 A24 B24 A24 B24 A24
AD25 GND AD25 GND AD24 AD25 GND AD24
B25 A25 AD24 15,17,20,22 B25 A25 B25 A25
+3.3V AD24 ID1 C_BE#3 +3.3V AD24 ID2 R262 330 AD21 C_BE#3 +3.3V AD24 ID3 R263 330 AD20
15,17,20,22 C_BE#3 B26 A26 B26 A26 B26 A26
C/BE#3 IDSEL R264 330 AD19 AD23 C/BE#3 IDSEL AD23 C/BE#3 IDSEL
15,17,20,22 AD23 B27 A27 B27 A27 B27 A27
AD23 +3.3 AD23 +3.3 AD22 AD23 +3.3 AD22
B28 A28 AD22 15,17,20,22 B28 A28 B28 A28
GND AD22 AD21 GND AD22 AD20 AD21 GND AD22 AD20
15,17,20,22 AD21 B29 A29 AD20 15,17,20,22 B29 A29 B29 A29
AD21 AD20 AD19 AD21 AD20 AD19 AD21 AD20
15,17,20,22 AD19 B30 A30 B30 A30 B30 A30
AD19 GND AD19 GND AD18 AD19 GND AD18
B31 A31 AD18 15,17,20,22 B31 A31 B31 A31
+3.3V AD18 AD17 +3.3V AD18 AD16 AD17 +3.3V AD18 AD16
15,17,20,22 AD17 B32 A32 AD16 15,17,20,22 B32 A32 B32 A32
C AD17 AD16 C_BE#2 AD17 AD16 C_BE#2 AD17 AD16 C
15,17,20,22 C_BE#2 B33 A33 B33 A33 B33 A33
C/BE#2 +3.3V C/BE#2 +3.3V FRAME# C/BE#2 +3.3V FRAME#
B34 A34 FRAME# 15,17,20,22 B34 A34 B34 A34
GND FRAME# IRDY# GND FRAME# IRDY# GND FRAME#
15,17,20,22 IRDY# B35 A35 B35 A35 B35 A35
IRDY# GND IRDY# GND TRDY# IRDY# GND TRDY#
B36 A36 TRDY# 15,17,20,22 B36 A36 B36 A36
+3.3V TRDY# DEVSEL# +3.3V TRDY# DEVSEL# +3.3V TRDY#
15,17,20,22 DEVSEL# B37 A37 B37 A37 B37 A37
DEVSEL# GND DEVSEL# GND STOP# DEVSEL# GND STOP#
B38 A38 STOP# 15,17,20,22 B38 A38 B38 A38
GND STOP# LOCK# GND STOP# LOCK# GND STOP#
B39 A39 B39 A39 B39 A39
15,17 LOCK# LOCK# +3.3V SDONE PERR# LOCK# +3.3V SDONE PERR# LOCK# +3.3V SDONE
15,17,20,22 PERR# B40 A40 SDONE 17 B40 A40 B40 A40
PERR# SDONE SBO# PERR# SDONE SBO# PERR# SDONE SBO#
B41 A41 SBO 17 B41 A41 B41 A41
+3.3V SBO# SERR# +3.3V SBO# SERR# +3.3V SBO#
15,17,20 SERR# B42 A42 B42 A42 B42 A42
SERR# GND SERR# GND PAR SERR# GND PAR
B43 A43 PAR 15,17,20,22 B43 A43 B43 A43
+3.3V PAR C_BE#1 +3.3V PAR AD15 C_BE#1 +3.3V PAR AD15
15,17,20,22 C_BE#1 B44 A44 AD15 15,17,20,22 B44 A44 B44 A44
C/BE#1 AD15 AD14 C/BE#1 AD15 AD14 C/BE#1 AD15
15,17,20,22 AD14 B45 A45 B45 A45 B45 A45
AD14 +3.3V AD14 +3.3V AD13 AD14 +3.3V AD13
B46 A46 AD13 15,17,20,22 B46 A46 B46 A46
GND AD13 AD12 GND AD13 AD11 AD12 GND AD13 AD11
15,17,20,22 AD12 B47 A47 AD11 15,17,20,22 B47 A47 B47 A47
AD12 AD11 AD10 AD12 AD11 AD10 AD12 AD11
15,17,20,22 AD10 B48 A48 B48 A48 B48 A48
AD10 GND AD10 GND AD9 AD10 GND AD9
B49 A49 AD9 15,17,20,22 B49 A49 B49 A49
GND AD9 GND AD9 GND AD9

B52 A52 AD8 B52 A52 C_BE#0 AD8 B52 A52 C_BE#0
15,17,20,22 AD8 AD8 C/BE#0 C_BE#0 15,17,20,22 AD8 C/BE#0 AD8 C/BE#0
B53 A53 AD7 B53 A53 AD7 B53 A53
15,17,20,22 AD7 AD7 +3.3V AD7 +3.3V AD7 +3.3V
B54 A54 B54 A54 AD6 B54 A54 AD6
+3.3V AD6 AD6 15,17,20,22 +3.3V AD6 +3.3V AD6
B55 A55 AD5 B55 A55 AD4 AD5 B55 A55 AD4
15,17,20,22 AD5 AD5 AD4 AD4 15,17,20,22 AD5 AD4 AD5 AD4
B56 A56 AD3 B56 A56 AD3 B56 A56
15,17,20,22 AD3 AD3 GND AD3 GND AD3 GND
B57 A57 B57 A57 AD2 B57 A57 AD2
GND AD2 AD2 15,17,20,22 GND AD2 GND AD2
B58 A58 AD1 B58 A58 AD0 AD1 B58 A58 AD0
15,17,20,22 AD1 AD1 AD0 AD0 15,17,20,22 AD1 AD0 AD1 AD0
B59 A59 B59 A59 B59 A59
ACK#64 +5V(I/O) +5V(I/O) REQ#64 ACK#64 +5V(I/O) +5V(I/O) REQ#64 ACK#64 +5V(I/O) +5V(I/O) REQ#64
17 ACK#64 B60 A60 REQ#64 17 B60 A60 B60 A60
ACK64# REQ64# ACK64# REQ64# ACK64# REQ64#
B61 A61 B61 A61 B61 A61
+5V +5V +5V +5V +5V +5V
B62 A62 B62 A62 B62 A62
+5V +5V +5V +5V +5V +5V
B B
YSLOT120 YSLOT120 YSLOT120

IDSEL = AD19 IDSEL = AD21 IDSEL = AD20


MASTER = PREQ#4 MASTER = PREQ#5 MASTER = PCI6PREQ / PREQ0#
PIRQ#D PIRQ#B PIRQ#A

VCC3
PCI4GNT# R503 X_0 P4GNT#

R504 0
15 PGNT#4
PGNT#0 R265 0 PCI6GNT# C248
VCC3
PREQ#0 R266 0 PCI6REQ# X_104P PCI5REQ# R505 X_0 P4REQ#

U10 R506 0
15,17,20 PREQ#4
FRAME# 1 28
STOP# FRAME# AVCC MS1_PCLK
2 27 MS1_PCLK 6
PREQ#0 STOP# PCICLKI
15,17 PREQ#0 3 26 PCIRST#1 7,13,29
PGNT#0 SYSREQ# RESET# PCI5GNT# R507 X_0 P5GNT#
15 PGNT#0 4 25
PCI6REQ# SYSGNT# AVSS
5 24
PCIREQ1# VSS R508 0
6 23 1 2 15 PGNT#5
PCI6GNT# VSS PCLCLK0 VCC5
7 22 3 4
PCI4REQ# PCIGNT1# PCICLK1
A 8 21 5 6 A
PCIREQ2# VCC PCI5REQ# PCI5REQ# R509 X_0 P5REQ#
9 20 7 8 2 1
PCI4GNT# VCC PCICLK2 PCI4REQ#
10 19 4 3
PCI5REQ# PCIGNT2# PCICLK3 RN59 PCI6REQ# R510 0
11 18 6 5 15,17,22 PREQ#5
PCI5GNT# PCIREQ3# PCICLK4 X_8P4R-10K
12 17 8 7
PCIGNT3# VSS R267 X_10K
13 16 Micro Star Restricted Secret
VC3A VC3B RN58
14 15
VC5A VC5B X_2.7K Title Rev
X_B07-0001902-E18 PCI Slot 4 & 5 & 6 / MS-1 0A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 18 of 33
5 4 3 2 1
5 4 3 2 1

AUDIO CODEC
L7

LINE_NEXT_R 1 2 6
EC11 47U/16V/S R529 75 LINE_OUT_R L8 JS0

+
7
301S/0603 8 LINE_OUT
R518 1K LINE_NEXT_L 1 2 9
R531 1K EC12 47U/16V/S R530 75 LINE_OUT_L 17

+
C252 C253
R512 4.7K SPDIFO 301S/0603 102P AUDIO1A
102P PHONE_JACK
VCC3 CODEC VCC3_3 NEED CAP AS R532 R533
VCC3 R538 47K
CLOSE AS POSSIBLE. 20K 20K L44

D C256 default used LINE_IN_R 1 2 10 D


C255
X_104P R268 C445 1u +5VR L45 JS2 11
X_104P external 14.318 0/0805 301S/0603 12 LINE_IN
LINE_IN_L 1 2 13
C257 18
For EMI C258 C259
301S/0603 AUDIO1B
C260 C261 104P C249 225P R534 22 LINE_IN_R 102P 102P PHONE_JACK
X_22P X_22P U11
SROUT_R

48
47
46
45
44
43
42
41
40
39
38
37
Y3 C262
C250 225P R535 22 LINE_IN_L VREFOUT R277 2.2K
SROUT_L

LOUT_R
SPDIFO
EAPD

NC

MONO
ID1#
ID0#

LOUT_L
AVSS3

AVSS2
AVDD3

AVDD2
104P
X_24.576MHZ L9
C263
R270
X_47P R536 X_4.7K JS2 LFE-OUT 1 2 1
1 36 L10 JS3 2 14
X_10M
2
DVDD1 SR_OUTR
35
R536 for 1985, 301S/0603 4 MIC_IN 15
XTL_IN SR_OUTL C286 C251 475P R513 22 LFE-OUT MICIN
3 34 LFE-OUT 1 2 5 16
XTL_OUT AVDD4 104P
4 33 3
DVSS1 AVSS4/JS2 C265 C266
15 AC_SDOUT 5 32
R271 47 SDATA_OUT LEF_OUT C254 475P R511 22 MICIN AUDIO1C
6 31 301S/0603
15 AC_BITCLK
7
BIT_CLK CENTER_OUT
30
CEN-OUT 102P 102P PHONE_JACK
R272 47 DVSS2 AFILT2
15 AC_SDIN2 8 29
SDATA_IN AFILT1 VREFOUT
9 28
DVDD2 VREF_OUT
15 AC_SYNC 10 27
SYNC VREF
15 AC_RST# 11 26
RESET# AVSS1 R269
12 25
NC/JS3 AVDD1 C268 C270 C271
C284 0
104P
CP5

CD_GND
C267 105P 270P 270P

PHONE

AUXR
AUXL

MIC1
MIC2
104P
EMI

LINR
CDR

LINL
CDL
JS1
JS0
C C
X_COPPER
ADI 1980/1985 R269 for 1980,
13
14
15
16
17
18
19
20
21
22
23
24
CP6
R274
C275 R293 0 LINE_IN_R
6 AC_14
1U/0805 X_COPPER
0
R290 C276 R292 0 LINE_IN_L CP7
JS0 1U/0805

R275 R276 X_COPPER


X_4.7K
R281 20K 20K
R290,283 for 1985 2.2K AGND
R283
JS3
R278 0 C278 MICIN
1U/0805 +12V +12VR +5VR
X_4.7K U12
R280 YLT1087S-0.8A
R282 0 C281 MICIN2 3 2
1U/0805 VIN VOUT
3.3/1206

ADJ
R278,R282 are 0 ohm for 1980, C282 + + EC16 C283
104P 10U/16V/S 104P
C285 R514 4.7K EC15 R284
4 J3 X_10U/16V/S

1
1U/0805 100RST
3 YJ104-B
R515 2.4K 2
C287
1
1U/0805
B B
C288 R516 4.7K JCD
1U/0805 R285
300RST
R286 R287 R288

4.7K 2.4K 4.7K

AGND

+5VR VCC3

LINE_OUT_L R289 X_0 LINE_NEXT_L R489 470 R490 2.2K


+5VR
C289 C290 Remove R289 when install Front Audio JAUDIO
JSP1 JAUD1
X_102P 1 2 X_102P MICIN2 1 2
+5VR VCC3 C264 MIC AUD_GND
SPDIFO 3 4 Remove R291 when install Front Audio 3 4
SPDIFO NC 1U MIC_BIAS AUD_VCC +5VR
5 6 LINE_OUT_R 5 6 LINE_NEXT_R
AGND SPDIFI LINE_OUT_R R291 X_0 LINE_NEXT_R AUD_FPOUT_R AUD_RET_R
7
LEF-OUT SURR-R
8 7
HP_ON
CUT 8
9 10 LINE_OUT_L 9 10 LINE_NEXT_L
CEN-OUT SURR-L AUD_FPOUT_L AUD_RET_L
11 12
AGND AGND JAUD1
A A
SPDIF
C293

X_102P
LINE_OUT_R LINE_OUT_L Micro Star Restricted Secret
C297 C298 Title Rev

X_102P X_102P
ADI 1980/1985 / Port 0A
JAUD1(5-6) JAUD1(9-10) Document Number MS-6728
X_YJUMPER-MG X_YJUMPER-MG MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 19 of 33
5 4 3 2 1
5 4 3 2 1

Serial ATA Controller VCC3 PHD3 1


RN60
2 R_PHD3
L12 PHD12 3 4 R_PHD12
PHD2 5 6 R_PHD2
VCC3 PHD13 7 8 R_PHD13
L13 C299 C300 C301 F301S0805 EC17
+ C302 8P4R-33
104P 103P 102P RN61
F301S0805 C303 C304 C305 10U/16V/S 105P PHD7 1 2 R_PHD7
PHD8 3 4 R_PHD8
104P 103P 102P PHD6 5 6 R_PHD6
D PHD9 7 8 R_PHD9 D

L14 VCC3 8P4R-33


RN62
PHD5 1 2 R_PHD5
C306 C307 C308 F301S0805 PHD10 3 4 R_PHD10
VCC3 VCC1_8 PHD4 5 6 R_PHD4
102P 103P 104P PHD11 7 8 R_PHD11

8P4R-33
RN63
PHD1 1 2 R_PHD1

124

112
113
PHD14 3 4 R_PHD14

14
27
44

75
93

20
31
77
83
94

60
55

59
54
8
U13 PHD0 5 6 R_PHD0
74 PHD0 PHD15 7 8 R_PHD15

H_VAA2

H_VSS2
VAA1

VSS1

VAA2
VSS2
VDDHIO0
VDDHIO1

VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VDDPIO0
VDDPIO1
VDDPIO2
VDDPIO3
AD[31..0] PBDSD0/FD0 PHD1
15,17,18,22 AD[0..31] 78
PBDSD1/FD1 PHD2 8P4R-33
80
PBDSD2/FD2 PHD3
85
AD0 PBDSD3/FD3 PHD4 RN64
50 88
AD1 BAD0 PBDSD4/FD4 PHD5 PHDA1 RPHDA1
49 90 1 2
AD2 BAD1 PBDSD5/FD5 PHD6 PHDA0 RPHDA0
48 95 3 4
AD3 BAD2 PBDSD6/FD6 PHD7 PHDA2 RPHDA2
46 97 5 6
AD4 BAD3 PBDSD7/FD7 PHD8
45 96 7 8
AD5 BAD4 PBDSD8/FA5 PHD9
43 91
AD6 BAD5 PBDSD9/FA6 PHD10 8P4R-33
42 89
AD7 BAD6 PBDSD10/FA7 PHD11
41 86
AD8 BAD7 PBDSD11/FA8 PHD12 PHIOW# R294 22 RPHIOW#
39 81
AD9 BAD8 PBDSD12/FA9 PHD13 PHIOR# R295 22 RPHIOR#
38 79
AD10 BAD9 PBDSD13/FA10 PHD14 PDMACK# R296 22 RPDMACK#
37 76
AD11 BAD10 PBDSD14/FA11 PHD15
AD12
35
34
BAD11 IDE PBDSD15/FA12
72

C AD13 BAD12 PHDA0 C


33 67
AD14 BAD13 PBDSA0/FA13 PHDA1 PHCS1# R297 33 RPHCS1#
32 68
AD15 BAD14 PBDSA1/FA14 PHDA2 PHCS0# R298 33 RPHCS0#
30 65
AD16 BAD15 PBDSA2/FA15
16
AD17 BAD16 PHCS0#
15 66
AD18 BAD17 PBCS0N/FWN PHCS1#
13 64
AD19 BAD18 PBCS1N/FOEN PDMACK#
12 70
AD20 BAD19 DMACK0N PDMARQ DRVRST# R299 33
10 71
AD21 BAD20 DMARQ0N PINTR#
9 69
AD22 BAD21 DINT0 PHIOR#
7 92
AD23 BAD22 PIORDN PHIOW#
6 82 IDE3
AD24 BAD23 PIOWRN PHIORDY
3 84
AD25 BAD24 PCHRDY PCBLID R300 10K R_PHD7 1 2 R_PHD8
2 98
AD26 BAD25 PCBLID DRVRST# R_PHD6 3 4 R_PHD9
1 63
AD27 BAD26 DEVPRSTN R_PHD5 5 6 R_PHD10
128
AD28 BAD27 VCC3 R_PHD4 7 8 R_PHD11
AD29
127
125
BAD28 PCI 52 HTX+ R_PHD3 9 10 R_PHD12
AD30 BAD29 H_TX_P HTX- R_PHD2 11 12 R_PHD13
123 53
C_BE#[3..0] AD31 BAD30 H_TX_M HRX- R_PHD1 13 14 R_PHD14
15,17,18,22 C_BE#[0..3] 122 56
BAD31 H_RX_M HRX+ R301 R_PHD0 15 16 R_PHD15
57
C_BE#0 H_RX_P 17 18
40
C_BE#1 BCBE0N 4.7K RPDMARQ 19 20
29 SERIAL
C_BE#2 BCBE1N STX+ RPHIOW# 21 22
17 115
C_BE#3 BCBE2N S_TX_P STX- RPHIOR# 23 24
4 114 R302
BCBE3N S_TX_M SRX- PHIORDY 25 26
111
AD25 R303 100 S_RX_M SRX+ RPDMACK# 27 28
5 110
FRAME# IDSEL S_RX_P PIDEINT 29 30
18 82
15,17,18,22 FRAME# BFRAMEN 31 32
IRDY# 19 62 XTLI RPHDA1 PCBLID
15,17,18,22 IRDY# BIRDYN XTLIN 33 34
TRDY# 21 RPHDA0 RPHDA2
15,17,18,22 TRDY# BTRDYN 35 36
DEVSEL# 22 61 XTLO RPHCS0# RPHCS1#
15,17,18,22 DEVSEL# BDEVSELN XTLOUT 37 38
STOP# 24
B 15,17,18,22 STOP# BSTOPN 39 40 B
PAR 28 58 R304 12.1KST
15,17,18,22 PAR PAR ISET
PERR# 26 106 HD_ACT A_YJ220-CB
15,17,18,22 PERR# PERRN HD_ACT HD_ACT 30
SERR# 25 116
15,17,18 SERR# SERRN SCAN_TM
109
PIRQ#E SCAN_EN
15,17 PIRQ#E 117 51
INTA STEST
15,17,18 PREQ#4 121
PCIREQN R305 10K
15 PGNT#4 118 108 VCC3
PCIGNTN SDA R306 10K
107
PCIRST#1 SCL
119 R307
7,13,29 PCIRST#1 RESTN
105 PDMARQ RPDMARQ
SATA_PCLK FCSN
6 SATA_PCLK 120
CLK
104 82
FA0 R308
103
FA1 C309 10K
102
FA2 20P
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7

101
FA3
99
FA4
PDC20375
100
126
11
23
36
47
73
87

VCC3 R309
PINTR# PIDEINT

82
R310
C311 C312 C313 C314 C315 C310 10K
SATA3 SATA4 20P
104P 104P 104P 104P 104P
1 1
GND GND
XTLI C316 20P HTX+ 2 STX+ 2
A HT+ HT+ A
VCC1_8 HTX- 3 STX- 3
HT- HT-
R311 Y4 4 4
20MHz GND GND
33KST HRX- SRX-
Micro Star Restricted Secret
5 5
HR- HR-
C317 C318 C319 C320 C321 Title Rev

104P 104P 104P 104P 104P


XTLO C322 20P HRX+ 6
HR+
SRX+ 6
HR+ Serial ATA Controller 0A
7
GND
7
GND Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
serial ATA connector serial ATA connector CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 20 of 33
5 4 3 2 1
5 4 3 2 1

ATA 33/66/100 Connector

PRIMARY IDE BLOCK SECONDARY IDE BLOCK

D IDE2 D
IDE1 YJ220-CW-1
YJ220-CB-1 HD_RST# R312 33 HDRST#S 1 2
R313 33 HDRST#P 1 2 SDD7 3 4 SDD8
29 HD_RST# 15 SDD[0..7] SDD[8..15] 15
PDD7 3 4 PDD8 SDD6 5 6 SDD9
15 PDD[0..7] PDD[8..15] 15
PDD6 5 6 PDD9 SDD5 7 8 SDD10
PDD5 7 8 PDD10 SDD4 9 10 SDD11
PDD4 9 10 PDD11 SDD3 11 12 SDD12
PDD3 11 12 PDD12 SDD2 13 14 SDD13
PDD2 13 14 PDD13 SDD1 15 16 SDD14
PDD1 15 16 PDD14 SDD0 17 18 SDD15
PDD0 17 18 PDD15 19
19 15 SD_DREQ 21 22
15 PD_DREQ 21 22 15 SD_IOW# 23 24
15 PD_IOW# 23 24 15 SD_IOR# 25 26
15 PD_IOR# 25 26 15 SD_IORDY 27 28
15 PD_IORDY 27 28 15 SD_DACK# 29 30
15 PD_DACK# 29 30 15 IRQ15 31 32
15 IRQ14 31 32 15 SD_A1 33 34 PD_DET 25
15 PD_A1 33 34 SD_DET 25 15 SD_A0 35 36 SD_A2 15
15 PD_A0 35 36 PD_A2 15 15 SD_CS#1 37 38 SD_CS#3 15
15 PD_CS#1 37 38 PD_CS#3 15 39 40
30 SD_LED
39 40
30 PD_LED
R314 R315 R316 C323 R317
R318 R319 R320 C324 R321 4.7K 8.2K 4.7K X_4700p_X7R 15K
4.7K 8.2K 4.7K X_4700p_X7R 15K
VCC3 VCC3
VCC3 VCC3

C C

SERIAL ATA CONNECTOR BLOCK

SATA1 SATA2
1 1
GND GND
16 SATA_TX0 2 16 SATA_TX1 2
HT+ HT+
16 SATA_TX#0 3 16 SATA_TX#1 3
HT- HT-
4 4
GND GND
16 SATA_RX#0 5 16 SATA_RX#1 5
HR- HR-
16 SATA_RX0 6 16 SATA_RX1 6
HR+ HR+
7 7
GND GND
SATA SATA
B B

FM9 FM10 FM11 FM12 FM13 FM14 FM15 FM16

X X X X X X X X

X_FM X_FM X_FM X_FM X_FM X_FM X_FM X_FM

FM17 FM18 FM19 FM20 FM21 FM22

Simulation
X X X X X X

7
X_FM X_FM X_FM X_FM X_FM X_FM
9 6 9 6 9 6
Optics Orientation Holes Mounting Holes 2 5 2 5 2 5

MH7 MH8 MH9


FM1 FM2 FM3 FM4 J4 J5
3

4
SIM2
VCC5
SIM1
X X X X
A A
X_PIN1*2 X_PIN1*2
8

7
X_FM X_FM X_FM X_FM
9 6 9 6 9 6 9 6 9 6 9 6
FM5 FM6 FM7 FM8 Micro Star Restricted Secret
2 5 2 5 2 5 2 5 2 5 2 5
Title Rev
X X X X MH1 MH2 MH3 MH4 MH5 MH6
ATA 33/66/100 Connector 0A
Document Number MS-6728
3

X_FM X_FM X_FM X_FM MICRO-STAR INT'L Last Revision Date:


PGND CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 21 of 33
5 4 3 2 1
5 4 3 2 1

1394a OHCI Link Layer Controller +12V D6


F1
1 2 CPWR CPWR_0

A_BRS340-S-CASE403-03 YFUSE2AS-P C325


C326
EC18 103P
VCC3 P3VA 102P
X_470U/35V

D TPBIAS0 R322 54.9RST TPA0+ D

102
113
125

114
R323 54.9RST TPA0-

20
33

35

24

39
49

62
65
76
75
90
89
8
AD[31..0] U14 C327 R324 54.9RST TPB0+
15,17,18,20 AD[0..31]
R325 4.99KST R326 54.9RST TPB0-

RAMVDD

VDDARX0

VDDARX1

VDDARX2
VDDATX0

VDDATX1

VDDATX2
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6

VDDC1
VDDC2

PVDD1
PVDD2
AD31 97 74 TPBIAS0 334P
AD30 AD31 XTPBIAS0 TPA0+
98 73
AD29 AD30 XTPA0P TPA0-
99 72
AD28 AD29 XTPA0M TPB0+
100 71
AD27 AD28 XTPB0P TPB0-
101 70
AD26 AD27 XTPB0M
104
AD25 AD26 TPBIAS1
105 81 J1394_1
AD24 AD25 XTPBIAS1 TPA1+ TPA0+ TPA0-
106 80
AD23 AD24 XTPA1P TPA1- 1 2
109 79
AD22 AD23 XTPA1M TPB1+ TPB0+ 3 4 TPB0-
110 78
AD21 AD22 XTPB1P TPB1- CPWR_0 5 6 CPWR_0
112 77
AD20 AD21 XTPB1M 7 8
116
AD19 AD20 TPBIAS2 9 10
117 88
AD18 AD19 XTPBIAS2 TPA2+
118 87 YJ205
AD17 AD18 XTPA2P TPA2-
119 86
AD16 AD17 XTPA2M TPB2+
120 85
AD15 AD16 XTPB2P TPB2-
5 84
AD14 AD15 XTPB2M R327 11KST CPWR
6
AD13 AD14
7
AD12 AD13 R328 1KST
10 63
AD11 AD12 XCPS
11
AD10 AD11
12 F2
AD9 AD10 R329 6.34K CPWR CPWR_1
13 66
AD8 AD9 XREXT
14
AD7 AD8 C328 YFUSE2AS-P C329
17
AD6 AD7 C330
18 52
AD5 AD6 D6/CMCJMP 47P 103P
19 58
C AD4 AD5 PHYRESET C
21
AD3 AD4 104P
22 54
AD2 AD3 CTL0/PC0JMP
23 55
AD1 AD2 CTL1/PC1JMP
27 53
C_BE#[3..0] AD0 AD1 D7/PC2JMP TPBIAS1 R330 54.9RST TPA1+
15,17,18,20 C_BE#[0..3] 28
AD0 R331 54.9RST TPA1-
57
C_BE#3 LINKON/TSIJMP C331 R332 54.9RST TPB1+
107 56
C_BE#2 CBE3# LREQ/TSOJMP R333 4.99KST R334 54.9RST TPB1-
122 51
C_BE#1 CBE2# D5 P3VA 334P
4 48
C_BE#0 CBE1# D4
15 47
CBE0# D3 R335 2K
46
PAR D2
15,17,18,20 PAR 3 45 F3
FRAME# PAR D1 CPWR CPWR_2
15,17,18,20 FRAME# 123 44
IRDY# FRAME# D0
15,17,18,20 IRDY# 124 43
TRDY# IRDY# MODE0 YFUSE2AS-P C332
15,17,18,20 TRDY# 126 42
STOP# TRDY# MODE1
15,17,18,20 STOP# 128 40
AD26 R336 100 STOP# SCLK 103P
108 38
DEVSEL# IDSEL LPS/CMC
15,17,18,20 DEVSEL# 127 67
DEVSEL# NC
15,17,18 PREQ#5 96
REQ# EECK
15 PGNT#5 95 32
PERR# GNT# SCL/EECK EEDI TPBIAS2 R337 54.9RST TPA2+
15,17,18,20 PERR# 2 31
PIRQ#F PERR# SDA/EEDI R338 54.9RST TPA2-
15,17 PIRQ#F 91 30
INTA# EEDO C333 R339 54.9RST TPB2+
29
1394_PCLK EECS R340 4.99KST R341 54.9RST TPB2-
6 1394_PCLK 93
PCICLK C334 10P 334P
PCIRST#1 92 60
7,13,29 PCIRST#1 PCIRST# XI
PME# R342 0 37 R343 Y5
GNDARX0
GNDARX1

GNDARX2
GNDATX0

GNDATX1

GNDATX2

12,15,17,18 PME# PME# RAMVSS 24M-16pf

PGND1
PGND2
VSSC1
VSSC2
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

61 1M
XO C335 10P
B R344 X_4.7K B
VCC3
VT6306
103
111
121

115

J1394_2
94

16
26
34

59
64
68
69
82
83

25

36

41
50 TPA1+ TPA1-
1
9

1 2
TPB1+ 3 4 TPB1-
CPWR_1 5 6 CPWR_1
7 8
9 10
YJ205

J1394_3
TPA2+ TPA2-
1 2
TPB2+ 3 4 TPB2-
CPWR_2 5 6 CPWR_2
7 8
9 10
YJ205
VCC3
VCC3 VCC3

For Intel 1394 pinheader


C336 C337 C338 C339 C340 C341 C342 C343
R345 R346
104P X_104P 104P 104P 104P 104P 104P 104P
4.7K 4.7K
A A

P3VA VCC3
VCC3 P3VA U15
L15 EECK 6 8
EEDI SCLK VCC
5 Micro Star Restricted Secret
C344 C345 C346 C347 C348 C349 SDA
1
A0
X_L02-8008044-J07
A1
2 Title Rev
104P 104P 104P 104P 104P 104P
R347 510 A2
3 1394a Link Layer Controller 0A
7 4
WP GND
Document Number MS-6728
X_ATMEL AT24C02
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 22 of 33
5 4 3 2 1
5 4 3 2 1

FRONT USB PORT 5VDUAL


F4
USB_VCC

2.6A-MINISMDM260-S
C350

R348 X_104P
2.7K
+ EC19
1000U/6.3V
D USB_OC#5 D
16 USB_OC#5

R349
C351 5.1K
104P L16

L17 X_0 1 2 USB5- 16


1 2
16 USB4-
X_0

1
JUSB2

1
L18
L19 USB_D4- 1 2 USB_D5-
USB_D4+ 3 4 USB_D5+ X_CMC_90ohm
X_CMC_90ohm 5 6
7 8 USB_OC#5
9 10

2
3

2
YJ205 L21

1 2 1 2 USB5+ 16
16 USB4+
USB 2.0 PIN HEADER
L20 (BLUE) X_0
X_0
CN1
USB_D4- 2 1
USB_D4+ 4 3
Dual Layout with FB
USB_D5- 6 5
USB_D5+ 8 7
C C

X_8P4C-10P

USB_VCC

R350
2.7K

USB_OC#7
16 USB_OC#7

C352 R351
104P 5.1K L22

L23 X_0 1 2 USB6- 16

16 USB7- 1 2
X_0
B B

4
JUSB1
1

L24
L25 USB_D7- 1 2 USB_D6-
USB_D7+ 3 4 USB_D6+ X_CMC_90ohm
5 6
X_CMC_90ohm 7 8 USB_OC#7
9 10

3
2

YJ205 L27

16 USB7+ 1 2 1 2 USB6+ 16
USB 2.0 PIN HEADER
L26 (BLUE) X_0
X_0
CN2
USB_D6- 2 1
USB_D6+ 4 3
Dual Layout with FB
USB_D7+ 6 5
USB_D7- 8 7

X_8P4C-10P

5VDUAL 3VDUAL
JBT1
1 2
5VDUAL 3VDUAL C353
USB_D4+ R352 0 3 4
A D+ GND A
104P
USB_D4- R353 0 5 6
* USB Trace width : 7.5 mils 7
D- GND

5VDUAL GND
Micro Star Restricted Secret
* USB Trace Spacing : 20 mils JBT2
C354 Title Rev

For MSI Bluetooth Front USB Port


* Differential USB Signlas Trace, Spacing : 7.5 mils X_104P 0A
connector (for Document Number MS-6728
option B) MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 23 of 33
5 4 3 2 1
5 4 3 2 1

REAR USB PORT


5VDUAL
F5

1.5A-S C355
+
R354 EC20 X_104P
2.7K 470U/10V
D D
USB_OC#3
16 USB_OC#3

R355
C356 5.1K

STACKED USB CONNECTOR


104P

USB1A
L28 X_0
L29 X_0 25 28
USB_D3- 1 2 USB3- 16
1 2
16 USB2-
21 24

1 5
1

1
USB_D2- 2 6
L30 3 7 USB_D3+ L31
4 8
X_CMC_90ohm X_CMC_90ohm
22 23
2

2
L32 X_0
26 27 L33 X_0
1 2 USB_D2+
16 USB2+
1 2 USB3+ 16
USB/LAN
C C

PGND

Dual Layout with FB


Dual Layout with FB

8
6
4
2
CN3
X_8P4C-47P

7
5
3
1
5VDUAL KBVCC PGND
F6

1.5A-S
R356
C357
X_104P
R357 + 47K
2.7K EC21
470U/10V
PGND
B USB_OC#1 B
16 USB_OC#1 PGND

C358 R358
5.1K
104P
L34 X_0

L35 X_0 1 2 USB1- 16


1 2 USB2
16 USB0-

9 10

2
2

1 5 L36
L37 USB_D0- 2 6 USB_D1-
USB_D0+ USB_D1+ X_CMC_90ohm
3 7
X_CMC_90ohm
4 8

1
12 11
1

L38 X_0 L39 X_0

1 2 YUSB-D1 1 2 USB1+ 16
16 USB0+
PGND PGND

CN4
USB_D1- 2 1
USB_D1+ 4 3
Dual Layout with FB
A
USB_D0- 6 5 A
USB_D0+ 8 7

X_8P4C-47P
PGND Micro Star Restricted Secret
Title Rev
Rear USB Port 0A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 24 of 33
5 4 3 2 1
5 4 3 2 1

Super I/O LPC SUPER I/O W83627F/HF/THF FLOPPY CONNECTOR Intel Front IR Header
83627THF FDD1

R359 X_0 1 2 DRVDEN0


U16 SIO_SMI# 16 VCC5
4
30 1 DRVDEN0 5 6
7,13,29 PCIRST#1 LRESET# DRVDEN0 INDEX#
6 SIO_PCLK 21 2 7 8
LCLK DRVDEN1(SMI#) INDEX# MOT_A#
23 3 9 10 JIR1
16 SERIRQ SERIRQ INDEX# MOT_A# DRV_B#
16 LPC_DRQ#0 22 4 11 12 1
LDRQ# MOA# DRV_B# DRV_A# 1
16 LPC_FRAME# 29 5 13 14 3 4
LFRAME# DSB# DRV_A# MOT_B# IRTX 3 4 IRRX
D 6 15 16 5 6 D
LPC_AD0 DSA# MOT_B# DIR# 5 6
16 LPC_AD0 27 7 17 18
LPC_AD1 LAD0 MOB# DIR# STEP# CON2X3A
16 LPC_AD1 26 8 19 20
LPC_AD2 LAD1 DIR# STEP# WT_DT# VCC5
16 LPC_AD2 25 9 21 22
LPC_AD3 LAD2 STEP# WT_DT# WT_EN#
16 LPC_AD3 24 10 23 24
LAD3 WRDATA# WT_EN# TRACK0# RN67 150
11 25 26
WE# TRACK0# FDD_WP# INDEX#
125 13 27 28 1 2
GPX2/P15/GP14 TRACK0# FDD_WP# RDATA# TRACK0#
123 14 29 30 3 4
GPY1/GP15 WP# RDATA# HEAD# FDD_WP#
128 15 31 32 5 6
GPSA1/P12/GP10 RDDATA# HEAD# DSKCHG# RDATA#
121 16 33 34 7 8
GPSA2/GP17 HEAD# DSKCHG# DSKCHG#
126 17
GPX1/P14/GP12 DSKCHG# R360 150
124
GPY2/P16/GP14 PRD0 CN-BH-D2x17-1:3-BK
127 42
GPSB1/P13/GP11 PD0 PRD1
122 41
GPSB2/GP16 PD1 PRD2
120 40
119
MSO/IRQIN0 PD2
39 PRD3 FWH DECOUPLING CAPACITORS
MSI/GP20 PD3 PRD4 For 627HF
R361 30K TMP_VREF 101
PD4
38
37 PRD5 BIOS PROTECT BLOCK
102
VREF PD5
36 PRD6 RN87 0
Place Cap. as Close to FWH< 350 mil
CPU_TMPA VTIN3 PD6 PRD7 PIN93 VTIN_GND VCC3
4 CPU_TMPA 103 35 PRD[0..7] 26 7 8
VTIN2 PD7
SYS_TMP 104
VTIN1 SLCT
31 RSLCT
RSLCT 26
PIN94 5 6 -5VIN BIOS Update Config.

For W83627HF only, in 83627F are NC


PIN93 93 32 RPE PIN95 3 4 -12VIN
AGND PE RPE 26
PIN94 94 33 RBUSY PIN96 1 2 +12VIN
-5VIN BUSY RBUSY 26
PIN95 95
-12VIN ACK#
34 RACK#
RACK# 26 HIGH Un_protected Firware Hub (FWH) C360 C361
PIN96 96 43 RSLIN# 104P 104P
+12VIN SLIN# RSLIN# 26
PIN97 97 44 RINIT#
AVCC INIT# RINIT# 26 VCC3
PIN98 98
+3.3VIN ERR#
45 RERR#
RERR# 26
RN88 0 LOW Protected Default
PIN99 99 46 RAFD# PIN97 1 2 VTIN_VCC BIOS1
VCOREB AFD# RAFD# 26
100 47 RSTB# PIN98 3 4 1 32
VCCP VCOREA STB# RSTB# 26 VCC3 VCC3 VPP VCC
PIN117 5 6 2 31 FWH_PCLK
12,15,29 PCIRST_ICH5# RST# CLK FWH_PCLK 6
SVID4 106 88 IRRX PIN118 7 8 BEEP PRES3 3 30 PRES4
C SVID3 VID4 IRRX/GP25 PRES2 FGPI3 FGPI4 C
107 69 DLED3 27 4 29
SVID2 VID3 CIRRX/GP34 IRTX SD_DET FGPI2 IC(VIL)
108 87 5 28
SVID1 VID2 IRTX/GP26 R362 X_0 21 SD_DET PD_DET FGPI1 GNDA
109 75 SUSCLK 16 6 27
SVID[0..5] SVID0 VID1 SUSCLKIN(SLP_S5#) R363 X_0 21 PD_DET BIOS_WP# FGPI0 VCCA
27 SVID[0..5] 110 SLP_S5# 16,29 16 BIOS_WP# 7 26
VID0 JBIOS1 WP# GND
56 DCDA# 26 8 25
DCDA# TBL# VCC FWH_INIT#
26 FANPWM1 116 50 DSRA# 26 9 24
FANPWM1 DSRA# 1 ID3 INIT# LPC_FRAME#
26 FANIO1 113
FANIO1 SINA
53 SINA 26 83627THF 2
10
ID2 FWH4
23
115 51 RTSA# ICH5 GPO19 default value is HIGH 11 22
FANPWM2 RTSA# RTSA# 26 ID1 RFU
SOUTA
26 FANIO2 R364 X_0
112
111
FANIO2 SOUTA
54
49
SOUTA 26 For 627NHF YJ102 LPC_AD0
12
13
ID0 RFU
21
20
FANIO3(OVT#) CTSA# CTSA# 26 FWH0 RFU
52 LPC_AD1 14 19
DTRA# DTRA# 26 FWH1 RFU
R365 0 SVID5 105 57 RN89 0 LPC_AD2 15 18
16 THRM# OVT#(VID5) RIA# RIA# 26 FWH2 RFU
PIN118 118 PIN98 7 8 +12VIN 16 17 LPC_AD3
CHASSIS BEEP PIN97 -12VIN GND FWH3
76 84 DCDB# 26 5 6
CASEOPEN# DCDB# PIN99 -5VIN BIOS_4Mbit
19 79 DSRB# 26 3 4
16 SIO_PME# PME# DSRB# PIN117 1 VTIN_GND {Priority}
82 SINB 26 2
SINB
27 DLED1 89 80 RTSB# 26
WDTO/GP24 RTSB# SOUTB
6,10,11,13,16,17 SMBDATA 91 83 SOUTB 26
SDA/GP22 SOUTB
6,10,11,13,16,17 SMBCLK 92 78 CTSB# 26
SCL/GP21 CTSB#
81 DTRB# 26
DTRB#
67 85 RIB# 26
16 PWRBTN# PSOUT# RIB#
68
30 PWRBTIN
64
PSIN
59
FWH Resistors INIT signal voltage translation VCC3
SUSLED/GP35 GA20 A20GATE 16
27 DLED4 90 60 KBRST# 16
PLED/GP23 KBRST KBDAT#
30 PS_ON# 72 63 KBDATA 26
PWRCTL#/GP31 KBDATA KBCLK# default is high
16,29 SLP_S3# 73 62 KBCLK 26
SUSCIN/GP30 KBCLK MSDAT# BIOS_WP# R366 X_8.2K R367
18 66 MSDATA 26 VCC3
6 SIO_48 CLKIN MSDATA MSCLK# R368 330
65 MSCLK 26
MSCLK BEEP PRES3 R370 1K 2.2K
61 58
VCC5_SB VSB KBLOCK#(BEEP)
C359 74 R369 X_0 83627THF FWH_INIT#
SIO_VBAT VBAT
10P 70
B RSMRST#/GP33 DLED2 27 B
28 71 Reservered GPI R371 X_1K Q14
VCC3 VCC3 PWROK/GP32 VCC3
PRES4 R372 1K 2N3904S
C362 12 20 SIO_VBAT VCC5
VCC5 VCC_1 VSS1
48 55 R373 330 Q15
VCC_2 VSS2 4,16 HINIT#
104P C364 77 86 C363 Reservered GPI R374 X_1K 2N3904S
VCC_3 VSS3 VCC3
114 117 PIN117 104P PRES2 R375 1K
104P VCC_4 VSS4(AGND) C367 C366
X_100p 104P
WB-W83627HF-AW-VG C368
X_104P
R376 0 R377 X_0
VCC5 5VDUAL

Thermal Resistor
CP3 X
LPC I/O STRAPPING RESISTOR
VTIN_VCC R378 1 2 28K +12VIN
VCC5 +12V
C369
R379 4.7K SOUTA 104P FB3 X R380 1 2 232K -12VIN
VCC5 -12V
R381 4.7K SOUTB VTIN_GND FB4 X R383 1 2 120K -5VIN
VCC5 -5V
R384 X_4.7K RTSA# CP4 X
VCC5
4 VTIN_GND

1
1
SOUTA L: Disable KBC H: Enable KBC
R386 R387
SOUTB L: 24MHZ H: 48MHZ R388 56K 56K
RTSA# L: CFAD=2E H: CFAD=4E
A
DTRA# L: PNP Default H: PNP no Default SPEAKER BLOCK Chasiss Intrusion TMP_VREF
10K
A

2
VCC5 SIO_VBAT R389 VTIN_GND TMP_VREF

2
10K

R390 SYS_TMP Micro Star Restricted Secret


ALARM 30
10K R391
C

R392
JCI1
2M Title Rev
BEEP B
CHASSIS
RT1
10K
W627THF LPC I/O / FWH 0A
1
1
4.7K Q17
2
2 VTIN_GND Document Number MS-6728
E

N31-1020011-C09
NOTE: LOCATE CLOSE MICRO-STAR INT'L Last Revision Date:
NPN-MBT3904LT1-S-SOT23 D1x2-BK
STATUS PANEL CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 25 of 33
5 4 3 2 1
5 4 3 2 1

KB/MS/LPT/COM Port/FAN
+12V
R393

X_4.7K
KBVCC D9
PS2 KEYBOARD & MOUSE CONNECTOR R394

2
L40
X_1N4148S
X_1K R395
4.7K
Q18
C370 R396
R397

2
4
6
8
104P 1K X_YFET-SI2303DS 80S/0805/2A
FANIO1 25
RN68

1
4.7K 27K
D R398 D
PGND PGND FANPWM1 Q19 CFAN1 R399
25 FANPWM1
JKBMS1 X_2N3904S
1
3
5
7
X_470 3 10K
25 MSDATA
MSDAT# FB5 120-600mA MS_DT 7
8
10 + EC22
X_10U/16V/S
2 CPU FAN
MSCLK# FB7 120-600mA MS_CK 1
25 MSCLK 11
12 9 YJ103-BO
MS For W627 HF Fan Controller
KBDAT# FB8 120-600mA KB_DT 1 4
25 KBDATA
2
KBCLK# FB9 120-600mA KB_CK 5
25 KBCLK
6 3

1
3
5
7
KB
CN5 YMD12P-1 VCC5
8P4C-180P

+12V

2
4
6
8
R519
PGND
PGND X_4.7K

8
R520
FANPWM1 3 R521
PRD[0..7] +
25 PRD[0..7] 1
2
X_10K -
D11 1N4148S RACK# U27A X_220
VCC5
RBUSY
1 2
CN6 PARALLAL PORT X_LM358

4
3 4
RPE 5 6 8P4C-180P
RSLCT 7 8
RN71 PRND7 1 5 D4 C443 R523
C PRD4 PRND4 PRND6 1 5 X_104P C
1 2 2
PRD5 PRND5 PRND5 2 PRND7
3 4 3 7 8 LPT1
PRD6 PRND6 PRND4 3 RN70 PRND6 CN7 STB# AFD# X_47K
5 6 4 5 6 1 14
PRD7 PRND7 RSLCT 4 2.7K PRND5 8P4C-180P PRND0 RERR# R524
7 8 6 3 4 2 15
RPE 6 PRND4 PRND1 PINIT#
7 1 2 3 16
RN72 RBUSY 7 PRND2 SLIN# X_33K
8 4 17
PRD0 PRND0 RACK# 8 PRND3
1 2 9 10 5 18
PRD1 3 4 PRND1 9 10 PRND3 7 8 PRND4 6 19 For W627 THF/NHF Fan Controller
PRD2 5 6 PRND2 PRND2 5 6 CN8 PRND5 7 20
PRD3 7 8 PRND3 PRND3 1 5 PRND1 3 4 8P4C-180P PRND6 8 21
PRND2 1 5 PRND0 PRND7
2 1 2 9 22
RN74 PRND1 2 RACK#
3 10 23
RAFD# AFD# PRND0 3 RN73 RBUSY +12V +12V
25 RAFD# 1 2 4 11 24
RSTB# STB# SLIN# 4 2.7K SLIN# RPE
25 RSTB# 3 4 6 7 8 12 25
RINIT# PINIT# PINIT# 6 PINIT# CN9 RSLCT
25 RINIT# 5 6 7 5 6 13
RSLIN# SLIN# STB# 7 STB# 8P4C-180P +12V
25 RSLIN# 7 8 8 3 4
AFD# 8 AFD# LPT
9
9 10
10 1 2 PGND
33 D10

2
R400 X_1N4148S

2
RERR# R404 2.7K RERR# C372 180P L41 4.7K
L43
R401
FANIO2 25
PGND 80S/0805/2A
80S/0805/2A 27K

1
NBFAN1
SFAN1 R402

1
10K 3
25 RSLCT
RSLCT
3 2 for
25
25
RERR#
RACK#
RERR#
RACK# 2 SYSTEM FAN 1
chipset
RBUSY EC23 1
YJ103-BO
fan
25 RBUSY +
RPE X_10U/16V/S YJ103-BO
B 25 RPE B

EMI
CP8

SERIAL PORT 1 C373 104P SERIAL PORT 2


+12VCOM D12 1N4148S +12VCOM C374 104P X_COPPER
+12V
U17 U18
COM1 COM2
10

10
20 1 20 1
VCC5 NRIA# VCC V+ RIA# VCC5 NRIB# VCC V+ RIB# CP9
2 19 RIA# 25 2 19 RIB# 25
NCTSA# RIN1 ROUT1 CTSA# NDCDA# NDSRA# NCTSB# RIN1 ROUT1 CTSB# NDCDB# NDSRB#
3 18 CTSA# 25 1 6 3 18 CTSB# 25 1 6
NDSRA# RIN2 ROUT2 DSRA# NSINA NRTSA NDSRB# RIN2 ROUT2 DSRB# NSINB NRTSB
4 17 DSRA# 25 2 7 4 17 DSRB# 25 2 7
NSINA RIN3 ROUT3 SINA NSOUTA NCTSA# NSINB RIN3 ROUT3 SINB NSOUTB NCTSB#
7 14 SINA 25 3 8 7 14 SINB 25 3 8
NDCDA# RIN4 ROUT4 DCDA# NDTRA NRIA# NDCDB# RIN4 ROUT4 DCDB# NDTRB NRIB# X_COPPER
9 12 DCDA# 25 4 9 9 12 DCDB# 25 4 9
RIN5 ROUT5 RIN5 ROUT5
5 5
RTSA# 16 5 NRTSA RTSB# 16 5 NRTSB
25 RTSA# DIN1 DOUT1 25 RTSB# DIN1 DOUT1 CP10
DTRA# 15 6 NDTRA COM DTRB# 15 6 NDTRB COM
25 DTRA# 25 DTRB#
11

11
SOUTA DIN2 DOUT2 NSOUTA SOUTB DIN2 DOUT2 NSOUTB
25 SOUTA 13
DIN3 DOUT3
8 PGND 25 SOUTB 13
DIN3 DOUT3
8 PGND
11 10 -12VCOM D13 1N4148S
-12V 11 10 -12VCOM C375 104P
GND V- GND V-
75232S-SSOP20 104P 75232S-SSOP20 X_COPPER
C376

NRTSA 1 2 NRTSB 1 2 PGND


A A
NDSRA# 3 4 CN10 NDSRB# 3 4 CN11
NCTSA# 5 6 8P4C-180P NCTSB# 5 6 8P4C-180P
NRIA# 7 8 NRIB# 7 8

NDCDA# 1 2 NDCDB# 1 2 Micro Star Restricted Secret


NSOUTA 3 4 CN12 NSOUTB 3 4 CN13
NSINA 5 6 8P4C-180P NSINB 5 6 8P4C-180P Title Rev
NDTRA 7 8 NDTRB 7 8 KB/MS/LPT/COM Port/FAN 0A
Document Number MS-6728
PGND PGND
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 26 of 33
5 4 3 2 1
5 4 3 2 1

CPU Vcore / Smart LEDSetting 4 VID[0..5]


VID[0..5]

VID0
VIDB[0..5] 28

VID1 VIDB0
VID2 VIDB1
VID3 1 3 VIDB2
VID4 VIDB3
VID5 Q20 VIDB4
NPN-3904 VIDB5

2
VID Pull-Up Rresistors
D D
+12V
1 3

Q21
NPN-3904
R443

2
820/1206

VCC3_VID
RN82 4.7K 1 3

C
VID0 1 2
VID1 3 4 Q22
VID4 5 6 NPN-3904
VID3 D15

2
7 8
VID2 R447 4.7K TZM5226B-S-LL34
A

VID5 R448 4.7K

8
6
4
2
VCC3
1 3 R409 R410

Q23 1K RN77 1K
NPN-3904
1K

7
5
3
1

1
3
5
7
R413 R414 RN78
4.7K 4.7K
4.7K
1 3
C C
Q24

2
4
6
8
NPN-3904
SVID5

2
VCC3_VID SVID4
SVID3
SVID2
SVID1
R405 SVID0 SVID[0..5]
SVID[0..5] 25
4.7K 1 3

RN75 1K Q25
2 1 NPN-3904
16 VID_CTRL#

2
4 3
6 5
C377 8 7
X_104P
VCORE Setting GPIO28 R406 1K

R407 1K
CPU Default 1
Manuel Setting 0

VCC5
B VCC5 B
2
4
6
8

8
6
4
2
RN79
RN80
330
330
1
3
5
7

7
5
3
1
JLED1
DLED1 DDLED1 DLED1 DDLED1
25 DLED1 1 2
DLED2 DDLED2
25 DLED2 3 4
DLED3 DDLED3
25 DLED3 5 6
DLED4 DDLED4
25 DLED4 7 8
10
YJ205
2
4
6
8

RN81
1K Q26
Q27 3 Q28 Q29
3 2 3 3
1
3
5
7

2 1 2 2
A 1 1 1 A

Micro Star Restricted Secret


Title Rev
CPU Vcore / DLED 0A
Document Number MS-6728
NPN-3904LT1-S-SOT23 MICRO-STAR INT'L Last Revision Date:
NPN-3904LT1-S-SOT23 NPN-3904LT1-S-SOT23 NPN-3904LT1-S-SOT23 CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 27 of 33
5 4 3 2 1
5 4 3 2 1

Voltage Regular Module


VIN

CHOK1 1.1u
VCCP_IN VIN

D
+

+
EC24 EC25 EC26 EC27 Q30
C379 C380 R417 2.2/0805 C382
X_2.2u/0805/16V G
10U 1500u 1500u 1500u 1500u 105P/0805

S
IPD09N03LA-TO252 CHOK2 0.8375V~1.6V/90A
D VCCP D

0.9UH/25A-PB

+
EC28 EC29 EC30
R420 0/0805 C383
VCCP_IN LG1 G LG1 G 102P
3VDUAL VCCP_IN Q31

S
IPD06N03LA-TO252 Q67
R416
R418 R415 X_IPD06N03LA-TO252 1500UF/6.3V-FJ 1500UF/6.3V-FJ 1500UF/6.3V-FJ
5.6K R419
4.7/0805
4.7K
VIN
Q32 1K
R421 2N3904S VCC5 C384 C385

D
Q33 104P 105P Q34 C387

14
4,29 VID_GD

5
2N3904S R423 2.2/0805
1K 105P/0805
HIGH(>1.23V) 11 12 G

VCC
PVCC
BOOT1 UGATE1
VCC3 ENABLE VRM

S
13 IPD09N03LA-TO252
PHASE1 CHOK3
C386 1 4
R422 105P PWM1 LGATE1
U20 0.9UH/25A-PB

26
10 9
BOOT2 UGATE2

+
ISL6556BCB-SOIC28 EC31 EC32 EC33

D
1K 27 22 R424 4.7KST 8 C388

VCC
EN PWM1 PHASE2

PGND
2 23 R425 0/0805 102P

GND
16,30 VRM_GD PGOOD ISEN1
3 2 7 LG2 G LG2 G
27 VIDB4 VID4 PWM2 LGATE2
4 Q35
27 VIDB3 VID3

S
5 21 R426 4.7KST U19 IPD06N03LA-TO252 Q68
27 VIDB2 VID2 PWM2 MOSDVR-HIP6602B-SO14 1500UF/6.3V-FJ 1500UF/6.3V-FJ 1500UF/6.3V-FJ

3
6
27 VIDB1 6 20
C VID1 ISEN2 C389 X_IPD06N03LA-TO252 C
27 VIDB0 7
VID0 104P
27 VIDB5 8
C390 562P VID12.5
R427 20K 13 18 R428 4.7KST VIN
C391 COMP PWM3
19
104P C392 X_NC ISEN3
VCCP_IN

D
R429 X_2K 12 25 R499 X_3.3KST Q36 C394
VCCP FB PWM4
24 R435 2.2/0805
A R430 3K B 14 ISEN4 UG_3 105P/0805
G
0 R431 VCORE_SENSE+ VDIFF VCC5 R432
4 VCC_SENSE 15
VSEN

S
9 C393 IPD09N03LA-TO252
0 R433 VCORE_SENSE- OFS R434 104P CHOK4
4 VSS_SENSE 16
RGND 4.7/0805 BOOT PH_3
2 1
BOOT UGATE
TO CPU VCORE SENSE PIN 11 7 8
GND
OVP

REF 470K PVCC PHASE 0.9UH/25A-PB


28 10 6

D
FS TCOMP VCC

+
VCC_SENSE=REMOTE VCORE R436 PWM3 3 EC34 EC35 EC36
R438 R439 R440 PWM R437 0/0805 C395
4 5
17

C396 GND LGATE LG_3 LG3 LG3 G 102P


VSS_SENSE=REMOTE GND
1

G
NC 103P C397 U21 2200u

S
100 R441 150K 2K X_NC 105P MOSDVR-INTS-HIP6601B-SOIC8 Q37 Q69
VCORE_SENSE+ IPD06N03LA-TO252
VCCP
X_IPD06N03LA-TO252 1500UF/6.3V-FJ 1500UF/6.3V-FJ
100 R442
VCORE_SENSE- Dual Layout

For 4 phase option


B B

14
5
VIN
BOOT 11 12 UG_3 Q65

VCC
PVCC
BOOT1 UGATE1

D
13 PH_3
PHASE1 R500 X_2.2/0805 C439
PWM3 1 4 LG_3 G
PWM1 LGATE1 105P/0805

S
10 9 X_IPD09N03LA-TO252
BOOT2 UGATE2 CHOK5
VCC5 8
PHASE2

PGND
GND
R501 0 2 7 X_0.9UH/25A-PB

D
PWM2 LGATE2

+
EC37 EC38
U26 R502 X_0/0805 C440
+

X_MOSDVR-HIP6602B-SO14 LG4 G LG4 G 102P

3
6
For 3 phase; C441 2200u
4 phase removed

S
Q66 Q70
X_104P IPD06N03LA-TO252
X_IPD06N03LA-TO252 1500UF/6.3V-FJ

A
VCC5_SB VCCP_IN
BOOT CPU R444
LOW Northwood 20K
HIGH Prescott R445 R446
4.7K 4.7K
D

A A

BOOT# G Q38
30 BOOT#
NDS7002A-S-SOT23 ATX12V Power Connector
S

Q39 VCCP_IN Micro Star Restricted Secret


2N3904S B JPW1 Title Rev

R449 10K Q40


3
12V GND
1 VRM 10 HIP6556 0A
4 BOOT
2N3904S Document Number MS-6728
C398 4 2
12V GND
103P MICRO-STAR INT'L Last Revision Date:
D2x2 CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 28 of 33
5 4 3 2 1
5 4 3 2 1

ACPI Controller +12V


VCC5
Q61
40N03
P3VA

D S

R492 + EC60

8
VCC5_SB VCC3

G
VREF1_25 3 332RST 470U/10V
+
SEL0 5VUSB 1
**S5O# pin function(Hi level = 5V) 2
-
VCC5_SB H 2 MOSFET same as 5VUSB(Hi level = 12V) U25A
LM358 R493

4
D 1.7V@250mA L 1 MOSFET 5VUSB USE 2 MOSFET D
R450
R451 R452 1K R453 191RST
Power S0 S3 S5 330 330 4.7K R454
VCC3_SB Main Standby Standby 10K
VCC5_STR Main Standby 0V SLP_S4# R525 0 VCC5_SB
MEM_STR Main Standby 0V 16 SLP_S4# 5V DUAL Power Q62
SLP_S5# R526 X_0 VCC3 VCC1_8
16,25 SLP_S5# 40N03

D
MS5_SLP_S3# D S
30 MS5_SLP_S3#
5VDUAL_GATEH G Q42 +12V
SLP_S3# R455 0
16,25 SLP_S3# NDS351AN-S-SOT23 EC61
+

S
C400
7 MS5_POK

G
R494 + EC62

8
2200p 5VDUAL
6 PWROK_SMB
VREF1_25 5 X_10U/16V/S 100RST 470U/10V
+
30 MS5_RST# 7
6
-
R457 0
30 PWR_OK
U25B

D
RSMRST# 13,16
LM358

4
+

MS5_RSMRST#
30 PLED1
EC42 R495

DDR_POK
Q43 470U/10V
30 PLED2
5VDUAL_GATEL G 220RST

**INPUT 2 AND 3 MUST BE HI LEVEL WHEN USE P45N02LD-S-TO252

S
Near C403
OUTPUT 1 AND 2 FOR GPIO FUNCTION
302E U23 X_102P VCC5

48
47
46
45
44
43
42
41
40
39
38
37
9VSB VCC3
C R459 330 Low RDS ON MOSFET VCC_AGP1 C

CHIP_PWGD/GPIOC
CPU_PWGD/GPIOC
PWR_OK1/GPIOC
EXTRA_PWGD/GPIOC

S5O#/GPIOB/SEL0
SLP_S3#
SLP_S5#
PWR_OK

RSM_RST#/GPIOB
PLED1
PLED0

FP_RST#/GPIOB
VCC5
R460 X_330
R461 330 U22A

D
VCC3

8
TI-LM358-SOIC8 Q41

+
1 36 VREF1_25 3
DGND 5V_USB +
2 35 Q44 EC43 1 AGP1_G1 G
12,15,25 PCIRST_ICH5# PCIRST#/GPIOA 5VSB_DRV
3 34 1000u 2
21 HD_RST# HDD_RST#/GPIOA 5V_DRV 09N03 -
PCIRST#2 4 33 AGP1_G2 G S-TO252-55V
17,18 PCIRST#2 SLOT_RST#/GPIOA TYPEDET#

S
PCIRST#1 5 32
7,13,18,20,22,25 PCIRST#1 DEV_RST#/GPIOA VAGP_SEN

4
6 SMBDATA_ISO 6 31
I2C_DATA VAGP_DRV

S
6 SMBCLK_ISO 7 30 VCC_AGP
VTT_GATEH I2C_CLK AGND2 VREF1_25
8 29
BT_DRV 1.25VREF
9 28 9VSB
BT_SEN 9VSB

+
VTT_GATEL 10 27 C404 R456
BT_SINK C2 4.7U/0805 EC44 EC45 AGP1_FB
11 26 VCC_AGP1
AGND0 C1

VRAM_2.5_DEN
VCC3

VRAM_2.5_DRV
12 25 C405 1000u X_1000u
VCC5_SB R462 10K SEL1 VRAMDRV2 VCC3 VCC3 1KST
VRAMDRV1 2.5V
VRAMSEN 1U/0805 R458

1.2V_SEN
1.2V_DRV
VRGOOD
Q45 C406 1KST
DDR VTT Power
AGND1
D

S-TO252-55V C407 D16 D17

5VSB
1.5V/4A(NB)+1A(SB)+2A(AGP)
VCC

104P 102P 1N5817


SS

X_1N4148
1.25V/2.1A G
13
14
15
16
17
18
19
20
21
22
23
24
WB-W83302CRB
VCC5_SB +12V
S

VTT_DDR VCC3 CHARGE PUMP VOLTAGE OUTPUT


D

VCC5
+

D
VCC5_SB
EC46 EC47
B X_470u 1000u G C408 C409 Q48 VCC_VID / VID_GOOD B

+
Q46 EC41 104P 104P VID_G2 G NDS351AN-S Place MOSFET near CPU
S

S-TO252-55V C410 470U/10V C411


X_102p

S
474P/0805 VCC_VID
VCC_VID 5
X7R
SEL1 VRAM VRAM_2.5 VCC3 1.2V/150mA
C412 DDR 2.5V Power
H 3.3VDUAL 2.5V X_102p R463 C447
X_10U/1206
2.5V/7A(DIMM)+5A(NB)
TRI-STATE 3.3VSB 2.5V 10K
S

L 3.3VSTR 1.25V FOR 3VDUAL G 3VSB_GATE1 VID_GD 4,28 3VDUAL


SETTING BY D18
SEL1
Q49 THIS PIN IS OPEN DRAIN OUTPUT
FOR 3VSB OR 3VSTR 3VDUAL P45N02LD-S-TO252

+
D

EC63 EC64
SETTING BY SEL1 1N4001
Wide Trace
1000u X_1000u
VCC3
+

Pin 15,19,22,32 Must


S

EC49 EC50 Q52 D S


reserve capacitor. 1000u X_1000u G 3VSB_GATE2
VCC5 VCC3 VCC3
D

Q63
Q64 9VSB 09N03

+
G
S-TO252-55V C438 EC51 EC53 EC54
09N03
D

102P G R496
A A
DDR_POK
U22B
ICH5 300mA 100RST 1000u 1000u 1000u

8
S

PCI 375+20+20= 415mA TI-LM358-SOIC8


VCC5_SB VREF1_25 R497 4.7K 5 +
VCC3_SB 715mA 7 Micro Star Restricted Secret
6 -
Title Rev
VCC_DDR MS-5 ACPI Controller 0A
** SETTING 3VSTR THEN VRAM_2.5
4

MS-6728
+

BECOME TO 1.25 VREF C414 R498 Document Number


EC57 EC58
X_104P
X_470u 1000u C94-1020641-S03 75RST MICRO-STAR INT'L Last Revision Date:
C94-1020651-T30 CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 29 of 33
5 4 3 2 1
5 4 3 2 1

ATX connector / Front Panel Intel reference GMCH VTT power cirucit
D19
GPIO33 16
ESD Protect
1N4148S

C415
D20 VCC5_SB CPU_VTT
PD_LED 21
X_181P GMCH_VTT

1
D 1N4148S D
R466
220
D21
HD_ACT
20 HD_ACT SD_LED 21

2
1N4148S

1
VR1 +12V
VCC5 For MSI / Intel Front Panel 2

JFP1 YREG431S

R467 330 HDD+ 2 PLED1 R475 4.7K

3
1 PLED1 29 16,28 VRM_GD
HDD+ PLED VCC3
HD_ACT 3 4 PLED2 Q55
HDD- SLED PLED2 29
VCC5_SB R470 2N3904S
5 6 PWSW+ R469 330
RESET- PWSW+ C416
U24A

D
R468 X_0 FP_RST# 7 8 PWSW- R472 22 1.21KST
29 MS5_RST# PWRBTIN 25 105P/0805

8
RESET+ PWSW- TI-LM358-SOIC8
X_104P 9 3
16 ICH_RST# NC + S-TO252-55V
R471 0 C417 R473 C418 1 G
104P 2 -
JFP1 10K Q53

S
JFP2 R476

4
6 FP_RST# R474
1 2 1.13KST
GND SPEAKER VTT
PLED2 3 4 Icc=2A
C SLED BUZ+ -12V 1K C
PLED1 5 6 R477 X_0 + EC59 NORTHWOOD:1.45V
PLED BUZ-
PRESCOTT:1.2V
8 470U/10V
VCCSPK VCC5

JFP2 R478 Q56


Q54 NDS352AP
28 BOOT#
549RST
NDS7002AS

RN83 JGS1
1 2 EXTSMI#
25 ALARM 16 EXTSMI# 1
3 4
2
5 6
2

7 8 X_YJ102

8P4R-150
BZ1
C419 X_BUZZER
104P BOOT BOOT# CPU Voltage
R480 LOW HIGH Northwood 1.45V
Q58 HIGH LOW Prescott 1.225V
16 SPKR
2N3904S
1

2.2K

VCC5

B B

ATX Connector

ATX1

VCC3 11 1 VCC3
3.3V 3.3V
12 2
C423 -12V -12V 3.3V C420
X_104P C433 13 3 104P
X_102P GND GND
14 4 VCC5
VCC5_SB PSON 5V
R482 1K C426 15 5 VCC5
X_102P GND GND C428
PS_ON# 16 6 104P
25 PS_ON# GND 5V
17 7 R483
GND GND 10K
18 8 PWR_OK
-5V -5V POK PWR_OK 29
3VDUAL C446 19 9
5V 5VSB VCC5_SB
X_104P C430
20 10 104P
VCC5 5V 12V +12V
R487 R486
A A
X_4.7K POWER
X_10K C431 C435 C436
X_104P X_104P 104P
29 MS5_SLP_S3#
C

Q60
Micro Star Restricted Secret
B
Title Rev
X_2N3904S ATX connector / Front Panel
E

C437 0A
X_104P Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 30 of 33
5 4 3 2 1
5 4 3 2 1

D D

PCI1
0

2
SB
3 PCI-2
4

C PCI3 C

PCI4

PCI-5

B B

PCI-6

MS-1 2 SATA

A
1394 A

Micro Star Restricted Secret


Title Rev
PCI Device & MS-1 Diagram 0A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 31 of 33
5 4 3 2 1
5 4 3 2 1

00A to 00B Schematic change list Page

1
D D

C
5 C

8
B B

10

A A

Micro Star Restricted Secret


Title Rev
History 0A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Thursday, November 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 32 of 33
5 4 3 2 1
5 4 3 2 1

PCB1
D D

_
P01-672800A-K10

USB1-N U2-HS
CPU1-1
BIOS1-1
9 10 BAT1-1

1 5
2 6 U2-1 U2-2
3 7 PLCC32-SMT D1x3-BK D1x3-BK
4 8 _
_
12 11
YSKTBT

C C
USB

B B

A A

Title
{Title}

Size Document Number Rev


Custom{Doc} 100

Date: Thursday, November 21, 2002 Sheet 33 of 33


5 4 3 2 1

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