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Title Page
MS-6728 ATX Cover Sheet 1
Block Diagram 2
*INTEL mPGA 478B Processor
D
GPIO SPEC 3 D

*INTEL Springdale GMCH / ICH5 Chipset


(DDR 333 / AGP 8X) / (integrated serial ATA) Intel mPGA478B 4,5 MS-6728 ver:100
*INTEL 82547EI Gigabit LAN Clock Synthesizer 6 Standard Giga: 50
*VT6306 1394a OHCI Link Layer Controller Intel Springdale 7,8,9 LAN component 10/100M:29
*PDC20376 Serial ATA Controller System Memory / DDR Terminations 10,11 Option B SATA component 64
*Winbond 83627THF LPC I/O AGP SLOT 12 1394 component 48
*Audio codec 6 channel support 82547EI Gigabit LAN 13,14

*USB 2.0 support x8 (integrated into ICH5) ICH5 15,16


Standard BOM (without Lan,
*Jump Less support PCI Slot / MS-1 17,18 SATA / 1394 HC)
Audio Codec / 6 Channel connector 19 SMT 694
C Serial ATA Controller / Connectors 20 DIP 82 C

Total 776
ATA 66/100 Connectors 21
1394 Controller 22 Option A BOM (with 10-100 Lan /
without SATA/1394 HC)
VGA Port 23
Front USB Port 24 SMT 721
DIP 84
Rear USB Port 25
Total 805
W627THF LPC I/O / FWH 26
Option B BOM (for All)
KB/MS/LPT/COM Port/FAN 27
CPU Vcore / DLED 28
SMT 852
VRM 10 HIP6556 29
DIP 93
B
MS-5 ACPI Controller 30 Total 945 B

ATX connector / Front Panel 31


PCI Device & MS-1 Diagram 32 Option C BOM (for 865G+10/100
LAN)
HISTORY
SMT 759
DIP 89
Total 848

A A

Micro Star Restricted Secret


Title Rev
Cover Sheet
20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 1 of 33
5 4 3 2 1
5 4 3 2 1

Block Diagram
Intel mPGA478B
D D

FSB 533/667 D D

I I

M M

M M
A
AGP 8X /Fast Write
G 1 2

P D D

Springdale 2 channel DDR


I I
C C

M M

M M
CSA
Intel 82547EI 3 4
Gigabit LAN

Hub Link
5 PCI Slots

I I
Serial ATA
D D

E E
Dual ATA 33/66/100
B ICH5 1 2 B

1394
Front x3 Controller PCI-33
LPC BUS

SATA Con x2 SATA/IDE


Controller
IDE Con x1

USB 2.0
FWH SUPER I/O

AC-LINK
AC97
Codec

A Dual USB 1.1 OHCI A

/2.0 EHCI 8 Ports

Micro Star Restricted Secret


Rear x6 Front x2 Title Rev
Block Diagram
20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 2 of 33
5 4 3 2 1
5 4 3 2 1

GPIO FUNCTION
ICH5 DDR DIMM Config.
DEVICE ADDRESS CLOCK
GPIO Pin Type Function Power well
DIMM 1 1010000B MCLK_A0/MCLK_A0#
D GPIO 0 I PREQ#B MAIN D
MCLK_A1/MCLK_A1#
GPIO 1 I PREQ#B MAIN
MCLK_A2/MCLK_A2#
GPIO 2 I PIRQ#E MAIN
DIMM 2 1010001B MCLK_B0/MCLK_B0#
GPIO 3 I PIRQ#F MAIN
MCLK_B1/MCLK_B1#
GPIO 4 I PIRQ#G MAIN
MCLK_B2/MCLK_B2#
GPIO 5 I PIRQ#H MAIN
GPIO 6 I GPI6 MAIN
GPIO 7 I GPI7 MAIN PCI RESET DEVICE
GPIO 8 I CSA_PME# RESUME
Signals Target
GPIO 9 I OC4# RESUME
GPIO 10 I OC5# RESUME PCIRST#_ICH5 AGP,FWH,MS-5
GPIO 11 I SIO_SMI# RESUME Springdale,LAN, Super I/O,SATA,
PCIRST#1 1394,MS-1
GPIO 12 I EXTSMI# RESUME
GPIO 13 I SIO_PME# RESUME PCIRST#2 PCI slot 1-6
GPIO 14 I OC#6 RESUME HD_RST# Primary, Scondary IDE
C
GPIO 15 I OC#7 RESUME C

GPIO 16 O PGNT#A MAIN


GPIO 17 O PGNT#B MAIN PCI
GPIO 18 O GPO18 MAIN
GPIO 19 O BIOS_WP# MAIN DEVICES INT# IDSEL REQ#/GNT# CLOCK
GPIO 20 O GPO20 MAIN INT#A PREQ#1
GPIO 21 O GPO21 MAIN PCI SLOT 1 INT#B
INT#C
AD16
PGNT#1
PCICLK1
GPIO 22 OD GPO22 MAIN INT#D
GPIO 23 O GPO23 MAIN INT#B PREQ#2
GPIO 24 I/O GPIO24 RESUME default output PCI SLOT 2 INT#C
INT#D
AD17
PGNT#2
PCICLK2
GPIO 25 I/O LAN_DISABLE# RESUME default output INT#A
GPIO 27 I/O GPIO27 RESUME default output INT#C PREQ#3
* GPIO 28 I/O GPIO28 RESUME default output PCI SLOT 3 INT#D
INT#A
AD18
PGNT#3
PCICLK3
GPIO 32 I/O GPIO32 MAIN default output INT#B

B
GPIO 33 I/O GPIO33 MAIN default output INT#D PREQ#4 B
GPIO 34 I/O GPIO34 MAIN default output PCI SLOT 4 INT#A
INT#B
AD19
PGNT#4
PCICLK4
GPIO 40 I PREQ#4 MAIN INT#C
GPIO 41 I GPI41 MAIN INT#B PREQ#5
GPIO 48 O PGNT#4 MAIN PCI SLOT 5 INT#C
INT#D
AD20
PGNT#5
PCICLK5
GPIO 49 OD CPUPWRGD MAIN INT#A

SATA_GNT#
SERIAL ATA INT#E AD25 SATA_PCLK
SATA_REQ#

FWH 1394 INT#F AD26


1394_GNT#
1394_PCLK
GPIO Pin Type Function 1394_REQ#
GPI 0 I PD_DET PREQ#0
GPI 1 I SD_DET MS-1
PGNT#0
* GPI 2 I Pull down through 1K ohms (unused)
GPI 3 I Pull down through 1K ohms (unused)
A * GPI 4 I Pull down through 1K ohms (unused) A

Micro Star Restricted Secret


Title Rev
GPIO Spec. 20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 3 of 33
5 4 3 2 1
5 4 3 2 1

CPU SIGNAL BLOCK VIDPWRGD DC Specifications CPU GTL REFERNCE VOLTAGE BLOCK
Min Typ Max
VIL 0.3
7 HA#[3..31] CPUVID_GD 28
VIH 0.9
VID[0..5] 27
It must rout to the enable pin of PWM and CK-409.
VIDGD to Vccp delay time is from 1ms to 10ms. VCCP VTT

HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3

VID2
VID1
VID0
VID5
VID4
VID3
D VIDGD rising time is 150ns. D

R1

AD26
AC26
AE25
R92 R159

AD2
AD3
AB1

AE1
AE2
AE3
AE4
AE5
W2

W1

M1

M4
M3

M6
U4

R6

U3

U1

R3

R2

N5
N4
N2

N1
200RST 200RST

Y1

V3

V2

P6

P4
P3

K1

K4
K2

A5
A4
T5

T4

T2

T1

L2

L3

L6
CPU1A GTLREF 0.63*Vccp
R2

A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
A9#
A8#
A7#
A6#
A5#
A4#
A3#

DBR#

ITP_CLK1
ITP_CLK0

VID5#
VID4#
VID3#
VID2#
VID1#
VID0#
VCC_SENSE
VSS_SENSE

VIDPWRGD
C69 C57 R95
HDBI#0 E21 104P 104P R3 169RST
7 HDBI#[0..3] DBI0#
HDBI#1 G25 AA21
HDBI#2 DBI1# GTLREF3
P26 DBI2# GTLREF2 AA6
HDBI#3 V21 F20
DBI3# GTLREF1 GTLREF 7
F6 C96 220p_X7R CPU_GTLREF=(R3/(2R3+R1))*(Vccp+Vtt);
GTLREF0 {VOLTAGE}
AC3
V6
IERR#
AB4 BPM#5 Here R1=R2.
MCERR# BPM5# BPM#4
15 FERR# B6 FERR# BPM4# AA5
Y4 Y6 BPM#3
15 STPCLK# STPCLK# BPM3#
AA3 AC4 BPM#2
BINIT# BPM2# BPM#1
15,25 HINIT# W5 INIT# BPM1# AB5
AB2 AC6 BPM#0
RSP# BPM0#
H5 H3 HREQ#4
7 HDBSY# DBSY# REQ4# HREQ#[0..4] 7
H2 J3 HREQ#3
7 HDRDY#
J6
DRDY# REQ3#
J4 HREQ#2 CPU ITP BLOCK
7 HTRDY# TRDY# REQ2#
K5 HREQ#1
REQ1# HREQ#0
7 HADS# G1 ADS# REQ0# J1
7 HLOCK# G4 LOCK#
G2 AD25 TESTHI12
7 HBNR# BNR# TESTHI12
F3 A6 TESTHI11
7 HIT# HIT# TESTHI11
E3 Y3 TESTHI10 ITP_TDI R53 150
7 HITM# HITM# TESTHI10 VCCP
D2 W4 TESTHI9
7 HBPRI# BPRI# TESTHI9
C E2 U6 TESTHI8 ITP_TRST# R61 680 C
7 HDEFER# DEFER# TESTHI8
TESTHI7 AB22
ITP_TDI C1 AA20
ITP_TDO TDI TESTHI6 ITP_TMS R68 X_39
D5 TDO TESTHI5 AC23 VCCP
ITP_TMS F7 AC24 ITP_TDO R55 X_75
ITP_TRST# TMS TESTHI4
E6 TRST# TESTHI3 AC20
ITP_TCK D4 AC21 TESTHI2 ITP_TCK R60 27
TCK TESTHI2 TESTHI1
25 CPU_TMPA B3 THERMDA TESTHI1 AA2
C4 AD24 TESTHI0
25 VTIN_GND THERMDC TESTHI0
15 TRMTRIP# A2 THERMTRIP#
27 SLOTOCC# AF26 GND/SKTOCC# BCLK1# AF23 CPU_CLK# 6
PROCHOT# C3 AF22
7 PROCHOT# PROCHOT# BCLK0# CPU_CLK 6 VCCP
15 IGNNE# B2 IGNNE#
B5 F4 HRS#2
15 SMI# SMI# RS2# HRS#[0..2] 7
C6 G5 HRS#1 RN7
15 A20M# A20M# RS1#
AB26 F1 HRS#0 CPURST# 1 2
15 SLP# SLP# RS0# TESTHI2 3 4
A22 V5 TESTHI12 5 6
RESERVED0 AP1# TESTHI0
A7 RESERVED1 AP0# AC1 7 8
AE21 H6 HBR#0
RESERVED2 BR0# HBR#0 7
AF24 8P4R-62
RESERVED3 COMP1 R67 53.6RST
AF25 RESERVED4 COMP1 P1
L24 COMP0 R75 53.6RST
COMP0 RN16
28,30 BOOT AD1 BOOTSELECT
AE26 L25 TESTHI1 1 2
OPTIMIZED/COMPAT# DP3# TESTHI10
DP2# K26 3 4
AD6 K25 TESTHI9 5 6
6,27 BSEL0 BSEL0 DP1#
AD5 J26 TESTHI8 7 8
6,27 BSEL1 BSEL1 DP0#
CPU_GD AB23 R5 8P4R-62
15 CPU_GD PWRGOOD ADSTB1# HADSTB#1 7
ADSTB0# L5 HADSTB#0 7
B CPURST# B
7 CPURST# AB25 RESET# DSTBP3# W23 HDSTBP#3 7
P23 TESTHI11 R90 62
DSTBP2# HDSTBP#2 7
HD#63 AA24 J23
7 HD#[0..63] D63# DSTBP1# HDSTBP#1 7
HD#62 AA22 F21
D62# DSTBP0# HDSTBP#0 7
HD#61 AA25 W22
D61# DSTBN3# HDSTBN#3 7
HD#60 Y21 R22
D60# DSTBN2# HDSTBN#2 7
HD#59 Y24 K22
D59# DSTBN1# HDSTBN#1 7
HD#58 Y23 E22
D58# DSTBN0# HDSTBN#0 7
HD#57 W25
HD#56 D57#
Y26 D56# LINT1/NMI E5 NMI 15
HD#55 W26 D1
D55# LINT0/INTR INTR 15
HD#54 V24 D54#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
D27#
D26#
D25#
D24#
D23#
D22#
D21#
D20#
D19#
D18#
D17#
D16#
D15#
D14#
D13#
D12#
D11#
D10#
D9#
D8#
D7#
D6#
D5#
D4#
D3#
D2#
D1#
D0#
M26

M24

M23

M21

G26

G23

G22
U21

U23
U24
U26

R24
R25

R21
N25
N26

N23

N22

H25

H24

D26

H22
D25

D23
C26
H21

C24
C23

D22
C21
V22

V25

P24

P21

K23

E25

E24

B25

B24

A25
A23
B22
B21

PGA-S478-GD10-F02
T23
T22
T25
T26

F26

F24
F23
L22

L21
J24

J21

{Priority}
HD#53
HD#52
HD#51
HD#50
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#37
HD#36
HD#35
HD#34
HD#33
HD#32
HD#31
HD#30
HD#29
HD#28
HD#27
HD#26
HD#25
HD#24
HD#23
HD#22
HD#21
HD#20
HD#19
HD#18
HD#17
HD#16
HD#15
HD#14
HD#13
HD#12
HD#11
HD#10
HD#9
HD#8
HD#7
HD#6
HD#5
HD#4
HD#3
HD#2
HD#1
HD#0

CPU STRAPPING RESISTORS


A ALL COMPONENTS CLOSE TO CPU A

BPM#3 R64 62
VCCP
PROCHOT# R96 62
VCCP
BPM#0 R46 62 CPU_GD R52 300
HBR#0 R91 220 Micro Star Restricted Secret
Title Rev

BPM#2
RN11 Intel mPGA478B - Signals 20A
1 2 VCCP
BPM#5 3 4 Document Number MS-6728
BPM#1 5 6
BPM#4 7 8 MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
8P4R-62 Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 4 of 33
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5 4 3 2 1

1.2V 150mA
VCC_VID
29 VCC_VID
C212 C32
CPU VOLTAGE BLOCK
105P 104P

VID Voltage is from 1.14V to 1.32V.


D It is derived from 3.3V. It support DC current if 100mA. D
It should be able to source 150mA. Near processor
It drives the power logic of BSEL[1:0] and VID[5:0].
VID to VIDGD delay time is from 1ms to 10ms.
VID to VIDGD deassertion time is 1ms for max. CPU_IOPLL L2 10uH-1206-100mA
VCCP VCCP
L3 10uH-1206-100mA

DC voltage drop should

AC10
AC12
AC14
AC16
AC18

AD11
AD13
AD15
AD17
AD19

AD20
AA10
AA12
AA14
AA16
AA18

AB11
AB13
AB15
AB17
AB19

AE10
AE12
AE14
AE16
AE18
AE20

AE23
AF11
AF13
AF15
AF17
AF19

AF21
be less than 70mV.

AC8

AD7
AD9
AA8

AB7
AB9

AE6
AE8

AF2

AF5
AF7
AF9

C10
C12
C14
C16
C18
C20

D11
D13
D15
D17
D19

AF4

AF3
A10
A12
A14
A16
A18
A20

B11
B13
B15
B17
B19

E10
E12
E14
E16
E18
E20

F11
F13
F15
F17
F19
C8

D7
D9
C33 C35 C37 C38

A8

B7
B9

E8

F9
CPU1B 105P 105P X_22u/1206 10U/1206

VCC-IOPLL
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC-VID

VCCA
VCC-VIDPRG
AD22 VSSA
VSSA
D10 VSS
A11 VSS
A13 VSS VSS Y5
A15 Y25 The ESL is less than 5nH, and the ESR is less than 0.3ohm.
VSS VSS
A17 VSS VSS Y22
A19 VSS VSS Y2
A21 VSS VSS W6
A24 VSS VSS W3
A26 VSS VSS W24
A3 VSS VSS W21
A9 VSS VSS V4
AA1 VSS VSS V26
AA11 V23 CPU2
VSS VSS
AA13 VSS VSS V1
AA15 VSS VSS U5
AA17 VSS VSS U25
C AA19 U22 C
VSS VSS
AA23 VSS VSS U2
AA26 VSS VSS T6
AA4 T3 _
VSS VSS
AA7 VSS VSS T24
AA9 VSS VSS T21
AB10 VSS VSS R4
AB12 VSS VSS R26
AB14 VSS VSS R23
AB16 VSS VSS R1
AB18 VSS VSS P5
AB20 VSS VSS P25
AB21 VSS VSS P22
AB24 VSS VSS P2
AB3 VSS VSS N6
AB6 VSS VSS N3
AB8 VSS VSS N24
AC11 VSS VSS N21
AC13 VSS VSS M5
AC15 VSS VSS M25
AC17 VSS VSS M22
AC19 VSS VSS M2
AC2 VSS VSS L4
AC22 VSS VSS L26
AC25 VSS VSS L23
AC5 VSS VSS L1
AC7 VSS VSS K6
AC9 VSS VSS K3
VSS K24
AD10VSS
AD12VSS
AD14VSS
AD16VSS
AD18VSS
AD21VSS
AD23VSS
AD4 VSS
AD8 VSS
AE11VSS
AE13VSS
AE15VSS
AE17VSS
AE19VSS
AE22VSS
AE24VSS
AE7 VSS
AE9 VSS
AF1 VSS
AF10 VSS
AF12 VSS
AF14 VSS
AF16 VSS
AF18 VSS
AF20 VSS
AF6 VSS
AF8 VSS
B10 VSS
B12 VSS
B14 VSS
B16 VSS
B18 VSS
B20 VSS
B23 VSS
B26 VSS
B4 VSS
B8 VSS
C11 VSS
C13 VSS
C15 VSS
C17 VSS
C19 VSS
C2 VSS
C22 VSS
C25 VSS
C5 VSS
C7 VSS
C9 VSS
D12 VSS
D14 VSS
D16 VSS
D18 VSS
D20 VSS
D21 VSS
D24 VSS
D3 VSS
D6 VSS
D8 VSS
E1 VSS
E11 VSS
E13 VSS
E15 VSS
E17 VSS
E19 VSS
E23 VSS
E26 VSS
E4 VSS
E7 VSS
E9 VSS
F10 VSS
F12 VSS
F14 VSS
F16 VSS
F18 VSS
F2 VSS
F22 VSS
F25 VSS
F5 VSS
F8 VSS
G21 VSS
G24 VSS
G3 VSS
G6 VSS
H1 VSS
H23 VSS
H26 VSS
H4 VSS
J2 VSS
J22 VSS
J25 VSS
J5 VSS
K21 VSS
B B

PGA-S478-GD10-F02
{Priority}

CPU DECOUPLING CAPACITORS

VCCP VCCP VCCP VCCP VCCP VCCP VCCP

C67 C54 C51 C26 C44 C66 + EC57


X_100U/1210 10U/1206 10U/1206 X_10U/1206 10U/1206 10U/1206 330u_2V(S/S)
C55 C52 C24 C20 C23
C56 10U/1206 10U/1206 10U/1206 10U/1206 10U/1206 + EC58
X_100U/1210 C65 C47 330u_2V(S/S)
10U/1206 10U/1206
C43 C25 C22
X_100U/1210 10U/1206 10U/1206
Place these caps within socket cavity C21 C19
A
C64 10U/1206 10U/1206 A
X_100U/1210

Place these caps within north side of processor Micro Star Restricted Secret
Title Rev
Intel mPGA478B - Power 20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 5 of 33
5 4 3 2 1
5 4 3 2 1

Clock Synthesizer

*Trace less 0.5" FS_A FS_B


FS_4 FS_3 FS_2 CPU
BSEL0 BSEL1
D 0 0 0 1 0 133.3 D
CP4 X U15
40 CPUCLK R238 33 CPU_CLK 0 0 0 1 1 166.7
CPU0 CPU_CLK 4
X_80-0805-3A VCC3V 41 39 CPUCLK# R239 33 CPU_CLK#
VCC3 CPU_VDD CPU0# CPU_CLK# 4
FB8 43 MCHCLK R236 33 MCH_CLK
CPU1 MCH_CLK 7
C188 42 MCHCLK# R237 33 MCH_CLK# CPU_CLK R222 49.9RST
CPU1# MCH_CLK# 7
C206 C438 104P 44 CPU_CLK# R223 49.9RST
X_104P CPU_GND MCH_CLK R220 49.9RST
X_22U/1206/X5R MCH_CLK# R221 49.9RST
35 SRC_VDD
37 SATA100 R240 33 SATA_100
SRC SATA_100 15
Use 2 VIA hole on BEAD both side C189 36 SATA100# R241 33 SATA_100#
SRC# SATA_100# 15
104P 38 ICHPCLK R294 1K SATA_100 R224 49.9RST
SRC_GND R228 33 SATA_100# R225 49.9RST
MCH_66 9
28 31 MCH66 R229 33 FWHPCLK R304 1K
3V66_VDD 3V66_0 ICH_66 15
30 ICH66
C192 3V66_1 R257 33 DOT48 R244 1K
3V66_2 27 AGP_CLK 12
104P 29 26 AGPCLK RN97 7 8 ICH_PCLK
3V66_GND 3V66_3/VCH ICH_PCLK 14
15 5 6 MS8_PCLK MCH66 C190 X_10P
MS8_PCLK 27
7 ICHPCLK 3 4 SIO_PCLK ICH66 C191 X_10P
**FS2/PCI_F0 SIO_PCLK 25
10 8 FWHPCLK 1 2 FWH_PCLK AGPCLK C196 X_10P
PCI_VDD **FS4/PCI_F1 FWH_PCLK 25
9 LANPCLK R296 33 LAN_PCLK
PCI_F2 LAN_PCLK 13
C194 12 1394PCLK R299 33 1394_PCLK DOT48 C210 X_10P
PCI0 1394_PCLK 21
104P 11 13 SATAPCLK R300 33 SATA_PCLK
PCI_GND PCI1 SATA_PCLK 19
14 PCICLK0 R301 33 PCI_CLK0 1394PCLK SIO48 C217 X_10P
PCI2 PCI_CLK0 16
15 PCICLK1 RN70 7 8 PCI_CLK1
PCI3 PCI_CLK1 16
17 16 PCICLK2 33 5 6 PCI_CLK2
PCI_VDD PCI4 PCI_CLK2 16
19 PCICLK3 3 4 PCI_CLK3 R306
PCI5 PCI_CLK3 17
C227 20 PCICLK4 1 2 PCI_CLK4 VCC3V EMC HF filter capacitors, located close to PLL
PCI6 PCI_CLK4 17
104P 18 21 R58 0 2.2K
PCI_GND TURBO# TUR# 25
R66 X_4.7K
C
VCC3 CN10 C
25 48_VDD **SEL24_48#/24_48 22
DOT48 R245 X_33 R309 R293 ICH_PCLK 7 8
DOT_48 9
C232 C46 1K 1K MS8_PCLK 5 6
104P 24 23 SIO48 R283 33 X_103P SIO_PCLK 3 4
48_GND **FS3/48M_0 SIO_48 25
R287 33 FWH_PCLK 1 2
USB_48 15
3 SEL0 SEL1
REF_VDD SEL0 R285 33 R292 10K R298 10K X_8P4C-10P
*FS_A/REF_0 1 ICH_14 15
C231 2 SEL1 R310 33
*FS_B/REF_1 AC_14 18 CN11
104P 6 REF_GND BSEL0 BSEL1 LAN_PCLK
4,27 BSEL0 BSEL1 4,27 7 8
CP3 X 1394_PCLK 5 6
4 C218 56P SATA_PCLK 3 4
FB7 X_80-0805-3A XIN Y1 PCI_CLK0
VCC3 48 VDDA *120k Pull-up 1 2
**120k Pull-down 14.318M
Use 2 VIA hole on BEAD both side C178 C177 5 C209 56P X_8P4C-10P
104P 103P XOUT
47 GND CG_PWRGD# R219 10K VCC3V CN9
VTT_PWRGD/PD# 34
PCI_CLK1 7 8
SMBDATA_ISO 33 45 R246 X_1K PCI_CLK2 5 6
SDATA RESET# VCC3
SMBCLK_ISO 32 PCI_CLK3 3 4
SCLK R256 475 PCI_CLK4
IREF 46 CLK_PD# 30 1 2

Iref = 2.32mA X_8P4C-10P


ICS952611

MS8_RST# 27

R386 X_0 CPU:


ICH_RST# 15
B
BSEL_CTRL1 BSEL_CTRL0 BSEL1 BSEL0 BUS CLOCK NB_BSEL1 NB_BSEL0 NB Side--CPU:DDR DDR CLOCK B

Reserved to SB ICH_RST and FR_Panel 0 0 100 MHz 1 1 (200 MHz)


0 1 133 MHz 1 0 (Reserved)
modify, 0805/2003
0 0 200 MHz (133 MHz)
1 0 0 1
1 1 Reserved 0 0 (100 MHz) 1:1.33
0 0 100 MHz 1 0 (200 MHz)
0 1 133 MHz 1 1 (Reserved)
0 1 200 MHz (100 MHz) 1:1.33 533MHz (266MHz)
1 0 0 0
1 1 Reserved 0 1 (133 MHz)
0 0 100 MHz 0 1 (133 MHz)
0 1 133 MHz 0 0 (100 MHz) 1:1.33 355MHz (177MHz)
SMBCLK R521 0 SMBCLK_ISO
1 0 200 MHz (Reserved)
SMBDATA R522 0 SMBDATA_ISO
1 0
SMBus Isolation Reserved (200 MHz)
1 1 1 0
0 0 100 MHz 0 0 (100 MHz)
SMBCLK 133 MHz (133 MHz)
+12V SMBCLK 13,15,16 0 1 0 1
R282 X_4.7K Q32 X_NDS7002AS
1 1 200 MHz (200 MHz)
1 0 1 0
A A
SMBCLK_ISO Reserved (Reserved)
R291
SMBCLK_ISO 10,11,29 1 1 1 1
X_1K SMBDATA
SMBDATA 13,15,16
R290 X_4.7K Q31 X_NDS7002AS
Micro Star Restricted Secret
29 PWROK_SMB
Title Rev
VCC3
SMBDATA_ISO
SMBDATA_ISO 10,11,29
SMBCLK_ISO R243 2.7K
Clock Synthesizer 20A
C229
X_104P VCC3
SMBDATA_ISO R242 2.7K Document Number MS-6728
SMBCLK_ISO R278 2.7K MICRO-STAR INT'L Last Revision Date:
SMBDATA_ISO R271 2.7K CLOSE TO CLOCK GEN CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 6 of 33
5 4 3 2 1
5 4 3 2 1

VCC_AGP
VCCA_FSB
VTT VTT_FSB1 C111 0.47u
C97 104P
VTT_FSB2 C103 0.47u

AR33
AR35
AF13
AF23
AJ12
W16
W19
W20
M10
M11

M31

AN1

AR3
AP2
N10
N11

R11

U16
U17
U20

C23
C35

R25
A31

P10
P11

V16
V18
V20

Y16
Y17
Y18
Y19
Y20

A33
A35

B25
B34

E26

A11
A13
A16
A20
A23
A25
A27
A29
A32

A15
A21
T16
T17
T18
T19
T20
L10
L11
M8
M9

N9

C1

C4

D5
D6
D7

C5
C6
B4

K6
K7
K8
K9

A3

B2

A7
A9

E6
E7

A4
A5
A6
B5
B6
F7
L6
L7
L9
J6
J7
J8
J9
U13A
HA#3 D26 B23 HD#0

VCCA_FSB
VCCA_FSB

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

VTT_FSB
VTT_FSB
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
4 HA#[3..31] HA3# HD0# HD#[0..63] 4
HA#4 D30 E22 HD#1
HA#5 HA4# HD1# HD#2
L23 HA5# HD2# B21
HA#6 E29 D20 HD#3
HA#7 HA6# HD3# HD#4
D B32 HA7# HD4# B22 D
HA#8 K23 D22 HD#5
HA#9 HA8# HD5# HD#6
C30 HA9# HD6# B20
HA#10 C31 C21 HD#7
HA#11 HA10# HD7# HD#8
J25 HA11# HD8# E18
HA#12 B31 E20 HD#9
HA#13 HA12# HD9# HD#10
E30 HA13# HD10# B16
HA#14 B33 D16 HD#11
HA#15 HA14# HD11# HD#12
J24 HA15# HD12# B18
HA#16 F25 B17 HD#13
HA#17 HA16# HD13# HD#14
D34 HA17# HD14# E16
HA#18 C32 D18 HD#15
HA#19 HA18# HD15# HD#16
F28 HA19# HD16# G20
HA#20 C34 F17 HD#17
HA#21 HA20# HD17# HD#18
J27 HA21# HD18# E19
HA#22 G27 F19 HD#19
HA#23 HA22# HD19# HD#20
F29 HA23# HD20# J17
HA#24 E28 L18 HD#21
HA#25 HA24# HD21# HD#22
H27 HA25# HD22# G16
HA#26 K24 G18 HD#23
HA#27 HA26# HD23# HD#24
E32 HA27# HD24# F21
HA#28 F31 F15 HD#25
HA#29 HA28# HD25# HD#26
G30 HA29# HD26# E15
HA#30 J26 E21 HD#27
HA#31 HA30# HD27# HD#28
G26 HA31# HD28# J19
G14 HD#29
HD29# HD#30
HD30# E17
B30 K17 HD#31
4 HADSTB#0 HAD_STB0# HD31#
D28 J15 HD#32
4 HADSTB#1 HAD_STB1# HD32#
L16 HD#33
HD33# HD#34
4 HBR#0 B24 BREQ0# HD34# J13
C B26 F13 HD#35 C
4 HBPRI# BPRI# HD35#
F11 HD#36
HD36# HD#37
4 HBNR# B28 BNR# HD37# E13
K15 HD#38
HD38# HD#39
4 HLOCK# E25 HLOCK# HD39# G12
G10 HD#40
HD40# HD#41
4 HADS# F27 ADS# HD41# L15
E11 HD#42
HREQ#0 HD42# HD#43
4 HREQ#[0..4] B29 HREQ0# HD43# K13
HREQ#1 J23 J11 HD#44
HREQ#2 HREQ1# HD44# HD#45
L22 HREQ2# HD45# H10
HREQ#3 C29 G8 HD#46
HREQ#4 HREQ3# HD46# HD#47
J21 HREQ4# HD47# E9
B13 HD#48
HD48# HD#49
4 HIT# K21 HIT# HD49# E14
E23 B14 HD#50
4 HITM# HITM# HD50#
L21 B12 HD#51
4 HDEFER# DEFER# HD51#
B15 HD#52
HD52# HD#53
4 HTRDY# D24 HTRDY# HD53# D14
E27 C13 HD#54
4 HDBSY# DBSY# HD54#
G24 B11 HD#55
4 HDRDY# DRDY# HD55#
D10 HD#56
HRS#0 HD56# HD#57
4 HRS#[0..2] G22 RS0# HD57# C11
HRS#1 C27 E10 HD#58
HRS#2 RS1# HD58# HD#59
B27 RS2# HD59# B10
C9 HD#60
HD60# HD#61
6 MCH_CLK B7 HCLKP HD61# B9
C7 D8 HD#62
6 MCH_CLK# HCLKN HD62#
B8 HD#63
MS7_POK AE14 HD63#
PWROK HDBI#0
4 CPURST# E8 CPURST# DINV_0# C17 HDBI#[0..3] 4
B HDBI#1 B
DINV_1# L17
AK4 L14 HDBI#2
29 NB_PCIRST# RSTIN# DINV_2#
AJ8 C15 HDBI#3
ICH_SYNC# ICH_SYNC# DINV_3#

4 PROCHOT# L20 PROCHOT# HD_STBP0# B19 HDSTBP#0 4


HD_STBN0# C19 HDSTBN#0 4

27 BSEL0_SPG L13 BSEL0 HD_STBP1# L19 HDSTBP#1 4


27 BSEL1_SPG L12 BSEL1 HD_STBN1# K19 HDSTBN#1 4
R113 20RST HRCOMP E24 G9
HDRCOMP HD_STBP2# HDSTBP#2 4
HD_STBN2# F9 HDSTBN#2 4
HSWING C25 HDSWING
D12 HDSTBP#3 4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
HD_STBP3#
4 GTLREF F23 HDVREF HD_STBN3# E12 HDSTBN#3 4

M26
M27
M28
M30
M33
G28
G31
G35
C10
C12
C14
C16
C18
C20
C22
C24
C26
C28

D11
D13
D15
D17
D19
D21
D23
D25
D27
D29
D31
D33
D35

H12
H14
H16
H18
H20
H22
H24
H26
H30
H33

K11
K12
K14
K16
K18
K20
K22
K25
K27
K29
K33
C100 Intel Springdale-N
F10
F12
F14
F16
F18
F20
F22
F24
F26

L24
L25
L26
L31
L35
J10
J12
J14
J16
J18
J20
J22
J28
J32
J35

M3
M6
C8

D1
D9

H2
H5
H8
H9

N1
N4
E1
E3
F1
F3
F5
F8

220p_X7R {Priority}

VCC3

I=30mA ICH_SYNC# MS5_POK ICH_PWROK

VTT VCCA_FSB L8 0.82uH-30mA FSB R183 0 0 1 0 R249 R251


VCC_AGP
+

C132 0 0 0
EC24 1 0 0 X_220 X_1K
104P 100u 1 1 1
A
Q29 X_2N3904S A
C126 R158 ICH_SYNC#
ICH_PWROK 15,29
X_0.01u_X7R 301RST
HSWING 1/4*Vccp MS7_POK
15,29 MS7_POK
C127 R152 VCC3
0.01u 100RST Q30 X_2N3904S
Micro Star Restricted Secret
R250 X_220 Title Rev

R231 X_0
Intel Springdale - CPU 20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 7 of 33
5 4 3 2 1
5 4 3 2 1

10 MDQ_A[0..63] MCKE_A[0..3] 10
VCCA_DDR

AN19 MCKE_A1
AM20 MCKE_A2
AP20 MCKE_A3
MDQ_A10
MDQ_A11
MDQ_A12
MDQ_A13
MDQ_A14
MDQ_A15
MDQ_A16
MDQ_A17
MDQ_A18
MDQ_A19
MDQ_A20
MDQ_A21
MDQ_A22
MDQ_A23
MDQ_A24
MDQ_A25
MDQ_A26
MDQ_A27
MDQ_A28
MDQ_A29
MDQ_A30
MDQ_A31
MDQ_A32
MDQ_A33
MDQ_A34
MDQ_A35
MDQ_A36
MDQ_A37
MDQ_A38
MDQ_A39
MDQ_A40
MDQ_A41
MDQ_A42
MDQ_A43
MDQ_A44
MDQ_A45
MDQ_A46
MDQ_A47
MDQ_A48
MDQ_A49
MDQ_A50
MDQ_A51
MDQ_A52
MDQ_A53
MDQ_A54
MDQ_A55
MDQ_A56
MDQ_A57
MDQ_A58
MDQ_A59
MDQ_A60
MDQ_A61
MDQ_A62
MDQ_A63

AL20 MCKE_A0
C120 104P Its current is 5.1A.

MDQ_A0
MDQ_A1
MDQ_A2
MDQ_A3
MDQ_A4
MDQ_A5
MDQ_A6
MDQ_A7
MDQ_A8
MDQ_A9
VCC_DDR

AM12

AM10

AM14

AM18

AM22

AM33
AM28

AM31

AG34

AG33
AN13

AN15

AN27

AN29

AN34
AH32

AD32
AH31

AD34
AC34

AD31

AC25
AC26
AP10
AP11

AP13
AP14

AP19

AP18

AP22

AP21

AP25
AP27
AP28
AP29
AP33

AE34

AB31

AB32

AB25
AF32
AL10
AL12

AL18

AL14

AL24

AL22

AL35

AM3

AM5
AM6
AM7
AM8
AN4

AN5

AN2
AN6
AN7
G34
U34
U33

H34

N32
N35
V32
V31

K34
K32

P34

E33

K31
T34
T32

T31

F33

F34
L34
L33
J33

J34

P3
P6
P8
U13B
D AA34 U26 D

SDQ_A0
SDQ_A1
SDQ_A2
SDQ_A3
SDQ_A4
SDQ_A5
SDQ_A6
SDQ_A7
SDQ_A8
SDQ_A9
SDQ_A10
SDQ_A11
SDQ_A12
SDQ_A13
SDQ_A14
SDQ_A15
SDQ_A16
SDQ_A17
SDQ_A18
SDQ_A19
SDQ_A20
SDQ_A21
SDQ_A22
SDQ_A23
SDQ_A24
SDQ_A25
SDQ_A26
SDQ_A27
SDQ_A28
SDQ_A29
SDQ_A30
SDQ_A31
SDQ_A32
SDQ_A33
SDQ_A34
SDQ_A35
SDQ_A36
SDQ_A37
SDQ_A38
SDQ_A39
SDQ_A40
SDQ_A41
SDQ_A42
SDQ_A43
SDQ_A44
SDQ_A45
SDQ_A46
SDQ_A47
SDQ_A48
SDQ_A49
SDQ_A50
SDQ_A51
SDQ_A52
SDQ_A53
SDQ_A54
SDQ_A55
SDQ_A56
SDQ_A57
SDQ_A58
SDQ_A59
SDQ_A60
SDQ_A61
SDQ_A62
SDQ_A63

SCKE_A0
SCKE_A1
SCKE_A2
SCKE_A3

VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR

VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR

VSS
VSS
VSS
VSS
VSS
10 MCS_A#0 SCS_A0# SCS_B0# MCS_B#0 11
10 MCS_A#1 Y31 SCS_A1# SCS_B1# T29 MCS_B#1 11
10 MCS_A#2 Y32 SCS_A2# SCS_B2# V25 MCS_B#2 11
10 MCS_A#3 W34 SCS_A3# SCS_B3# W25 MCS_B#3 11

10 MRAS_A# AC33 SRAS_A# SRAS_B# W26 MRAS_B# 11


10 MCAS_A# Y34 SCAS_A# SCAS_B# W31 MCAS_B# 11

10 MWE_A# AB34 SWE_A# SWE_B# W27 MWE_B# 11


AG31 MA_B0
SMAA_B0 MA_B[0..12] 11
MA_A0 AJ34 AJ31 MA_B1
10 MA_A[0..12] SMAA_A0 SMAA_B1
MA_A1 AL33 AD27 MA_B2
MA_A2 SMAA_A1 SMAA_B2 MA_B3
AK29 SMAA_A2 SMAA_B3 AE24
MA_A3 AN31 AK27 MA_B4
MA_A4 SMAA_A3 SMAA_B4 MA_B5
AL30 SMAA_A4 SMAA_B5 AG25
MA_A5 AL26 AL25 MA_B6
MA_A6 SMAA_A5 SMAA_B6 MA_B7
AL28 SMAA_A6 SMAA_B7 AF21
MA_A7 AN25 AL23 MA_B8
MA_A8 SMAA_A7 SMAA_B8 MA_B9
AP26 SMAA_A8 SMAA_B9 AJ22
MA_A9 AP24 AF29 MA_B10
MA_A10 SMAA_A9 SMAA_B10 MA_B11
AJ33 SMAA_A10 SMAA_B11 AL21
MA_A11 AN23 AJ20 MA_B12
MA_A12 SMAA_A11 SMAA_B12
AN21 SMAA_A12
AE27 MAB_B1
SMAB_B1 MAB_B[1..5] 11
MAB_A1 AL34 AD26 MAB_B2
10 MAB_A[1..5] SMAB_A1 SMAB_B2
MAB_A2 AM34 AL29 MAB_B3
MAB_A3 SMAB_A2 SMAB_B3 MAB_B4
AP32 SMAB_A3 SMAB_B4 AL27
MAB_A4 AP31 AE23 MAB_B5
MAB_A5 SMAB_A4 SMAB_B5
AM26 SMAB_A5
SBA_B0 Y25 MBA_B0 11
C AE33 AA25 C
10 MBA_A0 SBA_A0 SBA_B1 MBA_B1 11
10 MBA_A1 AH34 SBA_A1
AG11 MDQM_B0
SDM_B0 MDQM_B[0..7] 11
MDQM_A0 AP12 AG15 MDQM_B1
10 MDQM_A[0..7] MDQM_A1 SDM_A0 SDM_B1 MDQM_B2
AP16 SDM_A1 SDM_B2 AE21
MDQM_A2 AM24 AJ28 MDQM_B3
MDQM_A3 SDM_A2 SDM_B3 MDQM_B4
AP30 SDM_A3 SDM_B4 AC31
MDQM_A4 AF31 U31 MDQM_B5
MDQM_A5 SDM_A4 SDM_B5 MDQM_B6
W33 SDM_A5 SDM_B6 M29
MDQM_A6 M34 J31 MDQM_B7
MDQM_A7 SDM_A6 SDM_B7
H32 SDM_A7
AF15 MDQS_B0
SDQS_B0 MDQS_B[0..7] 11
MDQS_A0 AN11 AG13 MDQS_B1
10 MDQS_A[0..7] MDQS_A1 SDQS_A0 SDQS_B1 MDQS_B2
AP15 SDQS_A1 SDQS_B2 AG21
MDQS_A2 AP23 AH27 MDQS_B3
MDQS_A3 SDQS_A2 SDQS_B3 MDQS_B4
AM30 SDQS_A3 SDQS_B4 AD29
MDQS_A4 AF34 U30 MDQS_B5
MDQS_A5 SDQS_A4 SDQS_B5 MDQS_B6
V34 SDQS_A5 SDQS_B6 L27
MDQS_A6 M32 J30 MDQS_B7
MDQS_A7 SDQS_A6 SDQS_B7
H31 SDQS_A7

SCMDCLK_B0 AG29 MCLK_B0 11


10 MCLK_A0 AK32 SMDCLK_A0 SCMDCLK_B0# AG30 MCLK_B#0 11
10 MCLK_A#0 AK31 SMDCLK_A0#
SCMDCLK_B1 AF17 MCLK_B1 11
10 MCLK_A1 AP17 SMDCLK_A1 SCMDCLK_B1# AG17 MCLK_B#1 11
10 MCLK_A#1 AN17 SMDCLK_A1#
SCMDCLK_B2 N27 MCLK_B2 11
10 MCLK_A2 N33 SMDCLK_A2 SCMDCLK_B2# N26 MCLK_B#2 11
10 MCLK_A#2 N34 SMDCLK_A2#
B B
SCMDCLK_B3 AJ30 MCLK_B3 11
10 MCLK_A3 AK33 SMDCLK_A3 SCMDCLK_B3# AH29 MCLK_B#3 11
10 MCLK_A#3 AK34 SMDCLK_A3#
SCMDCLK_B4 AK15 MCLK_B4 11
10 MCLK_A4 AM16 SMDCLK_A4 SCMDCLK_B4# AL15 MCLK_B#4 11
10 MCLK_A#4 AL16 SMDCLK_A4#
SCMDCLK_B5 N31 MCLK_B5 11
10 MCLK_A5 P31 SMDCLK_A5 SCMDCLK_B5# N30 MCLK_B#5 11
10 MCLK_A#5 P32 SMDCLK_A5#
AA33 YRCOMP C106 103P
SMYRCOMP
C160 103P XRCOMP AK9 R34 YCOMPH C101 103P
SMXRCOMP SMYCOMPVOH YCOMPL C92 103P
SMYCOMPVOL R33
C155 103P XCOMPH AN9 SMXCOMPVOH
E35 VCC_DDR
R35 VCC_DDR
AA35VCC_DDR
AR21VCC_DDR
AR15VCC_DDR
AL6 VCC_DDR
AL7 VCC_DDR
AM1 VCC_DDR
AM2 VCC_DDR
AN8 VCC_DDR
AP3 VCC_DDR
AP4 VCC_DDR
AP5 VCC_DDR
AP6 VCC_DDR
AP7 VCC_DDR
AR4 VCC_DDR
AR5 VCC_DDR
AR7 VCC_DDR
AR31VCC_DDR

C157 103P XCOMPL AL9 AP9 C156 104P


AK17SDQ_B10
AL17 SDQ_B11
AK13SDQ_B12
AJ14 SDQ_B13
AJ16 SDQ_B14
AJ18 SDQ_B15
AE19SDQ_B16
AE20SDQ_B17
AG23SDQ_B18
AK23SDQ_B19
AL19 SDQ_B20
AK21SDQ_B21
AJ24 SDQ_B22
AE22SDQ_B23
AK25SDQ_B24
AH26SDQ_B25
AG27SDQ_B26
AF27 SDQ_B27
AJ26 SDQ_B28
AJ27 SDQ_B29
AD25SDQ_B30
AF28 SDQ_B31
AE30SDQ_B32
AC27SDQ_B33
AC30SDQ_B34
Y29 SDQ_B35
AE31SDQ_B36
AB29SDQ_B37
AA26SDQ_B38
AA27SDQ_B39
AA30SDQ_B40
W30 SDQ_B41
U27 SDQ_B42
T25 SDQ_B43
AA31SDQ_B44
V29 SDQ_B45
U25 SDQ_B46
R27 SDQ_B47
P29 SDQ_B48
R30 SDQ_B49
K28 SDQ_B50
L30 SDQ_B51
R31 SDQ_B52
R26 SDQ_B53
P25 SDQ_B54
L32 SDQ_B55
K30 SDQ_B56
H29 SDQ_B57
F32 SDQ_B58
G33 SDQ_B59
N25 SDQ_B60
M25 SDQ_B61
J29 SDQ_B62
G32 SDQ_B63

AK19SCKE_B0
AF19 SCKE_B1
AG19SCKE_B2
AE18SCKE_B3
SMXCOMPVOL SMVREF_B
AJ10 SDQ_B0
AE15SDQ_B1
AL11 SDQ_B2
AE16SDQ_B3
AL8 SDQ_B4
AF12 SDQ_B5
AK11SDQ_B6
AG12SDQ_B7
AE17SDQ_B8
AL13 SDQ_B9

C84 104P XVREF E34 SMVREF_A


C94 105P
Intel Springdale-N
{Priority}
C215 X_105P
MDQ_B10
MDQ_B11
MDQ_B12
MDQ_B13
MDQ_B14
MDQ_B15
MDQ_B16
MDQ_B17
MDQ_B18
MDQ_B19
MDQ_B20
MDQ_B21
MDQ_B22
MDQ_B23
MDQ_B24
MDQ_B25
MDQ_B26
MDQ_B27
MDQ_B28
MDQ_B29
MDQ_B30
MDQ_B31
MDQ_B32
MDQ_B33
MDQ_B34
MDQ_B35
MDQ_B36
MDQ_B37
MDQ_B38
MDQ_B39
MDQ_B40
MDQ_B41
MDQ_B42
MDQ_B43
MDQ_B44
MDQ_B45
MDQ_B46
MDQ_B47
MDQ_B48
MDQ_B49
MDQ_B50
MDQ_B51
MDQ_B52
MDQ_B53
MDQ_B54
MDQ_B55
MDQ_B56
MDQ_B57
MDQ_B58
MDQ_B59
MDQ_B60
MDQ_B61
MDQ_B62
MDQ_B63

MCKE_B0
MCKE_B1
MCKE_B2
MCKE_B3
C88 474P
MDQ_B0
MDQ_B1
MDQ_B2
MDQ_B3
MDQ_B4
MDQ_B5
MDQ_B6
MDQ_B7
MDQ_B8
MDQ_B9

YVREF R232 150RST


VCC_DDR
C83 224P VCC_DDR_C2 R218 150RST
VCC_DDR C163 105P
VCC_DDR_C3
11 MDQ_B[0..63] MCKE_B[0..3] 11
C144 224P

A
C150 104P A

values still need verification


C185 X_105P C41 X_105P L12
XRCOMP R230 42.2RST XCOMPL R226 31.6KST YCOMPL R106 31.6KST VCC_DDR_C2 0 Micro Star Restricted Secret
VCC_DDR VCC_DDR
R217 42.2RST R213 10.2KST R102 10.2KST VCCA_DDR VCCA_DDR
VCC_AGP
R33 Title Rev
+

C184 105P
R35
C146 EC27
{Prority} Intel Springdale - Memory 20A
YRCOMP R132 42.2RST VCC_DDR_C3 XCOMPH R227 10.2KST
VCC_DDR
YCOMPH R112 10.2KST 104P 100u C427 C429 Document Number MS-6728
R115 42.2RST R215 31.6KST R109 31.6KST X_1U/0805/B X_102P/B
AA33 AA35 R34 MICRO-STAR INT'L Last Revision Date:
C158 103P C98 103P CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 8 of 33
5 4 3 2 1
5 4 3 2 1

C152 104P VCC_AGP

C149 104P

VCC_AGP VCC_AGP
C225 C428 C430
104P X_1U/0805/B X_102P/B

AC32
AC35

AD10
AA32

AB10
AB26
AB27
AB28
AB30
AB33
W17
W18
W32

AG1
AC1
AC4

AD3
AD6
AD8
AD9
AA1
AA4

AB3
AB6
AB8
AB9
R32

U18
U19
U32
P26
P27
P28
P30
P33

V10
V17
V19
V26
V27
V28
V30
V33

Y10
Y26
Y27
Y28
Y30
Y33
Y35

Y11
T10
T26
T27
T28
T30
T33
T35

W4
R1
R4

U4
P9

V3
V6
V8
V9

Y3
Y6
Y8
Y9

Y1

K2
K3
K4
K5
T1
T3
T6
T8
T9

L1
L5

L4
L2
L3
J1
J2
J3

J4
J5
U13C
GAD0 AE6

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP

VCCA_AGP
VCCA_AGP
12 GAD[0..31] GAD0/DVOB_HSYNC
GAD1 AC11 AF5 HL0
GAD1/DVOB_VSYNC HI0 HL[0..10] 15
GAD2 AD5 AG3 HL1 C431 C426
GAD3 GAD2/DVOB_D1 HI1 HL2 X_1U/0805/B X_102P/B
D AE5 GAD3/DVOB_D0 HI2 AK2 D
GAD4 AA10 AG5 HL3
GAD5 GAD4/DVOB_D3 HI3 HL4
AC9 GAD5/DVOB_D2 HI4 AK5
GAD6 AB11 AL3 HL5
GAD7 GAD6/DVOB_D5 HI5 HL6
AB7 GAD7/DVOB_D4 HI6 AL2
GAD8 AA9 AL4 HL7
GAD9 GAD8/DVOB_D6 HI7 HL8
AA6 GAD9/DVOB_D9 HI8 AJ2
GAD10 AA5 AH2 HL9 HI_RCOMP Calculation
GAD11 GAD10/DVOB_D8 HI9 HL10 R=[(1.5V-08V)/0.8V]*60ohm=52.5ohm
W10 GAD11/DVOB_D11 HI10 AJ3
GAD12 AA11
GAD13 GAD12/DVOB_D10
W6 GAD13/DVOBC_CLKINT HI_STRF AH5 HL_STRF 15
GAD14 W9 AH4
GAD14/DVOB_FLDSTL HI_STRS HL_STRS 15
GAD15 V7
GAD16 GAD15/MDDC_DATA HL_COMP R209 52.3RST
AA2 GAD16/DVOC_VSYNC HI_RCOMP AD4 VCC_AGP
GAD17 Y4 AE3 HL_SWING C159 103P
GAD18 GAD17/DVOC_HSYNC HI_SWING
Y2 GAD18/DVOC_BLANK#
GAD19 W2 AE2 HL_VREF C180 103P
GAD20 GAD19/DVOC_D0 HI_VREF
Y5 GAD20/DVOC_D1
GAD21 V2 AK7
GAD22 GAD21/DVOC_D2 CI0
W3 GAD22/DVOC_D3 CI1 AH7
GAD23 U3 AD11
GAD24 GAD23/DVOC_D4 CI2
T2 GAD24/DVOC_D7 CI3 AF7
GAD25 T4 AD7
GAD26 GAD25/DVOC_D6 CI4
T5 GAD26/DVOC_D9 CI5 AC10
GAD27 R2 AF8
GAD28 GAD27/DVOC_D8 CI6
P2 GAD28/DVOC_D11 CI7 AG7
GAD29 P5 AE9
GAD30 GAD29/DVOC_D10 CI8
P4 GAD30/DVOBC_INTR# CI9 AH9
GAD31 M2 AG6
GAD31/DVOC_FLDSTL CI10
GC_BE#0 Y7 AJ6
12 GC_BE#[0..3] GCBE0/DVOB_D7 CISTRF
C GC_BE#1 W5 AJ5 C
GC_BE#2 AA3 GCBE1/DVOB_BLANK# CISTRS
GC_BE#3 U2 GCBE2
GCBE3/DVOC_D5 CI_RCOMP AG2 CI_RCOMP R216 52.3RST
VCC_AGP
CI_SWING AF2
AC6 CI_SWING C161 103P
12 AD_STB0 GADSTBF0/DVOB_CLK
AC5 AF4 CI_VREF C165 103P
12 AD_STB#0 GADSTBS0/DVOB_CLK# CI_VREF
V4 DOT_48
12 AD_STB1 GADSTBF1/DVOC_CLK
V5 G4 DOT_48 for springdale PE
12 AD_STB#1 GADSTBS1/DVOC_CLK# DREFCLK DOT_48 6
N6 F2 R190
12 GREQ# GREQ DDCA_CLK 3VDDCCL 22
M7 H3 0
12 GGNT# GGNT DDCA_DATA 3VDDCDA 22
ST0 N3 E2
12 ST[0..2] GST0 VSYNC CRT_VSYNC 22
ST1 N5 G3
GST1 HSYNC CRT_HSYNC 22
ST2 N2 GST2
BLUE H7 CRT_B 22
RBF# R10 G6
12 RBF# GRBF BLUE#
WBF# R9
12 WBF# GWBF
GREEN H6 CRT_G 22
12 GFRAME# U6 GFRAME/MDVI_DATA GREEN# G5
12 GIRDY# V11 GIRDY/MI2CCLK
12 GTRDY# AB5 GTRDY/MDVI_CLK RED F4 CRT_R 22
12 GDEVSEL# AB4 GDEVSEL/MI2CDATA RED# E4
12 GSTOP# W11 GSTOP/MDDC_CLK
D2 GSET R185 137 for springdale G
REFSET
12 GPAR AB2 GPAR/ADD_DETECT
G1 R181 X_0 install R576,577
VCC_DAC VCC3
H4 G2 R173 X_0
6 MCH_66 GCLKIN VCC_DAC C182
SBA0 R6 B3 VCCA_DPLL X_0.01u
B 12 SBA[0..7] GSBA0#/ADD_ID0 VCCA_DPLL B
SBA1 P7
SBA2 GSBA1#/ADD_ID1 VCCA_DAC L11 X_100nR202 X_0
R3 GSBA2#/ADD_ID2 VCCA_DAC C2 VCC_DAC

+
SBA3 R5
SBA4 GSBA3#/ADD_ID3 C137 EC26
U9 GSBA4#/ADD_ID4 1.7V/60mA
SBA5 U10 D3 0 X_470u
SBA6 GSBA5#/ADD_ID5 VSSA_DAC
U5 GSBA6#/ADD_ID6
SBA7 T7 GSBA7#/ADD_ID7
EXTTS# AP8
12 SB_STB U11 GSBSTBF C128,131 change to 0 ohm for springdale PE
12 SB_STB# T11 GSBSTBS RESERVED AG9
RESERVED AG10
M4 AN35 I=35mA ESR is 0.1mohm to GMCH
12 PIPE# DBI_HI RESERVED
M5 AP34 L10 R192
12 DBI_LO DBI_LO RESERVED
AR1 VCCA_DPLL DPLL
RESERVED VCC_AGP

+
R207 43.2RST GRCOMP AC2 X_100nH
VCC_AGP GRCOMP/DVOBC_RCOMP
C171 103P GSWING AC3 AR25 C136 X_1
GVSWING VSS 0 EC25
12 GSWING VSS AR27
AD2 AR29 X_100u
AD30VSS
AD33VSS
AD28VSS
AE1 VSS
AE4 VSS
AE10VSS
AE11VSS
AE12VSS
AE13VSS
AE25VSS
AE26VSS
AE32VSS
AE35VSS
AF3 VSS
AF6 VSS
AF9 VSS
AF11 VSS
AF14 VSS
AF16 VSS
AF18 VSS
AF20 VSS
AF22 VSS
AF24 VSS
AF25 VSS
AF30 VSS
AF33 VSS
AG4 VSS
AG8 VSS
AG14VSS
AG16VSS
AG18VSS
AG20VSS
AG22VSS
AG24VSS
AG26VSS
AG28VSS
AG32VSS
AG35VSS
AH3 VSS
AH6 VSS
AH10VSS
AH12VSS
AH14VSS
AH16VSS
AH18VSS
AH20VSS
AH22VSS
AH24VSS
AH30VSS
AH33VSS
AJ1 VSS
AJ4 VSS
AJ9 VSS
AJ32 VSS
AJ35 VSS
AK3 VSS
AK8 VSS
AK10VSS
AK12VSS
AK14VSS
AK16VSS
AK18VSS
AK20VSS
AK22VSS
AK24VSS
AK26VSS
AK28VSS
AL1 VSS
AL32 VSS
AM9 VSS
AM11VSS
AM13VSS
AM15VSS
AM17VSS
AM19VSS
AM21VSS
AM23VSS
AM25VSS
AM27VSS
AM29VSS
AM35VSS
AN10VSS
AN12VSS
AN14VSS
AN16VSS
AN18VSS
AN20VSS
AN22VSS
AN24VSS
AN26VSS
AN28VSS
AN30VSS
AN32VSS
AR9 VSS
AR11VSS
AR13VSS
AR16VSS
AR20VSS
AR23VSS
C172 103P GVREF VSS
VSS AR32
12 AGP_REF
Intel Springdale-N
{Priority}

800mV
R233 226 CI_SWING
VCC_AGP
R248 147
VCC_AGP C432
350mV
VCC_AGP C143 CI_VREF
R234 113
A
10U/1206 Springdale Decoupling Capacitors A

X_104P
H_SWING=(0.8*VCC_AGP)+-2% Close GMCH AGP power plane
All caps trace length is less than 100mils.
HL_SWING 800mV Micro Star Restricted Secret
R327 226RST VCCP VCCP VCC_AGP VCC_DDR VCC_DDR VCC_DDR VCC_DDR VTT
VCC_AGP HL_SWING 15
R325 147RST C246 104P Title Rev

HL_VREF 350mV
C42
X_104P
C81
X_105P/0805
C222
104P
C204
X_104P
C164
104P
C153
X_104P
C179
X_104P
C118
104P
Intel Springdale - AGP & LAN 20A
HL_VREF 15
C82 C28 C223 C145 C102 C34 C151 C121 Document Number MS-6728
R328 113RST C247 104P X_104P X_105P/0805 X_104P X_104P 104P X_104P X_104P 104P
MICRO-STAR INT'L Last Revision Date:
Close CPU side of GMCH Close AG1 and Y1 of GMCH Close E35, R35, AA35, AL35, AR31, AR21 and AR15 of GMCH CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
H_SWING=(0.233*VCC_AGP)+-2% Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 9 of 33
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DDR DIMM1 DDR DIMM2 DDR Terminational Resisitors


VTT_DDR VTT_DDR
DIMM1 DIMM2
MA_A0 48 SIGNALS 2 MDQ_A0 MA_A0 48 SIGNALS 2 MDQ_A0 MDQS_A7 1 2 MDQ_A9 1 2
8 MA_A[0..12] A0 DQ0 MDQ_A[0..63] 8 A0 DQ0
MA_A1 43 4 MDQ_A1 MAB_A1 43 4 MDQ_A1 MDQM_A7 3 4 RN5 MDQ_A8 3 4 RN64
A1 DQ1 8 MAB_A[1..5] A1 DQ1
MA_A2 41 6 MDQ_A2 MAB_A2 41 6 MDQ_A2 MDQ_A57 5 6 56 MDQ_A3 5 6 56
MA_A3 A2 DQ2 MDQ_A3 MAB_A3 A2 DQ2 MDQ_A3 MDQ_A56 MDQ_A7
130 A3 DQ3 8 130 A3 DQ3 8 7 8 7 8
MA_A4 37 94 MDQ_A4 MAB_A4 37 94 MDQ_A4 MDQ_A37 1 2 MDQ_A6 1 2
MA_A5 A4 DQ4 MDQ_A5 MAB_A5 A4 DQ4 MDQ_A5 MDQ_A33 RN34 MDQ_A2 RN66
32 A5 DQ5 95 32 A5 DQ5 95 3 4 3 4
D MA_A6 125 98 MDQ_A6 MA_A6 125 98 MDQ_A6 MDQ_A36 5 6 56 MDQM_A0 5 6 56 D
MA_A7 A6 DQ6 MDQ_A7 MA_A7 A6 DQ6 MDQ_A7 MDQ_A32 MDQS_A0
29 A7 DQ7 99 29 A7 DQ7 99 7 8 7 8
MA_A8 122 12 MDQ_A8 MA_A8 122 12 MDQ_A8 MDQ_A53 1 2 MDQM_A1 1 2
MA_A9 A8 DQ8 MDQ_A9 MA_A9 A8 DQ8 MDQ_A9 MDQ_A52 RN19 MDQ_A13 RN62
27 A9 DQ9 13 27 A9 DQ9 13 3 4 3 4
MA_A10 141 19 MDQ_A10 MA_A10 141 19 MDQ_A10 MDQ_A49 5 6 56 MDQS_A1 5 6 56
MA_A11 A10/AP DQ10 MDQ_A11 MA_A11 A10/AP DQ10 MDQ_A11 MDQ_A48 MDQ_A12
118 A11 DQ11 20 118 A11 DQ11 20 7 8 7 8
MA_A12 115 105 MDQ_A12 MA_A12 115 105 MDQ_A12 MDQ_A11 1 2 MDQS_A2 1 2
A12/NC DQ12 MDQ_A13 A12/NC DQ12 MDQ_A13 MDQ_A10 RN60 MDQ_A21 RN54
167 A13/NC DQ13 106 167 A13/NC DQ13 106 3 4 3 4
109 MDQ_A14 109 MDQ_A14 MDQ_A15 5 6 56 MDQ_A17 5 6 56
MBA_A0 DQ14 MDQ_A15 MBA_A0 DQ14 MDQ_A15 MDQ_A14 MDQ_A16
8 MBA_A0 59 BA0 DQ15 110 59 BA0 DQ15 110 7 8 7 8
MBA_A1 52 23 MDQ_A16 MBA_A1 52 23 MDQ_A16 MDQ_A22 1 2
8 MBA_A1 BA1 DQ16 MDQ_A17 BA1 DQ16 MDQ_A17 MDQS_A5 R76 56 MDQ_A18 RN52
113 NC/BA2 DQ17 24 113 NC/BA2 DQ17 24 3 4
28 MDQ_A18 28 MDQ_A18 MDQM_A5 R77 56 MDQM_A2 5 6 56
DQ18 MDQ_A19 DQ18 MDQ_A19 MDQ_A41 R79 56
8 MCS_A#0 157 CS0# DQ19 31 8 MCS_A#2 157 CS0# DQ19 31 7 8
158 114 MDQ_A20 158 114 MDQ_A20 MDQ_A45 R80 56 MDQM_A3 1 2
8 MCS_A#1 CS1# DQ20 MDQ_A21 8 MCS_A#3 CS1# DQ20 MDQ_A21 MDQ_A20 R180 56 MDQS_A3 RN45
71 NC/CS2# DQ21 117 71 NC/CS2# DQ21 117 3 4
163 121 MDQ_A22 163 121 MDQ_A22 MDQ_A29 5 6 56
NC/CS3# DQ22 MDQ_A23 NC/CS3# DQ22 MDQ_A23 MDQ_A25
DQ23 123 DQ23 123 7 8
MRAS_A# 154 33 MDQ_A24 MRAS_A# 154 33 MDQ_A24 VTT_DDR MDQ_A31 1 2
8 MRAS_A# MCAS_A# RAS# DQ24 MDQ_A25 MCAS_A# RAS# DQ24 MDQ_A25 MDQ_A27 RN40
8 MCAS_A# 65 CAS# DQ25 35 65 CAS# DQ25 35 3 4
MWE_A# 63 39 MDQ_A26 MWE_A# 63 39 MDQ_A26 MA_A1 1 2 MDQ_A26 5 6 56
8 MWE_A# WE# DQ26 MDQ_A27 WE# DQ26 MDQ_A27 MAB_A1 RN38 MDQ_A30
DQ27 40 DQ27 40 3 4 7 8
MDQS_A0 5 126 MDQ_A28 MDQS_A0 5 126 MDQ_A28 MA_A2 5 6 47 MDQ_A38 1 2
8 MDQS_A[0..7] MDQS_A1 DQS0 DQ28 MDQ_A29 MDQS_A1 DQS0 DQ28 MDQ_A29 MAB_A2 MDQM_A4 RN32
14 DQS1 DQ29 127 14 DQS1 DQ29 127 7 8 3 4
MDQS_A2 25 131 MDQ_A30 MDQS_A2 25 131 MDQ_A30 MDQ_A23 1 2 MDQ_A34 5 6 56
MDQS_A3 DQS2 DQ30 MDQ_A31 MDQS_A3 DQS2 DQ30 MDQ_A31 MAB_A5 RN50 MDQS_A4
36 DQS3 DQ31 133 36 DQS3 DQ31 133 3 4 7 8
MDQS_A4 56 53 MDQ_A32 MDQS_A4 56 53 MDQ_A32 MA_A8 5 6 47 MDQ_A40 1 2
MDQS_A5 DQS4 DQ32 MDQ_A33 MDQS_A5 DQS4 DQ32 MDQ_A33 MA_A7 MDQ_A44 RN29
67 DQS5 DQ33 55 67 DQS5 DQ33 55 7 8 3 4
MDQS_A6 78 57 MDQ_A34 MDQS_A6 78 57 MDQ_A34 MAB_A3 1 2 MDQ_A35 5 6 56
MDQS_A7 DQS6 DQ34 MDQ_A35 MDQS_A7 DQS6 DQ34 MDQ_A35 MA_A3 RN42 MDQ_A39
86 DQS7 DQ35 60 86 DQS7 DQ35 60 3 4 7 8
47 146 MDQ_A36 47 146 MDQ_A36 MAB_A4 5 6 47 MDQ_A28 1 2
C DQS8 DQ36 MDQ_A37 DQS8 DQ36 MDQ_A37 MA_A4 MDQ_A24 RN48 C
DQ37 147 DQ37 147 7 8 3 4
MDQM_A0 97 150 MDQ_A38 MDQM_A0 97 150 MDQ_A38 MBA_A1 1 2 MDQ_A19 5 6 56
8 MDQM_A[0..7] MDQM_A1 DQM0/DQS9 DQ38 MDQ_A39 MDQM_A1 DQM0/DQS9 DQ38 MDQ_A39 MA_A10 RN36 MA_A5
107 DQM1/DQS10 DQ39 151 107 DQM1/DQS10 DQ39 151 3 4 7 8
MDQM_A2 119 61 MDQ_A40 MDQM_A2 119 61 MDQ_A40 MA_A0 5 6 47 MDQ_A1 1 2
MDQM_A3 DQM2/DQS11 DQ40 MDQ_A41 MDQM_A3 DQM2/DQS11 DQ40 MDQ_A41 MDQ_A5 RN68
129 DQM3/DQS12 DQ41 64 129 DQM3/DQS12 DQ41 64 7 8 3 4
MDQM_A4 149 68 MDQ_A42 MDQM_A4 149 68 MDQ_A42 MCS_A#3 1 2 MDQ_A4 5 6 56
MDQM_A5 DQM4/DQS13 DQ42 MDQ_A43 MDQM_A5 DQM4/DQS13 DQ42 MDQ_A43 MCS_A#1 RN25 MDQ_A0
159 DQM5/DQS14 DQ43 69 159 DQM5/DQS14 DQ43 69 3 4 7 8
MDQM_A6 169 153 MDQ_A44 MDQM_A6 169 153 MDQ_A44 MCS_A#2 5 6 47 MDQ_A47 1 2
MDQM_A7 DQM6/DQS15 DQ44 MDQ_A45 MDQM_A7 DQM6/DQS15 DQ44 MDQ_A45 MCAS_A# MDQ_A46 RN21
177 DQM7/DQS16 DQ45 155 177 DQM7/DQS16 DQ45 155 7 8 3 4
140 161 MDQ_A46 140 161 MDQ_A46 MCKE_A0 1 2 MDQ_A43 5 6 56
DQM8/DQS17 DQ46 MDQ_A47 DQM8/DQS17 DQ46 MDQ_A47 MCKE_A2 RN58 MDQ_A42
DQ47 162 DQ47 162 3 4 7 8
44 72 MDQ_A48 44 72 MDQ_A48 MCKE_A3 5 6 47 MDQ_A61 1 2
MECC0 DQ48 MDQ_A49 MECC0 DQ48 MDQ_A49 MCKE_A1 MDQ_A60 RN8
45 MECC1 DQ49 73 45 MECC1 DQ49 73 7 8 3 4
49 79 MDQ_A50 49 79 MDQ_A50 MDQ_A51 5 6 56
MECC2 DQ50 MDQ_A51 MECC2 DQ50 MDQ_A51 MDQ_A50
51 MECC3 DQ51 80 51 MECC3 DQ51 80 7 8
134 165 MDQ_A52 134 165 MDQ_A52 MA_A6 R120 47 MDQ_A59 1 2
MECC4 DQ52 MDQ_A53 MECC4 DQ52 MDQ_A53 MA_A9 R153 47 MDQ_A58 RN3
135 MECC5 DQ53 166 135 MECC5 DQ53 166 3 4
142 170 MDQ_A54 142 170 MDQ_A54 MA_A11 R155 47 MDQ_A63 5 6 56
MECC6 DQ54 MDQ_A55 MECC6 DQ54 MDQ_A55 MA_A12 R169 47 MDQ_A62
144 MECC7 DQ55 171 144 MECC7 DQ55 171 7 8
83 MDQ_A56 83 MDQ_A56 MBA_A0 R89 47 MDQ_A55 1 2
DQ56 MDQ_A57 DQ56 MDQ_A57 MRAS_A# R85 47 MDQS_A6 RN14
8 MCKE_A0 21 CKE0 DQ57 84 8 MCKE_A2 21 CKE0 DQ57 84 3 4
111 87 MDQ_A58 111 87 MDQ_A58 MWE_A# R82 47 MDQ_A54 5 6 56
8 MCKE_A1 CKE1 DQ58 8 MCKE_A3 CKE1 DQ58
88 MDQ_A59 88 MDQ_A59 MCS_A#0 R78 47 MDQM_A6 7 8
SMBCLK_ISO DQ59 MDQ_A60 SMBCLK_ISO DQ59 MDQ_A60
6,11,29 SMBCLK_ISO 92 SCL DQ60 174 92 SCL DQ60 174
SMBDATA_ISO 91 MDQ_A61 SMBDATA_ISO MDQ_A61
6,11,29 SMBDATA_ISO SDA DQ61 175
178 MDQ_A62
91 SDA DQ61 175
178 MDQ_A62 DECOUPLING CAPACITORS
DQ62 MDQ_A63 DQ62 MDQ_A63
181 SA0 DQ63 179 VCC_DDR 181 SA0 DQ63 179
182 182 VTT_DDR VTT_DDR VCC_DDR
SA1 VCC_DDR SA1
183 SA2 NC 9 183 SA2 NC 9
101 101 CB4 CB38
NC NC X_104P 105P CB70
NC 102 NC 102
B R255 CB5 CB40 X_104P B
8 MCLK_A1 16 CK0/NC NC 173 8 MCLK_A4 16 CK0/NC NC 173
17 75RST 17 X_104P X_104P CB66
8 MCLK_A#1 CK0#/NC DDR_VREF1 8 MCLK_A#4 CK0#/NC DDR_VREF1 CB7 CB42 104P
8 MCLK_A0 137 CK1/CK0 VREF 1 8 MCLK_A3 137 CK1/CK0 VREF 1
138 90 138 90 X_104P X_104P CB57
8 MCLK_A#0 CK1#/CK0# WP C205 R259 8 MCLK_A#3 CK1#/CK0# WP C203 CB9 CB74 104P
8 MCLK_A2 76 CK2/NC FETEN/NC 103 8 MCLK_A5 76 CK2/NC FETEN/NC 103
75 10 104P 75RST 75 10 104P 105P X_104P CB34
8 MCLK_A#2 CK2#/NC NC/RESET# 8 MCLK_A#5 CK2#/NC NC/RESET# CB13 CB46 104P
82 POWER 15 82 POWER 15 X_104P 105P CB23
ID_VDD VDDQ VCC_DDR ID_VDD VDDQ VCC_DDR
22 22 CB14 CB48 104P
VDDQ VDDQ X_104P X_104P CB15
VCC_DDR 184 SPD_VDD VDDQ 30 VCC_DDR 184 SPD_VDD VDDQ 30
54 54 CB18 CB49 X_104P
VDDQ VDDQ 105P X_104P CB17
VDDQ 62 VDDQ 62
7 77 7 77 CB20 CB51 104P
VCC_DDR VDD VDDQ VCC_DDR VDD VDDQ
38 96 38 96 X_104P X_104P CB22
VDD VDDQ VDD VDDQ CB26 CB54 X_104P
46 VDD VDDQ 104 46 VDD VDDQ 104
70 112 70 112 X_104P X_104P CB33
VDD VDDQ VCC_DDR VDD VDDQ CB28 CB59 X_104P
85 VDD VDDQ 128 85 VDD VDDQ 128
108 136 108 136 105P 105P
VDD VDDQ CB39 VDD VDDQ CB30 CB62
120 VDD VDDQ 143 120 VDD VDDQ 143
148 156 X_104P 148 156 X_104P X_104P
VDD VDDQ CB11 VDD VDDQ CB32 CB64
168 VDD VDDQ 164 168 VDD VDDQ 164
172 X_104P 172 X_104P 105P
VDDQ CB56 VDDQ CB36 CB72
81 GND VDDQ 180 81 GND VDDQ 180
89 X_104P 89 X_104P 105P
GND CB24 GND
93 GND GND 3 93 GND GND 3
100 11 104P 100 11 Place these decoupling capacitors close to VTT_DDR termination resistors.
GND GND CB35 GND GND One decoupling capacitor for each R-pack.
116 GND GND 18 116 GND GND 18
124 26 104P 124 26
GND GND CB71 GND GND
132 GND GND 34 132 GND GND 34
139 42 X_104P 139 42
GND GND CB1 GND GND
A 145 GND GND 50 145 GND GND 50 A
152 58 104P 152 58
GND GND CB2 GND GND
160 GND GND 66 160 GND GND 66
176 74 104P 176 74
GND GND CB65 GND GND
DIMM-D184-BK 104P DIMM-D184-BK Micro Star Restricted Secret
ADDR.=1010000B ADDR.=1010001B Title Rev
DDR DIMM 1,2 20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 10 of 33
5 4 3 2 1
5 4 3 2 1

SYSTEM MEMORY
DDR DIMM3 DDR DIMM4
DDR Terminational Resisitors
DIMM3 DIMM4 VTT_DDR VTT_DDR
MA_B0 48 SIGNALS 2 MDQ_B0 MA_B0 48 SIGNALS 2 MDQ_B0
8 MA_B[0..12] A0 DQ0 MDQ_B[0..63] 8 A0 DQ0
MA_B1 43 4 MDQ_B1 MAB_B1 43 4 MDQ_B1 MDQ_B6 1 2 MDQ_B63 1 2
A1 DQ1 8 MAB_B[1..5] A1 DQ1
MA_B2 41 6 MDQ_B2 MAB_B2 41 6 MDQ_B2 MDQ_B2 3 4 RN67 MDQ_B59 3 4 RN6
MA_B3 A2 DQ2 MDQ_B3 MAB_B3 A2 DQ2 MDQ_B3 MDQM_B0 56 MDQ_B58 56
130 A3 DQ3 8 130 A3 DQ3 8 5 6 5 6
D MA_B4 37 94 MDQ_B4 MAB_B4 37 94 MDQ_B4 MDQS_B0 7 8 MDQ_B62 7 8 D
MA_B5 A4 DQ4 MDQ_B5 MAB_B5 A4 DQ4 MDQ_B5 MDQ_B47 MDQ_B1
32 A5 DQ5 95 32 A5 DQ5 95 1 2 1 2
MA_B6 125 98 MDQ_B6 MA_B6 125 98 MDQ_B6 MDQ_B43 3 4 RN24 MDQ_B5 3 4 RN69
MA_B7 A6 DQ6 MDQ_B7 MA_B7 A6 DQ6 MDQ_B7 MDQ_B46 56 MDQ_B4 56
29 A7 DQ7 99 29 A7 DQ7 99 5 6 5 6
MA_B8 122 12 MDQ_B8 MA_B8 122 12 MDQ_B8 MDQM_B5 7 8 MDQ_B0 7 8
MA_B9 A8 DQ8 MDQ_B9 MA_B9 A8 DQ8 MDQ_B9 MDQM_B1 MDQ_B10
27 A9 DQ9 13 27 A9 DQ9 13 1 2 1 2
MA_B10 141 19 MDQ_B10 MA_B10 141 19 MDQ_B10 MDQ_B13 3 4 RN63 MDQ_B11 3 4 RN61
MA_B11 A10/AP DQ10 MDQ_B11 MA_B11 A10/AP DQ10 MDQ_B11 MDQS_B1 56 MDQ_B15 56
118 A11 DQ11 20 118 A11 DQ11 20 5 6 5 6
MA_B12 115 105 MDQ_B12 MA_B12 115 105 MDQ_B12 MDQ_B12 7 8 MDQ_B14 7 8
A12/NC DQ12 MDQ_B13 A12/NC DQ12 MDQ_B13 MDQ_B9
167 A13/NC DQ13 106 167 A13/NC DQ13 106 1 2
109 MDQ_B14 109 MDQ_B14 MDQ_B28 1 2 MDQ_B8 3 4 RN65
MBA_B0 DQ14 MDQ_B15 MBA_B0 DQ14 MDQ_B15 MDQ_B24
8 MBA_B0 59 BA0 DQ15 110 59 BA0 DQ15 110 3 4 RN49 MDQ_B3 5 6 56
MBA_B1 52 23 MDQ_B16 MBA_B1 52 23 MDQ_B16 MDQ_B19 5 6 56 MDQ_B7 7 8
8 MBA_B1 BA1 DQ16 MDQ_B17 BA1 DQ16 MDQ_B17 MDQ_B23 MDQ_B22
113 NC/BA2 DQ17 24 113 NC/BA2 DQ17 24 7 8 1 2
28 MDQ_B18 28 MDQ_B18 MDQ_B18 3 4 RN53
MCS_B#0 DQ18 MDQ_B19 MCS_B#2 DQ18 MDQ_B19 MDQM_B2 56
8 MCS_B#0 157 CS0# DQ19 31 8 MCS_B#2 157 CS0# DQ19 31 5 6
MCS_B#1 158 114 MDQ_B20 MCS_B#3 158 114 MDQ_B20 MDQ_B45 R84 56 MDQ_B21 7 8
8 MCS_B#1 CS1# DQ20 MDQ_B21 8 MCS_B#3 CS1# DQ20 MDQ_B21 MDQ_B42 R81 56 MDQS_B2
71 NC/CS2# DQ21 117 71 NC/CS2# DQ21 117 1 2
163 121 MDQ_B22 163 121 MDQ_B22 MDQ_B39 R94 56 MDQ_B16 3 4 RN56
NC/CS3# DQ22 MDQ_B23 NC/CS3# DQ22 MDQ_B23 MDQS_B5 R83 56 MDQ_B17 56
DQ23 123 DQ23 123 5 6
MRAS_B# 154 33 MDQ_B24 MRAS_B# 154 33 MDQ_B24 MDQ_B20 7 8
8 MRAS_B# MCAS_B# RAS# DQ24 MDQ_B25 MCAS_B# RAS# DQ24 MDQ_B25 VTT_DDR MDQM_B3
8 MCAS_B# 65 CAS# DQ25 35 65 CAS# DQ25 35 1 2
MWE_B# 63 39 MDQ_B26 MWE_B# 63 39 MDQ_B26 MA_B1 1 2 MDQS_B3 3 4 RN47
8 MWE_B# WE# DQ26 MDQ_B27 WE# DQ26 MDQ_B27 MAB_B1 RN39 MDQ_B29 56
DQ27 40 DQ27 40 3 4 5 6
MDQS_B0 5 126 MDQ_B28 MDQS_B0 5 126 MDQ_B28 MA_B2 5 6 47 MDQ_B25 7 8
8 MDQS_B[0..7] DQS0 DQ28 DQS0 DQ28
MDQS_B1 14 127 MDQ_B29 MDQS_B1 14 127 MDQ_B29 MAB_B2 7 8 MDQ_B27 1 2
MDQS_B2 DQS1 DQ29 MDQ_B30 MDQS_B2 DQS1 DQ29 MDQ_B30 MA_B9 MDQ_B31 RN41
25 DQS2 DQ30 131 25 DQS2 DQ30 131 1 2 3 4
MDQS_B3 36 133 MDQ_B31 MDQS_B3 36 133 MDQ_B31 MA_B11 3 4 RN55 MDQ_B30 5 6 56
MDQS_B4 DQS3 DQ31 MDQ_B32 MDQS_B4 DQS3 DQ31 MDQ_B32 MA_B7 47 MDQ_B26
56 DQS4 DQ32 53 56 DQS4 DQ32 53 5 6 7 8
MDQS_B5 67 55 MDQ_B33 MDQS_B5 67 55 MDQ_B33 MA_B12 7 8 MDQ_B38 1 2
MDQS_B6 DQS5 DQ33 MDQ_B34 MDQS_B6 DQS5 DQ33 MDQ_B34 MA_B6 MDQM_B4 RN33
78 DQS6 DQ34 57 78 DQS6 DQ34 57 1 2 3 4
C MDQS_B7 86 60 MDQ_B35 MDQS_B7 86 60 MDQ_B35 MA_B5 3 4 RN51 MDQ_B34 5 6 56 C
DQS7 DQ35 MDQ_B36 DQS7 DQ35 MDQ_B36 MAB_B5 47 MDQS_B4
47 DQS8 DQ36 146 47 DQS8 DQ36 146 5 6 7 8
147 MDQ_B37 147 MDQ_B37 MA_B8 7 8 MDQ_B37 1 2
MDQM_B0 DQ37 MDQ_B38 MDQM_B0 DQ37 MDQ_B38 MBA_B1 MDQ_B33 RN35
8 MDQM_B[0..7] 97 DQM0/DQS9 DQ38 150 97 DQM0/DQS9 DQ38 150 1 2 3 4
MDQM_B1 107 151 MDQ_B39 MDQM_B1 107 151 MDQ_B39 MA_B10 3 4 RN37 MDQ_B36 5 6 56
MDQM_B2 DQM1/DQS10 DQ39 MDQ_B40 MDQM_B2 DQM1/DQS10 DQ39 MDQ_B40 MA_B0 47 MDQ_B32
119 DQM2/DQS11 DQ40 61 119 DQM2/DQS11 DQ40 61 5 6 7 8
MDQM_B3 129 64 MDQ_B41 MDQM_B3 129 64 MDQ_B41 7 8 MDQ_B40 1 2
MDQM_B4 DQM3/DQS12 DQ41 MDQ_B42 MDQM_B4 DQM3/DQS12 DQ41 MDQ_B42 MCS_B#1 MDQ_B41 RN31
149 DQM4/DQS13 DQ42 68 149 DQM4/DQS13 DQ42 68 1 2 3 4
MDQM_B5 159 69 MDQ_B43 MDQM_B5 159 69 MDQ_B43 MCS_B#0 3 4 RN26 MDQ_B44 5 6 56
MDQM_B6 DQM5/DQS14 DQ43 MDQ_B44 MDQM_B6 DQM5/DQS14 DQ43 MDQ_B44 MCS_B#3 47 MDQ_B35
169 DQM6/DQS15 DQ44 153 169 DQM6/DQS15 DQ44 153 5 6 7 8
MDQM_B7 177 155 MDQ_B45 MDQM_B7 177 155 MDQ_B45 MCS_B#2 7 8 MDQ_B53 1 2
DQM7/DQS16 DQ45 MDQ_B46 DQM7/DQS16 DQ45 MDQ_B46 MCKE_B0 MDQ_B49 RN22
140 DQM8/DQS17 DQ46 161 140 DQM8/DQS17 DQ46 161 1 2 3 4
162 MDQ_B47 162 MDQ_B47 MCKE_B2 3 4 RN59 MDQ_B48 5 6 56
DQ47 MDQ_B48 DQ47 MDQ_B48 MCKE_B1 47 MDQ_B52
44 MECC0 DQ48 72 44 MECC0 DQ48 72 5 6 7 8
45 73 MDQ_B49 45 73 MDQ_B49 MCKE_B3 7 8 MDQ_B61 1 2
MECC1 DQ49 MDQ_B50 MECC1 DQ49 MDQ_B50 MDQ_B60 RN15
49 MECC2 DQ50 79 49 MECC2 DQ50 79 3 4
51 80 MDQ_B51 51 80 MDQ_B51 MCAS_B# 1 2 MDQ_B51 5 6 56
MECC3 DQ51 MDQ_B52 MECC3 DQ51 MDQ_B52 MBA_B0 RN28 MDQ_B50
134 MECC4 DQ52 165 134 MECC4 DQ52 165 3 4 7 8
135 166 MDQ_B53 135 166 MDQ_B53 MWE_B# 5 6 47 MDQ_B55 1 2
MECC5 DQ53 MDQ_B54 MECC5 DQ53 MDQ_B54 MRAS_B# MDQS_B6 RN20
142 MECC6 DQ54 170 142 MECC6 DQ54 170 7 8 3 4
144 171 MDQ_B55 144 171 MDQ_B55 MA_B3 1 2 MDQ_B54 5 6 56
MECC7 DQ55 MDQ_B56 MECC7 DQ55 MDQ_B56 MAB_B3 RN46 MDQM_B6
DQ56 83 DQ56 83 3 4 7 8
MCKE_B0 21 84 MDQ_B57 MCKE_B2 21 84 MDQ_B57 MAB_B4 5 6 47 MDQS_B7 1 2
8 MCKE_B0 CKE0 DQ57 8 MCKE_B2 CKE0 DQ57
MCKE_B1 111 87 MDQ_B58 MCKE_B3 111 87 MDQ_B58 MA_B4 7 8 MDQM_B7 3 4 RN9
8 MCKE_B1 CKE1 DQ58 8 MCKE_B3 CKE1 DQ58
88 MDQ_B59 88 MDQ_B59 MDQ_B57 5 6 56
SMBCLK_ISO DQ59 MDQ_B60 SMBCLK_ISO DQ59 MDQ_B60 MDQ_B56
6,10,29 SMBCLK_ISO 92 SCL DQ60 174 92 SCL DQ60 174 7 8
SMBDATA_ISO 91 175 MDQ_B61 SMBDATA_ISO 91 175 MDQ_B61
6,10,29 SMBDATA_ISO SDA DQ61 SDA DQ61
MDQ_B62 MDQ_B62
181
DQ62 178
179 MDQ_B63 181
DQ62 178
179 MDQ_B63 DECOUPLING CAPACITORS
SA0 DQ63 VCC_DDR SA0 DQ63
VCC_DDR 182 SA1 VCC_DDR 182 SA1
183 9 183 9 VTT_DDR VTT_DDR VCC_DDR
B SA2 NC SA2 NC B
NC 101 NC 101
102 102 CB3 CB41 CB58
NC R253 NC X_104P 105P X_104P
8 MCLK_B1 16 CK0/NC NC 173 8 MCLK_B4 16 CK0/NC NC 173
17 75RST 17 CB6 CB43 CB68
8 MCLK_B#1 CK0#/NC DDR_VREF2 8 MCLK_B#4 CK0#/NC DDR_VREF2 105P X_105P X_104P
8 MCLK_B0 137 CK1/CK0 VREF 1 8 MCLK_B3 137 CK1/CK0 VREF 1
138 90 138 90 CB8 CB45 CB44
8 MCLK_B#0 CK1#/CK0# WP C193 R252 8 MCLK_B#3 CK1#/CK0# WP C195 X_104P 105P X_104P
8 MCLK_B2 76 CK2/NC FETEN/NC 103 8 MCLK_B5 76 CK2/NC FETEN/NC 103
75 10 104P 75RST 75 10 104P CB10 CB47 CB52
8 MCLK_B#2 CK2#/NC NC/RESET# 8 MCLK_B#5 CK2#/NC NC/RESET# X_105P X_104P X_104P
82 POWER 15 82 POWER 15 CB12 CB50
ID_VDD VDDQ VCC_DDR ID_VDD VDDQ VCC_DDR
22 22 X_104P X_105P
VDDQ VDDQ CB16 CB53
VCC_DDR 184 SPD_VDD VDDQ 30 VCC_DDR 184 SPD_VDD VDDQ 30
54 54 105P X_104P
VDDQ VDDQ CB19 CB55
VDDQ 62 VDDQ 62
7 77 7 77 X_105P 105P
VCC_DDR VDD VDDQ VCC_DDR VDD VDDQ
38 96 38 96 CB21 CB60
VDD VDDQ VDD VDDQ X_104P X_104P
46 VDD VDDQ 104 46 VDD VDDQ 104
70 112 70 112 CB25 CB61
VDD VDDQ VDD VDDQ 105P 105P
85 VDD VDDQ 128 85 VDD VDDQ 128
108 136 108 136 CB27 CB63
VDD VDDQ VDD VDDQ X_104P X_104P
120 VDD VDDQ 143 120 VDD VDDQ 143
148 156 148 156 CB29 CB67
VDD VDDQ VDD VDDQ X_104P 105P
168 VDD VDDQ 164 168 VDD VDDQ 164
172 172 CB31 CB69
VDDQ VDDQ 105P X_104P
81 GND VDDQ 180 81 GND VDDQ 180
89 89 CB37 CB73
GND GND X_104P 104P
93 GND GND 3 93 GND GND 3
100 GND GND 11 100 GND GND 11
116 18 116 18 Place these decoupling capacitors close to VTT_DDR termination resistors.
GND GND GND GND One decoupling capacitor for each R-pack.
124 GND GND 26 124 GND GND 26
A 132 GND GND 34 132 GND GND 34 A
139 GND GND 42 139 GND GND 42
145 GND GND 50 145 GND GND 50
152 GND GND 58 152 GND GND 58
160 GND GND 66 160 GND GND 66
176 GND GND 74 176 GND GND 74 Micro Star Restricted Secret
DIMM-D184-BK DIMM-D184-BK Title Rev
DDR DIMM 3,4 20A
ADDR.=1010010B ADDR.=1010011B
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 11 of 33
5 4 3 2 1
5 4 3 2 1

AGP Slot Imax


VCCq 2.0A
VCC3 6.0A
VCC12 1.0A
VCC5 2.0A
VCC3_SB 0.75A

3VDUAL

AGP 1.5V 4X/8X SLOT(AGP VER:3.0)


Springdale Reference & Swing Voltage Circuit
R272
D
VCC5 = 60mils trace / 15 mils space X_4.7K
D

AGP_PRT 30
AGP1
B1 A1 VCC_AGP +12V VCC_AGP R211 60.4RST
-OVRCNT 12V +12V VCC_AGP GSWING 9
B2 A2 Q33
VCC5 5V -TYPEDET G_DET#
B3 5V RESERVED A3 X_2N3904S
B4 USB+ USB- A4
B5 A5 R323 R322 R329 R235 C181
GND GND 8.2K 8.2K 39.2RST 104P
14,16,17 PIRQ#B B6 -INTB -INTA A6 PIRQ#A 14,16,17 4.7K
B7 A7 PCIRST_ICH5#
6 AGP_CLK CLK -RST PCIRST_ICH5# 14,25,29
GREQ# B8 A8 GGNT#
9 GREQ# -REQ -GNT GGNT# 9
B9 A9 GPERR# R330 39.2RST AGP_REF
VCC3 3.3V 3.3V VCC3 AGP_REF 9
B10 A10

D
9 ST0 ST0 ST1 ST1 9
9 ST2 B11 ST2 RESERVED A11
RBF# B12 A12 PIPE# R332 4.7K Q40 Q41 R331 C245
9 RBF# -RBF -PIPE PIPE# 9
B13 A13 2N3904S G 2N7002S 100RST 104P
GND GND WBF#
9 DBI_LO B14 RESERVED -WBF A14 WBF# 9

S
B15 A15 G_DET#
9 SBA0 SBA0 SBA1 SBA1 9
B16 3.3V 3.3V A16
B17 A17 Q42 R333
9 SBA2 SBA2 SBA3 SBA3 9
B18 A18 2N3904S 100
9 SB_STB SB_STB -SB_STB SB_STB# 9
B19 GND GND A19
9 SBA4 B20 SBA4 SBA5 A20 SBA5 9 G_DET# SPEC AGP_REF
9 SBA6 B21 SBA6 SBA7 A21 SBA7 9
B22 RSVD/KEY RSVD/KEY A22 FLOATING AGP2.0 0.75V>0.55V
B23 GND/KEY GND/KEY A23
3VDUAL B24 AUX3V/KEY RSVD/KEY A24 LOW AGP3.0 0.35V<0.55V
B25 3.3V/KEY 3.3V/KEY A25
9 GAD31 B26 AD31 AD30 A26 GAD30 9
9 GAD29 B27 AD29 AD28 A27 GAD28 9
C B28 A28 C
3.3V 3.3V
9 GAD27 B29 AD27 AD26 A29 GAD26 9
9 GAD25 B30 AD25 AD24 A30 GAD24 9
B31 GND GND A31
9 AD_STB1 B32
B33
AD_STB1 -AD_STB1 A32
A33
AD_STB#1 9 AGP TERMINATION RESISTORS
9 GAD23 AD23 C/-BE3 GC_BE#3 9
VCC_AGP B34 VDDQ VDDQ A34 VCC_AGP
9 GAD21 B35 AD21 AD22 A35 GAD22 9
9 GAD19 B36 AD19 AD20 A36 GAD20 9
B37 GND GND A37
9 GAD17 B38 AD17 AD18 A38 GAD18 9
B39 A39 GSERR# R324 8.2K
9 GC_BE#2 C/-BE2 AD16 GAD16 9 VCC_AGP
B40 VDDQ VDDQ A40
GIRDY# B41 A41 GFRAME#
9 GIRDY# -IRDY -FRAME GFRAME# 9
B42 AUX3V/KEY RSVD/KEY A42
B43 GND/KEY GND/KEY A43
B44 RSVD/KEY RSVD/KEY A44
B45 3.3V/KEY 3.3V/KEY A45
GDEVSEL# B46 A46 GTRDY#
9 GDEVSEL# -DEVSEL -TRDY GTRDY# 9
B47 A47 GSTOP#
VDDQ -STOP GSTOP# 9
GPERR# B48 A48 R326 X_0 PME#
-PERR -PME PME# 13,14,16,17,21
B49 GND GND A49
GSERR# GPAR
B50
B51
-SERR PAR A50
A51
GPAR 9 AGP SLOT DECOUPLING CAPACITORS
9 GC_BE#1 C/-BE1 AD15 GAD15 9
B52 VDDQ VDDQ A52
B53 A53 VCC_AGP
9 GAD14 AD14 AD13 GAD13 9 +12V 3VDUAL VCC3
9 GAD12 B54 AD12 AD11 A54 GAD11 9
B55 GND GND A55
B56 A56 C241 C250 C253 C248
9 GAD10 AD10 AD9 GAD9 9
B57 A57 X_104P X_104P 1U/0805 104P
9 GAD8 AD8 C/-BE0 GC_BE#0 9
B58 A58 C249 C277 C226
B VDDQ VDDQ X_104P 1U/0805 X_104P B
9 AD_STB0 B59 AD_STB0 -AD_STB0 A59 AD_STB#0 9
B60 A60 C220 C251
9 GAD7 AD7 AD6 GAD6 9
B61 A61 1U/0805 104P
GND GND VCC5 C252 C254
9 GAD5 B62 AD5 AD4 A62 GAD4 9
B63 A63 X_1U/0805 X_104P
9 GAD3 AD3 AD2 GAD2 9
B64 A64 C242 C224
VDDQ VDDQ X_104P X_104P
9 GAD1 B65 AD1 AD0 A65 GAD0 9
AGP_REF B66 A66 C243 C244
VREF_CG VREF_GC 104P X_104P
C239 AGP Slot-D124 _1.5V
104P
PIRQ#A / PIRQ#B

A A

Micro Star Restricted Secret


Title Rev
AGP SLOT 20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 12 of 33
5 4 3 2 1
5 4 3 2 1

VL2_5 3VDUAL

For RTL8110S For RTL8100C


R270 0_0805
For RTL8100C R347
3VDUAL
0_0805 DVDD 3VDUAL R258 0_0805
VL2_5 VL1_8 DVDD
R276 X_0 R254 For RTL8110S
0_0805 DVDDA
For RTL8110S
C216 C214 R691 0_0805
104P 104P

120

126

116
110

107
U17

11
12

10

99
78
64
54
45
32
24

94
84
71
56
41
26

20

16
7
3
VL2_5
AD[31..0]

HSDAC-
HSDAC+

VDD18/VDD25
VDD18/VDD25

VDD18/VDD25

VDD18/VDD25

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

AVDDL/AVDD33
AVDDL/AVDD33
AVDDL/AVDD33
AVDDH/NC
AVDDH/NC

VDD18_A/NC

VDD18/NC
VDD18/NC

VDD18/NC

VDD18/NC

VDD18/NC

AVDDL/NC
14,16,17,19,21 AD[0..31]
R274 0_0805
D D
AD0 104 1 MDI_0+ For RTL8100C
AD1 AD0 MDI0+/TX+ MDI_0-
103 AD1 MDI0-/TX- 2
AD2 102 5 MDI_1+
AD3 AD2 MDI1+/RX+ MDI_1-
98 AD3 MDI1-/RX- 6
AD4 97 14 MDI_2+
AD5 AD4 MDI2+/NC MDI_2-
96 AD5 MDI2-/NC 15
AD6 95 18 MDI_3+
AD7 AD6 MDI3+/NC MDI_3-
93 AD7 MDI3-/NC 19
AD8 90
AD9 AD8
89 AD9
AD10 87 105
AD11 AD10 LANWAKEUP LAN_LINK_UP
86 AD11 LED0 117
AD12 85 115 LINK_100_C
AD13 AD12 LED1
83 AD13 LED2 114
AD14 82 113 LINK_1000
AD15 AD14 LED3/NC
79 AD15
AD16 59
AD17 AD16 VL1_8 DVDDA
58 AD17
AD18 57 U22 3VDUAL
AD19 AD18 R275 0_0805
55 AD19 EECS 106 1 CS VCC 8 07/25
AD20 53 111 2 7 3VDUAL
AD21 AD20 EESK SK NC R698 10K
50 AD21 EEDI 109 3 DI NC 6 For RTL8110S
AD22 49 108 4 5
AD23 AD22 EEDO DO GND
47 AD23
AD24 43 ATL-128x8-0.5us-SOIC8 3VDUAL 3VDUAL
AD25 AD24 R349 X_10K
42 AD25
AD26 40
AD27 AD26 R514 5.6KST
39 AD27

3
AD28 37
AD29 AD28 CTRL25 Q59
36 AD29 07/25 1
C AD30 34 125 CTRL18 BCP69 VL2_5 C
C_BE#[3..0] AD31 AD30 CTRL18/NC
14,16,17,19,21 C_BE#[0..3] 33 AD31 CTRL25

2
4
CTRL25 8
C_BE#0 92 For RTL8110S
C_BE#1 CBE0B
77 CBE1B XTAL1 121 +
C_BE#2 60 For RTL8100C EC29
C_BE#3 CBE2B C238 470U/10V
44 CBE3B 18p
FRAME# 61 Y2
14,16,17,19,21,27 FRAME# FRAMEB
IRDY# 63
14,16,17,19,21 IRDY# IRDYB 25MHZ
TRDY# 67
14,16,17,19,21 TRDY# TRDYB
DEVSEL# 68
14,16,17,19,21 DEVSEL# DEVSELB 3VDUAL
STOP# 69
14,16,17,19,21,27 STOP# STOPB
PAR 76 122 C234 18p
14,16,17,19,21 PAR PAR XTAL2
PERR# 70
14,16,17,21 PERR# PERRB
SERR# 75
14,16,17 SERR# SERRB

3
31 74 R344 X_0 SMBDATA
12,14,16,17,21 PME# PMEB SMBDATA SMBDATA 6,15,16
PIRQ#E 25 72 R342 X_0 SMBCLK CTRL18 1 Q58
14,16 PIRQ#E INTAB SMBCLK SMBCLK 6,15,16 VL1_8
30 BCP69
14,16,27 PREQ#4 REQB
14 PGNT#4 29 GNTB M66EN/NC 88
modify, 0804/2003

2
4
CLKRUNB 65
AD22 R315 100 46 23 R280 1KST 07/25
IDSEL ISOLATEB VCC5
PCIRST#1 27 R509 15KST For RTL8110S
29 PCIRST#1 RSTB
GND/NC
GND/NC
GND/NC
GND/NC
GND/NC
GND/NC

VSSPST
VSSPST
VSSPST
VSSPST
VSSPST
VSSPST
VSSPST
VSSPST
VSS/NC
VSS/NC

28 127 R289 2.49KST


6 LAN_PCLK CLK RSET C463
GND
GND
GND
GND

VSS
VSS
VSS
VSS
VSS

C461 C462
modify, 0804/2003 2.49K for 8110S; 5.6k for 8100C X_104P 4.7u/0805
R515 X_105P
112
118

100

123
124
128

101
119
22
48
62
73

35
52
80

17

13

21
38
51
66
81
91

X_330
4

B B
reserved to avoid
PCIRST overshoot
over 4.5V on LAN
device.

LAN_LINK_UP DVDD VL2_5 3VDUAL


3VDUAL
MDI_0+ VL2_5 C123 C464 C162 C278
MDI_0- C124 10U/1206 10U/1206 10U/1206
X_104P C264 C199 C273
MDI_1+ X_104P N58-16F0031-F02 X_104P X_104P X_104P
MDI_1- R195 X_330 330 C233 C200 C240
for 8110S R196 R162 X_103P X_103P X_103P
MDI_2+ 0_0805 C274 C213
MDI_2- 104P 104P
LAN_USB1B C219 C272
MDI_3+ LAN_ACTLED 19 AMBER+ X_103P X_103P
MDI_3- LAN_LINK_UP 20 AMBER- C256
13 NC X_103P
Place these components close MDI_0+ 18 TD1+ C262
to the LAN Conroller MDI_0- 12 TD1- 104P
103P MDI_1+ TD2+
C201 103P R266 49.9 for 8110S C138 MDI_1-
17
TD2-
11
MDI_2+ 16 TD3+
R265 49.9 MDI_2- TD3-
A 8100C removed MDI_3+
10
TD4+
A
15
C202 103P R268 49.9 MDI_3- 9 TD4-
14 NC
R267 49.9 LINK_1000 21 GREEN+
C122 LINK_100_C 22 GREEN- Micro Star Restricted Secret
C197 103P R261 49.9 for 8110S 0
Title Rev
R262 49.9
X_104P X_104P
X_USB/NET_6 82547EI Gigabit LAN 1 20A
C198 103P R263 49.9 C140 C139 Document Number MS-6728
R264 49.9 MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 13 of 33
5 4 3 2 1
5 4 3 2 1

C299 103P C293 103P

C268 103P

VCC3 VCC_AGP 3VSB_ICH 3VSB_ICH

ICH5 Pull-Up / Down Resistors

AD13
AD20
W15
W17
W24

W19

W10
W11
M10

M15
G19
G21

AA4
AB4
N10

R13

R10

H24

N15
N23

R12
V19

K10
K12
K13

P19

K19

E15

E22

B15
E13
E14
E18

K15

E11
F15
F14

F16
F17
F18

F19

F10
F11
L19

J19

W9

W6
W7
W8
G1

H6

R6

U6
PREQ#A R368 2.7K

B5

K6

P6

V6

Y5
F6

F7
F8
L6
D VCC5 D
U18A

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

VCCSUS1_5A
VCCSUS1_5B
VCCSUS1_5B
VCCSUS1_5B

VCCLAN3_3/VCCSUS3_3
VCCLAN3_3/VCCSUS3_3
VCCLAN3_3/VCCSUS3_3
VCCLAN1_5/VCCSUS1_5C
VCCLAN1_5/VCCSUS1_5C
AD0 J4 AB16 PDD0
13,16,17,19,21 AD[0..31] AD0 PDD0 PDD[0..15] 20
AD1 J5 Y13 PDD1
AD2 AD1 PDD1 PDD2
G3 AD2 PDD2 Y14
AD3 K4 AC14 PDD3
AD4 AD3 PDD3 PDD4 PGNT#A R363 X_1K internal pull up 20K
H5 AD4 PDD4 AA14
AD5 H2 AC15 PDD5
AD6 AD5 PDD5 PDD6 TOP SWAP OVERRIDE
J3 AD6 PDD6 AD14
AD7 J2 AB14 PDD7
AD8 AD7 PDD7 PDD8 VCC3
K5 AD8 PDD8 AD15
AD9 F2 Y15 PDD9 AC_SDOUT R362 X_1K internal pull down 20K
AD10 AD9 PDD9 PDD10
M4 AD10 PDD10 AD16
AD11 H4 AA15 PDD11 HI:CPU speed strap SAFE MODE
AD12 AD11 PDD11 PDD12
L5 AD12 PDD12 AC16
AD13 G2 Y16 PDD13
AD14 AD13 PDD13 PDD14
K1 AD14 PDD14 AA16
AD15 G5 AB17 PDD15
AD16 AD15 PDD15
G4 AD16
AD17 L1
AD18 AD17
B2 AD18 PDA0 AA19 PD_A0 20
AD19 P5 AD19
AD20 H3
AD19 PDA1
AC19
PD_A1 20 ICH5 Decoupling Capacitors
AD20 PDA2 PD_A2 20
AD21 N5
AD22 AD21 All caps be placed less than 100mils.
C4 AD22 PDCS1# AB19 PD_CS#1 20
AD23 N4 Y18
AD23 PDCS3# PD_CS#3 20
AD24 E6 VCC3 VCC3
AD25 AD24
P3 AD25 PDIOR# AD18 PD_IOR# 20
AD26 D3 AA17 C297 C308
AD26 PDIOW# PD_IOW# 20
AD27 N2 AA18 104P 104P
AD27 PIORDY PD_IORDY 20
C AD28 F5 C279 C298 C
AD29 AD28 104P 104P
P4 AD29 PDDREQ AC17 PD_DREQ 20
AD30 F4 AC18 C281 C304
AD30 PDDACK# PD_DACK# 20
AD31 P2 X_104P X_104P
AD31
IRQ14 Y17 IRQ14 20
C_BE#0 E3 Close A1,A7,H1,P1,AD12 and AD21 of ICH5.
13,16,17,19,21 C_BE#[0..3] C/BE0#
C_BE#1 J1
C_BE#2 C/BE1# SDD0 3VSB_ICH 3VSB_ICH
N3 C/BE2# SDD0 AA22 SDD[0..15] 20
C_BE#3 M2 AB23 SDD1
C/BE3# SDD1 SDD2 C300 C307
SDD2 AD23
D2 AD24 SDD3 104P 1U/0805
13,16,17,19,21,27 FRAME# FRAME# SDD3
M3 AB21 SDD4 C288 C301
13,16,17,19,21 IRDY# IRDY# SDD4
E4 AC21 SDD5 104P 103P
13,16,17,19,21 TRDY# TRDY# SDD5
L3 AB20 SDD6 C313 C287
13,16,17,19,21 DEVSEL# DEVSEL# SDD6
E5 AC20 SDD7 104P 103P
13,16,17,19,21,27 STOP# STOP# SDD7
Y19 SDD8 {VOLTAGE}
SDD8 SDD9 0.1uF close A15,A23, and V1 of ICH5.
13,16,17,19,21 PAR F1 PAR SDD9 AD22
K2 AC22 SDD10 Another close A17,A19 and A21 of ICH5.
13,16,17,21 PERR# PERR# SDD10
L4 AA20 SDD11
13,16,17 SERR# SERR# SDD11 VCC_AGP VCC_AGP
AB22 SDD12
SDD12 SDD13
16,17 LOCK# L2 PLOCK# SDD13 AC24
AB24 SDD14 C270 C276
SDD14 SDD15 X_104P 104P
12,13,16,17,21 PME# V2 PME# SDD15 AA23
C263 C275
B3 X_104P 104P
12,16,17 PIRQ#A PIRQA#
12,16,17 PIRQ#B E1 PIRQB# SDA0 W22 SD_A0 20
A2 W23 Close L24,C24,D8,G24,M24 and AD18 of ICH5.
16,17 PIRQ#C PIRQC# SDA1 SD_A1 20
16,17 PIRQ#D C2 PIRQD# SDA2 W21 SD_A2 20
D7 VCC5_SB U20 3VSB
13,16 PIRQ#E PIRQE#/GPI2
16,21 PIRQ#F A6 V22 SD_CS#1 20 X_YLT1087S-0.8A
PIRQF#/GPI3 SDCS1#
16,19 PIRQ#G E2 PIRQG#/GPI4 SDCS3# V20 SD_CS#3 20 3 VIN VOUT 2
B B
16,19 PIRQ#H B1 PIRQH#/GPI5
SDIOR# Y23 SD_IOR# 20

ADJ

+
PREQ#0 D5 Y22 C318
13,16,17,19,27 PREQ#[0..5] REQ0# SDIOW# SD_IOW# 20
PREQ#1 C1 Y21 X_4.7u-0805 R419 C317 EC45
REQ1# SIORDY SD_IORDY 20
PREQ#2 C5 X_104P X_100u
PREQ#3 REQ2# X_100RST

1
B6 REQ3# SDDREQ Y20 SD_DREQ 20
PREQ#4 C6 W20
REQ4#/GPI40 SDDACK# SD_DACK# 20
PGNT#0 D4 Y24
13,16,17,19,27 PGNT#[0..5] GNT0# IRQ15 IRQ15 20
PGNT#1 A3
PGNT#2 GNT1# R420
B7 GNT2#
PGNT#3 C7 E12 AC_SDIN0
PGNT#4 GNT3# AC_SDIN0 AC_SDIN1 X_187RST
A4 GNT4#/GPO48 AC_SDIN1 D12
A13 AC_SDIN2
AC_SDIN2 AC_SDIN2 18
PREQ#A A5
PREQ#5 REQA#/GPI0
E7 REQB#REQ5#/GPI1
A9 AC_SDOUT
AC_SDOUT AC_SDOUT 18
PGNT#A E8 RN85
PGNT#5 GNTA#/GPO16 AC_SYNC
B4 GNTB#/GNT5#/GPO17 AC_SYNC B8 AC_SYNC 18 3VSB 1 2 3VSB_ICH
3 4
D8 AC_BITCLK 5 6
AC_BIT_CLK AC_BITCLK 18
6 ICH_PCLK N1 PCICLK 7 8
AC_RST# C12 AC_RST# 18
V4 X_8P4R-0
A1 GND
A7 GND
A10 GND
A15 GND
A17 GND
A19 GND
A21 GND
A23 GND
AA5 GND
AA7 GND
AA9 GND
AA11GND
AA13GND
AA21GND
AA24GND
AB5 GND
AB7 GND
AB9 GND
AB11GND
AB15GND
AB18GND
AC2 GND
AC4 GND
AC6 GND
AC8 GND
AC10GND
AC13GND
AC23GND
AD4 GND
AD6 GND
AD8 GND
AD17GND
AD21GND
AD12GND
B13 GND
B17 GND
B19 GND
B21 GND
B23 GND
C3 GND
C8 GND
C16 GND
C18 GND
C20 GND
C22 GND
D1 GND
D6 GND
D11 GND
D16 GND
D18 GND
D20 GND
D22 GND
D24 GND
E17 GND
E19 GND
E20 GND
E21 GND
E23 GND
F3 GND
12,25,29 PCIRST_ICH5# PCIRST# F9 GND

RN71
Intel ICH5-N 1 2
3VDUAL 3VSB_ICH
{Priority} 3 4
5 6
7 8
A A
X_8P4R-0
deffault

Micro Star Restricted Secret


AC_BITCLK C295 X_10P Title Rev
Intel ICH5 - PCI & IDE &AC97 20A
AC_SDIN2 R356 X_10K internal pull down 20K Document Number MS-6728
AC_SDIN1 R360 X_10K MICRO-STAR INT'L Last Revision Date:
AC_SDIN0 R357 X_10K internal pull down 20K CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
internal pull down 20K Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 14 of 33
5 4 3 2 1
5 4 3 2 1

VCCP
SIO_PME# GPO19
25 SIO_PME#
EXTSMI# GPO20 STRAPS FERR# R343 62
30 EXTSMI#
CSA_PME# TRMTRIP# R336 62
GPI7 GPO24 HI:NO REBOOT
GPI6 SPKR R339 X_1K
VCC3 3VSB_ICH
LAN_DISABLE#
VCC_AGP GPO27
GPO28 SMBCLK R370 X_2.7K
C296 104P VCC_AGP C265 BIOS_WP# SATA LED for SMBDATA R377 X_2.7K
BIOS_WP# 25
C294 103P 104P GPO33 ver:A1 chip
GPO33 30
X_103P GPO34 LINK_ALERT# R413 10K
VBAT 3VSB_ICH
HI:enable ASF RN84 10K
VCC5_SB C266 VCCP R415 X_10K SIO_SMI# 1 2
VCC3
D 104P BATLOW# BATLOW# 3 4 D
C291 104P C292 C271 internal pull up 20K RING# 5 6
SUSCLK 25
THRM# default is output EXTSMI# 7 8
THRM# 25
C309 104P 5VREF 104P GPI41 R371 X_8.2K
TRMTRIP# 4 VCC3
CSA_PME# R375 10K

AD11
Close A8 of ICH5. GPO24 R369 X_1K

W14

AC1
AA6
AB6

G23

AB1

AB2
C24

R15
R19

U21

U22

U20
E16

A11
T19

T20

F22

F21

T21
W4
W5

W3

W2
R5
U3

R1
internal pull up 20K

A8

Y2

V3

Y1
T1

T2
U18B GPO34 R340 X_1K
AC7 LAN_DISABLE# R376 X_1K default is high

AGPBUSY#/GPI6
GPI7
GPI8
GPI12
GPI13

GPIO25
GPIO27
GPIO28
GPIO32
GPIO33
GPIO34
V5REF
V5REF

SLP_S1#/GPO19

SUS_STAT#

BATLOW#

THRM#

THRMTRIP#
V5REF_SUS

VCCSATAPLL
VCCSATAPLL

VCCUSBPLL

V_CPU_IO
V_CPU_IO
V_CPU_IO

STP_PCI#/GPO18

STP_CPU#/GPO20
C3_STAT#/GPO21
NC

CPUPERF#/GPO22
SSMUXSEL/GPO23
CLKRUN#/GPIO24
VCCRTC

SUSCLK
SATA0RXP SATA_RX0 20
C10 LAN_RXD0 SATA0RXN AD7 SATA_RX#0 20
C9 AC9 THRM# R392 4.7K
LAN_RXD1 SATA1RXP SATA_RX1 20 VCC3
C11 LAN_RXD2 SATA1RXN AD9 SATA_RX#1 20
D9 AA8 ICH_PWROK R353 10K SIO_PME# 1 2
LAN_TXD0 SATA0TXP SATA_TX0 20
E9 AB8 ICH_RST# 3 4
LAN_TXD1 SATA0TXN SATA_TX#0 20
B12 AA10 Prevent excessive IccRTC leakage SMLINK1 5 6
LAN_TXD2 SATA1TXP SATA_TX1 20
AB10 SMLINK0 7 8
SATA1TXN SATA_TX#1 20
AA1 LAN_RST#
E10 RN86 10K
LAN_CLK SATA_BIAS R361 24.9RST GPO27 R373 X_10K
D10 LAN_RSTSYNC SATARBIASP Y11 3VSB_ICH
Y9 GPI6 R391 10K
SATARBIASN VCC3
B11 EE_DIN
B9 AC5 GPI7 R372 10K
EE_DOUT CLK100P SATA_100 6
B10 EE_CS CLK100N AD5 SATA_100# 6
A12 Reservered GPI
EE_SHCLK
LPC_AD0
C23
LAD0 T5
R4 LPC_AD1
LPC_AD[0..3] 25,27
SERIRQ R334 8.2K RESUME RESET
24 USB0+ USBP0P LAD1 VCC3
D23 R3 LPC_AD2
24 USB0- USBP0N LAD2
U4 LPC_AD3
LAD3 A20GATE R8 X_8.2K VCC5_SB
24 USB1+ A22 USBP1P
C B22 T4 C
24 USB1- USBP1N LFRAME# LPC_FRAME# 25,27
U5 KBRST# R335 X_8.2K R303
LDRQ0# LPC_DRQ#0 25
C21 R2 GPI41 4.7K
23 USB2+ USBP2P LRDQ1#/GPI41
23 USB2- D21 USBP2N SERIRQ F23 SERIRQ 25
A20 RSMRST#
23 USB3+ USBP3P
B20 AD2 SMBCLK
23 USB3- USBP3N SMBCLK SMBCLK 6,13,16
AD1 SMBDATA
SMBDATA SMBDATA 6,13,16
C19 R314
24 USB4+ USBP4P
D19 AA2 SMLINK1 10K
24 USB4- USBP4N SMLINK1
AD3 SMLINK0
SMLINK0
24 USB5+ A18 USBP5P
24 USB5- B18 USBP5N
A20M# V23 A20M# 4
23 USB6+ C17 USBP6P FERR# U24 FERR# 4
23 USB6- D17 USBP6N IGNNE# R21 IGNNE# 4
INIT# R23 HINIT# 4,25
23 USB7+ A16
B16
USBP7P INTR U23
R22
INTR 4 V5REF Sequencing Circuit
23 USB7- USBP7N NMI NMI 4
SMI# V24 SMI# 4
C15 D10 V5REF must be powered up before
24 USB_OC#1 OC0#
D15 P22 1N5817 5VREF R400 1K VCC3,or after within 0.7V
OC1# CPU_SLP# SLP# 4 VCC3 VCC5
D14 T24 C310 1U/0805
23 USB_OC#3 OC2# STPCLK# STPCLK# 4
C14 P23 KBRST#
OC3# RCIN# KBRST# 25
T22 A20GATE
A20GATE A20GATE 25
24 USB_OC#5 B14 OC4#/GPI9
A14 OC5#/GPI10 DPSLP# R24
23 USB_OC#7 D13 OC6#/GPI14 DPRSLPVR P20
C13 OC7#/GPI15
PWRBTN# Y4 PWRBTN# 25 * Put a GND Plane under X'TAL RTC BLOCK
R338 22.6RST USB_BIAS A24 * Please put this block close ICH5
B USBRBIAS ICH_PWROK 3VSB_ICH B
B24 USBRBIAS# PWROK AC12 ICH_PWROK 7,29
P24 CLR_CMOS
CPUPWRGD/GPO49 CPU_GD 4
F24 R20 VRM_GD modify, 0804/2003 1-2 Normal *
6 USB_48 CLK48 VGATE/VRMPWRGD VRM_GD 28,30

2
VBAT connect to MS8 2-3 Clear CMOS
U1 ICH_RST#
SYS_RESET# ICH_RST# 6,30
HL0 H20 AA12 RTCRST# 3
9 HL[0..10] HI0 RTCRST# VBAT
HL1 H21 AB13 RSMRST#
HI1 RSMRST# RSMRST# 29
HL2 J20 D16 The RC delay time should
HL3 HI2 BAT54C
H23 HI3 SLP_S3# W1 SLP_S3# 25,29 be in 10~20ms.
HL4

1
M23 HI4 SLP_S4# U2 SLP_S4# 29
HL5 M21 AA3 R499 22K J_RTCRST#
HI5 SLP_S5# SLP_S5# 25 1
HL6 N21 RTCRST# JBAT1
HL7 HI6 INTERVEN R359 390K R498 2 D1x3-BK
M20 HI7 INTERVEN AD10 VBAT 3
HL8 L22 1K C425 C419
HL9 HI8 INTRUDER# R358 1M
J22 HI9 INTRUDER# Y12 VBAT 1U/0805 105P
HL10 LINK_ALERT# R506 1K D17 R505
K21 HI10 LINKALERT# V5
HL11 G22 AC3 SIO_SMI#
HI11 SMBALERT#/GPI11 SIO_SMI# 25 SIO_VBAT
R337 61.9RST 4.7K
9 HL_STRF K23 HI_STBF CLK14 F20 ICH_14 6
1N5817
J24 Enable the integrated JBAT1(1-2)
9 HL_STRS HI_STBS
AC11 RTCX1 VCCSUS1_5 voltage ICH5 provide internal VBIAS circuit
H_COMP RTCX1 X_YJUMPER-MG
N24 HIRCOMP regulator
HL_SWING C286
9 HL_SWING L20 HI_VSWING
AB12 RTCX2 BAT1 RTCX2
HL_VREF RTCX2
9 HL_VREF L24 HIREF

1
AB3 RING# Y3 18p
RI# SPKR R354 32K-12.5pf-CSA-309-D
N22 E24
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

6 ICH_66 CLK66 SPKR SPKR 30


10M {PPM}
{CL} C289

2
A A
W16
W18
M11
M12
M13
M14
M22
M24
G20
G24

H19
H22

N11
N12
N13
N14
N20

R11
R14

U19
K11
K14
K20
K22
K24

P10
P11
P12
P13
P14
P15
P21

V21

Y10

Intel ICH5-N RTCX1


T23
L10
L11
L12
L13
L14
L15
L21
L23
J21
J23

M1
M5
G6

H1

K3

P1

V1

Y3
Y6
Y7
Y8
T3
T6
J6

{Priority}
18p

Micro Star Restricted Secret


Title Rev
H_COMP R341
Impedance is equal 60ohm.
52.3RST
VCC_AGP Intel ICH5 - Other signals 20A
HL_SWING C267 0.01u_X7R Document Number MS-6728
HL_VREF C269 0.01u_X7R MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 15 of 33
5 4 3 2 1
5 4 3 2 1

PCI SLOT 1 (PCI VER: 2.2 COMPLY) PCI SLOT 2 (PCI VER: 2.2 COMPLY) PCI SLOT 3 (PCI VER: 2.2 COMPLY)
-12V +12V -12V +12V -12V +12V
PCI1 PCI2 PCI3
B1 -12V TRST# A1 B1 -12V TRST# A1 B1 -12V TRST# A1
B2 TCK +12V A2 B2 TCK +12V A2 B2 TCK +12V A2
D B3 GND TMS A3 B3 GND TMS A3 B3 GND TMS A3 D
B4 TDO TDI A4 B4 TDO TDI A4 B4 TDO TDI A4
VCC5 B5 +5V +5V A5 VCC5 B5 +5V +5V A5 VCC5 B5 +5V +5V A5
B6 A6 PIRQ#A B6 A6 PIRQ#B B6 A6 PIRQ#C
PIRQ#B +5V INTA# PIRQ#C PIRQ#C +5V INTA# PIRQ#D PIRQ#D +5V INTA# PIRQ#A
B7 INTB# INTC# A7 B7 INTB# INTC# A7 B7 INTB# INTC# A7
PIRQ#D B8 A8 PIRQ#A B8 A8 PIRQ#B B8 A8
INTD# +5V VCC5 INTD# +5V VCC5 INTD# +5V VCC5
B9 PRSNT#1 RESERVED A9 B9 PRSNT#1 RESERVED A9 B9 PRSNT#1 RESERVED A9
B10 A10 VCC3 B10 A10 VCC3 B10 A10 VCC3
RESERVED +5V(I/O) RESERVED +5V(I/O) RESERVED +5V(I/O)
B11 PRSNT#2 RESERVED A11 B11 PRSNT#2 RESERVED A11 B11 PRSNT#2 RESERVED A11
B12 A12 3VDUAL B12 A12 3VDUAL B12 A12 3VDUAL
GND GND GND GND GND GND
B13 GND GND A13 B13 GND GND A13 B13 GND GND A13
VCC3 B14 A14 VCC3 B14 A14 VCC3 B14 A14
RESERVED RESERVED PCIRST#2 RESERVED RESERVED PCIRST#2 RESERVED RESERVED PCIRST#2
B15 GND RST# A15 PCIRST#2 17,29 B15 GND RST# A15 B15 GND RST# A15
6 PCI_CLK0 B16 CLK +5V(I/O) A16 6 PCI_CLK1 B16 CLK +5V(I/O) A16 6 PCI_CLK2 B16 CLK +5V(I/O) A16
B17 GND GNT# A17 P4GNT# 27 B17 GND GNT# A17 P5GNT# 27 B17 GND GNT# A17 PGNT#3 14
B18 A18 B18 A18 PREQ#3 B18 A18
27 P4REQ# REQ# GND 27 P5REQ# REQ# GND REQ# GND
B19 A19 B19 A19 PME# B19 A19 PME#
+5V(I/O) RESERVED PME# 12,13,14,17,21 +5V(I/O) RESERVED +5V(I/O) RESERVED
B20 A20 AD31 B20 A20 AD30 AD31 B20 A20 AD30
13,14,17,19,21 AD31 AD31 AD30 AD30 13,14,17,19,21 AD31 AD30 AD31 AD30
B21 A21 AD29 B21 A21 AD29 B21 A21
13,14,17,19,21 AD29 AD29 +3.3V AD29 +3.3V AD29 +3.3V
B22 A22 B22 A22 AD28 B22 A22 AD28
GND AD28 AD28 13,14,17,19,21 GND AD28 GND AD28
B23 A23 AD27 B23 A23 AD26 AD27 B23 A23 AD26
13,14,17,19,21 AD27 AD27 AD26 AD26 13,14,17,19,21 AD27 AD26 AD27 AD26
B24 A24 AD25 B24 A24 AD25 B24 A24
13,14,17,19,21 AD25 AD25 GND AD25 GND AD25 GND
B25 A25 B25 A25 AD24 B25 A25 AD24
+3.3V AD24 ID1 AD24 13,14,17,19,21 C_BE#3 +3.3V AD24 ID2 R355 330 AD17 C_BE#3 +3.3V AD24 ID3 R416 330 AD18
13,14,17,19,21 C_BE#3 B26 C/BE#3 IDSEL A26 B26 C/BE#3 IDSEL A26 B26 C/BE#3 IDSEL A26
B27 A27 R352 330 AD16 AD23 B27 A27 AD23 B27 A27
13,14,17,19,21 AD23 AD23 +3.3 AD23 +3.3 AD23 +3.3
B28 A28 B28 A28 AD22 B28 A28 AD22
GND AD22 AD22 13,14,17,19,21 GND AD22 GND AD22
B29 A29 AD21 B29 A29 AD20 AD21 B29 A29 AD20
13,14,17,19,21 AD21 AD21 AD20 AD20 13,14,17,19,21 AD21 AD20 AD21 AD20
B30 A30 AD19 B30 A30 AD19 B30 A30
13,14,17,19,21 AD19 AD19 GND AD19 GND AD19 GND
B31 A31 B31 A31 AD18 B31 A31 AD18
+3.3V AD18 AD18 13,14,17,19,21 +3.3V AD18 +3.3V AD18
B32 A32 AD17 B32 A32 AD16 AD17 B32 A32 AD16
13,14,17,19,21 AD17 AD17 AD16 AD16 13,14,17,19,21 AD17 AD16 AD17 AD16
B33 A33 C_BE#2 B33 A33 C_BE#2 B33 A33
13,14,17,19,21 C_BE#2 C/BE#2 +3.3V C/BE#2 +3.3V C/BE#2 +3.3V
C B34 A34 B34 A34 FRAME# B34 A34 FRAME# C
GND FRAME# FRAME# 13,14,17,19,21,27 GND FRAME# GND FRAME#
B35 A35 IRDY# B35 A35 IRDY# B35 A35
13,14,17,19,21 IRDY# IRDY# GND IRDY# GND IRDY# GND
B36 A36 B36 A36 TRDY# B36 A36 TRDY#
+3.3V TRDY# TRDY# 13,14,17,19,21 +3.3V TRDY# +3.3V TRDY#
B37 A37 DEVSEL# B37 A37 DEVSEL# B37 A37
13,14,17,19,21 DEVSEL# DEVSEL# GND DEVSEL# GND DEVSEL# GND
B38 A38 B38 A38 STOP# B38 A38 STOP#
GND STOP# STOP# 13,14,17,19,21,27 GND STOP# GND STOP#
B39 A39 LOCK# B39 A39 LOCK# B39 A39
14,17 LOCK# LOCK# +3.3V SDONE PERR# LOCK# +3.3V SDONE PERR# LOCK# +3.3V SDONE
13,14,17,21 PERR# B40 PERR# SDONE A40 SDONE 17 B40 PERR# SDONE A40 B40 PERR# SDONE A40
B41 A41 SBO# B41 A41 SBO# B41 A41 SBO#
+3.3V SBO# SBO 17 +3.3V SBO# +3.3V SBO#
B42 A42 SERR# B42 A42 SERR# B42 A42
13,14,17 SERR# SERR# GND SERR# GND SERR# GND
B43 A43 B43 A43 PAR B43 A43 PAR
+3.3V PAR PAR 13,14,17,19,21 +3.3V PAR +3.3V PAR
B44 A44 C_BE#1 B44 A44 AD15 C_BE#1 B44 A44 AD15
13,14,17,19,21 C_BE#1 C/BE#1 AD15 AD15 13,14,17,19,21 C/BE#1 AD15 C/BE#1 AD15
B45 A45 AD14 B45 A45 AD14 B45 A45
13,14,17,19,21 AD14 AD14 +3.3V AD14 +3.3V AD14 +3.3V
B46 A46 B46 A46 AD13 B46 A46 AD13
GND AD13 AD13 13,14,17,19,21 GND AD13 GND AD13
B47 A47 AD12 B47 A47 AD11 AD12 B47 A47 AD11
13,14,17,19,21 AD12 AD12 AD11 AD11 13,14,17,19,21 AD12 AD11 AD12 AD11
B48 A48 AD10 B48 A48 AD10 B48 A48
13,14,17,19,21 AD10 AD10 GND AD10 GND AD10 GND
B49 A49 B49 A49 AD9 B49 A49 AD9
GND AD9 AD9 13,14,17,19,21 GND AD9 GND AD9

B52 A52 AD8 B52 A52 C_BE#0 AD8 B52 A52 C_BE#0
13,14,17,19,21 AD8 AD8 C/BE#0 C_BE#0 13,14,17,19,21 AD8 C/BE#0 AD8 C/BE#0
B53 A53 AD7 B53 A53 AD7 B53 A53
13,14,17,19,21 AD7 AD7 +3.3V AD7 +3.3V AD7 +3.3V
B54 A54 B54 A54 AD6 B54 A54 AD6
+3.3V AD6 AD6 13,14,17,19,21 +3.3V AD6 +3.3V AD6
B55 A55 AD5 B55 A55 AD4 AD5 B55 A55 AD4
13,14,17,19,21 AD5 AD5 AD4 AD4 13,14,17,19,21 AD5 AD4 AD5 AD4
B56 A56 AD3 B56 A56 AD3 B56 A56
13,14,17,19,21 AD3 AD3 GND AD3 GND AD3 GND
B57 A57 B57 A57 AD2 B57 A57 AD2
GND AD2 AD2 13,14,17,19,21 GND AD2 GND AD2
B58 A58 AD1 B58 A58 AD0 AD1 B58 A58 AD0
13,14,17,19,21 AD1 AD1 AD0 AD0 13,14,17,19,21 AD1 AD0 AD1 AD0
B59 +5V(I/O) +5V(I/O) A59 B59 +5V(I/O) +5V(I/O) A59 B59 +5V(I/O) +5V(I/O) A59
B60 ACK64# REQ64# A60 B60 ACK64# REQ64# A60 B60 ACK64# REQ64# A60
B61 +5V +5V A61 B61 +5V +5V A61 B61 +5V +5V A61
B62 +5V +5V A62 B62 +5V +5V A62 B62 +5V +5V A62

YSLOT120 YSLOT120 YSLOT120


B B

IDSEL = AD16 IDSEL = AD17 IDSEL = AD18


MASTER = PREQ#1 MASTER = PREQ#2 MASTER = PREQ#3
PIRQ#A PIRQ#B PIRQ#C

PCI SLOT DECOUPLING CAPACITORS


PCI PULL-UP / DOWN RESISTORS
VCC5 VCC3 3VDUAL

DEVSEL# 2 1 PREQ#1 2 1 PIRQ#A 8 7 C282 C285 C283


VCC3 14,17 PREQ#1 VCC5 12,14,17 PIRQ#A VCC3
TRDY# 4 3 PREQ#0 4 3 PIRQ#D 6 5 X_104P X_104P X_104P
14,27 PREQ#0 14,17 PIRQ#D
IRDY# 6 5 RN75 PREQ#2 6 5 RN73 PIRQ#B 4 3 RN72 C332 C319 C370
14 PREQ#2 12,14,17 PIRQ#B
FRAME# 8 7 PREQ#3 8 7 2.7K PIRQ#C 2 1 8.2K X_104P X_104P X_104P
14 PREQ#3 14,17 PIRQ#C
SERR# 2 1 8.2K PIRQ#G 8 7 C303 C371
14,19 PIRQ#G
PERR# 4 3 PREQ#4 R366 2.7K PIRQ#H 6 5 X_104P X_104P
13,14,27 PREQ#4 14,19 PIRQ#H
LOCK# 6 5 RN76 PIRQ#E 4 3 RN79
13,14 PIRQ#E
STOP# 8 7 PREQ#5 R367 2.7K PIRQ#F 2 1 8.2K
14,19,27 PREQ#5 14,21 PIRQ#F
8.2K

A A

SDONE R453 X_0


Micro Star Restricted Secret
SMBCLK 6,13,15
SBO# R454 X_0
SMBDATA 6,13,15 Title Rev
PCI Slot 1 & 2 & 3 20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 16 of 33
5 4 3 2 1
5 4 3 2 1

-12V +12V -12V +12V


PCI4 PCI5
B1 -12V TRST# A1 B1 -12V TRST# A1
B2 TCK +12V A2 B2 TCK +12V A2
D B3 GND TMS A3 B3 GND TMS A3 D
B4 TDO TDI A4 B4 TDO TDI A4
VCC5 B5 +5V +5V A5 VCC5 B5 +5V +5V A5
B6 A6 PIRQ#D B6 A6 PIRQ#B
+5V INTA# PIRQ#D 14,16 +5V INTA#
PIRQ#A B7 A7 PIRQ#B PIRQ#C B7 A7 PIRQ#D
12,14,16 PIRQ#A INTB# INTC# PIRQ#B 12,14,16 INTB# INTC#
PIRQ#C B8 A8 PIRQ#A B8 A8
14,16 PIRQ#C INTD# +5V VCC5 INTD# +5V VCC5
B9 PRSNT#1 RESERVED A9 B9 PRSNT#1 RESERVED A9
B10 A10 VCC3 B10 A10 VCC3
RESERVED +5V(I/O) RESERVED +5V(I/O)
B11 PRSNT#2 RESERVED A11 B11 PRSNT#2 RESERVED A11
B12 A12 3VDUAL B12 A12 3VDUAL
GND GND GND GND
B13 GND GND A13 B13 GND GND A13
VCC3 B14 A14 VCC3 B14 A14
RESERVED RESERVED PCIRST#2 RESERVED RESERVED PCIRST#2
B15 GND RST# A15 PCIRST#2 16,29 B15 GND RST# A15
6 PCI_CLK3 B16 CLK +5V(I/O) A16 6 PCI_CLK4 B16 CLK +5V(I/O) A16
B17 GND GNT# A17 PGNT#1 14 B17 GND GNT# A17 PGNT#2 14
14,16 PREQ#1 B18 REQ# GND A18 14 PREQ#2 B18 REQ# GND A18
B19 A19 B19 A19 PME#
+5V(I/O) RESERVED PME# 12,13,14,16,21 +5V(I/O) RESERVED
B20 A20 AD31 B20 A20 AD30
13,14,16,19,21 AD31 AD31 AD30 AD30 13,14,16,19,21 AD31 AD30
B21 A21 AD29 B21 A21
13,14,16,19,21 AD29 AD29 +3.3V AD29 +3.3V
B22 A22 B22 A22 AD28
GND AD28 AD28 13,14,16,19,21 GND AD28
B23 A23 AD27 B23 A23 AD26
13,14,16,19,21 AD27 AD27 AD26 AD26 13,14,16,19,21 AD27 AD26
B24 A24 AD25 B24 A24
13,14,16,19,21 AD25 AD25 GND AD25 GND
B25 A25 B25 A25 AD24
+3.3V AD24 ID1 AD24 13,14,16,19,21 C_BE#3 +3.3V AD24 ID2 R417 330 AD21
13,14,16,19,21 C_BE#3 B26 C/BE#3 IDSEL A26 B26 C/BE#3 IDSEL A26
B27 A27 R418 330 AD19 AD23 B27 A27
13,14,16,19,21 AD23 AD23 +3.3 AD23 +3.3
B28 A28 B28 A28 AD22
GND AD22 AD22 13,14,16,19,21 GND AD22
B29 A29 AD21 B29 A29 AD20
13,14,16,19,21 AD21 AD21 AD20 AD20 13,14,16,19,21 AD21 AD20
B30 A30 AD19 B30 A30
13,14,16,19,21 AD19 AD19 GND AD19 GND
B31 A31 B31 A31 AD18
+3.3V AD18 AD18 13,14,16,19,21 +3.3V AD18
B32 A32 AD17 B32 A32 AD16
13,14,16,19,21 AD17 AD17 AD16 AD16 13,14,16,19,21 AD17 AD16
B33 A33 C_BE#2 B33 A33
13,14,16,19,21 C_BE#2 C/BE#2 +3.3V C/BE#2 +3.3V
C B34 A34 B34 A34 FRAME# C
GND FRAME# FRAME# 13,14,16,19,21,27 GND FRAME#
B35 A35 IRDY# B35 A35
13,14,16,19,21 IRDY# IRDY# GND IRDY# GND
B36 A36 B36 A36 TRDY#
+3.3V TRDY# TRDY# 13,14,16,19,21 +3.3V TRDY#
B37 A37 DEVSEL# B37 A37
13,14,16,19,21 DEVSEL# DEVSEL# GND DEVSEL# GND
B38 A38 B38 A38 STOP#
GND STOP# STOP# 13,14,16,19,21,27 GND STOP#
B39 A39 LOCK# B39 A39
14,16 LOCK# LOCK# +3.3V SDONE PERR# LOCK# +3.3V SDONE
13,14,16,21 PERR# B40 PERR# SDONE A40 SDONE 16 B40 PERR# SDONE A40
B41 A41 SBO# B41 A41 SBO#
+3.3V SBO# SBO 16 +3.3V SBO#
B42 A42 SERR# B42 A42
13,14,16 SERR# SERR# GND SERR# GND
B43 A43 B43 A43 PAR
+3.3V PAR PAR 13,14,16,19,21 +3.3V PAR
B44 A44 C_BE#1 B44 A44 AD15
13,14,16,19,21 C_BE#1 C/BE#1 AD15 AD15 13,14,16,19,21 C/BE#1 AD15
B45 A45 AD14 B45 A45
13,14,16,19,21 AD14 AD14 +3.3V AD14 +3.3V
B46 A46 B46 A46 AD13
GND AD13 AD13 13,14,16,19,21 GND AD13
B47 A47 AD12 B47 A47 AD11
13,14,16,19,21 AD12 AD12 AD11 AD11 13,14,16,19,21 AD12 AD11
B48 A48 AD10 B48 A48
13,14,16,19,21 AD10 AD10 GND AD10 GND
B49 A49 B49 A49 AD9
GND AD9 AD9 13,14,16,19,21 GND AD9

B52 A52 AD8 B52 A52 C_BE#0


13,14,16,19,21 AD8 AD8 C/BE#0 C_BE#0 13,14,16,19,21 AD8 C/BE#0
B53 A53 AD7 B53 A53
13,14,16,19,21 AD7 AD7 +3.3V AD7 +3.3V
B54 A54 B54 A54 AD6
+3.3V AD6 AD6 13,14,16,19,21 +3.3V AD6
B55 A55 AD5 B55 A55 AD4
13,14,16,19,21 AD5 AD5 AD4 AD4 13,14,16,19,21 AD5 AD4
B56 A56 AD3 B56 A56
13,14,16,19,21 AD3 AD3 GND AD3 GND
B57 A57 B57 A57 AD2
GND AD2 AD2 13,14,16,19,21 GND AD2
B58 A58 AD1 B58 A58 AD0
13,14,16,19,21 AD1 AD1 AD0 AD0 13,14,16,19,21 AD1 AD0
B59 +5V(I/O) +5V(I/O) A59 B59 +5V(I/O) +5V(I/O) A59
B60 ACK64# REQ64# A60 B60 ACK64# REQ64# A60
B61 +5V +5V A61 B61 +5V +5V A61
B62 +5V +5V A62 B62 +5V +5V A62

YSLOT120 YSLOT120
B B

IDSEL = AD19 IDSEL = AD21


MASTER = PREQ#4 MASTER = PREQ#5
PIRQ#D PIRQ#B

for EMI
VCC5
VCC3 VCC3

C404 C408 C376 C211 C284 C365 C260 C280 C305 C261 C405 C290

X_104P X_104P X_104P X_104P X_104P X_104P X_104P X_104P X_104P X_104P X_104P X_104P

A A
VCC5

Micro Star Restricted Secret


Title Rev
PCI Slot 4 & 5 & 6 / MS-1 20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 17 of 33
5 4 3 2 1
5 4 3 2 1

AUDIO CODEC JD0_MIC


C363 1U/0805 LFE-OUT
JD3
JD1_LOUT
LINE_NEXT_R
R456
R462
58_10K
55_10K
6
AUDIO1B

C362 1U/0805 CEN-OUT

C361 1U/0805 SROUT_R 7 LINE_OUT


VCC3 8
C360 1U/0805 SROUT_L LINE_NEXT_L

V_AUD
9
VCC3 17
CODEC VCC3_3 NEED CAP AS only for full spec C174 C170 AUDIO_6CH
C385 C377 102P
CLOSE AS POSSIBLE. SPDIFO 55_225P 58_225P 102P
SPDIFI EC52 ELS10/16/S LINE_OUT_R
default used
+
D C369 C358 D
X_104P R448 R520 +5VR
X_104P external 14.318 0/0805 X_0/0805 EC50 ELS10/16/S LINE_OUT_L
+

JD3
C366
For EMI
C341 C349 R461 R451 AUDIO1C
104P
X_22P X_22P 55_22K 55_22K LINE_IN_R

48
47
46
45
44
43
42
41
40
39
38
37
C353 U23 10
Y4
JD4 R436 58_10K

ID1#
ID0#
LFE_OUT

AVSS2
SROUT_L
AVDD2
CEN_OUT
SPDIFO
NC

NC
SROUT_R

MONO
104P JD2_LIN R433 55_10K 11 LINE_IN
X_24.576MHZ 12
C336 LINE_IN_L
R442 13
X_12P
18

1
X_10M 1 DVDD1 LOUTR 36 AUDIO_6CH
2 35 C350 C335 C183 C173
XTL_IN LOUTL FR_MIC 55_225P X_680P X_680P
3 XTL_OUT SMC 34

2
4 DVSS1 AVSS4/JS2 33
5 32 1U/0805 C346 55_105P FR_MIC2
14 AC_SDOUT SDATA_OUT VRDA
R434 22 6 31 JD4
14 AC_BITCLK BIT_CLK VRAD
7 DVSS2 AFILT2 30
R427 22 8 29
14 AC_SDIN2 SDATA_IN AFILT1
9 28 VREFOUT
DVDD2 VREF_OUT
14 AC_SYNC 10 SYNC VREF 27
14 AC_RST# 11 RESET# AVSS1 26
12 PC_BEEP AVDD1 25

+
C330 R425 C333 C334 C338 C340
EC47 104P 5.6K JD0_MIC R457 55_10K

CD_GND
105P 102P 102P 55_105P AUDIO1A

PHONE
C327

AUXR
AUXL
ELS10/16/S MIC2_IN

MIC1
MIC2

LINR
104P

CDR

LINL
CDL
1 14

JS1
JS0
C C

2 MIC_IN 15
6 AC_14 ALC655/658

13
14
15
16
17
18
19
20
21
22
23
24
4
MICIN 16
LINE_IN_R 5
C320
3

1
1U/0805 AUDIO_6CH
C378 C169 C168
JD2_LIN C321 LINE_IN_L VREFOUT R394 4.7K 55_225P X_680P X_680P

2
1U/0805
JD1_LOUT VREFOUTR396 4.7K

R411 R410
55_22K 55_22K
CP11 AGND

EMI X_COPPER
C323
1U/0805
MICIN
VCC5 L22 +5VR

1
C315 +12V +12VR 0
CP5 X_103P R398 U27
55_22K X_YLT1087S-0.8A
R481
AGND R519

2
3 VIN VOUT 2
X_COPPER
C322 MIC2_IN X_3.3/1206 EC54 X_0/0805

ADJ
1
CP9 1U/0805 C314 + +
C400
X_103P X_104P
AGND R395 EC55 R500 10U/16V/S
X_COPPER R379 4.7K 55_22K X_10U/16V/S
2

1
C324 X_100RST
CP12 4 JCD1
1U/0805 C417
3 YJ104-B AGND
2 104P
C325 R380 4.7K
B X_COPPER 1 B
1U/0805
VCC5

C439
C326 R381 4.7K JCD R518 R501
1U/0805 X_300RST

X_3.3/1206
R382 R384 R383
X_104P 47K 47K 47K V_AUD

AGND

AUDIO1D AUDIO1E +5VR


SROUT_R LFE-OUT LINE_OUT_L R503 X_0 LINE_NEXT_L FR_MIC
29 25

30 26 Remove R289 when install Front Audio JAUDIO


SR_OUT C/W_OUT R504 JAUD1
31 27 4.7K R441 X_0 1 MIC AUD_GND 2
SROUT_L CEN-OUT
32 28 FR_MIC2
33 23 Remove R291 when install Front Audio 3 MIC_BIAS AUD_VCC 4 +5VR
AUDIO_6CH AUDIO_6CH
C187 C186 C176 C175 LINE_OUT_R 5 6 LINE_NEXT_R
LINE_OUT_R R502 X_0 LINE_NEXT_R R497 AUD_FPOUT_R AUD_RET_R
X_102P X_102P X_102P X_102P 7 CUT 8
4.7K HP_ON
LINE_OUT_L 9 10 LINE_NEXT_L
+5VR AUD_FPOUT_L AUD_RET_L
C424 C420
A only for full spec C421 JAUD1 A
X_102P X_102P
C167
X_104P X_102P
AUDIO1F USB2B
VCC SPDIFO C364 1U/0805
20 9
SPDIF_OUT Micro Star Restricted Secret
21 SPDIF OUT
SPDIFO
19 GND
C166 R463 C99 LINE_OUT_R LINE_OUT_L FR_MIC Title Rev
22 GND X_102P
X_200R1% X_100P50N
10 C423 C418 C422
ADI 1980/1985 / Port 20A
24 RCA_USB JAUD1(5-6) JAUD1(9-10) Document Number MS-6728
AUDIO_6CH X_102P X_102P X_102P
X_YJUMPER-MG X_YJUMPER-MG MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 18 of 33
5 4 3 2 1
5 4 3 2 1

Serial ATA Controller


VCC3 SATA2_5 SATA2_5
RN92
L14 X_F301S0805 PHD9 1 2 R_PHD9
PHD6 3 4 R_PHD6
CP6 PHD8 R_PHD8
5 6
AD[31..0] PHD7 7 8 R_PHD7

G15
R10
R11
R14

N15

D15

N12
N13

C14

C15
13,14,16,17,21 AD[0..31]

P15

E15

K15

E13
K13

E11
E12
L15
M3

M5
D3

H3

R5
R8

R3
R4

C3
R9

N5
N6
N7
N9

C4
C5
U26

E3
K3

P3

E5

E6
E7
X_COPPER 8P4R-33
AD0 J16 RN90

VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3

VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25

VDDA
VDDA
VDDA
VDDA
VDDA
VDDA
VDDA
VDDA
AD1 AD0 PHD13 R_PHD13
J17 AD1 1 2
AD2 K17 PHD2 3 4 R_PHD2
AD3 AD2 PHD12 R_PHD12
K16 AD3 5 6
AD4 L16 C7 PHD3 7 8 R_PHD3
AD5 AD4 VDDA_T
L17 AD5 VDDA_T C9
D AD6 M17 C10 8P4R-33 D
AD7 AD6 VDDA_T RN89
M16 AD7 VDDA_T C12
AD8 N17 D9 PHD15 1 2 R_PHD15
AD9 AD8 VDDA_T PHD0 R_PHD0
P17 AD9 VDDA_T D10 3 4
AD10 P16 PHD14 5 6 R_PHD14
AD11 AD10 PHD1 R_PHD1
R16 AD11 7 8
AD12 R17 K2 PHD0
AD13 AD12 DD0/TXD1 PHD1 8P4R-33
T17 AD13 DD1/VALID H2
AD14 T16 G2 PHD2 RN91
AD15 AD14 DD2/RXD8 PHD3 PHD11 R_PHD11
U16 AD15 DD3/RXD6 E1 1 2
AD16 U13 D1 PHD4 PHD4 3 4 R_PHD4
AD17 AD16 DD4/RBC1 PHD5 PHD10 R_PHD10
T13 AD17 DD5/RXD4 C2 5 6
AD18 U12 B2 PHD6 PHD5 7 8 R_PHD5
AD19 AD18 DD6/RXD2 PHD7
T12 AD19 DD7/RXD0 B3
AD20 T11 A1 PHD8 8P4R-33
AD21 AD20 DD8/RXD1 PHD9
U11 AD21 DD9/RXD3 B1
AD22 U10 D2 PHD10 RN88
AD23 AD22 DD10/RBC0 PHD11 PDMACK# RPDMACK#
T10 AD23 DD11/RXD5 E2 1 2
AD24 U8 F2 PHD12 PHIORDY 3 4 RHIORDY
AD25 AD24 DD12/RXD7 PHD13 PHIOW# RPHIOW#
T8 AD25 DD13/RXD9 G1 5 6
AD26 T7 J2 PHD14 PHIOR# 7 8 RPHIOR#
AD27 AD26 DD14/TXD0 PHD15
U7 AD27 DD15/TXD2 K1
AD28 T6 8P4R-33
AD29 AD28 PDMARQ
U5 AD29 DDREQ G3
AD30 U4 N3 PDMACK# RN87
C_BE#[3..0] AD31 AD30 DDACK/TBC1 PHIOR# PHCS1# RPHCS1#
13,14,16,17,21 C_BE#[0..3] T5 AD31 DIOR/HDMARDY/HSTROBE/TXD4 L1 1 2
L2 PHIOW# PHCS0# 3 4 RPHCS0#
C_BE#0 DIOW/STOP/TXD3 PHIORDY PHDA0 RPHDA0
N16 C_BE0 DRDY/DDMARDY/DSTROBE/TBC0 M2 5 6
C_BE#1 U17 P2 PHCS0# PHDA2 7 8 RPHDA2
C_BE#2 C_BE1 DCS0/TXD8 PHCS1#
T14 C_BE2 DCS1/TXD9 R2
C_BE#3 U9 N2 PHDA0 8P4R-33
C C_BE3 PA0/TXD6 PHDA1 C
DA1/TXD5 N1
FRAME# U14 P1 PHDA2 PHDA1 R428 33 RPHDA1
13,14,16,17,21,27 FRAME# FRAME DA2/TXD7
DEVSEL# R13 J3 PINTR# PDMARQR430 33 RPDMARQ
13,14,16,17,21 DEVSEL# DEVSEL INTRQ
IRDY# R12 F3 DRVRST#
13,14,16,17,21 IRDY# IRDY DEVRST
TRDY# T15 L3 CABDET
13,14,16,17,21 TRDY# TRDY CABDET
STOP# U15 H1 R439 4.7K
13,14,16,17,21,27 STOP# STOP REFCLK VCC5
PAR R15
13,14,16,17,21 PAR PAR
AD25 R455 100 T9 A3 R446 4.7K
IDSEL VREF R440 4.7K
COMPP T1
14,16,27 PREQ#5 R7 PREQL
modify, 0804/2003 14 R6 R432
PGNT#5 PGNTL
PIRQ#G U1 B13 RXP_1 C393 122P RXP1 1K
14,16 PIRQ#G INTA RXP1
T2 A13 RXN_1 C388 122P RXN1 IDE3
14,16 PIRQ#H INTB RXN1
C13 RXCMB1 C387 103P DRVRST#
PCIRST#1 RXCMB1 R431 2.2K R_PHD7 1 2 R_PHD8
29 PCIRST#1 U2 PCIRST 3 4
SATA_PCLK T4 A11 TXP_1 C383 104P TXP1 R_PHD6 R_PHD9
6 SATA_PCLK PCICLK TXP1 5 6
B11 TXN_1 C381 104P TXN1 R_PHD5 R_PHD10
SATA2_5 TXN1 TXCMB1 C384 103P R_PHD4 7 8 R_PHD11
TXCMB1 C11 modify, 0804/2003 9 10
L15 X_F301S0805 U3 VCC3 R_PHD3 R_PHD12
VDDP RXP_2 C359 122P RXP2 R_PHD2 11 12 R_PHD13
RXP2 A6 13 14
CP7 X_COPPER B6 RXN_2 C368 122P RXN2 VCC5 R_PHD1 R_PHD14
RXN2 RXCMB2 C355 103P R510 R_PHD0 15 16 R_PHD15
T3 GNDP RXCMB2 C6 17 18
TXP_2 C379 104P TXP2 VCC5 4.7K RPDMARQ 19 20
F15 EECS TXP2 B8 21 22
F17 A8 TXN_2 C375 104P TXN2 RPHIOW#
EESK TXN2 TXCMB2 C372 103P R429 RPHIOR# 23 24
F16 EEDI TXCMB2 C8 25 26 R426
G17 RHIORDY
EEDO XTLO R699 X_10K RPDMACK# 27 28
XO B16 29 30
4.7K PINTR# 470
J15 LFRAME 31 32
H15 A15 XTLI SATA2_5 RPHDA1 CABDET
LAD3 XI RPHDA0 33 34 RPHDA2
H16 LAD2 35 36
B L17 X_F301S0805 RPHCS0# RPHCS1# B
H17 LAD1 37 38
modify, 0804/2003 G16 A17 CP10 X_COPPER
LAD0 VDDAO 30 HD_LED 39 40
GNDAO A16
R445 4.7K A4 A_YJ220-CB
R484 4.7K ATPGEN R472 4.64KST R473 1.02KST VCC5 R527
E17 TESTMODE REXT B15
R511 4.7K C16
R512 4.7K TEST0 R485 4.7K 10K
C17 TEST1
R513 4.7K D16 U6 R450 4.7K
R474 4.7K TEST2 TCLK
D17 TEST3 GPIO1 B17 HD_ACT 30
R483 4.7K E16 B4
TEST4 GPIO2
GNDA_T
GNDA_T
GNDA_T
GNDA_T
GNDA_T
GNDA_T
SATA3
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA

R443 X_4.7K 1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

TXP1 GND
2 HT+
TXN1 3 HT-
M15

G10
G11

H10
H11

K10
K11

B12
A14
B14

A12
B10
A10

VT6420
L10
L11
J10
J11

4
M1

G7
G8
G9
C1

R1

H7
H8
H9
A2

K7
K8
K9

A5
B5
A7

B9
A9
B7
F1

L7
L8
L9

GND
J1

J7
J8
J9

RXN1 5
RXP1 HR-
6 HR+
7 GND
VCC3 SATA

SATA4
1 GND
TXP2 2
C344 C402 C259 C342 C343 TXN2 HT+
3 HT-
4 GND
1u 1u X_1u 1u 1u RXN2 5
RXP2 HR-
6 HR+
7 GND
A
XTLO C395 16P A
SATA
SATA2_5

Y6
25MHZ Micro Star Restricted Secret
C345 C357 C398 C399 C397 C347 C356 C373 Title Rev

104P 104P 104P 1u 1u 1u 1u 1u


XTLI C396 16P Serial ATA Controller 20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 19 of 33
5 4 3 2 1
5 4 3 2 1

ATA 33/66/100 Connector

PRIMARY IDE BLOCK SECONDARY IDE BLOCK

D IDE2 D
IDE1 YJ220-CW-1
YJ220-CB-1 HD_RST# R210 33 HDRST#S 1 2
R208 33 HDRST#P 1 2 SDD7 3 4 SDD8
29 HD_RST# 14 SDD[0..7] SDD[8..15] 14
PDD7 3 4 PDD8 SDD6 5 6 SDD9
14 PDD[0..7] PDD[8..15] 14
PDD6 5 6 PDD9 SDD5 7 8 SDD10
PDD5 7 8 PDD10 SDD4 9 10 SDD11
PDD4 9 10 PDD11 SDD3 11 12 SDD12
PDD3 11 12 PDD12 SDD2 13 14 SDD13
PDD2 13 14 PDD13 SDD1 15 16 SDD14
PDD1 15 16 PDD14 SDD0 17 18 SDD15
PDD0 17 18 PDD15 19
19 14 SD_DREQ 21 22
14 PD_DREQ 21 22 14 SD_IOW# 23 24
14 PD_IOW# 23 24 14 SD_IOR# 25 26
14 PD_IOR# 25 26 14 SD_IORDY 27 28
14 PD_IORDY 27 28 14 SD_DACK# 29 30
14 PD_DACK# 29 30 14 IRQ15 31 32
14 IRQ14 31 32 14 SD_A1 33 34 SD_DET 25
14 PD_A1 33 34 PD_DET 25 14 SD_A0 35 36 SD_A2 14
14 PD_A0 35 36 PD_A2 14 14 SD_CS#1 37 38 SD_CS#3 14
14 PD_CS#1 37 38 PD_CS#3 14 30 SD_LED 39 40
30 PD_LED 39 40

R114 R142 R150 C109 R134


R110 R111 R144 C112 R119 4.7K 8.2K 4.7K X_4700p_X7R 15K
4.7K 8.2K 4.7K X_4700p_X7R 15K
VCC5 VCC5
VCC5 VCC5

C C

SERIAL ATA CONNECTOR BLOCK

SATA1 SATA2
1 GND 1 GND
15 SATA_TX0 2 HT+ 15 SATA_TX1 2 HT+
15 SATA_TX#0 3 HT- 15 SATA_TX#1 3 HT-
4 GND 4 GND
15 SATA_RX#0 5 HR- 15 SATA_RX#1 5 HR-
15 SATA_RX0 6 HR+ 15 SATA_RX1 6 HR+
7 GND 7 GND
SATA SATA
B B

FM8 FM5 FM4 FM1 FM12 FM6 FM10 FM14

X X X X X X X X

X_FM X_FM X_FM X_FM X_FM X_FM X_FM X_FM

FM11 FM13 FM15 FM17 FM9 FM7

Simulation
X X X X X X

7
X_FM X_FM X_FM X_FM X_FM X_FM
9 6 9 6 9 6
Optics Orientation Holes Mounting Holes 2 5 2 5 2 5

MH3 MH6 MH9


FM2 FM3 FM16 FM18 J1 J2
3

4
SIM2
VCC5
SIM1
X X X X
A A
X_PIN1*2 X_PIN1*2
8

7
X_FM X_FM X_FM X_FM
9 6 9 6 9 6 9 6 9 6 9 6
FM21 FM20 FM22 FM19 Micro Star Restricted Secret
2 5 2 5 2 5 2 5 2 5 2 5
Title Rev
X X X X MH1 MH4 MH8 MH2 MH5 MH7
ATA 33/66/100 Connector 20A
Document Number MS-6728
3

X_FM X_FM X_FM X_FM MICRO-STAR INT'L Last Revision Date:


CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 20 of 33
5 4 3 2 1
5 4 3 2 1

1394a OHCI Link Layer Controller +12V D14


F4
A C CPWR CPWR_0

A_BRS340-S-CASE403-03 YFUSE2AS-P C410


C380
EC53 103P
VCC3 P3VA 102P
X_470U/35V

D TPBIAS0 R467 54.9RST TPA0+ D

102
113
125

114
R466 54.9RST TPA0-

20
33

35

24

39
49

62
65
76
75
90
89
8
AD[31..0] U24 C401 R465 54.9RST TPB0+
13,14,16,17,19 AD[0..31]
R477 4.99KST R464 54.9RST TPB0-

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6

VDDC1
VDDC2

PVDD1
PVDD2

VDDATX0
VDDARX0
VDDATX1
VDDARX1
VDDATX2
VDDARX2
RAMVDD
AD31 97 74 TPBIAS0 334P
AD30 AD31 XTPBIAS0 TPA0+
98 AD30 XTPA0P 73
AD29 99 72 TPA0-
AD28 AD29 XTPA0M TPB0+
100 AD28 XTPB0P 71
AD27 101 70 TPB0-
AD26 AD27 XTPB0M
104 AD26
AD25 105 81 TPBIAS1 J1394_1
AD24 AD25 XTPBIAS1 TPA1+ TPA0+ TPA0-
106 AD24 XTPA1P 80 1 2
AD23 109 79 TPA1-
AD22 AD23 XTPA1M TPB1+ TPB0+ 3 4 TPB0-
110 AD22 XTPB1P 78 5 6
AD21 112 77 TPB1- CPWR_0 CPWR_0
AD20 AD21 XTPB1M 7 8
116 AD20 9 10
AD19 117 88
AD18 AD19 XTPBIAS2
118 87 YJ205
AD17 AD18 XTPA2P
119 AD17 XTPA2M 86
AD16 120 85
AD15 AD16 XTPB2P
5 AD15 XTPB2M 84
AD14 6 R460 11KST CPWR
AD13 AD14
7 AD13
AD12 10 63 R459 1KST
AD11 AD12 XCPS
11 AD11
AD10 12 F3
AD9 AD10 R476 6.34K CPWR CPWR_1
13 AD9 XREXT 66
AD8 14
AD7 AD8 C390 YFUSE2AS-P C407
17 AD7
AD6 C351
18 AD6 D6/CMCJMP 52
AD5 19 58 47P 103P
C AD4 AD5 PHYRESET C
21 AD4
AD3 22 54 104P
AD2 AD3 CTL0/PC0JMP
23 AD2 CTL1/PC1JMP 55
AD1 27 53
C_BE#[3..0] AD0 AD1 D7/PC2JMP TPBIAS1 R471 54.9RST TPA1+
13,14,16,17,19 C_BE#[0..3] 28 AD0
57 R470 54.9RST TPA1-
C_BE#3 LINKON/TSIJMP C394 R469 54.9RST TPB1+
107 CBE3# LREQ/TSOJMP 56
C_BE#2 122 51 R475 4.99KST R468 54.9RST TPB1-
C_BE#1 CBE2# D5 P3VA 334P
4 CBE1# D4 48
C_BE#0 15 47
CBE0# D3 R437 2K
D2 46
PAR 3 45
13,14,16,17,19 PAR PAR D1
FRAME# 123 44
13,14,16,17,19,27 FRAME# FRAME# D0
IRDY# 124 43
13,14,16,17,19 IRDY# IRDY# MODE0
TRDY# 126 42
13,14,16,17,19 TRDY# TRDY# MODE1
STOP# 128 40
13,14,16,17,19,27 STOP# STOP# SCLK
AD26 R452 100 108 38
DEVSEL# IDSEL LPS/CMC
13,14,16,17,19 DEVSEL# 127 DEVSEL# NC 67
PCI6REQ# 96 J1394_2
27 PCI6REQ# REQ#
PCI6GNT# 95 32 EECK TPA1+ TPA1-
27 PCI6GNT# GNT# SCL/EECK P3VA 1 2
PERR# 2 31 EEDI
13,14,16,17 PERR# PERR# SDA/EEDI 3 4
PIRQ#F 91 30 TPB1+ TPB1-
14,16 PIRQ#F INTA# EEDO 5 6
29 R526 X_4.7K CPWR_1 CPWR_1
1394_PCLK EECS 7 8
6 1394_PCLK 93 PCICLK 9 10
C354 10P
PCIRST#1 92 60 YJ205
29 PCIRST#1 PCIRST# XI
GNDARX0
GNDARX1

GNDARX2

PME# R422 X_0 R449 Y5


GNDATX0

GNDATX1

GNDATX2

37
12,13,14,16,17 PME# PME# RAMVSS 24M-16pf

PGND1
PGND2
115 VSSC1 For Intel 1394 pinheader
36 VSSC2
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

61 1M
XO C367 10P
B R421 X_4.7K B
VCC3
VT6307
103
111
121
94

16
26
34

59
64
68
69
82
83

25

41
50
1
9

VCC3
VCC3 VCC3

C382 C352 C339 C331 C316 C328 C329


R424 R423
104P 104P 104P 104P X_104P 104P 104P
VCC3 P3VA 4.7K 4.7K
A A
L16
P3VA VCC3
U21
X_L02-8008044-J07 EECK 6 8
EEDI SCLK VCC
CP8 C374 C389 C348 C392 C337 C391
5 SDA Micro Star Restricted Secret
A0 1
A1 2 Title Rev
104P 104P 104P 104P 104P 104P
R414 510 A2 3 1394a Link Layer Controller 20A
7 WP GND 4
X_COPPER Document Number MS-6728
X_ATMEL AT24C02
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 21 of 33
5 4 3 2 1
5 4 3 2 1

R208,209,213 change to 0 ohm for springdale PE

Video Connector
close chip close VGA connector
L6 0.082u
VCC3 VCC3 VCC5 VCC3 VCC3 VCC5 9 CRT_R

2
VCC_AGP

2
D C78 C77 D
3 R189 3.3p 3.3p
R204 R200 R203 R198 D8

1
2.7K 8.2K 2.7K 8.2K BAV99 0
Q25 Q24 for PE

1
5VDDCCL 5VDDCDA
9 3VDDCCL 9 3VDDCDA
L5 0.082u
9 CRT_G

2
R206 NDS7002AS R205 NDS7002AS
VCC_AGP

2
0 0 C76 C75
for PE for PE 3 R188 3.3p 3.3p
D7

1
BAV99 0
for PE

1
L4 0.082u
9 CRT_B

2
VCC_AGP

2
C73 C72
3 R187 3.3p 3.3p
D6

1
BAV99 0
for PE

1
R105 22
1.1A-S C70
C79 X_104P FS1
VCC5 VCC5
JVGA1
5 0.1u 17
C 1 R104 C
4 5V_HSYNC
CRT_HSYNC 2 5VDDCCL R99 22 VGA_15 15 5
9 CRT_HSYNC
U8 X_22 10
X_NC7WZ08 5V_VSYNC 14 4
VGA_9
3

9
5V_HSYNC 13 3 VGA_B
8
R100 22 5VDDCDA R98 22 VGA_12 12 2 VGA_G
7
11 1 VGA_R
VCC5 U7

7
5
3
1
6
5

CN8
1 R103 5VDDCCL 5 4 100p
5V_VSYNC 5VDDCDA VO4 VO3
4 6 VO5 VN 3 16
CRT_VSYNC 5V_HSYNC

8
6
4
2
9 CRT_VSYNC 2 VCC5 7 VP VO2 2
U6 X_22 8 1 5V_VSYNC
X_NC7WZ08 VO6 VO1
VGA-D15-BL-B-SC
3

X_DN006S

VCC5

B B

C142 C15
X_104P X_103P

For Springdale G

A A

Micro Star Restricted Secret


Title Rev
VGA PORT 20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 22 of 33
5 4 3 2 1
5 4 3 2 1

FRONT USB PORT 5VDUAL


F5
USB_VCC

2.6A-MINISMDM260-S

If install JUSB2 must change FS5 to 2.6A


R490 + C411
2.7K EC56 104P
470U/10V
D D
USB_OC#7
15 USB_OC#7

C406 R491
104P 5.1K

JUSB1

USB_D7- 1 2 USB_D6-
USB_D7+ 3 4 USB_D6+
5 6
L18 7 8 USB_OC#7
9 10
USB7- 1 8 USB_D7- YJ205
15 USB7-
USB7+ 2 7 USB_D7+
15 USB7+
USB6- 3 6 USB_D6-
15 USB6-
USB6+ USB_D6+
15 USB6+ 4 5 USB 2.0 PIN HEADER
(Yellow)
X_CMC-L02-9007030-C71

RN93
USB7- 1 2 USB_D7-
USB7+ 3 4 USB_D7+
C USB6- 5 6 USB_D6- C
USB6+ 7 8 USB_D6+

X_8P4R-0

USB_VCC

R488 C414
2.7K X_104P

USB_OC#3
B 15 USB_OC#3 B

C403 R487
104P 5.1K

JUSB2

USBF_D2- 1 2 USBF_D3-
USBF_D2+ 3 4 USBF_D3+
5 6
7 8 USB_OC#3
9 10
YJ205
L19

USB3+ USBF_D3+
15 USB3+
USB3-
1
2
8
7 USBF_D3-
USB 2.0 PIN HEADER
15 USB3- (Yellow)
USB2+ 3 6 USBF_D2+
15 USB2+ USB2- USBF_D2-
15 USB2- 4 5

X_CMC-L02-9007030-C71

RN94
A
USB3+ 1 2 USBF_D3+ A
USB3- 3 4 USBF_D3-
USB2+ 5 6 USBF_D2+
USB2- 7 8 USBF_D2-

X_8P4R-0 Micro Star Restricted Secret


Title Rev
Front USB Port
* USB Trace width : 7.5 mils 20A
Document Number MS-6728
* USB Trace Spacing : 20 mils MICRO-STAR INT'L Last Revision Date:
* Differential USB Signlas Trace, Spacing : 7.5 mils CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
Monday, September 01, 2003

http://www.msi.com.tw 23 of 33
5 4 3 2 1
5 4 3 2 1

REAR USB PORT


5VDUAL
F2

1.5A-S C117
+
R140 EC22 X_104P
2.7K 470U/10V
D D
USB_OC#5
15 USB_OC#5

R148
C119 5.1K
104P

STACKED USB CONNECTOR


L9 LAN_USB1A
5 23
1 8 USB_D5+ USB_D4- 6 24
15 USB5+
2 7 USB_D5- USB_D4+ 7 25
15 USB5-
15 USB4+ 3 6 USB_D4+ 8 UP 26
4 5 USB_D4- 1 27
15 USB4- USB_D5- 2 28
USB_D5+ 3 29
X_CMC-L02-9007030-C71 4 DOWN 30

X_USB/NET_6

RN57
1 2
3 4
5 6
C 7 8 C

X_8P4R-0

5VDUAL KBVCC
F1

2.6A-MINISMDM260-S
R9
C7
X_104P
R11 + X_47K
B 2.7K EC15 B
470U/10V

USB_OC#1
15 USB_OC#1

L7 R10
C11
5.1K
104P
1 8 USB_D0-
15 USB0- USB_D0+
15 USB0+ 2 7
3 6 USB_D1-
15 USB1- USB2A
4 5 USB_D1+
15 USB1+
USB_D1- 5 13
X_CMC-L02-9007030-C71 USB_D1+ 6
7
8 14
1
RN43
2 USB_D0-
UP
USB_D0+ USB_D0- 1 11
3 4 2
5 6 USB_D1- USB_D0+
3
7 8 USB_D1+
4 DOWN 12
X_8P4R-0
RCA_USB

VCC5 VCC5
A A

C105 C135 Micro Star Restricted Secret


X_104P X_104P
Title Rev
Rear USB Port 20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 24 of 33
5 4 3 2 1
5 4 3 2 1

Super I/O LPC SUPER I/O W83627F/HF/THF FLOPPY CONNECTOR Intel Front IR Header
83627THF FDD1

R387 X_0 1 2 DRVDEN0


U4 SIO_SMI# 15 VCC5
4
PCIRST#1 30 1 DRVDEN0 5 6
29 PCIRST#1 LRESET# DRVDEN0 INDEX#
6 SIO_PCLK 21 LCLK DRVDEN1(SMI#) 2 7 8
23 3 INDEX# 9 10 MOT_A# JIR1
15 SERIRQ LPC_DRQ#0 22 SERIRQ INDEX# MOT_A# DRV_B#
15 LPC_DRQ#0 LDRQ# MOA# 4 11 12 1 1
LPC_FRAME# 29 5 R39 X_0 DRV_B# 13 14 DRV_A# 3 4
15,27 LPC_FRAME# LFRAME# FANIO3/DSB# 3 4
D 6 DRV_A# 15 16 MOT_B# VCC5 IRTX 5 6 IRRX D
LPC_AD0 DSA# MOT_B# DIR# 5 6
15,27 LPC_AD0 27 LAD0 FANPWM3/MOB# 7 FANIO3 26 17 18
LPC_AD1 DIR# STEP# RN13 CON2X3A
15,27 LPC_AD1 26 LAD1 DIR# 8 19 20
LPC_AD2 25 9 STEP# 21 22 WT_DT# INDEX# 7 8
15,27 LPC_AD2 LAD2 STEP#
LPC_AD3 24 10 WT_DT# 23 24 WT_EN# TRACK0# 5 6
15,27 LPC_AD3 LAD3 WRDATA#
11 WT_EN# 25 26 TRACK0# FDD_WP# 3 4
WE# TRACK0# FDD_WP# RDATA#
125 GPX2/P15/GP14 TRACK0# 13 27 28 1 2
123 14 FDD_WP# 29 30 RDATA# DSKCHG#
GPY1/GP15 WP# RDATA# HEAD# R24 X_150
128 GPSA1/P12/GP10 RDDATA# 15 31 32
121 16 HEAD# 33 34 DSKCHG# X_150
27 VLED2 GPSA2/GP17 HEAD#
126 17 DSKCHG#
GPX1/P14/GP12 DSKCHG#
124 GPY2/P16/GP14
127 42 PRD0 CN-BH-D2x17-1:3-BK
GPSB1/P13/GP11 PD0 PRD1
27 VLED1 122 GPSB2/GP16 PD1 41
PRD2
120
119
MSO/IRQIN0 PD2 40
39 PRD3 FWH DECOUPLING CAPACITORS
MSI/GP20 PD3 PRD4
R56 30K TMP_VREF 101
PD4 38
37 PRD5 BIOS PROTECT BLOCK Place Cap. as Close to FWH< 350 mil
SYS_TMP VREF PD5 PRD6 C311
102 VTIN3 PD6 36
NB_TMP 103 35 PRD7 VCC3
VTIN2 PD7 PRD[0..7] 26
4 CPU_TMPA
CPU_TMPA 104 VTIN1 SLCT 31 RSLCT
RSLCT 26 BIOS Update Config.

For W83627HF only, in 83627F are NC


93 32 RPE 10U/1206
AGND PE RPE 26
94 33 RBUSY
-5VIN BUSY RBUSY 26
C40 95 -12VIN ACK# 34 RACK#
RACK# 26 HIGH Un_protected Firware Hub (FWH) C306 C302
3300P 96 43 RSLIN# X_104P 104P
+12VIN SLIN# RSLIN# 26
To CPU -12VIN 97 44 RINIT#
AVCC INIT# RINIT# 26 VCC3
4 VTIN_GND
VTIN_GND +12VIN 98 +3.3VIN ERR# 45 RERR#
RERR# 26 LOW Protected Default
99 46 RAFD# BIOS1
VCC3 VCOREB AFD# RAFD# 26
100 47 RSTB# 1 32
VCCP VCOREA STB# RSTB# 26 VCC3 VPP VCC
2 31 FWH_PCLK
12,14,29 PCIRST_ICH5# RST# CLK FWH_PCLK 6
SVID4 106 88 IRRX PRES3 3 30 PRES4
C SVID3 VID4 IRRX/GP25 PRES2 FGPI3 FGPI4 C
107 VID3 CIRRX/GP34 69 DLED3 27 4 FGPI2 IC(VIL) 29
SVID2 108 87 IRTX SD_DET 5 28
SVID1 VID2 IRTX/GP26 R374 X_0 20 SD_DET PD_DET FGPI1 GNDA
109 VID1 SUSCLKIN(SLP_S5#) 75 SUSCLK 15 20 PD_DET 6 FGPI0 VCCA 27
SVID[0..5] SVID0 110 R388 X_0 BIOS_WP# 7 26
27 SVID[0..5] VID0 SLP_S5# 15 JBIOS1 15 BIOS_WP# WP# GND
DCDA# 56 DCDA# 26 8 TBL# VCC 25
116 50 9 24 FWH_INIT#
26 FANPWM1 FANPWM1 DSRA# DSRA# 26 1 ID3 INIT#
113 53 83627THF 10 23 LPC_FRAME#
26 FANIO1 FANIO1 SINA SINA 26 2 ID2 FWH4
115 51 RTSA# ICH5 GPO19 default value is HIGH 11 22
26 FANPWM2 FANPWM2 RTSA# RTSA# 26 ID1 RFU
112 54 SOUTA 12 21
26 FANIO2 FANIO2 SOUTA SOUTA 26 ID0 RFU
R51 X_0 TUR# 111 49 YJ102 LPC_AD0 13 20
15 THRM# OVT# CTSA# CTSA# 26 FWH0 RFU
52 LPC_AD1 14 19
DTRA# DTRA# 26 FWH1 RFU
SVID5 105 57 15 18
OVT#(VID5) RIA# RIA# 26 27 FWH_AD2 FWH2 RFU
TUR# 118 16 17
6 TUR# BEEP VCC5 GND FWH3 FWH_AD3 27
CHASSIS 76 84 R19 4.7K
CASEOPEN# DCDB# BIOS_4Mbit
15 SIO_PME# 19 PME# DSRB# 79 THF/NHF install R85
82 2 1 {Priority}
SINB VCC5
27 DLED1 89 WDTO/GP24 RTSB# 80 4 3
91 83 SOUTB 6 5
SDA/GP22 SOUTB
92 SCL/GP21 CTSB# 78 8 7
81 RN96 4.7K
DTRB#
15 PWRBTN# 67 PSOUT# RIB# 85
68
30 PWRBTIN
64
PSIN
59
FWH Resistors INIT signal voltage translation VCC3
SUSLED/GP35 GA20 A20GATE 15
27 DLED4 90 PLED/GP23 KBRST 60 KBRST# 15
72 63 KBDAT# close to FWH
30 PS_ON# PWRCTL#/GP31 KBDATA KBDATA 26
73 62 KBCLK# default is high
15,29 SLP_S3# SUSCIN/GP30 KBCLK KBCLK 26
18 66 MSDAT# BIOS_WP# R393 X_8.2K R364
6 SIO_48 CLKIN MSDATA MSDATA 26 VCC3
65 MSCLK# R351 330
MSCLK MSCLK 26
61 58 BEEP PRES3 R403 1K 2.2K
VCC5_SB VSB KBLOCK#(BEEP) VCC5 VCC5 FWH_INIT#
SIO_VBAT 74 VBAT For Hi performace BIOS
C6 70
B RSMRST#/GP33 DLED2 27 detect stuff R458 B
28 71 Reservered GPI R401 X_1K Q45
VCC3 VCC3 PWROK/GP32 VCC3
104P PRES4 2N3904S
12 20 SIO_VBAT VCC5 C154 C63
VCC5 VCC_1 VSS1
48 55 R402 1K R350 330 Q44
VCC_2 VSS2 X_104P X_104P 4,15 HINIT#
C14 77 86 C27 2N3904S
VTIN_VCC VCC_3 VSS3 VTIN_GND X_104P
114 VCC_4 VSS4(AGND) 117
104P C13 C5 Reservered GPI R405 1K
VCC3
X_100p X_104P PRES2
WB-W83627HF-AW-VG C17
X_104P R404 X_1K For SI BIOS detect
stuff R457

LPC I/O STRAPPING RESISTOR Thermal Resistor


R62 0 R59 X_0
VCC5 VCC5_SB
R6 4.7K SOUTA
VCC5 R33
+12V 1 2 28K +12VIN
R21 4.7K SOUTB CP1 X "N"HF install
VCC5 R27
-12V 1 2 232K -12VIN
R7 X_4.7K RTSA# VTIN_VCC R124, removed
VCC5 C39 R37
R121 -5V 1 2 X_120K -5VIN
SOUTA L: Disable KBC H: Enable KBC 104P FB5 X
SOUTB L: 24MHZ H: 48MHZ THF/NHF
RTSA# L: CFAD=2E H: CFAD=4E VTIN_GND FB6 X
remove

1
DTRA# L: PNP Default H: PNP no Default

1
CP2 X R38 R31
R30 X_56K 56K
10K
A SPEAKER BLOCK Chasiss Intrusion A

2
VTIN_GND TMP_VREF

2
VCC5 SIO_VBAT TMP_VREF TMP_VREF

R47 R525 Micro Star Restricted Secret


R479 10K X_10K
ALARM 30
10K R17 Title Rev
C

BEEP
R482
JCI1
2M SYS_TMP NB_TMP W627THF LPC I/O / FWH 20A
B
1 1 CHASSIS Document Number MS-6728
4.7K Q51 2 RT1 RT2
2
MICRO-STAR INT'L
E

N31-1020011-C09 Last Revision Date:


YT103S-1N X_YT103S-1N
NOTE: LOCATE CLOSE CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
NPN-MBT3904LT1-S-SOT23 D1x2-BK VTIN_GND VTIN_GND Taipei Hsien, Taiwan Sheet
STATUS PANEL http://www.msi.com.tw 25 of 33
5 4 3 2 1
5 4 3 2 1

KB/MS/LPT/COM Port/FAN
VCC5

+12V
+12V
R22
KBVCC
PS2 KEYBOARD & MOUSE CONNECTOR X_4.7K U5A
D4

2
X_LM358 L1
FANPWM1 R25 X_0 X_1N4148S
25 FANPWM1 2 -
R34
C2 R1 1 4.7K

2
4
6
8
104P 1K 3 +
RN2
R23
D 4.7K Q6 X_80S/0805/2A D
FANIO1 25
9024

1
JKBMS1 27K
1
3
5
7
MSDAT# FB1 X_120-600mA MS_DT 7 10 CPUFAN1 R28
25 MSDATA R18
8 C18 +12V 10K
3
25 MSCLK
MSCLK# FB2 X_120-600mA MS_CK 11
12 9
X_104P
2 CPU FAN
MS X_47K 1
KBDAT# FB4 X_120-600mA KB_DT 1 4 R20 YJ103-BO
25 KBDATA
2 X_33K
+ EC13
KBCLK# FB3 X_120-600mA KB_CK 5
25 KBCLK
6 3 10U/16V/S

1
3
5
7
KB
CN1 YMD12P-1
8P4C-180P

2
4
6
8
VCC5

PRD[0..7] +12V +12V +12V


25 PRD[0..7]
R35

D3 1N4148S RACK# X_4.7K


VCC5 RBUSY
1
3
2
4 CN4 PARALLAL PORT U5B

4
RPE 5 6 8P4C-180P X_LM358 D9

2
RSLCT 7 8 FANPWM2 R36 X_0 6 - R247
25 FANPWM2 X_1N4148S
RN18 PRND7 1 5 D4 7 L13 4.7K
C PRD4 PRND4 PRND6 1 5 Q27 C
1 2 2 2 5 +
R214
PRD5 3 4 PRND5 PRND5 3 PRND7 7 8 LPT1 9024
3 FANIO2 25
PRD6 5 6 PRND6 PRND4 4 RN10 PRND6 5 6 CN5 STB# 1 14 AFD#
PRD7 PRND7 RSLCT 4 2.7K PRND5 8P4C-180P PRND0 RERR# X_80S/0805/2A 27K

8
7 8 6 6 3 4 2 15
RPE PRND4 PRND1 PINIT#

1
7 7 1 2 3 16 R212
RN23
PRD0 1 2 PRND0
RBUSY
RACK#
8
9
8
10
PRND2
PRND3
4
5
17
18
SLIN#
C31 +12V R41
NBFAN1
for 10K
chipset
PRD1 PRND1 9 10 PRND3 PRND4 X_104P 3
3 4 7 8 6 19 2
PRD2 PRND2 PRND2 CN6 PRND5
fan
5 6 5 6 7 20 1
PRD3 7 8 PRND3 PRND3 1 5 PRND1 3 4 8P4C-180P PRND6 8 21 X_47K + EC30
PRND2 1 5 PRND0 PRND7 R40
2 1 2 9 22 YJ103-BO
RN30 PRND1 2 RACK# 10U/16V/S
3 3 10 23 X_33K
RAFD# 1 2 AFD# PRND0 4 RN27 RBUSY 11 24
25 RAFD# 4
RSTB# 3 4 STB# SLIN# 6 2.7K SLIN# 7 8 RPE 12 25
25 RSTB# 6
RINIT# 5 6 PINIT# PINIT# 7 PINIT# 5 6 CN7 RSLCT 13
25 RINIT# 7
RSLIN# 7 8 SLIN# STB# 8 STB# 3 4 8P4C-180P
25 RSLIN# 8
AFD# 9 10 AFD# 1 2 LPT
33 9 10

RERR# R93 2.7K RERR# C68 180P

+12V

RSLCT
25 RSLCT
RERR#
25 RERR#
RACK#
25 RACK#
RBUSY D13
25 RBUSY
RPE
B 25 RPE X_1N4148S B
R478

2
4.7K
L21
80S/0805/2A
R486
FANIO3 25
27K

1
R494
10K
SERIAL PORT 1 C1 104P SFAN2

+12VCOM D1 1N4148S 3
+12V 2
U2
COM1 1
10

VCC5 20 VCC V+ 1
NRIA# 2 19 RIA# YJ103-BO
RIN1 ROUT1 RIA# 25
NCTSA# 3 18 CTSA# NDCDA# 1 6 NDSRA#
RIN2 ROUT2 CTSA# 25
NDSRA# 4 17 DSRA# NSINA 2 7 NRTSA
RIN3 ROUT3 DSRA# 25
NSINA 7 14 SINA NSOUTA 3 8 NCTSA#
RIN4 ROUT4 SINA 25
NDCDA# 9 12 DCDA# NDTRA 4 9 NRIA#
RIN5 ROUT5 DCDA# 25

25 RTSA#
RTSA# 16 DIN1 DOUT1 5 NRTSA
5
SYSTEM FAN
DTRA# 15 6 NDTRA COM +12V
25 DTRA#
11

SOUTA DIN2 DOUT2 NSOUTA


25 SOUTA 13 DIN3 DOUT3 8
11 GND V- 10 -12VCOM D2 1N4148S
-12V

2
75232S-SSOP20 104P
C8 L20
80S/0805/2A

A
NRTSA 1 2 A
NDSRA# 3 4 CN2
NCTSA# 8P4C-180P
1
5 6
NRIA# 7 8

NDTRA 1 2 SFAN1 Micro Star Restricted Secret


NSOUTA 3 4 CN3
3
NSINA 5 6 8P4C-180P
2 Title Rev
NDCDA# 7 8 1 KB/MS/LPT/COM Port/FAN 20A
YJ103-BO Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 26 of 33
5 4 3 2 1
5 4 3 2 1

CPU Vcore / Smart LEDSetting


VCC5
3VDUAL AT_GPO2 AT_GPO1 AT_GPO0 VCORE
2 1
PCI6REQ# 4 3
21 PCI6REQ#
PCI5REQ# 6 5 1 1 1 1.6V
PCI4REQ# 8 7
C312
X_104P RN80 1 1 0 1.70V
X_2.7K VCC3
MS-8 U19 C469
27P PCI4GNT# 2 1 1 0 1 1.80V
VID Pull-Up Rresistors 1 48 PCI5GNT# 4 3
6 MS8_PCLK PCICLK 3VSB
LPC_LAD3 2 47 ADDRSEL PCI6GNT# 6 5
LAD3_OUT/GPIOC1 ADDRSEL/GPIOC2 21 PCI6GNT#
D LPC_AD3 3 46 R523 33FRAME# 8 7 1 0 0 1.90V D
+12V 15,25 LPC_AD3 LAD3 FRAME#/GPIOD7 FRAME# 13,14,16,17,19,21
LPC_LAD2 4 45 STOP#
LAD2_OUT/GPIOC3 STOP#/GPIOD6 STOP# 13,14,16,17,19,21
LPC_AD2 5 44 PCI6GNT# RN83
15,25 LPC_AD2 LAD2 SGNT0#/GPIOE1
LPC_AD1 6 43 PCI6REQ# modify, 0804/2003 X_2.7K 0 1 1 2.00V
15,25 LPC_AD1 LAD1 SREQ0#/GPIOE0
LPC_AD0 7 42 PCI5GNT# modify, 0804/2003
VCC3 15,25 LPC_AD0 LAD0 SGNT1#/GPIOD5
LPC_FRAME# 8 41 PCI5REQ#
15,25 LPC_FRAME# LFRAME# SREQ1#/GPIOD4
9 40 PCI4GNT# SLOTOCC# R365 10M 0 1 0 2.10V
29 PCIRST#1 PCIRST# SGNT2#/GPIOD3 VBAT
R54 To MS-7 10 39 PCI4REQ#
X_470/1206 MS7_RST# DGND0 SREQ2#/GPIOD2 R524 33
29 MS7_RST# 11
12
RSTOUT# MS-8 PGNT#/GPIOD1 38
37
PGNT#0 14 VCC_AGP 0 0 1 2.20V
PWRBTN/GPIOB3 PREQ#/GPIOD0 PREQ#0 14,16
R399 X_0 EN_DULBIOS 13 36
6 MS8_RST# BEEP/GPIOB4/ENDLBIOS DGND
MS_GPO0 14 35 VID0 BSEL0_SPG R191 3.01K
RN4 MS_GPO1 PSON_OUT#/GPIOB2 VID_IN0 VID1 C470
To CLK GEN 15 34 0 0 0 2.30V
C

VID0 D5 MS_GPO2 PSON_IN#/GPIOB1 VID_IN1 VID2 68P


1 2 16 THERMTRIP#/GPIOB0 VID_IN2 33
VID1 3 4 modify, 0805/2003 4,6 17 32 VID3 BSEL1_SPG R186 3.01K
BSEL1 BSEL_IN1/GPIOA0 VID_IN3
VID2 5 6 18 31 VID4 NOTE:
4,6 BSEL0 BSEL_IN0/GPIOA1 VID_IN4
VID3 7 8 BSEL1_SPG 19 30 VID5 SET 010101 to PWM_VID (1.6V) , then use
7 BSEL1_SPG BSEL_OUT1/GPIOA2 VID_IN5
VID4 R43 4.7K X_TZM5226B-S-LL34 BSEL0_SPG 20 29
7 BSEL0_SPG BSEL_OUT0/GPIOA3 3VSB ATXP6_GPIO2,1,0 to set Vcore to 2.30V
A

VID5 R44 4.7K VIDB5 21 28


VID_OUT5 SLOTOCC# SLOTOCC# 4
4.7K VIDB4 22 27
VID_OUT4 VBAT VBAT 28 AT_GPO0
VIDB3 23 26 VIDB0 Q22
VIDB2 VID_OUT3 VID_OUT0 VIDB1
24 25 modify, 0804/2003

D
VID_OUT2 VID_OUT1
2N7002S Safe Bios function
C437
VID[0..5] 105P G MS_GPO0
VID[0..5] 4
1: Enable

S
VIDB[0..5] reserved 0: dis
VIDB[0..5] 28
RN82C X_8P4R-0
PCI4GNT# 6 5 P4GNT# R166
P4GNT# 16
10K EN_DULBIOS R378 X_1K
VCC3 3VDUAL
C RN81B 8P4R-0 R385 1K C
28 AT_GPO1
VIDB5 R57 4.7K 4 3 Q21
14 PGNT#4

D
RN17 RN82B X_8P4R-0 2N7002S
VIDB4 7 8 PCI4REQ# 4 3 P4REQ# R406 X_0 LPC_LAD3
P4REQ# 16 25 FWH_AD3
VIDB3 5 6 SB: PGNT#4/PREQ#4 connect to LAN G MS_GPO1
VIDB2 3 4 R408 0 LPC_AD3

S
VIDB1 1 2 RN81C 8P4R-0 SB: PGNT#5/PREQ#5 connect to SATA
6 5 R179 R409 X_0 LPC_LAD2
13,14,16 PREQ#4 25 FWH_AD2
MS8: PGNT#6/PREQ#6 connect to 1394 10K
4.7K RN82D X_8P4R-0 R407 0 LPC_AD2
VIDB0 R50 4.7K PCI5GNT# 8 7 P5GNT# MS8: PGNT#4,5/PREQ#4,5 connect to
P5GNT# 16
PCI Slot MS-8 LPC Configuration port address
28 AT_GPO2
RN81A 8P4R-0 Q18
RN12 2 1 modify, 0804/2003

D
14 PGNT#5 3VDUAL
VIDB5 R48 X_1K SVID5 2N7002S
VIDB4 8 7 SVID4 RN82A X_8P4R-0 1: 4E & 4F
VIDB3 6 5 SVID3 PCI5REQ# 2 1 P5REQ# G MS_GPO2 ADDRSEL R389 1K
P5REQ# 16
VIDB2 4 3 SVID2 0: 2E & 2F

S
VIDB1 2 1 SVID1 R390 X_1K
VIDB0 R49 SVID0 SVID[0..5] RN81D 8P4R-0 R164
SVID[0..5] 25
X_1K 8 7 10K
14,16,19 PREQ#5
X_1K

VCC5 VCC5
LED1

VCC5 G

8
B VCC5 4 3
B
RN1D
8P4R-330

2
R
RN1B RN1A VLED1 1 2
2
4
6
8

8P4R-330 8P4R-330

7
8
6
4
2

RN77
RN78
330

1
330 RDx2-S-RD_GN
1
3
5
7

7
5
3
1

JDB1
DLED1 DDLED1 VLED1 R3 1K Q1
25 DLED1 1 2 25 VLED1 VCC5
DLED2 DDLED2 2N3904S
25 DLED2 3 4 LED2
DLED3 DDLED3
25 DLED3 5 6
DLED4 DDLED4
25 DLED4 7 8 G
10
4 3

6
YJ205
RN1C
8P4R-330 R
2
4
6
8

VLED2 1 2
RN74

5
330

Q48 RDx2-S-RD_GN
Q46 2N3904S Q47 Q49
1
3
5
7

A
2N3904S 2N3904S 2N3904S A

VLED2 R2 1K Q2
25 VLED2
2N3904S

Micro Star Restricted Secret


Title Rev
CPU Vcore / DLED 20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 27 of 33
5 4 3 2 1
5 4 3 2 1

Voltage Regular Module


VCC5 VCC5 VCC5 VCC5

ATX12V Power Connector


CHOK5 1.2uH-18A VCCP_IN C465 C466 C467 C468
VCCP_IN VIN
JPW1 X_104P X_104P X_104P X_104P

+
EC17 EC21 EC19 EC18 3 1
C110 C89 12V GND
X_2.2u/1206/50V
10U 1500u 1500u 1500u 1500u C108 VIN
4 12V GND 2
X_103P
D2x2
VIN
D D

D
VCC_VID 29
Q3
R29 2.2/0805 C16
G 105P/0805
C87 C95 R45 0.8375V~1.6V/90A

S
X_104P 103P IPD09N03LA-TO252 CHOK1
2.49KST
VCCP
CPUVID_GD 4
0.9UH/25A-PB

1
R145

+
EC4 EC8 EC10
Q17 R13 0/0805 R26
2N3904S VCCP_IN LG1 G LG1 G 2.2RST
VCC5_SB 4.7K VCCP_IN Q4

2
S

S
IPD06N03LA-TO252 Q54
R135 C29
C4 R12 X_IPD06N03LA-TO252 102P 1500UF/6.3V 1500UF/6.3V 1500UF/6.3V
R147 5.6K R138
104P 4.7/0805
1K R146 VIN
Q16 1K R5
29 VID_GD VCC5
2N3904S 10RST C9

D
4.7K 105P/0805/16V Q8 C48

14
5
R72 2.2/0805
HIGH(>1.23V) 105P/0805
11 12 G

VCC
PVCC
BOOT1 UGATE1
VCC3 ENABLE VRM

S
13 IPD09N03LA-TO252
PHASE1 CHOK2
C107 For VRD10 1 4
R348 475P/0805 PWM1 LGATE1
U11 1.37KST 0.9UH/25A-PB

26
10 BOOT2 UGATE2 9

1
+

+
ISL6556BCB-SOIC28 EC3 EC9 EC6

D
C 1K 27 22 R125 4.7KST R4 8 R65 C

VCC
EN PWM1 PHASE2

PGND
R156 X_0 2 23 10RST R32 0/0805 2.2RST

GND
15,30 VRM_GD PGOOD ISEN1
For VRD10 LG2 LG2 G

2
27 VIDB4 3 VID4 2 PWM2 LGATE2 7 G
4 Q7
27 VIDB3 VID3 1.37KST

S
5 21 R126 4.7KST U1 IPD06N03LA-TO252 Q55
27 VIDB2 VID2 PWM2 MOSDVR-HIP6602B-SO14 C50 X_1500UF/6.3V
1500UF/6.3V 1500UF/6.3V

3
6
27 VIDB1 6 VID1 ISEN2 20
7 C3 X_IPD06N03LA-TO252 102P
27 VIDB0 VID0
27 VIDB5 8 VID12.5 For VRD10
C131 562P 104P
R177 5.11KST 13 18 R127 4.7KST 2KST VIN
C128 COMP PWM3
ISEN3 19
For VRD10 R7 104P C130 X_NC
R129 VCCP_IN

D
R117 2.49KST 12 25 R124 4.7KST Q13 C61
FB PWM4 X_0 R101 2.2/0805
VCCP ISEN4 24
B R178 3K A R160 X_3K C 14 C90 G 105P/0805
100 R118 X_0 VCORE_SENSE+ VDIFF VCC5 R116
15 VSEN

S
9 VCC5 104P IPD09N03LA-TO252
OFS CHOK4
16 RGND R143 4.7/0805 R107 10RST BOOT3 2 1 UG_3 PHS3
BOOT UGATE
11 7 8
GND
OVP

PWM_FS REF X_470K VIN2 PVCC PHASE 0.9UH/25A-PB


28 10 6

D
FS TCOMP VCC

1
+

+
PWM3 3 EC5 EC7
VCCP PWM R87 0/0805 R88
4 5
17

C129 R122 R141 GND LGATE LG_3 LG3 LG3 G 2.2RST


1

G
103P 150K C104 U10

2
S

S
R130 R172 X_NC 105P/0805/16V MOSDVR-INTS-HIP6601B-SOIC8 Q12 Q57
R128 100 IPD06N03LA-TO252 C62
NC X_IPD06N03LA-TO252 102P 1500UF/6.3V 1500UF/6.3V
1.5K
R157 R149 R151 R154
B VCORE_SENSE+ 2K 3.65KST 7.5KST 15KST B
R176
AT_GPO0 27
AT_GPO1 27

VIN2
R131 X_1K
AT_GPO2 27
5.1K

For SI removed (0.5*R12)/R VIN


R2,R4,R12,R20,R30,R39 For VRD10
R123 0

D
VCC5 R38 :1M
Stuff R5,R7,R24,R38,R76,Q1 Q11 C93

14
5
ohm R86 X_2.2/0805
X_105P/0805
BOOT3 11 12 UG_3 G

VCC
PVCC
BOOT1 UGATE1

S
13 PHS3 X_IPD09N03LA-TO252
PHASE1 CHOK3
PWM3 1 4 LG_3
PWM1 LGATE1
10 9 X_0.9UH/25A-PB
BOOT2 UGATE2

1
+

+
EC12 EC11

D
R108 8 R73
PHASE2

PGND
X_10RST R74 X_0/0805 X_2.2RST

GND
LG4 LG4G

2
2 PWM2 LGATE2 7 G
Q10

S
U9 X_IPD06N03LA-TO252 Q56
A MX_OSDVR-HIP6602B-SO14 C49 X_1500UF/6.3V
1500UF/6.3V
3
6
VCC5_SB VCCP_IN C91 X_IPD06N03LA-TO252 X_102P
BOOT CPU
LOW Northwood X_104P
HIGH Prescott R170 R171
X_4.7K X_4.7K
D

A A

G Q20
VCCP X_NDS7002A-S-SOT23
S

Q19
Micro Star Restricted Secret
R167 X_2N3904S Title Rev
X_4.7K VRM 10 HIP6556 20A
4 BOOT
R168 X_10K Q23 R175 X_20K B Document Number MS-6728
X_2N3904S
R174 X_20K C MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 28 of 33
5 4 3 2 1
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ACPI Controller ICH5 300mA


PCI 375+20+20= 415mA
Power
1.7V@250mA
S0 S3 S5
VCC3_SB 715mA VCC3_SB Main Standby Standby
VCC5_STR Main Standby 0V
MEM_STR Main Standby 0V

VCC5_SB

D
VCC5 MS7: 1. DEV_RST only connect to NB VCC3 VCC_DAC D
U14
R308 2. Slot_RST connect to PCI Slot by Tree X_YLT1087S-0.8A
330 R307 R284 3 2 VDAC:60mA
330 330 VCC3 mode layout VIN VOUT

+
3. BUF_RST connect to onboard device X_226_1%

ADJ
30 PLED1
EC28
SLP_S4# 15
Q35 R508 X_100u R201 C147

C
SLP_S3# 15,25 VCC3
2N3904S 150 C148

1
PCIRST_ICH5# 12,14,25
30 PLED2 B R286 4.7K
HD_RST# 20
X_104P X_4.7u-0805

D
R279 R507 10
NB_PCIRST# 7
E
1K R288 10 Q50
PCIRST#2 16,17
Q36 R302 10
C

PCIRST#1 13,19,21,25,27 40N03


2N3904S G R199
B R281 4.7K VCC2_5 X_82_1%
C433 C434 C435

S
R273 X_20P X_20P X_20P R318 130RST
RSMRST# 15
E

1K
VCC3
+
C230 VCC5_SB R316 EC44
EC39 120RST X_470U/10V
104P
+
VCC3 470u
U16 C235

48
47
46
45
44
43
42
41
40
39
38
37
MS7
1u

PLED0/3VDLDEC#
S5#
S3#
PCI_RST#
HDD_RST#
DEV_RST#
SLOT_RST#
VCC3
PCIRST_BUF#
RSMRST#
AGND
PLED1/EXTRAM
C R260 R269 9VSB C
1K 4.7K CHARGE PUMP
VOLTAGE OUTPUT
1 36 C237 1U/0805
6,10,11 SMBCLK_ISO SCL CHARPMP
6,10,11 SMBDATA_ISO 2 SDA C2 35
3 34 C236 1U/0805
27 MS7_RST#
4
FP_RST# C1
33 C416 VCC5_SB 5V DUAL Power
7,15 MS7_POK CHIP_PWGD 5VSB
5 CPU_PWGD VLR1_DRV 32
6 31 2200p Q53
6 PWROK_SMB POK1 VLR2_SEN 5VDUAL 5VDUAL 5VDUAL
30 PWR_OK 7 PWROK 5VUSB_DRV 30 4 5
30 AGP_PRT 8 PSOUT# 5V_DRV 29
9 DDRTYPE VLR2_DRV 28

SVRAM_DRV/DMSB
C208 104P 10 27 VCC3 3 6

D
SS VLR2_SEN

RAM_HDRV/DMV
X7R 11 26 C12 C125

D
GND GND Q26
12 VCC5 VAGP_SEN 25 X_104P X_104P
Q28 5V_DRV 2 7 +

RAM_HSEN

VAGP_SEN
VCC5

3VSB_DRV
40N03

RAM_DRV
RAM_SEN
X_40N03 G EC31
VID_DRV
VID_SEN
VIDGD#

G C409 470U/10V
5VSB

3VSB
C207 1 8

S
105P/0805 X_102P
SATA2_5

S
For VIA SATA only NN-P07D03LV_SO8
VCC5 VCC5
13
14
15
16
17
18
19
20
21
22
23
24
R312 X_240RST Low RDS ON MOSFET
VCC_VID / VID_GOOD
VCC2_5
Place MOSFET near CPU R313

+
28 VID_GD
RAMDRV

EC51

D
X_220RST
5,28 VCC_VID X_470u
X_10U/1206 Q43
S

1.2V/150mA
B DDR VTT Power G AGP_DRV G
40N03 B
C30 Q5 AGP_SEN VCC_AGP
1.25V/2.1A NDS351AN-S

S
R277 Q39
VCC5_SB 4 5 VCC5_SB
D

3.3/0805
Wide Trace

+
VCC3 C221 3 6 C255
1u EC40 EC32 X_104P
1000u X_1000u
+ 5V_DRV 2 7 3VDUAL
EC43 C258
470U/10V 102P
VCC3 1 8

NN-P07D03LV_SO8

C228 3VDUAL VCC3


X_102P
S

3VDUAL
2
4

G RAMDRV
1
VCC3 Q37
APM2054N 40N03

+
Q38
3

EC41 EC48
1000u X_1000u
3VDUAL VCC_DDR
+

A
EC2 A
U3
+

EC37
9
D

NC X_1000u R15
8
7
VREF2 VIN 1
2 300RST VTT_DDR 1000u Q34 DDR 2.5V Power
ENABLE GND VCC_DDR
6 VCNTL VREF1 3 40N03 VCC5 VCC3 VCC3 Micro Star Restricted Secret
5 4 G 2.5V/7A(DIMM)+5A(NB)
BOOT_SEL VOUT
Title Rev
W83310DS MS-5 ACPI Controller
+

+
S

R16 EC20 EC16 EC49 EC46 EC42 20A


VCC_DDR
1.25V/2.9A EC1 300RST EC36 EC14 Document Number MS-6728
+

470u/10V 470u 1000u EC33 EC34 EC35 C36 C94-1020641-S03 470u 470u
C94-1020651-T30 X_1000u X_1000u 1000u MICRO-STAR INT'L Last Revision Date:
X_1000u X_470u X_104P CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
1000u Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 29 of 33
5 4 3 2 1
5 4 3 2 1

Intel reference GMCH VTT power cirucit


ATX connector / Front Panel CPU_VTT
GMCH_VTT
D15
GPO33 15
ESD Protect
1N4148S
VCCP VTT
D19 C413 RN44
19 HD_LED D11 1 2
VCC5_SB 3 4
PD_LED 20
X_181P 5 6
D X_1N4148S 1N4148S 7 8 D

R133 8P4R-0
D20 CLK_PD# 6
D12 4.7K
HD_ACT
19 HD_ACT SD_LED 20 VCC_DAC
1N4148S Q14 R139
1N4148S 2N3904S VCC5
R121 220 X_0
VCCP
Q15
For MSI / Intel Front Panel

1
VCC5 2N3904S
JFP2 C116 C141 R184 R197
104P X_104P
X_220
R493 330 HDD+ 1 HDD+ PLED 2 PLED1 PLED1 29
X_243RST
HD_ACT R182
4 PLED2

2
3 HDD- SLED PLED2 29
VCC5_SB
5 RESET- PWSW+ 6 PWSW+ R492 330
15,28 VRM_GD
R136 X_4.7K

1
VCC3
15 ICH_RST# 7 RESET+ PWSW- 8 PWSW- R495 22
PWRBTIN 25
X_1KST 2
C113
X_104P 9 X_104P R165 VR1
C412 NC R14 C10 U12 X_YREG431S
104P X_W83310DS_SOIC8 C133

3
JFP1 10K 8 1 X_226RST
VREF2 VIN X_105P/0805
JFP1 VCC3 7 2
ENABLE GND2
1 GND SPEAKER 2 6 VCTRL VREF1 3

PLED2 3 4 5 4
SLED BUZ+ BOOT_SEL VOUT VTT

GND9
C C114 C134 R163 C
PLED1 5 6 R489 X_0 X_104P X_105P
PLED BUZ-

+
X_1.18KST
8 EC23
VCCSPK VCC5
470u

9
JFP2 R137 X_4.7K
4 BOOT
Icc=2A
C115
X_104P NORTHWOOD:1.45V
PRESCOTT:1.2V
RN95 JGS1
1 2 EXTSMI#
25 ALARM 15 EXTSMI# 1
3 4 2
5 6
7 8 X_YJ102
D18
8P4R-150
X_1N4148S
C415 BOOT BOOT# CPU Voltage
104P LOW LOW Northwood 1.45V
R480 HIGH HIGH Prescott 1.225V
Q52
15 SPKR
2N3904S VCC5
2.2K

B B

ATX Connector

ATX1

VCC3 11 3.3V 3.3V 1 VCC3


12 2
VCC5_SB C45 -12V -12V 3.3V C53
R70 1K X_104P C58 13 3 104P
X_102P GND GND
14 PSON 5V 4 VCC5
VCC5_SB
R71 1K R69 X_0 C59 15 5 VCC5
X_102P GND GND C60
PS_ON# S D 16 6 104P
25 PS_ON# GND 5V
G Q9 17 7 R97
2N7002S GND GND 10K
18 8 PWR_OK
-5V -5V POK PWR_OK 29
C74 19 9
12,29 AGP_PRT 5V 5VSB VCC5_SB
X_104P C71
20 10 104P
VCC5 5V 12V +12V
A A
R63 POWER
4.7K C85 C80 C86
104P X_104P 104P

VCC5_SB Micro Star Restricted Secret


Title Rev
ATX connector / Front Panel 20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 30 of 33
5 4 3 2 1
5 4 3 2 1

D D

VCC3 VCC3
VCC2_5 VCC2_5 C454
C440 X_100U/1206
X_100U/1206

C441 C455
X_100U/1206 X_100U/1206

C456
C442 X_100U/1206
X_100U/1206

C443 C457
X_100U/1206 X_100U/1206

C458
C444 X_100U/1206
X_100U/1206

C445 C459
X_100U/1206 X_100U/1206

C460
C446 X_100U/1206
X_100U/1206

C447
X_100U/1206

C C
C448
X_100U/1206

C449
X_100U/1206

C450
X_100U/1206

C451
X_100U/1206

C452
X_105P/0805

C453
X_105P/0805

B B

A A

Micro Star Restricted Secret


Title Rev
PCI Device & MS-1 Diagram 20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 31 of 33
5 4 3 2 1
5 4 3 2 1

00A to 00B Schematic change list Page

1
D D

C
5 C

8
B B

10

A A

Micro Star Restricted Secret


Title Rev
History 20A
Document Number MS-6728
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Monday, September 01, 2003
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 32 of 33
5 4 3 2 1
5 4 3 2 1

U13-FAN

1
R189-G R188-G R187-G
75_1% 75_1% 75_1% C137-G C136-G
0.01u 0.1u

2
MSI PCB1
For Springdale G stuff
U17-P U13-G U18-R
D D

RealTek intel intel


8100C 865G ICH5-R
R289-L 5.6KST

_ P01-672820B-D05 8100C 865G ICH5-R 5.6k for 8100C


U13-FAN

LAN_USB1_S
U13-HS LAN_USB1_N USB2_N
BIOS1-1
BAT1-S

X_PLCC32-SMT
without LAN without RCA U13-C U13-A
10/100M D1x3-BK D1x3-BK
_
YSKTBT

U16-C
C MSI STICKER AUDIO1_S
C

Core Cell 865G Neo2A


865G NEO2A

MS5-CoreCell

3-port

B B

A A

Title
{Title}

Size Document Number Rev


Custom{Doc} 20A

Date: Monday, September 01, 2003 Sheet 33 of 33


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