MODULE 2

nt
Metal
but we ule
P pdly Si licen)
SO
Metal Oxide Cwnnt wll
Va=o, thu t
OhenVps is applud,
ndt low. tha Reverse biaicc n-mos
hon +ue Vos u applid, Than +Vos Draun

these i a channa
+Vasnob
ClRt Samlels e n-mesS
Collector =
max haat
(1 dusibatnu
Cmuta= huavly deped

Source -Drain e charge)

-v n ht

ource and daau

C a n eehang
ik B$T

n0
2 P n

JDCPto n) enhoan@ment
B Cbsra t y p e MoSFE T.
Thaesheldd veltage -tmimimu gale ve llage VT)

f Vas, < VT, Ipn=O.CCuk- 4 modeD

ULIDLZInz
Tf Vorsn > VToIpn 7o CAhve Mode)

N-MOSFET Charack1sHcs W
1 Vasn vs ID
T n
D
I Acive P
Cu Vos,=VoD LK
Kagien ID
Ngn hangth Ipn CRasicfanca

2 Vos Ve To
Setuadtion eidth (W) Tpn
Non
sadumho pinch Vos>r hangth CL)
New-atuaaiem -Mode

T - Pn 2CVas-VT)Vpsnos
7Nosn
cshere Pn MaCox(W
Pn=device tRanscnductance

Mm=mdulhy

Capacitana oxicts layors

Cox
 msatusatin- mode P-MoS

Veat peak cuent Nsoe

Vat=Vesn- P p Vsen el,

Vohan Vos,as-Vrn pinch happens and n
Pmos s ON.

satuatien uill happem CAcHue

TF Vsin O
Pmos s OFF

Thvesheld Cordhov |Vasp)V-Aekive Mede

Ton at)=Pa CVésn-V
It doesn+ Cruut Sumlal
depend om drun valage

pinch e
S

V15 2
1ncreases.

Nosn k2
*an nmos, qatu vellage mul e tve wt
n s0u
p-mes, gati valage mut be -ue -e n ou
umt ouu
sor@ moLds ppty caskieu 0 we muu
pRoUICL tue vetlqe to ttuL muuv
&ouco
 hon A = 0, B=o, bdth nmos at in ut db
N-Mes ogic
here is no Cuont -Aoto ur qer HiaH |P
) NOT Vpp Lohen , B-1 A iu in autt and b is otiue
But Sna bóth Ore Connoctad tn Series tha u
R cunfent
no
ouo and ha uce 0 P is HlaH.
Similarú oe d P=1 and B o mode
ohen acHue
=
l,B=IBsth are
and
and we geF o JP as louo Sine i Cmno id
to Ound
Ib le
ohun A =0 h-mos is in autmocla. V=VbD
iolalyzero ond we geB the 0utput NoR ATE
R w
When A =1, n-moS is in Ochve ugion WoD
be ComparaHvely laage than inla na Rasis tana
n-mes. ohen achive i Connedud to giound and
e
qe thu Low CTATE at tu op ie Y=o O

o
) NAND GATE

tVpp A

Y Disad uenage
A ABY Each Resietor has high valee and hance
Aoqies moye spaco
1
Duc higk vclu treue larqe pautr
dosipaHon euen whon thu P alaic
 CMos hogie DC Analy
n thu taype danolysu he we assume hat
CMos Inverie
Vpo he vállaBq changs sowty Stabi lizes veay
Vin Vow
Slowty Cie slatie analyis). Cnly Scal changps
S
Core with elou tma u delactad hea
O
Vour Anshu hype ta ansien- anadysis

Iransien+ Bnalys
tpuo fast o u r izuiu can Rpmd to hoat chang
Nhin Vin =O Vns=O, . N-mos is oFF. here. Delay is Cmstdusc hau
s Con siderod
But
n, = VpD Lence p-mos is ON le Vou VDD
is Vout = (V CMos Inverlar
DC CharactesHcs a
Whun Vin =1 Vtuse-/o0 ,o N-mos s N
Bat In p-mos Ven=\bD and Vs= VDD aoVus 0 OVslaae Trandey Curve
ls
P-mos s OFF oVout=0 ( N-mos
Vou
ounded V-VDp
DH

Aduontage dpt
OfF hente
( when n-mos is oN, P-mos
Power dusipehon is n pyegent
Ohen oFF P-m0s is ON bul-
n-mos is
VoL=O Va Van
(
only Smal dusipation hena beHes han
kogco

RaetoY Ouhput vallaq keuels :

logc bionH anc
Only powew dtpaHn happens snen lwre luo otput volaçe leuels are

logic lou.
iswtthung in Loaic inpu. Can be nduced
Outpat high VNaae VoH=VpD
ou deasima tuskwilahung timi. VoH
 VoL0urput low vellage V OL = OV Mid-Poiut Voltage(Vm)
A VM Un = Vouk =

VM .
3&ulput Veillaa 80ma Draw a i e from ortgen al h5°.
He ddkerene bluo the WoH and VoL
usitchin haratleiais
e OP vollge SwIng= VoH- VoL
delays taking la
Vop -0 This deals wte t a
tne Aai fe
Vop hile autpat Changes emm
D

Lhen the Swma is max ouput, then t another l a h

ull-aid eupl Vip

npu Vellaavels Vin Vout
O
We drauw a angent wtth tope -i and =

Ongla 135.a Cuwe Rtly andtuu tangent Nu

ar tle below Cusue. and use Mark VL and Vr

VaL input louo vattag Vin VIL.

Fal Hnu Rge Tiu
te ogn vallag
dus b tu fmt
*THinput high Valag VaH Vin VDD This delay happens
and olis chage thu
ie
Loge 4 Velage Requusnd s chanqe
maide MosFET.
paasHc Capacclancwe eesenF
Votlae Noice Morgin
H Ansudu MOSFE Ts
hgh tab noise margin VNM= Vou Panasiche lapaclance
au

= Vpo - VI4
Aoped as a s &(p
low statt MOLse
maugan VNML VIL-UoL

VL
 VoD Rn
n- Mos
CUp Bn CVoo- VT»)
Vaw Inreds
Cin Rp P- Mos

n pu CUn BpVop-/VTel
Capaikane Swthing medel equuwalnk d imuela
CFeT Cop + CpoD
PVoD
Dsain Capaulane
mvetu P-Mos

oheu onu gahdsus mulHpl ethus galës

adlol up
nput apaculnces d divcn ga
Veu
oRm exlasmal load capacilance CL Vi
daiving 9at Cont

Co h-Mos
FR
CL Cin
Cin o Fall line (t)
CL=3in i m d as tle time intuval takon by Vou
Te-tal output capacikane invetia gaa changt om 0.9 VpD to o'! VoD
CoUT CFET t L
VoutC
-
VoD
Aso ha MosFET not a perloctcmduclor
oN. / has a drain - s 0 u
Auinance quun oVop
-Veat changs froo Vpp 0 ushen inpuf Batwe tnauo hat Vout = Vpo at t =o
guen uch that p- Mos s OFF n-Mas ún thu inial Cemdiion w
Apphying ger
oN
Pmas Voo= Ke k =Vpo
.Vout Ean become
Cout t/tn
Vou= Vpo e (4
nmos

t/1n
Von-e
VpD
-inVo
hich cwas charged VDD eadie to CVaur
Cort
takas Somebimu to dischange haouah R. TnIn Vop
Thu Cawes ha dalay

Vout Vout Tall Tma

i =Cot
=

Kn
f-ty-t
dVout
RnCoaJ Tnln VoD -Tnln on
O.qVop
=Tnin Vop Tnnla
OI VoD
nVoutD t + Lonstant)
Rn Cot 2:2T»

Nout e -+/Rnlou -Aow ine

utput high- ka
h
V a u = . t k n C o

k'=e HL-te
Vout k'e C n = h m o s i m e

C o n s h a u t

= Rn Cour
 RiseTimulty) u VpD- Vout =
klet/ep Ceut
Vpo
k-t7 Tp
)
TP P mos

pmos
Rp ime cmstant
(TeRpcout)
Vof
o1 nmos Cout
Aptlyiung, Imcia cendhon thor Vou- o at t 0
7x VoD-o = k'e

*Rim Is tu ime imtival taku by VpD

Veut t change om o VpD to o Vop VoD-Vaut -Vop e
* Hore , mes S ON Ceut
nmos is oFF. °
haed to chaaapom o to Vpp betore Vouh
VetVno - / T J | -
Can each marimum Value

=Co dVeu =Vpp-Vau

dE
p Vop-Veu
RP VpD
o Veu
Voo-Vo Rp Cout Tpn Vop
-Vpo - Vout

Tkin Vop Veut= u Frun Uou--du

du_dE rr= =

Tp
P Voo
RpCour Cy.n
VpD o0-9VoD
9 VpD

Rp Ceut
Tpn UpD
VbD O:|VpD
=
0-4 Vpo
p nVpD
ntu) VpD
Pp Ccut = lptn )
 22tp Lppf+ pr
2

-high kim
Htme
Suput leu-
tLH r B ubshluimg valu f veltages torrespmdung
p Ond tprwe Can ge that
Macimum Stqmal Fcquanu Cfma p0:35(Tnt p
aap squenuthat cau J appld
and nuds b le
tha ate *To dsdan tast gaa, e
Jedund. Thi can L Anduad lu Raduung
ma RCout HmeCenttanls ushih an Jedene
HL +tLH
making banni' ggo e m o chip aua ,

snaecled tb implemant ash deuis

PapegadiooDela p
ANA LYSIS Peuwer Dics ipahicn in MosFETs
Dday o an op change urt to change
inpat iqnal Powe Dissi pasion u a amos nuel
VDD Sstehine
Pecce
Vin dissipa duspahop
CMOS
Crcei
Vea
- So% Pouwer, P =
Vpooo
Oepe dn sla I and L pouu
dluspaiien DC nclyis pur dpa
 fhe dipalion b uwnk
n sigeI , peun pD vent Le kagp
ehanacheste 9wer dusyDatum. Cue smoll)
8wtching
DDC Pou Dispahm (Pdc)
Vpp
Pouwer P = vop Ipp (2)
Poo Vpo ppa
CMOS
Cirunt Swtthing Parwe Dun upaion Pduyo)
Vin
n t e Couik t haue DG pous dapat"
CPde) shich dcws uhun olp u Malto (no
Chang) and ale secmc r e i s swthing
peuse disipahon h i c h oecurs p o ol

Ls changn Cie dymamle) Pdyn T= Tu feaiod

Fyeauenu
Taa Paer duspahen, P= Pee+ Pdyo
SCase
Ve ( NoD Eories Veut = D
than radually
Pmos 1 Vou
oN
Pmos OfF Vout i nCaLase
NMos ON
MoS -IL Cout and Capacuor
OFF
PMos ON sab chayn
NMos OFF
Vout
Vm-Midpotn
Veaao
Vin
Vm
2nel Case Dyn anic Poue Dsspadiom
Vod u changm
Avq Switchunq Curent x Vpp
hin ndHa0 relyo
Veu Vout = Vpp Th IpoxVop
Sloy duuua
Cout and Capacfar Pdgn = Çout Vopf-
P mos off

NMos oN aoschas2 (Usmg )

Vu
oTrta Pea dissipahn
P=Poce + Pdymn
=VopxLopat Cout Vp

P- Vop Ippa+Coat Veof|

Assum at a u the totad chasae that u
Ppa Ve Smal tha naakec ny ToDo
-tranrzed to and r om the capacor
hn P Cout VpD
Avere- = Coct Voo P f
Char ushen swlahia Req uen c Ln caease he
and Ueruby
Aveiage Sotehina Poueer diispaom also tneseases.
Cunsent nenLares the ana te chp .
TpD - af -

-
GATE
T CMoS NA ND
Usin G and

Tpo'=Ceud * VpO xf -
C hern f= ewiehuna fag uenun
We n-mes tor pull cloun neluwork and p-mos CMos NoR alL

s Cued for pll-vp Resistance (retuo)

A B

GRc Diagam VoD

pl-p O
helwo& O
A

Veut Cinu Dicam

4-
VpD
p a l oloon
Pull p
hetwork
helwork

Nete -o Vowt heu ue qve input

Vo
O he n-mos is uo
Hheu tua oPhigh
pull-down
impedauce slat.
networt
Trigtat 0 1 hidanu When p = 1 lhan olp 0. A
CiRuit smle
P A
CMos koqic Desiyn

O Stakc CMos Design

connecled o ecthes
the op terminal w cll be
low Resis fant value.
VoD or 9round thaough
n a m i e CMOs Desigm- Noco 4oinina tuo hoo cutuih we gt te Cmpai
clock yl ls Save power. Ciit
insc use

VoD
STATIC CMoS DESIGN

|Complementanp CMo hogic A

Pass Transutor hogic
D
LTransmiusin ate hogic.
Conmplumulay CMOS hogic
- -Voud
b applicable tor A)+CD)-Y.
Tha kogic
0
helwork we lak C
*lo duslgm pull -douon
-6)+C) C)+ D
6-L
L
D
Realise fumchicm A+8t)-D uanay
Cc- Pull down nelupor
Complemenlay CMOS logio
pull-douon nelwork
muE ake lu Ans desgn pA
+lo duig pull-u nutwork j we

-dousn elwork
Complemuut d pull A+B+C).D.
A B
Pull-p
huut
D A+B+ C
 plemunk Y= (+-C na, Compfemsrlo
CMOs bgio

Y CA B)-C
+B+C)D
D Y= CATB).C
Pull-down
nelwork
Fi2 (
ake lte Pall-down Nelwort
To dsiqm tha Duull-up uistor,
VDD
Complement H

D
C
Puull p
helwalL
P u l a Networe
VpD
The Comte neluook b
VoD

-D

Ovenall oulput ckkF

VoD
-oVout
A
b4 -oVeat
A
 Nt ine i}p passed to tu olP 4hú u
nput we Aequue 6ne n-mos

Hence as lte no in peels inoeaa Called t t pas hrands lor logic.

Me p-mds
Hen ce se
Hhe ho o MoSFes dlso Inaeases 3INPUT AND yale
Cse ttw Pass a n ss fa Logic

CAB-C)
2 Pas Tansistor Legie
e qawen to q a t
n h s logc P ma
ene also tu downegul be nenl
tesminal nd stten aun emthal hana

Hhe ho MoSFETs Can be Secltecd. Ne

Legicaly hó ckk ma
Note cerreet but 2ne
N-MOS ae as a pull-up
O Mos FeT which is notposib
t h e case A =I and N-MOS can ack as
only puull-
do un hlwok
the
o T in
high DrauobacE NMos as pul-up ktuwar
Impedance salz when Vod a hand D
VDD
mo tkat bq addung, a MosFET
the N-Mos is oN.

AND e e uona Pss anal&torLeg For ca: Grnsidu Vop =(V

VT 2V
Vout
T mptement tho i ON When
N-M OS
Cout VGs>V.
Ckh 2+ 2 -41
A Hence inidialy I t

Capacior o no charged
C2 is to implement
Co B
CMDS inUee GB When tuu capautor chaages aud v akhu tu valuue.
k e 4V then t e Vns- V
n Compfemlay CMDS
kogy PB =(A-8) and the N-MOS is tas cut and no 0[P.
2V.
For (B) = 4 Tomwt yhyn t e maximum vdttqe that can be opfanad
ena
F 8 = 2 Trcmanlns
and VoD fuly Cannst be
ranmb k
wl be Vpp-V obaind
N-Mos as a pall- douon Ck}
QTmplement F - ABDc usme p0SS
-oVec nanisto logic
Oucput wll
Vpp Ta Ans A B F be 0uhan
the aIL even

Considsn t Vmliatly tue is chonge and 1 no 's

1
te ib sfouy duchanses
Vocet p4V> 3V2v
VooVes
F and hounce idea ovs 4
oblain O
Nt

n-Moos p-mos 1
Weak I's weak o's
P-Mos s hyonqs Srong 0's n-MoS
w e lake sido inpus (le heu e and c) n
Serles as C n i inpu
( VoD VOD quen a3 the Im put
Difeent cunnbinaluin d BC Rold be Cntdsn
L
pD V-Vr =y

Fig is bette
Vpo
VDD
oect for AND Unat 8+1
H
ABC

pD Vso
ABC
=Vo-aT
 B
Ra du cenq tt
no d
A
Ransuas

D 64-

P XOR. natt usna Pas

Implemunt a 41 Mulkplexev usn pass Q Lmplemeut 2
ranmston logic
anMator Log1c
Ans
Trdh Tabe
Ans MUX
/B as enbod 2
B Y A as input
ABT
MUX
Y-AB + A

Y B + AB

A B

Truh Table CE

A y-BI+A6T AB11 ABT, A

B1 81,) - Y.
1
and B are Comlid
T Cund I., ILT a
T npu
 tialy Vou =0.
3 rausmuMon qate h¢qiC
we when VoD applied n-mos and p-mos
hanststoT dogic
Disadv d pas
ma P at Vpp - V d aetae be oN. p-mos well be oN
Comptly uhau as N-Mos wil cutoks
e a VeRely kous Bd p-mos u bN.
VoD VT and th capaculr changes hl Rea ches

Vout VeO aa on i oblaineo

B e t in randmisim qat loqie
uve
gd
Shenq o's and slrona, l3 here. and t o 8honq 0 Voo (B)
disadr anlase hae u t l u no dtransutas
imcrea3 es . S

To qtshronq 1 OV
Vot
Voo(B)
VoD{B)

VDD
- Veut
ov CB)
Vov netaly Vout=Voo
N-mas is ON and P-mos is ntaly
also oN
S
VM,l/th p-mos Cuk4t bu
is
ohenIVnsp
w l be oN l fuC Capactor Vdllage
oV) n-mos Tua
o(inha) ( cliicharges tll Vo =o, Hence we
get
WhenD appliud, we gek VDD-VT Then
shong o.
fom n- mosde and p is o -mos

tha Capecil dschenge and we e

*Hene usa Ranmm usim qalu loge
we get
volage a -mos$Vns and pmos 0s sng 1s.
hmq cm
on Cund e qe mar oP pD
epresenlatuuu d tans mstm gats o mplurmunta 2:4 MUX winq anamusion

P
gats.
BoP Da-
A C onFi sl 21

D1-
11MUX

ommany used
Truth Table
Smue are 'Ciuit Diaro
Y
O and Do DI

D1 S

Do-

V=3Do+SD1

A A B
Impement an xoR Gat usunn ianmus uwp

a t logBc

NotFe
CA and BCiP at h-mo
A y AB

A
Tplement a IMUX Usu4 tansmision ga
log ie SO
S SO

Do
D
, DoSo + DISO

MUX So
D2 SI

D3
Do Do SoS
tmplementnq us to1STSo

2 MU p2s1so
t D3 S1So
Do
So Do + SBD)
DI 42 So D2t So D3
So- SI -Y.
O Do
Dz
D3 DI
D3

bL-
So
41 S14+ 42s 2-D2So t D3So
D2

= SASO Do +S1So DI So

tSISob2 + SiSo3
 MoDUKE:3
peltdlow
VDD
|MemorY
M Bts
WL WL
So
Word o
S1
Word Paud
Word2
fig
Decodei -Memor h L = o , han t u BL=O. and
Addas tig L=1
hen WL=,

SN
Word 3-1
Word
ins Bt lres p-bion 2 CPllur pment
To sele t Re u d Cword we une a BL
addses dttedua
Werd linu -

tle ines used o select tu Dord.

Bi n the lint ued to casayt daa.
-

W W

ROM Cell Cmplemdlakim usua 9 WL-1

Mos FET
Rom Cel-beuice cunit inaide RoM Ibt
BL o

Optem Qeat
1
rsu MosFET Logi =
4. PAsen MesFET = loaiec