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TRANSPLANTATION SYSTEM
A PROJECT REPORT
Submitted By
of
BACHELOR OF TECHNOLOGY
IN
NOVEMBER 2021
I
Department of Electrical and
Electronics Engineering
Periyar Nagar, Vallam Thanjavur - 613 403, Tamil Nadu, India
Phone: +91 - 4362-264600 Fax: +91- 4362 -264660
Email:headeee@pmu.eduWeb:www.pmu.edu
BONAFIDE CERTIFICATE
Certified that this project report titled “A Smart Cost Effective Public
Transplantation System” is the bonafide work of “Amrun Faris.
A(118012014433),Mahendra Bharathi. S (118012014437), Mohamed Imran. M
(119012064404)” who carried out the project work under my supervision.
Signature :
Date :
Submitted for Periyar Maniammai Institute of Science and Technology for XEE
706 Project Phase –I Viva-voce Examination held on _____________ at Periyar
Maniammai Institution of Science and Technology (PMIST)
Signature :
Name :
Date :
II
ACKNOWLEDGEMENT
We would like to express our sincere thanks and gratitude to our Esteemed
Chancellor,Dr. K. VEERAMANI for giving us an opportunity to be a part of this
institution.
Last but not the least, we also thank to all our department faculty members,
non-teaching staffs and our beloved parents and for providing continuous guidance
and moral support throughout the study.
III
ABSTRACT
subject that receives today considerable attention from both academic and industrial
research.
on subways and light rail, bus systems are often the only financially feasible
compliance as well as to identify potential issues such as spot location due to user
IV
TABLE OF CONTENTS
CHAPTER PAGE
TITLE
NO. NO.
ABSTRACT IV
TABLE OF CONTENTS V
LIST OF FIGURES IX
LIST OF ABBREVATIONS X
1. INTRODUCTION 1
1.1.PROPOSED SYSTEM 2
2. LITERATURE SURVEY 3
3. 8
HAREWARE DESCRIPTION
3.1.2 Transformer 11
3.1.3 Rectifier 12
3.1.6 Smoothing 14
20
3.2.1 Pin Description
3.2.2 PIN 1: MCLR 20
3.2.3 Peripheral features 21
3.2.4 PIN 2: RA0/AN0 21
3.2.5 PIN 3: RA1/AN1 21
3.2.6 PIN 4: RA2/AN2/Vref- 21
3.2.7 PIN 5: RA3/AN3/Vref+ 21
3.2.8 PIN 6: RA0/T0CKI 22
V
3.2.9 PIN 7: RA5/SS/AN4 22
3.2.10 PIN 8: RE0/RD/AN5 22
3.2.11 PIN 9: RE1/WR/AN6 22
3.2.12 PIN 10: RE2/CS/A7 22
3.2.13 PIN 11 and 32: VDD 22
3.2.14 PIN 12 and 31: VSS 22
3.2.15 PIN 13: OSC1/CLKI 22
3.2.16 PIN 14: OSC2/CLKOUT 22
3.2.17 PIN 15: RC0/T1OCO/T1CKI 23
3.2.18 PIN 17: RC2/CCP 23
3.2.19 PIN 18: RC3/SCK/SCL 23
3.2.20 PIN 23: RC4/SDI/SDA 23
3.2.21 PIN 24: RC5/SDO 23
3.2.22 PIN 25: RC6/TX/CK 23
3.2.23 PIN 26: RC7/RX/DT 23
3.2.24 PIN 19,20,21,22,27,28,29,30: 24
3.2.25 PIN 33-40: PORT B 24
3.2.26 Program memory 24
3.2.27 Data Memory 24
3.2.28 Data EEPROM 24
3.2.29 Registers 24
3.2.30 Timer Modules 25
3.2.31 Block Diagram 26
3.2.32 Master Synchronous Serial Port 26
(MSSP) Module
3.2.33 Control Registers 27
3.2.34 Analog to Converter Module 27
3.2.35 Core Architecture 27
3.2.36 Data Space (RAM) 28
3.2.37 Word Size 29
3.2.38 Stacks 29
3.2.39 Instruction set 29
VI
30
3.3 LCD DISPLAY
3.3.1 Introduction 30
3.3.2 Working 32
3.3.4 LCD Pin Descriptions 33
3.3.5 RS, Register Select 34
3.3.6 R/W, Read/Write 34
3.3.7 E, Enable 34
3.3.8 D0 - D7 35
3.3.9 LCD Interfacing with 35
Microcontroller
3.3.10 Advantages 35
3.3.11 Disadvantages 36
3.3.12 Applications 36
36
3.4 RFID READER
3.4.1 RFID 36
3.4.2 RFID Applications 37
4. 46
SOFTWARE DESCRIPTION
4.5 Benefits 49
50
4.7 Large Libraries
50
4.8 Parallel Programming
VII
50
4.9 Ecosystem
50
4.10 User Community
51
4.11 Home Bundle Edition
51
4.12 Dataflow Programming Model
51
4.13 Licensing [Edit]
51
4.14 Run-Time Environment
52
4.15 Parallel Execution And Race
Conditions
52
4.16 Performance
52
4.17 Light Weight Applications
52
4.18 Timing System
53
4.19 Non-Textual
53
4.20 Not Forward Compatible
53
4.21 No Zoom Function
53
4.22 GPS MODULE
54
4.23 Structure
4.25 System Segmentation 56
4.28 Program 60
5. 70
RESULT & DISCUSSION
CONCULSION AND FUTURE SCOPE 75
REFERENCES
VIII
LIST OF TABLE
TABLE PAGE
DESCRIPTION
NO. NO.
3.3.3 Pin description for LCD 45
IX
LIST OF FIGURES
FIGURE PAGE
DESCRIPTION
NO. NO.
3.1 Block Diagram Public Transplantation System 8
3.2 Circuit Diagram 9
3.3 Regulated Power Supply System 11
3.4 Transformer Coil 11
3.5 Output Graph 12
3.6 Block Diagram of Rectifier & Output 12
3.7 BridgeRectifier 13
3.8 Output: Full - Wave Varying DC: (Using the Entire 14
AC Wave)
3.9 Block Diagram of Single Diode Rectifier 14
3.10 Output: Half-Wave Varying DC (Using Only Half 14
The AC Wave)
3.11 Block Diagram of Smoothing & Output Waveform 15
3.12 Output Wave Form 15
3.13 Block Diagram of Regulator & Output Wave form 17
3.14 Pin Diagram of PIC 16F877 20
3.15 Bit Prescaler 21
3.16 Crystal Resonator 23
3.17 Architecture of PIC 16F87 26
3.18 LCD Display 33
3.19 RFID Reader 37
3.20 RFID Tag 39
3.21 Zigbee 43
4.1 GPS module 54
4.2 Space Segment 56
4.3 USB to Uart Converter 59
5.1 Hardware Implementation 70
5.2 LCD Display 70
X
5.3 LCD Display Bus Stop Destination 71
ABBREVATION
XI
ABBREVATION EXPANSION
CMOS Complementary Metal Oxide Semiconductor
CO Crystal Oscillator
CSMA/CA Carries Sense Multiple Access / Collision Avoidance
DLL Data Link Layer
EPROM Erasable Programmable Read Only Memory
GND Ground
GPS Global Positioning System
GTS Guaranteed Time Slots
LABVIEW Laboratory Virtual Instrument Engineering Work Bench
LCD Liquid Crystal Display
MAC Media Access Control
MCS Master Control Station
MSSP Master Synchronous Serial Port
NMEA National Marine Eletronics Association
PIC Programmable Interface Controller
SPI Serial Peripheral Interface
WAAS Wide Area Augmentation
WPAN Wireless Personal Area Network
XII